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clb_nffmux: make all FFs work, not just B 

Signed-off-by: John McMaster <JohnDMcMaster@gmail.com>
Signed-off-by: Tim 'mithro' Ansell <mithro@mithis.com>
This commit is contained in:
John McMaster 2017-12-05 14:12:02 -08:00 committed by Tim 'mithro' Ansell
parent 04ebcd7b36
commit 5ceef14ab5
1 changed files with 166 additions and 100 deletions
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114
minitests/clb_nffmux/top.v
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@ -27,14 +27,18 @@ module top(input clk, stb, di, output do);
endmodule endmodule
module roi(input clk, input [255:0] din, output [255:0] dout); module roi(input clk, input [255:0] din, output [255:0] dout);
parameter N=1; parameter N=3;
clb_BFFMUX_BX #(.LOC("SLICE_X18Y100"), .N(N)) clb_BFFMUX_AX #(.LOC("SLICE_X18Y100"), .N(N))
clb_BFFMUX_BX (.clk(clk), .din(din[ 8 +: 8]), .dout(dout[ 8 +: 8])); clb_BFFMUX_AX (.clk(clk), .din(din[ 8 +: 8]), .dout(dout[ 8 +: 8]));
clb_BFFMUX_CY #(.LOC("SLICE_X18Y101"), .N(N)) clb_BFFMUX_CY #(.LOC("SLICE_X18Y101"), .N(N))
clb_BFFMUX_CY (.clk(clk), .din(din[ 16 +: 8]), .dout(dout[ 16 +: 8])); clb_BFFMUX_CY (.clk(clk), .din(din[ 16 +: 8]), .dout(dout[ 16 +: 8]));
clb_BFFMUX_F8 #(.LOC("SLICE_X18Y102"), .N(N)) generate
clb_BFFMUX_F8 (.clk(clk), .din(din[ 24 +: 8]), .dout(dout[ 24 +: 8])); if (N != 3) begin
clb_BFFMUX_F78 #(.LOC("SLICE_X18Y102"), .N(N))
clb_BFFMUX_F78 (.clk(clk), .din(din[ 24 +: 8]), .dout(dout[ 24 +: 8]));
end
endgenerate
clb_BFFMUX_O5 #(.LOC("SLICE_X18Y103"), .N(N)) clb_BFFMUX_O5 #(.LOC("SLICE_X18Y103"), .N(N))
clb_BFFMUX_O5 (.clk(clk), .din(din[ 32 +: 8]), .dout(dout[ 32 +: 8])); clb_BFFMUX_O5 (.clk(clk), .din(din[ 32 +: 8]), .dout(dout[ 32 +: 8]));
clb_BFFMUX_O6 #(.LOC("SLICE_X18Y104"), .N(N)) clb_BFFMUX_O6 #(.LOC("SLICE_X18Y104"), .N(N))
@ -44,7 +48,7 @@ module roi(input clk, input [255:0] din, output [255:0] dout);
endmodule endmodule
module myLUT8 (input clk, input [7:0] din, module myLUT8 (input clk, input [7:0] din,
output lut8o, output lut8o, output lut7bo, output lut7ao,
//caro: XOR additional result (main output) //caro: XOR additional result (main output)
//carco: CLA result (carry module additional output) //carco: CLA result (carry module additional output)
output caro, output carco, output caro, output carco,
@ -52,7 +56,7 @@ module myLUT8 (input clk, input [7:0] din,
output wire ff_q, //always connect to output output wire ff_q, //always connect to output
input wire ff_d); //mux output net input wire ff_d); //mux output net
parameter LOC="SLICE_FIXME"; parameter LOC="SLICE_FIXME";
parameter N=1; parameter N=-1;
wire [3:0] caro_all; wire [3:0] caro_all;
assign caro = caro_all[N]; assign caro = caro_all[N];
@ -61,7 +65,6 @@ module myLUT8 (input clk, input [7:0] din,
wire [3:0] lutno6; wire [3:0] lutno6;
wire [3:0] lutno5; wire [3:0] lutno5;
wire lut7bo, lut7ao;
assign bo5 = lutno5[N]; assign bo5 = lutno5[N];
assign bo6 = lutno6[N]; assign bo6 = lutno6[N];
@ -129,21 +132,63 @@ module myLUT8 (input clk, input [7:0] din,
(* LOC=LOC, KEEP, DONT_TOUCH *) (* LOC=LOC, KEEP, DONT_TOUCH *)
CARRY4 carry4(.O(caro_all), .CO(carco_all), .DI(lutno5), .S(lutno6), .CYINIT(1'b0), .CI()); CARRY4 carry4(.O(caro_all), .CO(carco_all), .DI(lutno5), .S(lutno6), .CYINIT(1'b0), .CI());
(* LOC=LOC, BEL="BFF", KEEP, DONT_TOUCH *) generate
FDPE ff ( if (N == 3) begin
(* LOC=LOC, BEL="DFF", KEEP, DONT_TOUCH *)
FDPE bff (
.C(clk), .C(clk),
.Q(ff_q), .Q(ff_q),
.CE(1'b1), .CE(1'b1),
.PRE(1'b0), .PRE(1'b0),
.D(ff_d)); .D(ff_d));
end
if (N == 2) begin
(* LOC=LOC, BEL="CFF", KEEP, DONT_TOUCH *)
FDPE bff (
.C(clk),
.Q(ff_q),
.CE(1'b1),
.PRE(1'b0),
.D(ff_d));
end
if (N == 1) begin
(* LOC=LOC, BEL="BFF", KEEP, DONT_TOUCH *)
FDPE bff (
.C(clk),
.Q(ff_q),
.CE(1'b1),
.PRE(1'b0),
.D(ff_d));
end
if (N == 0) begin
(* LOC=LOC, BEL="AFF", KEEP, DONT_TOUCH *)
FDPE bff (
.C(clk),
.Q(ff_q),
.CE(1'b1),
.PRE(1'b0),
.D(ff_d));
end
endgenerate
endmodule endmodule
//****************************************************************************** //******************************************************************************
//BFFMUX tests //BFFMUX tests
module clb_BFFMUX_BX (input clk, input [7:0] din, output [7:0] dout); module clb_BFFMUX_AX (input clk, input [7:0] din, output [7:0] dout);
parameter LOC="SLICE_FIXME"; parameter LOC="SLICE_FIXME";
parameter N=1; parameter N=-1;
/*
D: DX
drawn a little differently
not a mux control
becomes a dedicated external signal
C: CX
B: BX
A: AX
*/
wire ax = din[6]; //used on MUX8:S, MUX7A:S, and MUX7B:S
myLUT8 #(.LOC(LOC), .N(N)) myLUT8 #(.LOC(LOC), .N(N))
myLUT8(.clk(clk), .din(din), myLUT8(.clk(clk), .din(din),
@ -151,13 +196,13 @@ module clb_BFFMUX_BX (input clk, input [7:0] din, output [7:0] dout);
.caro(), .carco(), .caro(), .carco(),
.bo5(), .bo6(), .bo5(), .bo6(),
.ff_q(dout[0]), .ff_q(dout[0]),
.ff_d(din[6])); //used on MUX8:S .ff_d(ax));
endmodule endmodule
module clb_BFFMUX_CY (input clk, input [7:0] din, output [7:0] dout); module clb_BFFMUX_CY (input clk, input [7:0] din, output [7:0] dout);
parameter LOC="SLICE_FIXME"; parameter LOC="SLICE_FIXME";
parameter N=1; parameter N=-1;
wire carco; wire carco;
myLUT8 #(.LOC(LOC), .N(N)) myLUT8 #(.LOC(LOC), .N(N))
@ -169,28 +214,49 @@ module clb_BFFMUX_CY (input clk, input [7:0] din, output [7:0] dout);
.ff_d(carco)); .ff_d(carco));
endmodule endmodule
module clb_BFFMUX_F8 (input clk, input [7:0] din, output [7:0] dout); module clb_BFFMUX_F78 (input clk, input [7:0] din, output [7:0] dout);
parameter LOC="SLICE_FIXME"; parameter LOC="SLICE_FIXME";
parameter N=1; parameter N=-1;
wire lut8o; wire lut8o, lut7bo, lut7ao;
/*
D: N/A (no such mux position)
C: F7B:O
B: F8:O
A: F7A:O
*/
wire ff_d;
generate
if (N == 3) begin
//No muxes, so this is undefined
invalid_configuration invalid_configuration3();
end else if (N == 2) begin
assign ff_d = lut7bo;
end else if (N == 1) begin
assign ff_d = lut8o;
end else if (N == 0) begin
assign ff_d = lut7ao;
end
endgenerate
myLUT8 #(.LOC(LOC), .N(N)) myLUT8 #(.LOC(LOC), .N(N))
myLUT8(.clk(clk), .din(din), myLUT8(.clk(clk), .din(din),
.lut8o(lut8o), .lut8o(lut8o), .lut7bo(lut7bo), .lut7ao(lut7ao),
.caro(), .carco(), .caro(), .carco(),
.bo5(), .bo6(), .bo5(), .bo6(),
.ff_q(dout[0]), .ff_q(dout[0]),
.ff_d(lut8o)); .ff_d(ff_d));
endmodule endmodule
module clb_BFFMUX_O5 (input clk, input [7:0] din, output [7:0] dout); module clb_BFFMUX_O5 (input clk, input [7:0] din, output [7:0] dout);
parameter LOC="SLICE_FIXME"; parameter LOC="SLICE_FIXME";
parameter N=1; parameter N=-1;
wire bo5; wire bo5;
myLUT8 #(.LOC(LOC), .N(N)) myLUT8 #(.LOC(LOC), .N(N))
myLUT8(.clk(clk), .din(din), myLUT8(.clk(clk), .din(din),
.lut8o(lut8o), .lut8o(),
.caro(), .carco(), .caro(), .carco(),
.bo5(bo5), .bo6(), .bo5(bo5), .bo6(),
.ff_q(dout[0]), .ff_q(dout[0]),
@ -199,12 +265,12 @@ endmodule
module clb_BFFMUX_O6 (input clk, input [7:0] din, output [7:0] dout); module clb_BFFMUX_O6 (input clk, input [7:0] din, output [7:0] dout);
parameter LOC="SLICE_FIXME"; parameter LOC="SLICE_FIXME";
parameter N=1; parameter N=-1;
wire bo6; wire bo6;
myLUT8 #(.LOC(LOC), .N(N)) myLUT8 #(.LOC(LOC), .N(N))
myLUT8(.clk(clk), .din(din), myLUT8(.clk(clk), .din(din),
.lut8o(lut8o), .lut8o(),
.caro(), .carco(), .caro(), .carco(),
.bo5(), .bo6(bo6), .bo5(), .bo6(bo6),
.ff_q(dout[0]), .ff_q(dout[0]),
@ -213,7 +279,7 @@ endmodule
module clb_BFFMUX_XOR (input clk, input [7:0] din, output [7:0] dout); module clb_BFFMUX_XOR (input clk, input [7:0] din, output [7:0] dout);
parameter LOC="SLICE_FIXME"; parameter LOC="SLICE_FIXME";
parameter N=1; parameter N=-1;
wire caro; wire caro;
myLUT8 #(.LOC(LOC), .N(N)) myLUT8 #(.LOC(LOC), .N(N))