005-tilegrid: fixed some over-specific settings in generate_full

Also added specimens to make some rquired fuzzers find all necessary
features

Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>

fuzzers/005-tilegrid/generate_full.py

@@ -395,15 +395,10 @@ def propagate_IOI_Y9(database, tiles_by_grid):
     higher than the rest, just like for some of the SING tiles.
 
     """
-    arch = os.getenv('XRAY_DATABASE')
-    if arch in 'artix7':
-        tiles = ['RIOI3_X43Y9', 'LIOI3_X0Y9']
-    elif arch in 'kintex7':
-        tiles = ['LIOI3_X0Y9']
-    elif arch in 'zynq7':
-        tiles = ['RIOI3_X31Y9']
-    else:
-        assert False, "Unsupported architecture"
+    ioi_tiles = os.getenv('XRAY_IOI3_TILES')
+
+    assert ioi_tiles is not None, "XRAY_IOI3_TILES env variable not set"
+    tiles = ioi_tiles.split(" ")
 
     for tile in tiles:
         prev_tile = tiles_by_grid[(

fuzzers/005-tilegrid/hclk_cmt/Makefile

@@ -1,4 +1,4 @@
-N ?= 5
+N ?= 10
 GENERATE_ARGS?="--oneval 1 --design params.csv --dword 5 --dframe 1C"
 include ../fuzzaddr/common.mk
 

fuzzers/005-tilegrid/hclk_ioi/Makefile

@@ -1,4 +1,4 @@
-N ?= 5
+N ?= 10
 GENERATE_ARGS?="--oneval 1 --design params.csv --dword 0 --dframe 21"
 include ../fuzzaddr/common.mk
 

fuzzers/005-tilegrid/pll/Makefile

@@ -1,3 +1,3 @@
-N ?= 5
+N ?= 10
 GENERATE_ARGS?="--oneval 1 --design params.csv --dframe 1C --dword 23"
 include ../fuzzaddr/common.mk

settings/artix200t.sh

@@ -8,6 +8,8 @@ export XRAY_ROI_TILEGRID="SLICE_X0Y0:SLICE_X163Y249 RAMB18_X0Y0:RAMB18_X8Y99 RAM
 
 export XRAY_EXCLUDE_ROI_TILEGRID="SLICE_X82Y200:SLICE_X83Y249 SLICE_X82Y0:SLICE_X83Y49"
 
+export XRAY_IOI3_TILES="RIOI3_X105Y9 LIOI3_X0Y9"
+
 export XRAY_PIN_00="R26"
 export XRAY_PIN_01="P26"
 export XRAY_PIN_02="N26"

settings/artix50t.sh

@@ -8,6 +8,8 @@ export XRAY_ROI_TILEGRID="SLICE_X0Y0:SLICE_X65Y99 SLICE_X0Y100:SLICE_X57Y149 RAM
 
 export XRAY_EXCLUDE_ROI_TILEGRID=""
 
+export XRAY_IOI3_TILES="LIOI3_X0Y9 RIOI3_X43Y9"
+
 export XRAY_PIN_00="E22"
 export XRAY_PIN_01="D22"
 export XRAY_PIN_02="E21"

settings/artix7.sh

@@ -8,6 +8,8 @@ export XRAY_ROI_TILEGRID="SLICE_X0Y0:SLICE_X65Y99 SLICE_X0Y100:SLICE_X57Y149 RAM
 
 export XRAY_EXCLUDE_ROI_TILEGRID=""
 
+export XRAY_IOI3_TILES="LIOI3_X0Y9 RIOI3_X43Y9"
+
 # These settings must remain in sync
 export XRAY_ROI="SLICE_X0Y100:SLICE_X35Y149 RAMB18_X0Y40:RAMB18_X0Y59 RAMB36_X0Y20:RAMB36_X0Y29 DSP48_X0Y40:DSP48_X0Y59 IOB_X0Y100:IOB_X0Y149"
 # Most of CMT X0Y2.

settings/kintex7.sh

@@ -7,6 +7,8 @@ export XRAY_ROI_TILEGRID="SLICE_X0Y50:SLICE_X19Y99 DSP48_X0Y20:DSP48_X0Y39 RAMB1
 
 export XRAY_EXCLUDE_ROI_TILEGRID=""
 
+export XRAY_IOI3_TILES="LIOI3_X0Y9"
+
 # These settings must remain in sync
 export XRAY_ROI="SLICE_X0Y50:SLICE_X19Y99 DSP48_X0Y20:DSP48_X0Y39 RAMB18_X0Y20:RAMB18_X0Y39 RAMB36_X0Y10:RAMB36_X0Y19 IOB_X0Y50:IOB_X0Y99"
 # Part of CMT X0Y1

settings/zynq7.sh

@@ -7,6 +7,8 @@ export XRAY_ROI_TILEGRID="SLICE_X0Y0:SLICE_X43Y99 RAMB18_X0Y0:RAMB18_X2Y39 RAMB3
 
 export XRAY_EXCLUDE_ROI_TILEGRID=""
 
+export XRAY_IOI3_TILES="RIOI3_X31Y9"
+
 # These settings must remain in sync
 export XRAY_ROI="SLICE_X00Y50:SLICE_X43Y99 RAMB18_X0Y20:RAMB18_X2Y39 RAMB36_X0Y10:RAMB36_X2Y19 IOB_X0Y50:IOB_X0Y99"