mirror of https://github.com/openXC7/prjxray.git
tilegrid: fix BRAM height
Signed-off-by: John McMaster <johndmcmaster@gmail.com>
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@ -486,7 +486,7 @@ def db_add_bits(database, segments):
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("HCLK", "CLB_IO_CLK"): (26, 1, 1),
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("INT", "CLB_IO_CLK"): (28, 2, 2),
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("BRAM", "CLB_IO_CLK"): (28, 2, None),
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("BRAM", "BLOCK_RAM"): (128, 5, None),
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("BRAM", "BLOCK_RAM"): (128, 10, None),
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("DSP", "CLB_IO_CLK"): (28, 2, 10),
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("INT_INTERFACE", "CLB_IO_CLK"): (28, 2, None),
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("BRAM_INT_INTERFACE", "CLB_IO_CLK"): (28, 2, None),
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