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Fixes link to non-existent glossary entry. 

Signed-off-by: Sarah Maddox <sarahmaddox@google.com>
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Sarah Maddox 2018-04-18 15:18:43 +10:00
parent 696d1c4140
commit 59082d9530
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docs/architecture/overview.rst
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@ -28,6 +28,6 @@ may be used within a single clock domain, connected to span both clock domains
in a horizontal clock row, or connected to global clocks.
Clock domains have a fixed height of 50 :term:`interconnect tiles
<interconnect tile>` centered around the horizontal clock lines (25 above, 25
<tile>` centered around the horizontal clock lines (25 above, 25
below). Various function tiles, such as :term:`CLBs <CLB>`, are attached to interconnect
tiles.