Add CLBL?_?.SLICE?_X?.?MUX to database

Signed-off-by: Clifford Wolf <clifford@clifford.at>
Signed-off-by: Tim 'mithro' Ansell <mithro@mithis.com>

fuzzers/016-clbnoutmux/Makefile

@@ -10,6 +10,7 @@ pushdb:
 	${XRAY_MERGEDB} clbll_r seg_clblx.segbits
 	${XRAY_MERGEDB} clblm_l seg_clblx.segbits
 	${XRAY_MERGEDB} clblm_r seg_clblx.segbits
+	${$XRAY_DBFIXUP}
 
 $(SPECIMENS_OK):
 	bash generate.sh $(subst /OK,,$@)

fuzzers/016-clbnoutmux/generate.py

@@ -1,11 +1,12 @@
 #!/usr/bin/env python3
 
-import sys, re
+import sys, os, re
 
 sys.path.append("../../../utils/")
 from segmaker import segmaker
 
 segmk = segmaker("design.bits")
+cache = dict()
 
 print("Loading tags")
 '''
@@ -17,11 +18,11 @@ clb_NFFMUX_O6,SLICE_X14Y100,3
 f = open('params.csv', 'r')
 f.readline()
 for l in f:
-    module,loc,n = l.split(',')
+    src,loc,n = l.split(',')
     n = int(n)
     which = chr(ord('A') + n)
     # clb_NFFMUX_AX => AX
-    module = module.replace('clb_NOUTMUX_', '')
+    src = src.replace('clb_NOUTMUX_', '')
 
     '''
     BOUTMUX
@@ -33,14 +34,46 @@ for l in f:
     F8                      1       1
     B5Q                             1
     '''
-    # TODO: this needs to be converted to PIP type format
-    if 0:
-        # Although F78 is special, if it doesn't show up, we don't care
-        segmk.addtag(loc, "%cMUX.B0" % which, module in ('O6', 'O5'))
-        segmk.addtag(loc, "%cMUX.B1" % which, module in ('XOR', 'CY'))
-        segmk.addtag(loc, "%cMUX.B2" % which, module in ('O5', 'CY', 'F78'))
-        segmk.addtag(loc, "%cMUX.B3" % which, module in ('F78', 'B5Q'))
 
-segmk.compile()
+    if loc not in cache:
+        cache[loc] = set("ABCD")
+
+    if src == "F78":
+        if which in "AC":
+            src = "F7"
+        elif which == "B":
+            src = "F8"
+        else:
+            assert 0
+
+    if src == "B5Q":
+        src = which + "5Q"
+
+    tag = "%sMUX.%s" % (which, src)
+    segmk.addtag(loc, tag, 1)
+    cache[loc].remove(which)
+
+for loc, muxes in cache.items():
+    for which in muxes:
+        for src in "F7 F8 CY O5 XOR O6 5Q".split():
+            if src == "F7" and which not in "AC": continue
+            if src == "F8" and which not in "B": continue
+            if src == "5Q": src = which + "5Q"
+            tag = "%sMUX.%s" % (which, src)
+            segmk.addtag(loc, tag, 0)
+
+def bitfilter(frame_idx, bit_idx):
+    assert os.getenv("XRAY_DATABASE") == "artix7"
+
+    if (frame_idx, bit_idx) in [
+            (30, 55), (31, 55), # D5MA
+            (31, 44), (31, 45), # C5MA
+            (30, 19), (31, 19), # B5MA
+            (30,  9), (31,  8), # A5MA
+        ]: return False
+
+    return frame_idx in [30, 31]
+
+segmk.compile(bitfilter=bitfilter)
 segmk.write()
 

htmlgen/htmlgen.py

@@ -134,7 +134,7 @@ for segname, segdata in grid["segments"].items():
             print("Loading %s segbits." % segtype)
             with open("../database/%s/segbits_%s.db" % (os.getenv("XRAY_DATABASE"), segtype)) as f:
                 for line in f:
-                    if ".DMUX." in line:
+                    if re.search(r"\.[ABCD]MUX\.", line):
                         add_pip_bits(line)
                     else:
                         add_single_bit(line)
@@ -394,7 +394,10 @@ function oml() {
                                 label = "LH"
                             elif re.match("^CLBL[LM]_[LR].SLICE[LM]_X[01].[ABCD]FF.DMUX", bn):
                                 bgcolor = "#88aaff"
-                                label = "DMUX"
+                                label = "DMX"
+                            elif re.match("^CLBL[LM]_[LR].SLICE[LM]_X[01].[ABCD]MUX", bn):
+                                bgcolor = "#aa88ff"
+                                label = "OMX"
                             elif re.match("^HCLK_[LR]", bn) and "_B_BOT" in bn:
                                 bgcolor = "#4466bb"
                                 label = "BOT"

utils/dbfixup.py

@@ -19,6 +19,16 @@ zero_db = [
     "31_24 31_25 31_26 31_27",
     "31_35 31_36 31_37 31_38",
     "30_58 31_60 31_61 31_62",
+
+    # CLBL?_?.SLICE?_X?.?MUX
+    "30_06 30_07 30_08 30_11",
+    "30_20 30_21 30_22 30_23",
+    "30_40 30_43 30_44 30_45",
+    "30_51 30_52 30_56 30_57",
+    "30_05 31_07 31_09 31_10",
+    "30_28 30_29 31_20 31_21",
+    "30_41 30_42 31_40 31_43",
+    "30_53 31_53 31_56 31_57",
 ]
 
 def add_zero_bits(tile_type):