mirror of https://github.com/openXC7/prjxray.git
Added a makefile which allows to fuzz features for both SLICEM and SLICEL but separate them during database merge.
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
This commit is contained in:
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67dba10fb7
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56cb76e90f
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@ -1,4 +1,8 @@
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# Specimen count
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N := 4
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N := 4
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CLB_DBFIXUP=Y
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include ../clb.mk
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# A grep regex for SLICEM features to be skipped for SLICELs
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SLICEM_FEATURES ?= "DOUTMUX.MC31"
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include ../clb_ext.mk
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@ -62,8 +62,8 @@ for l in f:
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# create 0-tags for all sources on the remaining (unused) MUXes
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# create 0-tags for all sources on the remaining (unused) MUXes
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for loc, muxes in cache.items():
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for loc, muxes in cache.items():
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for which in muxes:
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for which in muxes:
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for src in "F7 F8 CY O5 XOR 5Q AMC31".split():
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for src in "F7 F8 CY O5 XOR 5Q MC31".split():
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if src == "AMC31" and which is not "D": continue
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if src == "MC31" and which is not "D": continue
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if src == "F7" and which not in "AC": continue
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if src == "F7" and which not in "AC": continue
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if src == "F8" and which not in "B": continue
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if src == "F8" and which not in "B": continue
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if src == "5Q": src = which + "5Q"
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if src == "5Q": src = which + "5Q"
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@ -76,7 +76,7 @@ def bitfilter(frame_idx, bit_idx):
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# in this fuzzer we get some aliasing with those bits, so we have to manually exclude
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# in this fuzzer we get some aliasing with those bits, so we have to manually exclude
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# them. (Maybe FIXME: read the bit locations from the database files)
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# them. (Maybe FIXME: read the bit locations from the database files)
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# Since the SRL32 is enabled along with DOUTMUX.AMC31, bits related to
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# Since the SRL32 is enabled along with DOUTMUX.MC31, bits related to
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# SRL32 features are masked out.
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# SRL32 features are masked out.
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if (frame_idx, bit_idx) in [
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if (frame_idx, bit_idx) in [
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@ -89,7 +89,7 @@ def bitfilter(frame_idx, bit_idx):
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(30, 9),
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(30, 9),
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(31, 8), # A5MA
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(31, 8), # A5MA
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(30, 16), # ALUT.SRL
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(30, 16), # ALUT.SRL
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(1, 23), # WEMUX.CE
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( 1, 23), # WEMUX.CE
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]:
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]:
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return False
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return False
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@ -9,7 +9,6 @@ INCREMENT = os.getenv('CLBN', 0)
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CLBN = 400 + int(INCREMENT)
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CLBN = 400 + int(INCREMENT)
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print('//Requested CLBs: %s' % str(CLBN))
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print('//Requested CLBs: %s' % str(CLBN))
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def gen_slicels():
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def gen_slicels():
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for _tile_name, site_name, _site_type in util.get_roi().gen_sites(
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for _tile_name, site_name, _site_type in util.get_roi().gen_sites(
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['SLICEL']):
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['SLICEL']):
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@ -21,7 +20,6 @@ def gen_slicems():
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['SLICEM']):
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['SLICEM']):
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yield site_name
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yield site_name
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DIN_N = CLBN * 8
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DIN_N = CLBN * 8
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DOUT_N = CLBN * 8
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DOUT_N = CLBN * 8
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@ -40,7 +38,7 @@ for i in range(CLBN):
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if use_slicem:
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if use_slicem:
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loc = next(slicems)
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loc = next(slicems)
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variants = ['CY', 'F78', 'O5', 'XOR', 'B5Q', 'AMC31']
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variants = ['CY', 'F78', 'O5', 'XOR', 'B5Q', 'MC31']
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else:
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else:
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loc = next(slicels)
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loc = next(slicels)
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variants = ['CY', 'F78', 'O5', 'XOR', 'B5Q']
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variants = ['CY', 'F78', 'O5', 'XOR', 'B5Q']
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@ -49,8 +47,8 @@ for i in range(CLBN):
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modules = ['clb_NOUTMUX_' + x for x in variants]
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modules = ['clb_NOUTMUX_' + x for x in variants]
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module = random.choice(modules)
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module = random.choice(modules)
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if module == 'clb_NOUTMUX_AMC31':
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if module == 'clb_NOUTMUX_MC31':
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n = 3 # Only DOUTMUX has AMC31 input
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n = 3 # Only DOUTMUX has MC31 input
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elif module == 'clb_NOUTMUX_F78':
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elif module == 'clb_NOUTMUX_F78':
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n = random.randint(0, 2)
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n = random.randint(0, 2)
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else:
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else:
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@ -83,7 +81,7 @@ module myLUT8 (input clk, input [7:0] din,
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//Otherwise this FF drops out
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//Otherwise this FF drops out
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//output wire [3:0] n5ff_q);
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//output wire [3:0] n5ff_q);
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output wire ff_q,
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output wire ff_q,
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output wire amc31);
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output wire mc31);
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parameter N=-1;
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parameter N=-1;
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parameter LOC="SLICE_FIXME";
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parameter LOC="SLICE_FIXME";
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@ -157,7 +155,7 @@ module myLUT8 (input clk, input [7:0] din,
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.D(din[5]),
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.D(din[5]),
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.A(din[4:0]),
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.A(din[4:0]),
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.Q(lutno6[0]),
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.Q(lutno6[0]),
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.Q31(amc31));
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.Q31(mc31));
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assign lutno5[0] = din[6];
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assign lutno5[0] = din[6];
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@ -313,7 +311,7 @@ module clb_NOUTMUX_B5Q (input clk, input [7:0] din, output [7:0] dout);
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.ff_q(dout[0]));
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.ff_q(dout[0]));
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endmodule
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endmodule
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module clb_NOUTMUX_AMC31 (input clk, input [7:0] din, output [7:0] dout);
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module clb_NOUTMUX_MC31 (input clk, input [7:0] din, output [7:0] dout);
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parameter LOC="SLICE_FIXME";
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parameter LOC="SLICE_FIXME";
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parameter N=0; // Dummy
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parameter N=0; // Dummy
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@ -322,6 +320,6 @@ module clb_NOUTMUX_AMC31 (input clk, input [7:0] din, output [7:0] dout);
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.lut8o(),
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.lut8o(),
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.caro(), .carco(),
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.caro(), .carco(),
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.bo5(), .bo6(),
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.bo5(), .bo6(),
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.ff_q(), .amc31(dout[0]));
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.ff_q(), .mc31(dout[0]));
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endmodule
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endmodule
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''')
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''')
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@ -0,0 +1,60 @@
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# Speciment count
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N ?= 1
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# A grep regex for SLICEM features to be skipped for SLICELs
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SLICEM_FEATURES ?= "*"
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# This set of variables are used to store the increment
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# in the number of CLBs in case they are not enough and
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# the generated database is inconsistent
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CLBN ?= 0
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INC ?= 50
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VAR ?= "CLBN=$$(($(CLBN) + $(INC)))"
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ENV_VAR ?= "CLBN=$(CLBN)"
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ITER ?= 0
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MAX_ITER ?= 10
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FUZDIR = ${PWD}
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SEGMATCH_ARGS ?=-m 2 -M 2
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SEGDATAS=$(addsuffix /segdata_clbl[lm]_[lr].txt,$(SPECIMENS))
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include ../fuzzer.mk
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build/segbits_clbx.rdb: $(SPECIMENS_OK)
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${XRAY_SEGMATCH} $(SEGMATCH_ARGS) -o build/segbits_clbx.rdb $(SEGDATAS)
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checkdb:
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# If the database presents errors or is incomplete, the fuzzer is rerun.
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# When it reaches the maximum number of iterations it fails.
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@if [ $(ITER) -gt $(MAX_ITER) ]; then \
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echo "Max Iterations reached. Fuzzer unsolvable."; \
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exit 1; \
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fi
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$(MAKE) parsedb || $(MAKE) $(VAR) ITER=$$(($(ITER) + 1)) run
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parsedb:
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$(foreach file, $(wildcard build/*.db), ${XRAY_PARSEDB} --strict $(file);)
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database: build/segbits_clbl.db build/segbits_clbm.db
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build/segbits_clbm.rdb: build/segbits_clbx.rdb
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cp $^ $@
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build/segbits_clbl.rdb: build/segbits_clbx.rdb
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cat $^ | grep -E -v $(SLICEM_FEATURES) >$@
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build/%.db: build/%.rdb
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${XRAY_DBFIXUP} --db-root build --zero-db bits.dbf --seg-fn-in $^ --seg-fn-out $@
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${XRAY_MASKMERGE} $(subst .rdb,.db,$(subst segbits,mask,$^)) $(SEGDATAS)
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pushdb: checkdb
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${XRAY_MERGEDB} clbll_l build/segbits_clbl.db
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${XRAY_MERGEDB} clbll_r build/segbits_clbl.db
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${XRAY_MERGEDB} mask_clbll_l build/mask_clbl.db
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${XRAY_MERGEDB} mask_clbll_r build/mask_clbl.db
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${XRAY_MERGEDB} clblm_l build/segbits_clbm.db
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${XRAY_MERGEDB} clblm_r build/segbits_clbm.db
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${XRAY_MERGEDB} mask_clblm_l build/mask_clbm.db
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${XRAY_MERGEDB} mask_clblm_r build/mask_clbm.db
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.PHONY: checkdb parsedb pushdb
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