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Merge pull request #355 from mcmasterg/tilegrid_mmcm 

Tilegrid basic mmcm support
This commit is contained in:
John McMaster 2018-12-18 15:55:03 -08:00 committed by GitHub
parent 1182359f60 b84d9a2535
commit 502bc75b58
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
17 changed files with 283 additions and 81 deletions
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10
fuzzers/005-tilegrid/Makefile
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@ -1,5 +1,3 @@
# TODO: parallelize
FUZDIR=$(shell pwd)
BUILD_DIR=$(FUZDIR)/build
@ -21,17 +19,18 @@ build/clb/deltas:
build/bram/deltas:
bash generate.sh build/bram bram
# FIXME: review IOB
build/iob/deltas:
bash generate.sh build/iob iob
build/tilegrid_tdb.json: iob/build/segbits_tilegrid.tdb
build/tilegrid_tdb.json: iob/build/segbits_tilegrid.tdb mmcm/build/segbits_tilegrid.tdb
python3 add_tdb.py --fn-in build/basicdb/tilegrid.json --fn-out build/tilegrid_tdb.json
iob/build/segbits_tilegrid.tdb: build/basicdb/tilegrid.json
cd iob && $(MAKE)
# FIXME: review IOB
mmcm/build/segbits_tilegrid.tdb: build/basicdb/tilegrid.json
cd mmcm && $(MAKE)
build/tilegrid.json: generate_full.py build/tilegrid_tdb.json build/clb/deltas build/bram/deltas
cd build && python3 ${FUZDIR}/generate_full.py \
--json-in tilegrid_tdb.json --json-out ${BUILD_DIR}/tilegrid.json \
@ -46,6 +45,7 @@ run:
clean:
rm -rf build
cd iob && $(MAKE) clean
cd mmcm && $(MAKE) clean
.PHONY: database pushdb clean run

14
fuzzers/005-tilegrid/add_tdb.py
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@ -56,7 +56,9 @@ def load_db(fn):
l = l.strip()
# FIXME: add offset to name
# IOB_X0Y101.DFRAME:27.DWORD:3.DBIT:3 00020027_003_03
tagstr, addrstr = l.split(' ')
parts = l.split(' ')
assert len(parts) == 2, "Unresolved bit: %s" % l
tagstr, addrstr = parts
frame, wordidx, bitidx = parse_addr(addrstr)
bitidx_up = False
@ -79,8 +81,8 @@ def load_db(fn):
# or detect the first delta auto and assert they are all the same
if not bitidx_up:
bitidx = 0
assert bitidx == 0
assert frame % 0x100 == 0, "Unaligned frame"
assert bitidx == 0, l
assert frame % 0x80 == 0, "Unaligned frame at 0x%08X" % frame
yield (tile, frame, wordidx)
@ -92,7 +94,11 @@ def run(fn_in, fn_out, verbose=False):
# FIXME: generate frames from part file (or equivilent)
# See https://github.com/SymbiFlow/prjxray/issues/327
# FIXME: generate words from pitch
tdb_fns = [("iob/build/segbits_tilegrid.tdb", 42, 4)]
tdb_fns = [
("iob/build/segbits_tilegrid.tdb", 42, 4),
# FIXME: height
("mmcm/build/segbits_tilegrid.tdb", 30, 4),
]
for (tdb_fn, frames, words) in tdb_fns:
for (tile, frame, wordidx) in load_db(tdb_fn):
tilej = database[tile]

25
fuzzers/005-tilegrid/fuzzaddr/common.mk Normal file
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@ -0,0 +1,25 @@
N ?= 10
GENERATE_ARGS ?=
SPECIMENS := $(addprefix build/specimen_,$(shell seq -f '%03.0f' $(N)))
SPECIMENS_OK := $(addsuffix /OK,$(SPECIMENS))
database: build/segbits_tilegrid.tdb
build/segbits_tilegrid.tdb: $(SPECIMENS_OK)
${XRAY_SEGMATCH} -o build/segbits_tilegrid.tdb $$(find build -name "segdata_tilegrid.txt")
$(SPECIMENS_OK):
GENERATE_ARGS=${GENERATE_ARGS} bash ../fuzzaddr/generate.sh $(subst /OK,,$@)
touch $@
run:
$(MAKE) clean
$(MAKE) database
$(MAKE) pushdb
touch run.ok
clean:
rm -rf build
.PHONY: database pushdb run clean

61
fuzzers/005-tilegrid/fuzzaddr/generate.py Normal file
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@ -0,0 +1,61 @@
#!/usr/bin/env python3
from prjxray import bitsmaker
def run(bits_fn, design_fn, fnout, oneval, dframe, dword, dbit, verbose=False):
metastr = "DFRAME:%02x.DWORD:%u.DBIT:%u" % (dframe, dword, dbit)
tags = dict()
f = open(design_fn, 'r')
f.readline()
for l in f:
l = l.strip()
# Additional values reserved / for debugging
tile, val = l.split(',')[0:2]
tags["%s.%s" % (tile, metastr)] = val == oneval
bitsmaker.write(bits_fn, fnout, tags)
def main():
import argparse
parser = argparse.ArgumentParser(
description=
"Solve bits (like segmaker) on raw .bits file without segments")
parser.add_argument("--bits-file", default="design.bits", help="")
parser.add_argument("--verbose", action="store_true", help="")
parser.add_argument("--design", default="design.csv", help="")
parser.add_argument("--fnout", default="/dev/stdout", help="")
parser.add_argument("--oneval", required=True, help="")
parser.add_argument(
"--dframe",
type=str,
required=True,
help="Reference frame delta (base 16)")
parser.add_argument(
"--dword",
type=str,
required=True,
help="Reference word delta (base 10)")
parser.add_argument(
"--dbit",
type=str,
required=True,
help="Reference bit delta (base 10)")
args = parser.parse_args()
run(
args.bits_file,
args.design,
args.fnout,
args.oneval,
int(args.dframe, 16),
int(args.dword, 10),
int(args.dbit, 10),
verbose=args.verbose)
if __name__ == "__main__":
main()

2
fuzzers/005-tilegrid/iob/generate.sh → fuzzers/005-tilegrid/fuzzaddr/generate.sh
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@ -17,5 +17,5 @@ for x in design*.bit; do
${XRAY_BITREAD} -F $XRAY_ROI_FRAMES -o ${x}s -z -y $x
done
python3 $FUZDIR/generate.py >segdata_tilegrid.txt
python3 $FUZDIR/../fuzzaddr/generate.py $GENERATE_ARGS >segdata_tilegrid.txt

27
fuzzers/005-tilegrid/iob/Makefile
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@ -1,24 +1,3 @@
N := 15
SPECIMENS := $(addprefix build/specimen_,$(shell seq -f '%03.0f' $(N)))
SPECIMENS_OK := $(addsuffix /OK,$(SPECIMENS))
database: build/segbits_tilegrid.tdb
build/segbits_tilegrid.tdb: $(SPECIMENS_OK)
${XRAY_SEGMATCH} -o build/segbits_tilegrid.tdb $$(find build -name "segdata_tilegrid.txt")
$(SPECIMENS_OK):
bash generate.sh $(subst /OK,,$@)
touch $@
run:
$(MAKE) clean
$(MAKE) database
$(MAKE) pushdb
touch run.ok
clean:
rm -rf build
.PHONY: database pushdb run clean
N ?= 15
GENERATE_ARGS?="--oneval KEEPER --dframe 27 --dword 3 --dbit 3"
include ../fuzzaddr/common.mk

44
fuzzers/005-tilegrid/iob/generate.py
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@ -1,44 +0,0 @@
#!/usr/bin/env python3
import bitsmaker
def run(bits_fn, design_fn, fnout, verbose=False):
# Raw: IOB_X0Y101 00020027_003_03
metastr = "DFRAME:27.DWORD:3.DBIT:3"
tags = dict()
f = open(design_fn, 'r')
f.readline()
for l in f:
l = l.strip()
port, site, tile, pin, val = l.split(',')
'''
PULLTYPE 28 29 30
NONE X
KEEPER X X
PULLDOWN
PULLUP X X
'''
tags["%s.%s" % (tile, metastr)] = val == "KEEPER"
bitsmaker.write(bits_fn, fnout, tags)
def main():
import argparse
parser = argparse.ArgumentParser(
description=
"Solve bits (like segmaker) on raw .bits file without segments")
parser.add_argument("--bits-file", default="design.bits", help="")
parser.add_argument("--verbose", action="store_true", help="")
parser.add_argument("--design", default="design.csv", help="")
parser.add_argument("--fnout", default="/dev/stdout", help="")
args = parser.parse_args()
run(args.bits_file, args.design, args.fnout, args.verbose)
if __name__ == "__main__":
main()

2
fuzzers/005-tilegrid/iob/generate.tcl
View File

@ -73,7 +73,7 @@ proc loc_pins {} {
}
set_property PULLTYPE $val $port
# puts "IOB $port $site $tile $pin $val"
puts $fp "$port,$site,$tile,$pin,$val"
puts $fp "$tile,$val,$site,$port,$pin"
}
close $fp
}

4
fuzzers/005-tilegrid/iob/top.py
View File

@ -24,7 +24,7 @@ def gen_iobs():
yield site_name, site_type
def write_pins(ports):
def write_params(ports):
pinstr = ''
for site, (name, dir_, cell) in sorted(ports.items(), key=lambda x: x[1]):
# pinstr += 'set_property -dict "PACKAGE_PIN %s IOSTANDARD LVCMOS33" [get_ports %s]' % (packpin, port)
@ -76,7 +76,7 @@ def run():
else:
assign_o(rand_site(), 'do[%u]' % DOUT_N)
write_pins(ports)
write_params(ports)
print(
'''

4
fuzzers/005-tilegrid/mmcm/Makefile Normal file
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@ -0,0 +1,4 @@
N ?= 2
# Was expecting oneval 3, but bits might be inverted
GENERATE_ARGS?="--oneval 2 --design params.csv --dframe 1D --dword 0 --dbit 15"
include ../fuzzaddr/common.mk

32
fuzzers/005-tilegrid/mmcm/generate.tcl Normal file
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@ -0,0 +1,32 @@
source "$::env(XRAY_DIR)/utils/utils.tcl"
proc run {} {
create_project -force -part $::env(XRAY_PART) design design
read_verilog top.v
synth_design -top top
set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_00) IOSTANDARD LVCMOS33" [get_ports clk]
set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_01) IOSTANDARD LVCMOS33" [get_ports stb]
set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_02) IOSTANDARD LVCMOS33" [get_ports di]
set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_03) IOSTANDARD LVCMOS33" [get_ports do]
set_property CFGBVS VCCO [current_design]
set_property CONFIG_VOLTAGE 3.3 [current_design]
set_property BITSTREAM.GENERAL.PERFRAMECRC YES [current_design]
set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets clk_IBUF]
# Disable MMCM frequency etc sanity checks
set_property IS_ENABLED 0 [get_drc_checks {PDRC-29}]
set_property IS_ENABLED 0 [get_drc_checks {PDRC-30}]
set_property IS_ENABLED 0 [get_drc_checks {AVAL-50}]
set_property IS_ENABLED 0 [get_drc_checks {AVAL-53}]
set_property IS_ENABLED 0 [get_drc_checks {REQP-126}]
place_design
route_design
write_checkpoint -force design.dcp
write_bitstream -force design.bit
}
run

102
fuzzers/005-tilegrid/mmcm/top.py Normal file
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@ -0,0 +1,102 @@
import os
import random
random.seed(int(os.getenv("SEED"), 16))
from prjxray import util
from prjxray import verilog
def gen_sites():
for tile_name, site_name, _site_type in util.get_roi().gen_sites(
['MMCME2_ADV']):
yield tile_name, site_name
def write_params(params):
pinstr = 'tile,val,site\n'
for tile, (site, val) in sorted(params.items()):
pinstr += '%s,%s,%s\n' % (tile, val, site)
open('params.csv', 'w').write(pinstr)
def run():
print(
'''
module top(input clk, stb, di, output do);
localparam integer DIN_N = 8;
localparam integer DOUT_N = 8;
reg [DIN_N-1:0] din;
wire [DOUT_N-1:0] dout;
reg [DIN_N-1:0] din_shr;
reg [DOUT_N-1:0] dout_shr;
always @(posedge clk) begin
din_shr <= {din_shr, di};
dout_shr <= {dout_shr, din_shr[DIN_N-1]};
if (stb) begin
din <= din_shr;
dout_shr <= dout;
end
end
assign do = dout_shr[DOUT_N-1];
''')
params = {}
# FIXME: can't LOC?
# only one for now, worry about later
sites = list(gen_sites())
assert len(sites) == 1
for (tile_name, site_name), isone in zip(sites,
util.gen_fuzz_states(len(sites))):
# 0 is invalid
# shift one bit, keeping LSB constant
CLKOUT1_DIVIDE = {0: 2, 1: 3}[isone]
params[tile_name] = (site_name, CLKOUT1_DIVIDE)
print(
'''
(* KEEP, DONT_TOUCH *)
MMCME2_ADV #(/*.LOC("%s"),*/ .CLKOUT1_DIVIDE(%u)) dut_%s(
.CLKFBOUT(),
.CLKFBOUTB(),
.CLKFBSTOPPED(),
.CLKINSTOPPED(),
.CLKOUT0(),
.CLKOUT0B(),
.CLKOUT1(),
.CLKOUT1B(),
.CLKOUT2(),
.CLKOUT2B(),
.CLKOUT3(),
.CLKOUT3B(),
.CLKOUT4(),
.CLKOUT5(),
.CLKOUT6(),
.DO(),
.DRDY(),
.LOCKED(),
.PSDONE(),
.CLKFBIN(clk),
.CLKIN1(clk),
.CLKIN2(clk),
.CLKINSEL(clk),
.DADDR(),
.DCLK(clk),
.DEN(),
.DI(),
.DWE(),
.PSCLK(clk),
.PSEN(),
.PSINCDEC(),
.PWRDWN(),
.RST());
''' % (site_name, CLKOUT1_DIVIDE, site_name))
print("endmodule")
write_params(params)
if __name__ == '__main__':
run()

0
fuzzers/005-tilegrid/iob/bitsmaker.py → prjxray/bitsmaker.py
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37
prjxray/util.py
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@ -197,3 +197,40 @@ def specn():
# ex: build/specimen_001
specdir = os.getenv("SPECDIR")
return int(re.match(".*specimen_([0-9]*)", specdir).group(1), 10)
def gen_fuzz_states(nvals):
'''
Generates an optimal encoding to solve single bits as quickly as possible
tilegrid's initial solve for 4 bits works like this:
Initial reference value of all 0s:
0000
Then one-hot for each:
0001
0010
0100
1000
Which requires 5 samples total to diff these
However, using correlation instead its possible to resolve n bits using ceil(log(n, 2)) + 1 samples
With 4 positions it takes only 3 samples:
0000
0101
1010
'''
bits = 0
# First pass all 0's
for speci in range(2, specn() + 1):
# First pass do nothing
# Second pass invert every other bit (mod 2)
# Third pass invert blocks of two (mod 4)
block_size = 2**(speci - 1)
for maski in range(nvals):
mask = (1 << maski)
if maski % block_size < block_size / 2:
bits ^= mask
for i in range(nvals):
mask = (1 << i)
yield int(bool(bits & mask))

0
utils/checkdb.py Normal file → Executable file
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0
utils/xjson.py Normal file → Executable file
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0
utils/xyaml.py Normal file → Executable file
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