mirror of https://github.com/openXC7/prjxray.git
074-dump_all: fix bug when annotating wires speed model
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
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@ -323,7 +323,7 @@ def annotate_wires_speed_model(wires, speed_data):
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cap = wire_speed_data['cap']
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cap = wire_speed_data['cap']
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res = wire_speed_data['res']
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res = wire_speed_data['res']
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if cap != '0.000' and res != '0.000':
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if cap != '0.000' or res != '0.000':
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wires[wire_name] = {
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wires[wire_name] = {
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'cap': cap,
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'cap': cap,
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'res': res,
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'res': res,
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