Fixes to the fuzzer

Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
This commit is contained in:
Maciej Kurc 2019-07-15 12:36:39 +02:00
parent bd6c3c7f9d
commit 3c30f9f34a
3 changed files with 1 additions and 29 deletions

View File

@ -35,11 +35,6 @@ for params in data:
for x in delay_srcs:
segmk.add_site_tag(loc, "DELAY_SRC_%s" % x, int(value == x))
# # Signal pattern
# value = verilog.unquote(params["SIGNAL_PATTERN"])
# for x in signal_patterns:
# segmk.add_site_tag(loc, "SIGNAL_PATTERN_%s" % x, int(value == x))
value = verilog.unquote(params["HIGH_PERFORMANCE_MODE"])
segmk.add_site_tag(loc, "HIGH_PERFORMANCE_MODE", int(value == "TRUE"))

View File

@ -11,22 +11,6 @@ from prjxray.db import Database
# =============================================================================
#todo_file_name = "../todo.txt"
#def make_todo():
# if os.path.isfile(file_name):
# return
# with open(file_name, "w") as fp:
# fp.write("IDELAY_TYPE\n")
# fp.write("IDELAY_VALUE\n")
# fp.write("DELAY_SRC\n")
# fp.write("HIGH_PERFORMANCE_MODE\n")
# fp.write("SIGNAL_PATTERN\n")
# fp.write("CINVCTRL_SEL\n")
# fp.write("PIPE_SEL\n")
def get_loc(name):
m = re.match("^\S+_X([0-9]+)Y([0-9]+)$", name)
assert m != None
@ -76,13 +60,6 @@ def run():
# Get all [LR]IOI3 tiles
tiles = list(gen_sites())
# N = 1
# tiles = tiles[:N] # HACK
# for t in tiles:
# print(t)
# exit(-1)
# Header
print("// Tile count: %d" % len(tiles))
@ -154,7 +131,7 @@ IDELAYCTRL idelayctrl();
endmodule
(* KEEP, DONT_TOUCH *)
module mod(
input wire I,
output wire O