001-part-yaml: Add iobanks information to part's json

Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>

fuzzers/001-part-yaml/Makefile

@@ -4,7 +4,8 @@ SPECIMENS := $(addprefix build/specimen_,$(shell seq -f '%03.0f' $(N)))
 database: $(SPECIMENS)
 	mkdir -p build
 	cp build/specimen_001/part.yaml build/part.yaml
-	python3 -m utils.xyaml build/part.yaml > build/part.json
+	python3 -m utils.xyaml build/part.yaml > build/part_no_iobanks.json
+	python3 add_iobanks.py --part_json build/part_no_iobanks.json --iobanks_info build/specimen_001/iobanks.txt > build/part.json
 
 $(SPECIMENS): Makefile.specimen
 	mkdir -p $@

fuzzers/001-part-yaml/add_iobanks.py

@@ -0,0 +1,30 @@
+#!/usr/bin/env python3
+'''
+Script for adding the IO Banks information to the Part's generated JSON.
+'''
+import argparse
+import json
+
+
+def main(argv):
+    with open(args.part_json) as json_file, open(
+            args.iobanks_info) as iobanks_info:
+        part_data = json.load(json_file)
+        json_file.close()
+        iobank_data = dict()
+        for iobank in iobanks_info:
+            iobank = iobank.strip()
+            bank, coordinates = iobank.split(",")
+            iobank_data[bank] = coordinates
+        iobanks_info.close()
+        if len(iobank_data) > 0:
+            part_data["iobanks"] = iobank_data
+        print(json.dumps(part_data, indent=4))
+
+
+if __name__ == "__main__":
+    parser = argparse.ArgumentParser()
+    parser.add_argument('--part_json', help='Input json')
+    parser.add_argument('--iobanks_info', help='Input IO Banks info file')
+    args = parser.parse_args()
+    main(args)

fuzzers/001-part-yaml/generate.tcl

@@ -1,3 +1,22 @@
+proc extract_iobanks {filename} {
+    set fp [open $filename "w"]
+    foreach iobank [get_iobanks] {
+        set sample_site [lindex [get_sites -of $iobank] 0]
+        if {[llength $sample_site] == 0} continue
+        set clock_region [get_property CLOCK_REGION $sample_site]
+        foreach tile [get_tiles -filter {TYPE=~HCLK_IOI3}] {
+            set tile_sites [get_sites -of_object $tile]
+            if {[llength $tile_sites] == 0} continue
+            set hclk_tile_clock_region [get_property CLOCK_REGION [lindex [get_sites -of_object $tile] 0]]
+            if {$clock_region == $hclk_tile_clock_region} {
+                set coord [lindex [split $tile "_"] 2]
+                puts $fp "$iobank,$coord"
+            }
+        }
+    }
+    close $fp
+}
+
 create_project -force -part $::env(XRAY_PART) design design
 
 read_verilog ../../top.v
@@ -17,6 +36,7 @@ set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets clk_IBUF]
 place_design
 route_design
 
+extract_iobanks iobanks.txt
 write_checkpoint -force design.dcp
 
 # Write a normal bitstream that will do a singe FDRI write of all the frames.