mirror of https://github.com/openXC7/prjxray.git
Add routing test to switchboxes minitest
Signed-off-by: Clifford Wolf <clifford@clifford.at> Signed-off-by: Tim 'mithro' Ansell <mithro@mithis.com>
This commit is contained in:
Clifford Wolf
Tim 'mithro' Ansell
parent
1393723058
commit
1ce90e7f21
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@ -3,5 +3,11 @@
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/design/
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/design.dcp
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/design.bit
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/CLBLL_L_X12Y119.txt
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/INT_L_X12Y119.txt
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/design.bits
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/pips_clbll.txt
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/pips_int.txt
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/routes.dcp
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/routes.bit
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/routes.bits
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/usage_statistics_webtalk.html
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/usage_statistics_webtalk.xml
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@ -0,0 +1,63 @@
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proc tile_pip_report {fd tile_name} {
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set tile [get_tile $tile_name]
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set pips [get_pips -of_object $tile]
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set dsts [lsort -unique [get_wires -filter "TILE_NAME == $tile" -downhill -of_objects $pips]]
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puts $fd ""
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puts $fd "PIP Report for tile $tile"
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puts $fd "==================================="
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puts $fd ""
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puts $fd "PIPs that implement 1:1 connections"
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puts $fd "-----------------------------------"
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foreach dst $dsts {
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set dst_node [get_node -of_objects $dst]
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set dst_span [llength [get_tiles -of_objects $dst_node]]
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set pips [get_pips -filter "TILE == $tile" -uphill -of_objects $dst_node]
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if {[llength $pips] == 1} {
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puts $fd ""
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puts $fd "Destination Wire (Node, Span): $dst ($dst_node, $dst_span)"
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foreach pip $pips {
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set src [get_wires -uphill -of_objects $pip]
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set src_node [get_node -of_objects $src]
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set src_span [llength [get_tiles -of_objects $src_node]]
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puts $fd " Source Wire (Node, Span): $src ($src_node, $src_span) via $pip"
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}
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foreach pip [get_pips -quiet -filter "TILE != $tile" -uphill -of_objects $dst_node] {
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puts $fd " Outside Source PIP: $pip"
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}
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}
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}
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puts $fd ""
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puts $fd "PIPs that implement N:1 connections"
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puts $fd "-----------------------------------"
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foreach dst $dsts {
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set dst_node [get_node -of_objects $dst]
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set dst_span [llength [get_tiles -of_objects $dst_node]]
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set pips [get_pips -filter "TILE == $tile" -uphill -of_objects $dst_node]
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if {[llength $pips] != 1} {
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puts $fd ""
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puts $fd "Destination Wire (Node, Span): $dst ($dst_node, $dst_span)"
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foreach pip $pips {
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set src [get_wires -uphill -of_objects $pip]
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set src_node [get_node -of_objects $src]
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set src_span [llength [get_tiles -of_objects $src_node]]
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puts $fd " Source Wire (Node, Span): $src ($src_node, $src_span) via $pip"
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}
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foreach pip [get_pips -quiet -filter "TILE != $tile" -uphill -of_objects $dst_node] {
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puts $fd " Outside Source PIP: $pip"
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}
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}
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}
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puts $fd ""
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puts $fd ""
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}
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tile_pip_report [open "pips_clbll.txt" w] CLBLL_L_X12Y119
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tile_pip_report [open "pips_int.txt" w] INT_L_X12Y119
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@ -0,0 +1,13 @@
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set_property FIXED_ROUTE {} [get_nets]
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route_design -unroute
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route_via x_OBUF {INT_L_X10Y118/NR1BEG1 INT_L_X10Y119/EE2BEG0 INT_L_X12Y119/EE2BEG0 INT_L_X14Y119/SW2BEG0}
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route_via y_OBUF {INT_L_X10Y116/NR1BEG1 INT_L_X10Y117/EE2BEG0 INT_L_X12Y117/EE2BEG0 INT_L_X14Y117/SW2BEG0}
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route_via z_OBUF {INT_L_X10Y114/NR1BEG1 INT_L_X10Y115/EE2BEG0 INT_L_X12Y115/EE2BEG0 INT_L_X14Y115/SW2BEG0}
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route_design
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write_checkpoint -force routes.dcp
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write_bitstream -force routes.bit
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@ -0,0 +1,4 @@
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#!/bin/bash
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vivado -mode batch -source runme.tcl
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../../tools/bitread -F $XRAY_ROI_FRAMES -o design.bits -zy design.bit
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../../tools/bitread -F $XRAY_ROI_FRAMES -o routes.bits -zy routes.bit
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@ -18,67 +18,9 @@ place_design
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route_design
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write_checkpoint -force design.dcp
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# write_bitstream -force design.bit
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write_bitstream -force design.bit
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proc tile_pip_report {fd tile_name} {
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set tile [get_tile $tile_name]
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set pips [get_pips -of_object $tile]
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set dsts [lsort -unique [get_wires -filter "TILE_NAME == $tile" -downhill -of_objects $pips]]
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puts $fd ""
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puts $fd "PIP Report for tile $tile"
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puts $fd "==================================="
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puts $fd ""
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puts $fd "PIPs that implement 1:1 connections"
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puts $fd "-----------------------------------"
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foreach dst $dsts {
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set dst_node [get_node -of_objects $dst]
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set dst_span [llength [get_tiles -of_objects $dst_node]]
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set pips [get_pips -filter "TILE == $tile" -uphill -of_objects $dst_node]
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if {[llength $pips] == 1} {
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puts $fd ""
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puts $fd "Destination Wire (Node, Span): $dst ($dst_node, $dst_span)"
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foreach pip $pips {
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set src [get_wires -uphill -of_objects $pip]
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set src_node [get_node -of_objects $src]
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set src_span [llength [get_tiles -of_objects $src_node]]
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puts $fd " Source Wire (Node, Span): $src ($src_node, $src_span) via $pip"
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}
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foreach pip [get_pips -quiet -filter "TILE != $tile" -uphill -of_objects $dst_node] {
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puts $fd " Outside Source PIP: $pip"
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}
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}
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}
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puts $fd ""
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puts $fd "PIPs that implement N:1 connections"
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puts $fd "-----------------------------------"
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foreach dst $dsts {
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set dst_node [get_node -of_objects $dst]
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set dst_span [llength [get_tiles -of_objects $dst_node]]
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set pips [get_pips -filter "TILE == $tile" -uphill -of_objects $dst_node]
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if {[llength $pips] != 1} {
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puts $fd ""
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puts $fd "Destination Wire (Node, Span): $dst ($dst_node, $dst_span)"
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foreach pip $pips {
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set src [get_wires -uphill -of_objects $pip]
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set src_node [get_node -of_objects $src]
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set src_span [llength [get_tiles -of_objects $src_node]]
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puts $fd " Source Wire (Node, Span): $src ($src_node, $src_span) via $pip"
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}
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foreach pip [get_pips -quiet -filter "TILE != $tile" -uphill -of_objects $dst_node] {
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puts $fd " Outside Source PIP: $pip"
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}
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}
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}
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puts $fd ""
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puts $fd ""
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}
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tile_pip_report [open "CLBLL_L_X12Y119.txt" w] CLBLL_L_X12Y119
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tile_pip_report [open "INT_L_X12Y119.txt" w] INT_L_X12Y119
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source ../../utils/utils.tcl
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source pips.tcl
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source routes.tcl
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@ -1,6 +1,22 @@
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proc route_via {net nodes} {
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# FIXME
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set net [get_nets $net]
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set fixed_route [get_nodes -of_objects [get_site_pins -filter {DIRECTION == OUT} -of_objects $net]]
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set nodes [get_nodes $nodes]
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lappend nodes [get_nodes -of_objects [get_site_pins -filter {DIRECTION == IN} -of_objects $net]]
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foreach to_node $nodes {
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set from_node [lindex $fixed_route end]
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set route [find_routing_path -quiet -from $from_node -to $to_node]
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if {$route == ""} {
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lappend fixed_route $to_node
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} {
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set fixed_route [concat $fixed_route [lrange $route 1 end]]
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}
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}
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set_property FIXED_ROUTE $fixed_route $net
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}
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proc putl {lst} {
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