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More bits! 

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
This commit is contained in:
Keith Rothman 2019-01-30 17:52:17 -08:00
parent 74893fae4d
commit 19fc8f109a
2 changed files with 22 additions and 18 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

28
fuzzers/060-bram-cascades/bits.dbf
View File

@ -6,13 +6,14 @@
26_176 26_177 26_179,BRAM.BRAM_ADDRARDADDRL7.BRAM_IMUX_ADDRARDADDRL7
26_80 26_81 26_83 ,BRAM.BRAM_ADDRARDADDRL8.BRAM_IMUX_ADDRARDADDRL8
26_208 26_209 26_211,BRAM.BRAM_ADDRARDADDRL9.BRAM_IMUX_ADDRARDADDRL9
26_152 26_153 26_155,BRAM.BRAM_ADDRBWRADDRL10.BRAM_IMUX_ADDRBWRADDRL10
26_120 26_121 26_123,BRAM.BRAM_ADDRBWRADDRL11.BRAM_IMUX_ADDRBWRADDRL11
26_248 26_249 26_251,BRAM.BRAM_ADDRBWRADDRL12.BRAM_IMUX_ADDRBWRADDRL12
26_136 26_137 26_139,BRAM.BRAM_ADDRBWRADDRL13.BRAM_IMUX_ADDRBWRADDRL13
26_264 26_265 26_267,BRAM.BRAM_ADDRBWRADDRL14.BRAM_IMUX_ADDRBWRADDRL14
26_144 26_145 26_147,BRAM.BRAM_ADDRARDADDRL10.BRAM_IMUX_ADDRARDADDRL10
26_112 26_113 26_115,BRAM.BRAM_ADDRARDADDRL11.BRAM_IMUX_ADDRARDADDRL11
26_240 26_241 26_243,BRAM.BRAM_ADDRARDADDRL12.BRAM_IMUX_ADDRARDADDRL12
26_128 26_129 26_131,BRAM.BRAM_ADDRARDADDRL13.BRAM_IMUX_ADDRARDADDRL13
26_256 26_257 26_259,BRAM.BRAM_ADDRARDADDRL14.BRAM_IMUX_ADDRARDADDRL14
26_72 26_73 26_75 ,BRAM.BRAM_ADDRBWRADDRL2.BRAM_IMUX_ADDRBWRADDRL2
26_56 26_57 26_59 ,BRAM.BRAM_ADDRBWRADDRL1.BRAM_IMUX_ADDRBWRADDRL1
26_72 26_73 26_75 ,BRAM.BRAM_ADDRBWRADDRL2.BRAM_IMUX_ADDRBWRADDRL2
26_200 26_201 26_203,BRAM.BRAM_ADDRBWRADDRL3.BRAM_IMUX_ADDRBWRADDRL3
26_104 26_105 26_107,BRAM.BRAM_ADDRBWRADDRL4.BRAM_IMUX_ADDRBWRADDRL4
26_232 26_233 26_235,BRAM.BRAM_ADDRBWRADDRL5.BRAM_IMUX_ADDRBWRADDRL5
@ -42,6 +43,7 @@
26_133 26_134 26_135,BRAM.BRAM_ADDRARDADDRU13.BRAM_IMUX_ADDRARDADDRU13
26_261 26_262 26_263,BRAM.BRAM_ADDRARDADDRU14.BRAM_IMUX_ADDRARDADDRU14
26_61 26_62 26_63 ,BRAM.BRAM_ADDRBWRADDRU1.BRAM_IMUX_ADDRBWRADDRU1
26_77 26_78 26_79 ,BRAM.BRAM_ADDRBWRADDRU2.BRAM_IMUX_ADDRBWRADDRU2
26_205 26_206 26_207,BRAM.BRAM_ADDRBWRADDRU3.BRAM_IMUX_ADDRBWRADDRU3
26_109 26_110 26_111,BRAM.BRAM_ADDRBWRADDRU4.BRAM_IMUX_ADDRBWRADDRU4
@ -64,13 +66,14 @@
26_176 26_177 26_179,BRAM.BRAM_ADDRARDADDRL7.BRAM_R_IMUX_ADDRARDADDRL7
26_80 26_81 26_83 ,BRAM.BRAM_ADDRARDADDRL8.BRAM_R_IMUX_ADDRARDADDRL8
26_208 26_209 26_211,BRAM.BRAM_ADDRARDADDRL9.BRAM_R_IMUX_ADDRARDADDRL9
26_152 26_153 26_155,BRAM.BRAM_ADDRBWRADDRL10.BRAM_R_IMUX_ADDRBWRADDRL10
26_120 26_121 26_123,BRAM.BRAM_ADDRBWRADDRL11.BRAM_R_IMUX_ADDRBWRADDRL11
26_248 26_249 26_251,BRAM.BRAM_ADDRBWRADDRL12.BRAM_R_IMUX_ADDRBWRADDRL12
26_136 26_137 26_139,BRAM.BRAM_ADDRBWRADDRL13.BRAM_R_IMUX_ADDRBWRADDRL13
26_264 26_265 26_267,BRAM.BRAM_ADDRBWRADDRL14.BRAM_R_IMUX_ADDRBWRADDRL14
26_144 26_145 26_147,BRAM.BRAM_ADDRARDADDRL10.BRAM_R_IMUX_ADDRARDADDRL10
26_112 26_113 26_115,BRAM.BRAM_ADDRARDADDRL11.BRAM_R_IMUX_ADDRARDADDRL11
26_240 26_241 26_243,BRAM.BRAM_ADDRARDADDRL12.BRAM_R_IMUX_ADDRARDADDRL12
26_128 26_129 26_131,BRAM.BRAM_ADDRARDADDRL13.BRAM_R_IMUX_ADDRARDADDRL13
26_256 26_257 26_259,BRAM.BRAM_ADDRARDADDRL14.BRAM_R_IMUX_ADDRARDADDRL14
26_72 26_73 26_75 ,BRAM.BRAM_ADDRBWRADDRL2.BRAM_R_IMUX_ADDRBWRADDRL2
26_56 26_57 26_59 ,BRAM.BRAM_ADDRBWRADDRL1.BRAM_R_IMUX_ADDRBWRADDRL1
26_72 26_73 26_75 ,BRAM.BRAM_ADDRBWRADDRL2.BRAM_R_IMUX_ADDRBWRADDRL2
26_200 26_201 26_203,BRAM.BRAM_ADDRBWRADDRL3.BRAM_R_IMUX_ADDRBWRADDRL3
26_104 26_105 26_107,BRAM.BRAM_ADDRBWRADDRL4.BRAM_R_IMUX_ADDRBWRADDRL4
26_232 26_233 26_235,BRAM.BRAM_ADDRBWRADDRL5.BRAM_R_IMUX_ADDRBWRADDRL5
@ -100,6 +103,7 @@
26_133 26_134 26_135,BRAM.BRAM_ADDRARDADDRU13.BRAM_R_IMUX_ADDRARDADDRU13
26_261 26_262 26_263,BRAM.BRAM_ADDRARDADDRU14.BRAM_R_IMUX_ADDRARDADDRU14
26_61 26_62 26_63 ,BRAM.BRAM_ADDRBWRADDRU1.BRAM_R_IMUX_ADDRBWRADDRU1
26_77 26_78 26_79 ,BRAM.BRAM_ADDRBWRADDRU2.BRAM_R_IMUX_ADDRBWRADDRU2
26_205 26_206 26_207,BRAM.BRAM_ADDRBWRADDRU3.BRAM_R_IMUX_ADDRBWRADDRU3
26_109 26_110 26_111,BRAM.BRAM_ADDRBWRADDRU4.BRAM_R_IMUX_ADDRBWRADDRU4

12
fuzzers/060-bram-cascades/top.py
View File

@ -148,19 +148,19 @@ def max_address_bits(width):
def random_sdp_bram(luts, name, modules, lines):
sdp_choices = set()
for width in (1, 18, 36):
for width in (1, 2, 4, 8, 16, 18, 32, 36):
sdp_choices.add((width, (1, max_address_bits(width))))
for nbram in range(2, MAX_BRAM+1):
#sdp_choices.add((nbram*32, (1, max_address_bits(nbram*32))))
#sdp_choices.add((nbram*36, (1, max_address_bits(nbram*36))))
#sdp_choices.add((nbram*16, (1, max_address_bits(nbram*16))))
#sdp_choices.add((nbram*32, (1, max_address_bits(nbram*32))))
sdp_choices.add((nbram*32, (1, max_address_bits(nbram*32))))
sdp_choices.add((nbram*36, (1, max_address_bits(nbram*36))))
sdp_choices.add((nbram*16, (1, max_address_bits(nbram*16))))
sdp_choices.add((nbram*32, (1, max_address_bits(nbram*32))))
# Bias some wide but shallow BRAMs to toggle the lower address bits
# more.
for address_bits in range(1, 4):
sdp_choices.add((nbram*32, (address_bits, address_bits)))
sdp_choices.add((nbram*16, (address_bits, address_bits)))
sdp_choices = sorted(sdp_choices)