lib: xc7series: enable conversion to/from YAML for frame addresses

Signed-off-by: Rick Altherr <kc8apf@kc8apf.net>
Signed-off-by: Tim 'mithro' Ansell <mithro@mithis.com>

lib/CMakeLists.txt

@@ -9,7 +9,7 @@ add_library(libprjxray
 	xilinx/xc7series/configuration_register.cc
 )
 target_include_directories(libprjxray PUBLIC "include")
-target_link_libraries(libprjxray absl::optional absl::strings absl::span)
+target_link_libraries(libprjxray absl::optional absl::strings absl::span yaml-cpp)
 
 if (PRJXRAY_BUILD_TESTING)
 	add_executable(big_endian_span_test big_endian_span_test.cc)

lib/include/prjxray/xilinx/xc7series/block_type.h

@@ -3,6 +3,8 @@
 
 #include <ostream>
 
+#include <yaml-cpp/yaml.h>
+
 namespace prjxray {
 namespace xilinx {
 namespace xc7series {
@@ -20,4 +22,13 @@ std::ostream &operator<<(std::ostream &o, BlockType value);
 }  // namespace xilinx
 }  // namespace prjxray
 
+namespace YAML {
+template<>
+struct convert<prjxray::xilinx::xc7series::BlockType> {
+	static Node encode(const prjxray::xilinx::xc7series::BlockType &rhs);
+	static bool decode(const Node& node,
+			   prjxray::xilinx::xc7series::BlockType &lhs);
+};
+}  // namespace YAML
+
 #endif  // PRJXRAY_LIB_XILINX_XC7SERIES_BLOCK_TYPE_H_

lib/include/prjxray/xilinx/xc7series/configuration_frame_address.h

@@ -4,6 +4,7 @@
 #include <cstdint>
 
 #include <prjxray/xilinx/xc7series/block_type.h>
+#include <yaml-cpp/yaml.h>
 
 namespace prjxray {
 namespace xilinx {
@@ -14,6 +15,10 @@ class ConfigurationFrameAddress {
 	ConfigurationFrameAddress(uint32_t address)
 		: address_(address) {};
 
+	ConfigurationFrameAddress(
+		BlockType block_type, bool is_bottom_half_rows,
+		uint8_t row, uint16_t column, uint8_t minor);
+
 	operator uint32_t() const { return address_; }
 
 	BlockType block_type() const;
@@ -30,4 +35,12 @@ class ConfigurationFrameAddress {
 }  // namespace xilinx
 }  // namespace prjxray
 
+namespace YAML {
+template<>
+struct convert<prjxray::xilinx::xc7series::ConfigurationFrameAddress> {
+	static Node encode(const prjxray::xilinx::xc7series::ConfigurationFrameAddress &rhs);
+	static bool decode(const Node& node,
+			   prjxray::xilinx::xc7series::ConfigurationFrameAddress &lhs);
+};
+} // namespace YAML
 #endif  // PRJXRAY_LIB_XILINX_XC7SERIES_CONFIGURATION_FRAME_ADDRESS_H_

lib/xilinx/xc7series/block_type.cc

@@ -23,3 +23,39 @@ std::ostream &operator<<(std::ostream &o, BlockType value) {
 }  // namespace xc7series
 }  // namespace xilinx
 }  // namespace prjxray
+
+namespace YAML {
+
+Node convert<prjxray::xilinx::xc7series::BlockType>::encode(
+		const prjxray::xilinx::xc7series::BlockType &rhs) {
+	switch (rhs) {
+		case prjxray::xilinx::xc7series::BlockType::CLB_IO_CLK:
+			return Node("CLB_IO_CLK");
+		case prjxray::xilinx::xc7series::BlockType::BLOCK_RAM:
+			return Node("BLOCK_RAM");
+		case prjxray::xilinx::xc7series::BlockType::CFG_CLB:
+			return Node("CFG_CLB");
+		default:
+			return Node(static_cast<unsigned int>(rhs));
+	}
+}
+
+bool YAML::convert<prjxray::xilinx::xc7series::BlockType>::decode(
+		const Node &node, prjxray::xilinx::xc7series::BlockType &lhs) {
+	auto type_str = node.as<std::string>();
+
+	if (type_str == "CLB_IO_CLK") {
+		lhs = prjxray::xilinx::xc7series::BlockType::CLB_IO_CLK;
+		return true;
+	} else if (type_str == "BLOCK_RAM") {
+		lhs = prjxray::xilinx::xc7series::BlockType::BLOCK_RAM;
+		return true;
+	} else if (type_str == "CFG_CLB") {
+		lhs = prjxray::xilinx::xc7series::BlockType::CFG_CLB;
+		return true;
+	} else {
+		return false;
+	}
+}
+
+}  // namespace YAML;

lib/xilinx/xc7series/configuration_frame_address.cc

@@ -6,6 +6,17 @@ namespace prjxray {
 namespace xilinx {
 namespace xc7series {
 
+
+ConfigurationFrameAddress::ConfigurationFrameAddress(
+	BlockType block_type, bool is_bottom_half_rows,
+	uint8_t row, uint16_t column, uint8_t minor) {
+	address_ = bit_field_set(0, 25, 23, block_type);
+	address_ = bit_field_set(address_, 22, 22, is_bottom_half_rows);
+	address_ = bit_field_set(address_, 21, 17, row);
+	address_ = bit_field_set(address_, 16, 7, column);
+	address_ = bit_field_set(address_, 6, 0, minor);
+}
+
 BlockType ConfigurationFrameAddress::block_type() const {
 	return static_cast<BlockType>(bit_field_get(address_, 25, 23));
 }
@@ -29,3 +40,37 @@ uint8_t ConfigurationFrameAddress::minor_address() const {
 }  // namespace xc7series
 }  // namespace xilinx
 }  // namespace prjxray
+
+namespace YAML {
+
+Node convert<prjxray::xilinx::xc7series::ConfigurationFrameAddress>::encode(
+		const prjxray::xilinx::xc7series::ConfigurationFrameAddress &rhs) {
+	Node node;
+	node.SetTag("xilinx/xc7series/configuration_frame_address");
+	node["block_type"] = rhs.block_type();
+	node["row_half"] = (rhs.is_bottom_half_rows() ? "bottom" : "top");
+	node["row"] = static_cast<unsigned int>(rhs.row_address());
+	node["column"] = static_cast<unsigned int>(rhs.column_address());
+	node["minor"] = static_cast<unsigned int>(rhs.minor_address());
+	return node;
+}
+
+bool convert<prjxray::xilinx::xc7series::ConfigurationFrameAddress>::decode(
+		const Node &node, prjxray::xilinx::xc7series::ConfigurationFrameAddress &lhs) {
+	if (node.Tag() != "xilinx/xc7series/configuration_frame_address" ||
+	    !node["block_type"] ||
+	    !node["row_half"] ||
+	    !node["row"] ||
+	    !node["column"] ||
+	    !node["minor"]) return false;
+
+	lhs = prjxray::xilinx::xc7series::ConfigurationFrameAddress(
+			node["block_type"].as<prjxray::xilinx::xc7series::BlockType>(),
+			node["row_half"].as<bool>(),
+			node["row"].as<uint8_t>(),
+			node["column"].as<uint32_t>(),
+			node["minor"].as<uint32_t>());
+	return true;
+}
+
+}  // namespace YAML;