mirror of https://github.com/openXC7/prjxray.git
lib: xc7series: implement builder pattern for generating COR0 values
Signed-off-by: Rick Altherr <kc8apf@kc8apf.net>
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#ifndef PRJXRAY_LIB_XILINX_XC7SERIES_CONFIGURATION_OPTIONS_0_VALUE_H
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#define PRJXRAY_LIB_XILINX_XC7SERIES_CONFIGURATION_OPTIONS_0_VALUE_H
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#include <prjxray/bit_ops.h>
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#include <prjxray/xilinx/xc7series/configuration_packet.h>
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#include <prjxray/xilinx/xc7series/configuration_register.h>
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namespace prjxray {
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namespace xilinx {
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namespace xc7series {
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class ConfigurationOptions0Value {
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public:
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enum class StartupClockSource : uint32_t {
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CCLK = 0x0,
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User = 0x1,
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JTAG = 0x2,
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};
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enum class SignalReleaseCycle : uint32_t {
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Phase1 = 0x0,
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Phase2 = 0x1,
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Phase3 = 0x2,
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Phase4 = 0x3,
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Phase5 = 0x4,
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Phase6 = 0x5,
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TrackDone = 0x6,
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Keep = 0x7,
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};
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enum class StallCycle : uint32_t {
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Phase0 = 0x0,
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Phase1 = 0x1,
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Phase2 = 0x2,
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Phase3 = 0x3,
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Phase4 = 0x4,
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Phase5 = 0x5,
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Phase6 = 0x6,
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NoWait = 0x7,
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};
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ConfigurationOptions0Value() : value_(0) {}
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operator uint32_t() const { return value_; }
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ConfigurationOptions0Value& SetUseDonePinAsPowerdownStatus(
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bool enabled) {
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value_ = bit_field_set(value_, 27, 27, enabled ? 1 : 0);
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return *this;
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}
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ConfigurationOptions0Value& SetAddPipelineStageForDoneIn(bool enabled) {
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value_ = bit_field_set(value_, 25, 25, enabled ? 1 : 0);
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return *this;
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}
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ConfigurationOptions0Value& SetDriveDoneHigh(bool enabled) {
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value_ = bit_field_set(value_, 24, 24, enabled);
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return *this;
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}
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ConfigurationOptions0Value& SetReadbackIsSingleShot(bool enabled) {
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value_ = bit_field_set(value_, 23, 23, enabled);
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return *this;
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}
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ConfigurationOptions0Value& SetCclkFrequency(uint32_t mhz) {
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value_ = bit_field_set(value_, 22, 17, mhz);
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return *this;
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}
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ConfigurationOptions0Value& SetStartupClockSource(
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StartupClockSource source) {
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value_ = bit_field_set(value_, 16, 15,
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static_cast<uint32_t>(source));
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return *this;
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}
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ConfigurationOptions0Value& SetReleaseDonePinAtStartupCycle(
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SignalReleaseCycle cycle) {
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value_ =
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bit_field_set(value_, 14, 12, static_cast<uint32_t>(cycle));
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return *this;
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}
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ConfigurationOptions0Value& SetStallAtStartupCycleUntilDciMatch(
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StallCycle cycle) {
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value_ =
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bit_field_set(value_, 11, 9, static_cast<uint32_t>(cycle));
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return *this;
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};
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ConfigurationOptions0Value& SetStallAtStartupCycleUntilMmcmLock(
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StallCycle cycle) {
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value_ =
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bit_field_set(value_, 8, 6, static_cast<uint32_t>(cycle));
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return *this;
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};
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ConfigurationOptions0Value& SetReleaseGtsSignalAtStartupCycle(
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SignalReleaseCycle cycle) {
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value_ =
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bit_field_set(value_, 5, 3, static_cast<uint32_t>(cycle));
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return *this;
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}
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ConfigurationOptions0Value& SetReleaseGweSignalAtStartupCycle(
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SignalReleaseCycle cycle) {
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value_ =
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bit_field_set(value_, 2, 0, static_cast<uint32_t>(cycle));
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return *this;
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}
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private:
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uint32_t value_;
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}; // namespace xc7series
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} // namespace xc7series
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} // namespace xilinx
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} // namespace prjxray
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#endif // PRJXRAY_LIB_XILINX_XC7SERIES_CONFIGURATION_OPTIONS_0_VALUE_H
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