timfuz: handle passthrough lut bel_pin

Signed-off-by: John McMaster <johndmcmaster@gmail.com>
This commit is contained in:
John McMaster 2018-10-08 11:12:50 -07:00
parent dd88616a88
commit 0d8c5aaa29
2 changed files with 18 additions and 1 deletions

View File

@ -139,6 +139,8 @@ proc write_info4 {} {
set dst_cell_pin [get_pins $dst_cell_pin_str]
set dst_cell [get_cells -of_objects $dst_cell_pin]
set dst_bel [get_bels -of_objects $dst_cell]
# WARNING: when there is a passthrough LUT, this can be multiple values
# (one for the real dest pin, and one for the passthrough lut input)
set dst_bel_pin [get_bel_pins -of_objects $dst_cell_pin]
set dst_site [get_sites -of_objects $dst_bel]
set dst_site_type [get_property SITE_TYPE $dst_site]

View File

@ -68,6 +68,21 @@ def gen_timing4(fn, speed_i2s):
assert len(parts) == ncols, "Expected %u parts, got %u" % (
ncols, len(parts))
_lintype, net, src_site, src_site_type, src_site_pin, src_bel, src_bel_pin, dst_site, dst_site_type, dst_site_pin, dst_bel, dst_bel_pin, ico, fast_max, fast_min, slow_max, slow_min, pips, wires = parts
def filt_passthru_lut(bel_pins):
'''
Ex: SLICE_X11Y110/A6LUT/A6 SLICE_X11Y110/AFF/D
'''
parts = bel_pins.split()
if len(parts) == 1:
return parts[0]
else:
assert len(parts) == 2
# the LUT shoudl always go first?
bel_pin_lut, bel_pin_dst = parts
assert '6LUT' in bel_pin_lut
return bel_pin_dst
return {
'net': net,
'src': {
@ -82,7 +97,7 @@ def gen_timing4(fn, speed_i2s):
'site_type': dst_site_type,
'site_pin': dst_site_pin,
'bel': dst_bel,
'bel_pin': dst_bel_pin,
'bel_pin': filt_passthru_lut(dst_bel_pin),
},
't': {
# ps