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artix7: add ILOGIC IFF.DDR_CLK_EDGE.SAME_EDGE_PIPELINED and IFFDELMUXE3.P1 

Materialisation of the fuzzer tag-group fix f4pga/prjxray#2570 (three
groups under-declared in 035-iob-ilogic; diagnosis by gHashTag): the
four ILOGIC tags whose encoding is all-bits-clear solved to nothing
because dbfixup's group_tags had no group to derive the zero-sides
from. Added per IOI3 variant, segbits + origin_info; masks unchanged:

  ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE_PIPELINED !26_99 !27_98
  ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE_PIPELINED !26_29 !27_28
  ILOGIC_Y0.IFFDELMUXE3.P1 !28_116
  ILOGIC_Y1.IFFDELMUXE3.P1 !29_11

Provenance: fuzzer 035-iob-ilogic re-run with the #2570 groups on
xc7a100tfgg676-1, Vivado ML 2026.1, N=30 specimens, standard
publication pipeline (pushdb, parsedb --strict, sort_db). Gate: the
stock fuzzer under the same environment first regenerated the
committed DDR_CLK_EDGE.{OPPOSITE,SAME}_EDGE and IFFDELMUXE3.P0 lines
byte-identical. Control: the raw segmatch output of the extended run
is byte-identical to the stock run's — tag_groups.txt was the only
variable in the experiment.

This repository is the revision nextpnr-xilinx's submodule records, so
these rows land here first; the same change is filed against
f4pga/prjxray-db as the archival copy. Unblocks the
SAME_EDGE_PIPELINED / IFFDELMUXE3.P1 emission classes
(openXC7/nextpnr-xilinx#114, #65). IDELMUXE3.P2/IFFDELMUXE3.P2 stay
open on purpose: no fuzzer specimen ever selects P2, so they need
top.py/generate.py coverage, not tag grouping.
This commit is contained in:
Carlos Venegas Arrabé 2026-08-13 19:41:00 +02:00
parent 399a099bb9
commit ef46e80c55
No known key found for this signature in database
GPG Key ID: EC73A5348B584C4C
12 changed files with 48 additions and 0 deletions
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4
artix7/segbits_lioi3.db
View File

@ -44,6 +44,7 @@ LIOI3.ILOGIC_Y0.IDDR.IN_USE 26_71 26_121 27_70
LIOI3.ILOGIC_Y0.IDDR_OR_ISERDES.IN_USE 26_71 27_70
LIOI3.ILOGIC_Y0.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE !26_99 27_98
LIOI3.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE 26_99 !27_98
LIOI3.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE_PIPELINED !26_99 !27_98
LIOI3.ILOGIC_Y0.IFF.INV_OCLK 28_124
LIOI3.ILOGIC_Y0.IFF.SRTYPE.ASYNC !29_67
LIOI3.ILOGIC_Y0.IFF.SRTYPE.SYNC 29_67
@ -85,10 +86,12 @@ LIOI3.ILOGIC_Y0.ZINV_D 29_109
LIOI3.ILOGIC_Y0.IDELMUXE3.P0 29_101
LIOI3.ILOGIC_Y0.IDELMUXE3.P1 !29_101
LIOI3.ILOGIC_Y0.IFFDELMUXE3.P0 28_116
LIOI3.ILOGIC_Y0.IFFDELMUXE3.P1 !28_116
LIOI3.ILOGIC_Y1.IDDR.IN_USE 26_57 27_06 27_56
LIOI3.ILOGIC_Y1.IDDR_OR_ISERDES.IN_USE 26_57 27_56
LIOI3.ILOGIC_Y1.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE 26_29 !27_28
LIOI3.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE !26_29 27_28
LIOI3.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE_PIPELINED !26_29 !27_28
LIOI3.ILOGIC_Y1.IFF.INV_OCLK 29_03
LIOI3.ILOGIC_Y1.IFF.SRTYPE.ASYNC !28_60
LIOI3.ILOGIC_Y1.IFF.SRTYPE.SYNC 28_60
@ -130,6 +133,7 @@ LIOI3.ILOGIC_Y1.ZINV_D 28_18
LIOI3.ILOGIC_Y1.IDELMUXE3.P0 28_26
LIOI3.ILOGIC_Y1.IDELMUXE3.P1 !28_26
LIOI3.ILOGIC_Y1.IFFDELMUXE3.P0 29_11
LIOI3.ILOGIC_Y1.IFFDELMUXE3.P1 !29_11
LIOI3.IOI_OCLK_0.IOI_LEAF_GCLK0 28_83 28_95 29_88
LIOI3.IOI_OCLK_0.IOI_LEAF_GCLK1 28_83 28_97 29_88
LIOI3.IOI_OCLK_0.IOI_LEAF_GCLK2 28_83 29_88 29_94

4
artix7/segbits_lioi3.origin_info.db
View File

@ -44,6 +44,7 @@ LIOI3.ILOGIC_Y0.IDDR.IN_USE origin:035b-iob-iserdes 26_121 26_71 27_70
LIOI3.ILOGIC_Y0.IDDR_OR_ISERDES.IN_USE origin:035b-iob-iserdes 26_71 27_70
LIOI3.ILOGIC_Y0.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE origin:035-iob-ilogic !26_99 27_98
LIOI3.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE origin:035-iob-ilogic !27_98 26_99
LIOI3.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE_PIPELINED origin:035-iob-ilogic !26_99 !27_98
LIOI3.ILOGIC_Y0.IFF.INV_OCLK origin:035-iob-ilogic 28_124
LIOI3.ILOGIC_Y0.IFF.SRTYPE.ASYNC origin:035-iob-ilogic !29_67
LIOI3.ILOGIC_Y0.IFF.SRTYPE.SYNC origin:035-iob-ilogic 29_67
@ -85,10 +86,12 @@ LIOI3.ILOGIC_Y0.ZINV_D origin:035-iob-ilogic 29_109
LIOI3.ILOGIC_Y0.IDELMUXE3.P0 origin:035-iob-ilogic 29_101
LIOI3.ILOGIC_Y0.IDELMUXE3.P1 origin:035-iob-ilogic !29_101
LIOI3.ILOGIC_Y0.IFFDELMUXE3.P0 origin:035-iob-ilogic 28_116
LIOI3.ILOGIC_Y0.IFFDELMUXE3.P1 origin:035-iob-ilogic !28_116
LIOI3.ILOGIC_Y1.IDDR.IN_USE origin:035b-iob-iserdes 26_57 27_06 27_56
LIOI3.ILOGIC_Y1.IDDR_OR_ISERDES.IN_USE origin:035b-iob-iserdes 26_57 27_56
LIOI3.ILOGIC_Y1.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE origin:035-iob-ilogic !27_28 26_29
LIOI3.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE origin:035-iob-ilogic !26_29 27_28
LIOI3.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE_PIPELINED origin:035-iob-ilogic !26_29 !27_28
LIOI3.ILOGIC_Y1.IFF.INV_OCLK origin:035-iob-ilogic 29_03
LIOI3.ILOGIC_Y1.IFF.SRTYPE.ASYNC origin:035-iob-ilogic !28_60
LIOI3.ILOGIC_Y1.IFF.SRTYPE.SYNC origin:035-iob-ilogic 28_60
@ -130,6 +133,7 @@ LIOI3.ILOGIC_Y1.ZINV_D origin:035-iob-ilogic 28_18
LIOI3.ILOGIC_Y1.IDELMUXE3.P0 origin:035-iob-ilogic 28_26
LIOI3.ILOGIC_Y1.IDELMUXE3.P1 origin:035-iob-ilogic !28_26
LIOI3.ILOGIC_Y1.IFFDELMUXE3.P0 origin:035-iob-ilogic 29_11
LIOI3.ILOGIC_Y1.IFFDELMUXE3.P1 origin:035-iob-ilogic !29_11
LIOI3.IOI_OCLK_0.IOI_LEAF_GCLK0 origin:037-iob-pips 28_83 28_95 29_88
LIOI3.IOI_OCLK_0.IOI_LEAF_GCLK1 origin:037-iob-pips 28_83 28_97 29_88
LIOI3.IOI_OCLK_0.IOI_LEAF_GCLK2 origin:037-iob-pips 28_83 29_88 29_94

4
artix7/segbits_lioi3_tbytesrc.db
View File

@ -44,6 +44,7 @@ LIOI3_TBYTESRC.ILOGIC_Y0.IDDR.IN_USE 26_71 26_121 27_70
LIOI3_TBYTESRC.ILOGIC_Y0.IDDR_OR_ISERDES.IN_USE 26_71 27_70
LIOI3_TBYTESRC.ILOGIC_Y0.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE !26_99 27_98
LIOI3_TBYTESRC.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE 26_99 !27_98
LIOI3_TBYTESRC.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE_PIPELINED !26_99 !27_98
LIOI3_TBYTESRC.ILOGIC_Y0.IFF.INV_OCLK 28_124
LIOI3_TBYTESRC.ILOGIC_Y0.IFF.SRTYPE.ASYNC !29_67
LIOI3_TBYTESRC.ILOGIC_Y0.IFF.SRTYPE.SYNC 29_67
@ -85,10 +86,12 @@ LIOI3_TBYTESRC.ILOGIC_Y0.ZINV_D 29_109
LIOI3_TBYTESRC.ILOGIC_Y0.IDELMUXE3.P0 29_101
LIOI3_TBYTESRC.ILOGIC_Y0.IDELMUXE3.P1 !29_101
LIOI3_TBYTESRC.ILOGIC_Y0.IFFDELMUXE3.P0 28_116
LIOI3_TBYTESRC.ILOGIC_Y0.IFFDELMUXE3.P1 !28_116
LIOI3_TBYTESRC.ILOGIC_Y1.IDDR.IN_USE 26_57 27_06 27_56
LIOI3_TBYTESRC.ILOGIC_Y1.IDDR_OR_ISERDES.IN_USE 26_57 27_56
LIOI3_TBYTESRC.ILOGIC_Y1.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE 26_29 !27_28
LIOI3_TBYTESRC.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE !26_29 27_28
LIOI3_TBYTESRC.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE_PIPELINED !26_29 !27_28
LIOI3_TBYTESRC.ILOGIC_Y1.IFF.INV_OCLK 29_03
LIOI3_TBYTESRC.ILOGIC_Y1.IFF.SRTYPE.ASYNC !28_60
LIOI3_TBYTESRC.ILOGIC_Y1.IFF.SRTYPE.SYNC 28_60
@ -130,6 +133,7 @@ LIOI3_TBYTESRC.ILOGIC_Y1.ZINV_D 28_18
LIOI3_TBYTESRC.ILOGIC_Y1.IDELMUXE3.P0 28_26
LIOI3_TBYTESRC.ILOGIC_Y1.IDELMUXE3.P1 !28_26
LIOI3_TBYTESRC.ILOGIC_Y1.IFFDELMUXE3.P0 29_11
LIOI3_TBYTESRC.ILOGIC_Y1.IFFDELMUXE3.P1 !29_11
LIOI3_TBYTESRC.IOI_OCLK_0.IOI_LEAF_GCLK0 28_83 28_95 29_88
LIOI3_TBYTESRC.IOI_OCLK_0.IOI_LEAF_GCLK1 28_83 28_97 29_88
LIOI3_TBYTESRC.IOI_OCLK_0.IOI_LEAF_GCLK2 28_83 29_88 29_94

4
artix7/segbits_lioi3_tbytesrc.origin_info.db
View File

@ -44,6 +44,7 @@ LIOI3_TBYTESRC.ILOGIC_Y0.IDDR.IN_USE origin:035b-iob-iserdes 26_121 26_71 27_70
LIOI3_TBYTESRC.ILOGIC_Y0.IDDR_OR_ISERDES.IN_USE origin:035b-iob-iserdes 26_71 27_70
LIOI3_TBYTESRC.ILOGIC_Y0.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE origin:035-iob-ilogic !26_99 27_98
LIOI3_TBYTESRC.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE origin:035-iob-ilogic !27_98 26_99
LIOI3_TBYTESRC.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE_PIPELINED origin:035-iob-ilogic !26_99 !27_98
LIOI3_TBYTESRC.ILOGIC_Y0.IFF.INV_OCLK origin:035-iob-ilogic 28_124
LIOI3_TBYTESRC.ILOGIC_Y0.IFF.SRTYPE.ASYNC origin:035-iob-ilogic !29_67
LIOI3_TBYTESRC.ILOGIC_Y0.IFF.SRTYPE.SYNC origin:035-iob-ilogic 29_67
@ -85,10 +86,12 @@ LIOI3_TBYTESRC.ILOGIC_Y0.ZINV_D origin:035-iob-ilogic 29_109
LIOI3_TBYTESRC.ILOGIC_Y0.IDELMUXE3.P0 origin:035-iob-ilogic 29_101
LIOI3_TBYTESRC.ILOGIC_Y0.IDELMUXE3.P1 origin:035-iob-ilogic !29_101
LIOI3_TBYTESRC.ILOGIC_Y0.IFFDELMUXE3.P0 origin:035-iob-ilogic 28_116
LIOI3_TBYTESRC.ILOGIC_Y0.IFFDELMUXE3.P1 origin:035-iob-ilogic !28_116
LIOI3_TBYTESRC.ILOGIC_Y1.IDDR.IN_USE origin:035b-iob-iserdes 26_57 27_06 27_56
LIOI3_TBYTESRC.ILOGIC_Y1.IDDR_OR_ISERDES.IN_USE origin:035b-iob-iserdes 26_57 27_56
LIOI3_TBYTESRC.ILOGIC_Y1.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE origin:035-iob-ilogic !27_28 26_29
LIOI3_TBYTESRC.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE origin:035-iob-ilogic !26_29 27_28
LIOI3_TBYTESRC.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE_PIPELINED origin:035-iob-ilogic !26_29 !27_28
LIOI3_TBYTESRC.ILOGIC_Y1.IFF.INV_OCLK origin:035-iob-ilogic 29_03
LIOI3_TBYTESRC.ILOGIC_Y1.IFF.SRTYPE.ASYNC origin:035-iob-ilogic !28_60
LIOI3_TBYTESRC.ILOGIC_Y1.IFF.SRTYPE.SYNC origin:035-iob-ilogic 28_60
@ -130,6 +133,7 @@ LIOI3_TBYTESRC.ILOGIC_Y1.ZINV_D origin:035-iob-ilogic 28_18
LIOI3_TBYTESRC.ILOGIC_Y1.IDELMUXE3.P0 origin:035-iob-ilogic 28_26
LIOI3_TBYTESRC.ILOGIC_Y1.IDELMUXE3.P1 origin:035-iob-ilogic !28_26
LIOI3_TBYTESRC.ILOGIC_Y1.IFFDELMUXE3.P0 origin:035-iob-ilogic 29_11
LIOI3_TBYTESRC.ILOGIC_Y1.IFFDELMUXE3.P1 origin:035-iob-ilogic !29_11
LIOI3_TBYTESRC.IOI_OCLK_0.IOI_LEAF_GCLK0 origin:037-iob-pips 28_83 28_95 29_88
LIOI3_TBYTESRC.IOI_OCLK_0.IOI_LEAF_GCLK1 origin:037-iob-pips 28_83 28_97 29_88
LIOI3_TBYTESRC.IOI_OCLK_0.IOI_LEAF_GCLK2 origin:037-iob-pips 28_83 29_88 29_94

4
artix7/segbits_lioi3_tbyteterm.db
View File

@ -44,6 +44,7 @@ LIOI3_TBYTETERM.ILOGIC_Y0.IDDR.IN_USE 26_71 26_121 27_70
LIOI3_TBYTETERM.ILOGIC_Y0.IDDR_OR_ISERDES.IN_USE 26_71 27_70
LIOI3_TBYTETERM.ILOGIC_Y0.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE !26_99 27_98
LIOI3_TBYTETERM.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE 26_99 !27_98
LIOI3_TBYTETERM.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE_PIPELINED !26_99 !27_98
LIOI3_TBYTETERM.ILOGIC_Y0.IFF.INV_OCLK 28_124
LIOI3_TBYTETERM.ILOGIC_Y0.IFF.SRTYPE.ASYNC !29_67
LIOI3_TBYTETERM.ILOGIC_Y0.IFF.SRTYPE.SYNC 29_67
@ -85,10 +86,12 @@ LIOI3_TBYTETERM.ILOGIC_Y0.ZINV_D 29_109
LIOI3_TBYTETERM.ILOGIC_Y0.IDELMUXE3.P0 29_101
LIOI3_TBYTETERM.ILOGIC_Y0.IDELMUXE3.P1 !29_101
LIOI3_TBYTETERM.ILOGIC_Y0.IFFDELMUXE3.P0 28_116
LIOI3_TBYTETERM.ILOGIC_Y0.IFFDELMUXE3.P1 !28_116
LIOI3_TBYTETERM.ILOGIC_Y1.IDDR.IN_USE 26_57 27_06 27_56
LIOI3_TBYTETERM.ILOGIC_Y1.IDDR_OR_ISERDES.IN_USE 26_57 27_56
LIOI3_TBYTETERM.ILOGIC_Y1.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE 26_29 !27_28
LIOI3_TBYTETERM.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE !26_29 27_28
LIOI3_TBYTETERM.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE_PIPELINED !26_29 !27_28
LIOI3_TBYTETERM.ILOGIC_Y1.IFF.INV_OCLK 29_03
LIOI3_TBYTETERM.ILOGIC_Y1.IFF.SRTYPE.ASYNC !28_60
LIOI3_TBYTETERM.ILOGIC_Y1.IFF.SRTYPE.SYNC 28_60
@ -130,6 +133,7 @@ LIOI3_TBYTETERM.ILOGIC_Y1.ZINV_D 28_18
LIOI3_TBYTETERM.ILOGIC_Y1.IDELMUXE3.P0 28_26
LIOI3_TBYTETERM.ILOGIC_Y1.IDELMUXE3.P1 !28_26
LIOI3_TBYTETERM.ILOGIC_Y1.IFFDELMUXE3.P0 29_11
LIOI3_TBYTETERM.ILOGIC_Y1.IFFDELMUXE3.P1 !29_11
LIOI3_TBYTETERM.IOI_OCLK_0.IOI_LEAF_GCLK0 28_83 28_95 29_88
LIOI3_TBYTETERM.IOI_OCLK_0.IOI_LEAF_GCLK1 28_83 28_97 29_88
LIOI3_TBYTETERM.IOI_OCLK_0.IOI_LEAF_GCLK2 28_83 29_88 29_94

4
artix7/segbits_lioi3_tbyteterm.origin_info.db
View File

@ -44,6 +44,7 @@ LIOI3_TBYTETERM.ILOGIC_Y0.IDDR.IN_USE origin:035b-iob-iserdes 26_121 26_71 27_70
LIOI3_TBYTETERM.ILOGIC_Y0.IDDR_OR_ISERDES.IN_USE origin:035b-iob-iserdes 26_71 27_70
LIOI3_TBYTETERM.ILOGIC_Y0.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE origin:035-iob-ilogic !26_99 27_98
LIOI3_TBYTETERM.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE origin:035-iob-ilogic !27_98 26_99
LIOI3_TBYTETERM.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE_PIPELINED origin:035-iob-ilogic !26_99 !27_98
LIOI3_TBYTETERM.ILOGIC_Y0.IFF.INV_OCLK origin:035-iob-ilogic 28_124
LIOI3_TBYTETERM.ILOGIC_Y0.IFF.SRTYPE.ASYNC origin:035-iob-ilogic !29_67
LIOI3_TBYTETERM.ILOGIC_Y0.IFF.SRTYPE.SYNC origin:035-iob-ilogic 29_67
@ -85,10 +86,12 @@ LIOI3_TBYTETERM.ILOGIC_Y0.ZINV_D origin:035-iob-ilogic 29_109
LIOI3_TBYTETERM.ILOGIC_Y0.IDELMUXE3.P0 origin:035-iob-ilogic 29_101
LIOI3_TBYTETERM.ILOGIC_Y0.IDELMUXE3.P1 origin:035-iob-ilogic !29_101
LIOI3_TBYTETERM.ILOGIC_Y0.IFFDELMUXE3.P0 origin:035-iob-ilogic 28_116
LIOI3_TBYTETERM.ILOGIC_Y0.IFFDELMUXE3.P1 origin:035-iob-ilogic !28_116
LIOI3_TBYTETERM.ILOGIC_Y1.IDDR.IN_USE origin:035b-iob-iserdes 26_57 27_06 27_56
LIOI3_TBYTETERM.ILOGIC_Y1.IDDR_OR_ISERDES.IN_USE origin:035b-iob-iserdes 26_57 27_56
LIOI3_TBYTETERM.ILOGIC_Y1.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE origin:035-iob-ilogic !27_28 26_29
LIOI3_TBYTETERM.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE origin:035-iob-ilogic !26_29 27_28
LIOI3_TBYTETERM.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE_PIPELINED origin:035-iob-ilogic !26_29 !27_28
LIOI3_TBYTETERM.ILOGIC_Y1.IFF.INV_OCLK origin:035-iob-ilogic 29_03
LIOI3_TBYTETERM.ILOGIC_Y1.IFF.SRTYPE.ASYNC origin:035-iob-ilogic !28_60
LIOI3_TBYTETERM.ILOGIC_Y1.IFF.SRTYPE.SYNC origin:035-iob-ilogic 28_60
@ -130,6 +133,7 @@ LIOI3_TBYTETERM.ILOGIC_Y1.ZINV_D origin:035-iob-ilogic 28_18
LIOI3_TBYTETERM.ILOGIC_Y1.IDELMUXE3.P0 origin:035-iob-ilogic 28_26
LIOI3_TBYTETERM.ILOGIC_Y1.IDELMUXE3.P1 origin:035-iob-ilogic !28_26
LIOI3_TBYTETERM.ILOGIC_Y1.IFFDELMUXE3.P0 origin:035-iob-ilogic 29_11
LIOI3_TBYTETERM.ILOGIC_Y1.IFFDELMUXE3.P1 origin:035-iob-ilogic !29_11
LIOI3_TBYTETERM.IOI_OCLK_0.IOI_LEAF_GCLK0 origin:037-iob-pips 28_83 28_95 29_88
LIOI3_TBYTETERM.IOI_OCLK_0.IOI_LEAF_GCLK1 origin:037-iob-pips 28_83 28_97 29_88
LIOI3_TBYTETERM.IOI_OCLK_0.IOI_LEAF_GCLK2 origin:037-iob-pips 28_83 29_88 29_94

4
artix7/segbits_rioi3.db
View File

@ -44,6 +44,7 @@ RIOI3.ILOGIC_Y0.IDDR.IN_USE 26_71 26_121 27_70
RIOI3.ILOGIC_Y0.IDDR_OR_ISERDES.IN_USE 26_71 27_70
RIOI3.ILOGIC_Y0.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE !26_99 27_98
RIOI3.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE 26_99 !27_98
RIOI3.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE_PIPELINED !26_99 !27_98
RIOI3.ILOGIC_Y0.IFF.INV_OCLK 28_124
RIOI3.ILOGIC_Y0.IFF.SRTYPE.ASYNC !29_67
RIOI3.ILOGIC_Y0.IFF.SRTYPE.SYNC 29_67
@ -85,10 +86,12 @@ RIOI3.ILOGIC_Y0.ZINV_D 29_109
RIOI3.ILOGIC_Y0.IDELMUXE3.P0 29_101
RIOI3.ILOGIC_Y0.IDELMUXE3.P1 !29_101
RIOI3.ILOGIC_Y0.IFFDELMUXE3.P0 28_116
RIOI3.ILOGIC_Y0.IFFDELMUXE3.P1 !28_116
RIOI3.ILOGIC_Y1.IDDR.IN_USE 26_57 27_06 27_56
RIOI3.ILOGIC_Y1.IDDR_OR_ISERDES.IN_USE 26_57 27_56
RIOI3.ILOGIC_Y1.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE 26_29 !27_28
RIOI3.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE !26_29 27_28
RIOI3.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE_PIPELINED !26_29 !27_28
RIOI3.ILOGIC_Y1.IFF.INV_OCLK 29_03
RIOI3.ILOGIC_Y1.IFF.SRTYPE.ASYNC !28_60
RIOI3.ILOGIC_Y1.IFF.SRTYPE.SYNC 28_60
@ -130,6 +133,7 @@ RIOI3.ILOGIC_Y1.ZINV_D 28_18
RIOI3.ILOGIC_Y1.IDELMUXE3.P0 28_26
RIOI3.ILOGIC_Y1.IDELMUXE3.P1 !28_26
RIOI3.ILOGIC_Y1.IFFDELMUXE3.P0 29_11
RIOI3.ILOGIC_Y1.IFFDELMUXE3.P1 !29_11
RIOI3.IOI_OCLK_0.IOI_LEAF_GCLK0 28_83 28_95 29_88
RIOI3.IOI_OCLK_0.IOI_LEAF_GCLK1 28_83 28_97 29_88
RIOI3.IOI_OCLK_0.IOI_LEAF_GCLK2 28_83 29_88 29_94

4
artix7/segbits_rioi3.origin_info.db
View File

@ -44,6 +44,7 @@ RIOI3.ILOGIC_Y0.IDDR.IN_USE origin:035b-iob-iserdes 26_121 26_71 27_70
RIOI3.ILOGIC_Y0.IDDR_OR_ISERDES.IN_USE origin:035b-iob-iserdes 26_71 27_70
RIOI3.ILOGIC_Y0.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE origin:035-iob-ilogic !26_99 27_98
RIOI3.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE origin:035-iob-ilogic !27_98 26_99
RIOI3.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE_PIPELINED origin:035-iob-ilogic !26_99 !27_98
RIOI3.ILOGIC_Y0.IFF.INV_OCLK origin:035-iob-ilogic 28_124
RIOI3.ILOGIC_Y0.IFF.SRTYPE.ASYNC origin:035-iob-ilogic !29_67
RIOI3.ILOGIC_Y0.IFF.SRTYPE.SYNC origin:035-iob-ilogic 29_67
@ -85,10 +86,12 @@ RIOI3.ILOGIC_Y0.ZINV_D origin:035-iob-ilogic 29_109
RIOI3.ILOGIC_Y0.IDELMUXE3.P0 origin:035-iob-ilogic 29_101
RIOI3.ILOGIC_Y0.IDELMUXE3.P1 origin:035-iob-ilogic !29_101
RIOI3.ILOGIC_Y0.IFFDELMUXE3.P0 origin:035-iob-ilogic 28_116
RIOI3.ILOGIC_Y0.IFFDELMUXE3.P1 origin:035-iob-ilogic !28_116
RIOI3.ILOGIC_Y1.IDDR.IN_USE origin:035b-iob-iserdes 26_57 27_06 27_56
RIOI3.ILOGIC_Y1.IDDR_OR_ISERDES.IN_USE origin:035b-iob-iserdes 26_57 27_56
RIOI3.ILOGIC_Y1.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE origin:035-iob-ilogic !27_28 26_29
RIOI3.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE origin:035-iob-ilogic !26_29 27_28
RIOI3.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE_PIPELINED origin:035-iob-ilogic !26_29 !27_28
RIOI3.ILOGIC_Y1.IFF.INV_OCLK origin:035-iob-ilogic 29_03
RIOI3.ILOGIC_Y1.IFF.SRTYPE.ASYNC origin:035-iob-ilogic !28_60
RIOI3.ILOGIC_Y1.IFF.SRTYPE.SYNC origin:035-iob-ilogic 28_60
@ -130,6 +133,7 @@ RIOI3.ILOGIC_Y1.ZINV_D origin:035-iob-ilogic 28_18
RIOI3.ILOGIC_Y1.IDELMUXE3.P0 origin:035-iob-ilogic 28_26
RIOI3.ILOGIC_Y1.IDELMUXE3.P1 origin:035-iob-ilogic !28_26
RIOI3.ILOGIC_Y1.IFFDELMUXE3.P0 origin:035-iob-ilogic 29_11
RIOI3.ILOGIC_Y1.IFFDELMUXE3.P1 origin:035-iob-ilogic !29_11
RIOI3.IOI_OCLK_0.IOI_LEAF_GCLK0 origin:037-iob-pips 28_83 28_95 29_88
RIOI3.IOI_OCLK_0.IOI_LEAF_GCLK1 origin:037-iob-pips 28_83 28_97 29_88
RIOI3.IOI_OCLK_0.IOI_LEAF_GCLK2 origin:037-iob-pips 28_83 29_88 29_94

4
artix7/segbits_rioi3_tbytesrc.db
View File

@ -44,6 +44,7 @@ RIOI3_TBYTESRC.ILOGIC_Y0.IDDR.IN_USE 26_71 26_121 27_70
RIOI3_TBYTESRC.ILOGIC_Y0.IDDR_OR_ISERDES.IN_USE 26_71 27_70
RIOI3_TBYTESRC.ILOGIC_Y0.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE !26_99 27_98
RIOI3_TBYTESRC.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE 26_99 !27_98
RIOI3_TBYTESRC.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE_PIPELINED !26_99 !27_98
RIOI3_TBYTESRC.ILOGIC_Y0.IFF.INV_OCLK 28_124
RIOI3_TBYTESRC.ILOGIC_Y0.IFF.SRTYPE.ASYNC !29_67
RIOI3_TBYTESRC.ILOGIC_Y0.IFF.SRTYPE.SYNC 29_67
@ -85,10 +86,12 @@ RIOI3_TBYTESRC.ILOGIC_Y0.ZINV_D 29_109
RIOI3_TBYTESRC.ILOGIC_Y0.IDELMUXE3.P0 29_101
RIOI3_TBYTESRC.ILOGIC_Y0.IDELMUXE3.P1 !29_101
RIOI3_TBYTESRC.ILOGIC_Y0.IFFDELMUXE3.P0 28_116
RIOI3_TBYTESRC.ILOGIC_Y0.IFFDELMUXE3.P1 !28_116
RIOI3_TBYTESRC.ILOGIC_Y1.IDDR.IN_USE 26_57 27_06 27_56
RIOI3_TBYTESRC.ILOGIC_Y1.IDDR_OR_ISERDES.IN_USE 26_57 27_56
RIOI3_TBYTESRC.ILOGIC_Y1.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE 26_29 !27_28
RIOI3_TBYTESRC.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE !26_29 27_28
RIOI3_TBYTESRC.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE_PIPELINED !26_29 !27_28
RIOI3_TBYTESRC.ILOGIC_Y1.IFF.INV_OCLK 29_03
RIOI3_TBYTESRC.ILOGIC_Y1.IFF.SRTYPE.ASYNC !28_60
RIOI3_TBYTESRC.ILOGIC_Y1.IFF.SRTYPE.SYNC 28_60
@ -130,6 +133,7 @@ RIOI3_TBYTESRC.ILOGIC_Y1.ZINV_D 28_18
RIOI3_TBYTESRC.ILOGIC_Y1.IDELMUXE3.P0 28_26
RIOI3_TBYTESRC.ILOGIC_Y1.IDELMUXE3.P1 !28_26
RIOI3_TBYTESRC.ILOGIC_Y1.IFFDELMUXE3.P0 29_11
RIOI3_TBYTESRC.ILOGIC_Y1.IFFDELMUXE3.P1 !29_11
RIOI3_TBYTESRC.IOI_OCLK_0.IOI_LEAF_GCLK0 28_83 28_95 29_88
RIOI3_TBYTESRC.IOI_OCLK_0.IOI_LEAF_GCLK1 28_83 28_97 29_88
RIOI3_TBYTESRC.IOI_OCLK_0.IOI_LEAF_GCLK2 28_83 29_88 29_94

4
artix7/segbits_rioi3_tbytesrc.origin_info.db
View File

@ -44,6 +44,7 @@ RIOI3_TBYTESRC.ILOGIC_Y0.IDDR.IN_USE origin:035b-iob-iserdes 26_121 26_71 27_70
RIOI3_TBYTESRC.ILOGIC_Y0.IDDR_OR_ISERDES.IN_USE origin:035b-iob-iserdes 26_71 27_70
RIOI3_TBYTESRC.ILOGIC_Y0.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE origin:035-iob-ilogic !26_99 27_98
RIOI3_TBYTESRC.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE origin:035-iob-ilogic !27_98 26_99
RIOI3_TBYTESRC.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE_PIPELINED origin:035-iob-ilogic !26_99 !27_98
RIOI3_TBYTESRC.ILOGIC_Y0.IFF.INV_OCLK origin:035-iob-ilogic 28_124
RIOI3_TBYTESRC.ILOGIC_Y0.IFF.SRTYPE.ASYNC origin:035-iob-ilogic !29_67
RIOI3_TBYTESRC.ILOGIC_Y0.IFF.SRTYPE.SYNC origin:035-iob-ilogic 29_67
@ -85,10 +86,12 @@ RIOI3_TBYTESRC.ILOGIC_Y0.ZINV_D origin:035-iob-ilogic 29_109
RIOI3_TBYTESRC.ILOGIC_Y0.IDELMUXE3.P0 origin:035-iob-ilogic 29_101
RIOI3_TBYTESRC.ILOGIC_Y0.IDELMUXE3.P1 origin:035-iob-ilogic !29_101
RIOI3_TBYTESRC.ILOGIC_Y0.IFFDELMUXE3.P0 origin:035-iob-ilogic 28_116
RIOI3_TBYTESRC.ILOGIC_Y0.IFFDELMUXE3.P1 origin:035-iob-ilogic !28_116
RIOI3_TBYTESRC.ILOGIC_Y1.IDDR.IN_USE origin:035b-iob-iserdes 26_57 27_06 27_56
RIOI3_TBYTESRC.ILOGIC_Y1.IDDR_OR_ISERDES.IN_USE origin:035b-iob-iserdes 26_57 27_56
RIOI3_TBYTESRC.ILOGIC_Y1.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE origin:035-iob-ilogic !27_28 26_29
RIOI3_TBYTESRC.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE origin:035-iob-ilogic !26_29 27_28
RIOI3_TBYTESRC.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE_PIPELINED origin:035-iob-ilogic !26_29 !27_28
RIOI3_TBYTESRC.ILOGIC_Y1.IFF.INV_OCLK origin:035-iob-ilogic 29_03
RIOI3_TBYTESRC.ILOGIC_Y1.IFF.SRTYPE.ASYNC origin:035-iob-ilogic !28_60
RIOI3_TBYTESRC.ILOGIC_Y1.IFF.SRTYPE.SYNC origin:035-iob-ilogic 28_60
@ -130,6 +133,7 @@ RIOI3_TBYTESRC.ILOGIC_Y1.ZINV_D origin:035-iob-ilogic 28_18
RIOI3_TBYTESRC.ILOGIC_Y1.IDELMUXE3.P0 origin:035-iob-ilogic 28_26
RIOI3_TBYTESRC.ILOGIC_Y1.IDELMUXE3.P1 origin:035-iob-ilogic !28_26
RIOI3_TBYTESRC.ILOGIC_Y1.IFFDELMUXE3.P0 origin:035-iob-ilogic 29_11
RIOI3_TBYTESRC.ILOGIC_Y1.IFFDELMUXE3.P1 origin:035-iob-ilogic !29_11
RIOI3_TBYTESRC.IOI_OCLK_0.IOI_LEAF_GCLK0 origin:037-iob-pips 28_83 28_95 29_88
RIOI3_TBYTESRC.IOI_OCLK_0.IOI_LEAF_GCLK1 origin:037-iob-pips 28_83 28_97 29_88
RIOI3_TBYTESRC.IOI_OCLK_0.IOI_LEAF_GCLK2 origin:037-iob-pips 28_83 29_88 29_94

4
artix7/segbits_rioi3_tbyteterm.db
View File

@ -44,6 +44,7 @@ RIOI3_TBYTETERM.ILOGIC_Y0.IDDR.IN_USE 26_71 26_121 27_70
RIOI3_TBYTETERM.ILOGIC_Y0.IDDR_OR_ISERDES.IN_USE 26_71 27_70
RIOI3_TBYTETERM.ILOGIC_Y0.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE !26_99 27_98
RIOI3_TBYTETERM.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE 26_99 !27_98
RIOI3_TBYTETERM.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE_PIPELINED !26_99 !27_98
RIOI3_TBYTETERM.ILOGIC_Y0.IFF.INV_OCLK 28_124
RIOI3_TBYTETERM.ILOGIC_Y0.IFF.SRTYPE.ASYNC !29_67
RIOI3_TBYTETERM.ILOGIC_Y0.IFF.SRTYPE.SYNC 29_67
@ -85,10 +86,12 @@ RIOI3_TBYTETERM.ILOGIC_Y0.ZINV_D 29_109
RIOI3_TBYTETERM.ILOGIC_Y0.IDELMUXE3.P0 29_101
RIOI3_TBYTETERM.ILOGIC_Y0.IDELMUXE3.P1 !29_101
RIOI3_TBYTETERM.ILOGIC_Y0.IFFDELMUXE3.P0 28_116
RIOI3_TBYTETERM.ILOGIC_Y0.IFFDELMUXE3.P1 !28_116
RIOI3_TBYTETERM.ILOGIC_Y1.IDDR.IN_USE 26_57 27_06 27_56
RIOI3_TBYTETERM.ILOGIC_Y1.IDDR_OR_ISERDES.IN_USE 26_57 27_56
RIOI3_TBYTETERM.ILOGIC_Y1.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE 26_29 !27_28
RIOI3_TBYTETERM.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE !26_29 27_28
RIOI3_TBYTETERM.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE_PIPELINED !26_29 !27_28
RIOI3_TBYTETERM.ILOGIC_Y1.IFF.INV_OCLK 29_03
RIOI3_TBYTETERM.ILOGIC_Y1.IFF.SRTYPE.ASYNC !28_60
RIOI3_TBYTETERM.ILOGIC_Y1.IFF.SRTYPE.SYNC 28_60
@ -130,6 +133,7 @@ RIOI3_TBYTETERM.ILOGIC_Y1.ZINV_D 28_18
RIOI3_TBYTETERM.ILOGIC_Y1.IDELMUXE3.P0 28_26
RIOI3_TBYTETERM.ILOGIC_Y1.IDELMUXE3.P1 !28_26
RIOI3_TBYTETERM.ILOGIC_Y1.IFFDELMUXE3.P0 29_11
RIOI3_TBYTETERM.ILOGIC_Y1.IFFDELMUXE3.P1 !29_11
RIOI3_TBYTETERM.IOI_OCLK_0.IOI_LEAF_GCLK0 28_83 28_95 29_88
RIOI3_TBYTETERM.IOI_OCLK_0.IOI_LEAF_GCLK1 28_83 28_97 29_88
RIOI3_TBYTETERM.IOI_OCLK_0.IOI_LEAF_GCLK2 28_83 29_88 29_94

4
artix7/segbits_rioi3_tbyteterm.origin_info.db
View File

@ -44,6 +44,7 @@ RIOI3_TBYTETERM.ILOGIC_Y0.IDDR.IN_USE origin:035b-iob-iserdes 26_121 26_71 27_70
RIOI3_TBYTETERM.ILOGIC_Y0.IDDR_OR_ISERDES.IN_USE origin:035b-iob-iserdes 26_71 27_70
RIOI3_TBYTETERM.ILOGIC_Y0.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE origin:035-iob-ilogic !26_99 27_98
RIOI3_TBYTETERM.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE origin:035-iob-ilogic !27_98 26_99
RIOI3_TBYTETERM.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE_PIPELINED origin:035-iob-ilogic !26_99 !27_98
RIOI3_TBYTETERM.ILOGIC_Y0.IFF.INV_OCLK origin:035-iob-ilogic 28_124
RIOI3_TBYTETERM.ILOGIC_Y0.IFF.SRTYPE.ASYNC origin:035-iob-ilogic !29_67
RIOI3_TBYTETERM.ILOGIC_Y0.IFF.SRTYPE.SYNC origin:035-iob-ilogic 29_67
@ -85,10 +86,12 @@ RIOI3_TBYTETERM.ILOGIC_Y0.ZINV_D origin:035-iob-ilogic 29_109
RIOI3_TBYTETERM.ILOGIC_Y0.IDELMUXE3.P0 origin:035-iob-ilogic 29_101
RIOI3_TBYTETERM.ILOGIC_Y0.IDELMUXE3.P1 origin:035-iob-ilogic !29_101
RIOI3_TBYTETERM.ILOGIC_Y0.IFFDELMUXE3.P0 origin:035-iob-ilogic 28_116
RIOI3_TBYTETERM.ILOGIC_Y0.IFFDELMUXE3.P1 origin:035-iob-ilogic !28_116
RIOI3_TBYTETERM.ILOGIC_Y1.IDDR.IN_USE origin:035b-iob-iserdes 26_57 27_06 27_56
RIOI3_TBYTETERM.ILOGIC_Y1.IDDR_OR_ISERDES.IN_USE origin:035b-iob-iserdes 26_57 27_56
RIOI3_TBYTETERM.ILOGIC_Y1.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE origin:035-iob-ilogic !27_28 26_29
RIOI3_TBYTETERM.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE origin:035-iob-ilogic !26_29 27_28
RIOI3_TBYTETERM.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE_PIPELINED origin:035-iob-ilogic !26_29 !27_28
RIOI3_TBYTETERM.ILOGIC_Y1.IFF.INV_OCLK origin:035-iob-ilogic 29_03
RIOI3_TBYTETERM.ILOGIC_Y1.IFF.SRTYPE.ASYNC origin:035-iob-ilogic !28_60
RIOI3_TBYTETERM.ILOGIC_Y1.IFF.SRTYPE.SYNC origin:035-iob-ilogic 28_60
@ -130,6 +133,7 @@ RIOI3_TBYTETERM.ILOGIC_Y1.ZINV_D origin:035-iob-ilogic 28_18
RIOI3_TBYTETERM.ILOGIC_Y1.IDELMUXE3.P0 origin:035-iob-ilogic 28_26
RIOI3_TBYTETERM.ILOGIC_Y1.IDELMUXE3.P1 origin:035-iob-ilogic !28_26
RIOI3_TBYTETERM.ILOGIC_Y1.IFFDELMUXE3.P0 origin:035-iob-ilogic 29_11
RIOI3_TBYTETERM.ILOGIC_Y1.IFFDELMUXE3.P1 origin:035-iob-ilogic !29_11
RIOI3_TBYTETERM.IOI_OCLK_0.IOI_LEAF_GCLK0 origin:037-iob-pips 28_83 28_95 29_88
RIOI3_TBYTETERM.IOI_OCLK_0.IOI_LEAF_GCLK1 origin:037-iob-pips 28_83 28_97 29_88
RIOI3_TBYTETERM.IOI_OCLK_0.IOI_LEAF_GCLK2 origin:037-iob-pips 28_83 29_88 29_94