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Updating DB based on "Revert "017-clbprecyinit: push db"" 

Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
This commit is contained in:
Tim 'mithro' Ansell 2017-12-08 18:28:40 -08:00
parent 135479fe83
commit e484a55549
4 changed files with 0 additions and 24 deletions
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6
artix7/segbits_clbll_l.db
View File

@ -328,9 +328,6 @@ CLBLL_L.SLICEL_X0.DMUX.O5 !30_51 !30_57 30_52 30_56
CLBLL_L.SLICEL_X0.DMUX.XOR !30_52 !30_56 !30_57 30_51
CLBLL_L.SLICEL_X0.FFSYNC 00_48
CLBLL_L.SLICEL_X0.LATCH 30_32
CLBLL_L.SLICEL_X0.PRECYINIT.1 !30_13 !30_14 00_12
CLBLL_L.SLICEL_X0.PRECYINIT.AX !00_12 !30_13 30_14
CLBLL_L.SLICEL_X0.PRECYINIT.CIN !00_12 !30_14 30_13
CLBLL_L.SLICEL_X0.SRUSEDMUX 01_35
CLBLL_L.SLICEL_X1.A5FF.MUX.A 31_08
CLBLL_L.SLICEL_X1.A5FF.MUX.B 31_11
@ -662,7 +659,4 @@ CLBLL_L.SLICEL_X1.DMUX.O5 !30_53 !31_53 31_56 31_57
CLBLL_L.SLICEL_X1.DMUX.XOR !31_53 !31_56 !31_57 30_53
CLBLL_L.SLICEL_X1.FFSYNC 01_31
CLBLL_L.SLICEL_X1.LATCH 31_32
CLBLL_L.SLICEL_X1.PRECYINIT.1 !31_12 !31_13 01_11
CLBLL_L.SLICEL_X1.PRECYINIT.AX !01_11 !31_12 31_13
CLBLL_L.SLICEL_X1.PRECYINIT.CIN !01_11 !31_13 31_12
CLBLL_L.SLICEL_X1.SRUSEDMUX 00_32

6
artix7/segbits_clbll_r.db
View File

@ -328,9 +328,6 @@ CLBLL_R.SLICEL_X0.DMUX.O5 !30_51 !30_57 30_52 30_56
CLBLL_R.SLICEL_X0.DMUX.XOR !30_52 !30_56 !30_57 30_51
CLBLL_R.SLICEL_X0.FFSYNC 00_48
CLBLL_R.SLICEL_X0.LATCH 30_32
CLBLL_R.SLICEL_X0.PRECYINIT.1 !30_13 !30_14 00_12
CLBLL_R.SLICEL_X0.PRECYINIT.AX !00_12 !30_13 30_14
CLBLL_R.SLICEL_X0.PRECYINIT.CIN !00_12 !30_14 30_13
CLBLL_R.SLICEL_X0.SRUSEDMUX 01_35
CLBLL_R.SLICEL_X1.A5FF.MUX.A 31_08
CLBLL_R.SLICEL_X1.A5FF.MUX.B 31_11
@ -662,7 +659,4 @@ CLBLL_R.SLICEL_X1.DMUX.O5 !30_53 !31_53 31_56 31_57
CLBLL_R.SLICEL_X1.DMUX.XOR !31_53 !31_56 !31_57 30_53
CLBLL_R.SLICEL_X1.FFSYNC 01_31
CLBLL_R.SLICEL_X1.LATCH 31_32
CLBLL_R.SLICEL_X1.PRECYINIT.1 !31_12 !31_13 01_11
CLBLL_R.SLICEL_X1.PRECYINIT.AX !01_11 !31_12 31_13
CLBLL_R.SLICEL_X1.PRECYINIT.CIN !01_11 !31_13 31_12
CLBLL_R.SLICEL_X1.SRUSEDMUX 00_32

6
artix7/segbits_clblm_l.db
View File

@ -328,9 +328,6 @@ CLBLM_L.SLICEL_X1.DMUX.O5 !30_53 !31_53 31_56 31_57
CLBLM_L.SLICEL_X1.DMUX.XOR !31_53 !31_56 !31_57 30_53
CLBLM_L.SLICEL_X1.FFSYNC 01_31
CLBLM_L.SLICEL_X1.LATCH 31_32
CLBLM_L.SLICEL_X1.PRECYINIT.1 !31_12 !31_13 01_11
CLBLM_L.SLICEL_X1.PRECYINIT.AX !01_11 !31_12 31_13
CLBLM_L.SLICEL_X1.PRECYINIT.CIN !01_11 !31_13 31_12
CLBLM_L.SLICEL_X1.SRUSEDMUX 00_32
CLBLM_L.SLICEM_X0.A5FF.MUX.A 30_09
CLBLM_L.SLICEM_X0.A5FF.MUX.B 30_10
@ -662,7 +659,4 @@ CLBLM_L.SLICEM_X0.DMUX.O5 !30_51 !30_57 30_52 30_56
CLBLM_L.SLICEM_X0.DMUX.XOR !30_52 !30_56 !30_57 30_51
CLBLM_L.SLICEM_X0.FFSYNC 00_48
CLBLM_L.SLICEM_X0.LATCH 30_32
CLBLM_L.SLICEM_X0.PRECYINIT.1 !30_13 !30_14 00_12
CLBLM_L.SLICEM_X0.PRECYINIT.AX !00_12 !30_13 30_14
CLBLM_L.SLICEM_X0.PRECYINIT.CIN !00_12 !30_14 30_13
CLBLM_L.SLICEM_X0.SRUSEDMUX 01_35

6
artix7/segbits_clblm_r.db
View File

@ -328,9 +328,6 @@ CLBLM_R.SLICEL_X1.DMUX.O5 !30_53 !31_53 31_56 31_57
CLBLM_R.SLICEL_X1.DMUX.XOR !31_53 !31_56 !31_57 30_53
CLBLM_R.SLICEL_X1.FFSYNC 01_31
CLBLM_R.SLICEL_X1.LATCH 31_32
CLBLM_R.SLICEL_X1.PRECYINIT.1 !31_12 !31_13 01_11
CLBLM_R.SLICEL_X1.PRECYINIT.AX !01_11 !31_12 31_13
CLBLM_R.SLICEL_X1.PRECYINIT.CIN !01_11 !31_13 31_12
CLBLM_R.SLICEL_X1.SRUSEDMUX 00_32
CLBLM_R.SLICEM_X0.A5FF.MUX.A 30_09
CLBLM_R.SLICEM_X0.A5FF.MUX.B 30_10
@ -662,7 +659,4 @@ CLBLM_R.SLICEM_X0.DMUX.O5 !30_51 !30_57 30_52 30_56
CLBLM_R.SLICEM_X0.DMUX.XOR !30_52 !30_56 !30_57 30_51
CLBLM_R.SLICEM_X0.FFSYNC 00_48
CLBLM_R.SLICEM_X0.LATCH 30_32
CLBLM_R.SLICEM_X0.PRECYINIT.1 !30_13 !30_14 00_12
CLBLM_R.SLICEM_X0.PRECYINIT.AX !00_12 !30_13 30_14
CLBLM_R.SLICEM_X0.PRECYINIT.CIN !00_12 !30_14 30_13
CLBLM_R.SLICEM_X0.SRUSEDMUX 01_35