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gtx_channel: fix wrong fuzzer attr results

This commit is contained in:
Hans Baier 2025-04-02 05:16:16 +07:00
parent 4f10ad3122
commit dd4178a180
12 changed files with 696 additions and 0 deletions
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58
kintex7/mask_gtx_channel_0.db
View File

@ -8,6 +8,9 @@ bit 28_108
bit 28_109
bit 28_110
bit 28_111
bit 28_112
bit 28_113
bit 28_114
bit 28_115
bit 28_116
bit 28_117
@ -495,6 +498,9 @@ bit 29_108
bit 29_109
bit 29_110
bit 29_111
bit 29_112
bit 29_113
bit 29_114
bit 29_115
bit 29_116
bit 29_117
@ -662,6 +668,7 @@ bit 29_346
bit 29_347
bit 29_348
bit 29_349
bit 29_350
bit 29_352
bit 29_353
bit 29_354
@ -1078,6 +1085,11 @@ bit 30_300
bit 30_301
bit 30_302
bit 30_31
bit 30_312
bit 30_313
bit 30_317
bit 30_318
bit 30_319
bit 30_32
bit 30_33
bit 30_336
@ -1089,7 +1101,11 @@ bit 30_340
bit 30_341
bit 30_342
bit 30_343
bit 30_348
bit 30_349
bit 30_35
bit 30_350
bit 30_351
bit 30_36
bit 30_368
bit 30_369
@ -1112,14 +1128,30 @@ bit 30_387
bit 30_39
bit 30_40
bit 30_41
bit 30_418
bit 30_419
bit 30_42
bit 30_43
bit 30_44
bit 30_45
bit 30_456
bit 30_457
bit 30_458
bit 30_459
bit 30_46
bit 30_460
bit 30_461
bit 30_462
bit 30_463
bit 30_464
bit 30_465
bit 30_466
bit 30_467
bit 30_468
bit 30_469
bit 30_47
bit 30_470
bit 30_471
bit 30_48
bit 30_49
bit 30_50
@ -1406,6 +1438,10 @@ bit 31_300
bit 31_301
bit 31_302
bit 31_31
bit 31_312
bit 31_313
bit 31_317
bit 31_318
bit 31_32
bit 31_33
bit 31_336
@ -1416,7 +1452,12 @@ bit 31_34
bit 31_340
bit 31_341
bit 31_342
bit 31_347
bit 31_348
bit 31_349
bit 31_35
bit 31_350
bit 31_351
bit 31_36
bit 31_368
bit 31_369
@ -1437,14 +1478,30 @@ bit 31_386
bit 31_39
bit 31_40
bit 31_41
bit 31_417
bit 31_418
bit 31_42
bit 31_43
bit 31_44
bit 31_45
bit 31_456
bit 31_457
bit 31_458
bit 31_459
bit 31_46
bit 31_460
bit 31_461
bit 31_462
bit 31_463
bit 31_464
bit 31_465
bit 31_466
bit 31_467
bit 31_468
bit 31_469
bit 31_47
bit 31_470
bit 31_471
bit 31_48
bit 31_49
bit 31_504
@ -1594,6 +1651,7 @@ bit 31_671
bit 31_672
bit 31_673
bit 31_674
bit 31_675
bit 31_68
bit 31_69
bit 31_70

58
kintex7/mask_gtx_channel_1.db
View File

@ -8,6 +8,9 @@ bit 28_108
bit 28_109
bit 28_110
bit 28_111
bit 28_112
bit 28_113
bit 28_114
bit 28_115
bit 28_116
bit 28_117
@ -495,6 +498,9 @@ bit 29_108
bit 29_109
bit 29_110
bit 29_111
bit 29_112
bit 29_113
bit 29_114
bit 29_115
bit 29_116
bit 29_117
@ -662,6 +668,7 @@ bit 29_346
bit 29_347
bit 29_348
bit 29_349
bit 29_350
bit 29_352
bit 29_353
bit 29_354
@ -1078,6 +1085,11 @@ bit 30_300
bit 30_301
bit 30_302
bit 30_31
bit 30_312
bit 30_313
bit 30_317
bit 30_318
bit 30_319
bit 30_32
bit 30_33
bit 30_336
@ -1089,7 +1101,11 @@ bit 30_340
bit 30_341
bit 30_342
bit 30_343
bit 30_348
bit 30_349
bit 30_35
bit 30_350
bit 30_351
bit 30_36
bit 30_368
bit 30_369
@ -1112,14 +1128,30 @@ bit 30_387
bit 30_39
bit 30_40
bit 30_41
bit 30_418
bit 30_419
bit 30_42
bit 30_43
bit 30_44
bit 30_45
bit 30_456
bit 30_457
bit 30_458
bit 30_459
bit 30_46
bit 30_460
bit 30_461
bit 30_462
bit 30_463
bit 30_464
bit 30_465
bit 30_466
bit 30_467
bit 30_468
bit 30_469
bit 30_47
bit 30_470
bit 30_471
bit 30_48
bit 30_49
bit 30_50
@ -1406,6 +1438,10 @@ bit 31_300
bit 31_301
bit 31_302
bit 31_31
bit 31_312
bit 31_313
bit 31_317
bit 31_318
bit 31_32
bit 31_33
bit 31_336
@ -1416,7 +1452,12 @@ bit 31_34
bit 31_340
bit 31_341
bit 31_342
bit 31_347
bit 31_348
bit 31_349
bit 31_35
bit 31_350
bit 31_351
bit 31_36
bit 31_368
bit 31_369
@ -1437,14 +1478,30 @@ bit 31_386
bit 31_39
bit 31_40
bit 31_41
bit 31_417
bit 31_418
bit 31_42
bit 31_43
bit 31_44
bit 31_45
bit 31_456
bit 31_457
bit 31_458
bit 31_459
bit 31_46
bit 31_460
bit 31_461
bit 31_462
bit 31_463
bit 31_464
bit 31_465
bit 31_466
bit 31_467
bit 31_468
bit 31_469
bit 31_47
bit 31_470
bit 31_471
bit 31_48
bit 31_49
bit 31_504
@ -1594,6 +1651,7 @@ bit 31_671
bit 31_672
bit 31_673
bit 31_674
bit 31_675
bit 31_68
bit 31_69
bit 31_70

58
kintex7/mask_gtx_channel_2.db
View File

@ -8,6 +8,9 @@ bit 28_108
bit 28_109
bit 28_110
bit 28_111
bit 28_112
bit 28_113
bit 28_114
bit 28_115
bit 28_116
bit 28_117
@ -495,6 +498,9 @@ bit 29_108
bit 29_109
bit 29_110
bit 29_111
bit 29_112
bit 29_113
bit 29_114
bit 29_115
bit 29_116
bit 29_117
@ -662,6 +668,7 @@ bit 29_346
bit 29_347
bit 29_348
bit 29_349
bit 29_350
bit 29_352
bit 29_353
bit 29_354
@ -1078,6 +1085,11 @@ bit 30_300
bit 30_301
bit 30_302
bit 30_31
bit 30_312
bit 30_313
bit 30_317
bit 30_318
bit 30_319
bit 30_32
bit 30_33
bit 30_336
@ -1089,7 +1101,11 @@ bit 30_340
bit 30_341
bit 30_342
bit 30_343
bit 30_348
bit 30_349
bit 30_35
bit 30_350
bit 30_351
bit 30_36
bit 30_368
bit 30_369
@ -1112,14 +1128,30 @@ bit 30_387
bit 30_39
bit 30_40
bit 30_41
bit 30_418
bit 30_419
bit 30_42
bit 30_43
bit 30_44
bit 30_45
bit 30_456
bit 30_457
bit 30_458
bit 30_459
bit 30_46
bit 30_460
bit 30_461
bit 30_462
bit 30_463
bit 30_464
bit 30_465
bit 30_466
bit 30_467
bit 30_468
bit 30_469
bit 30_47
bit 30_470
bit 30_471
bit 30_48
bit 30_49
bit 30_50
@ -1406,6 +1438,10 @@ bit 31_300
bit 31_301
bit 31_302
bit 31_31
bit 31_312
bit 31_313
bit 31_317
bit 31_318
bit 31_32
bit 31_33
bit 31_336
@ -1416,7 +1452,12 @@ bit 31_34
bit 31_340
bit 31_341
bit 31_342
bit 31_347
bit 31_348
bit 31_349
bit 31_35
bit 31_350
bit 31_351
bit 31_36
bit 31_368
bit 31_369
@ -1437,14 +1478,30 @@ bit 31_386
bit 31_39
bit 31_40
bit 31_41
bit 31_417
bit 31_418
bit 31_42
bit 31_43
bit 31_44
bit 31_45
bit 31_456
bit 31_457
bit 31_458
bit 31_459
bit 31_46
bit 31_460
bit 31_461
bit 31_462
bit 31_463
bit 31_464
bit 31_465
bit 31_466
bit 31_467
bit 31_468
bit 31_469
bit 31_47
bit 31_470
bit 31_471
bit 31_48
bit 31_49
bit 31_504
@ -1594,6 +1651,7 @@ bit 31_671
bit 31_672
bit 31_673
bit 31_674
bit 31_675
bit 31_68
bit 31_69
bit 31_70

58
kintex7/mask_gtx_channel_3.db
View File

@ -8,6 +8,9 @@ bit 28_108
bit 28_109
bit 28_110
bit 28_111
bit 28_112
bit 28_113
bit 28_114
bit 28_115
bit 28_116
bit 28_117
@ -495,6 +498,9 @@ bit 29_108
bit 29_109
bit 29_110
bit 29_111
bit 29_112
bit 29_113
bit 29_114
bit 29_115
bit 29_116
bit 29_117
@ -662,6 +668,7 @@ bit 29_346
bit 29_347
bit 29_348
bit 29_349
bit 29_350
bit 29_352
bit 29_353
bit 29_354
@ -1078,6 +1085,11 @@ bit 30_300
bit 30_301
bit 30_302
bit 30_31
bit 30_312
bit 30_313
bit 30_317
bit 30_318
bit 30_319
bit 30_32
bit 30_33
bit 30_336
@ -1089,7 +1101,11 @@ bit 30_340
bit 30_341
bit 30_342
bit 30_343
bit 30_348
bit 30_349
bit 30_35
bit 30_350
bit 30_351
bit 30_36
bit 30_368
bit 30_369
@ -1112,14 +1128,30 @@ bit 30_387
bit 30_39
bit 30_40
bit 30_41
bit 30_418
bit 30_419
bit 30_42
bit 30_43
bit 30_44
bit 30_45
bit 30_456
bit 30_457
bit 30_458
bit 30_459
bit 30_46
bit 30_460
bit 30_461
bit 30_462
bit 30_463
bit 30_464
bit 30_465
bit 30_466
bit 30_467
bit 30_468
bit 30_469
bit 30_47
bit 30_470
bit 30_471
bit 30_48
bit 30_49
bit 30_50
@ -1406,6 +1438,10 @@ bit 31_300
bit 31_301
bit 31_302
bit 31_31
bit 31_312
bit 31_313
bit 31_317
bit 31_318
bit 31_32
bit 31_33
bit 31_336
@ -1416,7 +1452,12 @@ bit 31_34
bit 31_340
bit 31_341
bit 31_342
bit 31_347
bit 31_348
bit 31_349
bit 31_35
bit 31_350
bit 31_351
bit 31_36
bit 31_368
bit 31_369
@ -1437,14 +1478,30 @@ bit 31_386
bit 31_39
bit 31_40
bit 31_41
bit 31_417
bit 31_418
bit 31_42
bit 31_43
bit 31_44
bit 31_45
bit 31_456
bit 31_457
bit 31_458
bit 31_459
bit 31_46
bit 31_460
bit 31_461
bit 31_462
bit 31_463
bit 31_464
bit 31_465
bit 31_466
bit 31_467
bit 31_468
bit 31_469
bit 31_47
bit 31_470
bit 31_471
bit 31_48
bit 31_49
bit 31_504
@ -1594,6 +1651,7 @@ bit 31_671
bit 31_672
bit 31_673
bit 31_674
bit 31_675
bit 31_68
bit 31_69
bit 31_70

58
kintex7/segbits_gtx_channel_0.db
View File

@ -744,9 +744,37 @@ GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV2[9] 31_340
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV3[0] 30_288
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV3[1] 31_288
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[0] 30_456
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[10] 30_461
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[11] 31_461
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[12] 30_462
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[13] 31_462
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[14] 30_463
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[15] 31_463
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[16] 30_464
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[17] 31_464
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[18] 30_465
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[19] 31_465
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[1] 31_456
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[20] 30_466
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[21] 31_466
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[22] 30_467
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[23] 31_467
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[24] 30_468
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[25] 31_468
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[26] 30_469
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[27] 31_469
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[28] 30_470
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[29] 31_470
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[2] 30_457
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[30] 30_471
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[31] 31_471
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[3] 31_457
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[4] 30_458
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[5] 31_458
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[6] 30_459
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[7] 31_459
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[8] 30_460
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[9] 31_460
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV[0] 30_520
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV[10] 30_525
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV[11] 31_525
@ -889,6 +917,7 @@ GTX_CHANNEL_0.GTXE2_CHANNEL.RXCDR_CFG[68] 30_674
GTX_CHANNEL_0.GTXE2_CHANNEL.RXCDR_CFG[69] 31_674
GTX_CHANNEL_0.GTXE2_CHANNEL.RXCDR_CFG[6] 30_643
GTX_CHANNEL_0.GTXE2_CHANNEL.RXCDR_CFG[70] 30_675
GTX_CHANNEL_0.GTXE2_CHANNEL.RXCDR_CFG[71] 31_675
GTX_CHANNEL_0.GTXE2_CHANNEL.RXCDR_CFG[7] 31_643
GTX_CHANNEL_0.GTXE2_CHANNEL.RXCDR_CFG[8] 30_644
GTX_CHANNEL_0.GTXE2_CHANNEL.RXCDR_CFG[9] 31_644
@ -902,6 +931,12 @@ GTX_CHANNEL_0.GTXE2_CHANNEL.RXCDR_LOCK_CFG[4] 30_634
GTX_CHANNEL_0.GTXE2_CHANNEL.RXCDR_LOCK_CFG[5] 31_634
GTX_CHANNEL_0.GTXE2_CHANNEL.RXCDR_PH_RESET_ON_EIDLE[0] 31_638
GTX_CHANNEL_0.GTXE2_CHANNEL.RXDFELPMRESET_TIME[0] 29_111
GTX_CHANNEL_0.GTXE2_CHANNEL.RXDFELPMRESET_TIME[1] 28_112
GTX_CHANNEL_0.GTXE2_CHANNEL.RXDFELPMRESET_TIME[2] 29_112
GTX_CHANNEL_0.GTXE2_CHANNEL.RXDFELPMRESET_TIME[3] 28_113
GTX_CHANNEL_0.GTXE2_CHANNEL.RXDFELPMRESET_TIME[4] 29_113
GTX_CHANNEL_0.GTXE2_CHANNEL.RXDFELPMRESET_TIME[5] 28_114
GTX_CHANNEL_0.GTXE2_CHANNEL.RXDFELPMRESET_TIME[6] 29_114
GTX_CHANNEL_0.GTXE2_CHANNEL.RXDLY_CFG[0] 28_680
GTX_CHANNEL_0.GTXE2_CHANNEL.RXDLY_CFG[10] 28_685
GTX_CHANNEL_0.GTXE2_CHANNEL.RXDLY_CFG[11] 29_685
@ -967,6 +1002,7 @@ GTX_CHANNEL_0.GTXE2_CHANNEL.RXLPM_LF_CFG[0] 28_344
GTX_CHANNEL_0.GTXE2_CHANNEL.RXLPM_LF_CFG[10] 28_349
GTX_CHANNEL_0.GTXE2_CHANNEL.RXLPM_LF_CFG[11] 29_349
GTX_CHANNEL_0.GTXE2_CHANNEL.RXLPM_LF_CFG[12] 28_350
GTX_CHANNEL_0.GTXE2_CHANNEL.RXLPM_LF_CFG[13] 29_350
GTX_CHANNEL_0.GTXE2_CHANNEL.RXLPM_LF_CFG[1] 29_344
GTX_CHANNEL_0.GTXE2_CHANNEL.RXLPM_LF_CFG[2] 28_345
GTX_CHANNEL_0.GTXE2_CHANNEL.RXLPM_LF_CFG[3] 29_345
@ -1176,14 +1212,36 @@ GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_H5_CFG[7] 29_275
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_H5_CFG[8] 28_276
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_H5_CFG[9] 29_276
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[0] 30_224
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[10] 31_312
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[11] 30_313
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[12] 31_313
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[13] 30_317
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[14] 31_317
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[15] 30_318
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[16] 31_318
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[17] 30_319
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[18] 31_347
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[19] 30_348
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[1] 31_224
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[20] 31_348
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[21] 30_349
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[22] 31_349
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[23] 30_350
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[24] 31_350
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[25] 30_351
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[26] 31_351
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[27] 31_417
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[28] 30_418
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[29] 31_418
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[2] 30_225
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[30] 30_419
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[3] 31_225
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[4] 31_229
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[5] 30_230
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[6] 31_230
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[7] 30_231
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[8] 31_231
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[9] 30_312
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG[0] 28_280
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG[10] 28_285
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG[11] 29_285

58
kintex7/segbits_gtx_channel_0.origin_info.db
View File

@ -744,9 +744,37 @@ GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV2[9] origin:064-gtx-channel-conf 31_340
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV3[0] origin:064-gtx-channel-conf 30_288
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV3[1] origin:064-gtx-channel-conf 31_288
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[0] origin:064-gtx-channel-conf 30_456
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[10] origin:064-gtx-channel-conf 30_461
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[11] origin:064-gtx-channel-conf 31_461
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[12] origin:064-gtx-channel-conf 30_462
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[13] origin:064-gtx-channel-conf 31_462
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[14] origin:064-gtx-channel-conf 30_463
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[15] origin:064-gtx-channel-conf 31_463
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[16] origin:064-gtx-channel-conf 30_464
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[17] origin:064-gtx-channel-conf 31_464
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[18] origin:064-gtx-channel-conf 30_465
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[19] origin:064-gtx-channel-conf 31_465
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[1] origin:064-gtx-channel-conf 31_456
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[20] origin:064-gtx-channel-conf 30_466
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[21] origin:064-gtx-channel-conf 31_466
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[22] origin:064-gtx-channel-conf 30_467
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[23] origin:064-gtx-channel-conf 31_467
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[24] origin:064-gtx-channel-conf 30_468
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[25] origin:064-gtx-channel-conf 31_468
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[26] origin:064-gtx-channel-conf 30_469
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[27] origin:064-gtx-channel-conf 31_469
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[28] origin:064-gtx-channel-conf 30_470
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[29] origin:064-gtx-channel-conf 31_470
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[2] origin:064-gtx-channel-conf 30_457
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[30] origin:064-gtx-channel-conf 30_471
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[31] origin:064-gtx-channel-conf 31_471
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[3] origin:064-gtx-channel-conf 31_457
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[4] origin:064-gtx-channel-conf 30_458
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[5] origin:064-gtx-channel-conf 31_458
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[6] origin:064-gtx-channel-conf 30_459
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[7] origin:064-gtx-channel-conf 31_459
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[8] origin:064-gtx-channel-conf 30_460
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV4[9] origin:064-gtx-channel-conf 31_460
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV[0] origin:064-gtx-channel-conf 30_520
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV[10] origin:064-gtx-channel-conf 30_525
GTX_CHANNEL_0.GTXE2_CHANNEL.PMA_RSV[11] origin:064-gtx-channel-conf 31_525
@ -889,6 +917,7 @@ GTX_CHANNEL_0.GTXE2_CHANNEL.RXCDR_CFG[68] origin:064-gtx-channel-conf 30_674
GTX_CHANNEL_0.GTXE2_CHANNEL.RXCDR_CFG[69] origin:064-gtx-channel-conf 31_674
GTX_CHANNEL_0.GTXE2_CHANNEL.RXCDR_CFG[6] origin:064-gtx-channel-conf 30_643
GTX_CHANNEL_0.GTXE2_CHANNEL.RXCDR_CFG[70] origin:064-gtx-channel-conf 30_675
GTX_CHANNEL_0.GTXE2_CHANNEL.RXCDR_CFG[71] origin:064-gtx-channel-conf 31_675
GTX_CHANNEL_0.GTXE2_CHANNEL.RXCDR_CFG[7] origin:064-gtx-channel-conf 31_643
GTX_CHANNEL_0.GTXE2_CHANNEL.RXCDR_CFG[8] origin:064-gtx-channel-conf 30_644
GTX_CHANNEL_0.GTXE2_CHANNEL.RXCDR_CFG[9] origin:064-gtx-channel-conf 31_644
@ -902,6 +931,12 @@ GTX_CHANNEL_0.GTXE2_CHANNEL.RXCDR_LOCK_CFG[4] origin:064-gtx-channel-conf 30_634
GTX_CHANNEL_0.GTXE2_CHANNEL.RXCDR_LOCK_CFG[5] origin:064-gtx-channel-conf 31_634
GTX_CHANNEL_0.GTXE2_CHANNEL.RXCDR_PH_RESET_ON_EIDLE[0] origin:064-gtx-channel-conf 31_638
GTX_CHANNEL_0.GTXE2_CHANNEL.RXDFELPMRESET_TIME[0] origin:064-gtx-channel-conf 29_111
GTX_CHANNEL_0.GTXE2_CHANNEL.RXDFELPMRESET_TIME[1] origin:064-gtx-channel-conf 28_112
GTX_CHANNEL_0.GTXE2_CHANNEL.RXDFELPMRESET_TIME[2] origin:064-gtx-channel-conf 29_112
GTX_CHANNEL_0.GTXE2_CHANNEL.RXDFELPMRESET_TIME[3] origin:064-gtx-channel-conf 28_113
GTX_CHANNEL_0.GTXE2_CHANNEL.RXDFELPMRESET_TIME[4] origin:064-gtx-channel-conf 29_113
GTX_CHANNEL_0.GTXE2_CHANNEL.RXDFELPMRESET_TIME[5] origin:064-gtx-channel-conf 28_114
GTX_CHANNEL_0.GTXE2_CHANNEL.RXDFELPMRESET_TIME[6] origin:064-gtx-channel-conf 29_114
GTX_CHANNEL_0.GTXE2_CHANNEL.RXDLY_CFG[0] origin:064-gtx-channel-conf 28_680
GTX_CHANNEL_0.GTXE2_CHANNEL.RXDLY_CFG[10] origin:064-gtx-channel-conf 28_685
GTX_CHANNEL_0.GTXE2_CHANNEL.RXDLY_CFG[11] origin:064-gtx-channel-conf 29_685
@ -967,6 +1002,7 @@ GTX_CHANNEL_0.GTXE2_CHANNEL.RXLPM_LF_CFG[0] origin:064-gtx-channel-conf 28_344
GTX_CHANNEL_0.GTXE2_CHANNEL.RXLPM_LF_CFG[10] origin:064-gtx-channel-conf 28_349
GTX_CHANNEL_0.GTXE2_CHANNEL.RXLPM_LF_CFG[11] origin:064-gtx-channel-conf 29_349
GTX_CHANNEL_0.GTXE2_CHANNEL.RXLPM_LF_CFG[12] origin:064-gtx-channel-conf 28_350
GTX_CHANNEL_0.GTXE2_CHANNEL.RXLPM_LF_CFG[13] origin:064-gtx-channel-conf 29_350
GTX_CHANNEL_0.GTXE2_CHANNEL.RXLPM_LF_CFG[1] origin:064-gtx-channel-conf 29_344
GTX_CHANNEL_0.GTXE2_CHANNEL.RXLPM_LF_CFG[2] origin:064-gtx-channel-conf 28_345
GTX_CHANNEL_0.GTXE2_CHANNEL.RXLPM_LF_CFG[3] origin:064-gtx-channel-conf 29_345
@ -1176,14 +1212,36 @@ GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_H5_CFG[7] origin:064-gtx-channel-conf 29_275
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_H5_CFG[8] origin:064-gtx-channel-conf 28_276
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_H5_CFG[9] origin:064-gtx-channel-conf 29_276
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[0] origin:064-gtx-channel-conf 30_224
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[10] origin:064-gtx-channel-conf 31_312
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[11] origin:064-gtx-channel-conf 30_313
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[12] origin:064-gtx-channel-conf 31_313
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[13] origin:064-gtx-channel-conf 30_317
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[14] origin:064-gtx-channel-conf 31_317
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[15] origin:064-gtx-channel-conf 30_318
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[16] origin:064-gtx-channel-conf 31_318
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[17] origin:064-gtx-channel-conf 30_319
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[18] origin:064-gtx-channel-conf 31_347
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[19] origin:064-gtx-channel-conf 30_348
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[1] origin:064-gtx-channel-conf 31_224
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[20] origin:064-gtx-channel-conf 31_348
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[21] origin:064-gtx-channel-conf 30_349
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[22] origin:064-gtx-channel-conf 31_349
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[23] origin:064-gtx-channel-conf 30_350
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[24] origin:064-gtx-channel-conf 31_350
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[25] origin:064-gtx-channel-conf 30_351
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[26] origin:064-gtx-channel-conf 31_351
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[27] origin:064-gtx-channel-conf 31_417
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[28] origin:064-gtx-channel-conf 30_418
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[29] origin:064-gtx-channel-conf 31_418
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[2] origin:064-gtx-channel-conf 30_225
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[30] origin:064-gtx-channel-conf 30_419
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[3] origin:064-gtx-channel-conf 31_225
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[4] origin:064-gtx-channel-conf 31_229
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[5] origin:064-gtx-channel-conf 30_230
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[6] origin:064-gtx-channel-conf 31_230
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[7] origin:064-gtx-channel-conf 30_231
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[8] origin:064-gtx-channel-conf 31_231
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG2[9] origin:064-gtx-channel-conf 30_312
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG[0] origin:064-gtx-channel-conf 28_280
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG[10] origin:064-gtx-channel-conf 28_285
GTX_CHANNEL_0.GTXE2_CHANNEL.RX_DFE_KL_CFG[11] origin:064-gtx-channel-conf 29_285

58
kintex7/segbits_gtx_channel_1.db
View File

@ -744,9 +744,37 @@ GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV2[9] 31_340
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV3[0] 30_288
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV3[1] 31_288
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[0] 30_456
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[10] 30_461
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[11] 31_461
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[12] 30_462
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[13] 31_462
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[14] 30_463
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[15] 31_463
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[16] 30_464
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[17] 31_464
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[18] 30_465
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[19] 31_465
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[1] 31_456
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[20] 30_466
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[21] 31_466
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[22] 30_467
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[23] 31_467
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[24] 30_468
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[25] 31_468
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[26] 30_469
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[27] 31_469
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[28] 30_470
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[29] 31_470
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[2] 30_457
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[30] 30_471
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[31] 31_471
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[3] 31_457
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[4] 30_458
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[5] 31_458
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[6] 30_459
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[7] 31_459
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[8] 30_460
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[9] 31_460
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV[0] 30_520
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV[10] 30_525
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV[11] 31_525
@ -889,6 +917,7 @@ GTX_CHANNEL_1.GTXE2_CHANNEL.RXCDR_CFG[68] 30_674
GTX_CHANNEL_1.GTXE2_CHANNEL.RXCDR_CFG[69] 31_674
GTX_CHANNEL_1.GTXE2_CHANNEL.RXCDR_CFG[6] 30_643
GTX_CHANNEL_1.GTXE2_CHANNEL.RXCDR_CFG[70] 30_675
GTX_CHANNEL_1.GTXE2_CHANNEL.RXCDR_CFG[71] 31_675
GTX_CHANNEL_1.GTXE2_CHANNEL.RXCDR_CFG[7] 31_643
GTX_CHANNEL_1.GTXE2_CHANNEL.RXCDR_CFG[8] 30_644
GTX_CHANNEL_1.GTXE2_CHANNEL.RXCDR_CFG[9] 31_644
@ -902,6 +931,12 @@ GTX_CHANNEL_1.GTXE2_CHANNEL.RXCDR_LOCK_CFG[4] 30_634
GTX_CHANNEL_1.GTXE2_CHANNEL.RXCDR_LOCK_CFG[5] 31_634
GTX_CHANNEL_1.GTXE2_CHANNEL.RXCDR_PH_RESET_ON_EIDLE[0] 31_638
GTX_CHANNEL_1.GTXE2_CHANNEL.RXDFELPMRESET_TIME[0] 29_111
GTX_CHANNEL_1.GTXE2_CHANNEL.RXDFELPMRESET_TIME[1] 28_112
GTX_CHANNEL_1.GTXE2_CHANNEL.RXDFELPMRESET_TIME[2] 29_112
GTX_CHANNEL_1.GTXE2_CHANNEL.RXDFELPMRESET_TIME[3] 28_113
GTX_CHANNEL_1.GTXE2_CHANNEL.RXDFELPMRESET_TIME[4] 29_113
GTX_CHANNEL_1.GTXE2_CHANNEL.RXDFELPMRESET_TIME[5] 28_114
GTX_CHANNEL_1.GTXE2_CHANNEL.RXDFELPMRESET_TIME[6] 29_114
GTX_CHANNEL_1.GTXE2_CHANNEL.RXDLY_CFG[0] 28_680
GTX_CHANNEL_1.GTXE2_CHANNEL.RXDLY_CFG[10] 28_685
GTX_CHANNEL_1.GTXE2_CHANNEL.RXDLY_CFG[11] 29_685
@ -967,6 +1002,7 @@ GTX_CHANNEL_1.GTXE2_CHANNEL.RXLPM_LF_CFG[0] 28_344
GTX_CHANNEL_1.GTXE2_CHANNEL.RXLPM_LF_CFG[10] 28_349
GTX_CHANNEL_1.GTXE2_CHANNEL.RXLPM_LF_CFG[11] 29_349
GTX_CHANNEL_1.GTXE2_CHANNEL.RXLPM_LF_CFG[12] 28_350
GTX_CHANNEL_1.GTXE2_CHANNEL.RXLPM_LF_CFG[13] 29_350
GTX_CHANNEL_1.GTXE2_CHANNEL.RXLPM_LF_CFG[1] 29_344
GTX_CHANNEL_1.GTXE2_CHANNEL.RXLPM_LF_CFG[2] 28_345
GTX_CHANNEL_1.GTXE2_CHANNEL.RXLPM_LF_CFG[3] 29_345
@ -1176,14 +1212,36 @@ GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_H5_CFG[7] 29_275
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_H5_CFG[8] 28_276
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_H5_CFG[9] 29_276
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[0] 30_224
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[10] 31_312
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[11] 30_313
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[12] 31_313
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[13] 30_317
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[14] 31_317
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[15] 30_318
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[16] 31_318
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[17] 30_319
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[18] 31_347
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[19] 30_348
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[1] 31_224
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[20] 31_348
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[21] 30_349
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[22] 31_349
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[23] 30_350
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[24] 31_350
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[25] 30_351
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[26] 31_351
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[27] 31_417
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[28] 30_418
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[29] 31_418
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[2] 30_225
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[30] 30_419
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[3] 31_225
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[4] 31_229
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[5] 30_230
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[6] 31_230
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[7] 30_231
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[8] 31_231
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[9] 30_312
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG[0] 28_280
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG[10] 28_285
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG[11] 29_285

58
kintex7/segbits_gtx_channel_1.origin_info.db
View File

@ -744,9 +744,37 @@ GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV2[9] origin:064-gtx-channel-conf 31_340
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV3[0] origin:064-gtx-channel-conf 30_288
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV3[1] origin:064-gtx-channel-conf 31_288
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[0] origin:064-gtx-channel-conf 30_456
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[10] origin:064-gtx-channel-conf 30_461
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[11] origin:064-gtx-channel-conf 31_461
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[12] origin:064-gtx-channel-conf 30_462
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[13] origin:064-gtx-channel-conf 31_462
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[14] origin:064-gtx-channel-conf 30_463
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[15] origin:064-gtx-channel-conf 31_463
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[16] origin:064-gtx-channel-conf 30_464
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[17] origin:064-gtx-channel-conf 31_464
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[18] origin:064-gtx-channel-conf 30_465
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[19] origin:064-gtx-channel-conf 31_465
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[1] origin:064-gtx-channel-conf 31_456
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[20] origin:064-gtx-channel-conf 30_466
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[21] origin:064-gtx-channel-conf 31_466
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[22] origin:064-gtx-channel-conf 30_467
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[23] origin:064-gtx-channel-conf 31_467
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[24] origin:064-gtx-channel-conf 30_468
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[25] origin:064-gtx-channel-conf 31_468
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[26] origin:064-gtx-channel-conf 30_469
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[27] origin:064-gtx-channel-conf 31_469
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[28] origin:064-gtx-channel-conf 30_470
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[29] origin:064-gtx-channel-conf 31_470
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[2] origin:064-gtx-channel-conf 30_457
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[30] origin:064-gtx-channel-conf 30_471
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[31] origin:064-gtx-channel-conf 31_471
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[3] origin:064-gtx-channel-conf 31_457
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[4] origin:064-gtx-channel-conf 30_458
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[5] origin:064-gtx-channel-conf 31_458
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[6] origin:064-gtx-channel-conf 30_459
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[7] origin:064-gtx-channel-conf 31_459
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[8] origin:064-gtx-channel-conf 30_460
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV4[9] origin:064-gtx-channel-conf 31_460
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV[0] origin:064-gtx-channel-conf 30_520
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV[10] origin:064-gtx-channel-conf 30_525
GTX_CHANNEL_1.GTXE2_CHANNEL.PMA_RSV[11] origin:064-gtx-channel-conf 31_525
@ -889,6 +917,7 @@ GTX_CHANNEL_1.GTXE2_CHANNEL.RXCDR_CFG[68] origin:064-gtx-channel-conf 30_674
GTX_CHANNEL_1.GTXE2_CHANNEL.RXCDR_CFG[69] origin:064-gtx-channel-conf 31_674
GTX_CHANNEL_1.GTXE2_CHANNEL.RXCDR_CFG[6] origin:064-gtx-channel-conf 30_643
GTX_CHANNEL_1.GTXE2_CHANNEL.RXCDR_CFG[70] origin:064-gtx-channel-conf 30_675
GTX_CHANNEL_1.GTXE2_CHANNEL.RXCDR_CFG[71] origin:064-gtx-channel-conf 31_675
GTX_CHANNEL_1.GTXE2_CHANNEL.RXCDR_CFG[7] origin:064-gtx-channel-conf 31_643
GTX_CHANNEL_1.GTXE2_CHANNEL.RXCDR_CFG[8] origin:064-gtx-channel-conf 30_644
GTX_CHANNEL_1.GTXE2_CHANNEL.RXCDR_CFG[9] origin:064-gtx-channel-conf 31_644
@ -902,6 +931,12 @@ GTX_CHANNEL_1.GTXE2_CHANNEL.RXCDR_LOCK_CFG[4] origin:064-gtx-channel-conf 30_634
GTX_CHANNEL_1.GTXE2_CHANNEL.RXCDR_LOCK_CFG[5] origin:064-gtx-channel-conf 31_634
GTX_CHANNEL_1.GTXE2_CHANNEL.RXCDR_PH_RESET_ON_EIDLE[0] origin:064-gtx-channel-conf 31_638
GTX_CHANNEL_1.GTXE2_CHANNEL.RXDFELPMRESET_TIME[0] origin:064-gtx-channel-conf 29_111
GTX_CHANNEL_1.GTXE2_CHANNEL.RXDFELPMRESET_TIME[1] origin:064-gtx-channel-conf 28_112
GTX_CHANNEL_1.GTXE2_CHANNEL.RXDFELPMRESET_TIME[2] origin:064-gtx-channel-conf 29_112
GTX_CHANNEL_1.GTXE2_CHANNEL.RXDFELPMRESET_TIME[3] origin:064-gtx-channel-conf 28_113
GTX_CHANNEL_1.GTXE2_CHANNEL.RXDFELPMRESET_TIME[4] origin:064-gtx-channel-conf 29_113
GTX_CHANNEL_1.GTXE2_CHANNEL.RXDFELPMRESET_TIME[5] origin:064-gtx-channel-conf 28_114
GTX_CHANNEL_1.GTXE2_CHANNEL.RXDFELPMRESET_TIME[6] origin:064-gtx-channel-conf 29_114
GTX_CHANNEL_1.GTXE2_CHANNEL.RXDLY_CFG[0] origin:064-gtx-channel-conf 28_680
GTX_CHANNEL_1.GTXE2_CHANNEL.RXDLY_CFG[10] origin:064-gtx-channel-conf 28_685
GTX_CHANNEL_1.GTXE2_CHANNEL.RXDLY_CFG[11] origin:064-gtx-channel-conf 29_685
@ -967,6 +1002,7 @@ GTX_CHANNEL_1.GTXE2_CHANNEL.RXLPM_LF_CFG[0] origin:064-gtx-channel-conf 28_344
GTX_CHANNEL_1.GTXE2_CHANNEL.RXLPM_LF_CFG[10] origin:064-gtx-channel-conf 28_349
GTX_CHANNEL_1.GTXE2_CHANNEL.RXLPM_LF_CFG[11] origin:064-gtx-channel-conf 29_349
GTX_CHANNEL_1.GTXE2_CHANNEL.RXLPM_LF_CFG[12] origin:064-gtx-channel-conf 28_350
GTX_CHANNEL_1.GTXE2_CHANNEL.RXLPM_LF_CFG[13] origin:064-gtx-channel-conf 29_350
GTX_CHANNEL_1.GTXE2_CHANNEL.RXLPM_LF_CFG[1] origin:064-gtx-channel-conf 29_344
GTX_CHANNEL_1.GTXE2_CHANNEL.RXLPM_LF_CFG[2] origin:064-gtx-channel-conf 28_345
GTX_CHANNEL_1.GTXE2_CHANNEL.RXLPM_LF_CFG[3] origin:064-gtx-channel-conf 29_345
@ -1176,14 +1212,36 @@ GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_H5_CFG[7] origin:064-gtx-channel-conf 29_275
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_H5_CFG[8] origin:064-gtx-channel-conf 28_276
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_H5_CFG[9] origin:064-gtx-channel-conf 29_276
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[0] origin:064-gtx-channel-conf 30_224
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[10] origin:064-gtx-channel-conf 31_312
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[11] origin:064-gtx-channel-conf 30_313
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[12] origin:064-gtx-channel-conf 31_313
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[13] origin:064-gtx-channel-conf 30_317
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[14] origin:064-gtx-channel-conf 31_317
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[15] origin:064-gtx-channel-conf 30_318
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[16] origin:064-gtx-channel-conf 31_318
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[17] origin:064-gtx-channel-conf 30_319
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[18] origin:064-gtx-channel-conf 31_347
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[19] origin:064-gtx-channel-conf 30_348
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[1] origin:064-gtx-channel-conf 31_224
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[20] origin:064-gtx-channel-conf 31_348
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[21] origin:064-gtx-channel-conf 30_349
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[22] origin:064-gtx-channel-conf 31_349
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[23] origin:064-gtx-channel-conf 30_350
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[24] origin:064-gtx-channel-conf 31_350
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[25] origin:064-gtx-channel-conf 30_351
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[26] origin:064-gtx-channel-conf 31_351
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[27] origin:064-gtx-channel-conf 31_417
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[28] origin:064-gtx-channel-conf 30_418
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[29] origin:064-gtx-channel-conf 31_418
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[2] origin:064-gtx-channel-conf 30_225
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[30] origin:064-gtx-channel-conf 30_419
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[3] origin:064-gtx-channel-conf 31_225
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[4] origin:064-gtx-channel-conf 31_229
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[5] origin:064-gtx-channel-conf 30_230
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[6] origin:064-gtx-channel-conf 31_230
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[7] origin:064-gtx-channel-conf 30_231
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[8] origin:064-gtx-channel-conf 31_231
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG2[9] origin:064-gtx-channel-conf 30_312
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG[0] origin:064-gtx-channel-conf 28_280
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG[10] origin:064-gtx-channel-conf 28_285
GTX_CHANNEL_1.GTXE2_CHANNEL.RX_DFE_KL_CFG[11] origin:064-gtx-channel-conf 29_285

58
kintex7/segbits_gtx_channel_2.db
View File

@ -744,9 +744,37 @@ GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV2[9] 31_340
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV3[0] 30_288
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV3[1] 31_288
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[0] 30_456
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[10] 30_461
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[11] 31_461
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[12] 30_462
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[13] 31_462
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[14] 30_463
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[15] 31_463
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[16] 30_464
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[17] 31_464
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[18] 30_465
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[19] 31_465
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[1] 31_456
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[20] 30_466
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[21] 31_466
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[22] 30_467
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[23] 31_467
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[24] 30_468
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[25] 31_468
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[26] 30_469
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[27] 31_469
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[28] 30_470
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[29] 31_470
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[2] 30_457
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[30] 30_471
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[31] 31_471
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[3] 31_457
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[4] 30_458
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[5] 31_458
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[6] 30_459
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[7] 31_459
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[8] 30_460
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[9] 31_460
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV[0] 30_520
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV[10] 30_525
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV[11] 31_525
@ -889,6 +917,7 @@ GTX_CHANNEL_2.GTXE2_CHANNEL.RXCDR_CFG[68] 30_674
GTX_CHANNEL_2.GTXE2_CHANNEL.RXCDR_CFG[69] 31_674
GTX_CHANNEL_2.GTXE2_CHANNEL.RXCDR_CFG[6] 30_643
GTX_CHANNEL_2.GTXE2_CHANNEL.RXCDR_CFG[70] 30_675
GTX_CHANNEL_2.GTXE2_CHANNEL.RXCDR_CFG[71] 31_675
GTX_CHANNEL_2.GTXE2_CHANNEL.RXCDR_CFG[7] 31_643
GTX_CHANNEL_2.GTXE2_CHANNEL.RXCDR_CFG[8] 30_644
GTX_CHANNEL_2.GTXE2_CHANNEL.RXCDR_CFG[9] 31_644
@ -902,6 +931,12 @@ GTX_CHANNEL_2.GTXE2_CHANNEL.RXCDR_LOCK_CFG[4] 30_634
GTX_CHANNEL_2.GTXE2_CHANNEL.RXCDR_LOCK_CFG[5] 31_634
GTX_CHANNEL_2.GTXE2_CHANNEL.RXCDR_PH_RESET_ON_EIDLE[0] 31_638
GTX_CHANNEL_2.GTXE2_CHANNEL.RXDFELPMRESET_TIME[0] 29_111
GTX_CHANNEL_2.GTXE2_CHANNEL.RXDFELPMRESET_TIME[1] 28_112
GTX_CHANNEL_2.GTXE2_CHANNEL.RXDFELPMRESET_TIME[2] 29_112
GTX_CHANNEL_2.GTXE2_CHANNEL.RXDFELPMRESET_TIME[3] 28_113
GTX_CHANNEL_2.GTXE2_CHANNEL.RXDFELPMRESET_TIME[4] 29_113
GTX_CHANNEL_2.GTXE2_CHANNEL.RXDFELPMRESET_TIME[5] 28_114
GTX_CHANNEL_2.GTXE2_CHANNEL.RXDFELPMRESET_TIME[6] 29_114
GTX_CHANNEL_2.GTXE2_CHANNEL.RXDLY_CFG[0] 28_680
GTX_CHANNEL_2.GTXE2_CHANNEL.RXDLY_CFG[10] 28_685
GTX_CHANNEL_2.GTXE2_CHANNEL.RXDLY_CFG[11] 29_685
@ -967,6 +1002,7 @@ GTX_CHANNEL_2.GTXE2_CHANNEL.RXLPM_LF_CFG[0] 28_344
GTX_CHANNEL_2.GTXE2_CHANNEL.RXLPM_LF_CFG[10] 28_349
GTX_CHANNEL_2.GTXE2_CHANNEL.RXLPM_LF_CFG[11] 29_349
GTX_CHANNEL_2.GTXE2_CHANNEL.RXLPM_LF_CFG[12] 28_350
GTX_CHANNEL_2.GTXE2_CHANNEL.RXLPM_LF_CFG[13] 29_350
GTX_CHANNEL_2.GTXE2_CHANNEL.RXLPM_LF_CFG[1] 29_344
GTX_CHANNEL_2.GTXE2_CHANNEL.RXLPM_LF_CFG[2] 28_345
GTX_CHANNEL_2.GTXE2_CHANNEL.RXLPM_LF_CFG[3] 29_345
@ -1176,14 +1212,36 @@ GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_H5_CFG[7] 29_275
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_H5_CFG[8] 28_276
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_H5_CFG[9] 29_276
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[0] 30_224
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[10] 31_312
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[11] 30_313
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[12] 31_313
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[13] 30_317
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[14] 31_317
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[15] 30_318
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[16] 31_318
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[17] 30_319
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[18] 31_347
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[19] 30_348
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[1] 31_224
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[20] 31_348
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[21] 30_349
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[22] 31_349
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[23] 30_350
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[24] 31_350
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[25] 30_351
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[26] 31_351
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[27] 31_417
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[28] 30_418
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[29] 31_418
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[2] 30_225
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[30] 30_419
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[3] 31_225
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[4] 31_229
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[5] 30_230
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[6] 31_230
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[7] 30_231
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[8] 31_231
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[9] 30_312
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG[0] 28_280
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG[10] 28_285
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG[11] 29_285

58
kintex7/segbits_gtx_channel_2.origin_info.db
View File

@ -744,9 +744,37 @@ GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV2[9] origin:064-gtx-channel-conf 31_340
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV3[0] origin:064-gtx-channel-conf 30_288
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV3[1] origin:064-gtx-channel-conf 31_288
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[0] origin:064-gtx-channel-conf 30_456
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[10] origin:064-gtx-channel-conf 30_461
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[11] origin:064-gtx-channel-conf 31_461
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[12] origin:064-gtx-channel-conf 30_462
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[13] origin:064-gtx-channel-conf 31_462
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[14] origin:064-gtx-channel-conf 30_463
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[15] origin:064-gtx-channel-conf 31_463
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[16] origin:064-gtx-channel-conf 30_464
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[17] origin:064-gtx-channel-conf 31_464
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[18] origin:064-gtx-channel-conf 30_465
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[19] origin:064-gtx-channel-conf 31_465
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[1] origin:064-gtx-channel-conf 31_456
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[20] origin:064-gtx-channel-conf 30_466
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[21] origin:064-gtx-channel-conf 31_466
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[22] origin:064-gtx-channel-conf 30_467
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[23] origin:064-gtx-channel-conf 31_467
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[24] origin:064-gtx-channel-conf 30_468
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[25] origin:064-gtx-channel-conf 31_468
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[26] origin:064-gtx-channel-conf 30_469
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[27] origin:064-gtx-channel-conf 31_469
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[28] origin:064-gtx-channel-conf 30_470
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[29] origin:064-gtx-channel-conf 31_470
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[2] origin:064-gtx-channel-conf 30_457
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[30] origin:064-gtx-channel-conf 30_471
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[31] origin:064-gtx-channel-conf 31_471
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[3] origin:064-gtx-channel-conf 31_457
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[4] origin:064-gtx-channel-conf 30_458
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[5] origin:064-gtx-channel-conf 31_458
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[6] origin:064-gtx-channel-conf 30_459
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[7] origin:064-gtx-channel-conf 31_459
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[8] origin:064-gtx-channel-conf 30_460
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV4[9] origin:064-gtx-channel-conf 31_460
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV[0] origin:064-gtx-channel-conf 30_520
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV[10] origin:064-gtx-channel-conf 30_525
GTX_CHANNEL_2.GTXE2_CHANNEL.PMA_RSV[11] origin:064-gtx-channel-conf 31_525
@ -889,6 +917,7 @@ GTX_CHANNEL_2.GTXE2_CHANNEL.RXCDR_CFG[68] origin:064-gtx-channel-conf 30_674
GTX_CHANNEL_2.GTXE2_CHANNEL.RXCDR_CFG[69] origin:064-gtx-channel-conf 31_674
GTX_CHANNEL_2.GTXE2_CHANNEL.RXCDR_CFG[6] origin:064-gtx-channel-conf 30_643
GTX_CHANNEL_2.GTXE2_CHANNEL.RXCDR_CFG[70] origin:064-gtx-channel-conf 30_675
GTX_CHANNEL_2.GTXE2_CHANNEL.RXCDR_CFG[71] origin:064-gtx-channel-conf 31_675
GTX_CHANNEL_2.GTXE2_CHANNEL.RXCDR_CFG[7] origin:064-gtx-channel-conf 31_643
GTX_CHANNEL_2.GTXE2_CHANNEL.RXCDR_CFG[8] origin:064-gtx-channel-conf 30_644
GTX_CHANNEL_2.GTXE2_CHANNEL.RXCDR_CFG[9] origin:064-gtx-channel-conf 31_644
@ -902,6 +931,12 @@ GTX_CHANNEL_2.GTXE2_CHANNEL.RXCDR_LOCK_CFG[4] origin:064-gtx-channel-conf 30_634
GTX_CHANNEL_2.GTXE2_CHANNEL.RXCDR_LOCK_CFG[5] origin:064-gtx-channel-conf 31_634
GTX_CHANNEL_2.GTXE2_CHANNEL.RXCDR_PH_RESET_ON_EIDLE[0] origin:064-gtx-channel-conf 31_638
GTX_CHANNEL_2.GTXE2_CHANNEL.RXDFELPMRESET_TIME[0] origin:064-gtx-channel-conf 29_111
GTX_CHANNEL_2.GTXE2_CHANNEL.RXDFELPMRESET_TIME[1] origin:064-gtx-channel-conf 28_112
GTX_CHANNEL_2.GTXE2_CHANNEL.RXDFELPMRESET_TIME[2] origin:064-gtx-channel-conf 29_112
GTX_CHANNEL_2.GTXE2_CHANNEL.RXDFELPMRESET_TIME[3] origin:064-gtx-channel-conf 28_113
GTX_CHANNEL_2.GTXE2_CHANNEL.RXDFELPMRESET_TIME[4] origin:064-gtx-channel-conf 29_113
GTX_CHANNEL_2.GTXE2_CHANNEL.RXDFELPMRESET_TIME[5] origin:064-gtx-channel-conf 28_114
GTX_CHANNEL_2.GTXE2_CHANNEL.RXDFELPMRESET_TIME[6] origin:064-gtx-channel-conf 29_114
GTX_CHANNEL_2.GTXE2_CHANNEL.RXDLY_CFG[0] origin:064-gtx-channel-conf 28_680
GTX_CHANNEL_2.GTXE2_CHANNEL.RXDLY_CFG[10] origin:064-gtx-channel-conf 28_685
GTX_CHANNEL_2.GTXE2_CHANNEL.RXDLY_CFG[11] origin:064-gtx-channel-conf 29_685
@ -967,6 +1002,7 @@ GTX_CHANNEL_2.GTXE2_CHANNEL.RXLPM_LF_CFG[0] origin:064-gtx-channel-conf 28_344
GTX_CHANNEL_2.GTXE2_CHANNEL.RXLPM_LF_CFG[10] origin:064-gtx-channel-conf 28_349
GTX_CHANNEL_2.GTXE2_CHANNEL.RXLPM_LF_CFG[11] origin:064-gtx-channel-conf 29_349
GTX_CHANNEL_2.GTXE2_CHANNEL.RXLPM_LF_CFG[12] origin:064-gtx-channel-conf 28_350
GTX_CHANNEL_2.GTXE2_CHANNEL.RXLPM_LF_CFG[13] origin:064-gtx-channel-conf 29_350
GTX_CHANNEL_2.GTXE2_CHANNEL.RXLPM_LF_CFG[1] origin:064-gtx-channel-conf 29_344
GTX_CHANNEL_2.GTXE2_CHANNEL.RXLPM_LF_CFG[2] origin:064-gtx-channel-conf 28_345
GTX_CHANNEL_2.GTXE2_CHANNEL.RXLPM_LF_CFG[3] origin:064-gtx-channel-conf 29_345
@ -1176,14 +1212,36 @@ GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_H5_CFG[7] origin:064-gtx-channel-conf 29_275
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_H5_CFG[8] origin:064-gtx-channel-conf 28_276
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_H5_CFG[9] origin:064-gtx-channel-conf 29_276
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[0] origin:064-gtx-channel-conf 30_224
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[10] origin:064-gtx-channel-conf 31_312
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[11] origin:064-gtx-channel-conf 30_313
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[12] origin:064-gtx-channel-conf 31_313
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[13] origin:064-gtx-channel-conf 30_317
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[14] origin:064-gtx-channel-conf 31_317
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[15] origin:064-gtx-channel-conf 30_318
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[16] origin:064-gtx-channel-conf 31_318
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[17] origin:064-gtx-channel-conf 30_319
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[18] origin:064-gtx-channel-conf 31_347
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[19] origin:064-gtx-channel-conf 30_348
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[1] origin:064-gtx-channel-conf 31_224
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[20] origin:064-gtx-channel-conf 31_348
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[21] origin:064-gtx-channel-conf 30_349
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[22] origin:064-gtx-channel-conf 31_349
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[23] origin:064-gtx-channel-conf 30_350
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[24] origin:064-gtx-channel-conf 31_350
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[25] origin:064-gtx-channel-conf 30_351
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[26] origin:064-gtx-channel-conf 31_351
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[27] origin:064-gtx-channel-conf 31_417
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[28] origin:064-gtx-channel-conf 30_418
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[29] origin:064-gtx-channel-conf 31_418
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[2] origin:064-gtx-channel-conf 30_225
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[30] origin:064-gtx-channel-conf 30_419
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[3] origin:064-gtx-channel-conf 31_225
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[4] origin:064-gtx-channel-conf 31_229
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[5] origin:064-gtx-channel-conf 30_230
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[6] origin:064-gtx-channel-conf 31_230
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[7] origin:064-gtx-channel-conf 30_231
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[8] origin:064-gtx-channel-conf 31_231
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG2[9] origin:064-gtx-channel-conf 30_312
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG[0] origin:064-gtx-channel-conf 28_280
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG[10] origin:064-gtx-channel-conf 28_285
GTX_CHANNEL_2.GTXE2_CHANNEL.RX_DFE_KL_CFG[11] origin:064-gtx-channel-conf 29_285

58
kintex7/segbits_gtx_channel_3.db
View File

@ -744,9 +744,37 @@ GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV2[9] 31_340
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV3[0] 30_288
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV3[1] 31_288
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[0] 30_456
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[10] 30_461
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[11] 31_461
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[12] 30_462
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[13] 31_462
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[14] 30_463
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[15] 31_463
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[16] 30_464
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[17] 31_464
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[18] 30_465
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[19] 31_465
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[1] 31_456
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[20] 30_466
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[21] 31_466
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[22] 30_467
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[23] 31_467
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[24] 30_468
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[25] 31_468
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[26] 30_469
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[27] 31_469
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[28] 30_470
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[29] 31_470
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[2] 30_457
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[30] 30_471
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[31] 31_471
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[3] 31_457
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[4] 30_458
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[5] 31_458
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[6] 30_459
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[7] 31_459
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[8] 30_460
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[9] 31_460
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV[0] 30_520
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV[10] 30_525
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV[11] 31_525
@ -889,6 +917,7 @@ GTX_CHANNEL_3.GTXE2_CHANNEL.RXCDR_CFG[68] 30_674
GTX_CHANNEL_3.GTXE2_CHANNEL.RXCDR_CFG[69] 31_674
GTX_CHANNEL_3.GTXE2_CHANNEL.RXCDR_CFG[6] 30_643
GTX_CHANNEL_3.GTXE2_CHANNEL.RXCDR_CFG[70] 30_675
GTX_CHANNEL_3.GTXE2_CHANNEL.RXCDR_CFG[71] 31_675
GTX_CHANNEL_3.GTXE2_CHANNEL.RXCDR_CFG[7] 31_643
GTX_CHANNEL_3.GTXE2_CHANNEL.RXCDR_CFG[8] 30_644
GTX_CHANNEL_3.GTXE2_CHANNEL.RXCDR_CFG[9] 31_644
@ -902,6 +931,12 @@ GTX_CHANNEL_3.GTXE2_CHANNEL.RXCDR_LOCK_CFG[4] 30_634
GTX_CHANNEL_3.GTXE2_CHANNEL.RXCDR_LOCK_CFG[5] 31_634
GTX_CHANNEL_3.GTXE2_CHANNEL.RXCDR_PH_RESET_ON_EIDLE[0] 31_638
GTX_CHANNEL_3.GTXE2_CHANNEL.RXDFELPMRESET_TIME[0] 29_111
GTX_CHANNEL_3.GTXE2_CHANNEL.RXDFELPMRESET_TIME[1] 28_112
GTX_CHANNEL_3.GTXE2_CHANNEL.RXDFELPMRESET_TIME[2] 29_112
GTX_CHANNEL_3.GTXE2_CHANNEL.RXDFELPMRESET_TIME[3] 28_113
GTX_CHANNEL_3.GTXE2_CHANNEL.RXDFELPMRESET_TIME[4] 29_113
GTX_CHANNEL_3.GTXE2_CHANNEL.RXDFELPMRESET_TIME[5] 28_114
GTX_CHANNEL_3.GTXE2_CHANNEL.RXDFELPMRESET_TIME[6] 29_114
GTX_CHANNEL_3.GTXE2_CHANNEL.RXDLY_CFG[0] 28_680
GTX_CHANNEL_3.GTXE2_CHANNEL.RXDLY_CFG[10] 28_685
GTX_CHANNEL_3.GTXE2_CHANNEL.RXDLY_CFG[11] 29_685
@ -967,6 +1002,7 @@ GTX_CHANNEL_3.GTXE2_CHANNEL.RXLPM_LF_CFG[0] 28_344
GTX_CHANNEL_3.GTXE2_CHANNEL.RXLPM_LF_CFG[10] 28_349
GTX_CHANNEL_3.GTXE2_CHANNEL.RXLPM_LF_CFG[11] 29_349
GTX_CHANNEL_3.GTXE2_CHANNEL.RXLPM_LF_CFG[12] 28_350
GTX_CHANNEL_3.GTXE2_CHANNEL.RXLPM_LF_CFG[13] 29_350
GTX_CHANNEL_3.GTXE2_CHANNEL.RXLPM_LF_CFG[1] 29_344
GTX_CHANNEL_3.GTXE2_CHANNEL.RXLPM_LF_CFG[2] 28_345
GTX_CHANNEL_3.GTXE2_CHANNEL.RXLPM_LF_CFG[3] 29_345
@ -1176,14 +1212,36 @@ GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_H5_CFG[7] 29_275
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_H5_CFG[8] 28_276
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_H5_CFG[9] 29_276
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[0] 30_224
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[10] 31_312
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[11] 30_313
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[12] 31_313
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[13] 30_317
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[14] 31_317
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[15] 30_318
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[16] 31_318
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[17] 30_319
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[18] 31_347
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[19] 30_348
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[1] 31_224
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[20] 31_348
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[21] 30_349
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[22] 31_349
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[23] 30_350
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[24] 31_350
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[25] 30_351
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[26] 31_351
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[27] 31_417
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[28] 30_418
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[29] 31_418
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[2] 30_225
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[30] 30_419
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[3] 31_225
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[4] 31_229
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[5] 30_230
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[6] 31_230
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[7] 30_231
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[8] 31_231
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[9] 30_312
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG[0] 28_280
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG[10] 28_285
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG[11] 29_285

58
kintex7/segbits_gtx_channel_3.origin_info.db
View File

@ -744,9 +744,37 @@ GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV2[9] origin:064-gtx-channel-conf 31_340
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV3[0] origin:064-gtx-channel-conf 30_288
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV3[1] origin:064-gtx-channel-conf 31_288
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[0] origin:064-gtx-channel-conf 30_456
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[10] origin:064-gtx-channel-conf 30_461
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[11] origin:064-gtx-channel-conf 31_461
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[12] origin:064-gtx-channel-conf 30_462
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[13] origin:064-gtx-channel-conf 31_462
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[14] origin:064-gtx-channel-conf 30_463
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[15] origin:064-gtx-channel-conf 31_463
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[16] origin:064-gtx-channel-conf 30_464
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[17] origin:064-gtx-channel-conf 31_464
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[18] origin:064-gtx-channel-conf 30_465
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[19] origin:064-gtx-channel-conf 31_465
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[1] origin:064-gtx-channel-conf 31_456
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[20] origin:064-gtx-channel-conf 30_466
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[21] origin:064-gtx-channel-conf 31_466
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[22] origin:064-gtx-channel-conf 30_467
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[23] origin:064-gtx-channel-conf 31_467
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[24] origin:064-gtx-channel-conf 30_468
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[25] origin:064-gtx-channel-conf 31_468
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[26] origin:064-gtx-channel-conf 30_469
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[27] origin:064-gtx-channel-conf 31_469
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[28] origin:064-gtx-channel-conf 30_470
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[29] origin:064-gtx-channel-conf 31_470
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[2] origin:064-gtx-channel-conf 30_457
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[30] origin:064-gtx-channel-conf 30_471
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[31] origin:064-gtx-channel-conf 31_471
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[3] origin:064-gtx-channel-conf 31_457
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[4] origin:064-gtx-channel-conf 30_458
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[5] origin:064-gtx-channel-conf 31_458
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[6] origin:064-gtx-channel-conf 30_459
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[7] origin:064-gtx-channel-conf 31_459
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[8] origin:064-gtx-channel-conf 30_460
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV4[9] origin:064-gtx-channel-conf 31_460
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV[0] origin:064-gtx-channel-conf 30_520
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV[10] origin:064-gtx-channel-conf 30_525
GTX_CHANNEL_3.GTXE2_CHANNEL.PMA_RSV[11] origin:064-gtx-channel-conf 31_525
@ -889,6 +917,7 @@ GTX_CHANNEL_3.GTXE2_CHANNEL.RXCDR_CFG[68] origin:064-gtx-channel-conf 30_674
GTX_CHANNEL_3.GTXE2_CHANNEL.RXCDR_CFG[69] origin:064-gtx-channel-conf 31_674
GTX_CHANNEL_3.GTXE2_CHANNEL.RXCDR_CFG[6] origin:064-gtx-channel-conf 30_643
GTX_CHANNEL_3.GTXE2_CHANNEL.RXCDR_CFG[70] origin:064-gtx-channel-conf 30_675
GTX_CHANNEL_3.GTXE2_CHANNEL.RXCDR_CFG[71] origin:064-gtx-channel-conf 31_675
GTX_CHANNEL_3.GTXE2_CHANNEL.RXCDR_CFG[7] origin:064-gtx-channel-conf 31_643
GTX_CHANNEL_3.GTXE2_CHANNEL.RXCDR_CFG[8] origin:064-gtx-channel-conf 30_644
GTX_CHANNEL_3.GTXE2_CHANNEL.RXCDR_CFG[9] origin:064-gtx-channel-conf 31_644
@ -902,6 +931,12 @@ GTX_CHANNEL_3.GTXE2_CHANNEL.RXCDR_LOCK_CFG[4] origin:064-gtx-channel-conf 30_634
GTX_CHANNEL_3.GTXE2_CHANNEL.RXCDR_LOCK_CFG[5] origin:064-gtx-channel-conf 31_634
GTX_CHANNEL_3.GTXE2_CHANNEL.RXCDR_PH_RESET_ON_EIDLE[0] origin:064-gtx-channel-conf 31_638
GTX_CHANNEL_3.GTXE2_CHANNEL.RXDFELPMRESET_TIME[0] origin:064-gtx-channel-conf 29_111
GTX_CHANNEL_3.GTXE2_CHANNEL.RXDFELPMRESET_TIME[1] origin:064-gtx-channel-conf 28_112
GTX_CHANNEL_3.GTXE2_CHANNEL.RXDFELPMRESET_TIME[2] origin:064-gtx-channel-conf 29_112
GTX_CHANNEL_3.GTXE2_CHANNEL.RXDFELPMRESET_TIME[3] origin:064-gtx-channel-conf 28_113
GTX_CHANNEL_3.GTXE2_CHANNEL.RXDFELPMRESET_TIME[4] origin:064-gtx-channel-conf 29_113
GTX_CHANNEL_3.GTXE2_CHANNEL.RXDFELPMRESET_TIME[5] origin:064-gtx-channel-conf 28_114
GTX_CHANNEL_3.GTXE2_CHANNEL.RXDFELPMRESET_TIME[6] origin:064-gtx-channel-conf 29_114
GTX_CHANNEL_3.GTXE2_CHANNEL.RXDLY_CFG[0] origin:064-gtx-channel-conf 28_680
GTX_CHANNEL_3.GTXE2_CHANNEL.RXDLY_CFG[10] origin:064-gtx-channel-conf 28_685
GTX_CHANNEL_3.GTXE2_CHANNEL.RXDLY_CFG[11] origin:064-gtx-channel-conf 29_685
@ -967,6 +1002,7 @@ GTX_CHANNEL_3.GTXE2_CHANNEL.RXLPM_LF_CFG[0] origin:064-gtx-channel-conf 28_344
GTX_CHANNEL_3.GTXE2_CHANNEL.RXLPM_LF_CFG[10] origin:064-gtx-channel-conf 28_349
GTX_CHANNEL_3.GTXE2_CHANNEL.RXLPM_LF_CFG[11] origin:064-gtx-channel-conf 29_349
GTX_CHANNEL_3.GTXE2_CHANNEL.RXLPM_LF_CFG[12] origin:064-gtx-channel-conf 28_350
GTX_CHANNEL_3.GTXE2_CHANNEL.RXLPM_LF_CFG[13] origin:064-gtx-channel-conf 29_350
GTX_CHANNEL_3.GTXE2_CHANNEL.RXLPM_LF_CFG[1] origin:064-gtx-channel-conf 29_344
GTX_CHANNEL_3.GTXE2_CHANNEL.RXLPM_LF_CFG[2] origin:064-gtx-channel-conf 28_345
GTX_CHANNEL_3.GTXE2_CHANNEL.RXLPM_LF_CFG[3] origin:064-gtx-channel-conf 29_345
@ -1176,14 +1212,36 @@ GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_H5_CFG[7] origin:064-gtx-channel-conf 29_275
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_H5_CFG[8] origin:064-gtx-channel-conf 28_276
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_H5_CFG[9] origin:064-gtx-channel-conf 29_276
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[0] origin:064-gtx-channel-conf 30_224
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[10] origin:064-gtx-channel-conf 31_312
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[11] origin:064-gtx-channel-conf 30_313
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[12] origin:064-gtx-channel-conf 31_313
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[13] origin:064-gtx-channel-conf 30_317
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[14] origin:064-gtx-channel-conf 31_317
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[15] origin:064-gtx-channel-conf 30_318
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[16] origin:064-gtx-channel-conf 31_318
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[17] origin:064-gtx-channel-conf 30_319
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[18] origin:064-gtx-channel-conf 31_347
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[19] origin:064-gtx-channel-conf 30_348
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[1] origin:064-gtx-channel-conf 31_224
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[20] origin:064-gtx-channel-conf 31_348
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[21] origin:064-gtx-channel-conf 30_349
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[22] origin:064-gtx-channel-conf 31_349
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[23] origin:064-gtx-channel-conf 30_350
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[24] origin:064-gtx-channel-conf 31_350
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[25] origin:064-gtx-channel-conf 30_351
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[26] origin:064-gtx-channel-conf 31_351
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[27] origin:064-gtx-channel-conf 31_417
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[28] origin:064-gtx-channel-conf 30_418
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[29] origin:064-gtx-channel-conf 31_418
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[2] origin:064-gtx-channel-conf 30_225
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[30] origin:064-gtx-channel-conf 30_419
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[3] origin:064-gtx-channel-conf 31_225
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[4] origin:064-gtx-channel-conf 31_229
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[5] origin:064-gtx-channel-conf 30_230
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[6] origin:064-gtx-channel-conf 31_230
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[7] origin:064-gtx-channel-conf 30_231
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[8] origin:064-gtx-channel-conf 31_231
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG2[9] origin:064-gtx-channel-conf 30_312
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG[0] origin:064-gtx-channel-conf 28_280
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG[10] origin:064-gtx-channel-conf 28_285
GTX_CHANNEL_3.GTXE2_CHANNEL.RX_DFE_KL_CFG[11] origin:064-gtx-channel-conf 29_285