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prjxray-db
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Fixing the sorting order. 

Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
This commit is contained in:
Tim 'mithro' Ansell 2020-02-09 22:07:05 -06:00
parent 1c85daf1b1
commit db494e9d5d
473 changed files with 5059677 additions and 5059677 deletions
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946
Info.md
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10
artix7/element_counts.csv
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@ -1,9 +1,9 @@
type,count
tiles,18055
sites,15509
nodes,1953452
package_pins,484
pips,22002368
site_pins,534165
site_pips,1189418
pips,22002368
package_pins,484
nodes,1953452
sites,15509
tiles,18055
wires,6193757

1 type count
2 tiles nodes 18055 1953452
3 sites package_pins 15509 484
4 pips 22002368
5 site_pins 534165
6 site_pips 1189418
7 pips sites 22002368 15509
8 package_pins tiles 484 18055
nodes 1953452
9 wires 6193757

1764370
artix7/gridinfo/grid-xc7a50tfgg484-1-db.txt
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580
artix7/harness/arty-a7/pmod/design.json
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@ -23,13 +23,6 @@
"CMT_FIFO_R_X7Y112/CMT_FIFO_EE2A2_1",
"CMT_TOP_R_LOWER_B_X8Y113/CMT_TOP_EE2A2_2",
"INT_INTERFACE_R_X1Y102/INT_INTERFACE_EE2A2",
"INT_L_X0Y100/LV_L16",
"INT_L_X0Y100/NN6D2",
"INT_L_X0Y101/LV_L17",
"INT_L_X0Y101/NN6E2",
"INT_L_X0Y102/EE2BEG2",
"INT_L_X0Y102/LV_L18",
"INT_L_X0Y102/NN6END2",
"INT_L_X0Y78/LOGIC_OUTS_L18",
"INT_L_X0Y78/NN6BEG0",
"INT_L_X0Y79/NN6A0",
@ -72,6 +65,13 @@
"INT_L_X0Y98/NN6B2",
"INT_L_X0Y99/LV_L15",
"INT_L_X0Y99/NN6C2",
"INT_L_X0Y100/LV_L16",
"INT_L_X0Y100/NN6D2",
"INT_L_X0Y101/LV_L17",
"INT_L_X0Y101/NN6E2",
"INT_L_X0Y102/EE2BEG2",
"INT_L_X0Y102/LV_L18",
"INT_L_X0Y102/NN6END2",
"INT_R_X1Y102/EE2A2",
"IO_INT_INTERFACE_L_X0Y78/INT_INTERFACE_LOGIC_OUTS_L18",
"IO_INT_INTERFACE_L_X0Y78/INT_INTERFACE_LOGIC_OUTS_L_B18",
@ -96,16 +96,6 @@
"CMT_FIFO_R_X7Y112/CMT_FIFO_EE2A2_3",
"CMT_TOP_R_LOWER_B_X8Y113/CMT_TOP_EE2A2_4",
"INT_INTERFACE_R_X1Y104/INT_INTERFACE_EE2A2",
"INT_L_X0Y100/LV_L17",
"INT_L_X0Y100/NN6B1",
"INT_L_X0Y101/LV_L18",
"INT_L_X0Y101/NN6C1",
"INT_L_X0Y102/NN6D1",
"INT_L_X0Y103/NN6E1",
"INT_L_X0Y104/EE2BEG2",
"INT_L_X0Y104/ER1END2",
"INT_L_X0Y104/NN6END1",
"INT_L_X0Y104/WR1BEG2",
"INT_L_X0Y77/LOGIC_OUTS_L18",
"INT_L_X0Y77/NN6BEG0",
"INT_L_X0Y78/NN6A0",
@ -141,19 +131,29 @@
"INT_L_X0Y98/NN6END1",
"INT_L_X0Y99/LV_L16",
"INT_L_X0Y99/NN6A1",
"INT_L_X0Y100/LV_L17",
"INT_L_X0Y100/NN6B1",
"INT_L_X0Y101/LV_L18",
"INT_L_X0Y101/NN6C1",
"INT_L_X0Y102/NN6D1",
"INT_L_X0Y103/NN6E1",
"INT_L_X0Y104/EE2BEG2",
"INT_L_X0Y104/ER1END2",
"INT_L_X0Y104/NN6END1",
"INT_L_X0Y104/WR1BEG2",
"INT_R_X1Y104/EE2A2",
"IO_INT_INTERFACE_L_X0Y104/INT_INTERFACE_ER1BEG2",
"IO_INT_INTERFACE_L_X0Y104/INT_INTERFACE_WR1END2",
"IO_INT_INTERFACE_L_X0Y77/INT_INTERFACE_LOGIC_OUTS_L18",
"IO_INT_INTERFACE_L_X0Y77/INT_INTERFACE_LOGIC_OUTS_L_B18",
"IO_INT_INTERFACE_L_X0Y104/INT_INTERFACE_ER1BEG2",
"IO_INT_INTERFACE_L_X0Y104/INT_INTERFACE_WR1END2",
"LIOB33_X0Y77/IOB_IBUF1",
"LIOI3_X0Y77/IOI_ILOGIC1_O",
"LIOI3_X0Y77/IOI_LOGIC_OUTS18_0",
"LIOI3_X0Y77/LIOI_I1",
"LIOI3_X0Y77/LIOI_IBUF1",
"LIOI3_X0Y77/LIOI_ILOGIC1_D",
"L_TERM_INT_X2Y109/L_TERM_INT_WR1BEG3",
"L_TERM_INT_X2Y81/TERM_INT_LOGIC_OUTS_L_B18",
"L_TERM_INT_X2Y109/L_TERM_INT_WR1BEG3",
"VBRK_X9Y109/VBRK_EE2A2"
]
},
@ -167,28 +167,6 @@
"CMT_FIFO_R_X7Y112/CMT_FIFO_EE2A2_5",
"CMT_TOP_R_LOWER_B_X8Y113/CMT_TOP_EE2A2_6",
"INT_INTERFACE_R_X1Y106/INT_INTERFACE_EE2A2",
"INT_L_X0Y100/LVB_L0",
"INT_L_X0Y100/LV_L18",
"INT_L_X0Y101/LVB_L1",
"INT_L_X0Y102/LVB_L2",
"INT_L_X0Y103/LVB_L3",
"INT_L_X0Y104/LVB_L4",
"INT_L_X0Y105/LVB_L5",
"INT_L_X0Y106/EE2BEG2",
"INT_L_X0Y106/LVB_L6",
"INT_L_X0Y106/SS6END2",
"INT_L_X0Y107/LVB_L7",
"INT_L_X0Y107/SS6E2",
"INT_L_X0Y108/LVB_L8",
"INT_L_X0Y108/SS6D2",
"INT_L_X0Y109/LVB_L9",
"INT_L_X0Y109/SS6C2",
"INT_L_X0Y110/LVB_L10",
"INT_L_X0Y110/SS6B2",
"INT_L_X0Y111/LVB_L11",
"INT_L_X0Y111/SS6A2",
"INT_L_X0Y112/LVB_L12",
"INT_L_X0Y112/SS6BEG2",
"INT_L_X0Y76/LOGIC_OUTS_L18",
"INT_L_X0Y76/NN6BEG0",
"INT_L_X0Y77/NN6A0",
@ -216,6 +194,28 @@
"INT_L_X0Y97/LV_L15",
"INT_L_X0Y98/LV_L16",
"INT_L_X0Y99/LV_L17",
"INT_L_X0Y100/LVB_L0",
"INT_L_X0Y100/LV_L18",
"INT_L_X0Y101/LVB_L1",
"INT_L_X0Y102/LVB_L2",
"INT_L_X0Y103/LVB_L3",
"INT_L_X0Y104/LVB_L4",
"INT_L_X0Y105/LVB_L5",
"INT_L_X0Y106/EE2BEG2",
"INT_L_X0Y106/LVB_L6",
"INT_L_X0Y106/SS6END2",
"INT_L_X0Y107/LVB_L7",
"INT_L_X0Y107/SS6E2",
"INT_L_X0Y108/LVB_L8",
"INT_L_X0Y108/SS6D2",
"INT_L_X0Y109/LVB_L9",
"INT_L_X0Y109/SS6C2",
"INT_L_X0Y110/LVB_L10",
"INT_L_X0Y110/SS6B2",
"INT_L_X0Y111/LVB_L11",
"INT_L_X0Y111/SS6A2",
"INT_L_X0Y112/LVB_L12",
"INT_L_X0Y112/SS6BEG2",
"INT_R_X1Y106/EE2A2",
"IO_INT_INTERFACE_L_X0Y76/INT_INTERFACE_LOGIC_OUTS_L18",
"IO_INT_INTERFACE_L_X0Y76/INT_INTERFACE_LOGIC_OUTS_L_B18",
@ -239,18 +239,6 @@
"CMT_FIFO_R_X7Y112/CMT_FIFO_EE2A2_7",
"CMT_TOP_R_LOWER_B_X8Y113/CMT_TOP_EE2A2_8",
"INT_INTERFACE_R_X1Y108/INT_INTERFACE_EE2A2",
"INT_L_X0Y100/NN6A3",
"INT_L_X0Y101/NN6B3",
"INT_L_X0Y102/NN6C3",
"INT_L_X0Y103/NN6D3",
"INT_L_X0Y104/NN6E3",
"INT_L_X0Y105/NN2BEG3",
"INT_L_X0Y105/NN6END3",
"INT_L_X0Y106/NN2A3",
"INT_L_X0Y107/NL1BEG2",
"INT_L_X0Y107/NN2END3",
"INT_L_X0Y108/EE2BEG2",
"INT_L_X0Y108/NL1END2",
"INT_L_X0Y75/LOGIC_OUTS_L18",
"INT_L_X0Y75/NN6BEG0",
"INT_L_X0Y76/NN6A0",
@ -280,6 +268,18 @@
"INT_L_X0Y98/LV_L17",
"INT_L_X0Y99/LV_L18",
"INT_L_X0Y99/NN6BEG3",
"INT_L_X0Y100/NN6A3",
"INT_L_X0Y101/NN6B3",
"INT_L_X0Y102/NN6C3",
"INT_L_X0Y103/NN6D3",
"INT_L_X0Y104/NN6E3",
"INT_L_X0Y105/NN2BEG3",
"INT_L_X0Y105/NN6END3",
"INT_L_X0Y106/NN2A3",
"INT_L_X0Y107/NL1BEG2",
"INT_L_X0Y107/NN2END3",
"INT_L_X0Y108/EE2BEG2",
"INT_L_X0Y108/NL1END2",
"INT_R_X1Y108/EE2A2",
"IO_INT_INTERFACE_L_X0Y75/INT_INTERFACE_LOGIC_OUTS_L18",
"IO_INT_INTERFACE_L_X0Y75/INT_INTERFACE_LOGIC_OUTS_L_B18",
@ -304,20 +304,6 @@
"CMT_TOP_R_LOWER_B_X8Y113/CMT_TOP_EE2A2_10",
"HCLK_L_X4Y78/HCLK_LV1",
"INT_INTERFACE_R_X1Y110/INT_INTERFACE_EE2A2",
"INT_L_X0Y100/LVB_L9",
"INT_L_X0Y101/LVB_L10",
"INT_L_X0Y102/LVB_L11",
"INT_L_X0Y103/LVB_L12",
"INT_L_X0Y103/NN6BEG2",
"INT_L_X0Y104/NN6A2",
"INT_L_X0Y105/NN6B2",
"INT_L_X0Y106/NN6C2",
"INT_L_X0Y107/NN6D2",
"INT_L_X0Y108/NN6E2",
"INT_L_X0Y109/NN6END2",
"INT_L_X0Y109/NR1BEG2",
"INT_L_X0Y110/EE2BEG2",
"INT_L_X0Y110/NR1END2",
"INT_L_X0Y54/LOGIC_OUTS_L18",
"INT_L_X0Y54/NR1BEG0",
"INT_L_X0Y55/LV_L0",
@ -368,6 +354,20 @@
"INT_L_X0Y97/LVB_L6",
"INT_L_X0Y98/LVB_L7",
"INT_L_X0Y99/LVB_L8",
"INT_L_X0Y100/LVB_L9",
"INT_L_X0Y101/LVB_L10",
"INT_L_X0Y102/LVB_L11",
"INT_L_X0Y103/LVB_L12",
"INT_L_X0Y103/NN6BEG2",
"INT_L_X0Y104/NN6A2",
"INT_L_X0Y105/NN6B2",
"INT_L_X0Y106/NN6C2",
"INT_L_X0Y107/NN6D2",
"INT_L_X0Y108/NN6E2",
"INT_L_X0Y109/NN6END2",
"INT_L_X0Y109/NR1BEG2",
"INT_L_X0Y110/EE2BEG2",
"INT_L_X0Y110/NR1END2",
"INT_R_X1Y110/EE2A2",
"IO_INT_INTERFACE_L_X0Y54/INT_INTERFACE_LOGIC_OUTS_L18",
"IO_INT_INTERFACE_L_X0Y54/INT_INTERFACE_LOGIC_OUTS_L_B18",
@ -392,26 +392,6 @@
"CMT_TOP_R_LOWER_B_X8Y113/CMT_TOP_EE2A2_12",
"HCLK_L_X4Y78/HCLK_LV2",
"INT_INTERFACE_R_X1Y112/INT_INTERFACE_EE2A2",
"INT_L_X0Y100/LV_L10",
"INT_L_X0Y101/LV_L11",
"INT_L_X0Y102/LV_L12",
"INT_L_X0Y103/LV_L13",
"INT_L_X0Y104/LV_L14",
"INT_L_X0Y105/LV_L15",
"INT_L_X0Y106/LV_L16",
"INT_L_X0Y107/LV_L17",
"INT_L_X0Y108/LV_L18",
"INT_L_X0Y108/NE6A3",
"INT_L_X0Y108/NW6BEG3",
"INT_L_X0Y109/NE6B3",
"INT_L_X0Y110/NE6C3",
"INT_L_X0Y111/NE6D3",
"INT_L_X0Y112/EE2BEG2",
"INT_L_X0Y112/EL1END2",
"INT_L_X0Y112/NE6E3",
"INT_L_X0Y112/WL1BEG2",
"INT_L_X0Y112/WR1END_S1_0",
"INT_L_X0Y113/WR1END0",
"INT_L_X0Y53/LOGIC_OUTS_L18",
"INT_L_X0Y53/NR1BEG0",
"INT_L_X0Y54/LV_L0",
@ -463,25 +443,45 @@
"INT_L_X0Y97/LV_L7",
"INT_L_X0Y98/LV_L8",
"INT_L_X0Y99/LV_L9",
"INT_L_X0Y100/LV_L10",
"INT_L_X0Y101/LV_L11",
"INT_L_X0Y102/LV_L12",
"INT_L_X0Y103/LV_L13",
"INT_L_X0Y104/LV_L14",
"INT_L_X0Y105/LV_L15",
"INT_L_X0Y106/LV_L16",
"INT_L_X0Y107/LV_L17",
"INT_L_X0Y108/LV_L18",
"INT_L_X0Y108/NE6A3",
"INT_L_X0Y108/NW6BEG3",
"INT_L_X0Y109/NE6B3",
"INT_L_X0Y110/NE6C3",
"INT_L_X0Y111/NE6D3",
"INT_L_X0Y112/EE2BEG2",
"INT_L_X0Y112/EL1END2",
"INT_L_X0Y112/NE6E3",
"INT_L_X0Y112/WL1BEG2",
"INT_L_X0Y112/WR1END_S1_0",
"INT_L_X0Y113/WR1END0",
"INT_R_X1Y112/EE2A2",
"INT_R_X1Y112/NE6END3",
"INT_R_X1Y112/WR1BEG_S0",
"INT_R_X1Y113/WR1BEG0",
"IO_INT_INTERFACE_L_X0Y53/INT_INTERFACE_LOGIC_OUTS_L18",
"IO_INT_INTERFACE_L_X0Y53/INT_INTERFACE_LOGIC_OUTS_L_B18",
"IO_INT_INTERFACE_L_X0Y108/INT_INTERFACE_NE4BEG3",
"IO_INT_INTERFACE_L_X0Y108/INT_INTERFACE_NW4A3",
"IO_INT_INTERFACE_L_X0Y112/INT_INTERFACE_EL1BEG2",
"IO_INT_INTERFACE_L_X0Y112/INT_INTERFACE_WL1END2",
"IO_INT_INTERFACE_L_X0Y53/INT_INTERFACE_LOGIC_OUTS_L18",
"IO_INT_INTERFACE_L_X0Y53/INT_INTERFACE_LOGIC_OUTS_L_B18",
"LIOB33_X0Y53/IOB_IBUF1",
"LIOI3_X0Y53/IOI_ILOGIC1_O",
"LIOI3_X0Y53/IOI_LOGIC_OUTS18_0",
"LIOI3_X0Y53/LIOI_I1",
"LIOI3_X0Y53/LIOI_IBUF1",
"LIOI3_X0Y53/LIOI_ILOGIC1_D",
"L_TERM_INT_X2Y56/TERM_INT_LOGIC_OUTS_L_B18",
"L_TERM_INT_X2Y113/L_TERM_INT_NW4BEG3",
"L_TERM_INT_X2Y117/L_TERM_INT_WL1BEG2",
"L_TERM_INT_X2Y56/TERM_INT_LOGIC_OUTS_L_B18",
"VBRK_X9Y117/VBRK_EE2A2"
]
},
@ -496,24 +496,6 @@
"CMT_TOP_R_LOWER_B_X8Y113/CMT_TOP_EE2A2_14",
"HCLK_L_X4Y78/HCLK_LV3",
"INT_INTERFACE_R_X1Y114/INT_INTERFACE_EE2A2",
"INT_L_X0Y100/LV_L11",
"INT_L_X0Y101/LV_L12",
"INT_L_X0Y102/LV_L13",
"INT_L_X0Y103/LV_L14",
"INT_L_X0Y104/LV_L15",
"INT_L_X0Y105/LV_L16",
"INT_L_X0Y106/LV_L17",
"INT_L_X0Y107/LV_L18",
"INT_L_X0Y107/NN6BEG3",
"INT_L_X0Y108/NN6A3",
"INT_L_X0Y109/NN6B3",
"INT_L_X0Y110/NN6C3",
"INT_L_X0Y111/NN6D3",
"INT_L_X0Y112/NN6E3",
"INT_L_X0Y113/NL1BEG2",
"INT_L_X0Y113/NN6END3",
"INT_L_X0Y114/EE2BEG2",
"INT_L_X0Y114/NL1END2",
"INT_L_X0Y52/LOGIC_OUTS_L18",
"INT_L_X0Y52/NR1BEG0",
"INT_L_X0Y53/LV_L0",
@ -566,6 +548,24 @@
"INT_L_X0Y97/LV_L8",
"INT_L_X0Y98/LV_L9",
"INT_L_X0Y99/LV_L10",
"INT_L_X0Y100/LV_L11",
"INT_L_X0Y101/LV_L12",
"INT_L_X0Y102/LV_L13",
"INT_L_X0Y103/LV_L14",
"INT_L_X0Y104/LV_L15",
"INT_L_X0Y105/LV_L16",
"INT_L_X0Y106/LV_L17",
"INT_L_X0Y107/LV_L18",
"INT_L_X0Y107/NN6BEG3",
"INT_L_X0Y108/NN6A3",
"INT_L_X0Y109/NN6B3",
"INT_L_X0Y110/NN6C3",
"INT_L_X0Y111/NN6D3",
"INT_L_X0Y112/NN6E3",
"INT_L_X0Y113/NL1BEG2",
"INT_L_X0Y113/NN6END3",
"INT_L_X0Y114/EE2BEG2",
"INT_L_X0Y114/NL1END2",
"INT_R_X1Y114/EE2A2",
"IO_INT_INTERFACE_L_X0Y52/INT_INTERFACE_LOGIC_OUTS_L18",
"IO_INT_INTERFACE_L_X0Y52/INT_INTERFACE_LOGIC_OUTS_L_B18",
@ -590,22 +590,6 @@
"CMT_TOP_R_LOWER_T_X8Y122/CMT_TOP_EE2A2_0",
"HCLK_L_X4Y78/HCLK_LV4",
"INT_INTERFACE_R_X1Y116/INT_INTERFACE_EE2A2",
"INT_L_X0Y100/LV_L12",
"INT_L_X0Y101/LV_L13",
"INT_L_X0Y102/LV_L14",
"INT_L_X0Y103/LV_L15",
"INT_L_X0Y104/LV_L16",
"INT_L_X0Y105/LV_L17",
"INT_L_X0Y106/LV_L18",
"INT_L_X0Y106/NE6A3",
"INT_L_X0Y106/NW6BEG3",
"INT_L_X0Y107/NE6B3",
"INT_L_X0Y108/NE6C3",
"INT_L_X0Y109/NE6D3",
"INT_L_X0Y110/NE6E3",
"INT_L_X0Y116/EE2BEG2",
"INT_L_X0Y116/EE2END2",
"INT_L_X0Y116/WW2A2",
"INT_L_X0Y51/LOGIC_OUTS_L18",
"INT_L_X0Y51/NR1BEG0",
"INT_L_X0Y52/LV_L0",
@ -659,6 +643,22 @@
"INT_L_X0Y97/LV_L9",
"INT_L_X0Y98/LV_L10",
"INT_L_X0Y99/LV_L11",
"INT_L_X0Y100/LV_L12",
"INT_L_X0Y101/LV_L13",
"INT_L_X0Y102/LV_L14",
"INT_L_X0Y103/LV_L15",
"INT_L_X0Y104/LV_L16",
"INT_L_X0Y105/LV_L17",
"INT_L_X0Y106/LV_L18",
"INT_L_X0Y106/NE6A3",
"INT_L_X0Y106/NW6BEG3",
"INT_L_X0Y107/NE6B3",
"INT_L_X0Y108/NE6C3",
"INT_L_X0Y109/NE6D3",
"INT_L_X0Y110/NE6E3",
"INT_L_X0Y116/EE2BEG2",
"INT_L_X0Y116/EE2END2",
"INT_L_X0Y116/WW2A2",
"INT_R_X1Y110/NE6END3",
"INT_R_X1Y110/NN6BEG3",
"INT_R_X1Y111/NN6A3",
@ -669,21 +669,21 @@
"INT_R_X1Y116/EE2A2",
"INT_R_X1Y116/NN6END3",
"INT_R_X1Y116/WW2BEG2",
"IO_INT_INTERFACE_L_X0Y51/INT_INTERFACE_LOGIC_OUTS_L18",
"IO_INT_INTERFACE_L_X0Y51/INT_INTERFACE_LOGIC_OUTS_L_B18",
"IO_INT_INTERFACE_L_X0Y106/INT_INTERFACE_NE4BEG3",
"IO_INT_INTERFACE_L_X0Y106/INT_INTERFACE_NW4A3",
"IO_INT_INTERFACE_L_X0Y116/INT_INTERFACE_EE2A2",
"IO_INT_INTERFACE_L_X0Y116/INT_INTERFACE_WW2END2",
"IO_INT_INTERFACE_L_X0Y51/INT_INTERFACE_LOGIC_OUTS_L18",
"IO_INT_INTERFACE_L_X0Y51/INT_INTERFACE_LOGIC_OUTS_L_B18",
"LIOB33_X0Y51/IOB_IBUF1",
"LIOI3_X0Y51/IOI_ILOGIC1_O",
"LIOI3_X0Y51/IOI_LOGIC_OUTS18_0",
"LIOI3_X0Y51/LIOI_I1",
"LIOI3_X0Y51/LIOI_IBUF1",
"LIOI3_X0Y51/LIOI_ILOGIC1_D",
"L_TERM_INT_X2Y54/TERM_INT_LOGIC_OUTS_L_B18",
"L_TERM_INT_X2Y111/L_TERM_INT_NW4BEG3",
"L_TERM_INT_X2Y121/L_TERM_INT_WW2A2",
"L_TERM_INT_X2Y54/TERM_INT_LOGIC_OUTS_L_B18",
"VBRK_X9Y121/VBRK_EE2A2"
]
},
@ -840,18 +840,6 @@
"CLK_BUFG_BOT_R_X60Y48.BUFGCTRL.BUFGCTRL_X0Y0.ZINV_S0",
"CLK_BUFG_BOT_R_X60Y48.CLK_BUFG_BUFGCTRL0_I0.CLK_BUFG_IMUX24_0",
"CLK_BUFG_BOT_R_X60Y48.CLK_BUFG_BUFGCTRL0_I1.CLK_BUFG_IMUX28_0",
"CLK_BUFG_BOT_R_X60Y48.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_IMUX30_2",
"CLK_BUFG_BOT_R_X60Y48.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_IMUX30_2",
"CLK_BUFG_BOT_R_X60Y48.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_IMUX31_2",
"CLK_BUFG_BOT_R_X60Y48.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_IMUX31_2",
"CLK_BUFG_BOT_R_X60Y48.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_IMUX28_3",
"CLK_BUFG_BOT_R_X60Y48.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_IMUX28_3",
"CLK_BUFG_BOT_R_X60Y48.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_IMUX29_3",
"CLK_BUFG_BOT_R_X60Y48.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_IMUX29_3",
"CLK_BUFG_BOT_R_X60Y48.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_IMUX30_3",
"CLK_BUFG_BOT_R_X60Y48.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_IMUX30_3",
"CLK_BUFG_BOT_R_X60Y48.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_IMUX31_3",
"CLK_BUFG_BOT_R_X60Y48.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_IMUX31_3",
"CLK_BUFG_BOT_R_X60Y48.CLK_BUFG_BUFGCTRL1_I0.CLK_BUFG_IMUX29_0",
"CLK_BUFG_BOT_R_X60Y48.CLK_BUFG_BUFGCTRL1_I1.CLK_BUFG_IMUX29_0",
"CLK_BUFG_BOT_R_X60Y48.CLK_BUFG_BUFGCTRL2_I0.CLK_BUFG_IMUX30_0",
@ -870,11 +858,19 @@
"CLK_BUFG_BOT_R_X60Y48.CLK_BUFG_BUFGCTRL8_I1.CLK_BUFG_IMUX28_2",
"CLK_BUFG_BOT_R_X60Y48.CLK_BUFG_BUFGCTRL9_I0.CLK_BUFG_IMUX29_2",
"CLK_BUFG_BOT_R_X60Y48.CLK_BUFG_BUFGCTRL9_I1.CLK_BUFG_IMUX29_2",
"CLK_BUFG_BOT_R_X60Y48.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_IMUX30_2",
"CLK_BUFG_BOT_R_X60Y48.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_IMUX30_2",
"CLK_BUFG_BOT_R_X60Y48.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_IMUX31_2",
"CLK_BUFG_BOT_R_X60Y48.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_IMUX31_2",
"CLK_BUFG_BOT_R_X60Y48.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_IMUX28_3",
"CLK_BUFG_BOT_R_X60Y48.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_IMUX28_3",
"CLK_BUFG_BOT_R_X60Y48.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_IMUX29_3",
"CLK_BUFG_BOT_R_X60Y48.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_IMUX29_3",
"CLK_BUFG_BOT_R_X60Y48.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_IMUX30_3",
"CLK_BUFG_BOT_R_X60Y48.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_IMUX30_3",
"CLK_BUFG_BOT_R_X60Y48.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_IMUX31_3",
"CLK_BUFG_BOT_R_X60Y48.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_IMUX31_3",
"CLK_BUFG_BOT_R_X60Y48.CLK_BUFG_CK_GCLK0.CLK_BUFG_BUFGCTRL0_O",
"CLK_BUFG_REBUF_X60Y117.CLK_BUFG_REBUF_R_CK_GCLK0_TOP.CLK_BUFG_REBUF_R_CK_GCLK0_BOT",
"CLK_BUFG_REBUF_X60Y117.GCLK0_ENABLE_ABOVE",
"CLK_BUFG_REBUF_X60Y117.GCLK0_ENABLE_BELOW",
"CLK_BUFG_REBUF_X60Y142.GCLK0_ENABLE_ABOVE",
"CLK_BUFG_REBUF_X60Y38.GCLK0_ENABLE_BELOW",
"CLK_BUFG_REBUF_X60Y65.CLK_BUFG_REBUF_R_CK_GCLK0_TOP.CLK_BUFG_REBUF_R_CK_GCLK0_BOT",
"CLK_BUFG_REBUF_X60Y65.GCLK0_ENABLE_ABOVE",
@ -882,14 +878,122 @@
"CLK_BUFG_REBUF_X60Y90.CLK_BUFG_REBUF_R_CK_GCLK0_TOP.CLK_BUFG_REBUF_R_CK_GCLK0_BOT",
"CLK_BUFG_REBUF_X60Y90.GCLK0_ENABLE_ABOVE",
"CLK_BUFG_REBUF_X60Y90.GCLK0_ENABLE_BELOW",
"CLK_BUFG_REBUF_X60Y117.CLK_BUFG_REBUF_R_CK_GCLK0_TOP.CLK_BUFG_REBUF_R_CK_GCLK0_BOT",
"CLK_BUFG_REBUF_X60Y117.GCLK0_ENABLE_ABOVE",
"CLK_BUFG_REBUF_X60Y117.GCLK0_ENABLE_BELOW",
"CLK_BUFG_REBUF_X60Y142.GCLK0_ENABLE_ABOVE",
"CLK_HROW_TOP_R_X60Y78.CLK_HROW_R_CK_GCLK0_ACTIVE",
"CLK_HROW_TOP_R_X60Y130.BUFHCE.BUFHCE_X0Y0.IN_USE",
"CLK_HROW_TOP_R_X60Y130.BUFHCE.BUFHCE_X0Y0.ZINV_CE",
"CLK_HROW_TOP_R_X60Y130.CLK_HROW_CK_MUX_OUT_L0.CLK_HROW_R_CK_GCLK0",
"CLK_HROW_TOP_R_X60Y130.CLK_HROW_R_CK_GCLK0_ACTIVE",
"CLK_HROW_TOP_R_X60Y78.CLK_HROW_R_CK_GCLK0_ACTIVE",
"HCLK_CMT_X8Y130.HCLK_CMT_CK_BUFHCLK0_USED",
"INT_L_X0Y3.FAN_ALT1.SS2END2",
"INT_L_X0Y3.IMUX_L34.FAN_BOUNCE1",
"INT_L_X0Y4.IMUX_L34.SS2END1",
"INT_L_X0Y5.BYP_ALT0.SS2END0",
"INT_L_X0Y5.IMUX_L34.BYP_BOUNCE0",
"INT_L_X0Y5.SS2BEG2.SS6END2",
"INT_L_X0Y6.FAN_ALT1.EL1END3",
"INT_L_X0Y6.IMUX_L34.FAN_BOUNCE1",
"INT_L_X0Y6.SS2BEG1.SR1END1",
"INT_L_X0Y7.FAN_ALT1.SS2END2",
"INT_L_X0Y7.IMUX_L34.FAN_BOUNCE1",
"INT_L_X0Y7.SR1BEG1.SS2END0",
"INT_L_X0Y7.SS2BEG0.SS6END0",
"INT_L_X0Y7.WL1BEG_N3.SW6END0",
"INT_L_X0Y8.IMUX_L34.WW2END0",
"INT_L_X0Y9.IMUX_L34.SL1END1",
"INT_L_X0Y9.SS2BEG0.SS6END0",
"INT_L_X0Y9.SS2BEG2.SS6END2",
"INT_L_X0Y10.IMUX_L34.SS2END1",
"INT_L_X0Y10.SL1BEG1.SR1END1",
"INT_L_X0Y11.SR1BEG1.SS6END0",
"INT_L_X0Y11.SS6BEG2.SS6END2",
"INT_L_X0Y12.SS2BEG1.SR1END1",
"INT_L_X0Y13.SE6BEG0.SS6END0",
"INT_L_X0Y13.SR1BEG1.SS2END0",
"INT_L_X0Y13.SS6BEG0.LV_L0",
"INT_L_X0Y15.SS2BEG0.SS6END0",
"INT_L_X0Y15.SS6BEG0.LV_L0",
"INT_L_X0Y15.SS6BEG2.SS6END2",
"INT_L_X0Y17.SS6BEG0.SS6END0",
"INT_L_X0Y17.SS6BEG2.SS6END2",
"INT_L_X0Y19.SS6BEG0.SS6END0",
"INT_L_X0Y21.SS6BEG0.LV_L0",
"INT_L_X0Y21.SS6BEG2.SS6END2",
"INT_L_X0Y23.SS6BEG0.LV_L0",
"INT_L_X0Y23.SS6BEG2.SS6END2",
"INT_L_X0Y25.SS6BEG0.LV_L0",
"INT_L_X0Y27.SS6BEG2.SS6END2",
"INT_L_X0Y29.SS6BEG2.SS6END2",
"INT_L_X0Y31.LV_L18.LV_L0",
"INT_L_X0Y33.LV_L18.LV_L0",
"INT_L_X0Y33.SS6BEG2.SS6END2",
"INT_L_X0Y35.SS6BEG2.SS6END2",
"INT_L_X0Y39.LV_L18.LV_L0",
"INT_L_X0Y39.SS6BEG2.SS6END2",
"INT_L_X0Y41.LV_L18.LV_L0",
"INT_L_X0Y41.SS6BEG2.SS6END2",
"INT_L_X0Y43.LV_L18.LV_L0",
"INT_L_X0Y45.SS6BEG2.SS6END2",
"INT_L_X0Y47.SS6BEG2.SS6END2",
"INT_L_X0Y49.LV_L18.LV_L0",
"INT_L_X0Y51.LV_L18.LV_L0",
"INT_L_X0Y51.NR1BEG0.LOGIC_OUTS_L18",
"INT_L_X0Y51.SS6BEG2.SS6END2",
"INT_L_X0Y52.LV_L0.NR1END0",
"INT_L_X0Y52.NR1BEG0.LOGIC_OUTS_L18",
"INT_L_X0Y53.LV_L0.NR1END0",
"INT_L_X0Y53.NR1BEG0.LOGIC_OUTS_L18",
"INT_L_X0Y53.SS6BEG2.SS6END2",
"INT_L_X0Y54.LV_L0.NR1END0",
"INT_L_X0Y54.NR1BEG0.LOGIC_OUTS_L18",
"INT_L_X0Y55.LV_L0.NR1END0",
"INT_L_X0Y57.LV_L18.LV_L0",
"INT_L_X0Y57.SS6BEG2.SS6END2",
"INT_L_X0Y59.LV_L18.LV_L0",
"INT_L_X0Y59.SS6BEG2.LVB_L0",
"INT_L_X0Y61.LV_L18.LV_L0",
"INT_L_X0Y63.SS6BEG2.LVB_L0",
"INT_L_X0Y67.LV_L18.LV_L0",
"INT_L_X0Y69.LV_L18.LV_L0",
"INT_L_X0Y70.LV_L0.LV_L18",
"INT_L_X0Y71.LVB_L12.LVB_L0",
"INT_L_X0Y71.LV_L0.LV_L18",
"INT_L_X0Y72.LV_L0.LV_L18",
"INT_L_X0Y73.LV_L0.LV_L18",
"INT_L_X0Y75.LVB_L12.LVB_L0",
"INT_L_X0Y75.LV_L18.LV_L0",
"INT_L_X0Y75.NN6BEG0.LOGIC_OUTS_L18",
"INT_L_X0Y76.NN6BEG0.LOGIC_OUTS_L18",
"INT_L_X0Y77.LV_L18.LV_L0",
"INT_L_X0Y77.NN6BEG0.LOGIC_OUTS_L18",
"INT_L_X0Y78.NN6BEG0.LOGIC_OUTS_L18",
"INT_L_X0Y79.LV_L18.LV_L0",
"INT_L_X0Y81.LV_L0.NN6END0",
"INT_L_X0Y82.LV_L0.NN6END0",
"INT_L_X0Y83.LVB_L12.LVB_L0",
"INT_L_X0Y83.LV_L0.NN6END0",
"INT_L_X0Y84.LVB_L0.LV_L0",
"INT_L_X0Y84.LV_L0.NN6END0",
"INT_L_X0Y85.LV_L18.LV_L0",
"INT_L_X0Y87.LVB_L12.LVB_L0",
"INT_L_X0Y87.LV_L18.LV_L0",
"INT_L_X0Y88.LV_L0.LV_L18",
"INT_L_X0Y89.LV_L0.LV_L18",
"INT_L_X0Y90.LV_L0.LV_L18",
"INT_L_X0Y91.LVB_L0.LV_L18",
"INT_L_X0Y92.NN6BEG1.LV_L9",
"INT_L_X0Y93.LV_L18.LV_L0",
"INT_L_X0Y95.LVB_L12.LVB_L0",
"INT_L_X0Y95.LV_L18.LV_L0",
"INT_L_X0Y96.NN6BEG2.LVB_L12",
"INT_L_X0Y97.LV_L18.LV_L0",
"INT_L_X0Y98.NN6BEG1.NN6END1",
"INT_L_X0Y99.LVB_L12.LV_L0",
"INT_L_X0Y99.NN6BEG3.LV_L18",
"INT_L_X0Y99.SE6BEG0.LOGIC_OUTS_L18",
"INT_L_X0Y100.LVB_L0.LV_L18",
"INT_L_X0Y101.SE6BEG0.LV_L0",
"INT_L_X0Y102.EE2BEG2.NN6END2",
@ -907,8 +1011,6 @@
"INT_L_X0Y108.EE2BEG2.NL1END2",
"INT_L_X0Y108.NW6BEG3.LV_L18",
"INT_L_X0Y109.NR1BEG2.NN6END2",
"INT_L_X0Y11.SR1BEG1.SS6END0",
"INT_L_X0Y11.SS6BEG2.SS6END2",
"INT_L_X0Y110.EE2BEG2.NR1END2",
"INT_L_X0Y111.LV_L18.LV_L0",
"INT_L_X0Y112.EE2BEG2.EL1END2",
@ -921,14 +1023,10 @@
"INT_L_X0Y116.EE2BEG2.EE2END2",
"INT_L_X0Y117.LV_L18.LV_L0",
"INT_L_X0Y119.LV_L18.LV_L0",
"INT_L_X0Y12.SS2BEG1.SR1END1",
"INT_L_X0Y121.LV_L18.LV_L0",
"INT_L_X0Y123.LV_L18.LV_L0",
"INT_L_X0Y125.LV_L18.LV_L0",
"INT_L_X0Y129.LV_L18.SW6END0",
"INT_L_X0Y13.SE6BEG0.SS6END0",
"INT_L_X0Y13.SR1BEG1.SS2END0",
"INT_L_X0Y13.SS6BEG0.LV_L0",
"INT_L_X0Y131.LV_L18.SW6END0",
"INT_L_X0Y133.LV_L18.SW6END0",
"INT_L_X0Y135.LV_L18.SW6END0",
@ -936,104 +1034,20 @@
"INT_L_X0Y139.LV_L18.SW6END0",
"INT_L_X0Y141.LV_L18.SW6END0",
"INT_L_X0Y143.LV_L18.SW6END0",
"INT_L_X0Y15.SS2BEG0.SS6END0",
"INT_L_X0Y15.SS6BEG0.LV_L0",
"INT_L_X0Y15.SS6BEG2.SS6END2",
"INT_L_X0Y17.SS6BEG0.SS6END0",
"INT_L_X0Y17.SS6BEG2.SS6END2",
"INT_L_X0Y19.SS6BEG0.SS6END0",
"INT_L_X0Y21.SS6BEG0.LV_L0",
"INT_L_X0Y21.SS6BEG2.SS6END2",
"INT_L_X0Y23.SS6BEG0.LV_L0",
"INT_L_X0Y23.SS6BEG2.SS6END2",
"INT_L_X0Y25.SS6BEG0.LV_L0",
"INT_L_X0Y27.SS6BEG2.SS6END2",
"INT_L_X0Y29.SS6BEG2.SS6END2",
"INT_L_X0Y3.FAN_ALT1.SS2END2",
"INT_L_X0Y3.IMUX_L34.FAN_BOUNCE1",
"INT_L_X0Y31.LV_L18.LV_L0",
"INT_L_X0Y33.LV_L18.LV_L0",
"INT_L_X0Y33.SS6BEG2.SS6END2",
"INT_L_X0Y35.SS6BEG2.SS6END2",
"INT_L_X0Y39.LV_L18.LV_L0",
"INT_L_X0Y39.SS6BEG2.SS6END2",
"INT_L_X0Y4.IMUX_L34.SS2END1",
"INT_L_X0Y41.LV_L18.LV_L0",
"INT_L_X0Y41.SS6BEG2.SS6END2",
"INT_L_X0Y43.LV_L18.LV_L0",
"INT_L_X0Y45.SS6BEG2.SS6END2",
"INT_L_X0Y47.SS6BEG2.SS6END2",
"INT_L_X0Y49.LV_L18.LV_L0",
"INT_L_X0Y5.BYP_ALT0.SS2END0",
"INT_L_X0Y5.IMUX_L34.BYP_BOUNCE0",
"INT_L_X0Y5.SS2BEG2.SS6END2",
"INT_L_X0Y51.LV_L18.LV_L0",
"INT_L_X0Y51.NR1BEG0.LOGIC_OUTS_L18",
"INT_L_X0Y51.SS6BEG2.SS6END2",
"INT_L_X0Y52.LV_L0.NR1END0",
"INT_L_X0Y52.NR1BEG0.LOGIC_OUTS_L18",
"INT_L_X0Y53.LV_L0.NR1END0",
"INT_L_X0Y53.NR1BEG0.LOGIC_OUTS_L18",
"INT_L_X0Y53.SS6BEG2.SS6END2",
"INT_L_X0Y54.LV_L0.NR1END0",
"INT_L_X0Y54.NR1BEG0.LOGIC_OUTS_L18",
"INT_L_X0Y55.LV_L0.NR1END0",
"INT_L_X0Y57.LV_L18.LV_L0",
"INT_L_X0Y57.SS6BEG2.SS6END2",
"INT_L_X0Y59.LV_L18.LV_L0",
"INT_L_X0Y59.SS6BEG2.LVB_L0",
"INT_L_X0Y6.FAN_ALT1.EL1END3",
"INT_L_X0Y6.IMUX_L34.FAN_BOUNCE1",
"INT_L_X0Y6.SS2BEG1.SR1END1",
"INT_L_X0Y61.LV_L18.LV_L0",
"INT_L_X0Y63.SS6BEG2.LVB_L0",
"INT_L_X0Y67.LV_L18.LV_L0",
"INT_L_X0Y69.LV_L18.LV_L0",
"INT_L_X0Y7.FAN_ALT1.SS2END2",
"INT_L_X0Y7.IMUX_L34.FAN_BOUNCE1",
"INT_L_X0Y7.SR1BEG1.SS2END0",
"INT_L_X0Y7.SS2BEG0.SS6END0",
"INT_L_X0Y7.WL1BEG_N3.SW6END0",
"INT_L_X0Y70.LV_L0.LV_L18",
"INT_L_X0Y71.LVB_L12.LVB_L0",
"INT_L_X0Y71.LV_L0.LV_L18",
"INT_L_X0Y72.LV_L0.LV_L18",
"INT_L_X0Y73.LV_L0.LV_L18",
"INT_L_X0Y75.LVB_L12.LVB_L0",
"INT_L_X0Y75.LV_L18.LV_L0",
"INT_L_X0Y75.NN6BEG0.LOGIC_OUTS_L18",
"INT_L_X0Y76.NN6BEG0.LOGIC_OUTS_L18",
"INT_L_X0Y77.LV_L18.LV_L0",
"INT_L_X0Y77.NN6BEG0.LOGIC_OUTS_L18",
"INT_L_X0Y78.NN6BEG0.LOGIC_OUTS_L18",
"INT_L_X0Y79.LV_L18.LV_L0",
"INT_L_X0Y8.IMUX_L34.WW2END0",
"INT_L_X0Y81.LV_L0.NN6END0",
"INT_L_X0Y82.LV_L0.NN6END0",
"INT_L_X0Y83.LVB_L12.LVB_L0",
"INT_L_X0Y83.LV_L0.NN6END0",
"INT_L_X0Y84.LVB_L0.LV_L0",
"INT_L_X0Y84.LV_L0.NN6END0",
"INT_L_X0Y85.LV_L18.LV_L0",
"INT_L_X0Y87.LVB_L12.LVB_L0",
"INT_L_X0Y87.LV_L18.LV_L0",
"INT_L_X0Y88.LV_L0.LV_L18",
"INT_L_X0Y89.LV_L0.LV_L18",
"INT_L_X0Y9.IMUX_L34.SL1END1",
"INT_L_X0Y9.SS2BEG0.SS6END0",
"INT_L_X0Y9.SS2BEG2.SS6END2",
"INT_L_X0Y90.LV_L0.LV_L18",
"INT_L_X0Y91.LVB_L0.LV_L18",
"INT_L_X0Y92.NN6BEG1.LV_L9",
"INT_L_X0Y93.LV_L18.LV_L0",
"INT_L_X0Y95.LVB_L12.LVB_L0",
"INT_L_X0Y95.LV_L18.LV_L0",
"INT_L_X0Y96.NN6BEG2.LVB_L12",
"INT_L_X0Y97.LV_L18.LV_L0",
"INT_L_X0Y98.NN6BEG1.NN6END1",
"INT_L_X0Y99.LVB_L12.LV_L0",
"INT_L_X0Y99.NN6BEG3.LV_L18",
"INT_L_X0Y99.SE6BEG0.LOGIC_OUTS_L18",
"INT_L_X2Y8.WW2BEG0.SL1END0",
"INT_L_X2Y9.SL1BEG0.SE6END0",
"INT_L_X2Y11.SW6BEG0.SS6END0",
"INT_L_X2Y17.SS6BEG0.LV_L0",
"INT_L_X2Y35.LV_L18.LV_L0",
"INT_L_X2Y53.LV_L18.LV_L0",
"INT_L_X2Y71.LV_L18.LV_L0",
"INT_L_X2Y89.LV_L18.SW6END0",
"INT_L_X2Y95.SE6BEG0.SE6END0",
"INT_L_X2Y97.SE6BEG0.SE6END0",
"INT_L_X4Y91.SE6BEG0.SE6END0",
"INT_L_X4Y93.SW6BEG0.SE6END0",
"INT_L_X6Y87.SE6BEG0.SE6END0",
"INT_L_X8Y83.SE6BEG0.SE6END0",
"INT_L_X10Y79.EE2BEG0.SE6END0",
"INT_L_X18Y79.SE6BEG0.EE2END0",
"INT_L_X20Y75.SE6BEG0.SE6END0",
@ -1042,20 +1056,6 @@
"INT_L_X22Y59.SS6BEG0.SS6END0",
"INT_L_X22Y65.SS6BEG0.SS6END0",
"INT_L_X22Y71.SS6BEG0.SE6END0",
"INT_L_X2Y11.SW6BEG0.SS6END0",
"INT_L_X2Y17.SS6BEG0.LV_L0",
"INT_L_X2Y35.LV_L18.LV_L0",
"INT_L_X2Y53.LV_L18.LV_L0",
"INT_L_X2Y71.LV_L18.LV_L0",
"INT_L_X2Y8.WW2BEG0.SL1END0",
"INT_L_X2Y89.LV_L18.SW6END0",
"INT_L_X2Y9.SL1BEG0.SE6END0",
"INT_L_X2Y95.SE6BEG0.SE6END0",
"INT_L_X2Y97.SE6BEG0.SE6END0",
"INT_L_X4Y91.SE6BEG0.SE6END0",
"INT_L_X4Y93.SW6BEG0.SE6END0",
"INT_L_X6Y87.SE6BEG0.SE6END0",
"INT_L_X8Y83.SE6BEG0.SE6END0",
"INT_R_X1Y110.NN6BEG3.NE6END3",
"INT_R_X1Y112.WR1BEG_S0.NE6END3",
"INT_R_X1Y116.WW2BEG2.NN6END3",
@ -1070,18 +1070,30 @@
"LIOB33_X0Y3.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
"LIOB33_X0Y3.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16",
"LIOB33_X0Y3.IOB_Y1.PULLTYPE.NONE",
"LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
"LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
"LIOB33_X0Y43.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
"LIOB33_X0Y43.IOB_Y0.PULLTYPE.PULLUP",
"LIOB33_X0Y43.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
"LIOB33_X0Y43.IOB_Y1.PULLTYPE.PULLDOWN",
"LIOB33_X0Y5.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
"LIOB33_X0Y5.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16",
"LIOB33_X0Y5.IOB_Y0.PULLTYPE.NONE",
"LIOB33_X0Y5.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
"LIOB33_X0Y5.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16",
"LIOB33_X0Y5.IOB_Y1.PULLTYPE.NONE",
"LIOB33_X0Y7.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
"LIOB33_X0Y7.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16",
"LIOB33_X0Y7.IOB_Y0.PULLTYPE.NONE",
"LIOB33_X0Y7.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
"LIOB33_X0Y7.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16",
"LIOB33_X0Y7.IOB_Y1.PULLTYPE.NONE",
"LIOB33_X0Y9.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
"LIOB33_X0Y9.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16",
"LIOB33_X0Y9.IOB_Y0.PULLTYPE.NONE",
"LIOB33_X0Y9.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
"LIOB33_X0Y9.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16",
"LIOB33_X0Y9.IOB_Y1.PULLTYPE.NONE",
"LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
"LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
"LIOB33_X0Y43.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
"LIOB33_X0Y43.IOB_Y0.PULLTYPE.PULLUP",
"LIOB33_X0Y43.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
"LIOB33_X0Y43.IOB_Y1.PULLTYPE.PULLDOWN",
"LIOB33_X0Y51.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
"LIOB33_X0Y51.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
"LIOB33_X0Y51.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
@ -1098,12 +1110,6 @@
"LIOB33_X0Y53.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
"LIOB33_X0Y53.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN",
"LIOB33_X0Y53.IOB_Y1.PULLTYPE.NONE",
"LIOB33_X0Y7.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
"LIOB33_X0Y7.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16",
"LIOB33_X0Y7.IOB_Y0.PULLTYPE.NONE",
"LIOB33_X0Y7.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
"LIOB33_X0Y7.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16",
"LIOB33_X0Y7.IOB_Y1.PULLTYPE.NONE",
"LIOB33_X0Y75.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
"LIOB33_X0Y75.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
"LIOB33_X0Y75.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
@ -1120,12 +1126,6 @@
"LIOB33_X0Y77.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
"LIOB33_X0Y77.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN",
"LIOB33_X0Y77.IOB_Y1.PULLTYPE.NONE",
"LIOB33_X0Y9.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
"LIOB33_X0Y9.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16",
"LIOB33_X0Y9.IOB_Y0.PULLTYPE.NONE",
"LIOB33_X0Y9.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
"LIOB33_X0Y9.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16",
"LIOB33_X0Y9.IOB_Y1.PULLTYPE.NONE",
"LIOI3_SING_X0Y99.IDELAY_Y1.IDELAY_TYPE_FIXED",
"LIOI3_SING_X0Y99.ILOGIC_Y1.ZINV_D",
"LIOI3_TBYTESRC_X0Y7.IDELAY_Y0.IDELAY_TYPE_FIXED",
@ -1152,6 +1152,14 @@
"LIOI3_X0Y5.OLOGIC_Y1.OMUX.D1",
"LIOI3_X0Y5.OLOGIC_Y1.OQUSED",
"LIOI3_X0Y5.OLOGIC_Y1.OSERDES.DATA_RATE_TQ.BUF",
"LIOI3_X0Y9.IDELAY_Y0.IDELAY_TYPE_FIXED",
"LIOI3_X0Y9.IDELAY_Y1.IDELAY_TYPE_FIXED",
"LIOI3_X0Y9.OLOGIC_Y0.OMUX.D1",
"LIOI3_X0Y9.OLOGIC_Y0.OQUSED",
"LIOI3_X0Y9.OLOGIC_Y0.OSERDES.DATA_RATE_TQ.BUF",
"LIOI3_X0Y9.OLOGIC_Y1.OMUX.D1",
"LIOI3_X0Y9.OLOGIC_Y1.OQUSED",
"LIOI3_X0Y9.OLOGIC_Y1.OSERDES.DATA_RATE_TQ.BUF",
"LIOI3_X0Y51.IDELAY_Y0.IDELAY_TYPE_FIXED",
"LIOI3_X0Y51.IDELAY_Y1.IDELAY_TYPE_FIXED",
"LIOI3_X0Y51.ILOGIC_Y0.ZINV_D",
@ -1167,14 +1175,6 @@
"LIOI3_X0Y77.IDELAY_Y0.IDELAY_TYPE_FIXED",
"LIOI3_X0Y77.IDELAY_Y1.IDELAY_TYPE_FIXED",
"LIOI3_X0Y77.ILOGIC_Y0.ZINV_D",
"LIOI3_X0Y77.ILOGIC_Y1.ZINV_D",
"LIOI3_X0Y9.IDELAY_Y0.IDELAY_TYPE_FIXED",
"LIOI3_X0Y9.IDELAY_Y1.IDELAY_TYPE_FIXED",
"LIOI3_X0Y9.OLOGIC_Y0.OMUX.D1",
"LIOI3_X0Y9.OLOGIC_Y0.OQUSED",
"LIOI3_X0Y9.OLOGIC_Y0.OSERDES.DATA_RATE_TQ.BUF",
"LIOI3_X0Y9.OLOGIC_Y1.OMUX.D1",
"LIOI3_X0Y9.OLOGIC_Y1.OQUSED",
"LIOI3_X0Y9.OLOGIC_Y1.OSERDES.DATA_RATE_TQ.BUF"
"LIOI3_X0Y77.ILOGIC_Y1.ZINV_D"
]
}

126
artix7/harness/arty-a7/swbut/design.json
View File

@ -24,6 +24,14 @@
"CMT_TOP_R_LOWER_B_X8Y113/CMT_TOP_EE2A2_4",
"HCLK_L_X4Y130/HCLK_LV16",
"INT_INTERFACE_R_X1Y104/INT_INTERFACE_EE2A2",
"INT_L_X0Y96/LVB_L0",
"INT_L_X0Y96/NN6BEG2",
"INT_L_X0Y97/LVB_L1",
"INT_L_X0Y97/NN6A2",
"INT_L_X0Y98/LVB_L2",
"INT_L_X0Y98/NN6B2",
"INT_L_X0Y99/LVB_L3",
"INT_L_X0Y99/NN6C2",
"INT_L_X0Y100/LVB_L4",
"INT_L_X0Y100/NN6D2",
"INT_L_X0Y101/LVB_L5",
@ -62,14 +70,6 @@
"INT_L_X0Y125/NR1BEG0",
"INT_L_X0Y126/LV_L18",
"INT_L_X0Y126/NR1END0",
"INT_L_X0Y96/LVB_L0",
"INT_L_X0Y96/NN6BEG2",
"INT_L_X0Y97/LVB_L1",
"INT_L_X0Y97/NN6A2",
"INT_L_X0Y98/LVB_L2",
"INT_L_X0Y98/NN6B2",
"INT_L_X0Y99/LVB_L3",
"INT_L_X0Y99/NN6C2",
"INT_R_X1Y104/EE2A2",
"IO_INT_INTERFACE_L_X0Y125/INT_INTERFACE_LOGIC_OUTS_L18",
"IO_INT_INTERFACE_L_X0Y125/INT_INTERFACE_LOGIC_OUTS_L_B18",
@ -665,10 +665,6 @@
],
"required_features": [
"",
"CLK_BUFG_REBUF_X60Y117.CLK_BUFG_REBUF_R_CK_GCLK16_TOP.CLK_BUFG_REBUF_R_CK_GCLK16_BOT",
"CLK_BUFG_REBUF_X60Y117.GCLK16_ENABLE_ABOVE",
"CLK_BUFG_REBUF_X60Y117.GCLK16_ENABLE_BELOW",
"CLK_BUFG_REBUF_X60Y142.GCLK16_ENABLE_ABOVE",
"CLK_BUFG_REBUF_X60Y38.GCLK16_ENABLE_BELOW",
"CLK_BUFG_REBUF_X60Y65.CLK_BUFG_REBUF_R_CK_GCLK16_TOP.CLK_BUFG_REBUF_R_CK_GCLK16_BOT",
"CLK_BUFG_REBUF_X60Y65.GCLK16_ENABLE_ABOVE",
@ -676,24 +672,16 @@
"CLK_BUFG_REBUF_X60Y90.CLK_BUFG_REBUF_R_CK_GCLK16_TOP.CLK_BUFG_REBUF_R_CK_GCLK16_BOT",
"CLK_BUFG_REBUF_X60Y90.GCLK16_ENABLE_ABOVE",
"CLK_BUFG_REBUF_X60Y90.GCLK16_ENABLE_BELOW",
"CLK_BUFG_REBUF_X60Y117.CLK_BUFG_REBUF_R_CK_GCLK16_TOP.CLK_BUFG_REBUF_R_CK_GCLK16_BOT",
"CLK_BUFG_REBUF_X60Y117.GCLK16_ENABLE_ABOVE",
"CLK_BUFG_REBUF_X60Y117.GCLK16_ENABLE_BELOW",
"CLK_BUFG_REBUF_X60Y142.GCLK16_ENABLE_ABOVE",
"CLK_BUFG_TOP_R_X60Y53.BUFGCTRL.BUFGCTRL_X0Y0.IN_USE",
"CLK_BUFG_TOP_R_X60Y53.BUFGCTRL.BUFGCTRL_X0Y0.IS_IGNORE1_INVERTED",
"CLK_BUFG_TOP_R_X60Y53.BUFGCTRL.BUFGCTRL_X0Y0.ZINV_CE0",
"CLK_BUFG_TOP_R_X60Y53.BUFGCTRL.BUFGCTRL_X0Y0.ZINV_S0",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL0_I0.CLK_BUFG_TOP_R_CK_MUXED0",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL0_I1.CLK_BUFG_IMUX28_0",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_IMUX30_2",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_IMUX30_2",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_IMUX31_2",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_IMUX31_2",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_IMUX28_3",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_IMUX28_3",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_IMUX29_3",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_IMUX29_3",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_IMUX30_3",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_IMUX30_3",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_IMUX31_3",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_IMUX31_3",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL1_I0.CLK_BUFG_IMUX29_0",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL1_I1.CLK_BUFG_IMUX29_0",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL2_I0.CLK_BUFG_IMUX30_0",
@ -712,24 +700,54 @@
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL8_I1.CLK_BUFG_IMUX28_2",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL9_I0.CLK_BUFG_IMUX29_2",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL9_I1.CLK_BUFG_IMUX29_2",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_IMUX30_2",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_IMUX30_2",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_IMUX31_2",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_IMUX31_2",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_IMUX28_3",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_IMUX28_3",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_IMUX29_3",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_IMUX29_3",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_IMUX30_3",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_IMUX30_3",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_IMUX31_3",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_IMUX31_3",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_CK_GCLK16.CLK_BUFG_BUFGCTRL0_O",
"CLK_HROW_TOP_R_X60Y78.CLK_HROW_CK_IN_R0_ACTIVE",
"CLK_HROW_TOP_R_X60Y78.CLK_HROW_R_CK_GCLK16_ACTIVE",
"CLK_HROW_TOP_R_X60Y78.CLK_HROW_TOP_R_CK_BUFG_CASCO0.CLK_HROW_CK_IN_R0",
"CLK_HROW_TOP_R_X60Y130.BUFHCE.BUFHCE_X0Y0.IN_USE",
"CLK_HROW_TOP_R_X60Y130.BUFHCE.BUFHCE_X0Y0.ZINV_CE",
"CLK_HROW_TOP_R_X60Y130.CLK_HROW_CK_MUX_OUT_L0.CLK_HROW_R_CK_GCLK16",
"CLK_HROW_TOP_R_X60Y130.CLK_HROW_R_CK_GCLK16_ACTIVE",
"CLK_HROW_TOP_R_X60Y78.CLK_HROW_CK_IN_R0_ACTIVE",
"CLK_HROW_TOP_R_X60Y78.CLK_HROW_R_CK_GCLK16_ACTIVE",
"CLK_HROW_TOP_R_X60Y78.CLK_HROW_TOP_R_CK_BUFG_CASCO0.CLK_HROW_CK_IN_R0",
"HCLK_CMT_L_X106Y78.HCLK_CMT_CCIO0_ACTIVE",
"HCLK_CMT_L_X106Y78.HCLK_CMT_CCIO0_USED",
"HCLK_CMT_L_X106Y78.HCLK_CMT_CK_IN0.HCLK_CMT_CCIO0",
"HCLK_CMT_X8Y130.HCLK_CMT_CK_BUFHCLK0_USED",
"INT_L_X0Y1.IMUX_L34.SL1END1",
"INT_L_X0Y2.IMUX_L34.SS2END1",
"INT_L_X0Y2.SL1BEG1.SR1END1",
"INT_L_X0Y3.SR1BEG1.SS6END0",
"INT_L_X0Y4.SS2BEG1.SR1END1",
"INT_L_X0Y5.SR1BEG1.SS6END0",
"INT_L_X0Y9.SS6BEG0.LV_L0",
"INT_L_X0Y11.SS6BEG0.SS6END0",
"INT_L_X0Y17.SS6BEG0.SS6END0",
"INT_L_X0Y23.SS6BEG0.LV_L0",
"INT_L_X0Y27.LV_L18.LV_L0",
"INT_L_X0Y41.LV_L18.LV_L0",
"INT_L_X0Y45.LV_L18.LV_L0",
"INT_L_X0Y59.LV_L18.LV_L0",
"INT_L_X0Y63.LV_L18.LV_L0",
"INT_L_X0Y77.LV_L18.LV_L0",
"INT_L_X0Y81.LV_L18.LV_L0",
"INT_L_X0Y95.LV_L18.LV_L0",
"INT_L_X0Y96.NN6BEG2.LVB_L0",
"INT_L_X0Y99.LV_L18.LV_L0",
"INT_L_X0Y102.NN2BEG2.NN6END2",
"INT_L_X0Y104.EE2BEG2.NN2END2",
"INT_L_X0Y108.EE2BEG2.SE6END2",
"INT_L_X0Y108.LVB_L12.LV_L0",
"INT_L_X0Y11.SS6BEG0.SS6END0",
"INT_L_X0Y112.EE2BEG2.EL1END2",
"INT_L_X0Y112.WL1BEG2.WL1END3",
"INT_L_X0Y113.LV_L18.SW6END0",
@ -761,24 +779,6 @@
"INT_L_X0Y132.EE2BEG2.EL1END2",
"INT_L_X0Y132.WL1BEG2.WL1END3",
"INT_L_X0Y137.SW6BEG0.LOGIC_OUTS_L18",
"INT_L_X0Y17.SS6BEG0.SS6END0",
"INT_L_X0Y2.IMUX_L34.SS2END1",
"INT_L_X0Y2.SL1BEG1.SR1END1",
"INT_L_X0Y23.SS6BEG0.LV_L0",
"INT_L_X0Y27.LV_L18.LV_L0",
"INT_L_X0Y3.SR1BEG1.SS6END0",
"INT_L_X0Y4.SS2BEG1.SR1END1",
"INT_L_X0Y41.LV_L18.LV_L0",
"INT_L_X0Y45.LV_L18.LV_L0",
"INT_L_X0Y5.SR1BEG1.SS6END0",
"INT_L_X0Y59.LV_L18.LV_L0",
"INT_L_X0Y63.LV_L18.LV_L0",
"INT_L_X0Y77.LV_L18.LV_L0",
"INT_L_X0Y81.LV_L18.LV_L0",
"INT_L_X0Y9.SS6BEG0.LV_L0",
"INT_L_X0Y95.LV_L18.LV_L0",
"INT_L_X0Y96.NN6BEG2.LVB_L0",
"INT_L_X0Y99.LV_L18.LV_L0",
"INT_L_X38Y66.SE6BEG0.SE2END0",
"INT_L_X40Y62.EE4BEG0.SE6END0",
"INT_L_X42Y51.SE2BEG1.ER1END1",
@ -791,6 +791,14 @@
"INT_R_X1Y124.LVB12.NR1END3",
"INT_R_X1Y133.EL1BEG_N3.SE6END0",
"INT_R_X1Y133.WL1BEG_N3.SE6END0",
"INT_R_X35Y65.SE6BEG0.LV0",
"INT_R_X35Y71.SE6BEG0.LV0",
"INT_R_X35Y75.SE6BEG0.LV0",
"INT_R_X35Y79.SE6BEG0.LV0",
"INT_R_X35Y83.LV18.LV0",
"INT_R_X35Y89.LV18.LV0",
"INT_R_X35Y93.LV18.LV0",
"INT_R_X35Y97.LV18.LV0",
"INT_R_X35Y101.LV18.LV0",
"INT_R_X35Y107.LV18.LV0",
"INT_R_X35Y111.LV18.LV0",
@ -800,17 +808,6 @@
"INT_R_X35Y129.LV18.LH0",
"INT_R_X35Y133.LV18.LH0",
"INT_R_X35Y137.LV18.LH0",
"INT_R_X35Y65.SE6BEG0.LV0",
"INT_R_X35Y71.SE6BEG0.LV0",
"INT_R_X35Y75.SE6BEG0.LV0",
"INT_R_X35Y79.SE6BEG0.LV0",
"INT_R_X35Y83.LV18.LV0",
"INT_R_X35Y89.LV18.LV0",
"INT_R_X35Y93.LV18.LV0",
"INT_R_X35Y97.LV18.LV0",
"INT_R_X37Y103.LV18.LV0",
"INT_R_X37Y117.LV18.LH0",
"INT_R_X37Y121.LV18.LH0",
"INT_R_X37Y61.SE6BEG0.SE6END0",
"INT_R_X37Y63.SE6BEG0.LV0",
"INT_R_X37Y67.SE2BEG0.SE6END0",
@ -820,6 +817,9 @@
"INT_R_X37Y81.LV18.LV0",
"INT_R_X37Y85.LV18.LV0",
"INT_R_X37Y99.LV18.LV0",
"INT_R_X37Y103.LV18.LV0",
"INT_R_X37Y117.LV18.LH0",
"INT_R_X37Y121.LV18.LH0",
"INT_R_X39Y51.EE2BEG0.SS6END0",
"INT_R_X39Y57.SE6BEG0.SE6END0",
"INT_R_X39Y57.SS6BEG0.SS6END0",
@ -851,6 +851,12 @@
"LIOB33_X0Y1.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
"LIOB33_X0Y1.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16",
"LIOB33_X0Y1.IOB_Y1.PULLTYPE.NONE",
"LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
"LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
"LIOB33_X0Y43.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
"LIOB33_X0Y43.IOB_Y0.PULLTYPE.PULLUP",
"LIOB33_X0Y43.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
"LIOB33_X0Y43.IOB_Y1.PULLTYPE.PULLDOWN",
"LIOB33_X0Y121.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
"LIOB33_X0Y121.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
"LIOB33_X0Y121.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
@ -887,12 +893,6 @@
"LIOB33_X0Y137.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
"LIOB33_X0Y137.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN",
"LIOB33_X0Y137.IOB_Y1.PULLTYPE.NONE",
"LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
"LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
"LIOB33_X0Y43.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
"LIOB33_X0Y43.IOB_Y0.PULLTYPE.PULLUP",
"LIOB33_X0Y43.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
"LIOB33_X0Y43.IOB_Y1.PULLTYPE.PULLDOWN",
"LIOI3_TBYTETERM_X0Y137.IDELAY_Y0.IDELAY_TYPE_FIXED",
"LIOI3_TBYTETERM_X0Y137.IDELAY_Y1.IDELAY_TYPE_FIXED",
"LIOI3_TBYTETERM_X0Y137.ILOGIC_Y1.ZINV_D",

102
artix7/harness/arty-a7/uart/design.json
View File

@ -37,8 +37,8 @@
"CMT_FIFO_L_X107Y97/CMT_FIFO_LH2_0",
"CMT_TOP_L_UPPER_T_X106Y96/CMT_TOP_LH2_0",
"DSP_L_X34Y85/DSP_LH10_2",
"HCLK_R_X110Y78/HCLK_LV5",
"HCLK_R_X64Y130/HCLK_NN2BEG2",
"HCLK_R_X110Y78/HCLK_LV5",
"INT_INTERFACE_L_X34Y87/INT_INTERFACE_LH10",
"INT_INTERFACE_L_X42Y87/INT_INTERFACE_LH2",
"INT_INTERFACE_R_X23Y126/INT_INTERFACE_WW2END1",
@ -59,6 +59,20 @@
"INT_R_X25Y126/NN2END2",
"INT_R_X25Y126/WW2BEG1",
"INT_R_X27Y123/WW4B3",
"INT_R_X31Y87/LH12",
"INT_R_X31Y87/LV0",
"INT_R_X31Y88/LV1",
"INT_R_X31Y89/LV2",
"INT_R_X31Y90/LV3",
"INT_R_X31Y91/LV4",
"INT_R_X31Y92/LV5",
"INT_R_X31Y93/LV6",
"INT_R_X31Y94/LV7",
"INT_R_X31Y95/LV8",
"INT_R_X31Y96/LV9",
"INT_R_X31Y97/LV10",
"INT_R_X31Y98/LV11",
"INT_R_X31Y99/LV12",
"INT_R_X31Y100/LV13",
"INT_R_X31Y101/LV14",
"INT_R_X31Y102/LV15",
@ -85,20 +99,6 @@
"INT_R_X31Y122/LV17",
"INT_R_X31Y123/LV18",
"INT_R_X31Y123/WW4BEG3",
"INT_R_X31Y87/LH12",
"INT_R_X31Y87/LV0",
"INT_R_X31Y88/LV1",
"INT_R_X31Y89/LV2",
"INT_R_X31Y90/LV3",
"INT_R_X31Y91/LV4",
"INT_R_X31Y92/LV5",
"INT_R_X31Y93/LV6",
"INT_R_X31Y94/LV7",
"INT_R_X31Y95/LV8",
"INT_R_X31Y96/LV9",
"INT_R_X31Y97/LV10",
"INT_R_X31Y98/LV11",
"INT_R_X31Y99/LV12",
"INT_R_X33Y87/LH10",
"INT_R_X35Y87/LH8",
"INT_R_X37Y87/LH6",
@ -139,12 +139,12 @@
"RIOI3_X43Y67/RIOI_IBUF0",
"RIOI3_X43Y67/RIOI_ILOGIC0_D",
"R_TERM_INT_X112Y71/TERM_INT_LOGIC_OUTS_L_B18",
"VBRK_X105Y91/VBRK_LH2",
"VBRK_X61Y132/VBRK_WW2END1",
"VBRK_X66Y128/VBRK_WW4END3",
"VBRK_X80Y91/VBRK_LH12",
"VBRK_X85Y91/VBRK_LH10",
"VBRK_X96Y91/VBRK_LH6"
"VBRK_X96Y91/VBRK_LH6",
"VBRK_X105Y91/VBRK_LH2"
]
},
{
@ -248,10 +248,6 @@
],
"required_features": [
"",
"CLK_BUFG_REBUF_X60Y117.CLK_BUFG_REBUF_R_CK_GCLK16_TOP.CLK_BUFG_REBUF_R_CK_GCLK16_BOT",
"CLK_BUFG_REBUF_X60Y117.GCLK16_ENABLE_ABOVE",
"CLK_BUFG_REBUF_X60Y117.GCLK16_ENABLE_BELOW",
"CLK_BUFG_REBUF_X60Y142.GCLK16_ENABLE_ABOVE",
"CLK_BUFG_REBUF_X60Y38.GCLK16_ENABLE_BELOW",
"CLK_BUFG_REBUF_X60Y65.CLK_BUFG_REBUF_R_CK_GCLK16_TOP.CLK_BUFG_REBUF_R_CK_GCLK16_BOT",
"CLK_BUFG_REBUF_X60Y65.GCLK16_ENABLE_ABOVE",
@ -259,24 +255,16 @@
"CLK_BUFG_REBUF_X60Y90.CLK_BUFG_REBUF_R_CK_GCLK16_TOP.CLK_BUFG_REBUF_R_CK_GCLK16_BOT",
"CLK_BUFG_REBUF_X60Y90.GCLK16_ENABLE_ABOVE",
"CLK_BUFG_REBUF_X60Y90.GCLK16_ENABLE_BELOW",
"CLK_BUFG_REBUF_X60Y117.CLK_BUFG_REBUF_R_CK_GCLK16_TOP.CLK_BUFG_REBUF_R_CK_GCLK16_BOT",
"CLK_BUFG_REBUF_X60Y117.GCLK16_ENABLE_ABOVE",
"CLK_BUFG_REBUF_X60Y117.GCLK16_ENABLE_BELOW",
"CLK_BUFG_REBUF_X60Y142.GCLK16_ENABLE_ABOVE",
"CLK_BUFG_TOP_R_X60Y53.BUFGCTRL.BUFGCTRL_X0Y0.IN_USE",
"CLK_BUFG_TOP_R_X60Y53.BUFGCTRL.BUFGCTRL_X0Y0.IS_IGNORE1_INVERTED",
"CLK_BUFG_TOP_R_X60Y53.BUFGCTRL.BUFGCTRL_X0Y0.ZINV_CE0",
"CLK_BUFG_TOP_R_X60Y53.BUFGCTRL.BUFGCTRL_X0Y0.ZINV_S0",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL0_I0.CLK_BUFG_TOP_R_CK_MUXED0",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL0_I1.CLK_BUFG_IMUX28_0",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_IMUX30_2",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_IMUX30_2",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_IMUX31_2",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_IMUX31_2",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_IMUX28_3",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_IMUX28_3",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_IMUX29_3",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_IMUX29_3",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_IMUX30_3",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_IMUX30_3",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_IMUX31_3",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_IMUX31_3",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL1_I0.CLK_BUFG_IMUX29_0",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL1_I1.CLK_BUFG_IMUX29_0",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL2_I0.CLK_BUFG_IMUX30_0",
@ -295,19 +283,39 @@
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL8_I1.CLK_BUFG_IMUX28_2",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL9_I0.CLK_BUFG_IMUX29_2",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL9_I1.CLK_BUFG_IMUX29_2",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_IMUX30_2",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_IMUX30_2",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_IMUX31_2",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_IMUX31_2",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_IMUX28_3",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_IMUX28_3",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_IMUX29_3",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_IMUX29_3",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_IMUX30_3",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_IMUX30_3",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_IMUX31_3",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_IMUX31_3",
"CLK_BUFG_TOP_R_X60Y53.CLK_BUFG_CK_GCLK16.CLK_BUFG_BUFGCTRL0_O",
"CLK_HROW_TOP_R_X60Y78.CLK_HROW_CK_IN_R0_ACTIVE",
"CLK_HROW_TOP_R_X60Y78.CLK_HROW_R_CK_GCLK16_ACTIVE",
"CLK_HROW_TOP_R_X60Y78.CLK_HROW_TOP_R_CK_BUFG_CASCO0.CLK_HROW_CK_IN_R0",
"CLK_HROW_TOP_R_X60Y130.BUFHCE.BUFHCE_X0Y0.IN_USE",
"CLK_HROW_TOP_R_X60Y130.BUFHCE.BUFHCE_X0Y0.ZINV_CE",
"CLK_HROW_TOP_R_X60Y130.CLK_HROW_CK_MUX_OUT_L0.CLK_HROW_R_CK_GCLK16",
"CLK_HROW_TOP_R_X60Y130.CLK_HROW_R_CK_GCLK16_ACTIVE",
"CLK_HROW_TOP_R_X60Y78.CLK_HROW_CK_IN_R0_ACTIVE",
"CLK_HROW_TOP_R_X60Y78.CLK_HROW_R_CK_GCLK16_ACTIVE",
"CLK_HROW_TOP_R_X60Y78.CLK_HROW_TOP_R_CK_BUFG_CASCO0.CLK_HROW_CK_IN_R0",
"HCLK_CMT_L_X106Y78.HCLK_CMT_CCIO0_ACTIVE",
"HCLK_CMT_L_X106Y78.HCLK_CMT_CCIO0_USED",
"HCLK_CMT_L_X106Y78.HCLK_CMT_CK_IN0.HCLK_CMT_CCIO0",
"HCLK_CMT_X8Y130.HCLK_CMT_CK_BUFHCLK0_USED",
"INT_L_X0Y1.IMUX_L34.SL1END1",
"INT_L_X0Y2.SL1BEG1.SR1END1",
"INT_L_X0Y3.SR1BEG1.SS6END0",
"INT_L_X0Y9.SS6BEG0.SS6END0",
"INT_L_X0Y15.SS6BEG0.LV_L0",
"INT_L_X0Y33.LV_L18.LV_L0",
"INT_L_X0Y51.LV_L18.LV_L0",
"INT_L_X0Y69.LV_L18.LV_L0",
"INT_L_X0Y87.LV_L18.LV_L0",
"INT_L_X0Y102.EE2BEG2.SE2END2",
"INT_L_X0Y103.SW2BEG2.SE6END2",
"INT_L_X0Y105.LV_L18.LV_L0",
@ -321,22 +329,14 @@
"INT_L_X0Y125.SS6BEG0.LV_L0",
"INT_L_X0Y141.LV_L18.SW6END0",
"INT_L_X0Y143.LV_L18.SW6END0",
"INT_L_X0Y15.SS6BEG0.LV_L0",
"INT_L_X0Y2.SL1BEG1.SR1END1",
"INT_L_X0Y3.SR1BEG1.SS6END0",
"INT_L_X0Y33.LV_L18.LV_L0",
"INT_L_X0Y51.LV_L18.LV_L0",
"INT_L_X0Y69.LV_L18.LV_L0",
"INT_L_X0Y87.LV_L18.LV_L0",
"INT_L_X0Y9.SS6BEG0.SS6END0",
"INT_R_X1Y107.SW6BEG2.LVB0",
"INT_R_X1Y119.LVB12.SE2END3",
"INT_R_X25Y123.NL1BEG2.WW4END3",
"INT_R_X25Y124.NN2BEG2.NL1END2",
"INT_R_X25Y126.WW2BEG1.NN2END2",
"INT_R_X31Y87.LV0.LH12",
"INT_R_X31Y105.LV0.LV18",
"INT_R_X31Y123.WW4BEG3.LV18",
"INT_R_X31Y87.LV0.LH12",
"INT_R_X43Y68.NR1BEG0.LOGIC_OUTS18",
"INT_R_X43Y69.LV0.NR1END0",
"INT_R_X43Y87.LH0.LV18",
@ -345,6 +345,12 @@
"LIOB33_X0Y1.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
"LIOB33_X0Y1.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16",
"LIOB33_X0Y1.IOB_Y1.PULLTYPE.NONE",
"LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
"LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
"LIOB33_X0Y43.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
"LIOB33_X0Y43.IOB_Y0.PULLTYPE.PULLUP",
"LIOB33_X0Y43.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
"LIOB33_X0Y43.IOB_Y1.PULLTYPE.PULLDOWN",
"LIOB33_X0Y111.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
"LIOB33_X0Y111.IOB_Y0.PULLTYPE.PULLDOWN",
"LIOB33_X0Y111.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
@ -356,12 +362,6 @@
"LIOB33_X0Y121.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
"LIOB33_X0Y121.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN",
"LIOB33_X0Y121.IOB_Y1.PULLTYPE.NONE",
"LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
"LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
"LIOB33_X0Y43.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
"LIOB33_X0Y43.IOB_Y0.PULLTYPE.PULLUP",
"LIOB33_X0Y43.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
"LIOB33_X0Y43.IOB_Y1.PULLTYPE.PULLDOWN",
"LIOI3_X0Y1.IDELAY_Y0.IDELAY_TYPE_FIXED",
"LIOI3_X0Y1.IDELAY_Y1.IDELAY_TYPE_FIXED",
"LIOI3_X0Y1.OLOGIC_Y1.OMUX.D1",

1314
artix7/harness/basys3/swbut/design.json
View File

File diff suppressed because it is too large Load Diff

1314
artix7/harness/basys3/swbut_50/design.json
View File

File diff suppressed because it is too large Load Diff

26624
artix7/segbits_bram_l.block_ram.origin_info.db
View File

File diff suppressed because it is too large Load Diff

316
artix7/segbits_bram_l.origin_info.db
View File

@ -4,21 +4,6 @@ BRAM_L.BRAM_ADDRARDADDRL0.BRAM_IMUX_ADDRARDADDRL0 origin:060-bram-cascades !26_3
BRAM_L.BRAM_ADDRARDADDRL1.BRAM_CASCINBOT_ADDRARDADDRU1 origin:060-bram-cascades !26_49 26_48 26_51
BRAM_L.BRAM_ADDRARDADDRL1.BRAM_CASCINTOP_ADDRARDADDRU1 origin:060-bram-cascades !26_51 26_48 26_49
BRAM_L.BRAM_ADDRARDADDRL1.BRAM_IMUX_ADDRARDADDRL1 origin:060-bram-cascades !26_48 !26_49 !26_51
BRAM_L.BRAM_ADDRARDADDRL10.BRAM_CASCINBOT_ADDRARDADDRU10 origin:060-bram-cascades !26_145 26_144 26_147
BRAM_L.BRAM_ADDRARDADDRL10.BRAM_CASCINTOP_ADDRARDADDRU10 origin:060-bram-cascades !26_147 26_144 26_145
BRAM_L.BRAM_ADDRARDADDRL10.BRAM_IMUX_ADDRARDADDRL10 origin:060-bram-cascades !26_144 !26_145 !26_147
BRAM_L.BRAM_ADDRARDADDRL11.BRAM_CASCINBOT_ADDRARDADDRU11 origin:060-bram-cascades !26_113 26_112 26_115
BRAM_L.BRAM_ADDRARDADDRL11.BRAM_CASCINTOP_ADDRARDADDRU11 origin:060-bram-cascades !26_115 26_112 26_113
BRAM_L.BRAM_ADDRARDADDRL11.BRAM_IMUX_ADDRARDADDRL11 origin:060-bram-cascades !26_112 !26_113 !26_115
BRAM_L.BRAM_ADDRARDADDRL12.BRAM_CASCINBOT_ADDRARDADDRU12 origin:060-bram-cascades !26_241 26_240 26_243
BRAM_L.BRAM_ADDRARDADDRL12.BRAM_CASCINTOP_ADDRARDADDRU12 origin:060-bram-cascades !26_243 26_240 26_241
BRAM_L.BRAM_ADDRARDADDRL12.BRAM_IMUX_ADDRARDADDRL12 origin:060-bram-cascades !26_240 !26_241 !26_243
BRAM_L.BRAM_ADDRARDADDRL13.BRAM_CASCINBOT_ADDRARDADDRU13 origin:060-bram-cascades !26_129 26_128 26_131
BRAM_L.BRAM_ADDRARDADDRL13.BRAM_CASCINTOP_ADDRARDADDRU13 origin:060-bram-cascades !26_131 26_128 26_129
BRAM_L.BRAM_ADDRARDADDRL13.BRAM_IMUX_ADDRARDADDRL13 origin:060-bram-cascades !26_128 !26_129 !26_131
BRAM_L.BRAM_ADDRARDADDRL14.BRAM_CASCINBOT_ADDRARDADDRU14 origin:060-bram-cascades !26_257 26_256 26_259
BRAM_L.BRAM_ADDRARDADDRL14.BRAM_CASCINTOP_ADDRARDADDRU14 origin:060-bram-cascades !26_259 26_256 26_257
BRAM_L.BRAM_ADDRARDADDRL14.BRAM_IMUX_ADDRARDADDRL14 origin:060-bram-cascades !26_256 !26_257 !26_259
BRAM_L.BRAM_ADDRARDADDRL2.BRAM_CASCINBOT_ADDRARDADDRU2 origin:060-bram-cascades !26_65 26_64 26_67
BRAM_L.BRAM_ADDRARDADDRL2.BRAM_CASCINTOP_ADDRARDADDRU2 origin:060-bram-cascades !26_67 26_64 26_65
BRAM_L.BRAM_ADDRARDADDRL2.BRAM_IMUX_ADDRARDADDRL2 origin:060-bram-cascades !26_64 !26_65 !26_67
@ -43,27 +28,27 @@ BRAM_L.BRAM_ADDRARDADDRL8.BRAM_IMUX_ADDRARDADDRL8 origin:060-bram-cascades !26_8
BRAM_L.BRAM_ADDRARDADDRL9.BRAM_CASCINBOT_ADDRARDADDRU9 origin:060-bram-cascades !26_209 26_208 26_211
BRAM_L.BRAM_ADDRARDADDRL9.BRAM_CASCINTOP_ADDRARDADDRU9 origin:060-bram-cascades !26_211 26_208 26_209
BRAM_L.BRAM_ADDRARDADDRL9.BRAM_IMUX_ADDRARDADDRL9 origin:060-bram-cascades !26_208 !26_209 !26_211
BRAM_L.BRAM_ADDRARDADDRL10.BRAM_CASCINBOT_ADDRARDADDRU10 origin:060-bram-cascades !26_145 26_144 26_147
BRAM_L.BRAM_ADDRARDADDRL10.BRAM_CASCINTOP_ADDRARDADDRU10 origin:060-bram-cascades !26_147 26_144 26_145
BRAM_L.BRAM_ADDRARDADDRL10.BRAM_IMUX_ADDRARDADDRL10 origin:060-bram-cascades !26_144 !26_145 !26_147
BRAM_L.BRAM_ADDRARDADDRL11.BRAM_CASCINBOT_ADDRARDADDRU11 origin:060-bram-cascades !26_113 26_112 26_115
BRAM_L.BRAM_ADDRARDADDRL11.BRAM_CASCINTOP_ADDRARDADDRU11 origin:060-bram-cascades !26_115 26_112 26_113
BRAM_L.BRAM_ADDRARDADDRL11.BRAM_IMUX_ADDRARDADDRL11 origin:060-bram-cascades !26_112 !26_113 !26_115
BRAM_L.BRAM_ADDRARDADDRL12.BRAM_CASCINBOT_ADDRARDADDRU12 origin:060-bram-cascades !26_241 26_240 26_243
BRAM_L.BRAM_ADDRARDADDRL12.BRAM_CASCINTOP_ADDRARDADDRU12 origin:060-bram-cascades !26_243 26_240 26_241
BRAM_L.BRAM_ADDRARDADDRL12.BRAM_IMUX_ADDRARDADDRL12 origin:060-bram-cascades !26_240 !26_241 !26_243
BRAM_L.BRAM_ADDRARDADDRL13.BRAM_CASCINBOT_ADDRARDADDRU13 origin:060-bram-cascades !26_129 26_128 26_131
BRAM_L.BRAM_ADDRARDADDRL13.BRAM_CASCINTOP_ADDRARDADDRU13 origin:060-bram-cascades !26_131 26_128 26_129
BRAM_L.BRAM_ADDRARDADDRL13.BRAM_IMUX_ADDRARDADDRL13 origin:060-bram-cascades !26_128 !26_129 !26_131
BRAM_L.BRAM_ADDRARDADDRL14.BRAM_CASCINBOT_ADDRARDADDRU14 origin:060-bram-cascades !26_257 26_256 26_259
BRAM_L.BRAM_ADDRARDADDRL14.BRAM_CASCINTOP_ADDRARDADDRU14 origin:060-bram-cascades !26_259 26_256 26_257
BRAM_L.BRAM_ADDRARDADDRL14.BRAM_IMUX_ADDRARDADDRL14 origin:060-bram-cascades !26_256 !26_257 !26_259
BRAM_L.BRAM_ADDRARDADDRU0.BRAM_CASCINBOT_ADDRARDADDRU0 origin:060-bram-cascades !26_38 26_37 26_39
BRAM_L.BRAM_ADDRARDADDRU0.BRAM_CASCINTOP_ADDRARDADDRU0 origin:060-bram-cascades !26_37 26_38 26_39
BRAM_L.BRAM_ADDRARDADDRU0.BRAM_IMUX_ADDRARDADDRU0 origin:060-bram-cascades !26_37 !26_38 !26_39
BRAM_L.BRAM_ADDRARDADDRU1.BRAM_CASCINBOT_ADDRARDADDRU1 origin:060-bram-cascades !26_54 26_53 26_55
BRAM_L.BRAM_ADDRARDADDRU1.BRAM_CASCINTOP_ADDRARDADDRU1 origin:060-bram-cascades !26_53 26_54 26_55
BRAM_L.BRAM_ADDRARDADDRU1.BRAM_IMUX_ADDRARDADDRU1 origin:060-bram-cascades !26_53 !26_54 !26_55
BRAM_L.BRAM_ADDRARDADDRU10.BRAM_CASCINBOT_ADDRARDADDRU10 origin:060-bram-cascades !26_150 26_149 26_151
BRAM_L.BRAM_ADDRARDADDRU10.BRAM_CASCINTOP_ADDRARDADDRU10 origin:060-bram-cascades !26_149 26_150 26_151
BRAM_L.BRAM_ADDRARDADDRU10.BRAM_IMUX_ADDRARDADDRU10 origin:060-bram-cascades !26_149 !26_150 !26_151
BRAM_L.BRAM_ADDRARDADDRU11.BRAM_CASCINBOT_ADDRARDADDRU11 origin:060-bram-cascades !26_118 26_117 26_119
BRAM_L.BRAM_ADDRARDADDRU11.BRAM_CASCINTOP_ADDRARDADDRU11 origin:060-bram-cascades !26_117 26_118 26_119
BRAM_L.BRAM_ADDRARDADDRU11.BRAM_IMUX_ADDRARDADDRU11 origin:060-bram-cascades !26_117 !26_118 !26_119
BRAM_L.BRAM_ADDRARDADDRU12.BRAM_CASCINBOT_ADDRARDADDRU12 origin:060-bram-cascades !26_246 26_245 26_247
BRAM_L.BRAM_ADDRARDADDRU12.BRAM_CASCINTOP_ADDRARDADDRU12 origin:060-bram-cascades !26_245 26_246 26_247
BRAM_L.BRAM_ADDRARDADDRU12.BRAM_IMUX_ADDRARDADDRU12 origin:060-bram-cascades !26_245 !26_246 !26_247
BRAM_L.BRAM_ADDRARDADDRU13.BRAM_CASCINBOT_ADDRARDADDRU13 origin:060-bram-cascades !26_134 26_133 26_135
BRAM_L.BRAM_ADDRARDADDRU13.BRAM_CASCINTOP_ADDRARDADDRU13 origin:060-bram-cascades !26_133 26_134 26_135
BRAM_L.BRAM_ADDRARDADDRU13.BRAM_IMUX_ADDRARDADDRU13 origin:060-bram-cascades !26_133 !26_134 !26_135
BRAM_L.BRAM_ADDRARDADDRU14.BRAM_CASCINBOT_ADDRARDADDRU14 origin:060-bram-cascades !26_262 26_261 26_263
BRAM_L.BRAM_ADDRARDADDRU14.BRAM_CASCINTOP_ADDRARDADDRU14 origin:060-bram-cascades !26_261 26_262 26_263
BRAM_L.BRAM_ADDRARDADDRU14.BRAM_IMUX_ADDRARDADDRU14 origin:060-bram-cascades !26_261 !26_262 !26_263
BRAM_L.BRAM_ADDRARDADDRU2.BRAM_CASCINBOT_ADDRARDADDRU2 origin:060-bram-cascades !26_70 26_69 26_71
BRAM_L.BRAM_ADDRARDADDRU2.BRAM_CASCINTOP_ADDRARDADDRU2 origin:060-bram-cascades !26_69 26_70 26_71
BRAM_L.BRAM_ADDRARDADDRU2.BRAM_IMUX_ADDRARDADDRU2 origin:060-bram-cascades !26_69 !26_70 !26_71
@ -88,27 +73,27 @@ BRAM_L.BRAM_ADDRARDADDRU8.BRAM_IMUX_ADDRARDADDRU8 origin:060-bram-cascades !26_8
BRAM_L.BRAM_ADDRARDADDRU9.BRAM_CASCINBOT_ADDRARDADDRU9 origin:060-bram-cascades !26_214 26_213 26_215
BRAM_L.BRAM_ADDRARDADDRU9.BRAM_CASCINTOP_ADDRARDADDRU9 origin:060-bram-cascades !26_213 26_214 26_215
BRAM_L.BRAM_ADDRARDADDRU9.BRAM_IMUX_ADDRARDADDRU9 origin:060-bram-cascades !26_213 !26_214 !26_215
BRAM_L.BRAM_ADDRARDADDRU10.BRAM_CASCINBOT_ADDRARDADDRU10 origin:060-bram-cascades !26_150 26_149 26_151
BRAM_L.BRAM_ADDRARDADDRU10.BRAM_CASCINTOP_ADDRARDADDRU10 origin:060-bram-cascades !26_149 26_150 26_151
BRAM_L.BRAM_ADDRARDADDRU10.BRAM_IMUX_ADDRARDADDRU10 origin:060-bram-cascades !26_149 !26_150 !26_151
BRAM_L.BRAM_ADDRARDADDRU11.BRAM_CASCINBOT_ADDRARDADDRU11 origin:060-bram-cascades !26_118 26_117 26_119
BRAM_L.BRAM_ADDRARDADDRU11.BRAM_CASCINTOP_ADDRARDADDRU11 origin:060-bram-cascades !26_117 26_118 26_119
BRAM_L.BRAM_ADDRARDADDRU11.BRAM_IMUX_ADDRARDADDRU11 origin:060-bram-cascades !26_117 !26_118 !26_119
BRAM_L.BRAM_ADDRARDADDRU12.BRAM_CASCINBOT_ADDRARDADDRU12 origin:060-bram-cascades !26_246 26_245 26_247
BRAM_L.BRAM_ADDRARDADDRU12.BRAM_CASCINTOP_ADDRARDADDRU12 origin:060-bram-cascades !26_245 26_246 26_247
BRAM_L.BRAM_ADDRARDADDRU12.BRAM_IMUX_ADDRARDADDRU12 origin:060-bram-cascades !26_245 !26_246 !26_247
BRAM_L.BRAM_ADDRARDADDRU13.BRAM_CASCINBOT_ADDRARDADDRU13 origin:060-bram-cascades !26_134 26_133 26_135
BRAM_L.BRAM_ADDRARDADDRU13.BRAM_CASCINTOP_ADDRARDADDRU13 origin:060-bram-cascades !26_133 26_134 26_135
BRAM_L.BRAM_ADDRARDADDRU13.BRAM_IMUX_ADDRARDADDRU13 origin:060-bram-cascades !26_133 !26_134 !26_135
BRAM_L.BRAM_ADDRARDADDRU14.BRAM_CASCINBOT_ADDRARDADDRU14 origin:060-bram-cascades !26_262 26_261 26_263
BRAM_L.BRAM_ADDRARDADDRU14.BRAM_CASCINTOP_ADDRARDADDRU14 origin:060-bram-cascades !26_261 26_262 26_263
BRAM_L.BRAM_ADDRARDADDRU14.BRAM_IMUX_ADDRARDADDRU14 origin:060-bram-cascades !26_261 !26_262 !26_263
BRAM_L.BRAM_ADDRBWRADDRL0.BRAM_CASCINBOT_ADDRBWRADDRU0 origin:060-bram-cascades !26_41 26_40 26_43
BRAM_L.BRAM_ADDRBWRADDRL0.BRAM_CASCINTOP_ADDRBWRADDRU0 origin:060-bram-cascades !26_43 26_40 26_41
BRAM_L.BRAM_ADDRBWRADDRL0.BRAM_IMUX_ADDRBWRADDRL0 origin:060-bram-cascades !26_40 !26_41 !26_43
BRAM_L.BRAM_ADDRBWRADDRL1.BRAM_CASCINBOT_ADDRBWRADDRU1 origin:060-bram-cascades !26_57 26_56 26_59
BRAM_L.BRAM_ADDRBWRADDRL1.BRAM_CASCINTOP_ADDRBWRADDRU1 origin:060-bram-cascades !26_59 26_56 26_57
BRAM_L.BRAM_ADDRBWRADDRL1.BRAM_IMUX_ADDRBWRADDRL1 origin:060-bram-cascades !26_56 !26_57 !26_59
BRAM_L.BRAM_ADDRBWRADDRL10.BRAM_CASCINBOT_ADDRBWRADDRU10 origin:060-bram-cascades !26_153 26_152 26_155
BRAM_L.BRAM_ADDRBWRADDRL10.BRAM_CASCINTOP_ADDRBWRADDRU10 origin:060-bram-cascades !26_155 26_152 26_153
BRAM_L.BRAM_ADDRBWRADDRL10.BRAM_IMUX_ADDRBWRADDRL10 origin:060-bram-cascades !26_152 !26_153 !26_155
BRAM_L.BRAM_ADDRBWRADDRL11.BRAM_CASCINBOT_ADDRBWRADDRU11 origin:060-bram-cascades !26_121 26_120 26_123
BRAM_L.BRAM_ADDRBWRADDRL11.BRAM_CASCINTOP_ADDRBWRADDRU11 origin:060-bram-cascades !26_123 26_120 26_121
BRAM_L.BRAM_ADDRBWRADDRL11.BRAM_IMUX_ADDRBWRADDRL11 origin:060-bram-cascades !26_120 !26_121 !26_123
BRAM_L.BRAM_ADDRBWRADDRL12.BRAM_CASCINBOT_ADDRBWRADDRU12 origin:060-bram-cascades !26_249 26_248 26_251
BRAM_L.BRAM_ADDRBWRADDRL12.BRAM_CASCINTOP_ADDRBWRADDRU12 origin:060-bram-cascades !26_251 26_248 26_249
BRAM_L.BRAM_ADDRBWRADDRL12.BRAM_IMUX_ADDRBWRADDRL12 origin:060-bram-cascades !26_248 !26_249 !26_251
BRAM_L.BRAM_ADDRBWRADDRL13.BRAM_CASCINBOT_ADDRBWRADDRU13 origin:060-bram-cascades !26_137 26_136 26_139
BRAM_L.BRAM_ADDRBWRADDRL13.BRAM_CASCINTOP_ADDRBWRADDRU13 origin:060-bram-cascades !26_139 26_136 26_137
BRAM_L.BRAM_ADDRBWRADDRL13.BRAM_IMUX_ADDRBWRADDRL13 origin:060-bram-cascades !26_136 !26_137 !26_139
BRAM_L.BRAM_ADDRBWRADDRL14.BRAM_CASCINBOT_ADDRBWRADDRU14 origin:060-bram-cascades !26_265 26_264 26_267
BRAM_L.BRAM_ADDRBWRADDRL14.BRAM_CASCINTOP_ADDRBWRADDRU14 origin:060-bram-cascades !26_267 26_264 26_265
BRAM_L.BRAM_ADDRBWRADDRL14.BRAM_IMUX_ADDRBWRADDRL14 origin:060-bram-cascades !26_264 !26_265 !26_267
BRAM_L.BRAM_ADDRBWRADDRL2.BRAM_CASCINBOT_ADDRBWRADDRU2 origin:060-bram-cascades !26_73 26_72 26_75
BRAM_L.BRAM_ADDRBWRADDRL2.BRAM_CASCINTOP_ADDRBWRADDRU2 origin:060-bram-cascades !26_75 26_72 26_73
BRAM_L.BRAM_ADDRBWRADDRL2.BRAM_IMUX_ADDRBWRADDRL2 origin:060-bram-cascades !26_72 !26_73 !26_75
@ -133,27 +118,27 @@ BRAM_L.BRAM_ADDRBWRADDRL8.BRAM_IMUX_ADDRBWRADDRL8 origin:060-bram-cascades !26_8
BRAM_L.BRAM_ADDRBWRADDRL9.BRAM_CASCINBOT_ADDRBWRADDRU9 origin:060-bram-cascades !26_217 26_216 26_219
BRAM_L.BRAM_ADDRBWRADDRL9.BRAM_CASCINTOP_ADDRBWRADDRU9 origin:060-bram-cascades !26_219 26_216 26_217
BRAM_L.BRAM_ADDRBWRADDRL9.BRAM_IMUX_ADDRBWRADDRL9 origin:060-bram-cascades !26_216 !26_217 !26_219
BRAM_L.BRAM_ADDRBWRADDRL10.BRAM_CASCINBOT_ADDRBWRADDRU10 origin:060-bram-cascades !26_153 26_152 26_155
BRAM_L.BRAM_ADDRBWRADDRL10.BRAM_CASCINTOP_ADDRBWRADDRU10 origin:060-bram-cascades !26_155 26_152 26_153
BRAM_L.BRAM_ADDRBWRADDRL10.BRAM_IMUX_ADDRBWRADDRL10 origin:060-bram-cascades !26_152 !26_153 !26_155
BRAM_L.BRAM_ADDRBWRADDRL11.BRAM_CASCINBOT_ADDRBWRADDRU11 origin:060-bram-cascades !26_121 26_120 26_123
BRAM_L.BRAM_ADDRBWRADDRL11.BRAM_CASCINTOP_ADDRBWRADDRU11 origin:060-bram-cascades !26_123 26_120 26_121
BRAM_L.BRAM_ADDRBWRADDRL11.BRAM_IMUX_ADDRBWRADDRL11 origin:060-bram-cascades !26_120 !26_121 !26_123
BRAM_L.BRAM_ADDRBWRADDRL12.BRAM_CASCINBOT_ADDRBWRADDRU12 origin:060-bram-cascades !26_249 26_248 26_251
BRAM_L.BRAM_ADDRBWRADDRL12.BRAM_CASCINTOP_ADDRBWRADDRU12 origin:060-bram-cascades !26_251 26_248 26_249
BRAM_L.BRAM_ADDRBWRADDRL12.BRAM_IMUX_ADDRBWRADDRL12 origin:060-bram-cascades !26_248 !26_249 !26_251
BRAM_L.BRAM_ADDRBWRADDRL13.BRAM_CASCINBOT_ADDRBWRADDRU13 origin:060-bram-cascades !26_137 26_136 26_139
BRAM_L.BRAM_ADDRBWRADDRL13.BRAM_CASCINTOP_ADDRBWRADDRU13 origin:060-bram-cascades !26_139 26_136 26_137
BRAM_L.BRAM_ADDRBWRADDRL13.BRAM_IMUX_ADDRBWRADDRL13 origin:060-bram-cascades !26_136 !26_137 !26_139
BRAM_L.BRAM_ADDRBWRADDRL14.BRAM_CASCINBOT_ADDRBWRADDRU14 origin:060-bram-cascades !26_265 26_264 26_267
BRAM_L.BRAM_ADDRBWRADDRL14.BRAM_CASCINTOP_ADDRBWRADDRU14 origin:060-bram-cascades !26_267 26_264 26_265
BRAM_L.BRAM_ADDRBWRADDRL14.BRAM_IMUX_ADDRBWRADDRL14 origin:060-bram-cascades !26_264 !26_265 !26_267
BRAM_L.BRAM_ADDRBWRADDRU0.BRAM_CASCINBOT_ADDRBWRADDRU0 origin:060-bram-cascades !26_46 26_45 26_47
BRAM_L.BRAM_ADDRBWRADDRU0.BRAM_CASCINTOP_ADDRBWRADDRU0 origin:060-bram-cascades !26_45 26_46 26_47
BRAM_L.BRAM_ADDRBWRADDRU0.BRAM_IMUX_ADDRBWRADDRU0 origin:060-bram-cascades !26_45 !26_46 !26_47
BRAM_L.BRAM_ADDRBWRADDRU1.BRAM_CASCINBOT_ADDRBWRADDRU1 origin:060-bram-cascades !26_62 26_61 26_63
BRAM_L.BRAM_ADDRBWRADDRU1.BRAM_CASCINTOP_ADDRBWRADDRU1 origin:060-bram-cascades !26_61 26_62 26_63
BRAM_L.BRAM_ADDRBWRADDRU1.BRAM_IMUX_ADDRBWRADDRU1 origin:060-bram-cascades !26_61 !26_62 !26_63
BRAM_L.BRAM_ADDRBWRADDRU10.BRAM_CASCINBOT_ADDRBWRADDRU10 origin:060-bram-cascades !26_158 26_157 26_159
BRAM_L.BRAM_ADDRBWRADDRU10.BRAM_CASCINTOP_ADDRBWRADDRU10 origin:060-bram-cascades !26_157 26_158 26_159
BRAM_L.BRAM_ADDRBWRADDRU10.BRAM_IMUX_ADDRBWRADDRU10 origin:060-bram-cascades !26_157 !26_158 !26_159
BRAM_L.BRAM_ADDRBWRADDRU11.BRAM_CASCINBOT_ADDRBWRADDRU11 origin:060-bram-cascades !26_126 26_125 26_127
BRAM_L.BRAM_ADDRBWRADDRU11.BRAM_CASCINTOP_ADDRBWRADDRU11 origin:060-bram-cascades !26_125 26_126 26_127
BRAM_L.BRAM_ADDRBWRADDRU11.BRAM_IMUX_ADDRBWRADDRU11 origin:060-bram-cascades !26_125 !26_126 !26_127
BRAM_L.BRAM_ADDRBWRADDRU12.BRAM_CASCINBOT_ADDRBWRADDRU12 origin:060-bram-cascades !26_254 26_253 26_255
BRAM_L.BRAM_ADDRBWRADDRU12.BRAM_CASCINTOP_ADDRBWRADDRU12 origin:060-bram-cascades !26_253 26_254 26_255
BRAM_L.BRAM_ADDRBWRADDRU12.BRAM_IMUX_ADDRBWRADDRU12 origin:060-bram-cascades !26_253 !26_254 !26_255
BRAM_L.BRAM_ADDRBWRADDRU13.BRAM_CASCINBOT_ADDRBWRADDRU13 origin:060-bram-cascades !26_142 26_141 26_143
BRAM_L.BRAM_ADDRBWRADDRU13.BRAM_CASCINTOP_ADDRBWRADDRU13 origin:060-bram-cascades !26_141 26_142 26_143
BRAM_L.BRAM_ADDRBWRADDRU13.BRAM_IMUX_ADDRBWRADDRU13 origin:060-bram-cascades !26_141 !26_142 !26_143
BRAM_L.BRAM_ADDRBWRADDRU14.BRAM_CASCINBOT_ADDRBWRADDRU14 origin:060-bram-cascades !26_270 26_269 26_271
BRAM_L.BRAM_ADDRBWRADDRU14.BRAM_CASCINTOP_ADDRBWRADDRU14 origin:060-bram-cascades !26_269 26_270 26_271
BRAM_L.BRAM_ADDRBWRADDRU14.BRAM_IMUX_ADDRBWRADDRU14 origin:060-bram-cascades !26_269 !26_270 !26_271
BRAM_L.BRAM_ADDRBWRADDRU2.BRAM_CASCINBOT_ADDRBWRADDRU2 origin:060-bram-cascades !26_78 26_77 26_79
BRAM_L.BRAM_ADDRBWRADDRU2.BRAM_CASCINTOP_ADDRBWRADDRU2 origin:060-bram-cascades !26_77 26_78 26_79
BRAM_L.BRAM_ADDRBWRADDRU2.BRAM_IMUX_ADDRBWRADDRU2 origin:060-bram-cascades !26_77 !26_78 !26_79
@ -178,10 +163,51 @@ BRAM_L.BRAM_ADDRBWRADDRU8.BRAM_IMUX_ADDRBWRADDRU8 origin:060-bram-cascades !26_9
BRAM_L.BRAM_ADDRBWRADDRU9.BRAM_CASCINBOT_ADDRBWRADDRU9 origin:060-bram-cascades !26_222 26_221 26_223
BRAM_L.BRAM_ADDRBWRADDRU9.BRAM_CASCINTOP_ADDRBWRADDRU9 origin:060-bram-cascades !26_221 26_222 26_223
BRAM_L.BRAM_ADDRBWRADDRU9.BRAM_IMUX_ADDRBWRADDRU9 origin:060-bram-cascades !26_221 !26_222 !26_223
BRAM_L.BRAM_ADDRBWRADDRU10.BRAM_CASCINBOT_ADDRBWRADDRU10 origin:060-bram-cascades !26_158 26_157 26_159
BRAM_L.BRAM_ADDRBWRADDRU10.BRAM_CASCINTOP_ADDRBWRADDRU10 origin:060-bram-cascades !26_157 26_158 26_159
BRAM_L.BRAM_ADDRBWRADDRU10.BRAM_IMUX_ADDRBWRADDRU10 origin:060-bram-cascades !26_157 !26_158 !26_159
BRAM_L.BRAM_ADDRBWRADDRU11.BRAM_CASCINBOT_ADDRBWRADDRU11 origin:060-bram-cascades !26_126 26_125 26_127
BRAM_L.BRAM_ADDRBWRADDRU11.BRAM_CASCINTOP_ADDRBWRADDRU11 origin:060-bram-cascades !26_125 26_126 26_127
BRAM_L.BRAM_ADDRBWRADDRU11.BRAM_IMUX_ADDRBWRADDRU11 origin:060-bram-cascades !26_125 !26_126 !26_127
BRAM_L.BRAM_ADDRBWRADDRU12.BRAM_CASCINBOT_ADDRBWRADDRU12 origin:060-bram-cascades !26_254 26_253 26_255
BRAM_L.BRAM_ADDRBWRADDRU12.BRAM_CASCINTOP_ADDRBWRADDRU12 origin:060-bram-cascades !26_253 26_254 26_255
BRAM_L.BRAM_ADDRBWRADDRU12.BRAM_IMUX_ADDRBWRADDRU12 origin:060-bram-cascades !26_253 !26_254 !26_255
BRAM_L.BRAM_ADDRBWRADDRU13.BRAM_CASCINBOT_ADDRBWRADDRU13 origin:060-bram-cascades !26_142 26_141 26_143
BRAM_L.BRAM_ADDRBWRADDRU13.BRAM_CASCINTOP_ADDRBWRADDRU13 origin:060-bram-cascades !26_141 26_142 26_143
BRAM_L.BRAM_ADDRBWRADDRU13.BRAM_IMUX_ADDRBWRADDRU13 origin:060-bram-cascades !26_141 !26_142 !26_143
BRAM_L.BRAM_ADDRBWRADDRU14.BRAM_CASCINBOT_ADDRBWRADDRU14 origin:060-bram-cascades !26_270 26_269 26_271
BRAM_L.BRAM_ADDRBWRADDRU14.BRAM_CASCINTOP_ADDRBWRADDRU14 origin:060-bram-cascades !26_269 26_270 26_271
BRAM_L.BRAM_ADDRBWRADDRU14.BRAM_IMUX_ADDRBWRADDRU14 origin:060-bram-cascades !26_269 !26_270 !26_271
BRAM_L.CASCOUT_ARD_ACTIVE origin:060-bram-cascades 26_170
BRAM_L.CASCOUT_BWR_ACTIVE origin:060-bram-cascades 26_172
BRAM_L.EN_SYN origin:028-fifo-config 27_171
BRAM_L.FIRST_WORD_FALL_THROUGH origin:028-fifo-config 27_170
BRAM_L.ZALMOST_EMPTY_OFFSET[0] origin:028-fifo-config 27_288
BRAM_L.ZALMOST_EMPTY_OFFSET[1] origin:028-fifo-config 27_291
BRAM_L.ZALMOST_EMPTY_OFFSET[2] origin:028-fifo-config 27_292
BRAM_L.ZALMOST_EMPTY_OFFSET[3] origin:028-fifo-config 27_293
BRAM_L.ZALMOST_EMPTY_OFFSET[4] origin:028-fifo-config 27_296
BRAM_L.ZALMOST_EMPTY_OFFSET[5] origin:028-fifo-config 27_299
BRAM_L.ZALMOST_EMPTY_OFFSET[6] origin:028-fifo-config 27_300
BRAM_L.ZALMOST_EMPTY_OFFSET[7] origin:028-fifo-config 27_301
BRAM_L.ZALMOST_EMPTY_OFFSET[8] origin:028-fifo-config 27_304
BRAM_L.ZALMOST_EMPTY_OFFSET[9] origin:028-fifo-config 27_307
BRAM_L.ZALMOST_EMPTY_OFFSET[10] origin:028-fifo-config 27_308
BRAM_L.ZALMOST_EMPTY_OFFSET[11] origin:028-fifo-config 27_309
BRAM_L.ZALMOST_EMPTY_OFFSET[12] origin:028-fifo-config 27_312
BRAM_L.ZALMOST_FULL_OFFSET[0] origin:028-fifo-config 27_32
BRAM_L.ZALMOST_FULL_OFFSET[1] origin:028-fifo-config 27_29
BRAM_L.ZALMOST_FULL_OFFSET[2] origin:028-fifo-config 27_28
BRAM_L.ZALMOST_FULL_OFFSET[3] origin:028-fifo-config 27_27
BRAM_L.ZALMOST_FULL_OFFSET[4] origin:028-fifo-config 27_24
BRAM_L.ZALMOST_FULL_OFFSET[5] origin:028-fifo-config 27_21
BRAM_L.ZALMOST_FULL_OFFSET[6] origin:028-fifo-config 27_20
BRAM_L.ZALMOST_FULL_OFFSET[7] origin:028-fifo-config 27_19
BRAM_L.ZALMOST_FULL_OFFSET[8] origin:028-fifo-config 27_16
BRAM_L.ZALMOST_FULL_OFFSET[9] origin:028-fifo-config 27_13
BRAM_L.ZALMOST_FULL_OFFSET[10] origin:028-fifo-config 27_12
BRAM_L.ZALMOST_FULL_OFFSET[11] origin:028-fifo-config 27_11
BRAM_L.ZALMOST_FULL_OFFSET[12] origin:028-fifo-config 27_08
BRAM_L.RAMB18_Y0.DOA_REG origin:025-bram-config 27_69
BRAM_L.RAMB18_Y0.DOB_REG origin:025-bram-config 27_72
BRAM_L.RAMB18_Y0.FIFO_MODE origin:029-bram-fifo-config 27_150
@ -189,15 +215,15 @@ BRAM_L.RAMB18_Y0.IN_USE origin:029-bram-fifo-config 27_100 27_99
BRAM_L.RAMB18_Y0.RDADDR_COLLISION_HWCONFIG_DELAYED_WRITE origin:025-bram-config !27_96
BRAM_L.RAMB18_Y0.RDADDR_COLLISION_HWCONFIG_PERFORMANCE origin:025-bram-config 27_96
BRAM_L.RAMB18_Y0.READ_WIDTH_A_1 origin:025-bram-config !27_35 !27_36 !27_37
BRAM_L.RAMB18_Y0.READ_WIDTH_A_18 origin:025-bram-config !27_35 !27_36 27_37
BRAM_L.RAMB18_Y0.READ_WIDTH_A_2 origin:025-bram-config !27_36 !27_37 27_35
BRAM_L.RAMB18_Y0.READ_WIDTH_A_4 origin:025-bram-config !27_35 !27_37 27_36
BRAM_L.RAMB18_Y0.READ_WIDTH_A_9 origin:025-bram-config !27_37 27_35 27_36
BRAM_L.RAMB18_Y0.READ_WIDTH_A_18 origin:025-bram-config !27_35 !27_36 27_37
BRAM_L.RAMB18_Y0.READ_WIDTH_B_1 origin:025-bram-config !27_43 !27_44 !27_45
BRAM_L.RAMB18_Y0.READ_WIDTH_B_18 origin:025-bram-config !27_43 !27_44 27_45
BRAM_L.RAMB18_Y0.READ_WIDTH_B_2 origin:025-bram-config !27_44 !27_45 27_43
BRAM_L.RAMB18_Y0.READ_WIDTH_B_4 origin:025-bram-config !27_43 !27_45 27_44
BRAM_L.RAMB18_Y0.READ_WIDTH_B_9 origin:025-bram-config !27_45 27_43 27_44
BRAM_L.RAMB18_Y0.READ_WIDTH_B_18 origin:025-bram-config !27_43 !27_44 27_45
BRAM_L.RAMB18_Y0.RSTREG_PRIORITY_A_REGCE origin:025-bram-config 27_124
BRAM_L.RAMB18_Y0.RSTREG_PRIORITY_A_RSTREG origin:025-bram-config !27_124
BRAM_L.RAMB18_Y0.RSTREG_PRIORITY_B_REGCE origin:025-bram-config 27_125
@ -209,24 +235,16 @@ BRAM_L.RAMB18_Y0.WRITE_MODE_A_READ_FIRST origin:025-bram-config 27_56
BRAM_L.RAMB18_Y0.WRITE_MODE_B_NO_CHANGE origin:025-bram-config 27_68
BRAM_L.RAMB18_Y0.WRITE_MODE_B_READ_FIRST origin:025-bram-config 27_67
BRAM_L.RAMB18_Y0.WRITE_WIDTH_A_1 origin:025-bram-config !27_51 !27_52 !27_53
BRAM_L.RAMB18_Y0.WRITE_WIDTH_A_18 origin:025-bram-config !27_51 !27_52 27_53
BRAM_L.RAMB18_Y0.WRITE_WIDTH_A_2 origin:025-bram-config !27_52 !27_53 27_51
BRAM_L.RAMB18_Y0.WRITE_WIDTH_A_4 origin:025-bram-config !27_51 !27_53 27_52
BRAM_L.RAMB18_Y0.WRITE_WIDTH_A_9 origin:025-bram-config !27_53 27_51 27_52
BRAM_L.RAMB18_Y0.WRITE_WIDTH_A_18 origin:025-bram-config !27_51 !27_52 27_53
BRAM_L.RAMB18_Y0.WRITE_WIDTH_B_1 origin:025-bram-config !27_59 !27_60 !27_61
BRAM_L.RAMB18_Y0.WRITE_WIDTH_B_18 origin:025-bram-config !27_59 !27_60 27_61
BRAM_L.RAMB18_Y0.WRITE_WIDTH_B_2 origin:025-bram-config !27_60 !27_61 27_59
BRAM_L.RAMB18_Y0.WRITE_WIDTH_B_4 origin:025-bram-config !27_59 !27_61 27_60
BRAM_L.RAMB18_Y0.WRITE_WIDTH_B_9 origin:025-bram-config !27_61 27_59 27_60
BRAM_L.RAMB18_Y0.WRITE_WIDTH_B_18 origin:025-bram-config !27_59 !27_60 27_61
BRAM_L.RAMB18_Y0.ZINIT_A[0] origin:025-bram-config 27_73
BRAM_L.RAMB18_Y0.ZINIT_A[10] origin:025-bram-config 27_129
BRAM_L.RAMB18_Y0.ZINIT_A[11] origin:025-bram-config 27_113
BRAM_L.RAMB18_Y0.ZINIT_A[12] origin:025-bram-config 27_97
BRAM_L.RAMB18_Y0.ZINIT_A[13] origin:025-bram-config 27_81
BRAM_L.RAMB18_Y0.ZINIT_A[14] origin:025-bram-config 27_49
BRAM_L.RAMB18_Y0.ZINIT_A[15] origin:025-bram-config 27_33
BRAM_L.RAMB18_Y0.ZINIT_A[16] origin:025-bram-config 27_17
BRAM_L.RAMB18_Y0.ZINIT_A[17] origin:025-bram-config 27_01
BRAM_L.RAMB18_Y0.ZINIT_A[1] origin:025-bram-config 27_65
BRAM_L.RAMB18_Y0.ZINIT_A[2] origin:025-bram-config 27_137
BRAM_L.RAMB18_Y0.ZINIT_A[3] origin:025-bram-config 27_121
@ -236,15 +254,15 @@ BRAM_L.RAMB18_Y0.ZINIT_A[6] origin:025-bram-config 27_57
BRAM_L.RAMB18_Y0.ZINIT_A[7] origin:025-bram-config 27_41
BRAM_L.RAMB18_Y0.ZINIT_A[8] origin:025-bram-config 27_25
BRAM_L.RAMB18_Y0.ZINIT_A[9] origin:025-bram-config 27_09
BRAM_L.RAMB18_Y0.ZINIT_A[10] origin:025-bram-config 27_129
BRAM_L.RAMB18_Y0.ZINIT_A[11] origin:025-bram-config 27_113
BRAM_L.RAMB18_Y0.ZINIT_A[12] origin:025-bram-config 27_97
BRAM_L.RAMB18_Y0.ZINIT_A[13] origin:025-bram-config 27_81
BRAM_L.RAMB18_Y0.ZINIT_A[14] origin:025-bram-config 27_49
BRAM_L.RAMB18_Y0.ZINIT_A[15] origin:025-bram-config 27_33
BRAM_L.RAMB18_Y0.ZINIT_A[16] origin:025-bram-config 27_17
BRAM_L.RAMB18_Y0.ZINIT_A[17] origin:025-bram-config 27_01
BRAM_L.RAMB18_Y0.ZINIT_B[0] origin:025-bram-config 27_79
BRAM_L.RAMB18_Y0.ZINIT_B[10] origin:025-bram-config 27_135
BRAM_L.RAMB18_Y0.ZINIT_B[11] origin:025-bram-config 27_119
BRAM_L.RAMB18_Y0.ZINIT_B[12] origin:025-bram-config 27_103
BRAM_L.RAMB18_Y0.ZINIT_B[13] origin:025-bram-config 27_87
BRAM_L.RAMB18_Y0.ZINIT_B[14] origin:025-bram-config 27_55
BRAM_L.RAMB18_Y0.ZINIT_B[15] origin:025-bram-config 27_39
BRAM_L.RAMB18_Y0.ZINIT_B[16] origin:025-bram-config 27_23
BRAM_L.RAMB18_Y0.ZINIT_B[17] origin:025-bram-config 27_07
BRAM_L.RAMB18_Y0.ZINIT_B[1] origin:025-bram-config 27_71
BRAM_L.RAMB18_Y0.ZINIT_B[2] origin:025-bram-config 27_143
BRAM_L.RAMB18_Y0.ZINIT_B[3] origin:025-bram-config 27_127
@ -254,6 +272,14 @@ BRAM_L.RAMB18_Y0.ZINIT_B[6] origin:025-bram-config 27_63
BRAM_L.RAMB18_Y0.ZINIT_B[7] origin:025-bram-config 27_47
BRAM_L.RAMB18_Y0.ZINIT_B[8] origin:025-bram-config 27_31
BRAM_L.RAMB18_Y0.ZINIT_B[9] origin:025-bram-config 27_15
BRAM_L.RAMB18_Y0.ZINIT_B[10] origin:025-bram-config 27_135
BRAM_L.RAMB18_Y0.ZINIT_B[11] origin:025-bram-config 27_119
BRAM_L.RAMB18_Y0.ZINIT_B[12] origin:025-bram-config 27_103
BRAM_L.RAMB18_Y0.ZINIT_B[13] origin:025-bram-config 27_87
BRAM_L.RAMB18_Y0.ZINIT_B[14] origin:025-bram-config 27_55
BRAM_L.RAMB18_Y0.ZINIT_B[15] origin:025-bram-config 27_39
BRAM_L.RAMB18_Y0.ZINIT_B[16] origin:025-bram-config 27_23
BRAM_L.RAMB18_Y0.ZINIT_B[17] origin:025-bram-config 27_07
BRAM_L.RAMB18_Y0.ZINV_CLKARDCLK origin:025-bram-config 27_107
BRAM_L.RAMB18_Y0.ZINV_CLKBWRCLK origin:025-bram-config 27_109
BRAM_L.RAMB18_Y0.ZINV_ENARDEN origin:025-bram-config 27_112
@ -265,14 +291,6 @@ BRAM_L.RAMB18_Y0.ZINV_RSTRAMB origin:025-bram-config 27_117
BRAM_L.RAMB18_Y0.ZINV_RSTREGARSTREG origin:025-bram-config 27_120
BRAM_L.RAMB18_Y0.ZINV_RSTREGB origin:025-bram-config 27_123
BRAM_L.RAMB18_Y0.ZSRVAL_A[0] origin:025-bram-config 27_74
BRAM_L.RAMB18_Y0.ZSRVAL_A[10] origin:025-bram-config 27_130
BRAM_L.RAMB18_Y0.ZSRVAL_A[11] origin:025-bram-config 27_114
BRAM_L.RAMB18_Y0.ZSRVAL_A[12] origin:025-bram-config 27_98
BRAM_L.RAMB18_Y0.ZSRVAL_A[13] origin:025-bram-config 27_82
BRAM_L.RAMB18_Y0.ZSRVAL_A[14] origin:025-bram-config 27_50
BRAM_L.RAMB18_Y0.ZSRVAL_A[15] origin:025-bram-config 27_34
BRAM_L.RAMB18_Y0.ZSRVAL_A[16] origin:025-bram-config 27_18
BRAM_L.RAMB18_Y0.ZSRVAL_A[17] origin:025-bram-config 27_02
BRAM_L.RAMB18_Y0.ZSRVAL_A[1] origin:025-bram-config 27_66
BRAM_L.RAMB18_Y0.ZSRVAL_A[2] origin:025-bram-config 27_138
BRAM_L.RAMB18_Y0.ZSRVAL_A[3] origin:025-bram-config 27_122
@ -282,15 +300,15 @@ BRAM_L.RAMB18_Y0.ZSRVAL_A[6] origin:025-bram-config 27_58
BRAM_L.RAMB18_Y0.ZSRVAL_A[7] origin:025-bram-config 27_42
BRAM_L.RAMB18_Y0.ZSRVAL_A[8] origin:025-bram-config 27_26
BRAM_L.RAMB18_Y0.ZSRVAL_A[9] origin:025-bram-config 27_10
BRAM_L.RAMB18_Y0.ZSRVAL_A[10] origin:025-bram-config 27_130
BRAM_L.RAMB18_Y0.ZSRVAL_A[11] origin:025-bram-config 27_114
BRAM_L.RAMB18_Y0.ZSRVAL_A[12] origin:025-bram-config 27_98
BRAM_L.RAMB18_Y0.ZSRVAL_A[13] origin:025-bram-config 27_82
BRAM_L.RAMB18_Y0.ZSRVAL_A[14] origin:025-bram-config 27_50
BRAM_L.RAMB18_Y0.ZSRVAL_A[15] origin:025-bram-config 27_34
BRAM_L.RAMB18_Y0.ZSRVAL_A[16] origin:025-bram-config 27_18
BRAM_L.RAMB18_Y0.ZSRVAL_A[17] origin:025-bram-config 27_02
BRAM_L.RAMB18_Y0.ZSRVAL_B[0] origin:025-bram-config 27_78
BRAM_L.RAMB18_Y0.ZSRVAL_B[10] origin:025-bram-config 27_134
BRAM_L.RAMB18_Y0.ZSRVAL_B[11] origin:025-bram-config 27_118
BRAM_L.RAMB18_Y0.ZSRVAL_B[12] origin:025-bram-config 27_102
BRAM_L.RAMB18_Y0.ZSRVAL_B[13] origin:025-bram-config 27_86
BRAM_L.RAMB18_Y0.ZSRVAL_B[14] origin:025-bram-config 27_54
BRAM_L.RAMB18_Y0.ZSRVAL_B[15] origin:025-bram-config 27_38
BRAM_L.RAMB18_Y0.ZSRVAL_B[16] origin:025-bram-config 27_22
BRAM_L.RAMB18_Y0.ZSRVAL_B[17] origin:025-bram-config 27_06
BRAM_L.RAMB18_Y0.ZSRVAL_B[1] origin:025-bram-config 27_70
BRAM_L.RAMB18_Y0.ZSRVAL_B[2] origin:025-bram-config 27_142
BRAM_L.RAMB18_Y0.ZSRVAL_B[3] origin:025-bram-config 27_126
@ -300,6 +318,14 @@ BRAM_L.RAMB18_Y0.ZSRVAL_B[6] origin:025-bram-config 27_62
BRAM_L.RAMB18_Y0.ZSRVAL_B[7] origin:025-bram-config 27_46
BRAM_L.RAMB18_Y0.ZSRVAL_B[8] origin:025-bram-config 27_30
BRAM_L.RAMB18_Y0.ZSRVAL_B[9] origin:025-bram-config 27_14
BRAM_L.RAMB18_Y0.ZSRVAL_B[10] origin:025-bram-config 27_134
BRAM_L.RAMB18_Y0.ZSRVAL_B[11] origin:025-bram-config 27_118
BRAM_L.RAMB18_Y0.ZSRVAL_B[12] origin:025-bram-config 27_102
BRAM_L.RAMB18_Y0.ZSRVAL_B[13] origin:025-bram-config 27_86
BRAM_L.RAMB18_Y0.ZSRVAL_B[14] origin:025-bram-config 27_54
BRAM_L.RAMB18_Y0.ZSRVAL_B[15] origin:025-bram-config 27_38
BRAM_L.RAMB18_Y0.ZSRVAL_B[16] origin:025-bram-config 27_22
BRAM_L.RAMB18_Y0.ZSRVAL_B[17] origin:025-bram-config 27_06
BRAM_L.RAMB18_Y1.DOA_REG origin:025-bram-config 27_251
BRAM_L.RAMB18_Y1.DOB_REG origin:025-bram-config 27_248
BRAM_L.RAMB18_Y1.FIFO_MODE origin:029-bram-fifo-config 27_169
@ -307,15 +333,15 @@ BRAM_L.RAMB18_Y1.IN_USE origin:029-bram-fifo-config 27_220 27_221
BRAM_L.RAMB18_Y1.RDADDR_COLLISION_HWCONFIG_DELAYED_WRITE origin:025-bram-config !27_224
BRAM_L.RAMB18_Y1.RDADDR_COLLISION_HWCONFIG_PERFORMANCE origin:025-bram-config 27_224
BRAM_L.RAMB18_Y1.READ_WIDTH_A_1 origin:025-bram-config !27_283 !27_284 !27_285
BRAM_L.RAMB18_Y1.READ_WIDTH_A_18 origin:025-bram-config !27_284 !27_285 27_283
BRAM_L.RAMB18_Y1.READ_WIDTH_A_2 origin:025-bram-config !27_283 !27_284 27_285
BRAM_L.RAMB18_Y1.READ_WIDTH_A_4 origin:025-bram-config !27_283 !27_285 27_284
BRAM_L.RAMB18_Y1.READ_WIDTH_A_9 origin:025-bram-config !27_283 27_284 27_285
BRAM_L.RAMB18_Y1.READ_WIDTH_A_18 origin:025-bram-config !27_284 !27_285 27_283
BRAM_L.RAMB18_Y1.READ_WIDTH_B_1 origin:025-bram-config !27_275 !27_276 !27_277
BRAM_L.RAMB18_Y1.READ_WIDTH_B_18 origin:025-bram-config !27_276 !27_277 27_275
BRAM_L.RAMB18_Y1.READ_WIDTH_B_2 origin:025-bram-config !27_275 !27_276 27_277
BRAM_L.RAMB18_Y1.READ_WIDTH_B_4 origin:025-bram-config !27_275 !27_277 27_276
BRAM_L.RAMB18_Y1.READ_WIDTH_B_9 origin:025-bram-config !27_275 27_276 27_277
BRAM_L.RAMB18_Y1.READ_WIDTH_B_18 origin:025-bram-config !27_276 !27_277 27_275
BRAM_L.RAMB18_Y1.RSTREG_PRIORITY_A_REGCE origin:025-bram-config 27_196
BRAM_L.RAMB18_Y1.RSTREG_PRIORITY_A_RSTREG origin:025-bram-config !27_196
BRAM_L.RAMB18_Y1.RSTREG_PRIORITY_B_REGCE origin:025-bram-config 27_195
@ -327,24 +353,16 @@ BRAM_L.RAMB18_Y1.WRITE_MODE_A_READ_FIRST origin:025-bram-config 27_264
BRAM_L.RAMB18_Y1.WRITE_MODE_B_NO_CHANGE origin:025-bram-config 27_252
BRAM_L.RAMB18_Y1.WRITE_MODE_B_READ_FIRST origin:025-bram-config 27_253
BRAM_L.RAMB18_Y1.WRITE_WIDTH_A_1 origin:025-bram-config !27_267 !27_268 !27_269
BRAM_L.RAMB18_Y1.WRITE_WIDTH_A_18 origin:025-bram-config !27_268 !27_269 27_267
BRAM_L.RAMB18_Y1.WRITE_WIDTH_A_2 origin:025-bram-config !27_267 !27_268 27_269
BRAM_L.RAMB18_Y1.WRITE_WIDTH_A_4 origin:025-bram-config !27_267 !27_269 27_268
BRAM_L.RAMB18_Y1.WRITE_WIDTH_A_9 origin:025-bram-config !27_267 27_268 27_269
BRAM_L.RAMB18_Y1.WRITE_WIDTH_A_18 origin:025-bram-config !27_268 !27_269 27_267
BRAM_L.RAMB18_Y1.WRITE_WIDTH_B_1 origin:025-bram-config !27_259 !27_260 !27_261
BRAM_L.RAMB18_Y1.WRITE_WIDTH_B_18 origin:025-bram-config !27_260 !27_261 27_259
BRAM_L.RAMB18_Y1.WRITE_WIDTH_B_2 origin:025-bram-config !27_259 !27_260 27_261
BRAM_L.RAMB18_Y1.WRITE_WIDTH_B_4 origin:025-bram-config !27_259 !27_261 27_260
BRAM_L.RAMB18_Y1.WRITE_WIDTH_B_9 origin:025-bram-config !27_259 27_260 27_261
BRAM_L.RAMB18_Y1.WRITE_WIDTH_B_18 origin:025-bram-config !27_260 !27_261 27_259
BRAM_L.RAMB18_Y1.ZINIT_A[0] origin:025-bram-config 27_249
BRAM_L.RAMB18_Y1.ZINIT_A[10] origin:025-bram-config 27_305
BRAM_L.RAMB18_Y1.ZINIT_A[11] origin:025-bram-config 27_289
BRAM_L.RAMB18_Y1.ZINIT_A[12] origin:025-bram-config 27_273
BRAM_L.RAMB18_Y1.ZINIT_A[13] origin:025-bram-config 27_257
BRAM_L.RAMB18_Y1.ZINIT_A[14] origin:025-bram-config 27_225
BRAM_L.RAMB18_Y1.ZINIT_A[15] origin:025-bram-config 27_209
BRAM_L.RAMB18_Y1.ZINIT_A[16] origin:025-bram-config 27_193
BRAM_L.RAMB18_Y1.ZINIT_A[17] origin:025-bram-config 27_177
BRAM_L.RAMB18_Y1.ZINIT_A[1] origin:025-bram-config 27_241
BRAM_L.RAMB18_Y1.ZINIT_A[2] origin:025-bram-config 27_313
BRAM_L.RAMB18_Y1.ZINIT_A[3] origin:025-bram-config 27_297
@ -354,15 +372,15 @@ BRAM_L.RAMB18_Y1.ZINIT_A[6] origin:025-bram-config 27_233
BRAM_L.RAMB18_Y1.ZINIT_A[7] origin:025-bram-config 27_217
BRAM_L.RAMB18_Y1.ZINIT_A[8] origin:025-bram-config 27_201
BRAM_L.RAMB18_Y1.ZINIT_A[9] origin:025-bram-config 27_185
BRAM_L.RAMB18_Y1.ZINIT_A[10] origin:025-bram-config 27_305
BRAM_L.RAMB18_Y1.ZINIT_A[11] origin:025-bram-config 27_289
BRAM_L.RAMB18_Y1.ZINIT_A[12] origin:025-bram-config 27_273
BRAM_L.RAMB18_Y1.ZINIT_A[13] origin:025-bram-config 27_257
BRAM_L.RAMB18_Y1.ZINIT_A[14] origin:025-bram-config 27_225
BRAM_L.RAMB18_Y1.ZINIT_A[15] origin:025-bram-config 27_209
BRAM_L.RAMB18_Y1.ZINIT_A[16] origin:025-bram-config 27_193
BRAM_L.RAMB18_Y1.ZINIT_A[17] origin:025-bram-config 27_177
BRAM_L.RAMB18_Y1.ZINIT_B[0] origin:025-bram-config 27_255
BRAM_L.RAMB18_Y1.ZINIT_B[10] origin:025-bram-config 27_311
BRAM_L.RAMB18_Y1.ZINIT_B[11] origin:025-bram-config 27_295
BRAM_L.RAMB18_Y1.ZINIT_B[12] origin:025-bram-config 27_279
BRAM_L.RAMB18_Y1.ZINIT_B[13] origin:025-bram-config 27_263
BRAM_L.RAMB18_Y1.ZINIT_B[14] origin:025-bram-config 27_231
BRAM_L.RAMB18_Y1.ZINIT_B[15] origin:025-bram-config 27_215
BRAM_L.RAMB18_Y1.ZINIT_B[16] origin:025-bram-config 27_199
BRAM_L.RAMB18_Y1.ZINIT_B[17] origin:025-bram-config 27_183
BRAM_L.RAMB18_Y1.ZINIT_B[1] origin:025-bram-config 27_247
BRAM_L.RAMB18_Y1.ZINIT_B[2] origin:025-bram-config 27_319
BRAM_L.RAMB18_Y1.ZINIT_B[3] origin:025-bram-config 27_303
@ -372,6 +390,14 @@ BRAM_L.RAMB18_Y1.ZINIT_B[6] origin:025-bram-config 27_239
BRAM_L.RAMB18_Y1.ZINIT_B[7] origin:025-bram-config 27_223
BRAM_L.RAMB18_Y1.ZINIT_B[8] origin:025-bram-config 27_207
BRAM_L.RAMB18_Y1.ZINIT_B[9] origin:025-bram-config 27_191
BRAM_L.RAMB18_Y1.ZINIT_B[10] origin:025-bram-config 27_311
BRAM_L.RAMB18_Y1.ZINIT_B[11] origin:025-bram-config 27_295
BRAM_L.RAMB18_Y1.ZINIT_B[12] origin:025-bram-config 27_279
BRAM_L.RAMB18_Y1.ZINIT_B[13] origin:025-bram-config 27_263
BRAM_L.RAMB18_Y1.ZINIT_B[14] origin:025-bram-config 27_231
BRAM_L.RAMB18_Y1.ZINIT_B[15] origin:025-bram-config 27_215
BRAM_L.RAMB18_Y1.ZINIT_B[16] origin:025-bram-config 27_199
BRAM_L.RAMB18_Y1.ZINIT_B[17] origin:025-bram-config 27_183
BRAM_L.RAMB18_Y1.ZINV_CLKARDCLK origin:025-bram-config 27_213
BRAM_L.RAMB18_Y1.ZINV_CLKBWRCLK origin:025-bram-config 27_211
BRAM_L.RAMB18_Y1.ZINV_ENARDEN origin:025-bram-config 27_208
@ -383,14 +409,6 @@ BRAM_L.RAMB18_Y1.ZINV_RSTRAMB origin:025-bram-config 27_203
BRAM_L.RAMB18_Y1.ZINV_RSTREGARSTREG origin:025-bram-config 27_200
BRAM_L.RAMB18_Y1.ZINV_RSTREGB origin:025-bram-config 27_197
BRAM_L.RAMB18_Y1.ZSRVAL_A[0] origin:025-bram-config 27_250
BRAM_L.RAMB18_Y1.ZSRVAL_A[10] origin:025-bram-config 27_306
BRAM_L.RAMB18_Y1.ZSRVAL_A[11] origin:025-bram-config 27_290
BRAM_L.RAMB18_Y1.ZSRVAL_A[12] origin:025-bram-config 27_274
BRAM_L.RAMB18_Y1.ZSRVAL_A[13] origin:025-bram-config 27_258
BRAM_L.RAMB18_Y1.ZSRVAL_A[14] origin:025-bram-config 27_226
BRAM_L.RAMB18_Y1.ZSRVAL_A[15] origin:025-bram-config 27_210
BRAM_L.RAMB18_Y1.ZSRVAL_A[16] origin:025-bram-config 27_194
BRAM_L.RAMB18_Y1.ZSRVAL_A[17] origin:025-bram-config 27_178
BRAM_L.RAMB18_Y1.ZSRVAL_A[1] origin:025-bram-config 27_242
BRAM_L.RAMB18_Y1.ZSRVAL_A[2] origin:025-bram-config 27_314
BRAM_L.RAMB18_Y1.ZSRVAL_A[3] origin:025-bram-config 27_298
@ -400,15 +418,15 @@ BRAM_L.RAMB18_Y1.ZSRVAL_A[6] origin:025-bram-config 27_234
BRAM_L.RAMB18_Y1.ZSRVAL_A[7] origin:025-bram-config 27_218
BRAM_L.RAMB18_Y1.ZSRVAL_A[8] origin:025-bram-config 27_202
BRAM_L.RAMB18_Y1.ZSRVAL_A[9] origin:025-bram-config 27_186
BRAM_L.RAMB18_Y1.ZSRVAL_A[10] origin:025-bram-config 27_306
BRAM_L.RAMB18_Y1.ZSRVAL_A[11] origin:025-bram-config 27_290
BRAM_L.RAMB18_Y1.ZSRVAL_A[12] origin:025-bram-config 27_274
BRAM_L.RAMB18_Y1.ZSRVAL_A[13] origin:025-bram-config 27_258
BRAM_L.RAMB18_Y1.ZSRVAL_A[14] origin:025-bram-config 27_226
BRAM_L.RAMB18_Y1.ZSRVAL_A[15] origin:025-bram-config 27_210
BRAM_L.RAMB18_Y1.ZSRVAL_A[16] origin:025-bram-config 27_194
BRAM_L.RAMB18_Y1.ZSRVAL_A[17] origin:025-bram-config 27_178
BRAM_L.RAMB18_Y1.ZSRVAL_B[0] origin:025-bram-config 27_254
BRAM_L.RAMB18_Y1.ZSRVAL_B[10] origin:025-bram-config 27_310
BRAM_L.RAMB18_Y1.ZSRVAL_B[11] origin:025-bram-config 27_294
BRAM_L.RAMB18_Y1.ZSRVAL_B[12] origin:025-bram-config 27_278
BRAM_L.RAMB18_Y1.ZSRVAL_B[13] origin:025-bram-config 27_262
BRAM_L.RAMB18_Y1.ZSRVAL_B[14] origin:025-bram-config 27_230
BRAM_L.RAMB18_Y1.ZSRVAL_B[15] origin:025-bram-config 27_214
BRAM_L.RAMB18_Y1.ZSRVAL_B[16] origin:025-bram-config 27_198
BRAM_L.RAMB18_Y1.ZSRVAL_B[17] origin:025-bram-config 27_182
BRAM_L.RAMB18_Y1.ZSRVAL_B[1] origin:025-bram-config 27_246
BRAM_L.RAMB18_Y1.ZSRVAL_B[2] origin:025-bram-config 27_318
BRAM_L.RAMB18_Y1.ZSRVAL_B[3] origin:025-bram-config 27_302
@ -418,35 +436,17 @@ BRAM_L.RAMB18_Y1.ZSRVAL_B[6] origin:025-bram-config 27_238
BRAM_L.RAMB18_Y1.ZSRVAL_B[7] origin:025-bram-config 27_222
BRAM_L.RAMB18_Y1.ZSRVAL_B[8] origin:025-bram-config 27_206
BRAM_L.RAMB18_Y1.ZSRVAL_B[9] origin:025-bram-config 27_190
BRAM_L.RAMB18_Y1.ZSRVAL_B[10] origin:025-bram-config 27_310
BRAM_L.RAMB18_Y1.ZSRVAL_B[11] origin:025-bram-config 27_294
BRAM_L.RAMB18_Y1.ZSRVAL_B[12] origin:025-bram-config 27_278
BRAM_L.RAMB18_Y1.ZSRVAL_B[13] origin:025-bram-config 27_262
BRAM_L.RAMB18_Y1.ZSRVAL_B[14] origin:025-bram-config 27_230
BRAM_L.RAMB18_Y1.ZSRVAL_B[15] origin:025-bram-config 27_214
BRAM_L.RAMB18_Y1.ZSRVAL_B[16] origin:025-bram-config 27_198
BRAM_L.RAMB18_Y1.ZSRVAL_B[17] origin:025-bram-config 27_182
BRAM_L.RAMB36.EN_ECC_READ origin:027-bram36-config 27_175
BRAM_L.RAMB36.EN_ECC_WRITE origin:027-bram36-config 27_162
BRAM_L.RAMB36.RAM_EXTENSION_A_LOWER origin:027-bram36-config 27_188
BRAM_L.RAMB36.RAM_EXTENSION_A_NONE_OR_UPPER origin:027-bram36-config !27_188
BRAM_L.RAMB36.RAM_EXTENSION_B_LOWER origin:027-bram36-config 27_187
BRAM_L.RAMB36.RAM_EXTENSION_B_NONE_OR_UPPER origin:027-bram36-config !27_187
BRAM_L.ZALMOST_EMPTY_OFFSET[0] origin:028-fifo-config 27_288
BRAM_L.ZALMOST_EMPTY_OFFSET[10] origin:028-fifo-config 27_308
BRAM_L.ZALMOST_EMPTY_OFFSET[11] origin:028-fifo-config 27_309
BRAM_L.ZALMOST_EMPTY_OFFSET[12] origin:028-fifo-config 27_312
BRAM_L.ZALMOST_EMPTY_OFFSET[1] origin:028-fifo-config 27_291
BRAM_L.ZALMOST_EMPTY_OFFSET[2] origin:028-fifo-config 27_292
BRAM_L.ZALMOST_EMPTY_OFFSET[3] origin:028-fifo-config 27_293
BRAM_L.ZALMOST_EMPTY_OFFSET[4] origin:028-fifo-config 27_296
BRAM_L.ZALMOST_EMPTY_OFFSET[5] origin:028-fifo-config 27_299
BRAM_L.ZALMOST_EMPTY_OFFSET[6] origin:028-fifo-config 27_300
BRAM_L.ZALMOST_EMPTY_OFFSET[7] origin:028-fifo-config 27_301
BRAM_L.ZALMOST_EMPTY_OFFSET[8] origin:028-fifo-config 27_304
BRAM_L.ZALMOST_EMPTY_OFFSET[9] origin:028-fifo-config 27_307
BRAM_L.ZALMOST_FULL_OFFSET[0] origin:028-fifo-config 27_32
BRAM_L.ZALMOST_FULL_OFFSET[10] origin:028-fifo-config 27_12
BRAM_L.ZALMOST_FULL_OFFSET[11] origin:028-fifo-config 27_11
BRAM_L.ZALMOST_FULL_OFFSET[12] origin:028-fifo-config 27_08
BRAM_L.ZALMOST_FULL_OFFSET[1] origin:028-fifo-config 27_29
BRAM_L.ZALMOST_FULL_OFFSET[2] origin:028-fifo-config 27_28
BRAM_L.ZALMOST_FULL_OFFSET[3] origin:028-fifo-config 27_27
BRAM_L.ZALMOST_FULL_OFFSET[4] origin:028-fifo-config 27_24
BRAM_L.ZALMOST_FULL_OFFSET[5] origin:028-fifo-config 27_21
BRAM_L.ZALMOST_FULL_OFFSET[6] origin:028-fifo-config 27_20
BRAM_L.ZALMOST_FULL_OFFSET[7] origin:028-fifo-config 27_19
BRAM_L.ZALMOST_FULL_OFFSET[8] origin:028-fifo-config 27_16
BRAM_L.ZALMOST_FULL_OFFSET[9] origin:028-fifo-config 27_13

26624
artix7/segbits_bram_r.block_ram.origin_info.db
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File diff suppressed because it is too large Load Diff

316
artix7/segbits_bram_r.origin_info.db
View File

@ -4,21 +4,6 @@ BRAM_R.BRAM_ADDRARDADDRL0.BRAM_R_IMUX_ADDRARDADDRL0 origin:060-bram-cascades !26
BRAM_R.BRAM_ADDRARDADDRL1.BRAM_CASCINBOT_ADDRARDADDRU1 origin:060-bram-cascades !26_49 26_48 26_51
BRAM_R.BRAM_ADDRARDADDRL1.BRAM_CASCINTOP_ADDRARDADDRU1 origin:060-bram-cascades !26_51 26_48 26_49
BRAM_R.BRAM_ADDRARDADDRL1.BRAM_R_IMUX_ADDRARDADDRL1 origin:060-bram-cascades !26_48 !26_49 !26_51
BRAM_R.BRAM_ADDRARDADDRL10.BRAM_CASCINBOT_ADDRARDADDRU10 origin:060-bram-cascades !26_145 26_144 26_147
BRAM_R.BRAM_ADDRARDADDRL10.BRAM_CASCINTOP_ADDRARDADDRU10 origin:060-bram-cascades !26_147 26_144 26_145
BRAM_R.BRAM_ADDRARDADDRL10.BRAM_R_IMUX_ADDRARDADDRL10 origin:060-bram-cascades !26_144 !26_145 !26_147
BRAM_R.BRAM_ADDRARDADDRL11.BRAM_CASCINBOT_ADDRARDADDRU11 origin:060-bram-cascades !26_113 26_112 26_115
BRAM_R.BRAM_ADDRARDADDRL11.BRAM_CASCINTOP_ADDRARDADDRU11 origin:060-bram-cascades !26_115 26_112 26_113
BRAM_R.BRAM_ADDRARDADDRL11.BRAM_R_IMUX_ADDRARDADDRL11 origin:060-bram-cascades !26_112 !26_113 !26_115
BRAM_R.BRAM_ADDRARDADDRL12.BRAM_CASCINBOT_ADDRARDADDRU12 origin:060-bram-cascades !26_241 26_240 26_243
BRAM_R.BRAM_ADDRARDADDRL12.BRAM_CASCINTOP_ADDRARDADDRU12 origin:060-bram-cascades !26_243 26_240 26_241
BRAM_R.BRAM_ADDRARDADDRL12.BRAM_R_IMUX_ADDRARDADDRL12 origin:060-bram-cascades !26_240 !26_241 !26_243
BRAM_R.BRAM_ADDRARDADDRL13.BRAM_CASCINBOT_ADDRARDADDRU13 origin:060-bram-cascades !26_129 26_128 26_131
BRAM_R.BRAM_ADDRARDADDRL13.BRAM_CASCINTOP_ADDRARDADDRU13 origin:060-bram-cascades !26_131 26_128 26_129
BRAM_R.BRAM_ADDRARDADDRL13.BRAM_R_IMUX_ADDRARDADDRL13 origin:060-bram-cascades !26_128 !26_129 !26_131
BRAM_R.BRAM_ADDRARDADDRL14.BRAM_CASCINBOT_ADDRARDADDRU14 origin:060-bram-cascades !26_257 26_256 26_259
BRAM_R.BRAM_ADDRARDADDRL14.BRAM_CASCINTOP_ADDRARDADDRU14 origin:060-bram-cascades !26_259 26_256 26_257
BRAM_R.BRAM_ADDRARDADDRL14.BRAM_R_IMUX_ADDRARDADDRL14 origin:060-bram-cascades !26_256 !26_257 !26_259
BRAM_R.BRAM_ADDRARDADDRL2.BRAM_CASCINBOT_ADDRARDADDRU2 origin:060-bram-cascades !26_65 26_64 26_67
BRAM_R.BRAM_ADDRARDADDRL2.BRAM_CASCINTOP_ADDRARDADDRU2 origin:060-bram-cascades !26_67 26_64 26_65
BRAM_R.BRAM_ADDRARDADDRL2.BRAM_R_IMUX_ADDRARDADDRL2 origin:060-bram-cascades !26_64 !26_65 !26_67
@ -43,27 +28,27 @@ BRAM_R.BRAM_ADDRARDADDRL8.BRAM_R_IMUX_ADDRARDADDRL8 origin:060-bram-cascades !26
BRAM_R.BRAM_ADDRARDADDRL9.BRAM_CASCINBOT_ADDRARDADDRU9 origin:060-bram-cascades !26_209 26_208 26_211
BRAM_R.BRAM_ADDRARDADDRL9.BRAM_CASCINTOP_ADDRARDADDRU9 origin:060-bram-cascades !26_211 26_208 26_209
BRAM_R.BRAM_ADDRARDADDRL9.BRAM_R_IMUX_ADDRARDADDRL9 origin:060-bram-cascades !26_208 !26_209 !26_211
BRAM_R.BRAM_ADDRARDADDRL10.BRAM_CASCINBOT_ADDRARDADDRU10 origin:060-bram-cascades !26_145 26_144 26_147
BRAM_R.BRAM_ADDRARDADDRL10.BRAM_CASCINTOP_ADDRARDADDRU10 origin:060-bram-cascades !26_147 26_144 26_145
BRAM_R.BRAM_ADDRARDADDRL10.BRAM_R_IMUX_ADDRARDADDRL10 origin:060-bram-cascades !26_144 !26_145 !26_147
BRAM_R.BRAM_ADDRARDADDRL11.BRAM_CASCINBOT_ADDRARDADDRU11 origin:060-bram-cascades !26_113 26_112 26_115
BRAM_R.BRAM_ADDRARDADDRL11.BRAM_CASCINTOP_ADDRARDADDRU11 origin:060-bram-cascades !26_115 26_112 26_113
BRAM_R.BRAM_ADDRARDADDRL11.BRAM_R_IMUX_ADDRARDADDRL11 origin:060-bram-cascades !26_112 !26_113 !26_115
BRAM_R.BRAM_ADDRARDADDRL12.BRAM_CASCINBOT_ADDRARDADDRU12 origin:060-bram-cascades !26_241 26_240 26_243
BRAM_R.BRAM_ADDRARDADDRL12.BRAM_CASCINTOP_ADDRARDADDRU12 origin:060-bram-cascades !26_243 26_240 26_241
BRAM_R.BRAM_ADDRARDADDRL12.BRAM_R_IMUX_ADDRARDADDRL12 origin:060-bram-cascades !26_240 !26_241 !26_243
BRAM_R.BRAM_ADDRARDADDRL13.BRAM_CASCINBOT_ADDRARDADDRU13 origin:060-bram-cascades !26_129 26_128 26_131
BRAM_R.BRAM_ADDRARDADDRL13.BRAM_CASCINTOP_ADDRARDADDRU13 origin:060-bram-cascades !26_131 26_128 26_129
BRAM_R.BRAM_ADDRARDADDRL13.BRAM_R_IMUX_ADDRARDADDRL13 origin:060-bram-cascades !26_128 !26_129 !26_131
BRAM_R.BRAM_ADDRARDADDRL14.BRAM_CASCINBOT_ADDRARDADDRU14 origin:060-bram-cascades !26_257 26_256 26_259
BRAM_R.BRAM_ADDRARDADDRL14.BRAM_CASCINTOP_ADDRARDADDRU14 origin:060-bram-cascades !26_259 26_256 26_257
BRAM_R.BRAM_ADDRARDADDRL14.BRAM_R_IMUX_ADDRARDADDRL14 origin:060-bram-cascades !26_256 !26_257 !26_259
BRAM_R.BRAM_ADDRARDADDRU0.BRAM_CASCINBOT_ADDRARDADDRU0 origin:060-bram-cascades !26_38 26_37 26_39
BRAM_R.BRAM_ADDRARDADDRU0.BRAM_CASCINTOP_ADDRARDADDRU0 origin:060-bram-cascades !26_37 26_38 26_39
BRAM_R.BRAM_ADDRARDADDRU0.BRAM_R_IMUX_ADDRARDADDRU0 origin:060-bram-cascades !26_37 !26_38 !26_39
BRAM_R.BRAM_ADDRARDADDRU1.BRAM_CASCINBOT_ADDRARDADDRU1 origin:060-bram-cascades !26_54 26_53 26_55
BRAM_R.BRAM_ADDRARDADDRU1.BRAM_CASCINTOP_ADDRARDADDRU1 origin:060-bram-cascades !26_53 26_54 26_55
BRAM_R.BRAM_ADDRARDADDRU1.BRAM_R_IMUX_ADDRARDADDRU1 origin:060-bram-cascades !26_53 !26_54 !26_55
BRAM_R.BRAM_ADDRARDADDRU10.BRAM_CASCINBOT_ADDRARDADDRU10 origin:060-bram-cascades !26_150 26_149 26_151
BRAM_R.BRAM_ADDRARDADDRU10.BRAM_CASCINTOP_ADDRARDADDRU10 origin:060-bram-cascades !26_149 26_150 26_151
BRAM_R.BRAM_ADDRARDADDRU10.BRAM_R_IMUX_ADDRARDADDRU10 origin:060-bram-cascades !26_149 !26_150 !26_151
BRAM_R.BRAM_ADDRARDADDRU11.BRAM_CASCINBOT_ADDRARDADDRU11 origin:060-bram-cascades !26_118 26_117 26_119
BRAM_R.BRAM_ADDRARDADDRU11.BRAM_CASCINTOP_ADDRARDADDRU11 origin:060-bram-cascades !26_117 26_118 26_119
BRAM_R.BRAM_ADDRARDADDRU11.BRAM_R_IMUX_ADDRARDADDRU11 origin:060-bram-cascades !26_117 !26_118 !26_119
BRAM_R.BRAM_ADDRARDADDRU12.BRAM_CASCINBOT_ADDRARDADDRU12 origin:060-bram-cascades !26_246 26_245 26_247
BRAM_R.BRAM_ADDRARDADDRU12.BRAM_CASCINTOP_ADDRARDADDRU12 origin:060-bram-cascades !26_245 26_246 26_247
BRAM_R.BRAM_ADDRARDADDRU12.BRAM_R_IMUX_ADDRARDADDRU12 origin:060-bram-cascades !26_245 !26_246 !26_247
BRAM_R.BRAM_ADDRARDADDRU13.BRAM_CASCINBOT_ADDRARDADDRU13 origin:060-bram-cascades !26_134 26_133 26_135
BRAM_R.BRAM_ADDRARDADDRU13.BRAM_CASCINTOP_ADDRARDADDRU13 origin:060-bram-cascades !26_133 26_134 26_135
BRAM_R.BRAM_ADDRARDADDRU13.BRAM_R_IMUX_ADDRARDADDRU13 origin:060-bram-cascades !26_133 !26_134 !26_135
BRAM_R.BRAM_ADDRARDADDRU14.BRAM_CASCINBOT_ADDRARDADDRU14 origin:060-bram-cascades !26_262 26_261 26_263
BRAM_R.BRAM_ADDRARDADDRU14.BRAM_CASCINTOP_ADDRARDADDRU14 origin:060-bram-cascades !26_261 26_262 26_263
BRAM_R.BRAM_ADDRARDADDRU14.BRAM_R_IMUX_ADDRARDADDRU14 origin:060-bram-cascades !26_261 !26_262 !26_263
BRAM_R.BRAM_ADDRARDADDRU2.BRAM_CASCINBOT_ADDRARDADDRU2 origin:060-bram-cascades !26_70 26_69 26_71
BRAM_R.BRAM_ADDRARDADDRU2.BRAM_CASCINTOP_ADDRARDADDRU2 origin:060-bram-cascades !26_69 26_70 26_71
BRAM_R.BRAM_ADDRARDADDRU2.BRAM_R_IMUX_ADDRARDADDRU2 origin:060-bram-cascades !26_69 !26_70 !26_71
@ -88,27 +73,27 @@ BRAM_R.BRAM_ADDRARDADDRU8.BRAM_R_IMUX_ADDRARDADDRU8 origin:060-bram-cascades !26
BRAM_R.BRAM_ADDRARDADDRU9.BRAM_CASCINBOT_ADDRARDADDRU9 origin:060-bram-cascades !26_214 26_213 26_215
BRAM_R.BRAM_ADDRARDADDRU9.BRAM_CASCINTOP_ADDRARDADDRU9 origin:060-bram-cascades !26_213 26_214 26_215
BRAM_R.BRAM_ADDRARDADDRU9.BRAM_R_IMUX_ADDRARDADDRU9 origin:060-bram-cascades !26_213 !26_214 !26_215
BRAM_R.BRAM_ADDRARDADDRU10.BRAM_CASCINBOT_ADDRARDADDRU10 origin:060-bram-cascades !26_150 26_149 26_151
BRAM_R.BRAM_ADDRARDADDRU10.BRAM_CASCINTOP_ADDRARDADDRU10 origin:060-bram-cascades !26_149 26_150 26_151
BRAM_R.BRAM_ADDRARDADDRU10.BRAM_R_IMUX_ADDRARDADDRU10 origin:060-bram-cascades !26_149 !26_150 !26_151
BRAM_R.BRAM_ADDRARDADDRU11.BRAM_CASCINBOT_ADDRARDADDRU11 origin:060-bram-cascades !26_118 26_117 26_119
BRAM_R.BRAM_ADDRARDADDRU11.BRAM_CASCINTOP_ADDRARDADDRU11 origin:060-bram-cascades !26_117 26_118 26_119
BRAM_R.BRAM_ADDRARDADDRU11.BRAM_R_IMUX_ADDRARDADDRU11 origin:060-bram-cascades !26_117 !26_118 !26_119
BRAM_R.BRAM_ADDRARDADDRU12.BRAM_CASCINBOT_ADDRARDADDRU12 origin:060-bram-cascades !26_246 26_245 26_247
BRAM_R.BRAM_ADDRARDADDRU12.BRAM_CASCINTOP_ADDRARDADDRU12 origin:060-bram-cascades !26_245 26_246 26_247
BRAM_R.BRAM_ADDRARDADDRU12.BRAM_R_IMUX_ADDRARDADDRU12 origin:060-bram-cascades !26_245 !26_246 !26_247
BRAM_R.BRAM_ADDRARDADDRU13.BRAM_CASCINBOT_ADDRARDADDRU13 origin:060-bram-cascades !26_134 26_133 26_135
BRAM_R.BRAM_ADDRARDADDRU13.BRAM_CASCINTOP_ADDRARDADDRU13 origin:060-bram-cascades !26_133 26_134 26_135
BRAM_R.BRAM_ADDRARDADDRU13.BRAM_R_IMUX_ADDRARDADDRU13 origin:060-bram-cascades !26_133 !26_134 !26_135
BRAM_R.BRAM_ADDRARDADDRU14.BRAM_CASCINBOT_ADDRARDADDRU14 origin:060-bram-cascades !26_262 26_261 26_263
BRAM_R.BRAM_ADDRARDADDRU14.BRAM_CASCINTOP_ADDRARDADDRU14 origin:060-bram-cascades !26_261 26_262 26_263
BRAM_R.BRAM_ADDRARDADDRU14.BRAM_R_IMUX_ADDRARDADDRU14 origin:060-bram-cascades !26_261 !26_262 !26_263
BRAM_R.BRAM_ADDRBWRADDRL0.BRAM_CASCINBOT_ADDRBWRADDRU0 origin:060-bram-cascades !26_41 26_40 26_43
BRAM_R.BRAM_ADDRBWRADDRL0.BRAM_CASCINTOP_ADDRBWRADDRU0 origin:060-bram-cascades !26_43 26_40 26_41
BRAM_R.BRAM_ADDRBWRADDRL0.BRAM_R_IMUX_ADDRBWRADDRL0 origin:060-bram-cascades !26_40 !26_41 !26_43
BRAM_R.BRAM_ADDRBWRADDRL1.BRAM_CASCINBOT_ADDRBWRADDRU1 origin:060-bram-cascades !26_57 26_56 26_59
BRAM_R.BRAM_ADDRBWRADDRL1.BRAM_CASCINTOP_ADDRBWRADDRU1 origin:060-bram-cascades !26_59 26_56 26_57
BRAM_R.BRAM_ADDRBWRADDRL1.BRAM_R_IMUX_ADDRBWRADDRL1 origin:060-bram-cascades !26_56 !26_57 !26_59
BRAM_R.BRAM_ADDRBWRADDRL10.BRAM_CASCINBOT_ADDRBWRADDRU10 origin:060-bram-cascades !26_153 26_152 26_155
BRAM_R.BRAM_ADDRBWRADDRL10.BRAM_CASCINTOP_ADDRBWRADDRU10 origin:060-bram-cascades !26_155 26_152 26_153
BRAM_R.BRAM_ADDRBWRADDRL10.BRAM_R_IMUX_ADDRBWRADDRL10 origin:060-bram-cascades !26_152 !26_153 !26_155
BRAM_R.BRAM_ADDRBWRADDRL11.BRAM_CASCINBOT_ADDRBWRADDRU11 origin:060-bram-cascades !26_121 26_120 26_123
BRAM_R.BRAM_ADDRBWRADDRL11.BRAM_CASCINTOP_ADDRBWRADDRU11 origin:060-bram-cascades !26_123 26_120 26_121
BRAM_R.BRAM_ADDRBWRADDRL11.BRAM_R_IMUX_ADDRBWRADDRL11 origin:060-bram-cascades !26_120 !26_121 !26_123
BRAM_R.BRAM_ADDRBWRADDRL12.BRAM_CASCINBOT_ADDRBWRADDRU12 origin:060-bram-cascades !26_249 26_248 26_251
BRAM_R.BRAM_ADDRBWRADDRL12.BRAM_CASCINTOP_ADDRBWRADDRU12 origin:060-bram-cascades !26_251 26_248 26_249
BRAM_R.BRAM_ADDRBWRADDRL12.BRAM_R_IMUX_ADDRBWRADDRL12 origin:060-bram-cascades !26_248 !26_249 !26_251
BRAM_R.BRAM_ADDRBWRADDRL13.BRAM_CASCINBOT_ADDRBWRADDRU13 origin:060-bram-cascades !26_137 26_136 26_139
BRAM_R.BRAM_ADDRBWRADDRL13.BRAM_CASCINTOP_ADDRBWRADDRU13 origin:060-bram-cascades !26_139 26_136 26_137
BRAM_R.BRAM_ADDRBWRADDRL13.BRAM_R_IMUX_ADDRBWRADDRL13 origin:060-bram-cascades !26_136 !26_137 !26_139
BRAM_R.BRAM_ADDRBWRADDRL14.BRAM_CASCINBOT_ADDRBWRADDRU14 origin:060-bram-cascades !26_265 26_264 26_267
BRAM_R.BRAM_ADDRBWRADDRL14.BRAM_CASCINTOP_ADDRBWRADDRU14 origin:060-bram-cascades !26_267 26_264 26_265
BRAM_R.BRAM_ADDRBWRADDRL14.BRAM_R_IMUX_ADDRBWRADDRL14 origin:060-bram-cascades !26_264 !26_265 !26_267
BRAM_R.BRAM_ADDRBWRADDRL2.BRAM_CASCINBOT_ADDRBWRADDRU2 origin:060-bram-cascades !26_73 26_72 26_75
BRAM_R.BRAM_ADDRBWRADDRL2.BRAM_CASCINTOP_ADDRBWRADDRU2 origin:060-bram-cascades !26_75 26_72 26_73
BRAM_R.BRAM_ADDRBWRADDRL2.BRAM_R_IMUX_ADDRBWRADDRL2 origin:060-bram-cascades !26_72 !26_73 !26_75
@ -133,27 +118,27 @@ BRAM_R.BRAM_ADDRBWRADDRL8.BRAM_R_IMUX_ADDRBWRADDRL8 origin:060-bram-cascades !26
BRAM_R.BRAM_ADDRBWRADDRL9.BRAM_CASCINBOT_ADDRBWRADDRU9 origin:060-bram-cascades !26_217 26_216 26_219
BRAM_R.BRAM_ADDRBWRADDRL9.BRAM_CASCINTOP_ADDRBWRADDRU9 origin:060-bram-cascades !26_219 26_216 26_217
BRAM_R.BRAM_ADDRBWRADDRL9.BRAM_R_IMUX_ADDRBWRADDRL9 origin:060-bram-cascades !26_216 !26_217 !26_219
BRAM_R.BRAM_ADDRBWRADDRL10.BRAM_CASCINBOT_ADDRBWRADDRU10 origin:060-bram-cascades !26_153 26_152 26_155
BRAM_R.BRAM_ADDRBWRADDRL10.BRAM_CASCINTOP_ADDRBWRADDRU10 origin:060-bram-cascades !26_155 26_152 26_153
BRAM_R.BRAM_ADDRBWRADDRL10.BRAM_R_IMUX_ADDRBWRADDRL10 origin:060-bram-cascades !26_152 !26_153 !26_155
BRAM_R.BRAM_ADDRBWRADDRL11.BRAM_CASCINBOT_ADDRBWRADDRU11 origin:060-bram-cascades !26_121 26_120 26_123
BRAM_R.BRAM_ADDRBWRADDRL11.BRAM_CASCINTOP_ADDRBWRADDRU11 origin:060-bram-cascades !26_123 26_120 26_121
BRAM_R.BRAM_ADDRBWRADDRL11.BRAM_R_IMUX_ADDRBWRADDRL11 origin:060-bram-cascades !26_120 !26_121 !26_123
BRAM_R.BRAM_ADDRBWRADDRL12.BRAM_CASCINBOT_ADDRBWRADDRU12 origin:060-bram-cascades !26_249 26_248 26_251
BRAM_R.BRAM_ADDRBWRADDRL12.BRAM_CASCINTOP_ADDRBWRADDRU12 origin:060-bram-cascades !26_251 26_248 26_249
BRAM_R.BRAM_ADDRBWRADDRL12.BRAM_R_IMUX_ADDRBWRADDRL12 origin:060-bram-cascades !26_248 !26_249 !26_251
BRAM_R.BRAM_ADDRBWRADDRL13.BRAM_CASCINBOT_ADDRBWRADDRU13 origin:060-bram-cascades !26_137 26_136 26_139
BRAM_R.BRAM_ADDRBWRADDRL13.BRAM_CASCINTOP_ADDRBWRADDRU13 origin:060-bram-cascades !26_139 26_136 26_137
BRAM_R.BRAM_ADDRBWRADDRL13.BRAM_R_IMUX_ADDRBWRADDRL13 origin:060-bram-cascades !26_136 !26_137 !26_139
BRAM_R.BRAM_ADDRBWRADDRL14.BRAM_CASCINBOT_ADDRBWRADDRU14 origin:060-bram-cascades !26_265 26_264 26_267
BRAM_R.BRAM_ADDRBWRADDRL14.BRAM_CASCINTOP_ADDRBWRADDRU14 origin:060-bram-cascades !26_267 26_264 26_265
BRAM_R.BRAM_ADDRBWRADDRL14.BRAM_R_IMUX_ADDRBWRADDRL14 origin:060-bram-cascades !26_264 !26_265 !26_267
BRAM_R.BRAM_ADDRBWRADDRU0.BRAM_CASCINBOT_ADDRBWRADDRU0 origin:060-bram-cascades !26_46 26_45 26_47
BRAM_R.BRAM_ADDRBWRADDRU0.BRAM_CASCINTOP_ADDRBWRADDRU0 origin:060-bram-cascades !26_45 26_46 26_47
BRAM_R.BRAM_ADDRBWRADDRU0.BRAM_R_IMUX_ADDRBWRADDRU0 origin:060-bram-cascades !26_45 !26_46 !26_47
BRAM_R.BRAM_ADDRBWRADDRU1.BRAM_CASCINBOT_ADDRBWRADDRU1 origin:060-bram-cascades !26_62 26_61 26_63
BRAM_R.BRAM_ADDRBWRADDRU1.BRAM_CASCINTOP_ADDRBWRADDRU1 origin:060-bram-cascades !26_61 26_62 26_63
BRAM_R.BRAM_ADDRBWRADDRU1.BRAM_R_IMUX_ADDRBWRADDRU1 origin:060-bram-cascades !26_61 !26_62 !26_63
BRAM_R.BRAM_ADDRBWRADDRU10.BRAM_CASCINBOT_ADDRBWRADDRU10 origin:060-bram-cascades !26_158 26_157 26_159
BRAM_R.BRAM_ADDRBWRADDRU10.BRAM_CASCINTOP_ADDRBWRADDRU10 origin:060-bram-cascades !26_157 26_158 26_159
BRAM_R.BRAM_ADDRBWRADDRU10.BRAM_R_IMUX_ADDRBWRADDRU10 origin:060-bram-cascades !26_157 !26_158 !26_159
BRAM_R.BRAM_ADDRBWRADDRU11.BRAM_CASCINBOT_ADDRBWRADDRU11 origin:060-bram-cascades !26_126 26_125 26_127
BRAM_R.BRAM_ADDRBWRADDRU11.BRAM_CASCINTOP_ADDRBWRADDRU11 origin:060-bram-cascades !26_125 26_126 26_127
BRAM_R.BRAM_ADDRBWRADDRU11.BRAM_R_IMUX_ADDRBWRADDRU11 origin:060-bram-cascades !26_125 !26_126 !26_127
BRAM_R.BRAM_ADDRBWRADDRU12.BRAM_CASCINBOT_ADDRBWRADDRU12 origin:060-bram-cascades !26_254 26_253 26_255
BRAM_R.BRAM_ADDRBWRADDRU12.BRAM_CASCINTOP_ADDRBWRADDRU12 origin:060-bram-cascades !26_253 26_254 26_255
BRAM_R.BRAM_ADDRBWRADDRU12.BRAM_R_IMUX_ADDRBWRADDRU12 origin:060-bram-cascades !26_253 !26_254 !26_255
BRAM_R.BRAM_ADDRBWRADDRU13.BRAM_CASCINBOT_ADDRBWRADDRU13 origin:060-bram-cascades !26_142 26_141 26_143
BRAM_R.BRAM_ADDRBWRADDRU13.BRAM_CASCINTOP_ADDRBWRADDRU13 origin:060-bram-cascades !26_141 26_142 26_143
BRAM_R.BRAM_ADDRBWRADDRU13.BRAM_R_IMUX_ADDRBWRADDRU13 origin:060-bram-cascades !26_141 !26_142 !26_143
BRAM_R.BRAM_ADDRBWRADDRU14.BRAM_CASCINBOT_ADDRBWRADDRU14 origin:060-bram-cascades !26_270 26_269 26_271
BRAM_R.BRAM_ADDRBWRADDRU14.BRAM_CASCINTOP_ADDRBWRADDRU14 origin:060-bram-cascades !26_269 26_270 26_271
BRAM_R.BRAM_ADDRBWRADDRU14.BRAM_R_IMUX_ADDRBWRADDRU14 origin:060-bram-cascades !26_269 !26_270 !26_271
BRAM_R.BRAM_ADDRBWRADDRU2.BRAM_CASCINBOT_ADDRBWRADDRU2 origin:060-bram-cascades !26_78 26_77 26_79
BRAM_R.BRAM_ADDRBWRADDRU2.BRAM_CASCINTOP_ADDRBWRADDRU2 origin:060-bram-cascades !26_77 26_78 26_79
BRAM_R.BRAM_ADDRBWRADDRU2.BRAM_R_IMUX_ADDRBWRADDRU2 origin:060-bram-cascades !26_77 !26_78 !26_79
@ -178,10 +163,51 @@ BRAM_R.BRAM_ADDRBWRADDRU8.BRAM_R_IMUX_ADDRBWRADDRU8 origin:060-bram-cascades !26
BRAM_R.BRAM_ADDRBWRADDRU9.BRAM_CASCINBOT_ADDRBWRADDRU9 origin:060-bram-cascades !26_222 26_221 26_223
BRAM_R.BRAM_ADDRBWRADDRU9.BRAM_CASCINTOP_ADDRBWRADDRU9 origin:060-bram-cascades !26_221 26_222 26_223
BRAM_R.BRAM_ADDRBWRADDRU9.BRAM_R_IMUX_ADDRBWRADDRU9 origin:060-bram-cascades !26_221 !26_222 !26_223
BRAM_R.BRAM_ADDRBWRADDRU10.BRAM_CASCINBOT_ADDRBWRADDRU10 origin:060-bram-cascades !26_158 26_157 26_159
BRAM_R.BRAM_ADDRBWRADDRU10.BRAM_CASCINTOP_ADDRBWRADDRU10 origin:060-bram-cascades !26_157 26_158 26_159
BRAM_R.BRAM_ADDRBWRADDRU10.BRAM_R_IMUX_ADDRBWRADDRU10 origin:060-bram-cascades !26_157 !26_158 !26_159
BRAM_R.BRAM_ADDRBWRADDRU11.BRAM_CASCINBOT_ADDRBWRADDRU11 origin:060-bram-cascades !26_126 26_125 26_127
BRAM_R.BRAM_ADDRBWRADDRU11.BRAM_CASCINTOP_ADDRBWRADDRU11 origin:060-bram-cascades !26_125 26_126 26_127
BRAM_R.BRAM_ADDRBWRADDRU11.BRAM_R_IMUX_ADDRBWRADDRU11 origin:060-bram-cascades !26_125 !26_126 !26_127
BRAM_R.BRAM_ADDRBWRADDRU12.BRAM_CASCINBOT_ADDRBWRADDRU12 origin:060-bram-cascades !26_254 26_253 26_255
BRAM_R.BRAM_ADDRBWRADDRU12.BRAM_CASCINTOP_ADDRBWRADDRU12 origin:060-bram-cascades !26_253 26_254 26_255
BRAM_R.BRAM_ADDRBWRADDRU12.BRAM_R_IMUX_ADDRBWRADDRU12 origin:060-bram-cascades !26_253 !26_254 !26_255
BRAM_R.BRAM_ADDRBWRADDRU13.BRAM_CASCINBOT_ADDRBWRADDRU13 origin:060-bram-cascades !26_142 26_141 26_143
BRAM_R.BRAM_ADDRBWRADDRU13.BRAM_CASCINTOP_ADDRBWRADDRU13 origin:060-bram-cascades !26_141 26_142 26_143
BRAM_R.BRAM_ADDRBWRADDRU13.BRAM_R_IMUX_ADDRBWRADDRU13 origin:060-bram-cascades !26_141 !26_142 !26_143
BRAM_R.BRAM_ADDRBWRADDRU14.BRAM_CASCINBOT_ADDRBWRADDRU14 origin:060-bram-cascades !26_270 26_269 26_271
BRAM_R.BRAM_ADDRBWRADDRU14.BRAM_CASCINTOP_ADDRBWRADDRU14 origin:060-bram-cascades !26_269 26_270 26_271
BRAM_R.BRAM_ADDRBWRADDRU14.BRAM_R_IMUX_ADDRBWRADDRU14 origin:060-bram-cascades !26_269 !26_270 !26_271
BRAM_R.CASCOUT_ARD_ACTIVE origin:060-bram-cascades 26_170
BRAM_R.CASCOUT_BWR_ACTIVE origin:060-bram-cascades 26_172
BRAM_R.EN_SYN origin:028-fifo-config 27_171
BRAM_R.FIRST_WORD_FALL_THROUGH origin:028-fifo-config 27_170
BRAM_R.ZALMOST_EMPTY_OFFSET[0] origin:028-fifo-config 27_288
BRAM_R.ZALMOST_EMPTY_OFFSET[1] origin:028-fifo-config 27_291
BRAM_R.ZALMOST_EMPTY_OFFSET[2] origin:028-fifo-config 27_292
BRAM_R.ZALMOST_EMPTY_OFFSET[3] origin:028-fifo-config 27_293
BRAM_R.ZALMOST_EMPTY_OFFSET[4] origin:028-fifo-config 27_296
BRAM_R.ZALMOST_EMPTY_OFFSET[5] origin:028-fifo-config 27_299
BRAM_R.ZALMOST_EMPTY_OFFSET[6] origin:028-fifo-config 27_300
BRAM_R.ZALMOST_EMPTY_OFFSET[7] origin:028-fifo-config 27_301
BRAM_R.ZALMOST_EMPTY_OFFSET[8] origin:028-fifo-config 27_304
BRAM_R.ZALMOST_EMPTY_OFFSET[9] origin:028-fifo-config 27_307
BRAM_R.ZALMOST_EMPTY_OFFSET[10] origin:028-fifo-config 27_308
BRAM_R.ZALMOST_EMPTY_OFFSET[11] origin:028-fifo-config 27_309
BRAM_R.ZALMOST_EMPTY_OFFSET[12] origin:028-fifo-config 27_312
BRAM_R.ZALMOST_FULL_OFFSET[0] origin:028-fifo-config 27_32
BRAM_R.ZALMOST_FULL_OFFSET[1] origin:028-fifo-config 27_29
BRAM_R.ZALMOST_FULL_OFFSET[2] origin:028-fifo-config 27_28
BRAM_R.ZALMOST_FULL_OFFSET[3] origin:028-fifo-config 27_27
BRAM_R.ZALMOST_FULL_OFFSET[4] origin:028-fifo-config 27_24
BRAM_R.ZALMOST_FULL_OFFSET[5] origin:028-fifo-config 27_21
BRAM_R.ZALMOST_FULL_OFFSET[6] origin:028-fifo-config 27_20
BRAM_R.ZALMOST_FULL_OFFSET[7] origin:028-fifo-config 27_19
BRAM_R.ZALMOST_FULL_OFFSET[8] origin:028-fifo-config 27_16
BRAM_R.ZALMOST_FULL_OFFSET[9] origin:028-fifo-config 27_13
BRAM_R.ZALMOST_FULL_OFFSET[10] origin:028-fifo-config 27_12
BRAM_R.ZALMOST_FULL_OFFSET[11] origin:028-fifo-config 27_11
BRAM_R.ZALMOST_FULL_OFFSET[12] origin:028-fifo-config 27_08
BRAM_R.RAMB18_Y0.DOA_REG origin:025-bram-config 27_69
BRAM_R.RAMB18_Y0.DOB_REG origin:025-bram-config 27_72
BRAM_R.RAMB18_Y0.FIFO_MODE origin:029-bram-fifo-config 27_150
@ -189,15 +215,15 @@ BRAM_R.RAMB18_Y0.IN_USE origin:029-bram-fifo-config 27_100 27_99
BRAM_R.RAMB18_Y0.RDADDR_COLLISION_HWCONFIG_DELAYED_WRITE origin:025-bram-config !27_96
BRAM_R.RAMB18_Y0.RDADDR_COLLISION_HWCONFIG_PERFORMANCE origin:025-bram-config 27_96
BRAM_R.RAMB18_Y0.READ_WIDTH_A_1 origin:025-bram-config !27_35 !27_36 !27_37
BRAM_R.RAMB18_Y0.READ_WIDTH_A_18 origin:025-bram-config !27_35 !27_36 27_37
BRAM_R.RAMB18_Y0.READ_WIDTH_A_2 origin:025-bram-config !27_36 !27_37 27_35
BRAM_R.RAMB18_Y0.READ_WIDTH_A_4 origin:025-bram-config !27_35 !27_37 27_36
BRAM_R.RAMB18_Y0.READ_WIDTH_A_9 origin:025-bram-config !27_37 27_35 27_36
BRAM_R.RAMB18_Y0.READ_WIDTH_A_18 origin:025-bram-config !27_35 !27_36 27_37
BRAM_R.RAMB18_Y0.READ_WIDTH_B_1 origin:025-bram-config !27_43 !27_44 !27_45
BRAM_R.RAMB18_Y0.READ_WIDTH_B_18 origin:025-bram-config !27_43 !27_44 27_45
BRAM_R.RAMB18_Y0.READ_WIDTH_B_2 origin:025-bram-config !27_44 !27_45 27_43
BRAM_R.RAMB18_Y0.READ_WIDTH_B_4 origin:025-bram-config !27_43 !27_45 27_44
BRAM_R.RAMB18_Y0.READ_WIDTH_B_9 origin:025-bram-config !27_45 27_43 27_44
BRAM_R.RAMB18_Y0.READ_WIDTH_B_18 origin:025-bram-config !27_43 !27_44 27_45
BRAM_R.RAMB18_Y0.RSTREG_PRIORITY_A_REGCE origin:025-bram-config 27_124
BRAM_R.RAMB18_Y0.RSTREG_PRIORITY_A_RSTREG origin:025-bram-config !27_124
BRAM_R.RAMB18_Y0.RSTREG_PRIORITY_B_REGCE origin:025-bram-config 27_125
@ -209,24 +235,16 @@ BRAM_R.RAMB18_Y0.WRITE_MODE_A_READ_FIRST origin:025-bram-config 27_56
BRAM_R.RAMB18_Y0.WRITE_MODE_B_NO_CHANGE origin:025-bram-config 27_68
BRAM_R.RAMB18_Y0.WRITE_MODE_B_READ_FIRST origin:025-bram-config 27_67
BRAM_R.RAMB18_Y0.WRITE_WIDTH_A_1 origin:025-bram-config !27_51 !27_52 !27_53
BRAM_R.RAMB18_Y0.WRITE_WIDTH_A_18 origin:025-bram-config !27_51 !27_52 27_53
BRAM_R.RAMB18_Y0.WRITE_WIDTH_A_2 origin:025-bram-config !27_52 !27_53 27_51
BRAM_R.RAMB18_Y0.WRITE_WIDTH_A_4 origin:025-bram-config !27_51 !27_53 27_52
BRAM_R.RAMB18_Y0.WRITE_WIDTH_A_9 origin:025-bram-config !27_53 27_51 27_52
BRAM_R.RAMB18_Y0.WRITE_WIDTH_A_18 origin:025-bram-config !27_51 !27_52 27_53
BRAM_R.RAMB18_Y0.WRITE_WIDTH_B_1 origin:025-bram-config !27_59 !27_60 !27_61
BRAM_R.RAMB18_Y0.WRITE_WIDTH_B_18 origin:025-bram-config !27_59 !27_60 27_61
BRAM_R.RAMB18_Y0.WRITE_WIDTH_B_2 origin:025-bram-config !27_60 !27_61 27_59
BRAM_R.RAMB18_Y0.WRITE_WIDTH_B_4 origin:025-bram-config !27_59 !27_61 27_60
BRAM_R.RAMB18_Y0.WRITE_WIDTH_B_9 origin:025-bram-config !27_61 27_59 27_60
BRAM_R.RAMB18_Y0.WRITE_WIDTH_B_18 origin:025-bram-config !27_59 !27_60 27_61
BRAM_R.RAMB18_Y0.ZINIT_A[0] origin:025-bram-config 27_73
BRAM_R.RAMB18_Y0.ZINIT_A[10] origin:025-bram-config 27_129
BRAM_R.RAMB18_Y0.ZINIT_A[11] origin:025-bram-config 27_113
BRAM_R.RAMB18_Y0.ZINIT_A[12] origin:025-bram-config 27_97
BRAM_R.RAMB18_Y0.ZINIT_A[13] origin:025-bram-config 27_81
BRAM_R.RAMB18_Y0.ZINIT_A[14] origin:025-bram-config 27_49
BRAM_R.RAMB18_Y0.ZINIT_A[15] origin:025-bram-config 27_33
BRAM_R.RAMB18_Y0.ZINIT_A[16] origin:025-bram-config 27_17
BRAM_R.RAMB18_Y0.ZINIT_A[17] origin:025-bram-config 27_01
BRAM_R.RAMB18_Y0.ZINIT_A[1] origin:025-bram-config 27_65
BRAM_R.RAMB18_Y0.ZINIT_A[2] origin:025-bram-config 27_137
BRAM_R.RAMB18_Y0.ZINIT_A[3] origin:025-bram-config 27_121
@ -236,15 +254,15 @@ BRAM_R.RAMB18_Y0.ZINIT_A[6] origin:025-bram-config 27_57
BRAM_R.RAMB18_Y0.ZINIT_A[7] origin:025-bram-config 27_41
BRAM_R.RAMB18_Y0.ZINIT_A[8] origin:025-bram-config 27_25
BRAM_R.RAMB18_Y0.ZINIT_A[9] origin:025-bram-config 27_09
BRAM_R.RAMB18_Y0.ZINIT_A[10] origin:025-bram-config 27_129
BRAM_R.RAMB18_Y0.ZINIT_A[11] origin:025-bram-config 27_113
BRAM_R.RAMB18_Y0.ZINIT_A[12] origin:025-bram-config 27_97
BRAM_R.RAMB18_Y0.ZINIT_A[13] origin:025-bram-config 27_81
BRAM_R.RAMB18_Y0.ZINIT_A[14] origin:025-bram-config 27_49
BRAM_R.RAMB18_Y0.ZINIT_A[15] origin:025-bram-config 27_33
BRAM_R.RAMB18_Y0.ZINIT_A[16] origin:025-bram-config 27_17
BRAM_R.RAMB18_Y0.ZINIT_A[17] origin:025-bram-config 27_01
BRAM_R.RAMB18_Y0.ZINIT_B[0] origin:025-bram-config 27_79
BRAM_R.RAMB18_Y0.ZINIT_B[10] origin:025-bram-config 27_135
BRAM_R.RAMB18_Y0.ZINIT_B[11] origin:025-bram-config 27_119
BRAM_R.RAMB18_Y0.ZINIT_B[12] origin:025-bram-config 27_103
BRAM_R.RAMB18_Y0.ZINIT_B[13] origin:025-bram-config 27_87
BRAM_R.RAMB18_Y0.ZINIT_B[14] origin:025-bram-config 27_55
BRAM_R.RAMB18_Y0.ZINIT_B[15] origin:025-bram-config 27_39
BRAM_R.RAMB18_Y0.ZINIT_B[16] origin:025-bram-config 27_23
BRAM_R.RAMB18_Y0.ZINIT_B[17] origin:025-bram-config 27_07
BRAM_R.RAMB18_Y0.ZINIT_B[1] origin:025-bram-config 27_71
BRAM_R.RAMB18_Y0.ZINIT_B[2] origin:025-bram-config 27_143
BRAM_R.RAMB18_Y0.ZINIT_B[3] origin:025-bram-config 27_127
@ -254,6 +272,14 @@ BRAM_R.RAMB18_Y0.ZINIT_B[6] origin:025-bram-config 27_63
BRAM_R.RAMB18_Y0.ZINIT_B[7] origin:025-bram-config 27_47
BRAM_R.RAMB18_Y0.ZINIT_B[8] origin:025-bram-config 27_31
BRAM_R.RAMB18_Y0.ZINIT_B[9] origin:025-bram-config 27_15
BRAM_R.RAMB18_Y0.ZINIT_B[10] origin:025-bram-config 27_135
BRAM_R.RAMB18_Y0.ZINIT_B[11] origin:025-bram-config 27_119
BRAM_R.RAMB18_Y0.ZINIT_B[12] origin:025-bram-config 27_103
BRAM_R.RAMB18_Y0.ZINIT_B[13] origin:025-bram-config 27_87
BRAM_R.RAMB18_Y0.ZINIT_B[14] origin:025-bram-config 27_55
BRAM_R.RAMB18_Y0.ZINIT_B[15] origin:025-bram-config 27_39
BRAM_R.RAMB18_Y0.ZINIT_B[16] origin:025-bram-config 27_23
BRAM_R.RAMB18_Y0.ZINIT_B[17] origin:025-bram-config 27_07
BRAM_R.RAMB18_Y0.ZINV_CLKARDCLK origin:025-bram-config 27_107
BRAM_R.RAMB18_Y0.ZINV_CLKBWRCLK origin:025-bram-config 27_109
BRAM_R.RAMB18_Y0.ZINV_ENARDEN origin:025-bram-config 27_112
@ -265,14 +291,6 @@ BRAM_R.RAMB18_Y0.ZINV_RSTRAMB origin:025-bram-config 27_117
BRAM_R.RAMB18_Y0.ZINV_RSTREGARSTREG origin:025-bram-config 27_120
BRAM_R.RAMB18_Y0.ZINV_RSTREGB origin:025-bram-config 27_123
BRAM_R.RAMB18_Y0.ZSRVAL_A[0] origin:025-bram-config 27_74
BRAM_R.RAMB18_Y0.ZSRVAL_A[10] origin:025-bram-config 27_130
BRAM_R.RAMB18_Y0.ZSRVAL_A[11] origin:025-bram-config 27_114
BRAM_R.RAMB18_Y0.ZSRVAL_A[12] origin:025-bram-config 27_98
BRAM_R.RAMB18_Y0.ZSRVAL_A[13] origin:025-bram-config 27_82
BRAM_R.RAMB18_Y0.ZSRVAL_A[14] origin:025-bram-config 27_50
BRAM_R.RAMB18_Y0.ZSRVAL_A[15] origin:025-bram-config 27_34
BRAM_R.RAMB18_Y0.ZSRVAL_A[16] origin:025-bram-config 27_18
BRAM_R.RAMB18_Y0.ZSRVAL_A[17] origin:025-bram-config 27_02
BRAM_R.RAMB18_Y0.ZSRVAL_A[1] origin:025-bram-config 27_66
BRAM_R.RAMB18_Y0.ZSRVAL_A[2] origin:025-bram-config 27_138
BRAM_R.RAMB18_Y0.ZSRVAL_A[3] origin:025-bram-config 27_122
@ -282,15 +300,15 @@ BRAM_R.RAMB18_Y0.ZSRVAL_A[6] origin:025-bram-config 27_58
BRAM_R.RAMB18_Y0.ZSRVAL_A[7] origin:025-bram-config 27_42
BRAM_R.RAMB18_Y0.ZSRVAL_A[8] origin:025-bram-config 27_26
BRAM_R.RAMB18_Y0.ZSRVAL_A[9] origin:025-bram-config 27_10
BRAM_R.RAMB18_Y0.ZSRVAL_A[10] origin:025-bram-config 27_130
BRAM_R.RAMB18_Y0.ZSRVAL_A[11] origin:025-bram-config 27_114
BRAM_R.RAMB18_Y0.ZSRVAL_A[12] origin:025-bram-config 27_98
BRAM_R.RAMB18_Y0.ZSRVAL_A[13] origin:025-bram-config 27_82
BRAM_R.RAMB18_Y0.ZSRVAL_A[14] origin:025-bram-config 27_50
BRAM_R.RAMB18_Y0.ZSRVAL_A[15] origin:025-bram-config 27_34
BRAM_R.RAMB18_Y0.ZSRVAL_A[16] origin:025-bram-config 27_18
BRAM_R.RAMB18_Y0.ZSRVAL_A[17] origin:025-bram-config 27_02
BRAM_R.RAMB18_Y0.ZSRVAL_B[0] origin:025-bram-config 27_78
BRAM_R.RAMB18_Y0.ZSRVAL_B[10] origin:025-bram-config 27_134
BRAM_R.RAMB18_Y0.ZSRVAL_B[11] origin:025-bram-config 27_118
BRAM_R.RAMB18_Y0.ZSRVAL_B[12] origin:025-bram-config 27_102
BRAM_R.RAMB18_Y0.ZSRVAL_B[13] origin:025-bram-config 27_86
BRAM_R.RAMB18_Y0.ZSRVAL_B[14] origin:025-bram-config 27_54
BRAM_R.RAMB18_Y0.ZSRVAL_B[15] origin:025-bram-config 27_38
BRAM_R.RAMB18_Y0.ZSRVAL_B[16] origin:025-bram-config 27_22
BRAM_R.RAMB18_Y0.ZSRVAL_B[17] origin:025-bram-config 27_06
BRAM_R.RAMB18_Y0.ZSRVAL_B[1] origin:025-bram-config 27_70
BRAM_R.RAMB18_Y0.ZSRVAL_B[2] origin:025-bram-config 27_142
BRAM_R.RAMB18_Y0.ZSRVAL_B[3] origin:025-bram-config 27_126
@ -300,6 +318,14 @@ BRAM_R.RAMB18_Y0.ZSRVAL_B[6] origin:025-bram-config 27_62
BRAM_R.RAMB18_Y0.ZSRVAL_B[7] origin:025-bram-config 27_46
BRAM_R.RAMB18_Y0.ZSRVAL_B[8] origin:025-bram-config 27_30
BRAM_R.RAMB18_Y0.ZSRVAL_B[9] origin:025-bram-config 27_14
BRAM_R.RAMB18_Y0.ZSRVAL_B[10] origin:025-bram-config 27_134
BRAM_R.RAMB18_Y0.ZSRVAL_B[11] origin:025-bram-config 27_118
BRAM_R.RAMB18_Y0.ZSRVAL_B[12] origin:025-bram-config 27_102
BRAM_R.RAMB18_Y0.ZSRVAL_B[13] origin:025-bram-config 27_86
BRAM_R.RAMB18_Y0.ZSRVAL_B[14] origin:025-bram-config 27_54
BRAM_R.RAMB18_Y0.ZSRVAL_B[15] origin:025-bram-config 27_38
BRAM_R.RAMB18_Y0.ZSRVAL_B[16] origin:025-bram-config 27_22
BRAM_R.RAMB18_Y0.ZSRVAL_B[17] origin:025-bram-config 27_06
BRAM_R.RAMB18_Y1.DOA_REG origin:025-bram-config 27_251
BRAM_R.RAMB18_Y1.DOB_REG origin:025-bram-config 27_248
BRAM_R.RAMB18_Y1.FIFO_MODE origin:029-bram-fifo-config 27_169
@ -307,15 +333,15 @@ BRAM_R.RAMB18_Y1.IN_USE origin:029-bram-fifo-config 27_220 27_221
BRAM_R.RAMB18_Y1.RDADDR_COLLISION_HWCONFIG_DELAYED_WRITE origin:025-bram-config !27_224
BRAM_R.RAMB18_Y1.RDADDR_COLLISION_HWCONFIG_PERFORMANCE origin:025-bram-config 27_224
BRAM_R.RAMB18_Y1.READ_WIDTH_A_1 origin:025-bram-config !27_283 !27_284 !27_285
BRAM_R.RAMB18_Y1.READ_WIDTH_A_18 origin:025-bram-config !27_284 !27_285 27_283
BRAM_R.RAMB18_Y1.READ_WIDTH_A_2 origin:025-bram-config !27_283 !27_284 27_285
BRAM_R.RAMB18_Y1.READ_WIDTH_A_4 origin:025-bram-config !27_283 !27_285 27_284
BRAM_R.RAMB18_Y1.READ_WIDTH_A_9 origin:025-bram-config !27_283 27_284 27_285
BRAM_R.RAMB18_Y1.READ_WIDTH_A_18 origin:025-bram-config !27_284 !27_285 27_283
BRAM_R.RAMB18_Y1.READ_WIDTH_B_1 origin:025-bram-config !27_275 !27_276 !27_277
BRAM_R.RAMB18_Y1.READ_WIDTH_B_18 origin:025-bram-config !27_276 !27_277 27_275
BRAM_R.RAMB18_Y1.READ_WIDTH_B_2 origin:025-bram-config !27_275 !27_276 27_277
BRAM_R.RAMB18_Y1.READ_WIDTH_B_4 origin:025-bram-config !27_275 !27_277 27_276
BRAM_R.RAMB18_Y1.READ_WIDTH_B_9 origin:025-bram-config !27_275 27_276 27_277
BRAM_R.RAMB18_Y1.READ_WIDTH_B_18 origin:025-bram-config !27_276 !27_277 27_275
BRAM_R.RAMB18_Y1.RSTREG_PRIORITY_A_REGCE origin:025-bram-config 27_196
BRAM_R.RAMB18_Y1.RSTREG_PRIORITY_A_RSTREG origin:025-bram-config !27_196
BRAM_R.RAMB18_Y1.RSTREG_PRIORITY_B_REGCE origin:025-bram-config 27_195
@ -327,24 +353,16 @@ BRAM_R.RAMB18_Y1.WRITE_MODE_A_READ_FIRST origin:025-bram-config 27_264
BRAM_R.RAMB18_Y1.WRITE_MODE_B_NO_CHANGE origin:025-bram-config 27_252
BRAM_R.RAMB18_Y1.WRITE_MODE_B_READ_FIRST origin:025-bram-config 27_253
BRAM_R.RAMB18_Y1.WRITE_WIDTH_A_1 origin:025-bram-config !27_267 !27_268 !27_269
BRAM_R.RAMB18_Y1.WRITE_WIDTH_A_18 origin:025-bram-config !27_268 !27_269 27_267
BRAM_R.RAMB18_Y1.WRITE_WIDTH_A_2 origin:025-bram-config !27_267 !27_268 27_269
BRAM_R.RAMB18_Y1.WRITE_WIDTH_A_4 origin:025-bram-config !27_267 !27_269 27_268
BRAM_R.RAMB18_Y1.WRITE_WIDTH_A_9 origin:025-bram-config !27_267 27_268 27_269
BRAM_R.RAMB18_Y1.WRITE_WIDTH_A_18 origin:025-bram-config !27_268 !27_269 27_267
BRAM_R.RAMB18_Y1.WRITE_WIDTH_B_1 origin:025-bram-config !27_259 !27_260 !27_261
BRAM_R.RAMB18_Y1.WRITE_WIDTH_B_18 origin:025-bram-config !27_260 !27_261 27_259
BRAM_R.RAMB18_Y1.WRITE_WIDTH_B_2 origin:025-bram-config !27_259 !27_260 27_261
BRAM_R.RAMB18_Y1.WRITE_WIDTH_B_4 origin:025-bram-config !27_259 !27_261 27_260
BRAM_R.RAMB18_Y1.WRITE_WIDTH_B_9 origin:025-bram-config !27_259 27_260 27_261
BRAM_R.RAMB18_Y1.WRITE_WIDTH_B_18 origin:025-bram-config !27_260 !27_261 27_259
BRAM_R.RAMB18_Y1.ZINIT_A[0] origin:025-bram-config 27_249
BRAM_R.RAMB18_Y1.ZINIT_A[10] origin:025-bram-config 27_305
BRAM_R.RAMB18_Y1.ZINIT_A[11] origin:025-bram-config 27_289
BRAM_R.RAMB18_Y1.ZINIT_A[12] origin:025-bram-config 27_273
BRAM_R.RAMB18_Y1.ZINIT_A[13] origin:025-bram-config 27_257
BRAM_R.RAMB18_Y1.ZINIT_A[14] origin:025-bram-config 27_225
BRAM_R.RAMB18_Y1.ZINIT_A[15] origin:025-bram-config 27_209
BRAM_R.RAMB18_Y1.ZINIT_A[16] origin:025-bram-config 27_193
BRAM_R.RAMB18_Y1.ZINIT_A[17] origin:025-bram-config 27_177
BRAM_R.RAMB18_Y1.ZINIT_A[1] origin:025-bram-config 27_241
BRAM_R.RAMB18_Y1.ZINIT_A[2] origin:025-bram-config 27_313
BRAM_R.RAMB18_Y1.ZINIT_A[3] origin:025-bram-config 27_297
@ -354,15 +372,15 @@ BRAM_R.RAMB18_Y1.ZINIT_A[6] origin:025-bram-config 27_233
BRAM_R.RAMB18_Y1.ZINIT_A[7] origin:025-bram-config 27_217
BRAM_R.RAMB18_Y1.ZINIT_A[8] origin:025-bram-config 27_201
BRAM_R.RAMB18_Y1.ZINIT_A[9] origin:025-bram-config 27_185
BRAM_R.RAMB18_Y1.ZINIT_A[10] origin:025-bram-config 27_305
BRAM_R.RAMB18_Y1.ZINIT_A[11] origin:025-bram-config 27_289
BRAM_R.RAMB18_Y1.ZINIT_A[12] origin:025-bram-config 27_273
BRAM_R.RAMB18_Y1.ZINIT_A[13] origin:025-bram-config 27_257
BRAM_R.RAMB18_Y1.ZINIT_A[14] origin:025-bram-config 27_225
BRAM_R.RAMB18_Y1.ZINIT_A[15] origin:025-bram-config 27_209
BRAM_R.RAMB18_Y1.ZINIT_A[16] origin:025-bram-config 27_193
BRAM_R.RAMB18_Y1.ZINIT_A[17] origin:025-bram-config 27_177
BRAM_R.RAMB18_Y1.ZINIT_B[0] origin:025-bram-config 27_255
BRAM_R.RAMB18_Y1.ZINIT_B[10] origin:025-bram-config 27_311
BRAM_R.RAMB18_Y1.ZINIT_B[11] origin:025-bram-config 27_295
BRAM_R.RAMB18_Y1.ZINIT_B[12] origin:025-bram-config 27_279
BRAM_R.RAMB18_Y1.ZINIT_B[13] origin:025-bram-config 27_263
BRAM_R.RAMB18_Y1.ZINIT_B[14] origin:025-bram-config 27_231
BRAM_R.RAMB18_Y1.ZINIT_B[15] origin:025-bram-config 27_215
BRAM_R.RAMB18_Y1.ZINIT_B[16] origin:025-bram-config 27_199
BRAM_R.RAMB18_Y1.ZINIT_B[17] origin:025-bram-config 27_183
BRAM_R.RAMB18_Y1.ZINIT_B[1] origin:025-bram-config 27_247
BRAM_R.RAMB18_Y1.ZINIT_B[2] origin:025-bram-config 27_319
BRAM_R.RAMB18_Y1.ZINIT_B[3] origin:025-bram-config 27_303
@ -372,6 +390,14 @@ BRAM_R.RAMB18_Y1.ZINIT_B[6] origin:025-bram-config 27_239
BRAM_R.RAMB18_Y1.ZINIT_B[7] origin:025-bram-config 27_223
BRAM_R.RAMB18_Y1.ZINIT_B[8] origin:025-bram-config 27_207
BRAM_R.RAMB18_Y1.ZINIT_B[9] origin:025-bram-config 27_191
BRAM_R.RAMB18_Y1.ZINIT_B[10] origin:025-bram-config 27_311
BRAM_R.RAMB18_Y1.ZINIT_B[11] origin:025-bram-config 27_295
BRAM_R.RAMB18_Y1.ZINIT_B[12] origin:025-bram-config 27_279
BRAM_R.RAMB18_Y1.ZINIT_B[13] origin:025-bram-config 27_263
BRAM_R.RAMB18_Y1.ZINIT_B[14] origin:025-bram-config 27_231
BRAM_R.RAMB18_Y1.ZINIT_B[15] origin:025-bram-config 27_215
BRAM_R.RAMB18_Y1.ZINIT_B[16] origin:025-bram-config 27_199
BRAM_R.RAMB18_Y1.ZINIT_B[17] origin:025-bram-config 27_183
BRAM_R.RAMB18_Y1.ZINV_CLKARDCLK origin:025-bram-config 27_213
BRAM_R.RAMB18_Y1.ZINV_CLKBWRCLK origin:025-bram-config 27_211
BRAM_R.RAMB18_Y1.ZINV_ENARDEN origin:025-bram-config 27_208
@ -383,14 +409,6 @@ BRAM_R.RAMB18_Y1.ZINV_RSTRAMB origin:025-bram-config 27_203
BRAM_R.RAMB18_Y1.ZINV_RSTREGARSTREG origin:025-bram-config 27_200
BRAM_R.RAMB18_Y1.ZINV_RSTREGB origin:025-bram-config 27_197
BRAM_R.RAMB18_Y1.ZSRVAL_A[0] origin:025-bram-config 27_250
BRAM_R.RAMB18_Y1.ZSRVAL_A[10] origin:025-bram-config 27_306
BRAM_R.RAMB18_Y1.ZSRVAL_A[11] origin:025-bram-config 27_290
BRAM_R.RAMB18_Y1.ZSRVAL_A[12] origin:025-bram-config 27_274
BRAM_R.RAMB18_Y1.ZSRVAL_A[13] origin:025-bram-config 27_258
BRAM_R.RAMB18_Y1.ZSRVAL_A[14] origin:025-bram-config 27_226
BRAM_R.RAMB18_Y1.ZSRVAL_A[15] origin:025-bram-config 27_210
BRAM_R.RAMB18_Y1.ZSRVAL_A[16] origin:025-bram-config 27_194
BRAM_R.RAMB18_Y1.ZSRVAL_A[17] origin:025-bram-config 27_178
BRAM_R.RAMB18_Y1.ZSRVAL_A[1] origin:025-bram-config 27_242
BRAM_R.RAMB18_Y1.ZSRVAL_A[2] origin:025-bram-config 27_314
BRAM_R.RAMB18_Y1.ZSRVAL_A[3] origin:025-bram-config 27_298
@ -400,15 +418,15 @@ BRAM_R.RAMB18_Y1.ZSRVAL_A[6] origin:025-bram-config 27_234
BRAM_R.RAMB18_Y1.ZSRVAL_A[7] origin:025-bram-config 27_218
BRAM_R.RAMB18_Y1.ZSRVAL_A[8] origin:025-bram-config 27_202
BRAM_R.RAMB18_Y1.ZSRVAL_A[9] origin:025-bram-config 27_186
BRAM_R.RAMB18_Y1.ZSRVAL_A[10] origin:025-bram-config 27_306
BRAM_R.RAMB18_Y1.ZSRVAL_A[11] origin:025-bram-config 27_290
BRAM_R.RAMB18_Y1.ZSRVAL_A[12] origin:025-bram-config 27_274
BRAM_R.RAMB18_Y1.ZSRVAL_A[13] origin:025-bram-config 27_258
BRAM_R.RAMB18_Y1.ZSRVAL_A[14] origin:025-bram-config 27_226
BRAM_R.RAMB18_Y1.ZSRVAL_A[15] origin:025-bram-config 27_210
BRAM_R.RAMB18_Y1.ZSRVAL_A[16] origin:025-bram-config 27_194
BRAM_R.RAMB18_Y1.ZSRVAL_A[17] origin:025-bram-config 27_178
BRAM_R.RAMB18_Y1.ZSRVAL_B[0] origin:025-bram-config 27_254
BRAM_R.RAMB18_Y1.ZSRVAL_B[10] origin:025-bram-config 27_310
BRAM_R.RAMB18_Y1.ZSRVAL_B[11] origin:025-bram-config 27_294
BRAM_R.RAMB18_Y1.ZSRVAL_B[12] origin:025-bram-config 27_278
BRAM_R.RAMB18_Y1.ZSRVAL_B[13] origin:025-bram-config 27_262
BRAM_R.RAMB18_Y1.ZSRVAL_B[14] origin:025-bram-config 27_230
BRAM_R.RAMB18_Y1.ZSRVAL_B[15] origin:025-bram-config 27_214
BRAM_R.RAMB18_Y1.ZSRVAL_B[16] origin:025-bram-config 27_198
BRAM_R.RAMB18_Y1.ZSRVAL_B[17] origin:025-bram-config 27_182
BRAM_R.RAMB18_Y1.ZSRVAL_B[1] origin:025-bram-config 27_246
BRAM_R.RAMB18_Y1.ZSRVAL_B[2] origin:025-bram-config 27_318
BRAM_R.RAMB18_Y1.ZSRVAL_B[3] origin:025-bram-config 27_302
@ -418,35 +436,17 @@ BRAM_R.RAMB18_Y1.ZSRVAL_B[6] origin:025-bram-config 27_238
BRAM_R.RAMB18_Y1.ZSRVAL_B[7] origin:025-bram-config 27_222
BRAM_R.RAMB18_Y1.ZSRVAL_B[8] origin:025-bram-config 27_206
BRAM_R.RAMB18_Y1.ZSRVAL_B[9] origin:025-bram-config 27_190
BRAM_R.RAMB18_Y1.ZSRVAL_B[10] origin:025-bram-config 27_310
BRAM_R.RAMB18_Y1.ZSRVAL_B[11] origin:025-bram-config 27_294
BRAM_R.RAMB18_Y1.ZSRVAL_B[12] origin:025-bram-config 27_278
BRAM_R.RAMB18_Y1.ZSRVAL_B[13] origin:025-bram-config 27_262
BRAM_R.RAMB18_Y1.ZSRVAL_B[14] origin:025-bram-config 27_230
BRAM_R.RAMB18_Y1.ZSRVAL_B[15] origin:025-bram-config 27_214
BRAM_R.RAMB18_Y1.ZSRVAL_B[16] origin:025-bram-config 27_198
BRAM_R.RAMB18_Y1.ZSRVAL_B[17] origin:025-bram-config 27_182
BRAM_R.RAMB36.EN_ECC_READ origin:027-bram36-config 27_175
BRAM_R.RAMB36.EN_ECC_WRITE origin:027-bram36-config 27_162
BRAM_R.RAMB36.RAM_EXTENSION_A_LOWER origin:027-bram36-config 27_188
BRAM_R.RAMB36.RAM_EXTENSION_A_NONE_OR_UPPER origin:027-bram36-config !27_188
BRAM_R.RAMB36.RAM_EXTENSION_B_LOWER origin:027-bram36-config 27_187
BRAM_R.RAMB36.RAM_EXTENSION_B_NONE_OR_UPPER origin:027-bram36-config !27_187
BRAM_R.ZALMOST_EMPTY_OFFSET[0] origin:028-fifo-config 27_288
BRAM_R.ZALMOST_EMPTY_OFFSET[10] origin:028-fifo-config 27_308
BRAM_R.ZALMOST_EMPTY_OFFSET[11] origin:028-fifo-config 27_309
BRAM_R.ZALMOST_EMPTY_OFFSET[12] origin:028-fifo-config 27_312
BRAM_R.ZALMOST_EMPTY_OFFSET[1] origin:028-fifo-config 27_291
BRAM_R.ZALMOST_EMPTY_OFFSET[2] origin:028-fifo-config 27_292
BRAM_R.ZALMOST_EMPTY_OFFSET[3] origin:028-fifo-config 27_293
BRAM_R.ZALMOST_EMPTY_OFFSET[4] origin:028-fifo-config 27_296
BRAM_R.ZALMOST_EMPTY_OFFSET[5] origin:028-fifo-config 27_299
BRAM_R.ZALMOST_EMPTY_OFFSET[6] origin:028-fifo-config 27_300
BRAM_R.ZALMOST_EMPTY_OFFSET[7] origin:028-fifo-config 27_301
BRAM_R.ZALMOST_EMPTY_OFFSET[8] origin:028-fifo-config 27_304
BRAM_R.ZALMOST_EMPTY_OFFSET[9] origin:028-fifo-config 27_307
BRAM_R.ZALMOST_FULL_OFFSET[0] origin:028-fifo-config 27_32
BRAM_R.ZALMOST_FULL_OFFSET[10] origin:028-fifo-config 27_12
BRAM_R.ZALMOST_FULL_OFFSET[11] origin:028-fifo-config 27_11
BRAM_R.ZALMOST_FULL_OFFSET[12] origin:028-fifo-config 27_08
BRAM_R.ZALMOST_FULL_OFFSET[1] origin:028-fifo-config 27_29
BRAM_R.ZALMOST_FULL_OFFSET[2] origin:028-fifo-config 27_28
BRAM_R.ZALMOST_FULL_OFFSET[3] origin:028-fifo-config 27_27
BRAM_R.ZALMOST_FULL_OFFSET[4] origin:028-fifo-config 27_24
BRAM_R.ZALMOST_FULL_OFFSET[5] origin:028-fifo-config 27_21
BRAM_R.ZALMOST_FULL_OFFSET[6] origin:028-fifo-config 27_20
BRAM_R.ZALMOST_FULL_OFFSET[7] origin:028-fifo-config 27_19
BRAM_R.ZALMOST_FULL_OFFSET[8] origin:028-fifo-config 27_16
BRAM_R.ZALMOST_FULL_OFFSET[9] origin:028-fifo-config 27_13

2
artix7/segbits_cfg_center_mid.origin_info.db
View File

@ -3,6 +3,6 @@ CFG_CENTER_MID.BSCAN.JTAG_CHAIN_2 origin:038-cfg 27_2162
CFG_CENTER_MID.BSCAN.JTAG_CHAIN_3 origin:038-cfg 26_2163
CFG_CENTER_MID.BSCAN.JTAG_CHAIN_4 origin:038-cfg 27_2163
CFG_CENTER_MID.DCIRESET.ENABLED origin:038-cfg 26_2165 26_2166 27_2164
CFG_CENTER_MID.ICAP.ICAP_WIDTH_X16 origin:038-cfg 26_2199 27_2200 27_2201
CFG_CENTER_MID.ICAP.ICAP_WIDTH_X8 origin:038-cfg 26_2203 26_2204 27_2202
CFG_CENTER_MID.ICAP.ICAP_WIDTH_X16 origin:038-cfg 26_2199 27_2200 27_2201
CFG_CENTER_MID.STARTUP.PROG_USR origin:038-cfg 26_2197 26_2198 27_2196

52
artix7/segbits_clbll_l.origin_info.db
View File

@ -6,10 +6,10 @@ CLBLL_L.SLICEL_X0.AFF.ZINI origin:011-clb-ffconfig 31_03
CLBLL_L.SLICEL_X0.AFF.ZRST origin:011-clb-ffconfig 30_12
CLBLL_L.SLICEL_X0.AFFMUX.AX origin:015-clb-nffmux !30_00 !30_02 !30_03 30_01
CLBLL_L.SLICEL_X0.AFFMUX.CY origin:015-clb-nffmux !30_01 !30_03 30_00 30_02
CLBLL_L.SLICEL_X0.AFFMUX.XOR origin:015-clb-nffmux !30_00 !30_01 !30_03 30_02
CLBLL_L.SLICEL_X0.AFFMUX.F7 origin:015-clb-nffmux !30_02 !30_03 30_00 30_01
CLBLL_L.SLICEL_X0.AFFMUX.O5 origin:015-clb-nffmux !30_01 !30_02 30_00 30_03
CLBLL_L.SLICEL_X0.AFFMUX.O6 origin:015-clb-nffmux !30_00 !30_01 !30_02 30_03
CLBLL_L.SLICEL_X0.AFFMUX.XOR origin:015-clb-nffmux !30_00 !30_01 !30_03 30_02
CLBLL_L.SLICEL_X0.ALUT.INIT[00] origin:010-clb-lutinit 32_15
CLBLL_L.SLICEL_X0.ALUT.INIT[01] origin:010-clb-lutinit 33_15
CLBLL_L.SLICEL_X0.ALUT.INIT[02] origin:010-clb-lutinit 32_14
@ -76,10 +76,10 @@ CLBLL_L.SLICEL_X0.ALUT.INIT[62] origin:010-clb-lutinit 35_00
CLBLL_L.SLICEL_X0.ALUT.INIT[63] origin:010-clb-lutinit 34_00
CLBLL_L.SLICEL_X0.AOUTMUX.A5Q origin:016-clb-noutmux !30_06 !30_08 !30_11 30_07
CLBLL_L.SLICEL_X0.AOUTMUX.CY origin:016-clb-noutmux !30_07 !30_11 30_06 30_08
CLBLL_L.SLICEL_X0.AOUTMUX.XOR origin:016-clb-noutmux !30_06 !30_07 !30_11 30_08
CLBLL_L.SLICEL_X0.AOUTMUX.F7 origin:016-clb-noutmux !30_08 !30_11 30_06 30_07
CLBLL_L.SLICEL_X0.AOUTMUX.O5 origin:016-clb-noutmux !30_07 !30_08 30_06 30_11
CLBLL_L.SLICEL_X0.AOUTMUX.O6 origin:016-clb-noutmux !30_06 !30_07 !30_08 30_11
CLBLL_L.SLICEL_X0.AOUTMUX.XOR origin:016-clb-noutmux !30_06 !30_07 !30_11 30_08
CLBLL_L.SLICEL_X0.B5FF.ZINI origin:011-clb-ffconfig 31_22
CLBLL_L.SLICEL_X0.B5FF.ZRST origin:011-clb-ffconfig 01_19
CLBLL_L.SLICEL_X0.B5FFMUX.IN_A origin:012-clb-n5ffmux 30_19
@ -88,10 +88,10 @@ CLBLL_L.SLICEL_X0.BFF.ZINI origin:011-clb-ffconfig 31_28
CLBLL_L.SLICEL_X0.BFF.ZRST origin:011-clb-ffconfig 30_30
CLBLL_L.SLICEL_X0.BFFMUX.BX origin:015-clb-nffmux !30_24 !30_25 !30_27 30_26
CLBLL_L.SLICEL_X0.BFFMUX.CY origin:015-clb-nffmux !30_24 !30_26 30_25 30_27
CLBLL_L.SLICEL_X0.BFFMUX.XOR origin:015-clb-nffmux !30_24 !30_26 !30_27 30_25
CLBLL_L.SLICEL_X0.BFFMUX.F8 origin:015-clb-nffmux !30_24 !30_25 30_26 30_27
CLBLL_L.SLICEL_X0.BFFMUX.O5 origin:015-clb-nffmux !30_25 !30_26 30_24 30_27
CLBLL_L.SLICEL_X0.BFFMUX.O6 origin:015-clb-nffmux !30_25 !30_26 !30_27 30_24
CLBLL_L.SLICEL_X0.BFFMUX.XOR origin:015-clb-nffmux !30_24 !30_26 !30_27 30_25
CLBLL_L.SLICEL_X0.BLUT.INIT[00] origin:010-clb-lutinit 32_31
CLBLL_L.SLICEL_X0.BLUT.INIT[01] origin:010-clb-lutinit 33_31
CLBLL_L.SLICEL_X0.BLUT.INIT[02] origin:010-clb-lutinit 32_30
@ -158,27 +158,23 @@ CLBLL_L.SLICEL_X0.BLUT.INIT[62] origin:010-clb-lutinit 35_16
CLBLL_L.SLICEL_X0.BLUT.INIT[63] origin:010-clb-lutinit 34_16
CLBLL_L.SLICEL_X0.BOUTMUX.B5Q origin:016-clb-noutmux !30_20 !30_21 !30_22 30_23
CLBLL_L.SLICEL_X0.BOUTMUX.CY origin:016-clb-noutmux !30_20 !30_23 30_21 30_22
CLBLL_L.SLICEL_X0.BOUTMUX.XOR origin:016-clb-noutmux !30_20 !30_22 !30_23 30_21
CLBLL_L.SLICEL_X0.BOUTMUX.F8 origin:016-clb-noutmux !30_20 !30_21 30_22 30_23
CLBLL_L.SLICEL_X0.BOUTMUX.O5 origin:016-clb-noutmux !30_21 !30_23 30_20 30_22
CLBLL_L.SLICEL_X0.BOUTMUX.O6 origin:016-clb-noutmux !30_21 !30_22 !30_23 30_20
CLBLL_L.SLICEL_X0.BOUTMUX.XOR origin:016-clb-noutmux !30_20 !30_22 !30_23 30_21
CLBLL_L.SLICEL_X0.C5FF.ZINI origin:011-clb-ffconfig 31_41
CLBLL_L.SLICEL_X0.C5FF.ZRST origin:011-clb-ffconfig 01_47
CLBLL_L.SLICEL_X0.C5FFMUX.IN_A origin:012-clb-n5ffmux 31_45
CLBLL_L.SLICEL_X0.C5FFMUX.IN_B origin:012-clb-n5ffmux 30_39
CLBLL_L.SLICEL_X0.CARRY4.ACY0 origin:013-clb-ncy0 30_15
CLBLL_L.SLICEL_X0.CARRY4.BCY0 origin:013-clb-ncy0 01_15
CLBLL_L.SLICEL_X0.CARRY4.CCY0 origin:013-clb-ncy0 30_48
CLBLL_L.SLICEL_X0.CARRY4.DCY0 origin:013-clb-ncy0 30_49
CLBLL_L.SLICEL_X0.CEUSEDMUX origin:014-clb-ffsrcemux 01_39
CLBLL_L.SLICEL_X0.CFF.ZINI origin:011-clb-ffconfig 31_33
CLBLL_L.SLICEL_X0.CFF.ZRST origin:011-clb-ffconfig 30_33
CLBLL_L.SLICEL_X0.CFFMUX.CX origin:015-clb-nffmux !30_35 !30_37 !30_38 30_36
CLBLL_L.SLICEL_X0.CFFMUX.CY origin:015-clb-nffmux !30_36 !30_38 30_35 30_37
CLBLL_L.SLICEL_X0.CFFMUX.XOR origin:015-clb-nffmux !30_35 !30_36 !30_38 30_37
CLBLL_L.SLICEL_X0.CFFMUX.F7 origin:015-clb-nffmux !30_37 !30_38 30_35 30_36
CLBLL_L.SLICEL_X0.CFFMUX.O5 origin:015-clb-nffmux !30_36 !30_37 30_35 30_38
CLBLL_L.SLICEL_X0.CFFMUX.O6 origin:015-clb-nffmux !30_35 !30_36 !30_37 30_38
CLBLL_L.SLICEL_X0.CFFMUX.XOR origin:015-clb-nffmux !30_35 !30_36 !30_38 30_37
CLBLL_L.SLICEL_X0.CLKINV origin:011-clb-ffconfig 01_51
CLBLL_L.SLICEL_X0.CLUT.INIT[00] origin:010-clb-lutinit 32_47
CLBLL_L.SLICEL_X0.CLUT.INIT[01] origin:010-clb-lutinit 33_47
@ -246,10 +242,10 @@ CLBLL_L.SLICEL_X0.CLUT.INIT[62] origin:010-clb-lutinit 35_32
CLBLL_L.SLICEL_X0.CLUT.INIT[63] origin:010-clb-lutinit 34_32
CLBLL_L.SLICEL_X0.COUTMUX.C5Q origin:016-clb-noutmux !30_40 !30_44 !30_45 30_43
CLBLL_L.SLICEL_X0.COUTMUX.CY origin:016-clb-noutmux !30_43 !30_45 30_40 30_44
CLBLL_L.SLICEL_X0.COUTMUX.XOR origin:016-clb-noutmux !30_40 !30_43 !30_45 30_44
CLBLL_L.SLICEL_X0.COUTMUX.F7 origin:016-clb-noutmux !30_44 !30_45 30_40 30_43
CLBLL_L.SLICEL_X0.COUTMUX.O5 origin:016-clb-noutmux !30_43 !30_44 30_40 30_45
CLBLL_L.SLICEL_X0.COUTMUX.O6 origin:016-clb-noutmux !30_40 !30_43 !30_44 30_45
CLBLL_L.SLICEL_X0.COUTMUX.XOR origin:016-clb-noutmux !30_40 !30_43 !30_45 30_44
CLBLL_L.SLICEL_X0.D5FF.ZINI origin:011-clb-ffconfig 31_51
CLBLL_L.SLICEL_X0.D5FF.ZRST origin:011-clb-ffconfig 01_55
CLBLL_L.SLICEL_X0.D5FFMUX.IN_A origin:012-clb-n5ffmux 30_55
@ -258,9 +254,9 @@ CLBLL_L.SLICEL_X0.DFF.ZINI origin:011-clb-ffconfig 31_58
CLBLL_L.SLICEL_X0.DFF.ZRST origin:011-clb-ffconfig 30_50
CLBLL_L.SLICEL_X0.DFFMUX.CY origin:015-clb-nffmux !30_59 !30_61 30_60 30_62
CLBLL_L.SLICEL_X0.DFFMUX.DX origin:015-clb-nffmux !30_59 !30_60 !30_62 30_61
CLBLL_L.SLICEL_X0.DFFMUX.XOR origin:015-clb-nffmux !30_59 !30_61 !30_62 30_60
CLBLL_L.SLICEL_X0.DFFMUX.O5 origin:015-clb-nffmux !30_60 !30_61 30_59 30_62
CLBLL_L.SLICEL_X0.DFFMUX.O6 origin:015-clb-nffmux !30_60 !30_61 !30_62 30_59
CLBLL_L.SLICEL_X0.DFFMUX.XOR origin:015-clb-nffmux !30_59 !30_61 !30_62 30_60
CLBLL_L.SLICEL_X0.DLUT.INIT[00] origin:010-clb-lutinit 32_63
CLBLL_L.SLICEL_X0.DLUT.INIT[01] origin:010-clb-lutinit 33_63
CLBLL_L.SLICEL_X0.DLUT.INIT[02] origin:010-clb-lutinit 32_62
@ -327,17 +323,21 @@ CLBLL_L.SLICEL_X0.DLUT.INIT[62] origin:010-clb-lutinit 35_48
CLBLL_L.SLICEL_X0.DLUT.INIT[63] origin:010-clb-lutinit 34_48
CLBLL_L.SLICEL_X0.DOUTMUX.CY origin:016-clb-noutmux !30_56 !30_57 30_51 30_52
CLBLL_L.SLICEL_X0.DOUTMUX.D5Q origin:016-clb-noutmux !30_51 !30_52 !30_56 30_57
CLBLL_L.SLICEL_X0.DOUTMUX.XOR origin:016-clb-noutmux !30_52 !30_56 !30_57 30_51
CLBLL_L.SLICEL_X0.DOUTMUX.O5 origin:016-clb-noutmux !30_51 !30_57 30_52 30_56
CLBLL_L.SLICEL_X0.DOUTMUX.O6 origin:016-clb-noutmux !30_51 !30_52 !30_57 30_56
CLBLL_L.SLICEL_X0.DOUTMUX.XOR origin:016-clb-noutmux !30_52 !30_56 !30_57 30_51
CLBLL_L.SLICEL_X0.FFSYNC origin:011-clb-ffconfig 00_48
CLBLL_L.SLICEL_X0.LATCH origin:011-clb-ffconfig 30_32
CLBLL_L.SLICEL_X0.NOCLKINV origin:011-clb-ffconfig !01_51
CLBLL_L.SLICEL_X0.PRECYINIT.AX origin:017-clb-precyinit !00_12 !30_13 30_14
CLBLL_L.SLICEL_X0.PRECYINIT.CIN origin:017-clb-precyinit !00_12 !30_14 30_13
CLBLL_L.SLICEL_X0.PRECYINIT.C0 origin:017-clb-precyinit !00_12 !30_13 !30_14
CLBLL_L.SLICEL_X0.PRECYINIT.C1 origin:017-clb-precyinit !30_13 !30_14 00_12
CLBLL_L.SLICEL_X0.PRECYINIT.CIN origin:017-clb-precyinit !00_12 !30_14 30_13
CLBLL_L.SLICEL_X0.SRUSEDMUX origin:014-clb-ffsrcemux 01_35
CLBLL_L.SLICEL_X0.CARRY4.ACY0 origin:013-clb-ncy0 30_15
CLBLL_L.SLICEL_X0.CARRY4.BCY0 origin:013-clb-ncy0 01_15
CLBLL_L.SLICEL_X0.CARRY4.CCY0 origin:013-clb-ncy0 30_48
CLBLL_L.SLICEL_X0.CARRY4.DCY0 origin:013-clb-ncy0 30_49
CLBLL_L.SLICEL_X1.A5FF.ZINI origin:011-clb-ffconfig 31_05
CLBLL_L.SLICEL_X1.A5FF.ZRST origin:011-clb-ffconfig 01_03
CLBLL_L.SLICEL_X1.A5FFMUX.IN_A origin:012-clb-n5ffmux 31_08
@ -346,10 +346,10 @@ CLBLL_L.SLICEL_X1.AFF.ZINI origin:011-clb-ffconfig 31_04
CLBLL_L.SLICEL_X1.AFF.ZRST origin:011-clb-ffconfig 31_15
CLBLL_L.SLICEL_X1.AFFMUX.AX origin:015-clb-nffmux !30_04 !31_00 !31_02 31_01
CLBLL_L.SLICEL_X1.AFFMUX.CY origin:015-clb-nffmux !30_04 !31_01 31_00 31_02
CLBLL_L.SLICEL_X1.AFFMUX.XOR origin:015-clb-nffmux !30_04 !31_00 !31_01 31_02
CLBLL_L.SLICEL_X1.AFFMUX.F7 origin:015-clb-nffmux !30_04 !31_02 31_00 31_01
CLBLL_L.SLICEL_X1.AFFMUX.O5 origin:015-clb-nffmux !31_01 !31_02 30_04 31_00
CLBLL_L.SLICEL_X1.AFFMUX.O6 origin:015-clb-nffmux !31_00 !31_01 !31_02 30_04
CLBLL_L.SLICEL_X1.AFFMUX.XOR origin:015-clb-nffmux !30_04 !31_00 !31_01 31_02
CLBLL_L.SLICEL_X1.ALUT.INIT[00] origin:010-clb-lutinit 26_15
CLBLL_L.SLICEL_X1.ALUT.INIT[01] origin:010-clb-lutinit 27_15
CLBLL_L.SLICEL_X1.ALUT.INIT[02] origin:010-clb-lutinit 26_14
@ -416,10 +416,10 @@ CLBLL_L.SLICEL_X1.ALUT.INIT[62] origin:010-clb-lutinit 29_00
CLBLL_L.SLICEL_X1.ALUT.INIT[63] origin:010-clb-lutinit 28_00
CLBLL_L.SLICEL_X1.AOUTMUX.A5Q origin:016-clb-noutmux !31_07 !31_09 !31_10 30_05
CLBLL_L.SLICEL_X1.AOUTMUX.CY origin:016-clb-noutmux !30_05 !31_09 31_07 31_10
CLBLL_L.SLICEL_X1.AOUTMUX.XOR origin:016-clb-noutmux !30_05 !31_09 !31_10 31_07
CLBLL_L.SLICEL_X1.AOUTMUX.F7 origin:016-clb-noutmux !31_07 !31_09 30_05 31_10
CLBLL_L.SLICEL_X1.AOUTMUX.O5 origin:016-clb-noutmux !30_05 !31_07 31_09 31_10
CLBLL_L.SLICEL_X1.AOUTMUX.O6 origin:016-clb-noutmux !30_05 !31_07 !31_10 31_09
CLBLL_L.SLICEL_X1.AOUTMUX.XOR origin:016-clb-noutmux !30_05 !31_09 !31_10 31_07
CLBLL_L.SLICEL_X1.B5FF.ZINI origin:011-clb-ffconfig 31_23
CLBLL_L.SLICEL_X1.B5FF.ZRST origin:011-clb-ffconfig 00_16
CLBLL_L.SLICEL_X1.B5FFMUX.IN_A origin:012-clb-n5ffmux 31_19
@ -428,10 +428,10 @@ CLBLL_L.SLICEL_X1.BFF.ZINI origin:011-clb-ffconfig 31_29
CLBLL_L.SLICEL_X1.BFF.ZRST origin:011-clb-ffconfig 31_30
CLBLL_L.SLICEL_X1.BFFMUX.BX origin:015-clb-nffmux !31_24 !31_25 !31_26 31_27
CLBLL_L.SLICEL_X1.BFFMUX.CY origin:015-clb-nffmux !31_24 !31_27 31_25 31_26
CLBLL_L.SLICEL_X1.BFFMUX.XOR origin:015-clb-nffmux !31_24 !31_25 !31_27 31_26
CLBLL_L.SLICEL_X1.BFFMUX.F8 origin:015-clb-nffmux !31_24 !31_26 31_25 31_27
CLBLL_L.SLICEL_X1.BFFMUX.O5 origin:015-clb-nffmux !31_26 !31_27 31_24 31_25
CLBLL_L.SLICEL_X1.BFFMUX.O6 origin:015-clb-nffmux !31_25 !31_26 !31_27 31_24
CLBLL_L.SLICEL_X1.BFFMUX.XOR origin:015-clb-nffmux !31_24 !31_25 !31_27 31_26
CLBLL_L.SLICEL_X1.BLUT.INIT[00] origin:010-clb-lutinit 26_31
CLBLL_L.SLICEL_X1.BLUT.INIT[01] origin:010-clb-lutinit 27_31
CLBLL_L.SLICEL_X1.BLUT.INIT[02] origin:010-clb-lutinit 26_30
@ -498,27 +498,23 @@ CLBLL_L.SLICEL_X1.BLUT.INIT[62] origin:010-clb-lutinit 29_16
CLBLL_L.SLICEL_X1.BLUT.INIT[63] origin:010-clb-lutinit 28_16
CLBLL_L.SLICEL_X1.BOUTMUX.B5Q origin:016-clb-noutmux !30_28 !31_20 !31_21 30_29
CLBLL_L.SLICEL_X1.BOUTMUX.CY origin:016-clb-noutmux !30_29 !31_20 30_28 31_21
CLBLL_L.SLICEL_X1.BOUTMUX.XOR origin:016-clb-noutmux !30_29 !31_20 !31_21 30_28
CLBLL_L.SLICEL_X1.BOUTMUX.F8 origin:016-clb-noutmux !30_28 !31_20 30_29 31_21
CLBLL_L.SLICEL_X1.BOUTMUX.O5 origin:016-clb-noutmux !30_28 !30_29 31_20 31_21
CLBLL_L.SLICEL_X1.BOUTMUX.O6 origin:016-clb-noutmux !30_28 !30_29 !31_21 31_20
CLBLL_L.SLICEL_X1.BOUTMUX.XOR origin:016-clb-noutmux !30_29 !31_20 !31_21 30_28
CLBLL_L.SLICEL_X1.C5FF.ZINI origin:011-clb-ffconfig 31_42
CLBLL_L.SLICEL_X1.C5FF.ZRST origin:011-clb-ffconfig 00_44
CLBLL_L.SLICEL_X1.C5FFMUX.IN_A origin:012-clb-n5ffmux 31_44
CLBLL_L.SLICEL_X1.C5FFMUX.IN_B origin:012-clb-n5ffmux 31_39
CLBLL_L.SLICEL_X1.CARRY4.ACY0 origin:013-clb-ncy0 31_14
CLBLL_L.SLICEL_X1.CARRY4.BCY0 origin:013-clb-ncy0 00_08
CLBLL_L.SLICEL_X1.CARRY4.CCY0 origin:013-clb-ncy0 31_48
CLBLL_L.SLICEL_X1.CARRY4.DCY0 origin:013-clb-ncy0 31_49
CLBLL_L.SLICEL_X1.CEUSEDMUX origin:014-clb-ffsrcemux 00_36
CLBLL_L.SLICEL_X1.CFF.ZINI origin:011-clb-ffconfig 31_34
CLBLL_L.SLICEL_X1.CFF.ZRST origin:011-clb-ffconfig 30_34
CLBLL_L.SLICEL_X1.CFFMUX.CX origin:015-clb-nffmux !31_35 !31_36 !31_37 31_38
CLBLL_L.SLICEL_X1.CFFMUX.CY origin:015-clb-nffmux !31_36 !31_38 31_35 31_37
CLBLL_L.SLICEL_X1.CFFMUX.XOR origin:015-clb-nffmux !31_35 !31_36 !31_38 31_37
CLBLL_L.SLICEL_X1.CFFMUX.F7 origin:015-clb-nffmux !31_36 !31_37 31_35 31_38
CLBLL_L.SLICEL_X1.CFFMUX.O5 origin:015-clb-nffmux !31_37 !31_38 31_35 31_36
CLBLL_L.SLICEL_X1.CFFMUX.O6 origin:015-clb-nffmux !31_35 !31_37 !31_38 31_36
CLBLL_L.SLICEL_X1.CFFMUX.XOR origin:015-clb-nffmux !31_35 !31_36 !31_38 31_37
CLBLL_L.SLICEL_X1.CLKINV origin:011-clb-ffconfig 00_52
CLBLL_L.SLICEL_X1.CLUT.INIT[00] origin:010-clb-lutinit 26_47
CLBLL_L.SLICEL_X1.CLUT.INIT[01] origin:010-clb-lutinit 27_47
@ -586,10 +582,10 @@ CLBLL_L.SLICEL_X1.CLUT.INIT[62] origin:010-clb-lutinit 29_32
CLBLL_L.SLICEL_X1.CLUT.INIT[63] origin:010-clb-lutinit 28_32
CLBLL_L.SLICEL_X1.COUTMUX.C5Q origin:016-clb-noutmux !30_42 !31_40 !31_43 30_41
CLBLL_L.SLICEL_X1.COUTMUX.CY origin:016-clb-noutmux !30_41 !31_43 30_42 31_40
CLBLL_L.SLICEL_X1.COUTMUX.XOR origin:016-clb-noutmux !30_41 !31_40 !31_43 30_42
CLBLL_L.SLICEL_X1.COUTMUX.F7 origin:016-clb-noutmux !30_42 !31_43 30_41 31_40
CLBLL_L.SLICEL_X1.COUTMUX.O5 origin:016-clb-noutmux !30_41 !30_42 31_40 31_43
CLBLL_L.SLICEL_X1.COUTMUX.O6 origin:016-clb-noutmux !30_41 !30_42 !31_40 31_43
CLBLL_L.SLICEL_X1.COUTMUX.XOR origin:016-clb-noutmux !30_41 !31_40 !31_43 30_42
CLBLL_L.SLICEL_X1.D5FF.ZINI origin:011-clb-ffconfig 31_52
CLBLL_L.SLICEL_X1.D5FF.ZRST origin:011-clb-ffconfig 00_56
CLBLL_L.SLICEL_X1.D5FFMUX.IN_A origin:012-clb-n5ffmux 31_55
@ -598,9 +594,9 @@ CLBLL_L.SLICEL_X1.DFF.ZINI origin:011-clb-ffconfig 31_59
CLBLL_L.SLICEL_X1.DFF.ZRST origin:011-clb-ffconfig 31_50
CLBLL_L.SLICEL_X1.DFFMUX.CY origin:015-clb-nffmux !31_60 !31_61 30_58 31_62
CLBLL_L.SLICEL_X1.DFFMUX.DX origin:015-clb-nffmux !30_58 !31_60 !31_62 31_61
CLBLL_L.SLICEL_X1.DFFMUX.XOR origin:015-clb-nffmux !30_58 !31_60 !31_61 31_62
CLBLL_L.SLICEL_X1.DFFMUX.O5 origin:015-clb-nffmux !31_61 !31_62 30_58 31_60
CLBLL_L.SLICEL_X1.DFFMUX.O6 origin:015-clb-nffmux !30_58 !31_61 !31_62 31_60
CLBLL_L.SLICEL_X1.DFFMUX.XOR origin:015-clb-nffmux !30_58 !31_60 !31_61 31_62
CLBLL_L.SLICEL_X1.DLUT.INIT[00] origin:010-clb-lutinit 26_63
CLBLL_L.SLICEL_X1.DLUT.INIT[01] origin:010-clb-lutinit 27_63
CLBLL_L.SLICEL_X1.DLUT.INIT[02] origin:010-clb-lutinit 26_62
@ -667,14 +663,18 @@ CLBLL_L.SLICEL_X1.DLUT.INIT[62] origin:010-clb-lutinit 29_48
CLBLL_L.SLICEL_X1.DLUT.INIT[63] origin:010-clb-lutinit 28_48
CLBLL_L.SLICEL_X1.DOUTMUX.CY origin:016-clb-noutmux !31_53 !31_56 30_53 31_57
CLBLL_L.SLICEL_X1.DOUTMUX.D5Q origin:016-clb-noutmux !30_53 !31_56 !31_57 31_53
CLBLL_L.SLICEL_X1.DOUTMUX.XOR origin:016-clb-noutmux !31_53 !31_56 !31_57 30_53
CLBLL_L.SLICEL_X1.DOUTMUX.O5 origin:016-clb-noutmux !30_53 !31_53 31_56 31_57
CLBLL_L.SLICEL_X1.DOUTMUX.O6 origin:016-clb-noutmux !30_53 !31_53 !31_57 31_56
CLBLL_L.SLICEL_X1.DOUTMUX.XOR origin:016-clb-noutmux !31_53 !31_56 !31_57 30_53
CLBLL_L.SLICEL_X1.FFSYNC origin:011-clb-ffconfig 01_31
CLBLL_L.SLICEL_X1.LATCH origin:011-clb-ffconfig 31_32
CLBLL_L.SLICEL_X1.NOCLKINV origin:011-clb-ffconfig !00_52
CLBLL_L.SLICEL_X1.PRECYINIT.AX origin:017-clb-precyinit !01_11 !31_12 31_13
CLBLL_L.SLICEL_X1.PRECYINIT.CIN origin:017-clb-precyinit !01_11 !31_13 31_12
CLBLL_L.SLICEL_X1.PRECYINIT.C0 origin:017-clb-precyinit !01_11 !31_12 !31_13
CLBLL_L.SLICEL_X1.PRECYINIT.C1 origin:017-clb-precyinit !31_12 !31_13 01_11
CLBLL_L.SLICEL_X1.PRECYINIT.CIN origin:017-clb-precyinit !01_11 !31_13 31_12
CLBLL_L.SLICEL_X1.SRUSEDMUX origin:014-clb-ffsrcemux 00_32
CLBLL_L.SLICEL_X1.CARRY4.ACY0 origin:013-clb-ncy0 31_14
CLBLL_L.SLICEL_X1.CARRY4.BCY0 origin:013-clb-ncy0 00_08
CLBLL_L.SLICEL_X1.CARRY4.CCY0 origin:013-clb-ncy0 31_48
CLBLL_L.SLICEL_X1.CARRY4.DCY0 origin:013-clb-ncy0 31_49

52
artix7/segbits_clbll_r.origin_info.db
View File

@ -6,10 +6,10 @@ CLBLL_R.SLICEL_X0.AFF.ZINI origin:011-clb-ffconfig 31_03
CLBLL_R.SLICEL_X0.AFF.ZRST origin:011-clb-ffconfig 30_12
CLBLL_R.SLICEL_X0.AFFMUX.AX origin:015-clb-nffmux !30_00 !30_02 !30_03 30_01
CLBLL_R.SLICEL_X0.AFFMUX.CY origin:015-clb-nffmux !30_01 !30_03 30_00 30_02
CLBLL_R.SLICEL_X0.AFFMUX.XOR origin:015-clb-nffmux !30_00 !30_01 !30_03 30_02
CLBLL_R.SLICEL_X0.AFFMUX.F7 origin:015-clb-nffmux !30_02 !30_03 30_00 30_01
CLBLL_R.SLICEL_X0.AFFMUX.O5 origin:015-clb-nffmux !30_01 !30_02 30_00 30_03
CLBLL_R.SLICEL_X0.AFFMUX.O6 origin:015-clb-nffmux !30_00 !30_01 !30_02 30_03
CLBLL_R.SLICEL_X0.AFFMUX.XOR origin:015-clb-nffmux !30_00 !30_01 !30_03 30_02
CLBLL_R.SLICEL_X0.ALUT.INIT[00] origin:010-clb-lutinit 32_15
CLBLL_R.SLICEL_X0.ALUT.INIT[01] origin:010-clb-lutinit 33_15
CLBLL_R.SLICEL_X0.ALUT.INIT[02] origin:010-clb-lutinit 32_14
@ -76,10 +76,10 @@ CLBLL_R.SLICEL_X0.ALUT.INIT[62] origin:010-clb-lutinit 35_00
CLBLL_R.SLICEL_X0.ALUT.INIT[63] origin:010-clb-lutinit 34_00
CLBLL_R.SLICEL_X0.AOUTMUX.A5Q origin:016-clb-noutmux !30_06 !30_08 !30_11 30_07
CLBLL_R.SLICEL_X0.AOUTMUX.CY origin:016-clb-noutmux !30_07 !30_11 30_06 30_08
CLBLL_R.SLICEL_X0.AOUTMUX.XOR origin:016-clb-noutmux !30_06 !30_07 !30_11 30_08
CLBLL_R.SLICEL_X0.AOUTMUX.F7 origin:016-clb-noutmux !30_08 !30_11 30_06 30_07
CLBLL_R.SLICEL_X0.AOUTMUX.O5 origin:016-clb-noutmux !30_07 !30_08 30_06 30_11
CLBLL_R.SLICEL_X0.AOUTMUX.O6 origin:016-clb-noutmux !30_06 !30_07 !30_08 30_11
CLBLL_R.SLICEL_X0.AOUTMUX.XOR origin:016-clb-noutmux !30_06 !30_07 !30_11 30_08
CLBLL_R.SLICEL_X0.B5FF.ZINI origin:011-clb-ffconfig 31_22
CLBLL_R.SLICEL_X0.B5FF.ZRST origin:011-clb-ffconfig 01_19
CLBLL_R.SLICEL_X0.B5FFMUX.IN_A origin:012-clb-n5ffmux 30_19
@ -88,10 +88,10 @@ CLBLL_R.SLICEL_X0.BFF.ZINI origin:011-clb-ffconfig 31_28
CLBLL_R.SLICEL_X0.BFF.ZRST origin:011-clb-ffconfig 30_30
CLBLL_R.SLICEL_X0.BFFMUX.BX origin:015-clb-nffmux !30_24 !30_25 !30_27 30_26
CLBLL_R.SLICEL_X0.BFFMUX.CY origin:015-clb-nffmux !30_24 !30_26 30_25 30_27
CLBLL_R.SLICEL_X0.BFFMUX.XOR origin:015-clb-nffmux !30_24 !30_26 !30_27 30_25
CLBLL_R.SLICEL_X0.BFFMUX.F8 origin:015-clb-nffmux !30_24 !30_25 30_26 30_27
CLBLL_R.SLICEL_X0.BFFMUX.O5 origin:015-clb-nffmux !30_25 !30_26 30_24 30_27
CLBLL_R.SLICEL_X0.BFFMUX.O6 origin:015-clb-nffmux !30_25 !30_26 !30_27 30_24
CLBLL_R.SLICEL_X0.BFFMUX.XOR origin:015-clb-nffmux !30_24 !30_26 !30_27 30_25
CLBLL_R.SLICEL_X0.BLUT.INIT[00] origin:010-clb-lutinit 32_31
CLBLL_R.SLICEL_X0.BLUT.INIT[01] origin:010-clb-lutinit 33_31
CLBLL_R.SLICEL_X0.BLUT.INIT[02] origin:010-clb-lutinit 32_30
@ -158,27 +158,23 @@ CLBLL_R.SLICEL_X0.BLUT.INIT[62] origin:010-clb-lutinit 35_16
CLBLL_R.SLICEL_X0.BLUT.INIT[63] origin:010-clb-lutinit 34_16
CLBLL_R.SLICEL_X0.BOUTMUX.B5Q origin:016-clb-noutmux !30_20 !30_21 !30_22 30_23
CLBLL_R.SLICEL_X0.BOUTMUX.CY origin:016-clb-noutmux !30_20 !30_23 30_21 30_22
CLBLL_R.SLICEL_X0.BOUTMUX.XOR origin:016-clb-noutmux !30_20 !30_22 !30_23 30_21
CLBLL_R.SLICEL_X0.BOUTMUX.F8 origin:016-clb-noutmux !30_20 !30_21 30_22 30_23
CLBLL_R.SLICEL_X0.BOUTMUX.O5 origin:016-clb-noutmux !30_21 !30_23 30_20 30_22
CLBLL_R.SLICEL_X0.BOUTMUX.O6 origin:016-clb-noutmux !30_21 !30_22 !30_23 30_20
CLBLL_R.SLICEL_X0.BOUTMUX.XOR origin:016-clb-noutmux !30_20 !30_22 !30_23 30_21
CLBLL_R.SLICEL_X0.C5FF.ZINI origin:011-clb-ffconfig 31_41
CLBLL_R.SLICEL_X0.C5FF.ZRST origin:011-clb-ffconfig 01_47
CLBLL_R.SLICEL_X0.C5FFMUX.IN_A origin:012-clb-n5ffmux 31_45
CLBLL_R.SLICEL_X0.C5FFMUX.IN_B origin:012-clb-n5ffmux 30_39
CLBLL_R.SLICEL_X0.CARRY4.ACY0 origin:013-clb-ncy0 30_15
CLBLL_R.SLICEL_X0.CARRY4.BCY0 origin:013-clb-ncy0 01_15
CLBLL_R.SLICEL_X0.CARRY4.CCY0 origin:013-clb-ncy0 30_48
CLBLL_R.SLICEL_X0.CARRY4.DCY0 origin:013-clb-ncy0 30_49
CLBLL_R.SLICEL_X0.CEUSEDMUX origin:014-clb-ffsrcemux 01_39
CLBLL_R.SLICEL_X0.CFF.ZINI origin:011-clb-ffconfig 31_33
CLBLL_R.SLICEL_X0.CFF.ZRST origin:011-clb-ffconfig 30_33
CLBLL_R.SLICEL_X0.CFFMUX.CX origin:015-clb-nffmux !30_35 !30_37 !30_38 30_36
CLBLL_R.SLICEL_X0.CFFMUX.CY origin:015-clb-nffmux !30_36 !30_38 30_35 30_37
CLBLL_R.SLICEL_X0.CFFMUX.XOR origin:015-clb-nffmux !30_35 !30_36 !30_38 30_37
CLBLL_R.SLICEL_X0.CFFMUX.F7 origin:015-clb-nffmux !30_37 !30_38 30_35 30_36
CLBLL_R.SLICEL_X0.CFFMUX.O5 origin:015-clb-nffmux !30_36 !30_37 30_35 30_38
CLBLL_R.SLICEL_X0.CFFMUX.O6 origin:015-clb-nffmux !30_35 !30_36 !30_37 30_38
CLBLL_R.SLICEL_X0.CFFMUX.XOR origin:015-clb-nffmux !30_35 !30_36 !30_38 30_37
CLBLL_R.SLICEL_X0.CLKINV origin:011-clb-ffconfig 01_51
CLBLL_R.SLICEL_X0.CLUT.INIT[00] origin:010-clb-lutinit 32_47
CLBLL_R.SLICEL_X0.CLUT.INIT[01] origin:010-clb-lutinit 33_47
@ -246,10 +242,10 @@ CLBLL_R.SLICEL_X0.CLUT.INIT[62] origin:010-clb-lutinit 35_32
CLBLL_R.SLICEL_X0.CLUT.INIT[63] origin:010-clb-lutinit 34_32
CLBLL_R.SLICEL_X0.COUTMUX.C5Q origin:016-clb-noutmux !30_40 !30_44 !30_45 30_43
CLBLL_R.SLICEL_X0.COUTMUX.CY origin:016-clb-noutmux !30_43 !30_45 30_40 30_44
CLBLL_R.SLICEL_X0.COUTMUX.XOR origin:016-clb-noutmux !30_40 !30_43 !30_45 30_44
CLBLL_R.SLICEL_X0.COUTMUX.F7 origin:016-clb-noutmux !30_44 !30_45 30_40 30_43
CLBLL_R.SLICEL_X0.COUTMUX.O5 origin:016-clb-noutmux !30_43 !30_44 30_40 30_45
CLBLL_R.SLICEL_X0.COUTMUX.O6 origin:016-clb-noutmux !30_40 !30_43 !30_44 30_45
CLBLL_R.SLICEL_X0.COUTMUX.XOR origin:016-clb-noutmux !30_40 !30_43 !30_45 30_44
CLBLL_R.SLICEL_X0.D5FF.ZINI origin:011-clb-ffconfig 31_51
CLBLL_R.SLICEL_X0.D5FF.ZRST origin:011-clb-ffconfig 01_55
CLBLL_R.SLICEL_X0.D5FFMUX.IN_A origin:012-clb-n5ffmux 30_55
@ -258,9 +254,9 @@ CLBLL_R.SLICEL_X0.DFF.ZINI origin:011-clb-ffconfig 31_58
CLBLL_R.SLICEL_X0.DFF.ZRST origin:011-clb-ffconfig 30_50
CLBLL_R.SLICEL_X0.DFFMUX.CY origin:015-clb-nffmux !30_59 !30_61 30_60 30_62
CLBLL_R.SLICEL_X0.DFFMUX.DX origin:015-clb-nffmux !30_59 !30_60 !30_62 30_61
CLBLL_R.SLICEL_X0.DFFMUX.XOR origin:015-clb-nffmux !30_59 !30_61 !30_62 30_60
CLBLL_R.SLICEL_X0.DFFMUX.O5 origin:015-clb-nffmux !30_60 !30_61 30_59 30_62
CLBLL_R.SLICEL_X0.DFFMUX.O6 origin:015-clb-nffmux !30_60 !30_61 !30_62 30_59
CLBLL_R.SLICEL_X0.DFFMUX.XOR origin:015-clb-nffmux !30_59 !30_61 !30_62 30_60
CLBLL_R.SLICEL_X0.DLUT.INIT[00] origin:010-clb-lutinit 32_63
CLBLL_R.SLICEL_X0.DLUT.INIT[01] origin:010-clb-lutinit 33_63
CLBLL_R.SLICEL_X0.DLUT.INIT[02] origin:010-clb-lutinit 32_62
@ -327,17 +323,21 @@ CLBLL_R.SLICEL_X0.DLUT.INIT[62] origin:010-clb-lutinit 35_48
CLBLL_R.SLICEL_X0.DLUT.INIT[63] origin:010-clb-lutinit 34_48
CLBLL_R.SLICEL_X0.DOUTMUX.CY origin:016-clb-noutmux !30_56 !30_57 30_51 30_52
CLBLL_R.SLICEL_X0.DOUTMUX.D5Q origin:016-clb-noutmux !30_51 !30_52 !30_56 30_57
CLBLL_R.SLICEL_X0.DOUTMUX.XOR origin:016-clb-noutmux !30_52 !30_56 !30_57 30_51
CLBLL_R.SLICEL_X0.DOUTMUX.O5 origin:016-clb-noutmux !30_51 !30_57 30_52 30_56
CLBLL_R.SLICEL_X0.DOUTMUX.O6 origin:016-clb-noutmux !30_51 !30_52 !30_57 30_56
CLBLL_R.SLICEL_X0.DOUTMUX.XOR origin:016-clb-noutmux !30_52 !30_56 !30_57 30_51
CLBLL_R.SLICEL_X0.FFSYNC origin:011-clb-ffconfig 00_48
CLBLL_R.SLICEL_X0.LATCH origin:011-clb-ffconfig 30_32
CLBLL_R.SLICEL_X0.NOCLKINV origin:011-clb-ffconfig !01_51
CLBLL_R.SLICEL_X0.PRECYINIT.AX origin:017-clb-precyinit !00_12 !30_13 30_14
CLBLL_R.SLICEL_X0.PRECYINIT.CIN origin:017-clb-precyinit !00_12 !30_14 30_13
CLBLL_R.SLICEL_X0.PRECYINIT.C0 origin:017-clb-precyinit !00_12 !30_13 !30_14
CLBLL_R.SLICEL_X0.PRECYINIT.C1 origin:017-clb-precyinit !30_13 !30_14 00_12
CLBLL_R.SLICEL_X0.PRECYINIT.CIN origin:017-clb-precyinit !00_12 !30_14 30_13
CLBLL_R.SLICEL_X0.SRUSEDMUX origin:014-clb-ffsrcemux 01_35
CLBLL_R.SLICEL_X0.CARRY4.ACY0 origin:013-clb-ncy0 30_15
CLBLL_R.SLICEL_X0.CARRY4.BCY0 origin:013-clb-ncy0 01_15
CLBLL_R.SLICEL_X0.CARRY4.CCY0 origin:013-clb-ncy0 30_48
CLBLL_R.SLICEL_X0.CARRY4.DCY0 origin:013-clb-ncy0 30_49
CLBLL_R.SLICEL_X1.A5FF.ZINI origin:011-clb-ffconfig 31_05
CLBLL_R.SLICEL_X1.A5FF.ZRST origin:011-clb-ffconfig 01_03
CLBLL_R.SLICEL_X1.A5FFMUX.IN_A origin:012-clb-n5ffmux 31_08
@ -346,10 +346,10 @@ CLBLL_R.SLICEL_X1.AFF.ZINI origin:011-clb-ffconfig 31_04
CLBLL_R.SLICEL_X1.AFF.ZRST origin:011-clb-ffconfig 31_15
CLBLL_R.SLICEL_X1.AFFMUX.AX origin:015-clb-nffmux !30_04 !31_00 !31_02 31_01
CLBLL_R.SLICEL_X1.AFFMUX.CY origin:015-clb-nffmux !30_04 !31_01 31_00 31_02
CLBLL_R.SLICEL_X1.AFFMUX.XOR origin:015-clb-nffmux !30_04 !31_00 !31_01 31_02
CLBLL_R.SLICEL_X1.AFFMUX.F7 origin:015-clb-nffmux !30_04 !31_02 31_00 31_01
CLBLL_R.SLICEL_X1.AFFMUX.O5 origin:015-clb-nffmux !31_01 !31_02 30_04 31_00
CLBLL_R.SLICEL_X1.AFFMUX.O6 origin:015-clb-nffmux !31_00 !31_01 !31_02 30_04
CLBLL_R.SLICEL_X1.AFFMUX.XOR origin:015-clb-nffmux !30_04 !31_00 !31_01 31_02
CLBLL_R.SLICEL_X1.ALUT.INIT[00] origin:010-clb-lutinit 26_15
CLBLL_R.SLICEL_X1.ALUT.INIT[01] origin:010-clb-lutinit 27_15
CLBLL_R.SLICEL_X1.ALUT.INIT[02] origin:010-clb-lutinit 26_14
@ -416,10 +416,10 @@ CLBLL_R.SLICEL_X1.ALUT.INIT[62] origin:010-clb-lutinit 29_00
CLBLL_R.SLICEL_X1.ALUT.INIT[63] origin:010-clb-lutinit 28_00
CLBLL_R.SLICEL_X1.AOUTMUX.A5Q origin:016-clb-noutmux !31_07 !31_09 !31_10 30_05
CLBLL_R.SLICEL_X1.AOUTMUX.CY origin:016-clb-noutmux !30_05 !31_09 31_07 31_10
CLBLL_R.SLICEL_X1.AOUTMUX.XOR origin:016-clb-noutmux !30_05 !31_09 !31_10 31_07
CLBLL_R.SLICEL_X1.AOUTMUX.F7 origin:016-clb-noutmux !31_07 !31_09 30_05 31_10
CLBLL_R.SLICEL_X1.AOUTMUX.O5 origin:016-clb-noutmux !30_05 !31_07 31_09 31_10
CLBLL_R.SLICEL_X1.AOUTMUX.O6 origin:016-clb-noutmux !30_05 !31_07 !31_10 31_09
CLBLL_R.SLICEL_X1.AOUTMUX.XOR origin:016-clb-noutmux !30_05 !31_09 !31_10 31_07
CLBLL_R.SLICEL_X1.B5FF.ZINI origin:011-clb-ffconfig 31_23
CLBLL_R.SLICEL_X1.B5FF.ZRST origin:011-clb-ffconfig 00_16
CLBLL_R.SLICEL_X1.B5FFMUX.IN_A origin:012-clb-n5ffmux 31_19
@ -428,10 +428,10 @@ CLBLL_R.SLICEL_X1.BFF.ZINI origin:011-clb-ffconfig 31_29
CLBLL_R.SLICEL_X1.BFF.ZRST origin:011-clb-ffconfig 31_30
CLBLL_R.SLICEL_X1.BFFMUX.BX origin:015-clb-nffmux !31_24 !31_25 !31_26 31_27
CLBLL_R.SLICEL_X1.BFFMUX.CY origin:015-clb-nffmux !31_24 !31_27 31_25 31_26
CLBLL_R.SLICEL_X1.BFFMUX.XOR origin:015-clb-nffmux !31_24 !31_25 !31_27 31_26
CLBLL_R.SLICEL_X1.BFFMUX.F8 origin:015-clb-nffmux !31_24 !31_26 31_25 31_27
CLBLL_R.SLICEL_X1.BFFMUX.O5 origin:015-clb-nffmux !31_26 !31_27 31_24 31_25
CLBLL_R.SLICEL_X1.BFFMUX.O6 origin:015-clb-nffmux !31_25 !31_26 !31_27 31_24
CLBLL_R.SLICEL_X1.BFFMUX.XOR origin:015-clb-nffmux !31_24 !31_25 !31_27 31_26
CLBLL_R.SLICEL_X1.BLUT.INIT[00] origin:010-clb-lutinit 26_31
CLBLL_R.SLICEL_X1.BLUT.INIT[01] origin:010-clb-lutinit 27_31
CLBLL_R.SLICEL_X1.BLUT.INIT[02] origin:010-clb-lutinit 26_30
@ -498,27 +498,23 @@ CLBLL_R.SLICEL_X1.BLUT.INIT[62] origin:010-clb-lutinit 29_16
CLBLL_R.SLICEL_X1.BLUT.INIT[63] origin:010-clb-lutinit 28_16
CLBLL_R.SLICEL_X1.BOUTMUX.B5Q origin:016-clb-noutmux !30_28 !31_20 !31_21 30_29
CLBLL_R.SLICEL_X1.BOUTMUX.CY origin:016-clb-noutmux !30_29 !31_20 30_28 31_21
CLBLL_R.SLICEL_X1.BOUTMUX.XOR origin:016-clb-noutmux !30_29 !31_20 !31_21 30_28
CLBLL_R.SLICEL_X1.BOUTMUX.F8 origin:016-clb-noutmux !30_28 !31_20 30_29 31_21
CLBLL_R.SLICEL_X1.BOUTMUX.O5 origin:016-clb-noutmux !30_28 !30_29 31_20 31_21
CLBLL_R.SLICEL_X1.BOUTMUX.O6 origin:016-clb-noutmux !30_28 !30_29 !31_21 31_20
CLBLL_R.SLICEL_X1.BOUTMUX.XOR origin:016-clb-noutmux !30_29 !31_20 !31_21 30_28
CLBLL_R.SLICEL_X1.C5FF.ZINI origin:011-clb-ffconfig 31_42
CLBLL_R.SLICEL_X1.C5FF.ZRST origin:011-clb-ffconfig 00_44
CLBLL_R.SLICEL_X1.C5FFMUX.IN_A origin:012-clb-n5ffmux 31_44
CLBLL_R.SLICEL_X1.C5FFMUX.IN_B origin:012-clb-n5ffmux 31_39
CLBLL_R.SLICEL_X1.CARRY4.ACY0 origin:013-clb-ncy0 31_14
CLBLL_R.SLICEL_X1.CARRY4.BCY0 origin:013-clb-ncy0 00_08
CLBLL_R.SLICEL_X1.CARRY4.CCY0 origin:013-clb-ncy0 31_48
CLBLL_R.SLICEL_X1.CARRY4.DCY0 origin:013-clb-ncy0 31_49
CLBLL_R.SLICEL_X1.CEUSEDMUX origin:014-clb-ffsrcemux 00_36
CLBLL_R.SLICEL_X1.CFF.ZINI origin:011-clb-ffconfig 31_34
CLBLL_R.SLICEL_X1.CFF.ZRST origin:011-clb-ffconfig 30_34
CLBLL_R.SLICEL_X1.CFFMUX.CX origin:015-clb-nffmux !31_35 !31_36 !31_37 31_38
CLBLL_R.SLICEL_X1.CFFMUX.CY origin:015-clb-nffmux !31_36 !31_38 31_35 31_37
CLBLL_R.SLICEL_X1.CFFMUX.XOR origin:015-clb-nffmux !31_35 !31_36 !31_38 31_37
CLBLL_R.SLICEL_X1.CFFMUX.F7 origin:015-clb-nffmux !31_36 !31_37 31_35 31_38
CLBLL_R.SLICEL_X1.CFFMUX.O5 origin:015-clb-nffmux !31_37 !31_38 31_35 31_36
CLBLL_R.SLICEL_X1.CFFMUX.O6 origin:015-clb-nffmux !31_35 !31_37 !31_38 31_36
CLBLL_R.SLICEL_X1.CFFMUX.XOR origin:015-clb-nffmux !31_35 !31_36 !31_38 31_37
CLBLL_R.SLICEL_X1.CLKINV origin:011-clb-ffconfig 00_52
CLBLL_R.SLICEL_X1.CLUT.INIT[00] origin:010-clb-lutinit 26_47
CLBLL_R.SLICEL_X1.CLUT.INIT[01] origin:010-clb-lutinit 27_47
@ -586,10 +582,10 @@ CLBLL_R.SLICEL_X1.CLUT.INIT[62] origin:010-clb-lutinit 29_32
CLBLL_R.SLICEL_X1.CLUT.INIT[63] origin:010-clb-lutinit 28_32
CLBLL_R.SLICEL_X1.COUTMUX.C5Q origin:016-clb-noutmux !30_42 !31_40 !31_43 30_41
CLBLL_R.SLICEL_X1.COUTMUX.CY origin:016-clb-noutmux !30_41 !31_43 30_42 31_40
CLBLL_R.SLICEL_X1.COUTMUX.XOR origin:016-clb-noutmux !30_41 !31_40 !31_43 30_42
CLBLL_R.SLICEL_X1.COUTMUX.F7 origin:016-clb-noutmux !30_42 !31_43 30_41 31_40
CLBLL_R.SLICEL_X1.COUTMUX.O5 origin:016-clb-noutmux !30_41 !30_42 31_40 31_43
CLBLL_R.SLICEL_X1.COUTMUX.O6 origin:016-clb-noutmux !30_41 !30_42 !31_40 31_43
CLBLL_R.SLICEL_X1.COUTMUX.XOR origin:016-clb-noutmux !30_41 !31_40 !31_43 30_42
CLBLL_R.SLICEL_X1.D5FF.ZINI origin:011-clb-ffconfig 31_52
CLBLL_R.SLICEL_X1.D5FF.ZRST origin:011-clb-ffconfig 00_56
CLBLL_R.SLICEL_X1.D5FFMUX.IN_A origin:012-clb-n5ffmux 31_55
@ -598,9 +594,9 @@ CLBLL_R.SLICEL_X1.DFF.ZINI origin:011-clb-ffconfig 31_59
CLBLL_R.SLICEL_X1.DFF.ZRST origin:011-clb-ffconfig 31_50
CLBLL_R.SLICEL_X1.DFFMUX.CY origin:015-clb-nffmux !31_60 !31_61 30_58 31_62
CLBLL_R.SLICEL_X1.DFFMUX.DX origin:015-clb-nffmux !30_58 !31_60 !31_62 31_61
CLBLL_R.SLICEL_X1.DFFMUX.XOR origin:015-clb-nffmux !30_58 !31_60 !31_61 31_62
CLBLL_R.SLICEL_X1.DFFMUX.O5 origin:015-clb-nffmux !31_61 !31_62 30_58 31_60
CLBLL_R.SLICEL_X1.DFFMUX.O6 origin:015-clb-nffmux !30_58 !31_61 !31_62 31_60
CLBLL_R.SLICEL_X1.DFFMUX.XOR origin:015-clb-nffmux !30_58 !31_60 !31_61 31_62
CLBLL_R.SLICEL_X1.DLUT.INIT[00] origin:010-clb-lutinit 26_63
CLBLL_R.SLICEL_X1.DLUT.INIT[01] origin:010-clb-lutinit 27_63
CLBLL_R.SLICEL_X1.DLUT.INIT[02] origin:010-clb-lutinit 26_62
@ -667,14 +663,18 @@ CLBLL_R.SLICEL_X1.DLUT.INIT[62] origin:010-clb-lutinit 29_48
CLBLL_R.SLICEL_X1.DLUT.INIT[63] origin:010-clb-lutinit 28_48
CLBLL_R.SLICEL_X1.DOUTMUX.CY origin:016-clb-noutmux !31_53 !31_56 30_53 31_57
CLBLL_R.SLICEL_X1.DOUTMUX.D5Q origin:016-clb-noutmux !30_53 !31_56 !31_57 31_53
CLBLL_R.SLICEL_X1.DOUTMUX.XOR origin:016-clb-noutmux !31_53 !31_56 !31_57 30_53
CLBLL_R.SLICEL_X1.DOUTMUX.O5 origin:016-clb-noutmux !30_53 !31_53 31_56 31_57
CLBLL_R.SLICEL_X1.DOUTMUX.O6 origin:016-clb-noutmux !30_53 !31_53 !31_57 31_56
CLBLL_R.SLICEL_X1.DOUTMUX.XOR origin:016-clb-noutmux !31_53 !31_56 !31_57 30_53
CLBLL_R.SLICEL_X1.FFSYNC origin:011-clb-ffconfig 01_31
CLBLL_R.SLICEL_X1.LATCH origin:011-clb-ffconfig 31_32
CLBLL_R.SLICEL_X1.NOCLKINV origin:011-clb-ffconfig !00_52
CLBLL_R.SLICEL_X1.PRECYINIT.AX origin:017-clb-precyinit !01_11 !31_12 31_13
CLBLL_R.SLICEL_X1.PRECYINIT.CIN origin:017-clb-precyinit !01_11 !31_13 31_12
CLBLL_R.SLICEL_X1.PRECYINIT.C0 origin:017-clb-precyinit !01_11 !31_12 !31_13
CLBLL_R.SLICEL_X1.PRECYINIT.C1 origin:017-clb-precyinit !31_12 !31_13 01_11
CLBLL_R.SLICEL_X1.PRECYINIT.CIN origin:017-clb-precyinit !01_11 !31_13 31_12
CLBLL_R.SLICEL_X1.SRUSEDMUX origin:014-clb-ffsrcemux 00_32
CLBLL_R.SLICEL_X1.CARRY4.ACY0 origin:013-clb-ncy0 31_14
CLBLL_R.SLICEL_X1.CARRY4.BCY0 origin:013-clb-ncy0 00_08
CLBLL_R.SLICEL_X1.CARRY4.CCY0 origin:013-clb-ncy0 31_48
CLBLL_R.SLICEL_X1.CARRY4.DCY0 origin:013-clb-ncy0 31_49

52
artix7/segbits_clblm_l.origin_info.db
View File

@ -6,10 +6,10 @@ CLBLM_L.SLICEL_X1.AFF.ZINI origin:011-clb-ffconfig 31_04
CLBLM_L.SLICEL_X1.AFF.ZRST origin:011-clb-ffconfig 31_15
CLBLM_L.SLICEL_X1.AFFMUX.AX origin:015-clb-nffmux !30_04 !31_00 !31_02 31_01
CLBLM_L.SLICEL_X1.AFFMUX.CY origin:015-clb-nffmux !30_04 !31_01 31_00 31_02
CLBLM_L.SLICEL_X1.AFFMUX.XOR origin:015-clb-nffmux !30_04 !31_00 !31_01 31_02
CLBLM_L.SLICEL_X1.AFFMUX.F7 origin:015-clb-nffmux !30_04 !31_02 31_00 31_01
CLBLM_L.SLICEL_X1.AFFMUX.O5 origin:015-clb-nffmux !31_01 !31_02 30_04 31_00
CLBLM_L.SLICEL_X1.AFFMUX.O6 origin:015-clb-nffmux !31_00 !31_01 !31_02 30_04
CLBLM_L.SLICEL_X1.AFFMUX.XOR origin:015-clb-nffmux !30_04 !31_00 !31_01 31_02
CLBLM_L.SLICEL_X1.ALUT.INIT[00] origin:010-clb-lutinit 26_15
CLBLM_L.SLICEL_X1.ALUT.INIT[01] origin:010-clb-lutinit 27_15
CLBLM_L.SLICEL_X1.ALUT.INIT[02] origin:010-clb-lutinit 26_14
@ -76,10 +76,10 @@ CLBLM_L.SLICEL_X1.ALUT.INIT[62] origin:010-clb-lutinit 29_00
CLBLM_L.SLICEL_X1.ALUT.INIT[63] origin:010-clb-lutinit 28_00
CLBLM_L.SLICEL_X1.AOUTMUX.A5Q origin:016-clb-noutmux !31_07 !31_09 !31_10 30_05
CLBLM_L.SLICEL_X1.AOUTMUX.CY origin:016-clb-noutmux !30_05 !31_09 31_07 31_10
CLBLM_L.SLICEL_X1.AOUTMUX.XOR origin:016-clb-noutmux !30_05 !31_09 !31_10 31_07
CLBLM_L.SLICEL_X1.AOUTMUX.F7 origin:016-clb-noutmux !31_07 !31_09 30_05 31_10
CLBLM_L.SLICEL_X1.AOUTMUX.O5 origin:016-clb-noutmux !30_05 !31_07 31_09 31_10
CLBLM_L.SLICEL_X1.AOUTMUX.O6 origin:016-clb-noutmux !30_05 !31_07 !31_10 31_09
CLBLM_L.SLICEL_X1.AOUTMUX.XOR origin:016-clb-noutmux !30_05 !31_09 !31_10 31_07
CLBLM_L.SLICEL_X1.B5FF.ZINI origin:011-clb-ffconfig 31_23
CLBLM_L.SLICEL_X1.B5FF.ZRST origin:011-clb-ffconfig 00_16
CLBLM_L.SLICEL_X1.B5FFMUX.IN_A origin:012-clb-n5ffmux 31_19
@ -88,10 +88,10 @@ CLBLM_L.SLICEL_X1.BFF.ZINI origin:011-clb-ffconfig 31_29
CLBLM_L.SLICEL_X1.BFF.ZRST origin:011-clb-ffconfig 31_30
CLBLM_L.SLICEL_X1.BFFMUX.BX origin:015-clb-nffmux !31_24 !31_25 !31_26 31_27
CLBLM_L.SLICEL_X1.BFFMUX.CY origin:015-clb-nffmux !31_24 !31_27 31_25 31_26
CLBLM_L.SLICEL_X1.BFFMUX.XOR origin:015-clb-nffmux !31_24 !31_25 !31_27 31_26
CLBLM_L.SLICEL_X1.BFFMUX.F8 origin:015-clb-nffmux !31_24 !31_26 31_25 31_27
CLBLM_L.SLICEL_X1.BFFMUX.O5 origin:015-clb-nffmux !31_26 !31_27 31_24 31_25
CLBLM_L.SLICEL_X1.BFFMUX.O6 origin:015-clb-nffmux !31_25 !31_26 !31_27 31_24
CLBLM_L.SLICEL_X1.BFFMUX.XOR origin:015-clb-nffmux !31_24 !31_25 !31_27 31_26
CLBLM_L.SLICEL_X1.BLUT.INIT[00] origin:010-clb-lutinit 26_31
CLBLM_L.SLICEL_X1.BLUT.INIT[01] origin:010-clb-lutinit 27_31
CLBLM_L.SLICEL_X1.BLUT.INIT[02] origin:010-clb-lutinit 26_30
@ -158,27 +158,23 @@ CLBLM_L.SLICEL_X1.BLUT.INIT[62] origin:010-clb-lutinit 29_16
CLBLM_L.SLICEL_X1.BLUT.INIT[63] origin:010-clb-lutinit 28_16
CLBLM_L.SLICEL_X1.BOUTMUX.B5Q origin:016-clb-noutmux !30_28 !31_20 !31_21 30_29
CLBLM_L.SLICEL_X1.BOUTMUX.CY origin:016-clb-noutmux !30_29 !31_20 30_28 31_21
CLBLM_L.SLICEL_X1.BOUTMUX.XOR origin:016-clb-noutmux !30_29 !31_20 !31_21 30_28
CLBLM_L.SLICEL_X1.BOUTMUX.F8 origin:016-clb-noutmux !30_28 !31_20 30_29 31_21
CLBLM_L.SLICEL_X1.BOUTMUX.O5 origin:016-clb-noutmux !30_28 !30_29 31_20 31_21
CLBLM_L.SLICEL_X1.BOUTMUX.O6 origin:016-clb-noutmux !30_28 !30_29 !31_21 31_20
CLBLM_L.SLICEL_X1.BOUTMUX.XOR origin:016-clb-noutmux !30_29 !31_20 !31_21 30_28
CLBLM_L.SLICEL_X1.C5FF.ZINI origin:011-clb-ffconfig 31_42
CLBLM_L.SLICEL_X1.C5FF.ZRST origin:011-clb-ffconfig 00_44
CLBLM_L.SLICEL_X1.C5FFMUX.IN_A origin:012-clb-n5ffmux 31_44
CLBLM_L.SLICEL_X1.C5FFMUX.IN_B origin:012-clb-n5ffmux 31_39
CLBLM_L.SLICEL_X1.CARRY4.ACY0 origin:013-clb-ncy0 31_14
CLBLM_L.SLICEL_X1.CARRY4.BCY0 origin:013-clb-ncy0 00_08
CLBLM_L.SLICEL_X1.CARRY4.CCY0 origin:013-clb-ncy0 31_48
CLBLM_L.SLICEL_X1.CARRY4.DCY0 origin:013-clb-ncy0 31_49
CLBLM_L.SLICEL_X1.CEUSEDMUX origin:014-clb-ffsrcemux 00_36
CLBLM_L.SLICEL_X1.CFF.ZINI origin:011-clb-ffconfig 31_34
CLBLM_L.SLICEL_X1.CFF.ZRST origin:011-clb-ffconfig 30_34
CLBLM_L.SLICEL_X1.CFFMUX.CX origin:015-clb-nffmux !31_35 !31_36 !31_37 31_38
CLBLM_L.SLICEL_X1.CFFMUX.CY origin:015-clb-nffmux !31_36 !31_38 31_35 31_37
CLBLM_L.SLICEL_X1.CFFMUX.XOR origin:015-clb-nffmux !31_35 !31_36 !31_38 31_37
CLBLM_L.SLICEL_X1.CFFMUX.F7 origin:015-clb-nffmux !31_36 !31_37 31_35 31_38
CLBLM_L.SLICEL_X1.CFFMUX.O5 origin:015-clb-nffmux !31_37 !31_38 31_35 31_36
CLBLM_L.SLICEL_X1.CFFMUX.O6 origin:015-clb-nffmux !31_35 !31_37 !31_38 31_36
CLBLM_L.SLICEL_X1.CFFMUX.XOR origin:015-clb-nffmux !31_35 !31_36 !31_38 31_37
CLBLM_L.SLICEL_X1.CLKINV origin:011-clb-ffconfig 00_52
CLBLM_L.SLICEL_X1.CLUT.INIT[00] origin:010-clb-lutinit 26_47
CLBLM_L.SLICEL_X1.CLUT.INIT[01] origin:010-clb-lutinit 27_47
@ -246,10 +242,10 @@ CLBLM_L.SLICEL_X1.CLUT.INIT[62] origin:010-clb-lutinit 29_32
CLBLM_L.SLICEL_X1.CLUT.INIT[63] origin:010-clb-lutinit 28_32
CLBLM_L.SLICEL_X1.COUTMUX.C5Q origin:016-clb-noutmux !30_42 !31_40 !31_43 30_41
CLBLM_L.SLICEL_X1.COUTMUX.CY origin:016-clb-noutmux !30_41 !31_43 30_42 31_40
CLBLM_L.SLICEL_X1.COUTMUX.XOR origin:016-clb-noutmux !30_41 !31_40 !31_43 30_42
CLBLM_L.SLICEL_X1.COUTMUX.F7 origin:016-clb-noutmux !30_42 !31_43 30_41 31_40
CLBLM_L.SLICEL_X1.COUTMUX.O5 origin:016-clb-noutmux !30_41 !30_42 31_40 31_43
CLBLM_L.SLICEL_X1.COUTMUX.O6 origin:016-clb-noutmux !30_41 !30_42 !31_40 31_43
CLBLM_L.SLICEL_X1.COUTMUX.XOR origin:016-clb-noutmux !30_41 !31_40 !31_43 30_42
CLBLM_L.SLICEL_X1.D5FF.ZINI origin:011-clb-ffconfig 31_52
CLBLM_L.SLICEL_X1.D5FF.ZRST origin:011-clb-ffconfig 00_56
CLBLM_L.SLICEL_X1.D5FFMUX.IN_A origin:012-clb-n5ffmux 31_55
@ -258,9 +254,9 @@ CLBLM_L.SLICEL_X1.DFF.ZINI origin:011-clb-ffconfig 31_59
CLBLM_L.SLICEL_X1.DFF.ZRST origin:011-clb-ffconfig 31_50
CLBLM_L.SLICEL_X1.DFFMUX.CY origin:015-clb-nffmux !31_60 !31_61 30_58 31_62
CLBLM_L.SLICEL_X1.DFFMUX.DX origin:015-clb-nffmux !30_58 !31_60 !31_62 31_61
CLBLM_L.SLICEL_X1.DFFMUX.XOR origin:015-clb-nffmux !30_58 !31_60 !31_61 31_62
CLBLM_L.SLICEL_X1.DFFMUX.O5 origin:015-clb-nffmux !31_61 !31_62 30_58 31_60
CLBLM_L.SLICEL_X1.DFFMUX.O6 origin:015-clb-nffmux !30_58 !31_61 !31_62 31_60
CLBLM_L.SLICEL_X1.DFFMUX.XOR origin:015-clb-nffmux !30_58 !31_60 !31_61 31_62
CLBLM_L.SLICEL_X1.DLUT.INIT[00] origin:010-clb-lutinit 26_63
CLBLM_L.SLICEL_X1.DLUT.INIT[01] origin:010-clb-lutinit 27_63
CLBLM_L.SLICEL_X1.DLUT.INIT[02] origin:010-clb-lutinit 26_62
@ -327,17 +323,21 @@ CLBLM_L.SLICEL_X1.DLUT.INIT[62] origin:010-clb-lutinit 29_48
CLBLM_L.SLICEL_X1.DLUT.INIT[63] origin:010-clb-lutinit 28_48
CLBLM_L.SLICEL_X1.DOUTMUX.CY origin:016-clb-noutmux !31_53 !31_56 30_53 31_57
CLBLM_L.SLICEL_X1.DOUTMUX.D5Q origin:016-clb-noutmux !30_53 !31_56 !31_57 31_53
CLBLM_L.SLICEL_X1.DOUTMUX.XOR origin:016-clb-noutmux !31_53 !31_56 !31_57 30_53
CLBLM_L.SLICEL_X1.DOUTMUX.O5 origin:016-clb-noutmux !30_53 !31_53 31_56 31_57
CLBLM_L.SLICEL_X1.DOUTMUX.O6 origin:016-clb-noutmux !30_53 !31_53 !31_57 31_56
CLBLM_L.SLICEL_X1.DOUTMUX.XOR origin:016-clb-noutmux !31_53 !31_56 !31_57 30_53
CLBLM_L.SLICEL_X1.FFSYNC origin:011-clb-ffconfig 01_31
CLBLM_L.SLICEL_X1.LATCH origin:011-clb-ffconfig 31_32
CLBLM_L.SLICEL_X1.NOCLKINV origin:011-clb-ffconfig !00_52
CLBLM_L.SLICEL_X1.PRECYINIT.AX origin:017-clb-precyinit !01_11 !31_12 31_13
CLBLM_L.SLICEL_X1.PRECYINIT.CIN origin:017-clb-precyinit !01_11 !31_13 31_12
CLBLM_L.SLICEL_X1.PRECYINIT.C0 origin:017-clb-precyinit !01_11 !31_12 !31_13
CLBLM_L.SLICEL_X1.PRECYINIT.C1 origin:017-clb-precyinit !31_12 !31_13 01_11
CLBLM_L.SLICEL_X1.PRECYINIT.CIN origin:017-clb-precyinit !01_11 !31_13 31_12
CLBLM_L.SLICEL_X1.SRUSEDMUX origin:014-clb-ffsrcemux 00_32
CLBLM_L.SLICEL_X1.CARRY4.ACY0 origin:013-clb-ncy0 31_14
CLBLM_L.SLICEL_X1.CARRY4.BCY0 origin:013-clb-ncy0 00_08
CLBLM_L.SLICEL_X1.CARRY4.CCY0 origin:013-clb-ncy0 31_48
CLBLM_L.SLICEL_X1.CARRY4.DCY0 origin:013-clb-ncy0 31_49
CLBLM_L.SLICEM_X0.A5FF.ZINI origin:011-clb-ffconfig 31_06
CLBLM_L.SLICEM_X0.A5FF.ZRST origin:011-clb-ffconfig 01_07
CLBLM_L.SLICEM_X0.A5FFMUX.IN_A origin:012-clb-n5ffmux 30_09
@ -346,10 +346,10 @@ CLBLM_L.SLICEM_X0.AFF.ZINI origin:011-clb-ffconfig 31_03
CLBLM_L.SLICEM_X0.AFF.ZRST origin:011-clb-ffconfig 30_12
CLBLM_L.SLICEM_X0.AFFMUX.AX origin:015-clb-nffmux !30_00 !30_02 !30_03 30_01
CLBLM_L.SLICEM_X0.AFFMUX.CY origin:015-clb-nffmux !30_01 !30_03 30_00 30_02
CLBLM_L.SLICEM_X0.AFFMUX.XOR origin:015-clb-nffmux !30_00 !30_01 !30_03 30_02
CLBLM_L.SLICEM_X0.AFFMUX.F7 origin:015-clb-nffmux !30_02 !30_03 30_00 30_01
CLBLM_L.SLICEM_X0.AFFMUX.O5 origin:015-clb-nffmux !30_01 !30_02 30_00 30_03
CLBLM_L.SLICEM_X0.AFFMUX.O6 origin:015-clb-nffmux !30_00 !30_01 !30_02 30_03
CLBLM_L.SLICEM_X0.AFFMUX.XOR origin:015-clb-nffmux !30_00 !30_01 !30_03 30_02
CLBLM_L.SLICEM_X0.ALUT.DI1MUX.AI origin:019-clb-ndi1mux 00_00
CLBLM_L.SLICEM_X0.ALUT.DI1MUX.BDI1_BMC31 origin:019-clb-ndi1mux !00_00
CLBLM_L.SLICEM_X0.ALUT.INIT[00] origin:010-clb-lutinit 34_15
@ -421,10 +421,10 @@ CLBLM_L.SLICEM_X0.ALUT.SMALL origin:018-clb-ram 00_04
CLBLM_L.SLICEM_X0.ALUT.SRL origin:018-clb-ram 30_16
CLBLM_L.SLICEM_X0.AOUTMUX.A5Q origin:016-clb-noutmux !30_06 !30_08 !30_11 30_07
CLBLM_L.SLICEM_X0.AOUTMUX.CY origin:016-clb-noutmux !30_07 !30_11 30_06 30_08
CLBLM_L.SLICEM_X0.AOUTMUX.XOR origin:016-clb-noutmux !30_06 !30_07 !30_11 30_08
CLBLM_L.SLICEM_X0.AOUTMUX.F7 origin:016-clb-noutmux !30_08 !30_11 30_06 30_07
CLBLM_L.SLICEM_X0.AOUTMUX.O5 origin:016-clb-noutmux !30_07 !30_08 30_06 30_11
CLBLM_L.SLICEM_X0.AOUTMUX.O6 origin:016-clb-noutmux !30_06 !30_07 !30_08 30_11
CLBLM_L.SLICEM_X0.AOUTMUX.XOR origin:016-clb-noutmux !30_06 !30_07 !30_11 30_08
CLBLM_L.SLICEM_X0.B5FF.ZINI origin:011-clb-ffconfig 31_22
CLBLM_L.SLICEM_X0.B5FF.ZRST origin:011-clb-ffconfig 01_19
CLBLM_L.SLICEM_X0.B5FFMUX.IN_A origin:012-clb-n5ffmux 30_19
@ -433,10 +433,10 @@ CLBLM_L.SLICEM_X0.BFF.ZINI origin:011-clb-ffconfig 31_28
CLBLM_L.SLICEM_X0.BFF.ZRST origin:011-clb-ffconfig 30_30
CLBLM_L.SLICEM_X0.BFFMUX.BX origin:015-clb-nffmux !30_24 !30_25 !30_27 30_26
CLBLM_L.SLICEM_X0.BFFMUX.CY origin:015-clb-nffmux !30_24 !30_26 30_25 30_27
CLBLM_L.SLICEM_X0.BFFMUX.XOR origin:015-clb-nffmux !30_24 !30_26 !30_27 30_25
CLBLM_L.SLICEM_X0.BFFMUX.F8 origin:015-clb-nffmux !30_24 !30_25 30_26 30_27
CLBLM_L.SLICEM_X0.BFFMUX.O5 origin:015-clb-nffmux !30_25 !30_26 30_24 30_27
CLBLM_L.SLICEM_X0.BFFMUX.O6 origin:015-clb-nffmux !30_25 !30_26 !30_27 30_24
CLBLM_L.SLICEM_X0.BFFMUX.XOR origin:015-clb-nffmux !30_24 !30_26 !30_27 30_25
CLBLM_L.SLICEM_X0.BLUT.DI1MUX.BI origin:019-clb-ndi1mux 00_20
CLBLM_L.SLICEM_X0.BLUT.DI1MUX.DI_CMC31 origin:019-clb-ndi1mux !00_20
CLBLM_L.SLICEM_X0.BLUT.INIT[00] origin:010-clb-lutinit 34_31
@ -508,27 +508,23 @@ CLBLM_L.SLICEM_X0.BLUT.SMALL origin:018-clb-ram 00_24
CLBLM_L.SLICEM_X0.BLUT.SRL origin:018-clb-ram 30_17
CLBLM_L.SLICEM_X0.BOUTMUX.B5Q origin:016-clb-noutmux !30_20 !30_21 !30_22 30_23
CLBLM_L.SLICEM_X0.BOUTMUX.CY origin:016-clb-noutmux !30_20 !30_23 30_21 30_22
CLBLM_L.SLICEM_X0.BOUTMUX.XOR origin:016-clb-noutmux !30_20 !30_22 !30_23 30_21
CLBLM_L.SLICEM_X0.BOUTMUX.F8 origin:016-clb-noutmux !30_20 !30_21 30_22 30_23
CLBLM_L.SLICEM_X0.BOUTMUX.O5 origin:016-clb-noutmux !30_21 !30_23 30_20 30_22
CLBLM_L.SLICEM_X0.BOUTMUX.O6 origin:016-clb-noutmux !30_21 !30_22 !30_23 30_20
CLBLM_L.SLICEM_X0.BOUTMUX.XOR origin:016-clb-noutmux !30_20 !30_22 !30_23 30_21
CLBLM_L.SLICEM_X0.C5FF.ZINI origin:011-clb-ffconfig 31_41
CLBLM_L.SLICEM_X0.C5FF.ZRST origin:011-clb-ffconfig 01_47
CLBLM_L.SLICEM_X0.C5FFMUX.IN_A origin:012-clb-n5ffmux 31_45
CLBLM_L.SLICEM_X0.C5FFMUX.IN_B origin:012-clb-n5ffmux 30_39
CLBLM_L.SLICEM_X0.CARRY4.ACY0 origin:013-clb-ncy0 30_15
CLBLM_L.SLICEM_X0.CARRY4.BCY0 origin:013-clb-ncy0 01_15
CLBLM_L.SLICEM_X0.CARRY4.CCY0 origin:013-clb-ncy0 30_48
CLBLM_L.SLICEM_X0.CARRY4.DCY0 origin:013-clb-ncy0 30_49
CLBLM_L.SLICEM_X0.CEUSEDMUX origin:014-clb-ffsrcemux 01_39
CLBLM_L.SLICEM_X0.CFF.ZINI origin:011-clb-ffconfig 31_33
CLBLM_L.SLICEM_X0.CFF.ZRST origin:011-clb-ffconfig 30_33
CLBLM_L.SLICEM_X0.CFFMUX.CX origin:015-clb-nffmux !30_35 !30_37 !30_38 30_36
CLBLM_L.SLICEM_X0.CFFMUX.CY origin:015-clb-nffmux !30_36 !30_38 30_35 30_37
CLBLM_L.SLICEM_X0.CFFMUX.XOR origin:015-clb-nffmux !30_35 !30_36 !30_38 30_37
CLBLM_L.SLICEM_X0.CFFMUX.F7 origin:015-clb-nffmux !30_37 !30_38 30_35 30_36
CLBLM_L.SLICEM_X0.CFFMUX.O5 origin:015-clb-nffmux !30_36 !30_37 30_35 30_38
CLBLM_L.SLICEM_X0.CFFMUX.O6 origin:015-clb-nffmux !30_35 !30_36 !30_37 30_38
CLBLM_L.SLICEM_X0.CFFMUX.XOR origin:015-clb-nffmux !30_35 !30_36 !30_38 30_37
CLBLM_L.SLICEM_X0.CLKINV origin:011-clb-ffconfig 01_51
CLBLM_L.SLICEM_X0.CLUT.DI1MUX.CI origin:019-clb-ndi1mux 01_43
CLBLM_L.SLICEM_X0.CLUT.DI1MUX.DI_DMC31 origin:019-clb-ndi1mux !01_43
@ -601,10 +597,10 @@ CLBLM_L.SLICEM_X0.CLUT.SMALL origin:018-clb-ram 00_28
CLBLM_L.SLICEM_X0.CLUT.SRL origin:018-clb-ram 30_46
CLBLM_L.SLICEM_X0.COUTMUX.C5Q origin:016-clb-noutmux !30_40 !30_44 !30_45 30_43
CLBLM_L.SLICEM_X0.COUTMUX.CY origin:016-clb-noutmux !30_43 !30_45 30_40 30_44
CLBLM_L.SLICEM_X0.COUTMUX.XOR origin:016-clb-noutmux !30_40 !30_43 !30_45 30_44
CLBLM_L.SLICEM_X0.COUTMUX.F7 origin:016-clb-noutmux !30_44 !30_45 30_40 30_43
CLBLM_L.SLICEM_X0.COUTMUX.O5 origin:016-clb-noutmux !30_43 !30_44 30_40 30_45
CLBLM_L.SLICEM_X0.COUTMUX.O6 origin:016-clb-noutmux !30_40 !30_43 !30_44 30_45
CLBLM_L.SLICEM_X0.COUTMUX.XOR origin:016-clb-noutmux !30_40 !30_43 !30_45 30_44
CLBLM_L.SLICEM_X0.D5FF.ZINI origin:011-clb-ffconfig 31_51
CLBLM_L.SLICEM_X0.D5FF.ZRST origin:011-clb-ffconfig 01_55
CLBLM_L.SLICEM_X0.D5FFMUX.IN_A origin:012-clb-n5ffmux 30_55
@ -613,10 +609,10 @@ CLBLM_L.SLICEM_X0.DFF.ZINI origin:011-clb-ffconfig 31_58
CLBLM_L.SLICEM_X0.DFF.ZRST origin:011-clb-ffconfig 30_50
CLBLM_L.SLICEM_X0.DFFMUX.CY origin:015-clb-nffmux !30_59 !30_61 30_60 30_62
CLBLM_L.SLICEM_X0.DFFMUX.DX origin:015-clb-nffmux !30_59 !30_60 !30_62 30_61
CLBLM_L.SLICEM_X0.DFFMUX.XOR origin:015-clb-nffmux !30_59 !30_61 !30_62 30_60
CLBLM_L.SLICEM_X0.DFFMUX.MC31 origin:015-clb-nffmux !30_59 !30_60 30_61 30_62
CLBLM_L.SLICEM_X0.DFFMUX.O5 origin:015-clb-nffmux !30_60 !30_61 30_59 30_62
CLBLM_L.SLICEM_X0.DFFMUX.O6 origin:015-clb-nffmux !30_60 !30_61 !30_62 30_59
CLBLM_L.SLICEM_X0.DFFMUX.XOR origin:015-clb-nffmux !30_59 !30_61 !30_62 30_60
CLBLM_L.SLICEM_X0.DLUT.INIT[00] origin:010-clb-lutinit 34_63
CLBLM_L.SLICEM_X0.DLUT.INIT[01] origin:010-clb-lutinit 35_63
CLBLM_L.SLICEM_X0.DLUT.INIT[02] origin:010-clb-lutinit 34_62
@ -686,18 +682,22 @@ CLBLM_L.SLICEM_X0.DLUT.SMALL origin:018-clb-ram 01_59
CLBLM_L.SLICEM_X0.DLUT.SRL origin:018-clb-ram 30_47
CLBLM_L.SLICEM_X0.DOUTMUX.CY origin:016-clb-noutmux !30_56 !30_57 30_51 30_52
CLBLM_L.SLICEM_X0.DOUTMUX.D5Q origin:016-clb-noutmux !30_51 !30_52 !30_56 30_57
CLBLM_L.SLICEM_X0.DOUTMUX.XOR origin:016-clb-noutmux !30_52 !30_56 !30_57 30_51
CLBLM_L.SLICEM_X0.DOUTMUX.MC31 origin:016-clb-noutmux !30_51 !30_56 30_10 30_52 30_57
CLBLM_L.SLICEM_X0.DOUTMUX.O5 origin:016-clb-noutmux !30_51 !30_57 30_52 30_56
CLBLM_L.SLICEM_X0.DOUTMUX.O6 origin:016-clb-noutmux !30_51 !30_52 !30_57 30_56
CLBLM_L.SLICEM_X0.DOUTMUX.XOR origin:016-clb-noutmux !30_52 !30_56 !30_57 30_51
CLBLM_L.SLICEM_X0.FFSYNC origin:011-clb-ffconfig 00_48
CLBLM_L.SLICEM_X0.LATCH origin:011-clb-ffconfig 30_32
CLBLM_L.SLICEM_X0.NOCLKINV origin:011-clb-ffconfig !01_51
CLBLM_L.SLICEM_X0.PRECYINIT.AX origin:017-clb-precyinit !00_12 !30_13 30_14
CLBLM_L.SLICEM_X0.PRECYINIT.CIN origin:017-clb-precyinit !00_12 !30_14 30_13
CLBLM_L.SLICEM_X0.PRECYINIT.C0 origin:017-clb-precyinit !00_12 !30_13 !30_14
CLBLM_L.SLICEM_X0.PRECYINIT.C1 origin:017-clb-precyinit !30_13 !30_14 00_12
CLBLM_L.SLICEM_X0.PRECYINIT.CIN origin:017-clb-precyinit !00_12 !30_14 30_13
CLBLM_L.SLICEM_X0.SRUSEDMUX origin:014-clb-ffsrcemux 01_35
CLBLM_L.SLICEM_X0.WA7USED origin:018-clb-ram 00_40
CLBLM_L.SLICEM_X0.WA8USED origin:018-clb-ram 01_27
CLBLM_L.SLICEM_X0.WEMUX.CE origin:018-clb-ram 01_23
CLBLM_L.SLICEM_X0.CARRY4.ACY0 origin:013-clb-ncy0 30_15
CLBLM_L.SLICEM_X0.CARRY4.BCY0 origin:013-clb-ncy0 01_15
CLBLM_L.SLICEM_X0.CARRY4.CCY0 origin:013-clb-ncy0 30_48
CLBLM_L.SLICEM_X0.CARRY4.DCY0 origin:013-clb-ncy0 30_49

52
artix7/segbits_clblm_r.origin_info.db
View File

@ -6,10 +6,10 @@ CLBLM_R.SLICEL_X1.AFF.ZINI origin:011-clb-ffconfig 31_04
CLBLM_R.SLICEL_X1.AFF.ZRST origin:011-clb-ffconfig 31_15
CLBLM_R.SLICEL_X1.AFFMUX.AX origin:015-clb-nffmux !30_04 !31_00 !31_02 31_01
CLBLM_R.SLICEL_X1.AFFMUX.CY origin:015-clb-nffmux !30_04 !31_01 31_00 31_02
CLBLM_R.SLICEL_X1.AFFMUX.XOR origin:015-clb-nffmux !30_04 !31_00 !31_01 31_02
CLBLM_R.SLICEL_X1.AFFMUX.F7 origin:015-clb-nffmux !30_04 !31_02 31_00 31_01
CLBLM_R.SLICEL_X1.AFFMUX.O5 origin:015-clb-nffmux !31_01 !31_02 30_04 31_00
CLBLM_R.SLICEL_X1.AFFMUX.O6 origin:015-clb-nffmux !31_00 !31_01 !31_02 30_04
CLBLM_R.SLICEL_X1.AFFMUX.XOR origin:015-clb-nffmux !30_04 !31_00 !31_01 31_02
CLBLM_R.SLICEL_X1.ALUT.INIT[00] origin:010-clb-lutinit 26_15
CLBLM_R.SLICEL_X1.ALUT.INIT[01] origin:010-clb-lutinit 27_15
CLBLM_R.SLICEL_X1.ALUT.INIT[02] origin:010-clb-lutinit 26_14
@ -76,10 +76,10 @@ CLBLM_R.SLICEL_X1.ALUT.INIT[62] origin:010-clb-lutinit 29_00
CLBLM_R.SLICEL_X1.ALUT.INIT[63] origin:010-clb-lutinit 28_00
CLBLM_R.SLICEL_X1.AOUTMUX.A5Q origin:016-clb-noutmux !31_07 !31_09 !31_10 30_05
CLBLM_R.SLICEL_X1.AOUTMUX.CY origin:016-clb-noutmux !30_05 !31_09 31_07 31_10
CLBLM_R.SLICEL_X1.AOUTMUX.XOR origin:016-clb-noutmux !30_05 !31_09 !31_10 31_07
CLBLM_R.SLICEL_X1.AOUTMUX.F7 origin:016-clb-noutmux !31_07 !31_09 30_05 31_10
CLBLM_R.SLICEL_X1.AOUTMUX.O5 origin:016-clb-noutmux !30_05 !31_07 31_09 31_10
CLBLM_R.SLICEL_X1.AOUTMUX.O6 origin:016-clb-noutmux !30_05 !31_07 !31_10 31_09
CLBLM_R.SLICEL_X1.AOUTMUX.XOR origin:016-clb-noutmux !30_05 !31_09 !31_10 31_07
CLBLM_R.SLICEL_X1.B5FF.ZINI origin:011-clb-ffconfig 31_23
CLBLM_R.SLICEL_X1.B5FF.ZRST origin:011-clb-ffconfig 00_16
CLBLM_R.SLICEL_X1.B5FFMUX.IN_A origin:012-clb-n5ffmux 31_19
@ -88,10 +88,10 @@ CLBLM_R.SLICEL_X1.BFF.ZINI origin:011-clb-ffconfig 31_29
CLBLM_R.SLICEL_X1.BFF.ZRST origin:011-clb-ffconfig 31_30
CLBLM_R.SLICEL_X1.BFFMUX.BX origin:015-clb-nffmux !31_24 !31_25 !31_26 31_27
CLBLM_R.SLICEL_X1.BFFMUX.CY origin:015-clb-nffmux !31_24 !31_27 31_25 31_26
CLBLM_R.SLICEL_X1.BFFMUX.XOR origin:015-clb-nffmux !31_24 !31_25 !31_27 31_26
CLBLM_R.SLICEL_X1.BFFMUX.F8 origin:015-clb-nffmux !31_24 !31_26 31_25 31_27
CLBLM_R.SLICEL_X1.BFFMUX.O5 origin:015-clb-nffmux !31_26 !31_27 31_24 31_25
CLBLM_R.SLICEL_X1.BFFMUX.O6 origin:015-clb-nffmux !31_25 !31_26 !31_27 31_24
CLBLM_R.SLICEL_X1.BFFMUX.XOR origin:015-clb-nffmux !31_24 !31_25 !31_27 31_26
CLBLM_R.SLICEL_X1.BLUT.INIT[00] origin:010-clb-lutinit 26_31
CLBLM_R.SLICEL_X1.BLUT.INIT[01] origin:010-clb-lutinit 27_31
CLBLM_R.SLICEL_X1.BLUT.INIT[02] origin:010-clb-lutinit 26_30
@ -158,27 +158,23 @@ CLBLM_R.SLICEL_X1.BLUT.INIT[62] origin:010-clb-lutinit 29_16
CLBLM_R.SLICEL_X1.BLUT.INIT[63] origin:010-clb-lutinit 28_16
CLBLM_R.SLICEL_X1.BOUTMUX.B5Q origin:016-clb-noutmux !30_28 !31_20 !31_21 30_29
CLBLM_R.SLICEL_X1.BOUTMUX.CY origin:016-clb-noutmux !30_29 !31_20 30_28 31_21
CLBLM_R.SLICEL_X1.BOUTMUX.XOR origin:016-clb-noutmux !30_29 !31_20 !31_21 30_28
CLBLM_R.SLICEL_X1.BOUTMUX.F8 origin:016-clb-noutmux !30_28 !31_20 30_29 31_21
CLBLM_R.SLICEL_X1.BOUTMUX.O5 origin:016-clb-noutmux !30_28 !30_29 31_20 31_21
CLBLM_R.SLICEL_X1.BOUTMUX.O6 origin:016-clb-noutmux !30_28 !30_29 !31_21 31_20
CLBLM_R.SLICEL_X1.BOUTMUX.XOR origin:016-clb-noutmux !30_29 !31_20 !31_21 30_28
CLBLM_R.SLICEL_X1.C5FF.ZINI origin:011-clb-ffconfig 31_42
CLBLM_R.SLICEL_X1.C5FF.ZRST origin:011-clb-ffconfig 00_44
CLBLM_R.SLICEL_X1.C5FFMUX.IN_A origin:012-clb-n5ffmux 31_44
CLBLM_R.SLICEL_X1.C5FFMUX.IN_B origin:012-clb-n5ffmux 31_39
CLBLM_R.SLICEL_X1.CARRY4.ACY0 origin:013-clb-ncy0 31_14
CLBLM_R.SLICEL_X1.CARRY4.BCY0 origin:013-clb-ncy0 00_08
CLBLM_R.SLICEL_X1.CARRY4.CCY0 origin:013-clb-ncy0 31_48
CLBLM_R.SLICEL_X1.CARRY4.DCY0 origin:013-clb-ncy0 31_49
CLBLM_R.SLICEL_X1.CEUSEDMUX origin:014-clb-ffsrcemux 00_36
CLBLM_R.SLICEL_X1.CFF.ZINI origin:011-clb-ffconfig 31_34
CLBLM_R.SLICEL_X1.CFF.ZRST origin:011-clb-ffconfig 30_34
CLBLM_R.SLICEL_X1.CFFMUX.CX origin:015-clb-nffmux !31_35 !31_36 !31_37 31_38
CLBLM_R.SLICEL_X1.CFFMUX.CY origin:015-clb-nffmux !31_36 !31_38 31_35 31_37
CLBLM_R.SLICEL_X1.CFFMUX.XOR origin:015-clb-nffmux !31_35 !31_36 !31_38 31_37
CLBLM_R.SLICEL_X1.CFFMUX.F7 origin:015-clb-nffmux !31_36 !31_37 31_35 31_38
CLBLM_R.SLICEL_X1.CFFMUX.O5 origin:015-clb-nffmux !31_37 !31_38 31_35 31_36
CLBLM_R.SLICEL_X1.CFFMUX.O6 origin:015-clb-nffmux !31_35 !31_37 !31_38 31_36
CLBLM_R.SLICEL_X1.CFFMUX.XOR origin:015-clb-nffmux !31_35 !31_36 !31_38 31_37
CLBLM_R.SLICEL_X1.CLKINV origin:011-clb-ffconfig 00_52
CLBLM_R.SLICEL_X1.CLUT.INIT[00] origin:010-clb-lutinit 26_47
CLBLM_R.SLICEL_X1.CLUT.INIT[01] origin:010-clb-lutinit 27_47
@ -246,10 +242,10 @@ CLBLM_R.SLICEL_X1.CLUT.INIT[62] origin:010-clb-lutinit 29_32
CLBLM_R.SLICEL_X1.CLUT.INIT[63] origin:010-clb-lutinit 28_32
CLBLM_R.SLICEL_X1.COUTMUX.C5Q origin:016-clb-noutmux !30_42 !31_40 !31_43 30_41
CLBLM_R.SLICEL_X1.COUTMUX.CY origin:016-clb-noutmux !30_41 !31_43 30_42 31_40
CLBLM_R.SLICEL_X1.COUTMUX.XOR origin:016-clb-noutmux !30_41 !31_40 !31_43 30_42
CLBLM_R.SLICEL_X1.COUTMUX.F7 origin:016-clb-noutmux !30_42 !31_43 30_41 31_40
CLBLM_R.SLICEL_X1.COUTMUX.O5 origin:016-clb-noutmux !30_41 !30_42 31_40 31_43
CLBLM_R.SLICEL_X1.COUTMUX.O6 origin:016-clb-noutmux !30_41 !30_42 !31_40 31_43
CLBLM_R.SLICEL_X1.COUTMUX.XOR origin:016-clb-noutmux !30_41 !31_40 !31_43 30_42
CLBLM_R.SLICEL_X1.D5FF.ZINI origin:011-clb-ffconfig 31_52
CLBLM_R.SLICEL_X1.D5FF.ZRST origin:011-clb-ffconfig 00_56
CLBLM_R.SLICEL_X1.D5FFMUX.IN_A origin:012-clb-n5ffmux 31_55
@ -258,9 +254,9 @@ CLBLM_R.SLICEL_X1.DFF.ZINI origin:011-clb-ffconfig 31_59
CLBLM_R.SLICEL_X1.DFF.ZRST origin:011-clb-ffconfig 31_50
CLBLM_R.SLICEL_X1.DFFMUX.CY origin:015-clb-nffmux !31_60 !31_61 30_58 31_62
CLBLM_R.SLICEL_X1.DFFMUX.DX origin:015-clb-nffmux !30_58 !31_60 !31_62 31_61
CLBLM_R.SLICEL_X1.DFFMUX.XOR origin:015-clb-nffmux !30_58 !31_60 !31_61 31_62
CLBLM_R.SLICEL_X1.DFFMUX.O5 origin:015-clb-nffmux !31_61 !31_62 30_58 31_60
CLBLM_R.SLICEL_X1.DFFMUX.O6 origin:015-clb-nffmux !30_58 !31_61 !31_62 31_60
CLBLM_R.SLICEL_X1.DFFMUX.XOR origin:015-clb-nffmux !30_58 !31_60 !31_61 31_62
CLBLM_R.SLICEL_X1.DLUT.INIT[00] origin:010-clb-lutinit 26_63
CLBLM_R.SLICEL_X1.DLUT.INIT[01] origin:010-clb-lutinit 27_63
CLBLM_R.SLICEL_X1.DLUT.INIT[02] origin:010-clb-lutinit 26_62
@ -327,17 +323,21 @@ CLBLM_R.SLICEL_X1.DLUT.INIT[62] origin:010-clb-lutinit 29_48
CLBLM_R.SLICEL_X1.DLUT.INIT[63] origin:010-clb-lutinit 28_48
CLBLM_R.SLICEL_X1.DOUTMUX.CY origin:016-clb-noutmux !31_53 !31_56 30_53 31_57
CLBLM_R.SLICEL_X1.DOUTMUX.D5Q origin:016-clb-noutmux !30_53 !31_56 !31_57 31_53
CLBLM_R.SLICEL_X1.DOUTMUX.XOR origin:016-clb-noutmux !31_53 !31_56 !31_57 30_53
CLBLM_R.SLICEL_X1.DOUTMUX.O5 origin:016-clb-noutmux !30_53 !31_53 31_56 31_57
CLBLM_R.SLICEL_X1.DOUTMUX.O6 origin:016-clb-noutmux !30_53 !31_53 !31_57 31_56
CLBLM_R.SLICEL_X1.DOUTMUX.XOR origin:016-clb-noutmux !31_53 !31_56 !31_57 30_53
CLBLM_R.SLICEL_X1.FFSYNC origin:011-clb-ffconfig 01_31
CLBLM_R.SLICEL_X1.LATCH origin:011-clb-ffconfig 31_32
CLBLM_R.SLICEL_X1.NOCLKINV origin:011-clb-ffconfig !00_52
CLBLM_R.SLICEL_X1.PRECYINIT.AX origin:017-clb-precyinit !01_11 !31_12 31_13
CLBLM_R.SLICEL_X1.PRECYINIT.CIN origin:017-clb-precyinit !01_11 !31_13 31_12
CLBLM_R.SLICEL_X1.PRECYINIT.C0 origin:017-clb-precyinit !01_11 !31_12 !31_13
CLBLM_R.SLICEL_X1.PRECYINIT.C1 origin:017-clb-precyinit !31_12 !31_13 01_11
CLBLM_R.SLICEL_X1.PRECYINIT.CIN origin:017-clb-precyinit !01_11 !31_13 31_12
CLBLM_R.SLICEL_X1.SRUSEDMUX origin:014-clb-ffsrcemux 00_32
CLBLM_R.SLICEL_X1.CARRY4.ACY0 origin:013-clb-ncy0 31_14
CLBLM_R.SLICEL_X1.CARRY4.BCY0 origin:013-clb-ncy0 00_08
CLBLM_R.SLICEL_X1.CARRY4.CCY0 origin:013-clb-ncy0 31_48
CLBLM_R.SLICEL_X1.CARRY4.DCY0 origin:013-clb-ncy0 31_49
CLBLM_R.SLICEM_X0.A5FF.ZINI origin:011-clb-ffconfig 31_06
CLBLM_R.SLICEM_X0.A5FF.ZRST origin:011-clb-ffconfig 01_07
CLBLM_R.SLICEM_X0.A5FFMUX.IN_A origin:012-clb-n5ffmux 30_09
@ -346,10 +346,10 @@ CLBLM_R.SLICEM_X0.AFF.ZINI origin:011-clb-ffconfig 31_03
CLBLM_R.SLICEM_X0.AFF.ZRST origin:011-clb-ffconfig 30_12
CLBLM_R.SLICEM_X0.AFFMUX.AX origin:015-clb-nffmux !30_00 !30_02 !30_03 30_01
CLBLM_R.SLICEM_X0.AFFMUX.CY origin:015-clb-nffmux !30_01 !30_03 30_00 30_02
CLBLM_R.SLICEM_X0.AFFMUX.XOR origin:015-clb-nffmux !30_00 !30_01 !30_03 30_02
CLBLM_R.SLICEM_X0.AFFMUX.F7 origin:015-clb-nffmux !30_02 !30_03 30_00 30_01
CLBLM_R.SLICEM_X0.AFFMUX.O5 origin:015-clb-nffmux !30_01 !30_02 30_00 30_03
CLBLM_R.SLICEM_X0.AFFMUX.O6 origin:015-clb-nffmux !30_00 !30_01 !30_02 30_03
CLBLM_R.SLICEM_X0.AFFMUX.XOR origin:015-clb-nffmux !30_00 !30_01 !30_03 30_02
CLBLM_R.SLICEM_X0.ALUT.DI1MUX.AI origin:019-clb-ndi1mux 00_00
CLBLM_R.SLICEM_X0.ALUT.DI1MUX.BDI1_BMC31 origin:019-clb-ndi1mux !00_00
CLBLM_R.SLICEM_X0.ALUT.INIT[00] origin:010-clb-lutinit 34_15
@ -421,10 +421,10 @@ CLBLM_R.SLICEM_X0.ALUT.SMALL origin:018-clb-ram 00_04
CLBLM_R.SLICEM_X0.ALUT.SRL origin:018-clb-ram 30_16
CLBLM_R.SLICEM_X0.AOUTMUX.A5Q origin:016-clb-noutmux !30_06 !30_08 !30_11 30_07
CLBLM_R.SLICEM_X0.AOUTMUX.CY origin:016-clb-noutmux !30_07 !30_11 30_06 30_08
CLBLM_R.SLICEM_X0.AOUTMUX.XOR origin:016-clb-noutmux !30_06 !30_07 !30_11 30_08
CLBLM_R.SLICEM_X0.AOUTMUX.F7 origin:016-clb-noutmux !30_08 !30_11 30_06 30_07
CLBLM_R.SLICEM_X0.AOUTMUX.O5 origin:016-clb-noutmux !30_07 !30_08 30_06 30_11
CLBLM_R.SLICEM_X0.AOUTMUX.O6 origin:016-clb-noutmux !30_06 !30_07 !30_08 30_11
CLBLM_R.SLICEM_X0.AOUTMUX.XOR origin:016-clb-noutmux !30_06 !30_07 !30_11 30_08
CLBLM_R.SLICEM_X0.B5FF.ZINI origin:011-clb-ffconfig 31_22
CLBLM_R.SLICEM_X0.B5FF.ZRST origin:011-clb-ffconfig 01_19
CLBLM_R.SLICEM_X0.B5FFMUX.IN_A origin:012-clb-n5ffmux 30_19
@ -433,10 +433,10 @@ CLBLM_R.SLICEM_X0.BFF.ZINI origin:011-clb-ffconfig 31_28
CLBLM_R.SLICEM_X0.BFF.ZRST origin:011-clb-ffconfig 30_30
CLBLM_R.SLICEM_X0.BFFMUX.BX origin:015-clb-nffmux !30_24 !30_25 !30_27 30_26
CLBLM_R.SLICEM_X0.BFFMUX.CY origin:015-clb-nffmux !30_24 !30_26 30_25 30_27
CLBLM_R.SLICEM_X0.BFFMUX.XOR origin:015-clb-nffmux !30_24 !30_26 !30_27 30_25
CLBLM_R.SLICEM_X0.BFFMUX.F8 origin:015-clb-nffmux !30_24 !30_25 30_26 30_27
CLBLM_R.SLICEM_X0.BFFMUX.O5 origin:015-clb-nffmux !30_25 !30_26 30_24 30_27
CLBLM_R.SLICEM_X0.BFFMUX.O6 origin:015-clb-nffmux !30_25 !30_26 !30_27 30_24
CLBLM_R.SLICEM_X0.BFFMUX.XOR origin:015-clb-nffmux !30_24 !30_26 !30_27 30_25
CLBLM_R.SLICEM_X0.BLUT.DI1MUX.BI origin:019-clb-ndi1mux 00_20
CLBLM_R.SLICEM_X0.BLUT.DI1MUX.DI_CMC31 origin:019-clb-ndi1mux !00_20
CLBLM_R.SLICEM_X0.BLUT.INIT[00] origin:010-clb-lutinit 34_31
@ -508,27 +508,23 @@ CLBLM_R.SLICEM_X0.BLUT.SMALL origin:018-clb-ram 00_24
CLBLM_R.SLICEM_X0.BLUT.SRL origin:018-clb-ram 30_17
CLBLM_R.SLICEM_X0.BOUTMUX.B5Q origin:016-clb-noutmux !30_20 !30_21 !30_22 30_23
CLBLM_R.SLICEM_X0.BOUTMUX.CY origin:016-clb-noutmux !30_20 !30_23 30_21 30_22
CLBLM_R.SLICEM_X0.BOUTMUX.XOR origin:016-clb-noutmux !30_20 !30_22 !30_23 30_21
CLBLM_R.SLICEM_X0.BOUTMUX.F8 origin:016-clb-noutmux !30_20 !30_21 30_22 30_23
CLBLM_R.SLICEM_X0.BOUTMUX.O5 origin:016-clb-noutmux !30_21 !30_23 30_20 30_22
CLBLM_R.SLICEM_X0.BOUTMUX.O6 origin:016-clb-noutmux !30_21 !30_22 !30_23 30_20
CLBLM_R.SLICEM_X0.BOUTMUX.XOR origin:016-clb-noutmux !30_20 !30_22 !30_23 30_21
CLBLM_R.SLICEM_X0.C5FF.ZINI origin:011-clb-ffconfig 31_41
CLBLM_R.SLICEM_X0.C5FF.ZRST origin:011-clb-ffconfig 01_47
CLBLM_R.SLICEM_X0.C5FFMUX.IN_A origin:012-clb-n5ffmux 31_45
CLBLM_R.SLICEM_X0.C5FFMUX.IN_B origin:012-clb-n5ffmux 30_39
CLBLM_R.SLICEM_X0.CARRY4.ACY0 origin:013-clb-ncy0 30_15
CLBLM_R.SLICEM_X0.CARRY4.BCY0 origin:013-clb-ncy0 01_15
CLBLM_R.SLICEM_X0.CARRY4.CCY0 origin:013-clb-ncy0 30_48
CLBLM_R.SLICEM_X0.CARRY4.DCY0 origin:013-clb-ncy0 30_49
CLBLM_R.SLICEM_X0.CEUSEDMUX origin:014-clb-ffsrcemux 01_39
CLBLM_R.SLICEM_X0.CFF.ZINI origin:011-clb-ffconfig 31_33
CLBLM_R.SLICEM_X0.CFF.ZRST origin:011-clb-ffconfig 30_33
CLBLM_R.SLICEM_X0.CFFMUX.CX origin:015-clb-nffmux !30_35 !30_37 !30_38 30_36
CLBLM_R.SLICEM_X0.CFFMUX.CY origin:015-clb-nffmux !30_36 !30_38 30_35 30_37
CLBLM_R.SLICEM_X0.CFFMUX.XOR origin:015-clb-nffmux !30_35 !30_36 !30_38 30_37
CLBLM_R.SLICEM_X0.CFFMUX.F7 origin:015-clb-nffmux !30_37 !30_38 30_35 30_36
CLBLM_R.SLICEM_X0.CFFMUX.O5 origin:015-clb-nffmux !30_36 !30_37 30_35 30_38
CLBLM_R.SLICEM_X0.CFFMUX.O6 origin:015-clb-nffmux !30_35 !30_36 !30_37 30_38
CLBLM_R.SLICEM_X0.CFFMUX.XOR origin:015-clb-nffmux !30_35 !30_36 !30_38 30_37
CLBLM_R.SLICEM_X0.CLKINV origin:011-clb-ffconfig 01_51
CLBLM_R.SLICEM_X0.CLUT.DI1MUX.CI origin:019-clb-ndi1mux 01_43
CLBLM_R.SLICEM_X0.CLUT.DI1MUX.DI_DMC31 origin:019-clb-ndi1mux !01_43
@ -601,10 +597,10 @@ CLBLM_R.SLICEM_X0.CLUT.SMALL origin:018-clb-ram 00_28
CLBLM_R.SLICEM_X0.CLUT.SRL origin:018-clb-ram 30_46
CLBLM_R.SLICEM_X0.COUTMUX.C5Q origin:016-clb-noutmux !30_40 !30_44 !30_45 30_43
CLBLM_R.SLICEM_X0.COUTMUX.CY origin:016-clb-noutmux !30_43 !30_45 30_40 30_44
CLBLM_R.SLICEM_X0.COUTMUX.XOR origin:016-clb-noutmux !30_40 !30_43 !30_45 30_44
CLBLM_R.SLICEM_X0.COUTMUX.F7 origin:016-clb-noutmux !30_44 !30_45 30_40 30_43
CLBLM_R.SLICEM_X0.COUTMUX.O5 origin:016-clb-noutmux !30_43 !30_44 30_40 30_45
CLBLM_R.SLICEM_X0.COUTMUX.O6 origin:016-clb-noutmux !30_40 !30_43 !30_44 30_45
CLBLM_R.SLICEM_X0.COUTMUX.XOR origin:016-clb-noutmux !30_40 !30_43 !30_45 30_44
CLBLM_R.SLICEM_X0.D5FF.ZINI origin:011-clb-ffconfig 31_51
CLBLM_R.SLICEM_X0.D5FF.ZRST origin:011-clb-ffconfig 01_55
CLBLM_R.SLICEM_X0.D5FFMUX.IN_A origin:012-clb-n5ffmux 30_55
@ -613,10 +609,10 @@ CLBLM_R.SLICEM_X0.DFF.ZINI origin:011-clb-ffconfig 31_58
CLBLM_R.SLICEM_X0.DFF.ZRST origin:011-clb-ffconfig 30_50
CLBLM_R.SLICEM_X0.DFFMUX.CY origin:015-clb-nffmux !30_59 !30_61 30_60 30_62
CLBLM_R.SLICEM_X0.DFFMUX.DX origin:015-clb-nffmux !30_59 !30_60 !30_62 30_61
CLBLM_R.SLICEM_X0.DFFMUX.XOR origin:015-clb-nffmux !30_59 !30_61 !30_62 30_60
CLBLM_R.SLICEM_X0.DFFMUX.MC31 origin:015-clb-nffmux !30_59 !30_60 30_61 30_62
CLBLM_R.SLICEM_X0.DFFMUX.O5 origin:015-clb-nffmux !30_60 !30_61 30_59 30_62
CLBLM_R.SLICEM_X0.DFFMUX.O6 origin:015-clb-nffmux !30_60 !30_61 !30_62 30_59
CLBLM_R.SLICEM_X0.DFFMUX.XOR origin:015-clb-nffmux !30_59 !30_61 !30_62 30_60
CLBLM_R.SLICEM_X0.DLUT.INIT[00] origin:010-clb-lutinit 34_63
CLBLM_R.SLICEM_X0.DLUT.INIT[01] origin:010-clb-lutinit 35_63
CLBLM_R.SLICEM_X0.DLUT.INIT[02] origin:010-clb-lutinit 34_62
@ -686,18 +682,22 @@ CLBLM_R.SLICEM_X0.DLUT.SMALL origin:018-clb-ram 01_59
CLBLM_R.SLICEM_X0.DLUT.SRL origin:018-clb-ram 30_47
CLBLM_R.SLICEM_X0.DOUTMUX.CY origin:016-clb-noutmux !30_56 !30_57 30_51 30_52
CLBLM_R.SLICEM_X0.DOUTMUX.D5Q origin:016-clb-noutmux !30_51 !30_52 !30_56 30_57
CLBLM_R.SLICEM_X0.DOUTMUX.XOR origin:016-clb-noutmux !30_52 !30_56 !30_57 30_51
CLBLM_R.SLICEM_X0.DOUTMUX.MC31 origin:016-clb-noutmux !30_51 !30_56 30_10 30_52 30_57
CLBLM_R.SLICEM_X0.DOUTMUX.O5 origin:016-clb-noutmux !30_51 !30_57 30_52 30_56
CLBLM_R.SLICEM_X0.DOUTMUX.O6 origin:016-clb-noutmux !30_51 !30_52 !30_57 30_56
CLBLM_R.SLICEM_X0.DOUTMUX.XOR origin:016-clb-noutmux !30_52 !30_56 !30_57 30_51
CLBLM_R.SLICEM_X0.FFSYNC origin:011-clb-ffconfig 00_48
CLBLM_R.SLICEM_X0.LATCH origin:011-clb-ffconfig 30_32
CLBLM_R.SLICEM_X0.NOCLKINV origin:011-clb-ffconfig !01_51
CLBLM_R.SLICEM_X0.PRECYINIT.AX origin:017-clb-precyinit !00_12 !30_13 30_14
CLBLM_R.SLICEM_X0.PRECYINIT.CIN origin:017-clb-precyinit !00_12 !30_14 30_13
CLBLM_R.SLICEM_X0.PRECYINIT.C0 origin:017-clb-precyinit !00_12 !30_13 !30_14
CLBLM_R.SLICEM_X0.PRECYINIT.C1 origin:017-clb-precyinit !30_13 !30_14 00_12
CLBLM_R.SLICEM_X0.PRECYINIT.CIN origin:017-clb-precyinit !00_12 !30_14 30_13
CLBLM_R.SLICEM_X0.SRUSEDMUX origin:014-clb-ffsrcemux 01_35
CLBLM_R.SLICEM_X0.WA7USED origin:018-clb-ram 00_40
CLBLM_R.SLICEM_X0.WA8USED origin:018-clb-ram 01_27
CLBLM_R.SLICEM_X0.WEMUX.CE origin:018-clb-ram 01_23
CLBLM_R.SLICEM_X0.CARRY4.ACY0 origin:013-clb-ncy0 30_15
CLBLM_R.SLICEM_X0.CARRY4.BCY0 origin:013-clb-ncy0 01_15
CLBLM_R.SLICEM_X0.CARRY4.CCY0 origin:013-clb-ncy0 30_48
CLBLM_R.SLICEM_X0.CARRY4.DCY0 origin:013-clb-ncy0 30_49

472
artix7/segbits_clk_bufg_bot_r.origin_info.db
View File

@ -1,5 +1,5 @@
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y0.INIT_OUT origin:042-clk-bufg-config 27_13
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y0.IN_USE origin:042-clk-bufg-config 27_00 27_15
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y0.INIT_OUT origin:042-clk-bufg-config 27_13
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y0.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_01
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y0.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_12
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y0.PRESELECT_I1 origin:042-clk-bufg-config 26_12
@ -8,8 +8,8 @@ CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y0.ZINV_CE1 origin:042-clk-bufg-config 27_11
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y0.ZINV_S0 origin:042-clk-bufg-config 27_03
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y0.ZINV_S1 origin:042-clk-bufg-config 26_11
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y0.ZPRESELECT_I0 origin:042-clk-bufg-config 26_02
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y1.INIT_OUT origin:042-clk-bufg-config 27_29
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y1.IN_USE origin:042-clk-bufg-config 27_16 27_31
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y1.INIT_OUT origin:042-clk-bufg-config 27_29
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y1.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_17
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y1.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_28
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y1.PRESELECT_I1 origin:042-clk-bufg-config 26_28
@ -18,68 +18,8 @@ CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y1.ZINV_CE1 origin:042-clk-bufg-config 27_27
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y1.ZINV_S0 origin:042-clk-bufg-config 27_19
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y1.ZINV_S1 origin:042-clk-bufg-config 26_27
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y1.ZPRESELECT_I0 origin:042-clk-bufg-config 26_18
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y10.INIT_OUT origin:042-clk-bufg-config 27_173
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y10.IN_USE origin:042-clk-bufg-config 27_160 27_175
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y10.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_161
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y10.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_172
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y10.PRESELECT_I1 origin:042-clk-bufg-config 26_172
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y10.ZINV_CE0 origin:042-clk-bufg-config 27_162
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y10.ZINV_CE1 origin:042-clk-bufg-config 27_171
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y10.ZINV_S0 origin:042-clk-bufg-config 27_163
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y10.ZINV_S1 origin:042-clk-bufg-config 26_171
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y10.ZPRESELECT_I0 origin:042-clk-bufg-config 26_162
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y11.INIT_OUT origin:042-clk-bufg-config 27_189
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y11.IN_USE origin:042-clk-bufg-config 27_176 27_191
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y11.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_177
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y11.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_188
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y11.PRESELECT_I1 origin:042-clk-bufg-config 26_188
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y11.ZINV_CE0 origin:042-clk-bufg-config 27_178
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y11.ZINV_CE1 origin:042-clk-bufg-config 27_187
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y11.ZINV_S0 origin:042-clk-bufg-config 27_179
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y11.ZINV_S1 origin:042-clk-bufg-config 26_187
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y11.ZPRESELECT_I0 origin:042-clk-bufg-config 26_178
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y12.INIT_OUT origin:042-clk-bufg-config 27_205
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y12.IN_USE origin:042-clk-bufg-config 27_192 27_207
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y12.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_193
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y12.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_204
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y12.PRESELECT_I1 origin:042-clk-bufg-config 26_204
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y12.ZINV_CE0 origin:042-clk-bufg-config 27_194
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y12.ZINV_CE1 origin:042-clk-bufg-config 27_203
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y12.ZINV_S0 origin:042-clk-bufg-config 27_195
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y12.ZINV_S1 origin:042-clk-bufg-config 26_203
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y12.ZPRESELECT_I0 origin:042-clk-bufg-config 26_194
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y13.INIT_OUT origin:042-clk-bufg-config 27_221
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y13.IN_USE origin:042-clk-bufg-config 27_208 27_223
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y13.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_209
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y13.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_220
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y13.PRESELECT_I1 origin:042-clk-bufg-config 26_220
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y13.ZINV_CE0 origin:042-clk-bufg-config 27_210
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y13.ZINV_CE1 origin:042-clk-bufg-config 27_219
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y13.ZINV_S0 origin:042-clk-bufg-config 27_211
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y13.ZINV_S1 origin:042-clk-bufg-config 26_219
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y13.ZPRESELECT_I0 origin:042-clk-bufg-config 26_210
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y14.INIT_OUT origin:042-clk-bufg-config 27_237
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y14.IN_USE origin:042-clk-bufg-config 27_224 27_239
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y14.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_225
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y14.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_236
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y14.PRESELECT_I1 origin:042-clk-bufg-config 26_236
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y14.ZINV_CE0 origin:042-clk-bufg-config 27_226
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y14.ZINV_CE1 origin:042-clk-bufg-config 27_235
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y14.ZINV_S0 origin:042-clk-bufg-config 27_227
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y14.ZINV_S1 origin:042-clk-bufg-config 26_235
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y14.ZPRESELECT_I0 origin:042-clk-bufg-config 26_226
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y15.INIT_OUT origin:042-clk-bufg-config 27_253
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y15.IN_USE origin:042-clk-bufg-config 27_240 27_255
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y15.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_241
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y15.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_252
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y15.PRESELECT_I1 origin:042-clk-bufg-config 26_252
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y15.ZINV_CE0 origin:042-clk-bufg-config 27_242
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y15.ZINV_CE1 origin:042-clk-bufg-config 27_251
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y15.ZINV_S0 origin:042-clk-bufg-config 27_243
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y15.ZINV_S1 origin:042-clk-bufg-config 26_251
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y15.ZPRESELECT_I0 origin:042-clk-bufg-config 26_242
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y2.INIT_OUT origin:042-clk-bufg-config 27_45
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y2.IN_USE origin:042-clk-bufg-config 27_32 27_47
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y2.INIT_OUT origin:042-clk-bufg-config 27_45
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y2.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_33
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y2.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_44
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y2.PRESELECT_I1 origin:042-clk-bufg-config 26_44
@ -88,8 +28,8 @@ CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y2.ZINV_CE1 origin:042-clk-bufg-config 27_43
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y2.ZINV_S0 origin:042-clk-bufg-config 27_35
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y2.ZINV_S1 origin:042-clk-bufg-config 26_43
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y2.ZPRESELECT_I0 origin:042-clk-bufg-config 26_34
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y3.INIT_OUT origin:042-clk-bufg-config 27_61
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y3.IN_USE origin:042-clk-bufg-config 27_48 27_63
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y3.INIT_OUT origin:042-clk-bufg-config 27_61
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y3.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_49
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y3.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_60
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y3.PRESELECT_I1 origin:042-clk-bufg-config 26_60
@ -98,8 +38,8 @@ CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y3.ZINV_CE1 origin:042-clk-bufg-config 27_59
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y3.ZINV_S0 origin:042-clk-bufg-config 27_51
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y3.ZINV_S1 origin:042-clk-bufg-config 26_59
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y3.ZPRESELECT_I0 origin:042-clk-bufg-config 26_50
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y4.INIT_OUT origin:042-clk-bufg-config 27_77
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y4.IN_USE origin:042-clk-bufg-config 27_64 27_79
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y4.INIT_OUT origin:042-clk-bufg-config 27_77
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y4.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_65
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y4.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_76
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y4.PRESELECT_I1 origin:042-clk-bufg-config 26_76
@ -108,8 +48,8 @@ CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y4.ZINV_CE1 origin:042-clk-bufg-config 27_75
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y4.ZINV_S0 origin:042-clk-bufg-config 27_67
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y4.ZINV_S1 origin:042-clk-bufg-config 26_75
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y4.ZPRESELECT_I0 origin:042-clk-bufg-config 26_66
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y5.INIT_OUT origin:042-clk-bufg-config 27_93
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y5.IN_USE origin:042-clk-bufg-config 27_80 27_95
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y5.INIT_OUT origin:042-clk-bufg-config 27_93
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y5.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_81
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y5.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_92
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y5.PRESELECT_I1 origin:042-clk-bufg-config 26_92
@ -118,8 +58,8 @@ CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y5.ZINV_CE1 origin:042-clk-bufg-config 27_91
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y5.ZINV_S0 origin:042-clk-bufg-config 27_83
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y5.ZINV_S1 origin:042-clk-bufg-config 26_91
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y5.ZPRESELECT_I0 origin:042-clk-bufg-config 26_82
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y6.INIT_OUT origin:042-clk-bufg-config 27_109
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y6.IN_USE origin:042-clk-bufg-config 27_111 27_96
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y6.INIT_OUT origin:042-clk-bufg-config 27_109
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y6.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_97
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y6.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_108
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y6.PRESELECT_I1 origin:042-clk-bufg-config 26_108
@ -128,8 +68,8 @@ CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y6.ZINV_CE1 origin:042-clk-bufg-config 27_107
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y6.ZINV_S0 origin:042-clk-bufg-config 27_99
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y6.ZINV_S1 origin:042-clk-bufg-config 26_107
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y6.ZPRESELECT_I0 origin:042-clk-bufg-config 26_98
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y7.INIT_OUT origin:042-clk-bufg-config 27_125
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y7.IN_USE origin:042-clk-bufg-config 27_112 27_127
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y7.INIT_OUT origin:042-clk-bufg-config 27_125
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y7.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_113
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y7.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_124
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y7.PRESELECT_I1 origin:042-clk-bufg-config 26_124
@ -138,8 +78,8 @@ CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y7.ZINV_CE1 origin:042-clk-bufg-config 27_123
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y7.ZINV_S0 origin:042-clk-bufg-config 27_115
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y7.ZINV_S1 origin:042-clk-bufg-config 26_123
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y7.ZPRESELECT_I0 origin:042-clk-bufg-config 26_114
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y8.INIT_OUT origin:042-clk-bufg-config 27_141
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y8.IN_USE origin:042-clk-bufg-config 27_128 27_143
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y8.INIT_OUT origin:042-clk-bufg-config 27_141
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y8.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_129
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y8.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_140
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y8.PRESELECT_I1 origin:042-clk-bufg-config 26_140
@ -148,8 +88,8 @@ CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y8.ZINV_CE1 origin:042-clk-bufg-config 27_139
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y8.ZINV_S0 origin:042-clk-bufg-config 27_131
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y8.ZINV_S1 origin:042-clk-bufg-config 26_139
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y8.ZPRESELECT_I0 origin:042-clk-bufg-config 26_130
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y9.INIT_OUT origin:042-clk-bufg-config 27_157
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y9.IN_USE origin:042-clk-bufg-config 27_144 27_159
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y9.INIT_OUT origin:042-clk-bufg-config 27_157
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y9.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_145
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y9.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_156
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y9.PRESELECT_I1 origin:042-clk-bufg-config 26_156
@ -158,174 +98,68 @@ CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y9.ZINV_CE1 origin:042-clk-bufg-config 27_155
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y9.ZINV_S0 origin:042-clk-bufg-config 27_147
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y9.ZINV_S1 origin:042-clk-bufg-config 26_155
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y9.ZPRESELECT_I0 origin:042-clk-bufg-config 26_146
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL0_I0.CLK_BUFG_BOT_R_CK_MUXED0 origin:046-clk-bufg-muxed-pips !26_07 !27_06 26_08
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL0_I0.CLK_BUFG_IMUX24_0 origin:044-clk-bufg-pips !26_07 !26_08 27_06
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL0_I0.CLK_BUFG_IMUX28_0 origin:044-clk-bufg-pips !26_07 !26_08 !27_06
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL0_I0.CLK_BUFG_R_FBG_OUT1 origin:044-clk-bufg-pips !26_08 26_07 27_06
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL0_I0.CLK_BUFG_R_FBG_OUT15 origin:044-clk-bufg-pips !26_08 !27_06 26_07
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL0_I1.CLK_BUFG_BOT_R_CK_MUXED1 origin:046-clk-bufg-muxed-pips !26_05 !27_05 26_04
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL0_I1.CLK_BUFG_IMUX24_0 origin:044-clk-bufg-pips !26_04 !27_05 26_05
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL0_I1.CLK_BUFG_IMUX28_0 origin:044-clk-bufg-pips !26_04 !26_05 !27_05
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL0_I1.CLK_BUFG_R_FBG_OUT1 origin:044-clk-bufg-pips !26_04 26_05 27_05
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL0_I1.CLK_BUFG_R_FBG_OUT15 origin:044-clk-bufg-pips !26_04 !26_05 27_05
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_BOT_R_CK_MUXED20 origin:046-clk-bufg-muxed-pips !26_167 !27_166 26_168
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_IMUX26_2 origin:044-clk-bufg-pips !26_167 !26_168 27_166
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_IMUX30_2 origin:044-clk-bufg-pips !26_167 !26_168 !27_166
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_R_FBG_OUT11 origin:044-clk-bufg-pips !26_168 26_167 27_166
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_R_FBG_OUT9 origin:044-clk-bufg-pips !26_168 !27_166 26_167
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_BOT_R_CK_MUXED21 origin:046-clk-bufg-muxed-pips !26_165 !27_165 26_164
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_IMUX26_2 origin:044-clk-bufg-pips !26_164 !27_165 26_165
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_IMUX30_2 origin:044-clk-bufg-pips !26_164 !26_165 !27_165
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_R_FBG_OUT11 origin:044-clk-bufg-pips !26_164 26_165 27_165
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_R_FBG_OUT9 origin:044-clk-bufg-pips !26_164 !26_165 27_165
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_BOT_R_CK_MUXED22 origin:046-clk-bufg-muxed-pips !26_183 !27_182 26_184
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_IMUX27_2 origin:044-clk-bufg-pips !26_183 !26_184 27_182
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_IMUX31_2 origin:044-clk-bufg-pips !26_183 !26_184 !27_182
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_R_FBG_OUT10 origin:044-clk-bufg-pips !26_184 !27_182 26_183
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_R_FBG_OUT12 origin:044-clk-bufg-pips !26_184 26_183 27_182
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_BOT_R_CK_MUXED23 origin:046-clk-bufg-muxed-pips !26_181 !27_181 26_180
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_IMUX27_2 origin:044-clk-bufg-pips !26_180 !27_181 26_181
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_IMUX31_2 origin:044-clk-bufg-pips !26_180 !26_181 !27_181
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_R_FBG_OUT10 origin:044-clk-bufg-pips !26_180 !26_181 27_181
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_R_FBG_OUT12 origin:044-clk-bufg-pips !26_180 26_181 27_181
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_BOT_R_CK_MUXED24 origin:046-clk-bufg-muxed-pips !26_199 !27_198 26_200
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_IMUX24_3 origin:044-clk-bufg-pips !26_199 !26_200 27_198
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_IMUX28_3 origin:044-clk-bufg-pips !26_199 !26_200 !27_198
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_R_FBG_OUT11 origin:044-clk-bufg-pips !26_200 !27_198 26_199
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_R_FBG_OUT13 origin:044-clk-bufg-pips !26_200 26_199 27_198
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_BOT_R_CK_MUXED25 origin:046-clk-bufg-muxed-pips !26_197 !27_197 26_196
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_IMUX24_3 origin:044-clk-bufg-pips !26_196 !27_197 26_197
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_IMUX28_3 origin:044-clk-bufg-pips !26_196 !26_197 !27_197
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_R_FBG_OUT11 origin:044-clk-bufg-pips !26_196 !26_197 27_197
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_R_FBG_OUT13 origin:044-clk-bufg-pips !26_196 26_197 27_197
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_BOT_R_CK_MUXED26 origin:046-clk-bufg-muxed-pips !26_215 !27_214 26_216
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_IMUX25_3 origin:044-clk-bufg-pips !26_215 !26_216 27_214
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_IMUX29_3 origin:044-clk-bufg-pips !26_215 !26_216 !27_214
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_R_FBG_OUT12 origin:044-clk-bufg-pips !26_216 !27_214 26_215
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_R_FBG_OUT14 origin:044-clk-bufg-pips !26_216 26_215 27_214
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_BOT_R_CK_MUXED27 origin:046-clk-bufg-muxed-pips !26_213 !27_213 26_212
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_IMUX25_3 origin:044-clk-bufg-pips !26_212 !27_213 26_213
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_IMUX29_3 origin:044-clk-bufg-pips !26_212 !26_213 !27_213
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_R_FBG_OUT12 origin:044-clk-bufg-pips !26_212 !26_213 27_213
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_R_FBG_OUT14 origin:044-clk-bufg-pips !26_212 26_213 27_213
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_BOT_R_CK_MUXED28 origin:046-clk-bufg-muxed-pips !26_231 !27_230 26_232
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_IMUX26_3 origin:044-clk-bufg-pips !26_231 !26_232 27_230
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_IMUX30_3 origin:044-clk-bufg-pips !26_231 !26_232 !27_230
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_R_FBG_OUT13 origin:044-clk-bufg-pips !26_232 !27_230 26_231
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_R_FBG_OUT15 origin:044-clk-bufg-pips !26_232 26_231 27_230
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_BOT_R_CK_MUXED29 origin:046-clk-bufg-muxed-pips !26_229 !27_229 26_228
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_IMUX26_3 origin:044-clk-bufg-pips !26_228 !27_229 26_229
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_IMUX30_3 origin:044-clk-bufg-pips !26_228 !26_229 !27_229
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_R_FBG_OUT13 origin:044-clk-bufg-pips !26_228 !26_229 27_229
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_R_FBG_OUT15 origin:044-clk-bufg-pips !26_228 26_229 27_229
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_BOT_R_CK_MUXED30 origin:046-clk-bufg-muxed-pips !26_247 !27_246 26_248
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_IMUX27_3 origin:044-clk-bufg-pips !26_247 !26_248 27_246
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_IMUX31_3 origin:044-clk-bufg-pips !26_247 !26_248 !27_246
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_R_FBG_OUT0 origin:044-clk-bufg-pips !26_248 26_247 27_246
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_R_FBG_OUT14 origin:044-clk-bufg-pips !26_248 !27_246 26_247
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_BOT_R_CK_MUXED31 origin:046-clk-bufg-muxed-pips !26_245 !27_245 26_244
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_IMUX27_3 origin:044-clk-bufg-pips !26_244 !27_245 26_245
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_IMUX31_3 origin:044-clk-bufg-pips !26_244 !26_245 !27_245
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_R_FBG_OUT0 origin:044-clk-bufg-pips !26_244 26_245 27_245
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_R_FBG_OUT14 origin:044-clk-bufg-pips !26_244 !26_245 27_245
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL1_I0.CLK_BUFG_BOT_R_CK_MUXED2 origin:046-clk-bufg-muxed-pips !26_23 !27_22 26_24
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL1_I0.CLK_BUFG_IMUX25_0 origin:044-clk-bufg-pips !26_23 !26_24 27_22
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL1_I0.CLK_BUFG_IMUX29_0 origin:044-clk-bufg-pips !26_23 !26_24 !27_22
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL1_I0.CLK_BUFG_R_FBG_OUT0 origin:044-clk-bufg-pips !26_24 !27_22 26_23
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL1_I0.CLK_BUFG_R_FBG_OUT2 origin:044-clk-bufg-pips !26_24 26_23 27_22
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL1_I1.CLK_BUFG_BOT_R_CK_MUXED3 origin:046-clk-bufg-muxed-pips !26_21 !27_21 26_20
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL1_I1.CLK_BUFG_IMUX25_0 origin:044-clk-bufg-pips !26_20 !27_21 26_21
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL1_I1.CLK_BUFG_IMUX29_0 origin:044-clk-bufg-pips !26_20 !26_21 !27_21
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL1_I1.CLK_BUFG_R_FBG_OUT0 origin:044-clk-bufg-pips !26_20 !26_21 27_21
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL1_I1.CLK_BUFG_R_FBG_OUT2 origin:044-clk-bufg-pips !26_20 26_21 27_21
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL2_I0.CLK_BUFG_BOT_R_CK_MUXED4 origin:046-clk-bufg-muxed-pips !26_39 !27_38 26_40
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL2_I0.CLK_BUFG_IMUX26_0 origin:044-clk-bufg-pips !26_39 !26_40 27_38
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL2_I0.CLK_BUFG_IMUX30_0 origin:044-clk-bufg-pips !26_39 !26_40 !27_38
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL2_I0.CLK_BUFG_R_FBG_OUT1 origin:044-clk-bufg-pips !26_40 !27_38 26_39
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL2_I0.CLK_BUFG_R_FBG_OUT3 origin:044-clk-bufg-pips !26_40 26_39 27_38
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL2_I1.CLK_BUFG_BOT_R_CK_MUXED5 origin:046-clk-bufg-muxed-pips !26_37 !27_37 26_36
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL2_I1.CLK_BUFG_IMUX26_0 origin:044-clk-bufg-pips !26_36 !27_37 26_37
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL2_I1.CLK_BUFG_IMUX30_0 origin:044-clk-bufg-pips !26_36 !26_37 !27_37
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL2_I1.CLK_BUFG_R_FBG_OUT1 origin:044-clk-bufg-pips !26_36 !26_37 27_37
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL2_I1.CLK_BUFG_R_FBG_OUT3 origin:044-clk-bufg-pips !26_36 26_37 27_37
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL3_I0.CLK_BUFG_BOT_R_CK_MUXED6 origin:046-clk-bufg-muxed-pips !26_55 !27_54 26_56
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL3_I0.CLK_BUFG_IMUX27_0 origin:044-clk-bufg-pips !26_55 !26_56 27_54
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL3_I0.CLK_BUFG_IMUX31_0 origin:044-clk-bufg-pips !26_55 !26_56 !27_54
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL3_I0.CLK_BUFG_R_FBG_OUT2 origin:044-clk-bufg-pips !26_56 !27_54 26_55
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL3_I0.CLK_BUFG_R_FBG_OUT4 origin:044-clk-bufg-pips !26_56 26_55 27_54
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL3_I1.CLK_BUFG_BOT_R_CK_MUXED7 origin:046-clk-bufg-muxed-pips !26_53 !27_53 26_52
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL3_I1.CLK_BUFG_IMUX27_0 origin:044-clk-bufg-pips !26_52 !27_53 26_53
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL3_I1.CLK_BUFG_IMUX31_0 origin:044-clk-bufg-pips !26_52 !26_53 !27_53
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL3_I1.CLK_BUFG_R_FBG_OUT2 origin:044-clk-bufg-pips !26_52 !26_53 27_53
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL3_I1.CLK_BUFG_R_FBG_OUT4 origin:044-clk-bufg-pips !26_52 26_53 27_53
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL4_I0.CLK_BUFG_BOT_R_CK_MUXED8 origin:046-clk-bufg-muxed-pips !26_71 !27_70 26_72
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL4_I0.CLK_BUFG_IMUX24_1 origin:044-clk-bufg-pips !26_71 !26_72 27_70
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL4_I0.CLK_BUFG_IMUX28_1 origin:044-clk-bufg-pips !26_71 !26_72 !27_70
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL4_I0.CLK_BUFG_R_FBG_OUT3 origin:044-clk-bufg-pips !26_72 !27_70 26_71
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL4_I0.CLK_BUFG_R_FBG_OUT5 origin:044-clk-bufg-pips !26_72 26_71 27_70
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL4_I1.CLK_BUFG_BOT_R_CK_MUXED9 origin:046-clk-bufg-muxed-pips !26_69 !27_69 26_68
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL4_I1.CLK_BUFG_IMUX24_1 origin:044-clk-bufg-pips !26_68 !27_69 26_69
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL4_I1.CLK_BUFG_IMUX28_1 origin:044-clk-bufg-pips !26_68 !26_69 !27_69
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL4_I1.CLK_BUFG_R_FBG_OUT3 origin:044-clk-bufg-pips !26_68 !26_69 27_69
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL4_I1.CLK_BUFG_R_FBG_OUT5 origin:044-clk-bufg-pips !26_68 26_69 27_69
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL5_I0.CLK_BUFG_BOT_R_CK_MUXED10 origin:046-clk-bufg-muxed-pips !26_87 !27_86 26_88
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL5_I0.CLK_BUFG_IMUX25_1 origin:044-clk-bufg-pips !26_87 !26_88 27_86
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL5_I0.CLK_BUFG_IMUX29_1 origin:044-clk-bufg-pips !26_87 !26_88 !27_86
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL5_I0.CLK_BUFG_R_FBG_OUT4 origin:044-clk-bufg-pips !26_88 !27_86 26_87
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL5_I0.CLK_BUFG_R_FBG_OUT6 origin:044-clk-bufg-pips !26_88 26_87 27_86
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL5_I1.CLK_BUFG_BOT_R_CK_MUXED11 origin:046-clk-bufg-muxed-pips !26_85 !27_85 26_84
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL5_I1.CLK_BUFG_IMUX25_1 origin:044-clk-bufg-pips !26_84 !27_85 26_85
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL5_I1.CLK_BUFG_IMUX29_1 origin:044-clk-bufg-pips !26_84 !26_85 !27_85
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL5_I1.CLK_BUFG_R_FBG_OUT4 origin:044-clk-bufg-pips !26_84 !26_85 27_85
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL5_I1.CLK_BUFG_R_FBG_OUT6 origin:044-clk-bufg-pips !26_84 26_85 27_85
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL6_I0.CLK_BUFG_BOT_R_CK_MUXED12 origin:046-clk-bufg-muxed-pips !26_103 !27_102 26_104
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL6_I0.CLK_BUFG_IMUX26_1 origin:044-clk-bufg-pips !26_103 !26_104 27_102
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL6_I0.CLK_BUFG_IMUX30_1 origin:044-clk-bufg-pips !26_103 !26_104 !27_102
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL6_I0.CLK_BUFG_R_FBG_OUT5 origin:044-clk-bufg-pips !26_104 !27_102 26_103
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL6_I0.CLK_BUFG_R_FBG_OUT7 origin:044-clk-bufg-pips !26_104 26_103 27_102
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL6_I1.CLK_BUFG_BOT_R_CK_MUXED13 origin:046-clk-bufg-muxed-pips !26_101 !27_101 26_100
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL6_I1.CLK_BUFG_IMUX26_1 origin:044-clk-bufg-pips !26_100 !27_101 26_101
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL6_I1.CLK_BUFG_IMUX30_1 origin:044-clk-bufg-pips !26_100 !26_101 !27_101
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL6_I1.CLK_BUFG_R_FBG_OUT5 origin:044-clk-bufg-pips !26_100 !26_101 27_101
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL6_I1.CLK_BUFG_R_FBG_OUT7 origin:044-clk-bufg-pips !26_100 26_101 27_101
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL7_I0.CLK_BUFG_BOT_R_CK_MUXED14 origin:046-clk-bufg-muxed-pips !26_119 !27_118 26_120
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL7_I0.CLK_BUFG_IMUX27_1 origin:044-clk-bufg-pips !26_119 !26_120 27_118
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL7_I0.CLK_BUFG_IMUX31_1 origin:044-clk-bufg-pips !26_119 !26_120 !27_118
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL7_I0.CLK_BUFG_R_FBG_OUT6 origin:044-clk-bufg-pips !26_120 !27_118 26_119
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL7_I0.CLK_BUFG_R_FBG_OUT8 origin:044-clk-bufg-pips !26_120 26_119 27_118
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL7_I1.CLK_BUFG_BOT_R_CK_MUXED15 origin:046-clk-bufg-muxed-pips !26_117 !27_117 26_116
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL7_I1.CLK_BUFG_IMUX27_1 origin:044-clk-bufg-pips !26_116 !27_117 26_117
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL7_I1.CLK_BUFG_IMUX31_1 origin:044-clk-bufg-pips !26_116 !26_117 !27_117
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL7_I1.CLK_BUFG_R_FBG_OUT6 origin:044-clk-bufg-pips !26_116 !26_117 27_117
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL7_I1.CLK_BUFG_R_FBG_OUT8 origin:044-clk-bufg-pips !26_116 26_117 27_117
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL8_I0.CLK_BUFG_BOT_R_CK_MUXED16 origin:046-clk-bufg-muxed-pips !26_135 !27_134 26_136
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL8_I0.CLK_BUFG_IMUX24_2 origin:044-clk-bufg-pips !26_135 !26_136 27_134
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL8_I0.CLK_BUFG_IMUX28_2 origin:044-clk-bufg-pips !26_135 !26_136 !27_134
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL8_I0.CLK_BUFG_R_FBG_OUT7 origin:044-clk-bufg-pips !26_136 !27_134 26_135
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL8_I0.CLK_BUFG_R_FBG_OUT9 origin:044-clk-bufg-pips !26_136 26_135 27_134
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL8_I1.CLK_BUFG_BOT_R_CK_MUXED17 origin:046-clk-bufg-muxed-pips !26_133 !27_133 26_132
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL8_I1.CLK_BUFG_IMUX24_2 origin:044-clk-bufg-pips !26_132 !27_133 26_133
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL8_I1.CLK_BUFG_IMUX28_2 origin:044-clk-bufg-pips !26_132 !26_133 !27_133
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL8_I1.CLK_BUFG_R_FBG_OUT7 origin:044-clk-bufg-pips !26_132 !26_133 27_133
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL8_I1.CLK_BUFG_R_FBG_OUT9 origin:044-clk-bufg-pips !26_132 26_133 27_133
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL9_I0.CLK_BUFG_BOT_R_CK_MUXED18 origin:046-clk-bufg-muxed-pips !26_151 !27_150 26_152
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL9_I0.CLK_BUFG_IMUX25_2 origin:044-clk-bufg-pips !26_151 !26_152 27_150
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL9_I0.CLK_BUFG_IMUX29_2 origin:044-clk-bufg-pips !26_151 !26_152 !27_150
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL9_I0.CLK_BUFG_R_FBG_OUT10 origin:044-clk-bufg-pips !26_152 26_151 27_150
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL9_I0.CLK_BUFG_R_FBG_OUT8 origin:044-clk-bufg-pips !26_152 !27_150 26_151
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL9_I1.CLK_BUFG_BOT_R_CK_MUXED19 origin:046-clk-bufg-muxed-pips !26_149 !27_149 26_148
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL9_I1.CLK_BUFG_IMUX25_2 origin:044-clk-bufg-pips !26_148 !27_149 26_149
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL9_I1.CLK_BUFG_IMUX29_2 origin:044-clk-bufg-pips !26_148 !26_149 !27_149
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL9_I1.CLK_BUFG_R_FBG_OUT10 origin:044-clk-bufg-pips !26_148 26_149 27_149
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL9_I1.CLK_BUFG_R_FBG_OUT8 origin:044-clk-bufg-pips !26_148 !26_149 27_149
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y10.IN_USE origin:042-clk-bufg-config 27_160 27_175
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y10.INIT_OUT origin:042-clk-bufg-config 27_173
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y10.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_161
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y10.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_172
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y10.PRESELECT_I1 origin:042-clk-bufg-config 26_172
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y10.ZINV_CE0 origin:042-clk-bufg-config 27_162
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y10.ZINV_CE1 origin:042-clk-bufg-config 27_171
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y10.ZINV_S0 origin:042-clk-bufg-config 27_163
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y10.ZINV_S1 origin:042-clk-bufg-config 26_171
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y10.ZPRESELECT_I0 origin:042-clk-bufg-config 26_162
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y11.IN_USE origin:042-clk-bufg-config 27_176 27_191
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y11.INIT_OUT origin:042-clk-bufg-config 27_189
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y11.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_177
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y11.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_188
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y11.PRESELECT_I1 origin:042-clk-bufg-config 26_188
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y11.ZINV_CE0 origin:042-clk-bufg-config 27_178
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y11.ZINV_CE1 origin:042-clk-bufg-config 27_187
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y11.ZINV_S0 origin:042-clk-bufg-config 27_179
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y11.ZINV_S1 origin:042-clk-bufg-config 26_187
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y11.ZPRESELECT_I0 origin:042-clk-bufg-config 26_178
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y12.IN_USE origin:042-clk-bufg-config 27_192 27_207
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y12.INIT_OUT origin:042-clk-bufg-config 27_205
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y12.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_193
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y12.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_204
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y12.PRESELECT_I1 origin:042-clk-bufg-config 26_204
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y12.ZINV_CE0 origin:042-clk-bufg-config 27_194
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y12.ZINV_CE1 origin:042-clk-bufg-config 27_203
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y12.ZINV_S0 origin:042-clk-bufg-config 27_195
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y12.ZINV_S1 origin:042-clk-bufg-config 26_203
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y12.ZPRESELECT_I0 origin:042-clk-bufg-config 26_194
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y13.IN_USE origin:042-clk-bufg-config 27_208 27_223
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y13.INIT_OUT origin:042-clk-bufg-config 27_221
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y13.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_209
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y13.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_220
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y13.PRESELECT_I1 origin:042-clk-bufg-config 26_220
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y13.ZINV_CE0 origin:042-clk-bufg-config 27_210
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y13.ZINV_CE1 origin:042-clk-bufg-config 27_219
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y13.ZINV_S0 origin:042-clk-bufg-config 27_211
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y13.ZINV_S1 origin:042-clk-bufg-config 26_219
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y13.ZPRESELECT_I0 origin:042-clk-bufg-config 26_210
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y14.IN_USE origin:042-clk-bufg-config 27_224 27_239
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y14.INIT_OUT origin:042-clk-bufg-config 27_237
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y14.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_225
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y14.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_236
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y14.PRESELECT_I1 origin:042-clk-bufg-config 26_236
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y14.ZINV_CE0 origin:042-clk-bufg-config 27_226
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y14.ZINV_CE1 origin:042-clk-bufg-config 27_235
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y14.ZINV_S0 origin:042-clk-bufg-config 27_227
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y14.ZINV_S1 origin:042-clk-bufg-config 26_235
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y14.ZPRESELECT_I0 origin:042-clk-bufg-config 26_226
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y15.IN_USE origin:042-clk-bufg-config 27_240 27_255
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y15.INIT_OUT origin:042-clk-bufg-config 27_253
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y15.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_241
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y15.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_252
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y15.PRESELECT_I1 origin:042-clk-bufg-config 26_252
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y15.ZINV_CE0 origin:042-clk-bufg-config 27_242
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y15.ZINV_CE1 origin:042-clk-bufg-config 27_251
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y15.ZINV_S0 origin:042-clk-bufg-config 27_243
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y15.ZINV_S1 origin:042-clk-bufg-config 26_251
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y15.ZPRESELECT_I0 origin:042-clk-bufg-config 26_242
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK0.CLK_BUFG_BUFGCTRL0_O origin:044-clk-bufg-pips 27_14
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK1.CLK_BUFG_BUFGCTRL1_O origin:044-clk-bufg-pips 27_30
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK10.CLK_BUFG_BUFGCTRL10_O origin:044-clk-bufg-pips 27_174
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK11.CLK_BUFG_BUFGCTRL11_O origin:044-clk-bufg-pips 27_190
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK12.CLK_BUFG_BUFGCTRL12_O origin:044-clk-bufg-pips 27_206
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK13.CLK_BUFG_BUFGCTRL13_O origin:044-clk-bufg-pips 27_222
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK14.CLK_BUFG_BUFGCTRL14_O origin:044-clk-bufg-pips 27_238
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK15.CLK_BUFG_BUFGCTRL15_O origin:044-clk-bufg-pips 27_254
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK2.CLK_BUFG_BUFGCTRL2_O origin:044-clk-bufg-pips 27_46
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK3.CLK_BUFG_BUFGCTRL3_O origin:044-clk-bufg-pips 27_62
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK4.CLK_BUFG_BUFGCTRL4_O origin:044-clk-bufg-pips 27_78
@ -334,3 +168,169 @@ CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK6.CLK_BUFG_BUFGCTRL6_O origin:044-clk-bufg-pips 2
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK7.CLK_BUFG_BUFGCTRL7_O origin:044-clk-bufg-pips 27_126
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK8.CLK_BUFG_BUFGCTRL8_O origin:044-clk-bufg-pips 27_142
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK9.CLK_BUFG_BUFGCTRL9_O origin:044-clk-bufg-pips 27_158
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK10.CLK_BUFG_BUFGCTRL10_O origin:044-clk-bufg-pips 27_174
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK11.CLK_BUFG_BUFGCTRL11_O origin:044-clk-bufg-pips 27_190
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK12.CLK_BUFG_BUFGCTRL12_O origin:044-clk-bufg-pips 27_206
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK13.CLK_BUFG_BUFGCTRL13_O origin:044-clk-bufg-pips 27_222
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK14.CLK_BUFG_BUFGCTRL14_O origin:044-clk-bufg-pips 27_238
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK15.CLK_BUFG_BUFGCTRL15_O origin:044-clk-bufg-pips 27_254
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL0_I0.CLK_BUFG_BOT_R_CK_MUXED0 origin:046-clk-bufg-muxed-pips !26_07 !27_06 26_08
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL0_I0.CLK_BUFG_R_FBG_OUT1 origin:044-clk-bufg-pips !26_08 26_07 27_06
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL0_I0.CLK_BUFG_R_FBG_OUT15 origin:044-clk-bufg-pips !26_08 !27_06 26_07
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL0_I0.CLK_BUFG_IMUX24_0 origin:044-clk-bufg-pips !26_07 !26_08 27_06
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL0_I0.CLK_BUFG_IMUX28_0 origin:044-clk-bufg-pips !26_07 !26_08 !27_06
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL0_I1.CLK_BUFG_BOT_R_CK_MUXED1 origin:046-clk-bufg-muxed-pips !26_05 !27_05 26_04
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL0_I1.CLK_BUFG_R_FBG_OUT1 origin:044-clk-bufg-pips !26_04 26_05 27_05
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL0_I1.CLK_BUFG_R_FBG_OUT15 origin:044-clk-bufg-pips !26_04 !26_05 27_05
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL0_I1.CLK_BUFG_IMUX24_0 origin:044-clk-bufg-pips !26_04 !27_05 26_05
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL0_I1.CLK_BUFG_IMUX28_0 origin:044-clk-bufg-pips !26_04 !26_05 !27_05
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL1_I0.CLK_BUFG_BOT_R_CK_MUXED2 origin:046-clk-bufg-muxed-pips !26_23 !27_22 26_24
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL1_I0.CLK_BUFG_R_FBG_OUT0 origin:044-clk-bufg-pips !26_24 !27_22 26_23
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL1_I0.CLK_BUFG_R_FBG_OUT2 origin:044-clk-bufg-pips !26_24 26_23 27_22
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL1_I0.CLK_BUFG_IMUX25_0 origin:044-clk-bufg-pips !26_23 !26_24 27_22
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL1_I0.CLK_BUFG_IMUX29_0 origin:044-clk-bufg-pips !26_23 !26_24 !27_22
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL1_I1.CLK_BUFG_BOT_R_CK_MUXED3 origin:046-clk-bufg-muxed-pips !26_21 !27_21 26_20
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL1_I1.CLK_BUFG_R_FBG_OUT0 origin:044-clk-bufg-pips !26_20 !26_21 27_21
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL1_I1.CLK_BUFG_R_FBG_OUT2 origin:044-clk-bufg-pips !26_20 26_21 27_21
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL1_I1.CLK_BUFG_IMUX25_0 origin:044-clk-bufg-pips !26_20 !27_21 26_21
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL1_I1.CLK_BUFG_IMUX29_0 origin:044-clk-bufg-pips !26_20 !26_21 !27_21
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL2_I0.CLK_BUFG_BOT_R_CK_MUXED4 origin:046-clk-bufg-muxed-pips !26_39 !27_38 26_40
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL2_I0.CLK_BUFG_R_FBG_OUT1 origin:044-clk-bufg-pips !26_40 !27_38 26_39
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL2_I0.CLK_BUFG_R_FBG_OUT3 origin:044-clk-bufg-pips !26_40 26_39 27_38
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL2_I0.CLK_BUFG_IMUX26_0 origin:044-clk-bufg-pips !26_39 !26_40 27_38
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL2_I0.CLK_BUFG_IMUX30_0 origin:044-clk-bufg-pips !26_39 !26_40 !27_38
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL2_I1.CLK_BUFG_BOT_R_CK_MUXED5 origin:046-clk-bufg-muxed-pips !26_37 !27_37 26_36
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL2_I1.CLK_BUFG_R_FBG_OUT1 origin:044-clk-bufg-pips !26_36 !26_37 27_37
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL2_I1.CLK_BUFG_R_FBG_OUT3 origin:044-clk-bufg-pips !26_36 26_37 27_37
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL2_I1.CLK_BUFG_IMUX26_0 origin:044-clk-bufg-pips !26_36 !27_37 26_37
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL2_I1.CLK_BUFG_IMUX30_0 origin:044-clk-bufg-pips !26_36 !26_37 !27_37
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL3_I0.CLK_BUFG_BOT_R_CK_MUXED6 origin:046-clk-bufg-muxed-pips !26_55 !27_54 26_56
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL3_I0.CLK_BUFG_R_FBG_OUT2 origin:044-clk-bufg-pips !26_56 !27_54 26_55
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL3_I0.CLK_BUFG_R_FBG_OUT4 origin:044-clk-bufg-pips !26_56 26_55 27_54
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL3_I0.CLK_BUFG_IMUX27_0 origin:044-clk-bufg-pips !26_55 !26_56 27_54
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL3_I0.CLK_BUFG_IMUX31_0 origin:044-clk-bufg-pips !26_55 !26_56 !27_54
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL3_I1.CLK_BUFG_BOT_R_CK_MUXED7 origin:046-clk-bufg-muxed-pips !26_53 !27_53 26_52
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL3_I1.CLK_BUFG_R_FBG_OUT2 origin:044-clk-bufg-pips !26_52 !26_53 27_53
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL3_I1.CLK_BUFG_R_FBG_OUT4 origin:044-clk-bufg-pips !26_52 26_53 27_53
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL3_I1.CLK_BUFG_IMUX27_0 origin:044-clk-bufg-pips !26_52 !27_53 26_53
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL3_I1.CLK_BUFG_IMUX31_0 origin:044-clk-bufg-pips !26_52 !26_53 !27_53
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL4_I0.CLK_BUFG_BOT_R_CK_MUXED8 origin:046-clk-bufg-muxed-pips !26_71 !27_70 26_72
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL4_I0.CLK_BUFG_R_FBG_OUT3 origin:044-clk-bufg-pips !26_72 !27_70 26_71
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL4_I0.CLK_BUFG_R_FBG_OUT5 origin:044-clk-bufg-pips !26_72 26_71 27_70
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL4_I0.CLK_BUFG_IMUX24_1 origin:044-clk-bufg-pips !26_71 !26_72 27_70
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL4_I0.CLK_BUFG_IMUX28_1 origin:044-clk-bufg-pips !26_71 !26_72 !27_70
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL4_I1.CLK_BUFG_BOT_R_CK_MUXED9 origin:046-clk-bufg-muxed-pips !26_69 !27_69 26_68
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL4_I1.CLK_BUFG_R_FBG_OUT3 origin:044-clk-bufg-pips !26_68 !26_69 27_69
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL4_I1.CLK_BUFG_R_FBG_OUT5 origin:044-clk-bufg-pips !26_68 26_69 27_69
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL4_I1.CLK_BUFG_IMUX24_1 origin:044-clk-bufg-pips !26_68 !27_69 26_69
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL4_I1.CLK_BUFG_IMUX28_1 origin:044-clk-bufg-pips !26_68 !26_69 !27_69
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL5_I0.CLK_BUFG_BOT_R_CK_MUXED10 origin:046-clk-bufg-muxed-pips !26_87 !27_86 26_88
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL5_I0.CLK_BUFG_R_FBG_OUT4 origin:044-clk-bufg-pips !26_88 !27_86 26_87
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL5_I0.CLK_BUFG_R_FBG_OUT6 origin:044-clk-bufg-pips !26_88 26_87 27_86
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL5_I0.CLK_BUFG_IMUX25_1 origin:044-clk-bufg-pips !26_87 !26_88 27_86
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL5_I0.CLK_BUFG_IMUX29_1 origin:044-clk-bufg-pips !26_87 !26_88 !27_86
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL5_I1.CLK_BUFG_BOT_R_CK_MUXED11 origin:046-clk-bufg-muxed-pips !26_85 !27_85 26_84
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL5_I1.CLK_BUFG_R_FBG_OUT4 origin:044-clk-bufg-pips !26_84 !26_85 27_85
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL5_I1.CLK_BUFG_R_FBG_OUT6 origin:044-clk-bufg-pips !26_84 26_85 27_85
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL5_I1.CLK_BUFG_IMUX25_1 origin:044-clk-bufg-pips !26_84 !27_85 26_85
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL5_I1.CLK_BUFG_IMUX29_1 origin:044-clk-bufg-pips !26_84 !26_85 !27_85
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL6_I0.CLK_BUFG_BOT_R_CK_MUXED12 origin:046-clk-bufg-muxed-pips !26_103 !27_102 26_104
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL6_I0.CLK_BUFG_R_FBG_OUT5 origin:044-clk-bufg-pips !26_104 !27_102 26_103
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL6_I0.CLK_BUFG_R_FBG_OUT7 origin:044-clk-bufg-pips !26_104 26_103 27_102
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL6_I0.CLK_BUFG_IMUX26_1 origin:044-clk-bufg-pips !26_103 !26_104 27_102
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL6_I0.CLK_BUFG_IMUX30_1 origin:044-clk-bufg-pips !26_103 !26_104 !27_102
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL6_I1.CLK_BUFG_BOT_R_CK_MUXED13 origin:046-clk-bufg-muxed-pips !26_101 !27_101 26_100
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL6_I1.CLK_BUFG_R_FBG_OUT5 origin:044-clk-bufg-pips !26_100 !26_101 27_101
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL6_I1.CLK_BUFG_R_FBG_OUT7 origin:044-clk-bufg-pips !26_100 26_101 27_101
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL6_I1.CLK_BUFG_IMUX26_1 origin:044-clk-bufg-pips !26_100 !27_101 26_101
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL6_I1.CLK_BUFG_IMUX30_1 origin:044-clk-bufg-pips !26_100 !26_101 !27_101
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL7_I0.CLK_BUFG_BOT_R_CK_MUXED14 origin:046-clk-bufg-muxed-pips !26_119 !27_118 26_120
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL7_I0.CLK_BUFG_R_FBG_OUT6 origin:044-clk-bufg-pips !26_120 !27_118 26_119
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL7_I0.CLK_BUFG_R_FBG_OUT8 origin:044-clk-bufg-pips !26_120 26_119 27_118
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL7_I0.CLK_BUFG_IMUX27_1 origin:044-clk-bufg-pips !26_119 !26_120 27_118
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL7_I0.CLK_BUFG_IMUX31_1 origin:044-clk-bufg-pips !26_119 !26_120 !27_118
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL7_I1.CLK_BUFG_BOT_R_CK_MUXED15 origin:046-clk-bufg-muxed-pips !26_117 !27_117 26_116
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL7_I1.CLK_BUFG_R_FBG_OUT6 origin:044-clk-bufg-pips !26_116 !26_117 27_117
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL7_I1.CLK_BUFG_R_FBG_OUT8 origin:044-clk-bufg-pips !26_116 26_117 27_117
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL7_I1.CLK_BUFG_IMUX27_1 origin:044-clk-bufg-pips !26_116 !27_117 26_117
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL7_I1.CLK_BUFG_IMUX31_1 origin:044-clk-bufg-pips !26_116 !26_117 !27_117
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL8_I0.CLK_BUFG_BOT_R_CK_MUXED16 origin:046-clk-bufg-muxed-pips !26_135 !27_134 26_136
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL8_I0.CLK_BUFG_R_FBG_OUT7 origin:044-clk-bufg-pips !26_136 !27_134 26_135
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL8_I0.CLK_BUFG_R_FBG_OUT9 origin:044-clk-bufg-pips !26_136 26_135 27_134
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL8_I0.CLK_BUFG_IMUX24_2 origin:044-clk-bufg-pips !26_135 !26_136 27_134
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL8_I0.CLK_BUFG_IMUX28_2 origin:044-clk-bufg-pips !26_135 !26_136 !27_134
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL8_I1.CLK_BUFG_BOT_R_CK_MUXED17 origin:046-clk-bufg-muxed-pips !26_133 !27_133 26_132
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL8_I1.CLK_BUFG_R_FBG_OUT7 origin:044-clk-bufg-pips !26_132 !26_133 27_133
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL8_I1.CLK_BUFG_R_FBG_OUT9 origin:044-clk-bufg-pips !26_132 26_133 27_133
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL8_I1.CLK_BUFG_IMUX24_2 origin:044-clk-bufg-pips !26_132 !27_133 26_133
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL8_I1.CLK_BUFG_IMUX28_2 origin:044-clk-bufg-pips !26_132 !26_133 !27_133
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL9_I0.CLK_BUFG_BOT_R_CK_MUXED18 origin:046-clk-bufg-muxed-pips !26_151 !27_150 26_152
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL9_I0.CLK_BUFG_R_FBG_OUT8 origin:044-clk-bufg-pips !26_152 !27_150 26_151
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL9_I0.CLK_BUFG_R_FBG_OUT10 origin:044-clk-bufg-pips !26_152 26_151 27_150
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL9_I0.CLK_BUFG_IMUX25_2 origin:044-clk-bufg-pips !26_151 !26_152 27_150
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL9_I0.CLK_BUFG_IMUX29_2 origin:044-clk-bufg-pips !26_151 !26_152 !27_150
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL9_I1.CLK_BUFG_BOT_R_CK_MUXED19 origin:046-clk-bufg-muxed-pips !26_149 !27_149 26_148
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL9_I1.CLK_BUFG_R_FBG_OUT8 origin:044-clk-bufg-pips !26_148 !26_149 27_149
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL9_I1.CLK_BUFG_R_FBG_OUT10 origin:044-clk-bufg-pips !26_148 26_149 27_149
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL9_I1.CLK_BUFG_IMUX25_2 origin:044-clk-bufg-pips !26_148 !27_149 26_149
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL9_I1.CLK_BUFG_IMUX29_2 origin:044-clk-bufg-pips !26_148 !26_149 !27_149
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_BOT_R_CK_MUXED20 origin:046-clk-bufg-muxed-pips !26_167 !27_166 26_168
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_R_FBG_OUT9 origin:044-clk-bufg-pips !26_168 !27_166 26_167
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_R_FBG_OUT11 origin:044-clk-bufg-pips !26_168 26_167 27_166
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_IMUX26_2 origin:044-clk-bufg-pips !26_167 !26_168 27_166
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_IMUX30_2 origin:044-clk-bufg-pips !26_167 !26_168 !27_166
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_BOT_R_CK_MUXED21 origin:046-clk-bufg-muxed-pips !26_165 !27_165 26_164
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_R_FBG_OUT9 origin:044-clk-bufg-pips !26_164 !26_165 27_165
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_R_FBG_OUT11 origin:044-clk-bufg-pips !26_164 26_165 27_165
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_IMUX26_2 origin:044-clk-bufg-pips !26_164 !27_165 26_165
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_IMUX30_2 origin:044-clk-bufg-pips !26_164 !26_165 !27_165
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_BOT_R_CK_MUXED22 origin:046-clk-bufg-muxed-pips !26_183 !27_182 26_184
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_R_FBG_OUT10 origin:044-clk-bufg-pips !26_184 !27_182 26_183
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_R_FBG_OUT12 origin:044-clk-bufg-pips !26_184 26_183 27_182
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_IMUX27_2 origin:044-clk-bufg-pips !26_183 !26_184 27_182
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_IMUX31_2 origin:044-clk-bufg-pips !26_183 !26_184 !27_182
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_BOT_R_CK_MUXED23 origin:046-clk-bufg-muxed-pips !26_181 !27_181 26_180
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_R_FBG_OUT10 origin:044-clk-bufg-pips !26_180 !26_181 27_181
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_R_FBG_OUT12 origin:044-clk-bufg-pips !26_180 26_181 27_181
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_IMUX27_2 origin:044-clk-bufg-pips !26_180 !27_181 26_181
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_IMUX31_2 origin:044-clk-bufg-pips !26_180 !26_181 !27_181
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_BOT_R_CK_MUXED24 origin:046-clk-bufg-muxed-pips !26_199 !27_198 26_200
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_R_FBG_OUT11 origin:044-clk-bufg-pips !26_200 !27_198 26_199
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_R_FBG_OUT13 origin:044-clk-bufg-pips !26_200 26_199 27_198
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_IMUX24_3 origin:044-clk-bufg-pips !26_199 !26_200 27_198
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_IMUX28_3 origin:044-clk-bufg-pips !26_199 !26_200 !27_198
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_BOT_R_CK_MUXED25 origin:046-clk-bufg-muxed-pips !26_197 !27_197 26_196
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_R_FBG_OUT11 origin:044-clk-bufg-pips !26_196 !26_197 27_197
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_R_FBG_OUT13 origin:044-clk-bufg-pips !26_196 26_197 27_197
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_IMUX24_3 origin:044-clk-bufg-pips !26_196 !27_197 26_197
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_IMUX28_3 origin:044-clk-bufg-pips !26_196 !26_197 !27_197
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_BOT_R_CK_MUXED26 origin:046-clk-bufg-muxed-pips !26_215 !27_214 26_216
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_R_FBG_OUT12 origin:044-clk-bufg-pips !26_216 !27_214 26_215
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_R_FBG_OUT14 origin:044-clk-bufg-pips !26_216 26_215 27_214
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_IMUX25_3 origin:044-clk-bufg-pips !26_215 !26_216 27_214
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_IMUX29_3 origin:044-clk-bufg-pips !26_215 !26_216 !27_214
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_BOT_R_CK_MUXED27 origin:046-clk-bufg-muxed-pips !26_213 !27_213 26_212
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_R_FBG_OUT12 origin:044-clk-bufg-pips !26_212 !26_213 27_213
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_R_FBG_OUT14 origin:044-clk-bufg-pips !26_212 26_213 27_213
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_IMUX25_3 origin:044-clk-bufg-pips !26_212 !27_213 26_213
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_IMUX29_3 origin:044-clk-bufg-pips !26_212 !26_213 !27_213
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_BOT_R_CK_MUXED28 origin:046-clk-bufg-muxed-pips !26_231 !27_230 26_232
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_R_FBG_OUT13 origin:044-clk-bufg-pips !26_232 !27_230 26_231
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_R_FBG_OUT15 origin:044-clk-bufg-pips !26_232 26_231 27_230
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_IMUX26_3 origin:044-clk-bufg-pips !26_231 !26_232 27_230
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_IMUX30_3 origin:044-clk-bufg-pips !26_231 !26_232 !27_230
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_BOT_R_CK_MUXED29 origin:046-clk-bufg-muxed-pips !26_229 !27_229 26_228
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_R_FBG_OUT13 origin:044-clk-bufg-pips !26_228 !26_229 27_229
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_R_FBG_OUT15 origin:044-clk-bufg-pips !26_228 26_229 27_229
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_IMUX26_3 origin:044-clk-bufg-pips !26_228 !27_229 26_229
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_IMUX30_3 origin:044-clk-bufg-pips !26_228 !26_229 !27_229
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_BOT_R_CK_MUXED30 origin:046-clk-bufg-muxed-pips !26_247 !27_246 26_248
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_R_FBG_OUT0 origin:044-clk-bufg-pips !26_248 26_247 27_246
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_R_FBG_OUT14 origin:044-clk-bufg-pips !26_248 !27_246 26_247
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_IMUX27_3 origin:044-clk-bufg-pips !26_247 !26_248 27_246
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_IMUX31_3 origin:044-clk-bufg-pips !26_247 !26_248 !27_246
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_BOT_R_CK_MUXED31 origin:046-clk-bufg-muxed-pips !26_245 !27_245 26_244
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_R_FBG_OUT0 origin:044-clk-bufg-pips !26_244 26_245 27_245
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_R_FBG_OUT14 origin:044-clk-bufg-pips !26_244 !26_245 27_245
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_IMUX27_3 origin:044-clk-bufg-pips !26_244 !27_245 26_245
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_IMUX31_3 origin:044-clk-bufg-pips !26_244 !26_245 !27_245

72
artix7/segbits_clk_bufg_rebuf.origin_info.db
View File

@ -1,5 +1,23 @@
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK0_BOT.CLK_BUFG_REBUF_R_CK_GCLK0_TOP origin:043-clk-rebuf-pips 27_15
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK0_TOP.CLK_BUFG_REBUF_R_CK_GCLK0_BOT origin:043-clk-rebuf-pips 27_13
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK1_BOT.CLK_BUFG_REBUF_R_CK_GCLK1_TOP origin:043-clk-rebuf-pips 27_31
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK1_TOP.CLK_BUFG_REBUF_R_CK_GCLK1_BOT origin:043-clk-rebuf-pips 27_29
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK2_BOT.CLK_BUFG_REBUF_R_CK_GCLK2_TOP origin:043-clk-rebuf-pips 27_47
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK2_TOP.CLK_BUFG_REBUF_R_CK_GCLK2_BOT origin:043-clk-rebuf-pips 27_45
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK3_BOT.CLK_BUFG_REBUF_R_CK_GCLK3_TOP origin:043-clk-rebuf-pips 27_63
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK3_TOP.CLK_BUFG_REBUF_R_CK_GCLK3_BOT origin:043-clk-rebuf-pips 27_61
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK4_BOT.CLK_BUFG_REBUF_R_CK_GCLK4_TOP origin:043-clk-rebuf-pips 27_79
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK4_TOP.CLK_BUFG_REBUF_R_CK_GCLK4_BOT origin:043-clk-rebuf-pips 27_77
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK5_BOT.CLK_BUFG_REBUF_R_CK_GCLK5_TOP origin:043-clk-rebuf-pips 27_95
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK5_TOP.CLK_BUFG_REBUF_R_CK_GCLK5_BOT origin:043-clk-rebuf-pips 27_93
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK6_BOT.CLK_BUFG_REBUF_R_CK_GCLK6_TOP origin:043-clk-rebuf-pips 27_111
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK6_TOP.CLK_BUFG_REBUF_R_CK_GCLK6_BOT origin:043-clk-rebuf-pips 27_109
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK7_BOT.CLK_BUFG_REBUF_R_CK_GCLK7_TOP origin:043-clk-rebuf-pips 27_127
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK7_TOP.CLK_BUFG_REBUF_R_CK_GCLK7_BOT origin:043-clk-rebuf-pips 27_125
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK8_BOT.CLK_BUFG_REBUF_R_CK_GCLK8_TOP origin:043-clk-rebuf-pips 26_15
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK8_TOP.CLK_BUFG_REBUF_R_CK_GCLK8_BOT origin:043-clk-rebuf-pips 26_13
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK9_BOT.CLK_BUFG_REBUF_R_CK_GCLK9_TOP origin:043-clk-rebuf-pips 26_31
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK9_TOP.CLK_BUFG_REBUF_R_CK_GCLK9_BOT origin:043-clk-rebuf-pips 26_29
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK10_BOT.CLK_BUFG_REBUF_R_CK_GCLK10_TOP origin:043-clk-rebuf-pips 26_47
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK10_TOP.CLK_BUFG_REBUF_R_CK_GCLK10_BOT origin:043-clk-rebuf-pips 26_45
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK11_BOT.CLK_BUFG_REBUF_R_CK_GCLK11_TOP origin:043-clk-rebuf-pips 26_63
@ -20,8 +38,6 @@ CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK18_BOT.CLK_BUFG_REBUF_R_CK_GCLK18_TOP ori
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK18_TOP.CLK_BUFG_REBUF_R_CK_GCLK18_BOT origin:043-clk-rebuf-pips 27_44
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK19_BOT.CLK_BUFG_REBUF_R_CK_GCLK19_TOP origin:043-clk-rebuf-pips 27_62
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK19_TOP.CLK_BUFG_REBUF_R_CK_GCLK19_BOT origin:043-clk-rebuf-pips 27_60
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK1_BOT.CLK_BUFG_REBUF_R_CK_GCLK1_TOP origin:043-clk-rebuf-pips 27_31
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK1_TOP.CLK_BUFG_REBUF_R_CK_GCLK1_BOT origin:043-clk-rebuf-pips 27_29
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK20_BOT.CLK_BUFG_REBUF_R_CK_GCLK20_TOP origin:043-clk-rebuf-pips 27_78
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK20_TOP.CLK_BUFG_REBUF_R_CK_GCLK20_BOT origin:043-clk-rebuf-pips 27_76
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK21_BOT.CLK_BUFG_REBUF_R_CK_GCLK21_TOP origin:043-clk-rebuf-pips 27_94
@ -42,28 +58,30 @@ CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK28_BOT.CLK_BUFG_REBUF_R_CK_GCLK28_TOP ori
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK28_TOP.CLK_BUFG_REBUF_R_CK_GCLK28_BOT origin:043-clk-rebuf-pips 26_76
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK29_BOT.CLK_BUFG_REBUF_R_CK_GCLK29_TOP origin:043-clk-rebuf-pips 26_94
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK29_TOP.CLK_BUFG_REBUF_R_CK_GCLK29_BOT origin:043-clk-rebuf-pips 26_92
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK2_BOT.CLK_BUFG_REBUF_R_CK_GCLK2_TOP origin:043-clk-rebuf-pips 27_47
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK2_TOP.CLK_BUFG_REBUF_R_CK_GCLK2_BOT origin:043-clk-rebuf-pips 27_45
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK30_BOT.CLK_BUFG_REBUF_R_CK_GCLK30_TOP origin:043-clk-rebuf-pips 26_110
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK30_TOP.CLK_BUFG_REBUF_R_CK_GCLK30_BOT origin:043-clk-rebuf-pips 26_108
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK31_BOT.CLK_BUFG_REBUF_R_CK_GCLK31_TOP origin:043-clk-rebuf-pips 26_126
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK31_TOP.CLK_BUFG_REBUF_R_CK_GCLK31_BOT origin:043-clk-rebuf-pips 26_124
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK3_BOT.CLK_BUFG_REBUF_R_CK_GCLK3_TOP origin:043-clk-rebuf-pips 27_63
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK3_TOP.CLK_BUFG_REBUF_R_CK_GCLK3_BOT origin:043-clk-rebuf-pips 27_61
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK4_BOT.CLK_BUFG_REBUF_R_CK_GCLK4_TOP origin:043-clk-rebuf-pips 27_79
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK4_TOP.CLK_BUFG_REBUF_R_CK_GCLK4_BOT origin:043-clk-rebuf-pips 27_77
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK5_BOT.CLK_BUFG_REBUF_R_CK_GCLK5_TOP origin:043-clk-rebuf-pips 27_95
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK5_TOP.CLK_BUFG_REBUF_R_CK_GCLK5_BOT origin:043-clk-rebuf-pips 27_93
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK6_BOT.CLK_BUFG_REBUF_R_CK_GCLK6_TOP origin:043-clk-rebuf-pips 27_111
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK6_TOP.CLK_BUFG_REBUF_R_CK_GCLK6_BOT origin:043-clk-rebuf-pips 27_109
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK7_BOT.CLK_BUFG_REBUF_R_CK_GCLK7_TOP origin:043-clk-rebuf-pips 27_127
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK7_TOP.CLK_BUFG_REBUF_R_CK_GCLK7_BOT origin:043-clk-rebuf-pips 27_125
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK8_BOT.CLK_BUFG_REBUF_R_CK_GCLK8_TOP origin:043-clk-rebuf-pips 26_15
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK8_TOP.CLK_BUFG_REBUF_R_CK_GCLK8_BOT origin:043-clk-rebuf-pips 26_13
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK9_BOT.CLK_BUFG_REBUF_R_CK_GCLK9_TOP origin:043-clk-rebuf-pips 26_31
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK9_TOP.CLK_BUFG_REBUF_R_CK_GCLK9_BOT origin:043-clk-rebuf-pips 26_29
CLK_BUFG_REBUF.GCLK0_ENABLE_ABOVE origin:043-clk-rebuf-pips 27_03
CLK_BUFG_REBUF.GCLK0_ENABLE_BELOW origin:043-clk-rebuf-pips 27_01
CLK_BUFG_REBUF.GCLK1_ENABLE_ABOVE origin:043-clk-rebuf-pips 27_19
CLK_BUFG_REBUF.GCLK1_ENABLE_BELOW origin:043-clk-rebuf-pips 27_17
CLK_BUFG_REBUF.GCLK2_ENABLE_ABOVE origin:043-clk-rebuf-pips 27_35
CLK_BUFG_REBUF.GCLK2_ENABLE_BELOW origin:043-clk-rebuf-pips 27_33
CLK_BUFG_REBUF.GCLK3_ENABLE_ABOVE origin:043-clk-rebuf-pips 27_51
CLK_BUFG_REBUF.GCLK3_ENABLE_BELOW origin:043-clk-rebuf-pips 27_49
CLK_BUFG_REBUF.GCLK4_ENABLE_ABOVE origin:043-clk-rebuf-pips 27_67
CLK_BUFG_REBUF.GCLK4_ENABLE_BELOW origin:043-clk-rebuf-pips 27_65
CLK_BUFG_REBUF.GCLK5_ENABLE_ABOVE origin:043-clk-rebuf-pips 27_83
CLK_BUFG_REBUF.GCLK5_ENABLE_BELOW origin:043-clk-rebuf-pips 27_81
CLK_BUFG_REBUF.GCLK6_ENABLE_ABOVE origin:043-clk-rebuf-pips 27_99
CLK_BUFG_REBUF.GCLK6_ENABLE_BELOW origin:043-clk-rebuf-pips 27_97
CLK_BUFG_REBUF.GCLK7_ENABLE_ABOVE origin:043-clk-rebuf-pips 27_115
CLK_BUFG_REBUF.GCLK7_ENABLE_BELOW origin:043-clk-rebuf-pips 27_113
CLK_BUFG_REBUF.GCLK8_ENABLE_ABOVE origin:043-clk-rebuf-pips 26_03
CLK_BUFG_REBUF.GCLK8_ENABLE_BELOW origin:043-clk-rebuf-pips 26_01
CLK_BUFG_REBUF.GCLK9_ENABLE_ABOVE origin:043-clk-rebuf-pips 26_19
CLK_BUFG_REBUF.GCLK9_ENABLE_BELOW origin:043-clk-rebuf-pips 26_17
CLK_BUFG_REBUF.GCLK10_ENABLE_ABOVE origin:043-clk-rebuf-pips 26_35
CLK_BUFG_REBUF.GCLK10_ENABLE_BELOW origin:043-clk-rebuf-pips 26_33
CLK_BUFG_REBUF.GCLK11_ENABLE_ABOVE origin:043-clk-rebuf-pips 26_51
@ -84,8 +102,6 @@ CLK_BUFG_REBUF.GCLK18_ENABLE_ABOVE origin:043-clk-rebuf-pips 27_34
CLK_BUFG_REBUF.GCLK18_ENABLE_BELOW origin:043-clk-rebuf-pips 27_32
CLK_BUFG_REBUF.GCLK19_ENABLE_ABOVE origin:043-clk-rebuf-pips 27_50
CLK_BUFG_REBUF.GCLK19_ENABLE_BELOW origin:043-clk-rebuf-pips 27_48
CLK_BUFG_REBUF.GCLK1_ENABLE_ABOVE origin:043-clk-rebuf-pips 27_19
CLK_BUFG_REBUF.GCLK1_ENABLE_BELOW origin:043-clk-rebuf-pips 27_17
CLK_BUFG_REBUF.GCLK20_ENABLE_ABOVE origin:043-clk-rebuf-pips 27_66
CLK_BUFG_REBUF.GCLK20_ENABLE_BELOW origin:043-clk-rebuf-pips 27_64
CLK_BUFG_REBUF.GCLK21_ENABLE_ABOVE origin:043-clk-rebuf-pips 27_82
@ -106,23 +122,7 @@ CLK_BUFG_REBUF.GCLK28_ENABLE_ABOVE origin:043-clk-rebuf-pips 26_66
CLK_BUFG_REBUF.GCLK28_ENABLE_BELOW origin:043-clk-rebuf-pips 26_64
CLK_BUFG_REBUF.GCLK29_ENABLE_ABOVE origin:043-clk-rebuf-pips 26_82
CLK_BUFG_REBUF.GCLK29_ENABLE_BELOW origin:043-clk-rebuf-pips 26_80
CLK_BUFG_REBUF.GCLK2_ENABLE_ABOVE origin:043-clk-rebuf-pips 27_35
CLK_BUFG_REBUF.GCLK2_ENABLE_BELOW origin:043-clk-rebuf-pips 27_33
CLK_BUFG_REBUF.GCLK30_ENABLE_ABOVE origin:043-clk-rebuf-pips 26_98
CLK_BUFG_REBUF.GCLK30_ENABLE_BELOW origin:043-clk-rebuf-pips 26_96
CLK_BUFG_REBUF.GCLK31_ENABLE_ABOVE origin:043-clk-rebuf-pips 26_114
CLK_BUFG_REBUF.GCLK31_ENABLE_BELOW origin:043-clk-rebuf-pips 26_112
CLK_BUFG_REBUF.GCLK3_ENABLE_ABOVE origin:043-clk-rebuf-pips 27_51
CLK_BUFG_REBUF.GCLK3_ENABLE_BELOW origin:043-clk-rebuf-pips 27_49
CLK_BUFG_REBUF.GCLK4_ENABLE_ABOVE origin:043-clk-rebuf-pips 27_67
CLK_BUFG_REBUF.GCLK4_ENABLE_BELOW origin:043-clk-rebuf-pips 27_65
CLK_BUFG_REBUF.GCLK5_ENABLE_ABOVE origin:043-clk-rebuf-pips 27_83
CLK_BUFG_REBUF.GCLK5_ENABLE_BELOW origin:043-clk-rebuf-pips 27_81
CLK_BUFG_REBUF.GCLK6_ENABLE_ABOVE origin:043-clk-rebuf-pips 27_99
CLK_BUFG_REBUF.GCLK6_ENABLE_BELOW origin:043-clk-rebuf-pips 27_97
CLK_BUFG_REBUF.GCLK7_ENABLE_ABOVE origin:043-clk-rebuf-pips 27_115
CLK_BUFG_REBUF.GCLK7_ENABLE_BELOW origin:043-clk-rebuf-pips 27_113
CLK_BUFG_REBUF.GCLK8_ENABLE_ABOVE origin:043-clk-rebuf-pips 26_03
CLK_BUFG_REBUF.GCLK8_ENABLE_BELOW origin:043-clk-rebuf-pips 26_01
CLK_BUFG_REBUF.GCLK9_ENABLE_ABOVE origin:043-clk-rebuf-pips 26_19
CLK_BUFG_REBUF.GCLK9_ENABLE_BELOW origin:043-clk-rebuf-pips 26_17

460
artix7/segbits_clk_bufg_top_r.origin_info.db
View File

@ -1,5 +1,5 @@
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y0.INIT_OUT origin:042-clk-bufg-config 27_13
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y0.IN_USE origin:042-clk-bufg-config 27_00 27_15
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y0.INIT_OUT origin:042-clk-bufg-config 27_13
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y0.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_01
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y0.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_12
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y0.PRESELECT_I1 origin:042-clk-bufg-config 26_12
@ -8,8 +8,8 @@ CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y0.ZINV_CE1 origin:042-clk-bufg-config 27_11
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y0.ZINV_S0 origin:042-clk-bufg-config 27_03
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y0.ZINV_S1 origin:042-clk-bufg-config 26_11
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y0.ZPRESELECT_I0 origin:042-clk-bufg-config 26_02
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y1.INIT_OUT origin:042-clk-bufg-config 27_29
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y1.IN_USE origin:042-clk-bufg-config 27_16 27_31
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y1.INIT_OUT origin:042-clk-bufg-config 27_29
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y1.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_17
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y1.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_28
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y1.PRESELECT_I1 origin:042-clk-bufg-config 26_28
@ -18,68 +18,8 @@ CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y1.ZINV_CE1 origin:042-clk-bufg-config 27_27
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y1.ZINV_S0 origin:042-clk-bufg-config 27_19
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y1.ZINV_S1 origin:042-clk-bufg-config 26_27
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y1.ZPRESELECT_I0 origin:042-clk-bufg-config 26_18
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y10.INIT_OUT origin:042-clk-bufg-config 27_173
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y10.IN_USE origin:042-clk-bufg-config 27_160 27_175
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y10.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_161
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y10.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_172
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y10.PRESELECT_I1 origin:042-clk-bufg-config 26_172
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y10.ZINV_CE0 origin:042-clk-bufg-config 27_162
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y10.ZINV_CE1 origin:042-clk-bufg-config 27_171
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y10.ZINV_S0 origin:042-clk-bufg-config 27_163
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y10.ZINV_S1 origin:042-clk-bufg-config 26_171
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y10.ZPRESELECT_I0 origin:042-clk-bufg-config 26_162
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y11.INIT_OUT origin:042-clk-bufg-config 27_189
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y11.IN_USE origin:042-clk-bufg-config 27_176 27_191
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y11.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_177
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y11.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_188
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y11.PRESELECT_I1 origin:042-clk-bufg-config 26_188
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y11.ZINV_CE0 origin:042-clk-bufg-config 27_178
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y11.ZINV_CE1 origin:042-clk-bufg-config 27_187
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y11.ZINV_S0 origin:042-clk-bufg-config 27_179
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y11.ZINV_S1 origin:042-clk-bufg-config 26_187
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y11.ZPRESELECT_I0 origin:042-clk-bufg-config 26_178
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y12.INIT_OUT origin:042-clk-bufg-config 27_205
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y12.IN_USE origin:042-clk-bufg-config 27_192 27_207
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y12.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_193
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y12.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_204
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y12.PRESELECT_I1 origin:042-clk-bufg-config 26_204
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y12.ZINV_CE0 origin:042-clk-bufg-config 27_194
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y12.ZINV_CE1 origin:042-clk-bufg-config 27_203
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y12.ZINV_S0 origin:042-clk-bufg-config 27_195
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y12.ZINV_S1 origin:042-clk-bufg-config 26_203
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y12.ZPRESELECT_I0 origin:042-clk-bufg-config 26_194
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y13.INIT_OUT origin:042-clk-bufg-config 27_221
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y13.IN_USE origin:042-clk-bufg-config 27_208 27_223
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y13.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_209
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y13.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_220
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y13.PRESELECT_I1 origin:042-clk-bufg-config 26_220
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y13.ZINV_CE0 origin:042-clk-bufg-config 27_210
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y13.ZINV_CE1 origin:042-clk-bufg-config 27_219
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y13.ZINV_S0 origin:042-clk-bufg-config 27_211
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y13.ZINV_S1 origin:042-clk-bufg-config 26_219
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y13.ZPRESELECT_I0 origin:042-clk-bufg-config 26_210
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y14.INIT_OUT origin:042-clk-bufg-config 27_237
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y14.IN_USE origin:042-clk-bufg-config 27_224 27_239
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y14.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_225
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y14.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_236
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y14.PRESELECT_I1 origin:042-clk-bufg-config 26_236
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y14.ZINV_CE0 origin:042-clk-bufg-config 27_226
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y14.ZINV_CE1 origin:042-clk-bufg-config 27_235
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y14.ZINV_S0 origin:042-clk-bufg-config 27_227
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y14.ZINV_S1 origin:042-clk-bufg-config 26_235
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y14.ZPRESELECT_I0 origin:042-clk-bufg-config 26_226
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y15.INIT_OUT origin:042-clk-bufg-config 27_253
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y15.IN_USE origin:042-clk-bufg-config 27_240 27_255
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y15.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_241
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y15.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_252
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y15.PRESELECT_I1 origin:042-clk-bufg-config 26_252
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y15.ZINV_CE0 origin:042-clk-bufg-config 27_242
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y15.ZINV_CE1 origin:042-clk-bufg-config 27_251
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y15.ZINV_S0 origin:042-clk-bufg-config 27_243
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y15.ZINV_S1 origin:042-clk-bufg-config 26_251
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y15.ZPRESELECT_I0 origin:042-clk-bufg-config 26_242
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y2.INIT_OUT origin:042-clk-bufg-config 27_45
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y2.IN_USE origin:042-clk-bufg-config 27_32 27_47
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y2.INIT_OUT origin:042-clk-bufg-config 27_45
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y2.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_33
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y2.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_44
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y2.PRESELECT_I1 origin:042-clk-bufg-config 26_44
@ -88,8 +28,8 @@ CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y2.ZINV_CE1 origin:042-clk-bufg-config 27_43
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y2.ZINV_S0 origin:042-clk-bufg-config 27_35
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y2.ZINV_S1 origin:042-clk-bufg-config 26_43
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y2.ZPRESELECT_I0 origin:042-clk-bufg-config 26_34
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y3.INIT_OUT origin:042-clk-bufg-config 27_61
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y3.IN_USE origin:042-clk-bufg-config 27_48 27_63
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y3.INIT_OUT origin:042-clk-bufg-config 27_61
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y3.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_49
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y3.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_60
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y3.PRESELECT_I1 origin:042-clk-bufg-config 26_60
@ -98,8 +38,8 @@ CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y3.ZINV_CE1 origin:042-clk-bufg-config 27_59
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y3.ZINV_S0 origin:042-clk-bufg-config 27_51
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y3.ZINV_S1 origin:042-clk-bufg-config 26_59
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y3.ZPRESELECT_I0 origin:042-clk-bufg-config 26_50
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y4.INIT_OUT origin:042-clk-bufg-config 27_77
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y4.IN_USE origin:042-clk-bufg-config 27_64 27_79
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y4.INIT_OUT origin:042-clk-bufg-config 27_77
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y4.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_65
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y4.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_76
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y4.PRESELECT_I1 origin:042-clk-bufg-config 26_76
@ -108,8 +48,8 @@ CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y4.ZINV_CE1 origin:042-clk-bufg-config 27_75
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y4.ZINV_S0 origin:042-clk-bufg-config 27_67
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y4.ZINV_S1 origin:042-clk-bufg-config 26_75
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y4.ZPRESELECT_I0 origin:042-clk-bufg-config 26_66
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y5.INIT_OUT origin:042-clk-bufg-config 27_93
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y5.IN_USE origin:042-clk-bufg-config 27_80 27_95
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y5.INIT_OUT origin:042-clk-bufg-config 27_93
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y5.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_81
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y5.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_92
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y5.PRESELECT_I1 origin:042-clk-bufg-config 26_92
@ -118,8 +58,8 @@ CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y5.ZINV_CE1 origin:042-clk-bufg-config 27_91
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y5.ZINV_S0 origin:042-clk-bufg-config 27_83
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y5.ZINV_S1 origin:042-clk-bufg-config 26_91
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y5.ZPRESELECT_I0 origin:042-clk-bufg-config 26_82
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y6.INIT_OUT origin:042-clk-bufg-config 27_109
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y6.IN_USE origin:042-clk-bufg-config 27_111 27_96
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y6.INIT_OUT origin:042-clk-bufg-config 27_109
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y6.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_97
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y6.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_108
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y6.PRESELECT_I1 origin:042-clk-bufg-config 26_108
@ -128,8 +68,8 @@ CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y6.ZINV_CE1 origin:042-clk-bufg-config 27_107
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y6.ZINV_S0 origin:042-clk-bufg-config 27_99
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y6.ZINV_S1 origin:042-clk-bufg-config 26_107
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y6.ZPRESELECT_I0 origin:042-clk-bufg-config 26_98
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y7.INIT_OUT origin:042-clk-bufg-config 27_125
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y7.IN_USE origin:042-clk-bufg-config 27_112 27_127
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y7.INIT_OUT origin:042-clk-bufg-config 27_125
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y7.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_113
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y7.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_124
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y7.PRESELECT_I1 origin:042-clk-bufg-config 26_124
@ -138,8 +78,8 @@ CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y7.ZINV_CE1 origin:042-clk-bufg-config 27_123
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y7.ZINV_S0 origin:042-clk-bufg-config 27_115
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y7.ZINV_S1 origin:042-clk-bufg-config 26_123
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y7.ZPRESELECT_I0 origin:042-clk-bufg-config 26_114
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y8.INIT_OUT origin:042-clk-bufg-config 27_141
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y8.IN_USE origin:042-clk-bufg-config 27_128 27_143
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y8.INIT_OUT origin:042-clk-bufg-config 27_141
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y8.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_129
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y8.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_140
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y8.PRESELECT_I1 origin:042-clk-bufg-config 26_140
@ -148,8 +88,8 @@ CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y8.ZINV_CE1 origin:042-clk-bufg-config 27_139
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y8.ZINV_S0 origin:042-clk-bufg-config 27_131
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y8.ZINV_S1 origin:042-clk-bufg-config 26_139
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y8.ZPRESELECT_I0 origin:042-clk-bufg-config 26_130
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y9.INIT_OUT origin:042-clk-bufg-config 27_157
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y9.IN_USE origin:042-clk-bufg-config 27_144 27_159
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y9.INIT_OUT origin:042-clk-bufg-config 27_157
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y9.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_145
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y9.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_156
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y9.PRESELECT_I1 origin:042-clk-bufg-config 26_156
@ -158,166 +98,66 @@ CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y9.ZINV_CE1 origin:042-clk-bufg-config 27_155
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y9.ZINV_S0 origin:042-clk-bufg-config 27_147
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y9.ZINV_S1 origin:042-clk-bufg-config 26_155
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y9.ZPRESELECT_I0 origin:042-clk-bufg-config 26_146
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL0_I0.CLK_BUFG_IMUX24_0 origin:044-clk-bufg-pips !26_07 !26_08 27_06
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL0_I0.CLK_BUFG_IMUX28_0 origin:044-clk-bufg-pips !26_07 !26_08 !27_06
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL0_I0.CLK_BUFG_R_FBG_OUT1 origin:044-clk-bufg-pips !26_08 26_07 27_06
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL0_I0.CLK_BUFG_R_FBG_OUT15 origin:044-clk-bufg-pips !26_08 !27_06 26_07
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL0_I0.CLK_BUFG_TOP_R_CK_MUXED0 origin:046-clk-bufg-muxed-pips !26_07 !27_06 26_08
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL0_I1.CLK_BUFG_IMUX24_0 origin:044-clk-bufg-pips !26_04 !27_05 26_05
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL0_I1.CLK_BUFG_IMUX28_0 origin:044-clk-bufg-pips !26_04 !26_05 !27_05
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL0_I1.CLK_BUFG_R_FBG_OUT1 origin:044-clk-bufg-pips !26_04 26_05 27_05
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL0_I1.CLK_BUFG_R_FBG_OUT15 origin:044-clk-bufg-pips !26_04 !26_05 27_05
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL0_I1.CLK_BUFG_TOP_R_CK_MUXED1 origin:046-clk-bufg-muxed-pips !26_05 !27_05 26_04
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_IMUX26_2 origin:044-clk-bufg-pips !26_167 !26_168 27_166
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_IMUX30_2 origin:044-clk-bufg-pips !26_167 !26_168 !27_166
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_R_FBG_OUT11 origin:044-clk-bufg-pips !26_168 26_167 27_166
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_R_FBG_OUT9 origin:044-clk-bufg-pips !26_168 !27_166 26_167
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_TOP_R_CK_MUXED20 origin:046-clk-bufg-muxed-pips !26_167 !27_166 26_168
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_IMUX26_2 origin:044-clk-bufg-pips !26_164 !27_165 26_165
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_IMUX30_2 origin:044-clk-bufg-pips !26_164 !26_165 !27_165
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_R_FBG_OUT11 origin:044-clk-bufg-pips !26_164 26_165 27_165
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_R_FBG_OUT9 origin:044-clk-bufg-pips !26_164 !26_165 27_165
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_TOP_R_CK_MUXED21 origin:046-clk-bufg-muxed-pips !26_165 !27_165 26_164
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_IMUX27_2 origin:044-clk-bufg-pips !26_183 !26_184 27_182
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_IMUX31_2 origin:044-clk-bufg-pips !26_183 !26_184 !27_182
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_R_FBG_OUT10 origin:044-clk-bufg-pips !26_184 !27_182 26_183
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_R_FBG_OUT12 origin:044-clk-bufg-pips !26_184 26_183 27_182
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_TOP_R_CK_MUXED22 origin:046-clk-bufg-muxed-pips !26_183 !27_182 26_184
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_IMUX27_2 origin:044-clk-bufg-pips !26_180 !27_181 26_181
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_IMUX31_2 origin:044-clk-bufg-pips !26_180 !26_181 !27_181
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_R_FBG_OUT10 origin:044-clk-bufg-pips !26_180 !26_181 27_181
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_R_FBG_OUT12 origin:044-clk-bufg-pips !26_180 26_181 27_181
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_TOP_R_CK_MUXED23 origin:046-clk-bufg-muxed-pips !26_181 !27_181 26_180
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_IMUX24_3 origin:044-clk-bufg-pips !26_199 !26_200 27_198
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_IMUX28_3 origin:044-clk-bufg-pips !26_199 !26_200 !27_198
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_R_FBG_OUT11 origin:044-clk-bufg-pips !26_200 !27_198 26_199
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_R_FBG_OUT13 origin:044-clk-bufg-pips !26_200 26_199 27_198
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_TOP_R_CK_MUXED24 origin:046-clk-bufg-muxed-pips !26_199 !27_198 26_200
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_IMUX24_3 origin:044-clk-bufg-pips !26_196 !27_197 26_197
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_IMUX28_3 origin:044-clk-bufg-pips !26_196 !26_197 !27_197
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_R_FBG_OUT11 origin:044-clk-bufg-pips !26_196 !26_197 27_197
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_R_FBG_OUT13 origin:044-clk-bufg-pips !26_196 26_197 27_197
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_TOP_R_CK_MUXED25 origin:046-clk-bufg-muxed-pips !26_197 !27_197 26_196
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_IMUX25_3 origin:044-clk-bufg-pips !26_215 !26_216 27_214
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_IMUX29_3 origin:044-clk-bufg-pips !26_215 !26_216 !27_214
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_R_FBG_OUT12 origin:044-clk-bufg-pips !26_216 !27_214 26_215
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_R_FBG_OUT14 origin:044-clk-bufg-pips !26_216 26_215 27_214
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_TOP_R_CK_MUXED26 origin:046-clk-bufg-muxed-pips !26_215 !27_214 26_216
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_IMUX25_3 origin:044-clk-bufg-pips !26_212 !27_213 26_213
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_IMUX29_3 origin:044-clk-bufg-pips !26_212 !26_213 !27_213
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_R_FBG_OUT12 origin:044-clk-bufg-pips !26_212 !26_213 27_213
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_R_FBG_OUT14 origin:044-clk-bufg-pips !26_212 26_213 27_213
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_TOP_R_CK_MUXED27 origin:046-clk-bufg-muxed-pips !26_213 !27_213 26_212
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_IMUX26_3 origin:044-clk-bufg-pips !26_231 !26_232 27_230
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_IMUX30_3 origin:044-clk-bufg-pips !26_231 !26_232 !27_230
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_R_FBG_OUT13 origin:044-clk-bufg-pips !26_232 !27_230 26_231
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_R_FBG_OUT15 origin:044-clk-bufg-pips !26_232 26_231 27_230
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_TOP_R_CK_MUXED28 origin:046-clk-bufg-muxed-pips !26_231 !27_230 26_232
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_IMUX26_3 origin:044-clk-bufg-pips !26_228 !27_229 26_229
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_IMUX30_3 origin:044-clk-bufg-pips !26_228 !26_229 !27_229
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_R_FBG_OUT13 origin:044-clk-bufg-pips !26_228 !26_229 27_229
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_R_FBG_OUT15 origin:044-clk-bufg-pips !26_228 26_229 27_229
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_TOP_R_CK_MUXED29 origin:046-clk-bufg-muxed-pips !26_229 !27_229 26_228
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_IMUX27_3 origin:044-clk-bufg-pips !26_247 !26_248 27_246
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_IMUX31_3 origin:044-clk-bufg-pips !26_247 !26_248 !27_246
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_R_FBG_OUT0 origin:044-clk-bufg-pips !26_248 26_247 27_246
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_R_FBG_OUT14 origin:044-clk-bufg-pips !26_248 !27_246 26_247
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_TOP_R_CK_MUXED30 origin:046-clk-bufg-muxed-pips !26_247 !27_246 26_248
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_IMUX27_3 origin:044-clk-bufg-pips !26_244 !27_245 26_245
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_IMUX31_3 origin:044-clk-bufg-pips !26_244 !26_245 !27_245
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_R_FBG_OUT0 origin:044-clk-bufg-pips !26_244 26_245 27_245
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_R_FBG_OUT14 origin:044-clk-bufg-pips !26_244 !26_245 27_245
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_TOP_R_CK_MUXED31 origin:046-clk-bufg-muxed-pips !26_245 !27_245 26_244
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL1_I0.CLK_BUFG_IMUX25_0 origin:044-clk-bufg-pips !26_23 !26_24 27_22
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL1_I0.CLK_BUFG_IMUX29_0 origin:044-clk-bufg-pips !26_23 !26_24 !27_22
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL1_I0.CLK_BUFG_R_FBG_OUT0 origin:044-clk-bufg-pips !26_24 !27_22 26_23
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL1_I0.CLK_BUFG_R_FBG_OUT2 origin:044-clk-bufg-pips !26_24 26_23 27_22
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL1_I0.CLK_BUFG_TOP_R_CK_MUXED2 origin:046-clk-bufg-muxed-pips !26_23 !27_22 26_24
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL1_I1.CLK_BUFG_IMUX25_0 origin:044-clk-bufg-pips !26_20 !27_21 26_21
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL1_I1.CLK_BUFG_IMUX29_0 origin:044-clk-bufg-pips !26_20 !26_21 !27_21
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL1_I1.CLK_BUFG_R_FBG_OUT0 origin:044-clk-bufg-pips !26_20 !26_21 27_21
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL1_I1.CLK_BUFG_R_FBG_OUT2 origin:044-clk-bufg-pips !26_20 26_21 27_21
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL1_I1.CLK_BUFG_TOP_R_CK_MUXED3 origin:046-clk-bufg-muxed-pips !26_21 !27_21 26_20
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL2_I0.CLK_BUFG_IMUX26_0 origin:044-clk-bufg-pips !26_39 !26_40 27_38
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL2_I0.CLK_BUFG_IMUX30_0 origin:044-clk-bufg-pips !26_39 !26_40 !27_38
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL2_I0.CLK_BUFG_R_FBG_OUT1 origin:044-clk-bufg-pips !26_40 !27_38 26_39
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL2_I0.CLK_BUFG_R_FBG_OUT3 origin:044-clk-bufg-pips !26_40 26_39 27_38
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL2_I0.CLK_BUFG_TOP_R_CK_MUXED4 origin:046-clk-bufg-muxed-pips !26_39 !27_38 26_40
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL2_I1.CLK_BUFG_IMUX26_0 origin:044-clk-bufg-pips !26_36 !27_37 26_37
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL2_I1.CLK_BUFG_IMUX30_0 origin:044-clk-bufg-pips !26_36 !26_37 !27_37
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL2_I1.CLK_BUFG_R_FBG_OUT1 origin:044-clk-bufg-pips !26_36 !26_37 27_37
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL2_I1.CLK_BUFG_R_FBG_OUT3 origin:044-clk-bufg-pips !26_36 26_37 27_37
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL2_I1.CLK_BUFG_TOP_R_CK_MUXED5 origin:046-clk-bufg-muxed-pips !26_37 !27_37 26_36
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL3_I0.CLK_BUFG_IMUX27_0 origin:044-clk-bufg-pips !26_55 !26_56 27_54
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL3_I0.CLK_BUFG_IMUX31_0 origin:044-clk-bufg-pips !26_55 !26_56 !27_54
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL3_I0.CLK_BUFG_R_FBG_OUT2 origin:044-clk-bufg-pips !26_56 !27_54 26_55
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL3_I0.CLK_BUFG_R_FBG_OUT4 origin:044-clk-bufg-pips !26_56 26_55 27_54
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL3_I0.CLK_BUFG_TOP_R_CK_MUXED6 origin:046-clk-bufg-muxed-pips !26_55 !27_54 26_56
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL3_I1.CLK_BUFG_IMUX27_0 origin:044-clk-bufg-pips !26_52 !27_53 26_53
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL3_I1.CLK_BUFG_IMUX31_0 origin:044-clk-bufg-pips !26_52 !26_53 !27_53
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL3_I1.CLK_BUFG_R_FBG_OUT2 origin:044-clk-bufg-pips !26_52 !26_53 27_53
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL3_I1.CLK_BUFG_R_FBG_OUT4 origin:044-clk-bufg-pips !26_52 26_53 27_53
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL3_I1.CLK_BUFG_TOP_R_CK_MUXED7 origin:046-clk-bufg-muxed-pips !26_53 !27_53 26_52
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL4_I0.CLK_BUFG_IMUX24_1 origin:044-clk-bufg-pips !26_71 !26_72 27_70
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL4_I0.CLK_BUFG_IMUX28_1 origin:044-clk-bufg-pips !26_71 !26_72 !27_70
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL4_I0.CLK_BUFG_R_FBG_OUT3 origin:044-clk-bufg-pips !26_72 !27_70 26_71
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL4_I0.CLK_BUFG_R_FBG_OUT5 origin:044-clk-bufg-pips !26_72 26_71 27_70
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL4_I0.CLK_BUFG_TOP_R_CK_MUXED8 origin:046-clk-bufg-muxed-pips !26_71 !27_70 26_72
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL4_I1.CLK_BUFG_IMUX24_1 origin:044-clk-bufg-pips !26_68 !27_69 26_69
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL4_I1.CLK_BUFG_IMUX28_1 origin:044-clk-bufg-pips !26_68 !26_69 !27_69
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL4_I1.CLK_BUFG_R_FBG_OUT3 origin:044-clk-bufg-pips !26_68 !26_69 27_69
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL4_I1.CLK_BUFG_R_FBG_OUT5 origin:044-clk-bufg-pips !26_68 26_69 27_69
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL4_I1.CLK_BUFG_TOP_R_CK_MUXED9 origin:046-clk-bufg-muxed-pips !26_69 !27_69 26_68
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL5_I0.CLK_BUFG_IMUX25_1 origin:044-clk-bufg-pips !26_87 !26_88 27_86
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL5_I0.CLK_BUFG_IMUX29_1 origin:044-clk-bufg-pips !26_87 !26_88 !27_86
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL5_I0.CLK_BUFG_R_FBG_OUT4 origin:044-clk-bufg-pips !26_88 !27_86 26_87
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL5_I0.CLK_BUFG_R_FBG_OUT6 origin:044-clk-bufg-pips !26_88 26_87 27_86
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL5_I0.CLK_BUFG_TOP_R_CK_MUXED10 origin:046-clk-bufg-muxed-pips !26_87 !27_86 26_88
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL5_I1.CLK_BUFG_IMUX25_1 origin:044-clk-bufg-pips !26_84 !27_85 26_85
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL5_I1.CLK_BUFG_IMUX29_1 origin:044-clk-bufg-pips !26_84 !26_85 !27_85
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL5_I1.CLK_BUFG_R_FBG_OUT4 origin:044-clk-bufg-pips !26_84 !26_85 27_85
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL5_I1.CLK_BUFG_R_FBG_OUT6 origin:044-clk-bufg-pips !26_84 26_85 27_85
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL5_I1.CLK_BUFG_TOP_R_CK_MUXED11 origin:046-clk-bufg-muxed-pips !26_85 !27_85 26_84
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL6_I0.CLK_BUFG_IMUX26_1 origin:044-clk-bufg-pips !26_103 !26_104 27_102
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL6_I0.CLK_BUFG_IMUX30_1 origin:044-clk-bufg-pips !26_103 !26_104 !27_102
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL6_I0.CLK_BUFG_R_FBG_OUT5 origin:044-clk-bufg-pips !26_104 !27_102 26_103
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL6_I0.CLK_BUFG_R_FBG_OUT7 origin:044-clk-bufg-pips !26_104 26_103 27_102
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL6_I0.CLK_BUFG_TOP_R_CK_MUXED12 origin:046-clk-bufg-muxed-pips !26_103 !27_102 26_104
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL6_I1.CLK_BUFG_IMUX26_1 origin:044-clk-bufg-pips !26_100 !27_101 26_101
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL6_I1.CLK_BUFG_IMUX30_1 origin:044-clk-bufg-pips !26_100 !26_101 !27_101
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL6_I1.CLK_BUFG_R_FBG_OUT5 origin:044-clk-bufg-pips !26_100 !26_101 27_101
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL6_I1.CLK_BUFG_R_FBG_OUT7 origin:044-clk-bufg-pips !26_100 26_101 27_101
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL6_I1.CLK_BUFG_TOP_R_CK_MUXED13 origin:046-clk-bufg-muxed-pips !26_101 !27_101 26_100
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL7_I0.CLK_BUFG_IMUX27_1 origin:044-clk-bufg-pips !26_119 !26_120 27_118
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL7_I0.CLK_BUFG_IMUX31_1 origin:044-clk-bufg-pips !26_119 !26_120 !27_118
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL7_I0.CLK_BUFG_R_FBG_OUT6 origin:044-clk-bufg-pips !26_120 !27_118 26_119
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL7_I0.CLK_BUFG_R_FBG_OUT8 origin:044-clk-bufg-pips !26_120 26_119 27_118
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL7_I0.CLK_BUFG_TOP_R_CK_MUXED14 origin:046-clk-bufg-muxed-pips !26_119 !27_118 26_120
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL7_I1.CLK_BUFG_IMUX27_1 origin:044-clk-bufg-pips !26_116 !27_117 26_117
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL7_I1.CLK_BUFG_IMUX31_1 origin:044-clk-bufg-pips !26_116 !26_117 !27_117
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL7_I1.CLK_BUFG_R_FBG_OUT6 origin:044-clk-bufg-pips !26_116 !26_117 27_117
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL7_I1.CLK_BUFG_R_FBG_OUT8 origin:044-clk-bufg-pips !26_116 26_117 27_117
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL7_I1.CLK_BUFG_TOP_R_CK_MUXED15 origin:046-clk-bufg-muxed-pips !26_117 !27_117 26_116
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL8_I0.CLK_BUFG_IMUX24_2 origin:044-clk-bufg-pips !26_135 !26_136 27_134
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL8_I0.CLK_BUFG_IMUX28_2 origin:044-clk-bufg-pips !26_135 !26_136 !27_134
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL8_I0.CLK_BUFG_R_FBG_OUT7 origin:044-clk-bufg-pips !26_136 !27_134 26_135
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL8_I0.CLK_BUFG_R_FBG_OUT9 origin:044-clk-bufg-pips !26_136 26_135 27_134
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL8_I0.CLK_BUFG_TOP_R_CK_MUXED16 origin:046-clk-bufg-muxed-pips !26_135 !27_134 26_136
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL8_I1.CLK_BUFG_IMUX24_2 origin:044-clk-bufg-pips !26_132 !27_133 26_133
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL8_I1.CLK_BUFG_IMUX28_2 origin:044-clk-bufg-pips !26_132 !26_133 !27_133
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL8_I1.CLK_BUFG_R_FBG_OUT7 origin:044-clk-bufg-pips !26_132 !26_133 27_133
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL8_I1.CLK_BUFG_R_FBG_OUT9 origin:044-clk-bufg-pips !26_132 26_133 27_133
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL8_I1.CLK_BUFG_TOP_R_CK_MUXED17 origin:046-clk-bufg-muxed-pips !26_133 !27_133 26_132
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL9_I0.CLK_BUFG_IMUX25_2 origin:044-clk-bufg-pips !26_151 !26_152 27_150
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL9_I0.CLK_BUFG_IMUX29_2 origin:044-clk-bufg-pips !26_151 !26_152 !27_150
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL9_I0.CLK_BUFG_R_FBG_OUT10 origin:044-clk-bufg-pips !26_152 26_151 27_150
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL9_I0.CLK_BUFG_R_FBG_OUT8 origin:044-clk-bufg-pips !26_152 !27_150 26_151
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL9_I0.CLK_BUFG_TOP_R_CK_MUXED18 origin:046-clk-bufg-muxed-pips !26_151 !27_150 26_152
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL9_I1.CLK_BUFG_IMUX25_2 origin:044-clk-bufg-pips !26_148 !27_149 26_149
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL9_I1.CLK_BUFG_IMUX29_2 origin:044-clk-bufg-pips !26_148 !26_149 !27_149
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL9_I1.CLK_BUFG_R_FBG_OUT10 origin:044-clk-bufg-pips !26_148 26_149 27_149
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL9_I1.CLK_BUFG_R_FBG_OUT8 origin:044-clk-bufg-pips !26_148 !26_149 27_149
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL9_I1.CLK_BUFG_TOP_R_CK_MUXED19 origin:046-clk-bufg-muxed-pips !26_149 !27_149 26_148
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y10.IN_USE origin:042-clk-bufg-config 27_160 27_175
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y10.INIT_OUT origin:042-clk-bufg-config 27_173
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y10.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_161
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y10.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_172
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y10.PRESELECT_I1 origin:042-clk-bufg-config 26_172
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y10.ZINV_CE0 origin:042-clk-bufg-config 27_162
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y10.ZINV_CE1 origin:042-clk-bufg-config 27_171
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y10.ZINV_S0 origin:042-clk-bufg-config 27_163
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y10.ZINV_S1 origin:042-clk-bufg-config 26_171
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y10.ZPRESELECT_I0 origin:042-clk-bufg-config 26_162
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y11.IN_USE origin:042-clk-bufg-config 27_176 27_191
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y11.INIT_OUT origin:042-clk-bufg-config 27_189
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y11.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_177
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y11.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_188
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y11.PRESELECT_I1 origin:042-clk-bufg-config 26_188
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y11.ZINV_CE0 origin:042-clk-bufg-config 27_178
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y11.ZINV_CE1 origin:042-clk-bufg-config 27_187
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y11.ZINV_S0 origin:042-clk-bufg-config 27_179
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y11.ZINV_S1 origin:042-clk-bufg-config 26_187
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y11.ZPRESELECT_I0 origin:042-clk-bufg-config 26_178
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y12.IN_USE origin:042-clk-bufg-config 27_192 27_207
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y12.INIT_OUT origin:042-clk-bufg-config 27_205
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y12.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_193
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y12.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_204
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y12.PRESELECT_I1 origin:042-clk-bufg-config 26_204
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y12.ZINV_CE0 origin:042-clk-bufg-config 27_194
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y12.ZINV_CE1 origin:042-clk-bufg-config 27_203
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y12.ZINV_S0 origin:042-clk-bufg-config 27_195
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y12.ZINV_S1 origin:042-clk-bufg-config 26_203
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y12.ZPRESELECT_I0 origin:042-clk-bufg-config 26_194
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y13.IN_USE origin:042-clk-bufg-config 27_208 27_223
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y13.INIT_OUT origin:042-clk-bufg-config 27_221
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y13.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_209
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y13.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_220
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y13.PRESELECT_I1 origin:042-clk-bufg-config 26_220
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y13.ZINV_CE0 origin:042-clk-bufg-config 27_210
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y13.ZINV_CE1 origin:042-clk-bufg-config 27_219
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y13.ZINV_S0 origin:042-clk-bufg-config 27_211
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y13.ZINV_S1 origin:042-clk-bufg-config 26_219
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y13.ZPRESELECT_I0 origin:042-clk-bufg-config 26_210
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y14.IN_USE origin:042-clk-bufg-config 27_224 27_239
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y14.INIT_OUT origin:042-clk-bufg-config 27_237
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y14.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_225
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y14.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_236
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y14.PRESELECT_I1 origin:042-clk-bufg-config 26_236
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y14.ZINV_CE0 origin:042-clk-bufg-config 27_226
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y14.ZINV_CE1 origin:042-clk-bufg-config 27_235
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y14.ZINV_S0 origin:042-clk-bufg-config 27_227
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y14.ZINV_S1 origin:042-clk-bufg-config 26_235
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y14.ZPRESELECT_I0 origin:042-clk-bufg-config 26_226
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y15.IN_USE origin:042-clk-bufg-config 27_240 27_255
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y15.INIT_OUT origin:042-clk-bufg-config 27_253
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y15.IS_IGNORE0_INVERTED origin:042-clk-bufg-config 26_241
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y15.IS_IGNORE1_INVERTED origin:042-clk-bufg-config 27_252
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y15.PRESELECT_I1 origin:042-clk-bufg-config 26_252
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y15.ZINV_CE0 origin:042-clk-bufg-config 27_242
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y15.ZINV_CE1 origin:042-clk-bufg-config 27_251
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y15.ZINV_S0 origin:042-clk-bufg-config 27_243
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y15.ZINV_S1 origin:042-clk-bufg-config 26_251
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y15.ZPRESELECT_I0 origin:042-clk-bufg-config 26_242
CLK_BUFG_TOP_R.CLK_BUFG_CK_GCLK16.CLK_BUFG_BUFGCTRL0_O origin:044-clk-bufg-pips 27_14
CLK_BUFG_TOP_R.CLK_BUFG_CK_GCLK17.CLK_BUFG_BUFGCTRL1_O origin:044-clk-bufg-pips 27_30
CLK_BUFG_TOP_R.CLK_BUFG_CK_GCLK18.CLK_BUFG_BUFGCTRL2_O origin:044-clk-bufg-pips 27_46
@ -334,3 +174,163 @@ CLK_BUFG_TOP_R.CLK_BUFG_CK_GCLK28.CLK_BUFG_BUFGCTRL12_O origin:044-clk-bufg-pips
CLK_BUFG_TOP_R.CLK_BUFG_CK_GCLK29.CLK_BUFG_BUFGCTRL13_O origin:044-clk-bufg-pips 27_222
CLK_BUFG_TOP_R.CLK_BUFG_CK_GCLK30.CLK_BUFG_BUFGCTRL14_O origin:044-clk-bufg-pips 27_238
CLK_BUFG_TOP_R.CLK_BUFG_CK_GCLK31.CLK_BUFG_BUFGCTRL15_O origin:044-clk-bufg-pips 27_254
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL0_I0.CLK_BUFG_R_FBG_OUT1 origin:044-clk-bufg-pips !26_08 26_07 27_06
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL0_I0.CLK_BUFG_R_FBG_OUT15 origin:044-clk-bufg-pips !26_08 !27_06 26_07
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL0_I0.CLK_BUFG_TOP_R_CK_MUXED0 origin:046-clk-bufg-muxed-pips !26_07 !27_06 26_08
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL0_I0.CLK_BUFG_IMUX24_0 origin:044-clk-bufg-pips !26_07 !26_08 27_06
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL0_I0.CLK_BUFG_IMUX28_0 origin:044-clk-bufg-pips !26_07 !26_08 !27_06
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL0_I1.CLK_BUFG_R_FBG_OUT1 origin:044-clk-bufg-pips !26_04 26_05 27_05
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL0_I1.CLK_BUFG_R_FBG_OUT15 origin:044-clk-bufg-pips !26_04 !26_05 27_05
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL0_I1.CLK_BUFG_TOP_R_CK_MUXED1 origin:046-clk-bufg-muxed-pips !26_05 !27_05 26_04
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL0_I1.CLK_BUFG_IMUX24_0 origin:044-clk-bufg-pips !26_04 !27_05 26_05
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL0_I1.CLK_BUFG_IMUX28_0 origin:044-clk-bufg-pips !26_04 !26_05 !27_05
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL1_I0.CLK_BUFG_R_FBG_OUT0 origin:044-clk-bufg-pips !26_24 !27_22 26_23
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL1_I0.CLK_BUFG_R_FBG_OUT2 origin:044-clk-bufg-pips !26_24 26_23 27_22
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL1_I0.CLK_BUFG_TOP_R_CK_MUXED2 origin:046-clk-bufg-muxed-pips !26_23 !27_22 26_24
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL1_I0.CLK_BUFG_IMUX25_0 origin:044-clk-bufg-pips !26_23 !26_24 27_22
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL1_I0.CLK_BUFG_IMUX29_0 origin:044-clk-bufg-pips !26_23 !26_24 !27_22
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL1_I1.CLK_BUFG_R_FBG_OUT0 origin:044-clk-bufg-pips !26_20 !26_21 27_21
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL1_I1.CLK_BUFG_R_FBG_OUT2 origin:044-clk-bufg-pips !26_20 26_21 27_21
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL1_I1.CLK_BUFG_TOP_R_CK_MUXED3 origin:046-clk-bufg-muxed-pips !26_21 !27_21 26_20
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL1_I1.CLK_BUFG_IMUX25_0 origin:044-clk-bufg-pips !26_20 !27_21 26_21
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL1_I1.CLK_BUFG_IMUX29_0 origin:044-clk-bufg-pips !26_20 !26_21 !27_21
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL2_I0.CLK_BUFG_R_FBG_OUT1 origin:044-clk-bufg-pips !26_40 !27_38 26_39
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL2_I0.CLK_BUFG_R_FBG_OUT3 origin:044-clk-bufg-pips !26_40 26_39 27_38
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL2_I0.CLK_BUFG_TOP_R_CK_MUXED4 origin:046-clk-bufg-muxed-pips !26_39 !27_38 26_40
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL2_I0.CLK_BUFG_IMUX26_0 origin:044-clk-bufg-pips !26_39 !26_40 27_38
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL2_I0.CLK_BUFG_IMUX30_0 origin:044-clk-bufg-pips !26_39 !26_40 !27_38
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL2_I1.CLK_BUFG_R_FBG_OUT1 origin:044-clk-bufg-pips !26_36 !26_37 27_37
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL2_I1.CLK_BUFG_R_FBG_OUT3 origin:044-clk-bufg-pips !26_36 26_37 27_37
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL2_I1.CLK_BUFG_TOP_R_CK_MUXED5 origin:046-clk-bufg-muxed-pips !26_37 !27_37 26_36
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL2_I1.CLK_BUFG_IMUX26_0 origin:044-clk-bufg-pips !26_36 !27_37 26_37
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL2_I1.CLK_BUFG_IMUX30_0 origin:044-clk-bufg-pips !26_36 !26_37 !27_37
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL3_I0.CLK_BUFG_R_FBG_OUT2 origin:044-clk-bufg-pips !26_56 !27_54 26_55
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL3_I0.CLK_BUFG_R_FBG_OUT4 origin:044-clk-bufg-pips !26_56 26_55 27_54
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL3_I0.CLK_BUFG_TOP_R_CK_MUXED6 origin:046-clk-bufg-muxed-pips !26_55 !27_54 26_56
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL3_I0.CLK_BUFG_IMUX27_0 origin:044-clk-bufg-pips !26_55 !26_56 27_54
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL3_I0.CLK_BUFG_IMUX31_0 origin:044-clk-bufg-pips !26_55 !26_56 !27_54
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL3_I1.CLK_BUFG_R_FBG_OUT2 origin:044-clk-bufg-pips !26_52 !26_53 27_53
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL3_I1.CLK_BUFG_R_FBG_OUT4 origin:044-clk-bufg-pips !26_52 26_53 27_53
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL3_I1.CLK_BUFG_TOP_R_CK_MUXED7 origin:046-clk-bufg-muxed-pips !26_53 !27_53 26_52
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL3_I1.CLK_BUFG_IMUX27_0 origin:044-clk-bufg-pips !26_52 !27_53 26_53
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL3_I1.CLK_BUFG_IMUX31_0 origin:044-clk-bufg-pips !26_52 !26_53 !27_53
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL4_I0.CLK_BUFG_R_FBG_OUT3 origin:044-clk-bufg-pips !26_72 !27_70 26_71
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL4_I0.CLK_BUFG_R_FBG_OUT5 origin:044-clk-bufg-pips !26_72 26_71 27_70
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL4_I0.CLK_BUFG_TOP_R_CK_MUXED8 origin:046-clk-bufg-muxed-pips !26_71 !27_70 26_72
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL4_I0.CLK_BUFG_IMUX24_1 origin:044-clk-bufg-pips !26_71 !26_72 27_70
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL4_I0.CLK_BUFG_IMUX28_1 origin:044-clk-bufg-pips !26_71 !26_72 !27_70
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL4_I1.CLK_BUFG_R_FBG_OUT3 origin:044-clk-bufg-pips !26_68 !26_69 27_69
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL4_I1.CLK_BUFG_R_FBG_OUT5 origin:044-clk-bufg-pips !26_68 26_69 27_69
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL4_I1.CLK_BUFG_TOP_R_CK_MUXED9 origin:046-clk-bufg-muxed-pips !26_69 !27_69 26_68
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL4_I1.CLK_BUFG_IMUX24_1 origin:044-clk-bufg-pips !26_68 !27_69 26_69
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL4_I1.CLK_BUFG_IMUX28_1 origin:044-clk-bufg-pips !26_68 !26_69 !27_69
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL5_I0.CLK_BUFG_R_FBG_OUT4 origin:044-clk-bufg-pips !26_88 !27_86 26_87
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL5_I0.CLK_BUFG_R_FBG_OUT6 origin:044-clk-bufg-pips !26_88 26_87 27_86
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL5_I0.CLK_BUFG_TOP_R_CK_MUXED10 origin:046-clk-bufg-muxed-pips !26_87 !27_86 26_88
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL5_I0.CLK_BUFG_IMUX25_1 origin:044-clk-bufg-pips !26_87 !26_88 27_86
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL5_I0.CLK_BUFG_IMUX29_1 origin:044-clk-bufg-pips !26_87 !26_88 !27_86
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL5_I1.CLK_BUFG_R_FBG_OUT4 origin:044-clk-bufg-pips !26_84 !26_85 27_85
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL5_I1.CLK_BUFG_R_FBG_OUT6 origin:044-clk-bufg-pips !26_84 26_85 27_85
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL5_I1.CLK_BUFG_TOP_R_CK_MUXED11 origin:046-clk-bufg-muxed-pips !26_85 !27_85 26_84
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL5_I1.CLK_BUFG_IMUX25_1 origin:044-clk-bufg-pips !26_84 !27_85 26_85
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL5_I1.CLK_BUFG_IMUX29_1 origin:044-clk-bufg-pips !26_84 !26_85 !27_85
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL6_I0.CLK_BUFG_R_FBG_OUT5 origin:044-clk-bufg-pips !26_104 !27_102 26_103
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL6_I0.CLK_BUFG_R_FBG_OUT7 origin:044-clk-bufg-pips !26_104 26_103 27_102
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL6_I0.CLK_BUFG_TOP_R_CK_MUXED12 origin:046-clk-bufg-muxed-pips !26_103 !27_102 26_104
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL6_I0.CLK_BUFG_IMUX26_1 origin:044-clk-bufg-pips !26_103 !26_104 27_102
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL6_I0.CLK_BUFG_IMUX30_1 origin:044-clk-bufg-pips !26_103 !26_104 !27_102
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL6_I1.CLK_BUFG_R_FBG_OUT5 origin:044-clk-bufg-pips !26_100 !26_101 27_101
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL6_I1.CLK_BUFG_R_FBG_OUT7 origin:044-clk-bufg-pips !26_100 26_101 27_101
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL6_I1.CLK_BUFG_TOP_R_CK_MUXED13 origin:046-clk-bufg-muxed-pips !26_101 !27_101 26_100
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL6_I1.CLK_BUFG_IMUX26_1 origin:044-clk-bufg-pips !26_100 !27_101 26_101
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL6_I1.CLK_BUFG_IMUX30_1 origin:044-clk-bufg-pips !26_100 !26_101 !27_101
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL7_I0.CLK_BUFG_R_FBG_OUT6 origin:044-clk-bufg-pips !26_120 !27_118 26_119
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL7_I0.CLK_BUFG_R_FBG_OUT8 origin:044-clk-bufg-pips !26_120 26_119 27_118
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL7_I0.CLK_BUFG_TOP_R_CK_MUXED14 origin:046-clk-bufg-muxed-pips !26_119 !27_118 26_120
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL7_I0.CLK_BUFG_IMUX27_1 origin:044-clk-bufg-pips !26_119 !26_120 27_118
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL7_I0.CLK_BUFG_IMUX31_1 origin:044-clk-bufg-pips !26_119 !26_120 !27_118
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL7_I1.CLK_BUFG_R_FBG_OUT6 origin:044-clk-bufg-pips !26_116 !26_117 27_117
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL7_I1.CLK_BUFG_R_FBG_OUT8 origin:044-clk-bufg-pips !26_116 26_117 27_117
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL7_I1.CLK_BUFG_TOP_R_CK_MUXED15 origin:046-clk-bufg-muxed-pips !26_117 !27_117 26_116
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL7_I1.CLK_BUFG_IMUX27_1 origin:044-clk-bufg-pips !26_116 !27_117 26_117
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL7_I1.CLK_BUFG_IMUX31_1 origin:044-clk-bufg-pips !26_116 !26_117 !27_117
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL8_I0.CLK_BUFG_R_FBG_OUT7 origin:044-clk-bufg-pips !26_136 !27_134 26_135
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL8_I0.CLK_BUFG_R_FBG_OUT9 origin:044-clk-bufg-pips !26_136 26_135 27_134
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL8_I0.CLK_BUFG_TOP_R_CK_MUXED16 origin:046-clk-bufg-muxed-pips !26_135 !27_134 26_136
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL8_I0.CLK_BUFG_IMUX24_2 origin:044-clk-bufg-pips !26_135 !26_136 27_134
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL8_I0.CLK_BUFG_IMUX28_2 origin:044-clk-bufg-pips !26_135 !26_136 !27_134
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL8_I1.CLK_BUFG_R_FBG_OUT7 origin:044-clk-bufg-pips !26_132 !26_133 27_133
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL8_I1.CLK_BUFG_R_FBG_OUT9 origin:044-clk-bufg-pips !26_132 26_133 27_133
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL8_I1.CLK_BUFG_TOP_R_CK_MUXED17 origin:046-clk-bufg-muxed-pips !26_133 !27_133 26_132
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL8_I1.CLK_BUFG_IMUX24_2 origin:044-clk-bufg-pips !26_132 !27_133 26_133
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL8_I1.CLK_BUFG_IMUX28_2 origin:044-clk-bufg-pips !26_132 !26_133 !27_133
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL9_I0.CLK_BUFG_R_FBG_OUT8 origin:044-clk-bufg-pips !26_152 !27_150 26_151
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL9_I0.CLK_BUFG_R_FBG_OUT10 origin:044-clk-bufg-pips !26_152 26_151 27_150
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL9_I0.CLK_BUFG_TOP_R_CK_MUXED18 origin:046-clk-bufg-muxed-pips !26_151 !27_150 26_152
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL9_I0.CLK_BUFG_IMUX25_2 origin:044-clk-bufg-pips !26_151 !26_152 27_150
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL9_I0.CLK_BUFG_IMUX29_2 origin:044-clk-bufg-pips !26_151 !26_152 !27_150
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL9_I1.CLK_BUFG_R_FBG_OUT8 origin:044-clk-bufg-pips !26_148 !26_149 27_149
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL9_I1.CLK_BUFG_R_FBG_OUT10 origin:044-clk-bufg-pips !26_148 26_149 27_149
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL9_I1.CLK_BUFG_TOP_R_CK_MUXED19 origin:046-clk-bufg-muxed-pips !26_149 !27_149 26_148
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL9_I1.CLK_BUFG_IMUX25_2 origin:044-clk-bufg-pips !26_148 !27_149 26_149
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL9_I1.CLK_BUFG_IMUX29_2 origin:044-clk-bufg-pips !26_148 !26_149 !27_149
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_R_FBG_OUT9 origin:044-clk-bufg-pips !26_168 !27_166 26_167
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_R_FBG_OUT11 origin:044-clk-bufg-pips !26_168 26_167 27_166
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_TOP_R_CK_MUXED20 origin:046-clk-bufg-muxed-pips !26_167 !27_166 26_168
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_IMUX26_2 origin:044-clk-bufg-pips !26_167 !26_168 27_166
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_IMUX30_2 origin:044-clk-bufg-pips !26_167 !26_168 !27_166
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_R_FBG_OUT9 origin:044-clk-bufg-pips !26_164 !26_165 27_165
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_R_FBG_OUT11 origin:044-clk-bufg-pips !26_164 26_165 27_165
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_TOP_R_CK_MUXED21 origin:046-clk-bufg-muxed-pips !26_165 !27_165 26_164
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_IMUX26_2 origin:044-clk-bufg-pips !26_164 !27_165 26_165
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_IMUX30_2 origin:044-clk-bufg-pips !26_164 !26_165 !27_165
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_R_FBG_OUT10 origin:044-clk-bufg-pips !26_184 !27_182 26_183
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_R_FBG_OUT12 origin:044-clk-bufg-pips !26_184 26_183 27_182
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_TOP_R_CK_MUXED22 origin:046-clk-bufg-muxed-pips !26_183 !27_182 26_184
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_IMUX27_2 origin:044-clk-bufg-pips !26_183 !26_184 27_182
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_IMUX31_2 origin:044-clk-bufg-pips !26_183 !26_184 !27_182
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_R_FBG_OUT10 origin:044-clk-bufg-pips !26_180 !26_181 27_181
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_R_FBG_OUT12 origin:044-clk-bufg-pips !26_180 26_181 27_181
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_TOP_R_CK_MUXED23 origin:046-clk-bufg-muxed-pips !26_181 !27_181 26_180
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_IMUX27_2 origin:044-clk-bufg-pips !26_180 !27_181 26_181
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_IMUX31_2 origin:044-clk-bufg-pips !26_180 !26_181 !27_181
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_R_FBG_OUT11 origin:044-clk-bufg-pips !26_200 !27_198 26_199
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_R_FBG_OUT13 origin:044-clk-bufg-pips !26_200 26_199 27_198
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_TOP_R_CK_MUXED24 origin:046-clk-bufg-muxed-pips !26_199 !27_198 26_200
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_IMUX24_3 origin:044-clk-bufg-pips !26_199 !26_200 27_198
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_IMUX28_3 origin:044-clk-bufg-pips !26_199 !26_200 !27_198
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_R_FBG_OUT11 origin:044-clk-bufg-pips !26_196 !26_197 27_197
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_R_FBG_OUT13 origin:044-clk-bufg-pips !26_196 26_197 27_197
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_TOP_R_CK_MUXED25 origin:046-clk-bufg-muxed-pips !26_197 !27_197 26_196
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_IMUX24_3 origin:044-clk-bufg-pips !26_196 !27_197 26_197
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_IMUX28_3 origin:044-clk-bufg-pips !26_196 !26_197 !27_197
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_R_FBG_OUT12 origin:044-clk-bufg-pips !26_216 !27_214 26_215
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_R_FBG_OUT14 origin:044-clk-bufg-pips !26_216 26_215 27_214
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_TOP_R_CK_MUXED26 origin:046-clk-bufg-muxed-pips !26_215 !27_214 26_216
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_IMUX25_3 origin:044-clk-bufg-pips !26_215 !26_216 27_214
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_IMUX29_3 origin:044-clk-bufg-pips !26_215 !26_216 !27_214
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_R_FBG_OUT12 origin:044-clk-bufg-pips !26_212 !26_213 27_213
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_R_FBG_OUT14 origin:044-clk-bufg-pips !26_212 26_213 27_213
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_TOP_R_CK_MUXED27 origin:046-clk-bufg-muxed-pips !26_213 !27_213 26_212
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_IMUX25_3 origin:044-clk-bufg-pips !26_212 !27_213 26_213
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_IMUX29_3 origin:044-clk-bufg-pips !26_212 !26_213 !27_213
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_R_FBG_OUT13 origin:044-clk-bufg-pips !26_232 !27_230 26_231
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_R_FBG_OUT15 origin:044-clk-bufg-pips !26_232 26_231 27_230
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_TOP_R_CK_MUXED28 origin:046-clk-bufg-muxed-pips !26_231 !27_230 26_232
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_IMUX26_3 origin:044-clk-bufg-pips !26_231 !26_232 27_230
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_IMUX30_3 origin:044-clk-bufg-pips !26_231 !26_232 !27_230
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_R_FBG_OUT13 origin:044-clk-bufg-pips !26_228 !26_229 27_229
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_R_FBG_OUT15 origin:044-clk-bufg-pips !26_228 26_229 27_229
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_TOP_R_CK_MUXED29 origin:046-clk-bufg-muxed-pips !26_229 !27_229 26_228
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_IMUX26_3 origin:044-clk-bufg-pips !26_228 !27_229 26_229
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_IMUX30_3 origin:044-clk-bufg-pips !26_228 !26_229 !27_229
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_R_FBG_OUT0 origin:044-clk-bufg-pips !26_248 26_247 27_246
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_R_FBG_OUT14 origin:044-clk-bufg-pips !26_248 !27_246 26_247
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_TOP_R_CK_MUXED30 origin:046-clk-bufg-muxed-pips !26_247 !27_246 26_248
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_IMUX27_3 origin:044-clk-bufg-pips !26_247 !26_248 27_246
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_IMUX31_3 origin:044-clk-bufg-pips !26_247 !26_248 !27_246
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_R_FBG_OUT0 origin:044-clk-bufg-pips !26_244 26_245 27_245
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_R_FBG_OUT14 origin:044-clk-bufg-pips !26_244 !26_245 27_245
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_TOP_R_CK_MUXED31 origin:046-clk-bufg-muxed-pips !26_245 !27_245 26_244
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_IMUX27_3 origin:044-clk-bufg-pips !26_244 !27_245 26_245
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_IMUX31_3 origin:044-clk-bufg-pips !26_244 !26_245 !27_245

3066
artix7/segbits_clk_hrow_bot_r.origin_info.db
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File diff suppressed because it is too large Load Diff

3110
artix7/segbits_clk_hrow_top_r.origin_info.db
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File diff suppressed because it is too large Load Diff

190
artix7/segbits_cmt_top_l_upper_t.origin_info.db
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@ -5,17 +5,17 @@ CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKFBIN.CMT_TOP_L_UPPER_T_FREQ_BB1 ori
CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKFBIN.CMT_TOP_L_UPPER_T_FREQ_BB2 origin:034-cmt-pll-pips !28_43 !29_10 !29_11 !29_42 !29_43 28_11 28_44
CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKFBIN.CMT_TOP_L_UPPER_T_FREQ_BB3 origin:034-cmt-pll-pips !28_43 !29_11 !29_42 !29_43 28_11 28_44 29_10
CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKFBIN.CMT_TOP_L_UPPER_T_PLLE2_CLK_FB_INT origin:034-cmt-pll-pips !28_11 !28_43 !29_42 !29_43 28_44 29_10 29_11
CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_CLKIN1 origin:034-cmt-pll-pips !28_09 !29_09 28_10
CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_FREQ_BB0 origin:034-cmt-pll-pips !28_09 !28_10 !29_09
CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_FREQ_BB1 origin:034-cmt-pll-pips !28_10 !29_09 28_09
CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_FREQ_BB2 origin:034-cmt-pll-pips !28_09 !28_10 29_09
CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_FREQ_BB3 origin:034-cmt-pll-pips !28_10 28_09 29_09
CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_CLKIN1 origin:034-cmt-pll-pips !28_09 !29_09 28_10
CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_L_UPPER_T_PLLE2_CLK_IN1_INT origin:034-cmt-pll-pips !29_09 28_09 28_10
CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_CLKIN2 origin:034-cmt-pll-pips !28_08 !29_07 29_08
CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_FREQ_BB0 origin:034-cmt-pll-pips !28_08 !29_07 !29_08
CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_FREQ_BB1 origin:034-cmt-pll-pips !28_08 !29_08 29_07
CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_FREQ_BB2 origin:034-cmt-pll-pips !29_07 !29_08 28_08
CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_FREQ_BB3 origin:034-cmt-pll-pips !29_08 28_08 29_07
CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_CLKIN2 origin:034-cmt-pll-pips !28_08 !29_07 29_08
CMT_TOP_L_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_L_UPPER_T_PLLE2_CLK_IN2_INT origin:034-cmt-pll-pips !28_08 29_07 29_08
CMT_TOP_L_UPPER_T.PLLE2.CLKFBOUT_CLKOUT1_HIGH_TIME[0] origin:032-cmt-pll 28_163
CMT_TOP_L_UPPER_T.PLLE2.CLKFBOUT_CLKOUT1_HIGH_TIME[1] origin:032-cmt-pll 29_163
@ -49,6 +49,97 @@ CMT_TOP_L_UPPER_T.PLLE2.CLKFBOUT_CLKOUT2_MX[0] origin:032-cmt-pll 28_172
CMT_TOP_L_UPPER_T.PLLE2.CLKFBOUT_CLKOUT2_MX[1] origin:032-cmt-pll 29_172
CMT_TOP_L_UPPER_T.PLLE2.CLKFBOUT_CLKOUT2_NO_COUNT[0] origin:032-cmt-pll 28_171
CMT_TOP_L_UPPER_T.PLLE2.CLKFBOUT_CLKOUT2_RESERVED[0] origin:032-cmt-pll 29_175
CMT_TOP_L_UPPER_T.PLLE2.COMP.ZHOLD_NO_CLKIN_BUF_TOP origin:032-cmt-pll 28_06
CMT_TOP_L_UPPER_T.PLLE2.COMPENSATION.Z_ZHOLD_OR_CLKIN_BUF origin:032-cmt-pll 29_03 29_44
CMT_TOP_L_UPPER_T.PLLE2.COMPENSATION.ZHOLD_NO_CLKIN_BUF origin:032-cmt-pll 28_41 29_04
CMT_TOP_L_UPPER_T.PLLE2.COMPENSATION.ZHOLD_NO_CLKIN_BUF_NO_TOP origin:032-cmt-pll 29_06
CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_EDGE[0] origin:032-cmt-pll 29_182
CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_HIGH_TIME[0] origin:032-cmt-pll 28_179
CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_HIGH_TIME[1] origin:032-cmt-pll 29_179
CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_HIGH_TIME[2] origin:032-cmt-pll 28_180
CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_HIGH_TIME[3] origin:032-cmt-pll 29_180
CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_HIGH_TIME[4] origin:032-cmt-pll 28_181
CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_HIGH_TIME[5] origin:032-cmt-pll 29_181
CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_LOW_TIME[0] origin:032-cmt-pll 28_176
CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_LOW_TIME[1] origin:032-cmt-pll 29_176
CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_LOW_TIME[2] origin:032-cmt-pll 28_177
CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_LOW_TIME[3] origin:032-cmt-pll 29_177
CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_LOW_TIME[4] origin:032-cmt-pll 28_178
CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_LOW_TIME[5] origin:032-cmt-pll 29_178
CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_NO_COUNT[0] origin:032-cmt-pll 28_182
CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_RESERVED[0] origin:032-cmt-pll 28_183
CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_RESERVED[1] origin:032-cmt-pll 29_183
CMT_TOP_L_UPPER_T.PLLE2.IN_USE origin:032-cmt-pll 28_05 28_16 28_184 28_187 28_190 28_234 28_248 28_251 28_252 28_42 28_46 28_560 28_590 28_591 28_592 28_595 28_596 28_736 28_753 28_754 28_755 28_756 28_758 28_759 28_760 28_761 28_763 28_764 28_765 28_766 28_767 28_771 28_774 28_775 28_779 28_780 28_783 28_784 28_785 28_786 28_787 28_789 28_790 28_791 28_792 28_794 28_795 28_796 28_797 28_800 28_803 28_806 28_809 28_813 28_815 29_16 29_236 29_249 29_250 29_251 29_45 29_46 29_47 29_531 29_535 29_557 29_589 29_590 29_593 29_594 29_595 29_753 29_754 29_756 29_758 29_759 29_761 29_765 29_766 29_768 29_777 29_779 29_780 29_781 29_782 29_783 29_784 29_785 29_787 29_791 29_792 29_793 29_794 29_795 29_797 29_798 29_799 29_800 29_803 29_804 29_806 29_807 29_808 29_809 29_810 29_813
CMT_TOP_L_UPPER_T.PLLE2.INV_CLKINSEL origin:032-cmt-pll 28_722
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[0] origin:032-cmt-pll 28_200
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[1] origin:032-cmt-pll 29_200
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[2] origin:032-cmt-pll 28_201
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[3] origin:032-cmt-pll 29_201
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[4] origin:032-cmt-pll 28_202
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[5] origin:032-cmt-pll 29_202
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[6] origin:032-cmt-pll 28_203
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[7] origin:032-cmt-pll 29_203
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[8] origin:032-cmt-pll 28_204
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[9] origin:032-cmt-pll 29_204
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[10] origin:032-cmt-pll 28_208
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[11] origin:032-cmt-pll 29_208
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[12] origin:032-cmt-pll 28_209
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[13] origin:032-cmt-pll 29_209
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[14] origin:032-cmt-pll 28_210
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[15] origin:032-cmt-pll 29_210
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[16] origin:032-cmt-pll 28_211
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[17] origin:032-cmt-pll 29_211
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[18] origin:032-cmt-pll 28_212
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[19] origin:032-cmt-pll 29_212
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[20] origin:032-cmt-pll 28_192
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[21] origin:032-cmt-pll 29_192
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[22] origin:032-cmt-pll 28_193
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[23] origin:032-cmt-pll 29_193
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[24] origin:032-cmt-pll 28_194
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[25] origin:032-cmt-pll 29_194
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[26] origin:032-cmt-pll 28_195
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[27] origin:032-cmt-pll 29_195
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[28] origin:032-cmt-pll 28_196
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[29] origin:032-cmt-pll 29_196
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[30] origin:032-cmt-pll 28_205
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[31] origin:032-cmt-pll 29_205
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[32] origin:032-cmt-pll 28_206
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[33] origin:032-cmt-pll 29_206
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[34] origin:032-cmt-pll 28_207
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[35] origin:032-cmt-pll 28_213
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[36] origin:032-cmt-pll 29_213
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[37] origin:032-cmt-pll 28_214
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[38] origin:032-cmt-pll 29_214
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[39] origin:032-cmt-pll 28_215
CMT_TOP_L_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[0] origin:032-cmt-pll 28_320
CMT_TOP_L_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[1] origin:032-cmt-pll 29_320
CMT_TOP_L_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[2] origin:032-cmt-pll 28_321
CMT_TOP_L_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[3] origin:032-cmt-pll 29_321
CMT_TOP_L_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[4] origin:032-cmt-pll 28_322
CMT_TOP_L_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[5] origin:032-cmt-pll 29_322
CMT_TOP_L_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[6] origin:032-cmt-pll 28_323
CMT_TOP_L_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[7] origin:032-cmt-pll 29_323
CMT_TOP_L_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[8] origin:032-cmt-pll 28_324
CMT_TOP_L_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[9] origin:032-cmt-pll 29_324
CMT_TOP_L_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[10] origin:032-cmt-pll 28_325
CMT_TOP_L_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[11] origin:032-cmt-pll 29_325
CMT_TOP_L_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[12] origin:032-cmt-pll 28_326
CMT_TOP_L_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[13] origin:032-cmt-pll 29_326
CMT_TOP_L_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[14] origin:032-cmt-pll 28_327
CMT_TOP_L_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[15] origin:032-cmt-pll 29_327
CMT_TOP_L_UPPER_T.PLLE2.STARTUP_WAIT origin:032-cmt-pll 28_737
CMT_TOP_L_UPPER_T.PLLE2.TABLE[0] origin:032-cmt-pll 28_634
CMT_TOP_L_UPPER_T.PLLE2.TABLE[1] origin:032-cmt-pll 29_635
CMT_TOP_L_UPPER_T.PLLE2.TABLE[2] origin:032-cmt-pll 28_636
CMT_TOP_L_UPPER_T.PLLE2.TABLE[3] origin:032-cmt-pll 29_637
CMT_TOP_L_UPPER_T.PLLE2.TABLE[4] origin:032-cmt-pll 28_638
CMT_TOP_L_UPPER_T.PLLE2.TABLE[5] origin:032-cmt-pll 29_639
CMT_TOP_L_UPPER_T.PLLE2.TABLE[6] origin:032-cmt-pll 28_628
CMT_TOP_L_UPPER_T.PLLE2.TABLE[7] origin:032-cmt-pll 29_629
CMT_TOP_L_UPPER_T.PLLE2.TABLE[8] origin:032-cmt-pll 28_630
CMT_TOP_L_UPPER_T.PLLE2.TABLE[9] origin:032-cmt-pll 29_631
CMT_TOP_L_UPPER_T.PLLE2.ZINV_PWRDWN origin:032-cmt-pll 29_720
CMT_TOP_L_UPPER_T.PLLE2.ZINV_RST origin:032-cmt-pll 28_720
CMT_TOP_L_UPPER_T.PLLE2.CLKOUT0_CLKOUT1_HIGH_TIME[0] origin:032-cmt-pll 28_67
CMT_TOP_L_UPPER_T.PLLE2.CLKOUT0_CLKOUT1_HIGH_TIME[1] origin:032-cmt-pll 29_67
CMT_TOP_L_UPPER_T.PLLE2.CLKOUT0_CLKOUT1_HIGH_TIME[2] origin:032-cmt-pll 28_68
@ -241,29 +332,7 @@ CMT_TOP_L_UPPER_T.PLLE2.CLKOUT5_CLKOUT2_MX[0] origin:032-cmt-pll 28_60
CMT_TOP_L_UPPER_T.PLLE2.CLKOUT5_CLKOUT2_MX[1] origin:032-cmt-pll 29_60
CMT_TOP_L_UPPER_T.PLLE2.CLKOUT5_CLKOUT2_NO_COUNT[0] origin:032-cmt-pll 28_59
CMT_TOP_L_UPPER_T.PLLE2.CLKOUT5_CLKOUT2_RESERVED[0] origin:032-cmt-pll 29_63
CMT_TOP_L_UPPER_T.PLLE2.COMP.ZHOLD_NO_CLKIN_BUF_TOP origin:032-cmt-pll 28_06
CMT_TOP_L_UPPER_T.PLLE2.COMPENSATION.ZHOLD_NO_CLKIN_BUF origin:032-cmt-pll 28_41 29_04
CMT_TOP_L_UPPER_T.PLLE2.COMPENSATION.ZHOLD_NO_CLKIN_BUF_NO_TOP origin:032-cmt-pll 29_06
CMT_TOP_L_UPPER_T.PLLE2.COMPENSATION.Z_ZHOLD_OR_CLKIN_BUF origin:032-cmt-pll 29_03 29_44
CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_EDGE[0] origin:032-cmt-pll 29_182
CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_HIGH_TIME[0] origin:032-cmt-pll 28_179
CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_HIGH_TIME[1] origin:032-cmt-pll 29_179
CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_HIGH_TIME[2] origin:032-cmt-pll 28_180
CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_HIGH_TIME[3] origin:032-cmt-pll 29_180
CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_HIGH_TIME[4] origin:032-cmt-pll 28_181
CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_HIGH_TIME[5] origin:032-cmt-pll 29_181
CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_LOW_TIME[0] origin:032-cmt-pll 28_176
CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_LOW_TIME[1] origin:032-cmt-pll 29_176
CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_LOW_TIME[2] origin:032-cmt-pll 28_177
CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_LOW_TIME[3] origin:032-cmt-pll 29_177
CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_LOW_TIME[4] origin:032-cmt-pll 28_178
CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_LOW_TIME[5] origin:032-cmt-pll 29_178
CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_NO_COUNT[0] origin:032-cmt-pll 28_182
CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_RESERVED[0] origin:032-cmt-pll 28_183
CMT_TOP_L_UPPER_T.PLLE2.DIVCLK_DIVCLK_RESERVED[1] origin:032-cmt-pll 29_183
CMT_TOP_L_UPPER_T.PLLE2.FILTREG1_RESERVED[0] origin:032-cmt-pll 28_624
CMT_TOP_L_UPPER_T.PLLE2.FILTREG1_RESERVED[10] origin:032-cmt-pll 29_630
CMT_TOP_L_UPPER_T.PLLE2.FILTREG1_RESERVED[11] origin:032-cmt-pll 28_631
CMT_TOP_L_UPPER_T.PLLE2.FILTREG1_RESERVED[1] origin:032-cmt-pll 29_624
CMT_TOP_L_UPPER_T.PLLE2.FILTREG1_RESERVED[2] origin:032-cmt-pll 28_625
CMT_TOP_L_UPPER_T.PLLE2.FILTREG1_RESERVED[3] origin:032-cmt-pll 29_625
@ -273,6 +342,8 @@ CMT_TOP_L_UPPER_T.PLLE2.FILTREG1_RESERVED[6] origin:032-cmt-pll 28_627
CMT_TOP_L_UPPER_T.PLLE2.FILTREG1_RESERVED[7] origin:032-cmt-pll 29_627
CMT_TOP_L_UPPER_T.PLLE2.FILTREG1_RESERVED[8] origin:032-cmt-pll 29_628
CMT_TOP_L_UPPER_T.PLLE2.FILTREG1_RESERVED[9] origin:032-cmt-pll 28_629
CMT_TOP_L_UPPER_T.PLLE2.FILTREG1_RESERVED[10] origin:032-cmt-pll 29_630
CMT_TOP_L_UPPER_T.PLLE2.FILTREG1_RESERVED[11] origin:032-cmt-pll 28_631
CMT_TOP_L_UPPER_T.PLLE2.FILTREG2_RESERVED[0] origin:032-cmt-pll 28_632
CMT_TOP_L_UPPER_T.PLLE2.FILTREG2_RESERVED[1] origin:032-cmt-pll 29_632
CMT_TOP_L_UPPER_T.PLLE2.FILTREG2_RESERVED[2] origin:032-cmt-pll 28_633
@ -283,48 +354,6 @@ CMT_TOP_L_UPPER_T.PLLE2.FILTREG2_RESERVED[6] origin:032-cmt-pll 29_636
CMT_TOP_L_UPPER_T.PLLE2.FILTREG2_RESERVED[7] origin:032-cmt-pll 28_637
CMT_TOP_L_UPPER_T.PLLE2.FILTREG2_RESERVED[8] origin:032-cmt-pll 29_638
CMT_TOP_L_UPPER_T.PLLE2.FILTREG2_RESERVED[9] origin:032-cmt-pll 28_639
CMT_TOP_L_UPPER_T.PLLE2.INV_CLKINSEL origin:032-cmt-pll 28_722
CMT_TOP_L_UPPER_T.PLLE2.IN_USE origin:032-cmt-pll 28_05 28_16 28_184 28_187 28_190 28_234 28_248 28_251 28_252 28_42 28_46 28_560 28_590 28_591 28_592 28_595 28_596 28_736 28_753 28_754 28_755 28_756 28_758 28_759 28_760 28_761 28_763 28_764 28_765 28_766 28_767 28_771 28_774 28_775 28_779 28_780 28_783 28_784 28_785 28_786 28_787 28_789 28_790 28_791 28_792 28_794 28_795 28_796 28_797 28_800 28_803 28_806 28_809 28_813 28_815 29_16 29_236 29_249 29_250 29_251 29_45 29_46 29_47 29_531 29_535 29_557 29_589 29_590 29_593 29_594 29_595 29_753 29_754 29_756 29_758 29_759 29_761 29_765 29_766 29_768 29_777 29_779 29_780 29_781 29_782 29_783 29_784 29_785 29_787 29_791 29_792 29_793 29_794 29_795 29_797 29_798 29_799 29_800 29_803 29_804 29_806 29_807 29_808 29_809 29_810 29_813
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[0] origin:032-cmt-pll 28_200
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[10] origin:032-cmt-pll 28_208
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[11] origin:032-cmt-pll 29_208
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[12] origin:032-cmt-pll 28_209
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[13] origin:032-cmt-pll 29_209
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[14] origin:032-cmt-pll 28_210
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[15] origin:032-cmt-pll 29_210
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[16] origin:032-cmt-pll 28_211
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[17] origin:032-cmt-pll 29_211
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[18] origin:032-cmt-pll 28_212
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[19] origin:032-cmt-pll 29_212
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[1] origin:032-cmt-pll 29_200
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[20] origin:032-cmt-pll 28_192
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[21] origin:032-cmt-pll 29_192
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[22] origin:032-cmt-pll 28_193
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[23] origin:032-cmt-pll 29_193
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[24] origin:032-cmt-pll 28_194
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[25] origin:032-cmt-pll 29_194
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[26] origin:032-cmt-pll 28_195
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[27] origin:032-cmt-pll 29_195
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[28] origin:032-cmt-pll 28_196
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[29] origin:032-cmt-pll 29_196
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[2] origin:032-cmt-pll 28_201
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[30] origin:032-cmt-pll 28_205
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[31] origin:032-cmt-pll 29_205
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[32] origin:032-cmt-pll 28_206
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[33] origin:032-cmt-pll 29_206
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[34] origin:032-cmt-pll 28_207
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[35] origin:032-cmt-pll 28_213
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[36] origin:032-cmt-pll 29_213
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[37] origin:032-cmt-pll 28_214
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[38] origin:032-cmt-pll 29_214
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[39] origin:032-cmt-pll 28_215
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[3] origin:032-cmt-pll 29_201
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[4] origin:032-cmt-pll 28_202
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[5] origin:032-cmt-pll 29_202
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[6] origin:032-cmt-pll 28_203
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[7] origin:032-cmt-pll 29_203
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[8] origin:032-cmt-pll 28_204
CMT_TOP_L_UPPER_T.PLLE2.LKTABLE[9] origin:032-cmt-pll 29_204
CMT_TOP_L_UPPER_T.PLLE2.LOCKREG1_RESERVED[0] origin:032-cmt-pll 28_197
CMT_TOP_L_UPPER_T.PLLE2.LOCKREG1_RESERVED[1] origin:032-cmt-pll 29_197
CMT_TOP_L_UPPER_T.PLLE2.LOCKREG1_RESERVED[2] origin:032-cmt-pll 28_198
@ -333,32 +362,3 @@ CMT_TOP_L_UPPER_T.PLLE2.LOCKREG1_RESERVED[4] origin:032-cmt-pll 28_199
CMT_TOP_L_UPPER_T.PLLE2.LOCKREG1_RESERVED[5] origin:032-cmt-pll 29_199
CMT_TOP_L_UPPER_T.PLLE2.LOCKREG2_RESERVED[0] origin:032-cmt-pll 29_207
CMT_TOP_L_UPPER_T.PLLE2.LOCKREG3_RESERVED[0] origin:032-cmt-pll 29_215
CMT_TOP_L_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[0] origin:032-cmt-pll 28_320
CMT_TOP_L_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[10] origin:032-cmt-pll 28_325
CMT_TOP_L_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[11] origin:032-cmt-pll 29_325
CMT_TOP_L_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[12] origin:032-cmt-pll 28_326
CMT_TOP_L_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[13] origin:032-cmt-pll 29_326
CMT_TOP_L_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[14] origin:032-cmt-pll 28_327
CMT_TOP_L_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[15] origin:032-cmt-pll 29_327
CMT_TOP_L_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[1] origin:032-cmt-pll 29_320
CMT_TOP_L_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[2] origin:032-cmt-pll 28_321
CMT_TOP_L_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[3] origin:032-cmt-pll 29_321
CMT_TOP_L_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[4] origin:032-cmt-pll 28_322
CMT_TOP_L_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[5] origin:032-cmt-pll 29_322
CMT_TOP_L_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[6] origin:032-cmt-pll 28_323
CMT_TOP_L_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[7] origin:032-cmt-pll 29_323
CMT_TOP_L_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[8] origin:032-cmt-pll 28_324
CMT_TOP_L_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[9] origin:032-cmt-pll 29_324
CMT_TOP_L_UPPER_T.PLLE2.STARTUP_WAIT origin:032-cmt-pll 28_737
CMT_TOP_L_UPPER_T.PLLE2.TABLE[0] origin:032-cmt-pll 28_634
CMT_TOP_L_UPPER_T.PLLE2.TABLE[1] origin:032-cmt-pll 29_635
CMT_TOP_L_UPPER_T.PLLE2.TABLE[2] origin:032-cmt-pll 28_636
CMT_TOP_L_UPPER_T.PLLE2.TABLE[3] origin:032-cmt-pll 29_637
CMT_TOP_L_UPPER_T.PLLE2.TABLE[4] origin:032-cmt-pll 28_638
CMT_TOP_L_UPPER_T.PLLE2.TABLE[5] origin:032-cmt-pll 29_639
CMT_TOP_L_UPPER_T.PLLE2.TABLE[6] origin:032-cmt-pll 28_628
CMT_TOP_L_UPPER_T.PLLE2.TABLE[7] origin:032-cmt-pll 29_629
CMT_TOP_L_UPPER_T.PLLE2.TABLE[8] origin:032-cmt-pll 28_630
CMT_TOP_L_UPPER_T.PLLE2.TABLE[9] origin:032-cmt-pll 29_631
CMT_TOP_L_UPPER_T.PLLE2.ZINV_PWRDWN origin:032-cmt-pll 29_720
CMT_TOP_L_UPPER_T.PLLE2.ZINV_RST origin:032-cmt-pll 28_720

190
artix7/segbits_cmt_top_r_upper_t.origin_info.db
View File

@ -5,17 +5,17 @@ CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKFBIN.CMT_TOP_R_UPPER_T_FREQ_BB1 ori
CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKFBIN.CMT_TOP_R_UPPER_T_FREQ_BB2 origin:034-cmt-pll-pips !28_43 !29_10 !29_11 !29_42 !29_43 28_11 28_44
CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKFBIN.CMT_TOP_R_UPPER_T_FREQ_BB3 origin:034-cmt-pll-pips !28_43 !29_11 !29_42 !29_43 28_11 28_44 29_10
CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKFBIN.CMT_TOP_R_UPPER_T_PLLE2_CLK_FB_INT origin:034-cmt-pll-pips !28_11 !28_43 !29_42 !29_43 28_44 29_10 29_11
CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_R_UPPER_T_CLKIN1 origin:034-cmt-pll-pips !28_09 !29_09 28_10
CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_R_UPPER_T_FREQ_BB0 origin:034-cmt-pll-pips !28_09 !28_10 !29_09
CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_R_UPPER_T_FREQ_BB1 origin:034-cmt-pll-pips !28_10 !29_09 28_09
CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_R_UPPER_T_FREQ_BB2 origin:034-cmt-pll-pips !28_09 !28_10 29_09
CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_R_UPPER_T_FREQ_BB3 origin:034-cmt-pll-pips !28_10 28_09 29_09
CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_R_UPPER_T_CLKIN1 origin:034-cmt-pll-pips !28_09 !29_09 28_10
CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN1.CMT_TOP_R_UPPER_T_PLLE2_CLK_IN1_INT origin:034-cmt-pll-pips !29_09 28_09 28_10
CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_R_UPPER_T_CLKIN2 origin:034-cmt-pll-pips !28_08 !29_07 29_08
CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_R_UPPER_T_FREQ_BB0 origin:034-cmt-pll-pips !28_08 !29_07 !29_08
CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_R_UPPER_T_FREQ_BB1 origin:034-cmt-pll-pips !28_08 !29_08 29_07
CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_R_UPPER_T_FREQ_BB2 origin:034-cmt-pll-pips !29_07 !29_08 28_08
CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_R_UPPER_T_FREQ_BB3 origin:034-cmt-pll-pips !29_08 28_08 29_07
CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_R_UPPER_T_CLKIN2 origin:034-cmt-pll-pips !28_08 !29_07 29_08
CMT_TOP_R_UPPER_T.CMT_TOP_R_UPPER_T_PLLE2_CLKIN2.CMT_TOP_R_UPPER_T_PLLE2_CLK_IN2_INT origin:034-cmt-pll-pips !28_08 29_07 29_08
CMT_TOP_R_UPPER_T.PLLE2.CLKFBOUT_CLKOUT1_HIGH_TIME[0] origin:032-cmt-pll 28_163
CMT_TOP_R_UPPER_T.PLLE2.CLKFBOUT_CLKOUT1_HIGH_TIME[1] origin:032-cmt-pll 29_163
@ -49,6 +49,97 @@ CMT_TOP_R_UPPER_T.PLLE2.CLKFBOUT_CLKOUT2_MX[0] origin:032-cmt-pll 28_172
CMT_TOP_R_UPPER_T.PLLE2.CLKFBOUT_CLKOUT2_MX[1] origin:032-cmt-pll 29_172
CMT_TOP_R_UPPER_T.PLLE2.CLKFBOUT_CLKOUT2_NO_COUNT[0] origin:032-cmt-pll 28_171
CMT_TOP_R_UPPER_T.PLLE2.CLKFBOUT_CLKOUT2_RESERVED[0] origin:032-cmt-pll 29_175
CMT_TOP_R_UPPER_T.PLLE2.COMP.ZHOLD_NO_CLKIN_BUF_TOP origin:032-cmt-pll 28_06
CMT_TOP_R_UPPER_T.PLLE2.COMPENSATION.Z_ZHOLD_OR_CLKIN_BUF origin:032-cmt-pll 29_03 29_44
CMT_TOP_R_UPPER_T.PLLE2.COMPENSATION.ZHOLD_NO_CLKIN_BUF origin:032-cmt-pll 28_41 29_04
CMT_TOP_R_UPPER_T.PLLE2.COMPENSATION.ZHOLD_NO_CLKIN_BUF_NO_TOP origin:032-cmt-pll 29_06
CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_EDGE[0] origin:032-cmt-pll 29_182
CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_HIGH_TIME[0] origin:032-cmt-pll 28_179
CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_HIGH_TIME[1] origin:032-cmt-pll 29_179
CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_HIGH_TIME[2] origin:032-cmt-pll 28_180
CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_HIGH_TIME[3] origin:032-cmt-pll 29_180
CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_HIGH_TIME[4] origin:032-cmt-pll 28_181
CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_HIGH_TIME[5] origin:032-cmt-pll 29_181
CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_LOW_TIME[0] origin:032-cmt-pll 28_176
CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_LOW_TIME[1] origin:032-cmt-pll 29_176
CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_LOW_TIME[2] origin:032-cmt-pll 28_177
CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_LOW_TIME[3] origin:032-cmt-pll 29_177
CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_LOW_TIME[4] origin:032-cmt-pll 28_178
CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_LOW_TIME[5] origin:032-cmt-pll 29_178
CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_NO_COUNT[0] origin:032-cmt-pll 28_182
CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_RESERVED[0] origin:032-cmt-pll 28_183
CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_RESERVED[1] origin:032-cmt-pll 29_183
CMT_TOP_R_UPPER_T.PLLE2.IN_USE origin:032-cmt-pll 28_05 28_16 28_184 28_187 28_190 28_234 28_248 28_251 28_252 28_42 28_46 28_560 28_590 28_591 28_592 28_595 28_596 28_736 28_753 28_754 28_755 28_756 28_758 28_759 28_760 28_761 28_763 28_764 28_765 28_766 28_767 28_771 28_774 28_775 28_779 28_780 28_783 28_784 28_785 28_786 28_787 28_789 28_790 28_791 28_792 28_794 28_795 28_796 28_797 28_800 28_803 28_806 28_809 28_813 28_815 29_16 29_236 29_249 29_250 29_251 29_45 29_46 29_47 29_531 29_535 29_557 29_589 29_590 29_593 29_594 29_595 29_753 29_754 29_756 29_758 29_759 29_761 29_765 29_766 29_768 29_777 29_779 29_780 29_781 29_782 29_783 29_784 29_785 29_787 29_791 29_792 29_793 29_794 29_795 29_797 29_798 29_799 29_800 29_803 29_804 29_806 29_807 29_808 29_809 29_810 29_813
CMT_TOP_R_UPPER_T.PLLE2.INV_CLKINSEL origin:032-cmt-pll 28_722
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[0] origin:032-cmt-pll 28_200
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[1] origin:032-cmt-pll 29_200
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[2] origin:032-cmt-pll 28_201
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[3] origin:032-cmt-pll 29_201
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[4] origin:032-cmt-pll 28_202
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[5] origin:032-cmt-pll 29_202
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[6] origin:032-cmt-pll 28_203
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[7] origin:032-cmt-pll 29_203
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[8] origin:032-cmt-pll 28_204
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[9] origin:032-cmt-pll 29_204
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[10] origin:032-cmt-pll 28_208
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[11] origin:032-cmt-pll 29_208
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[12] origin:032-cmt-pll 28_209
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[13] origin:032-cmt-pll 29_209
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[14] origin:032-cmt-pll 28_210
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[15] origin:032-cmt-pll 29_210
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[16] origin:032-cmt-pll 28_211
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[17] origin:032-cmt-pll 29_211
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[18] origin:032-cmt-pll 28_212
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[19] origin:032-cmt-pll 29_212
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[20] origin:032-cmt-pll 28_192
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[21] origin:032-cmt-pll 29_192
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[22] origin:032-cmt-pll 28_193
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[23] origin:032-cmt-pll 29_193
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[24] origin:032-cmt-pll 28_194
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[25] origin:032-cmt-pll 29_194
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[26] origin:032-cmt-pll 28_195
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[27] origin:032-cmt-pll 29_195
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[28] origin:032-cmt-pll 28_196
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[29] origin:032-cmt-pll 29_196
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[30] origin:032-cmt-pll 28_205
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[31] origin:032-cmt-pll 29_205
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[32] origin:032-cmt-pll 28_206
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[33] origin:032-cmt-pll 29_206
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[34] origin:032-cmt-pll 28_207
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[35] origin:032-cmt-pll 28_213
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[36] origin:032-cmt-pll 29_213
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[37] origin:032-cmt-pll 28_214
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[38] origin:032-cmt-pll 29_214
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[39] origin:032-cmt-pll 28_215
CMT_TOP_R_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[0] origin:032-cmt-pll 28_320
CMT_TOP_R_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[1] origin:032-cmt-pll 29_320
CMT_TOP_R_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[2] origin:032-cmt-pll 28_321
CMT_TOP_R_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[3] origin:032-cmt-pll 29_321
CMT_TOP_R_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[4] origin:032-cmt-pll 28_322
CMT_TOP_R_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[5] origin:032-cmt-pll 29_322
CMT_TOP_R_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[6] origin:032-cmt-pll 28_323
CMT_TOP_R_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[7] origin:032-cmt-pll 29_323
CMT_TOP_R_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[8] origin:032-cmt-pll 28_324
CMT_TOP_R_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[9] origin:032-cmt-pll 29_324
CMT_TOP_R_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[10] origin:032-cmt-pll 28_325
CMT_TOP_R_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[11] origin:032-cmt-pll 29_325
CMT_TOP_R_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[12] origin:032-cmt-pll 28_326
CMT_TOP_R_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[13] origin:032-cmt-pll 29_326
CMT_TOP_R_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[14] origin:032-cmt-pll 28_327
CMT_TOP_R_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[15] origin:032-cmt-pll 29_327
CMT_TOP_R_UPPER_T.PLLE2.STARTUP_WAIT origin:032-cmt-pll 28_737
CMT_TOP_R_UPPER_T.PLLE2.TABLE[0] origin:032-cmt-pll 28_634
CMT_TOP_R_UPPER_T.PLLE2.TABLE[1] origin:032-cmt-pll 29_635
CMT_TOP_R_UPPER_T.PLLE2.TABLE[2] origin:032-cmt-pll 28_636
CMT_TOP_R_UPPER_T.PLLE2.TABLE[3] origin:032-cmt-pll 29_637
CMT_TOP_R_UPPER_T.PLLE2.TABLE[4] origin:032-cmt-pll 28_638
CMT_TOP_R_UPPER_T.PLLE2.TABLE[5] origin:032-cmt-pll 29_639
CMT_TOP_R_UPPER_T.PLLE2.TABLE[6] origin:032-cmt-pll 28_628
CMT_TOP_R_UPPER_T.PLLE2.TABLE[7] origin:032-cmt-pll 29_629
CMT_TOP_R_UPPER_T.PLLE2.TABLE[8] origin:032-cmt-pll 28_630
CMT_TOP_R_UPPER_T.PLLE2.TABLE[9] origin:032-cmt-pll 29_631
CMT_TOP_R_UPPER_T.PLLE2.ZINV_PWRDWN origin:032-cmt-pll 29_720
CMT_TOP_R_UPPER_T.PLLE2.ZINV_RST origin:032-cmt-pll 28_720
CMT_TOP_R_UPPER_T.PLLE2.CLKOUT0_CLKOUT1_HIGH_TIME[0] origin:032-cmt-pll 28_67
CMT_TOP_R_UPPER_T.PLLE2.CLKOUT0_CLKOUT1_HIGH_TIME[1] origin:032-cmt-pll 29_67
CMT_TOP_R_UPPER_T.PLLE2.CLKOUT0_CLKOUT1_HIGH_TIME[2] origin:032-cmt-pll 28_68
@ -241,29 +332,7 @@ CMT_TOP_R_UPPER_T.PLLE2.CLKOUT5_CLKOUT2_MX[0] origin:032-cmt-pll 28_60
CMT_TOP_R_UPPER_T.PLLE2.CLKOUT5_CLKOUT2_MX[1] origin:032-cmt-pll 29_60
CMT_TOP_R_UPPER_T.PLLE2.CLKOUT5_CLKOUT2_NO_COUNT[0] origin:032-cmt-pll 28_59
CMT_TOP_R_UPPER_T.PLLE2.CLKOUT5_CLKOUT2_RESERVED[0] origin:032-cmt-pll 29_63
CMT_TOP_R_UPPER_T.PLLE2.COMP.ZHOLD_NO_CLKIN_BUF_TOP origin:032-cmt-pll 28_06
CMT_TOP_R_UPPER_T.PLLE2.COMPENSATION.ZHOLD_NO_CLKIN_BUF origin:032-cmt-pll 28_41 29_04
CMT_TOP_R_UPPER_T.PLLE2.COMPENSATION.ZHOLD_NO_CLKIN_BUF_NO_TOP origin:032-cmt-pll 29_06
CMT_TOP_R_UPPER_T.PLLE2.COMPENSATION.Z_ZHOLD_OR_CLKIN_BUF origin:032-cmt-pll 29_03 29_44
CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_EDGE[0] origin:032-cmt-pll 29_182
CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_HIGH_TIME[0] origin:032-cmt-pll 28_179
CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_HIGH_TIME[1] origin:032-cmt-pll 29_179
CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_HIGH_TIME[2] origin:032-cmt-pll 28_180
CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_HIGH_TIME[3] origin:032-cmt-pll 29_180
CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_HIGH_TIME[4] origin:032-cmt-pll 28_181
CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_HIGH_TIME[5] origin:032-cmt-pll 29_181
CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_LOW_TIME[0] origin:032-cmt-pll 28_176
CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_LOW_TIME[1] origin:032-cmt-pll 29_176
CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_LOW_TIME[2] origin:032-cmt-pll 28_177
CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_LOW_TIME[3] origin:032-cmt-pll 29_177
CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_LOW_TIME[4] origin:032-cmt-pll 28_178
CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_LOW_TIME[5] origin:032-cmt-pll 29_178
CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_NO_COUNT[0] origin:032-cmt-pll 28_182
CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_RESERVED[0] origin:032-cmt-pll 28_183
CMT_TOP_R_UPPER_T.PLLE2.DIVCLK_DIVCLK_RESERVED[1] origin:032-cmt-pll 29_183
CMT_TOP_R_UPPER_T.PLLE2.FILTREG1_RESERVED[0] origin:032-cmt-pll 28_624
CMT_TOP_R_UPPER_T.PLLE2.FILTREG1_RESERVED[10] origin:032-cmt-pll 29_630
CMT_TOP_R_UPPER_T.PLLE2.FILTREG1_RESERVED[11] origin:032-cmt-pll 28_631
CMT_TOP_R_UPPER_T.PLLE2.FILTREG1_RESERVED[1] origin:032-cmt-pll 29_624
CMT_TOP_R_UPPER_T.PLLE2.FILTREG1_RESERVED[2] origin:032-cmt-pll 28_625
CMT_TOP_R_UPPER_T.PLLE2.FILTREG1_RESERVED[3] origin:032-cmt-pll 29_625
@ -273,6 +342,8 @@ CMT_TOP_R_UPPER_T.PLLE2.FILTREG1_RESERVED[6] origin:032-cmt-pll 28_627
CMT_TOP_R_UPPER_T.PLLE2.FILTREG1_RESERVED[7] origin:032-cmt-pll 29_627
CMT_TOP_R_UPPER_T.PLLE2.FILTREG1_RESERVED[8] origin:032-cmt-pll 29_628
CMT_TOP_R_UPPER_T.PLLE2.FILTREG1_RESERVED[9] origin:032-cmt-pll 28_629
CMT_TOP_R_UPPER_T.PLLE2.FILTREG1_RESERVED[10] origin:032-cmt-pll 29_630
CMT_TOP_R_UPPER_T.PLLE2.FILTREG1_RESERVED[11] origin:032-cmt-pll 28_631
CMT_TOP_R_UPPER_T.PLLE2.FILTREG2_RESERVED[0] origin:032-cmt-pll 28_632
CMT_TOP_R_UPPER_T.PLLE2.FILTREG2_RESERVED[1] origin:032-cmt-pll 29_632
CMT_TOP_R_UPPER_T.PLLE2.FILTREG2_RESERVED[2] origin:032-cmt-pll 28_633
@ -283,48 +354,6 @@ CMT_TOP_R_UPPER_T.PLLE2.FILTREG2_RESERVED[6] origin:032-cmt-pll 29_636
CMT_TOP_R_UPPER_T.PLLE2.FILTREG2_RESERVED[7] origin:032-cmt-pll 28_637
CMT_TOP_R_UPPER_T.PLLE2.FILTREG2_RESERVED[8] origin:032-cmt-pll 29_638
CMT_TOP_R_UPPER_T.PLLE2.FILTREG2_RESERVED[9] origin:032-cmt-pll 28_639
CMT_TOP_R_UPPER_T.PLLE2.INV_CLKINSEL origin:032-cmt-pll 28_722
CMT_TOP_R_UPPER_T.PLLE2.IN_USE origin:032-cmt-pll 28_05 28_16 28_184 28_187 28_190 28_234 28_248 28_251 28_252 28_42 28_46 28_560 28_590 28_591 28_592 28_595 28_596 28_736 28_753 28_754 28_755 28_756 28_758 28_759 28_760 28_761 28_763 28_764 28_765 28_766 28_767 28_771 28_774 28_775 28_779 28_780 28_783 28_784 28_785 28_786 28_787 28_789 28_790 28_791 28_792 28_794 28_795 28_796 28_797 28_800 28_803 28_806 28_809 28_813 28_815 29_16 29_236 29_249 29_250 29_251 29_45 29_46 29_47 29_531 29_535 29_557 29_589 29_590 29_593 29_594 29_595 29_753 29_754 29_756 29_758 29_759 29_761 29_765 29_766 29_768 29_777 29_779 29_780 29_781 29_782 29_783 29_784 29_785 29_787 29_791 29_792 29_793 29_794 29_795 29_797 29_798 29_799 29_800 29_803 29_804 29_806 29_807 29_808 29_809 29_810 29_813
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[0] origin:032-cmt-pll 28_200
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[10] origin:032-cmt-pll 28_208
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[11] origin:032-cmt-pll 29_208
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[12] origin:032-cmt-pll 28_209
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[13] origin:032-cmt-pll 29_209
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[14] origin:032-cmt-pll 28_210
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[15] origin:032-cmt-pll 29_210
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[16] origin:032-cmt-pll 28_211
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[17] origin:032-cmt-pll 29_211
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[18] origin:032-cmt-pll 28_212
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[19] origin:032-cmt-pll 29_212
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[1] origin:032-cmt-pll 29_200
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[20] origin:032-cmt-pll 28_192
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[21] origin:032-cmt-pll 29_192
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[22] origin:032-cmt-pll 28_193
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[23] origin:032-cmt-pll 29_193
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[24] origin:032-cmt-pll 28_194
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[25] origin:032-cmt-pll 29_194
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[26] origin:032-cmt-pll 28_195
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[27] origin:032-cmt-pll 29_195
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[28] origin:032-cmt-pll 28_196
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[29] origin:032-cmt-pll 29_196
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[2] origin:032-cmt-pll 28_201
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[30] origin:032-cmt-pll 28_205
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[31] origin:032-cmt-pll 29_205
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[32] origin:032-cmt-pll 28_206
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[33] origin:032-cmt-pll 29_206
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[34] origin:032-cmt-pll 28_207
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[35] origin:032-cmt-pll 28_213
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[36] origin:032-cmt-pll 29_213
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[37] origin:032-cmt-pll 28_214
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[38] origin:032-cmt-pll 29_214
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[39] origin:032-cmt-pll 28_215
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[3] origin:032-cmt-pll 29_201
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[4] origin:032-cmt-pll 28_202
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[5] origin:032-cmt-pll 29_202
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[6] origin:032-cmt-pll 28_203
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[7] origin:032-cmt-pll 29_203
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[8] origin:032-cmt-pll 28_204
CMT_TOP_R_UPPER_T.PLLE2.LKTABLE[9] origin:032-cmt-pll 29_204
CMT_TOP_R_UPPER_T.PLLE2.LOCKREG1_RESERVED[0] origin:032-cmt-pll 28_197
CMT_TOP_R_UPPER_T.PLLE2.LOCKREG1_RESERVED[1] origin:032-cmt-pll 29_197
CMT_TOP_R_UPPER_T.PLLE2.LOCKREG1_RESERVED[2] origin:032-cmt-pll 28_198
@ -333,32 +362,3 @@ CMT_TOP_R_UPPER_T.PLLE2.LOCKREG1_RESERVED[4] origin:032-cmt-pll 28_199
CMT_TOP_R_UPPER_T.PLLE2.LOCKREG1_RESERVED[5] origin:032-cmt-pll 29_199
CMT_TOP_R_UPPER_T.PLLE2.LOCKREG2_RESERVED[0] origin:032-cmt-pll 29_207
CMT_TOP_R_UPPER_T.PLLE2.LOCKREG3_RESERVED[0] origin:032-cmt-pll 29_215
CMT_TOP_R_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[0] origin:032-cmt-pll 28_320
CMT_TOP_R_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[10] origin:032-cmt-pll 28_325
CMT_TOP_R_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[11] origin:032-cmt-pll 29_325
CMT_TOP_R_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[12] origin:032-cmt-pll 28_326
CMT_TOP_R_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[13] origin:032-cmt-pll 29_326
CMT_TOP_R_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[14] origin:032-cmt-pll 28_327
CMT_TOP_R_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[15] origin:032-cmt-pll 29_327
CMT_TOP_R_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[1] origin:032-cmt-pll 29_320
CMT_TOP_R_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[2] origin:032-cmt-pll 28_321
CMT_TOP_R_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[3] origin:032-cmt-pll 29_321
CMT_TOP_R_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[4] origin:032-cmt-pll 28_322
CMT_TOP_R_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[5] origin:032-cmt-pll 29_322
CMT_TOP_R_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[6] origin:032-cmt-pll 28_323
CMT_TOP_R_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[7] origin:032-cmt-pll 29_323
CMT_TOP_R_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[8] origin:032-cmt-pll 28_324
CMT_TOP_R_UPPER_T.PLLE2.POWER_REG_POWER_REG_POWER_REG[9] origin:032-cmt-pll 29_324
CMT_TOP_R_UPPER_T.PLLE2.STARTUP_WAIT origin:032-cmt-pll 28_737
CMT_TOP_R_UPPER_T.PLLE2.TABLE[0] origin:032-cmt-pll 28_634
CMT_TOP_R_UPPER_T.PLLE2.TABLE[1] origin:032-cmt-pll 29_635
CMT_TOP_R_UPPER_T.PLLE2.TABLE[2] origin:032-cmt-pll 28_636
CMT_TOP_R_UPPER_T.PLLE2.TABLE[3] origin:032-cmt-pll 29_637
CMT_TOP_R_UPPER_T.PLLE2.TABLE[4] origin:032-cmt-pll 28_638
CMT_TOP_R_UPPER_T.PLLE2.TABLE[5] origin:032-cmt-pll 29_639
CMT_TOP_R_UPPER_T.PLLE2.TABLE[6] origin:032-cmt-pll 28_628
CMT_TOP_R_UPPER_T.PLLE2.TABLE[7] origin:032-cmt-pll 29_629
CMT_TOP_R_UPPER_T.PLLE2.TABLE[8] origin:032-cmt-pll 28_630
CMT_TOP_R_UPPER_T.PLLE2.TABLE[9] origin:032-cmt-pll 29_631
CMT_TOP_R_UPPER_T.PLLE2.ZINV_PWRDWN origin:032-cmt-pll 29_720
CMT_TOP_R_UPPER_T.PLLE2.ZINV_RST origin:032-cmt-pll 28_720

80
artix7/segbits_dsp_l.origin_info.db
View File

@ -1,12 +1,21 @@
DSP_L.DSP48.DSP_0.A_INPUT[0] origin:100-dsp-mskpat 27_84
DSP_L.DSP48.DSP_0.AREG_0 origin:100-dsp-mskpat 26_113 26_137 27_111
DSP_L.DSP48.DSP_0.AREG_2 origin:100-dsp-mskpat 27_136
DSP_L.DSP48.DSP_0.AUTORESET_PATDET_RESET origin:100-dsp-mskpat 26_79
DSP_L.DSP48.DSP_0.AUTORESET_PATDET_RESET_NOT_MATCH origin:100-dsp-mskpat 26_78
DSP_L.DSP48.DSP_0.A_INPUT[0] origin:100-dsp-mskpat 27_84
DSP_L.DSP48.DSP_0.B_INPUT[0] origin:100-dsp-mskpat 26_11
DSP_L.DSP48.DSP_0.BREG_0 origin:100-dsp-mskpat 26_40 26_48 27_38
DSP_L.DSP48.DSP_0.BREG_2 origin:100-dsp-mskpat 27_47
DSP_L.DSP48.DSP_0.B_INPUT[0] origin:100-dsp-mskpat 26_11
DSP_L.DSP48.DSP_0.MASK[0] origin:100-dsp-mskpat 27_01
DSP_L.DSP48.DSP_0.MASK[1] origin:100-dsp-mskpat 26_03
DSP_L.DSP48.DSP_0.MASK[2] origin:100-dsp-mskpat 27_06
DSP_L.DSP48.DSP_0.MASK[3] origin:100-dsp-mskpat 26_07
DSP_L.DSP48.DSP_0.MASK[4] origin:100-dsp-mskpat 26_10
DSP_L.DSP48.DSP_0.MASK[5] origin:100-dsp-mskpat 27_11
DSP_L.DSP48.DSP_0.MASK[6] origin:100-dsp-mskpat 26_18
DSP_L.DSP48.DSP_0.MASK[7] origin:100-dsp-mskpat 27_19
DSP_L.DSP48.DSP_0.MASK[8] origin:100-dsp-mskpat 26_22
DSP_L.DSP48.DSP_0.MASK[9] origin:100-dsp-mskpat 27_23
DSP_L.DSP48.DSP_0.MASK[10] origin:100-dsp-mskpat 27_26
DSP_L.DSP48.DSP_0.MASK[11] origin:100-dsp-mskpat 26_28
DSP_L.DSP48.DSP_0.MASK[12] origin:100-dsp-mskpat 26_41
@ -17,7 +26,6 @@ DSP_L.DSP48.DSP_0.MASK[16] origin:100-dsp-mskpat 26_49
DSP_L.DSP48.DSP_0.MASK[17] origin:100-dsp-mskpat 27_50
DSP_L.DSP48.DSP_0.MASK[18] origin:100-dsp-mskpat 27_57
DSP_L.DSP48.DSP_0.MASK[19] origin:100-dsp-mskpat 26_59
DSP_L.DSP48.DSP_0.MASK[1] origin:100-dsp-mskpat 26_03
DSP_L.DSP48.DSP_0.MASK[20] origin:100-dsp-mskpat 26_62
DSP_L.DSP48.DSP_0.MASK[21] origin:100-dsp-mskpat 27_63
DSP_L.DSP48.DSP_0.MASK[22] origin:100-dsp-mskpat 26_66
@ -28,7 +36,6 @@ DSP_L.DSP48.DSP_0.MASK[26] origin:100-dsp-mskpat 27_90
DSP_L.DSP48.DSP_0.MASK[27] origin:100-dsp-mskpat 26_92
DSP_L.DSP48.DSP_0.MASK[28] origin:100-dsp-mskpat 27_94
DSP_L.DSP48.DSP_0.MASK[29] origin:100-dsp-mskpat 26_96
DSP_L.DSP48.DSP_0.MASK[2] origin:100-dsp-mskpat 27_06
DSP_L.DSP48.DSP_0.MASK[30] origin:100-dsp-mskpat 27_102
DSP_L.DSP48.DSP_0.MASK[31] origin:100-dsp-mskpat 26_104
DSP_L.DSP48.DSP_0.MASK[32] origin:100-dsp-mskpat 27_106
@ -39,7 +46,6 @@ DSP_L.DSP48.DSP_0.MASK[36] origin:100-dsp-mskpat 27_127
DSP_L.DSP48.DSP_0.MASK[37] origin:100-dsp-mskpat 26_129
DSP_L.DSP48.DSP_0.MASK[38] origin:100-dsp-mskpat 26_132
DSP_L.DSP48.DSP_0.MASK[39] origin:100-dsp-mskpat 27_133
DSP_L.DSP48.DSP_0.MASK[3] origin:100-dsp-mskpat 26_07
DSP_L.DSP48.DSP_0.MASK[40] origin:100-dsp-mskpat 26_136
DSP_L.DSP48.DSP_0.MASK[41] origin:100-dsp-mskpat 27_137
DSP_L.DSP48.DSP_0.MASK[42] origin:100-dsp-mskpat 27_144
@ -48,13 +54,16 @@ DSP_L.DSP48.DSP_0.MASK[44] origin:100-dsp-mskpat 26_149
DSP_L.DSP48.DSP_0.MASK[45] origin:100-dsp-mskpat 27_150
DSP_L.DSP48.DSP_0.MASK[46] origin:100-dsp-mskpat 26_153
DSP_L.DSP48.DSP_0.MASK[47] origin:100-dsp-mskpat 26_154
DSP_L.DSP48.DSP_0.MASK[4] origin:100-dsp-mskpat 26_10
DSP_L.DSP48.DSP_0.MASK[5] origin:100-dsp-mskpat 27_11
DSP_L.DSP48.DSP_0.MASK[6] origin:100-dsp-mskpat 26_18
DSP_L.DSP48.DSP_0.MASK[7] origin:100-dsp-mskpat 27_19
DSP_L.DSP48.DSP_0.MASK[8] origin:100-dsp-mskpat 26_22
DSP_L.DSP48.DSP_0.MASK[9] origin:100-dsp-mskpat 27_23
DSP_L.DSP48.DSP_0.PATTERN[0] origin:100-dsp-mskpat 26_01
DSP_L.DSP48.DSP_0.PATTERN[1] origin:100-dsp-mskpat 26_04
DSP_L.DSP48.DSP_0.PATTERN[2] origin:100-dsp-mskpat 26_05
DSP_L.DSP48.DSP_0.PATTERN[3] origin:100-dsp-mskpat 27_08
DSP_L.DSP48.DSP_0.PATTERN[4] origin:100-dsp-mskpat 26_09
DSP_L.DSP48.DSP_0.PATTERN[5] origin:100-dsp-mskpat 26_12
DSP_L.DSP48.DSP_0.PATTERN[6] origin:100-dsp-mskpat 27_17
DSP_L.DSP48.DSP_0.PATTERN[7] origin:100-dsp-mskpat 26_20
DSP_L.DSP48.DSP_0.PATTERN[8] origin:100-dsp-mskpat 27_21
DSP_L.DSP48.DSP_0.PATTERN[9] origin:100-dsp-mskpat 27_24
DSP_L.DSP48.DSP_0.PATTERN[10] origin:100-dsp-mskpat 26_26
DSP_L.DSP48.DSP_0.PATTERN[11] origin:100-dsp-mskpat 26_29
DSP_L.DSP48.DSP_0.PATTERN[12] origin:100-dsp-mskpat 27_40
@ -65,7 +74,6 @@ DSP_L.DSP48.DSP_0.PATTERN[16] origin:100-dsp-mskpat 27_48
DSP_L.DSP48.DSP_0.PATTERN[17] origin:100-dsp-mskpat 26_51
DSP_L.DSP48.DSP_0.PATTERN[18] origin:100-dsp-mskpat 26_57
DSP_L.DSP48.DSP_0.PATTERN[19] origin:100-dsp-mskpat 26_60
DSP_L.DSP48.DSP_0.PATTERN[1] origin:100-dsp-mskpat 26_04
DSP_L.DSP48.DSP_0.PATTERN[20] origin:100-dsp-mskpat 27_61
DSP_L.DSP48.DSP_0.PATTERN[21] origin:100-dsp-mskpat 26_64
DSP_L.DSP48.DSP_0.PATTERN[22] origin:100-dsp-mskpat 27_65
@ -76,7 +84,6 @@ DSP_L.DSP48.DSP_0.PATTERN[26] origin:100-dsp-mskpat 26_90
DSP_L.DSP48.DSP_0.PATTERN[27] origin:100-dsp-mskpat 27_92
DSP_L.DSP48.DSP_0.PATTERN[28] origin:100-dsp-mskpat 26_94
DSP_L.DSP48.DSP_0.PATTERN[29] origin:100-dsp-mskpat 26_97
DSP_L.DSP48.DSP_0.PATTERN[2] origin:100-dsp-mskpat 26_05
DSP_L.DSP48.DSP_0.PATTERN[30] origin:100-dsp-mskpat 27_101
DSP_L.DSP48.DSP_0.PATTERN[31] origin:100-dsp-mskpat 27_104
DSP_L.DSP48.DSP_0.PATTERN[32] origin:100-dsp-mskpat 26_106
@ -87,7 +94,6 @@ DSP_L.DSP48.DSP_0.PATTERN[36] origin:100-dsp-mskpat 26_127
DSP_L.DSP48.DSP_0.PATTERN[37] origin:100-dsp-mskpat 26_130
DSP_L.DSP48.DSP_0.PATTERN[38] origin:100-dsp-mskpat 27_131
DSP_L.DSP48.DSP_0.PATTERN[39] origin:100-dsp-mskpat 26_134
DSP_L.DSP48.DSP_0.PATTERN[3] origin:100-dsp-mskpat 27_08
DSP_L.DSP48.DSP_0.PATTERN[40] origin:100-dsp-mskpat 27_135
DSP_L.DSP48.DSP_0.PATTERN[41] origin:100-dsp-mskpat 26_138
DSP_L.DSP48.DSP_0.PATTERN[42] origin:100-dsp-mskpat 26_144
@ -96,12 +102,6 @@ DSP_L.DSP48.DSP_0.PATTERN[44] origin:100-dsp-mskpat 26_148
DSP_L.DSP48.DSP_0.PATTERN[45] origin:100-dsp-mskpat 26_151
DSP_L.DSP48.DSP_0.PATTERN[46] origin:100-dsp-mskpat 27_152
DSP_L.DSP48.DSP_0.PATTERN[47] origin:100-dsp-mskpat 26_155
DSP_L.DSP48.DSP_0.PATTERN[4] origin:100-dsp-mskpat 26_09
DSP_L.DSP48.DSP_0.PATTERN[5] origin:100-dsp-mskpat 26_12
DSP_L.DSP48.DSP_0.PATTERN[6] origin:100-dsp-mskpat 27_17
DSP_L.DSP48.DSP_0.PATTERN[7] origin:100-dsp-mskpat 26_20
DSP_L.DSP48.DSP_0.PATTERN[8] origin:100-dsp-mskpat 27_21
DSP_L.DSP48.DSP_0.PATTERN[9] origin:100-dsp-mskpat 27_24
DSP_L.DSP48.DSP_0.SEL_MASK_C origin:100-dsp-mskpat 26_83
DSP_L.DSP48.DSP_0.SEL_MASK_ROUNDING_MODE1 origin:100-dsp-mskpat 27_82
DSP_L.DSP48.DSP_0.SEL_MASK_ROUNDING_MODE2 origin:100-dsp-mskpat 27_81 27_82
@ -138,15 +138,24 @@ DSP_L.DSP48.DSP_0.ZIS_OPMODE_INVERTED[6] origin:100-dsp-mskpat 27_13
DSP_L.DSP48.DSP_0.ZMREG[0] origin:100-dsp-mskpat 26_38
DSP_L.DSP48.DSP_0.ZOPMODEREG[0] origin:100-dsp-mskpat 26_25
DSP_L.DSP48.DSP_0.ZPREG[0] origin:100-dsp-mskpat 27_75
DSP_L.DSP48.DSP_1.A_INPUT[0] origin:100-dsp-mskpat 27_244
DSP_L.DSP48.DSP_1.AREG_0 origin:100-dsp-mskpat 26_273 26_297 27_271
DSP_L.DSP48.DSP_1.AREG_2 origin:100-dsp-mskpat 27_296
DSP_L.DSP48.DSP_1.AUTORESET_PATDET_RESET origin:100-dsp-mskpat 26_239
DSP_L.DSP48.DSP_1.AUTORESET_PATDET_RESET_NOT_MATCH origin:100-dsp-mskpat 26_238
DSP_L.DSP48.DSP_1.A_INPUT[0] origin:100-dsp-mskpat 27_244
DSP_L.DSP48.DSP_1.B_INPUT[0] origin:100-dsp-mskpat 26_171
DSP_L.DSP48.DSP_1.BREG_0 origin:100-dsp-mskpat 26_200 26_208 27_198
DSP_L.DSP48.DSP_1.BREG_2 origin:100-dsp-mskpat 27_207
DSP_L.DSP48.DSP_1.B_INPUT[0] origin:100-dsp-mskpat 26_171
DSP_L.DSP48.DSP_1.MASK[0] origin:100-dsp-mskpat 27_161
DSP_L.DSP48.DSP_1.MASK[1] origin:100-dsp-mskpat 26_163
DSP_L.DSP48.DSP_1.MASK[2] origin:100-dsp-mskpat 27_166
DSP_L.DSP48.DSP_1.MASK[3] origin:100-dsp-mskpat 26_167
DSP_L.DSP48.DSP_1.MASK[4] origin:100-dsp-mskpat 26_170
DSP_L.DSP48.DSP_1.MASK[5] origin:100-dsp-mskpat 27_171
DSP_L.DSP48.DSP_1.MASK[6] origin:100-dsp-mskpat 26_178
DSP_L.DSP48.DSP_1.MASK[7] origin:100-dsp-mskpat 27_179
DSP_L.DSP48.DSP_1.MASK[8] origin:100-dsp-mskpat 26_182
DSP_L.DSP48.DSP_1.MASK[9] origin:100-dsp-mskpat 27_183
DSP_L.DSP48.DSP_1.MASK[10] origin:100-dsp-mskpat 27_186
DSP_L.DSP48.DSP_1.MASK[11] origin:100-dsp-mskpat 26_188
DSP_L.DSP48.DSP_1.MASK[12] origin:100-dsp-mskpat 26_201
@ -157,7 +166,6 @@ DSP_L.DSP48.DSP_1.MASK[16] origin:100-dsp-mskpat 26_209
DSP_L.DSP48.DSP_1.MASK[17] origin:100-dsp-mskpat 27_210
DSP_L.DSP48.DSP_1.MASK[18] origin:100-dsp-mskpat 27_217
DSP_L.DSP48.DSP_1.MASK[19] origin:100-dsp-mskpat 26_219
DSP_L.DSP48.DSP_1.MASK[1] origin:100-dsp-mskpat 26_163
DSP_L.DSP48.DSP_1.MASK[20] origin:100-dsp-mskpat 26_222
DSP_L.DSP48.DSP_1.MASK[21] origin:100-dsp-mskpat 27_223
DSP_L.DSP48.DSP_1.MASK[22] origin:100-dsp-mskpat 26_226
@ -168,7 +176,6 @@ DSP_L.DSP48.DSP_1.MASK[26] origin:100-dsp-mskpat 27_250
DSP_L.DSP48.DSP_1.MASK[27] origin:100-dsp-mskpat 26_252
DSP_L.DSP48.DSP_1.MASK[28] origin:100-dsp-mskpat 27_254
DSP_L.DSP48.DSP_1.MASK[29] origin:100-dsp-mskpat 26_256
DSP_L.DSP48.DSP_1.MASK[2] origin:100-dsp-mskpat 27_166
DSP_L.DSP48.DSP_1.MASK[30] origin:100-dsp-mskpat 27_262
DSP_L.DSP48.DSP_1.MASK[31] origin:100-dsp-mskpat 26_264
DSP_L.DSP48.DSP_1.MASK[32] origin:100-dsp-mskpat 27_266
@ -179,7 +186,6 @@ DSP_L.DSP48.DSP_1.MASK[36] origin:100-dsp-mskpat 27_287
DSP_L.DSP48.DSP_1.MASK[37] origin:100-dsp-mskpat 26_289
DSP_L.DSP48.DSP_1.MASK[38] origin:100-dsp-mskpat 26_292
DSP_L.DSP48.DSP_1.MASK[39] origin:100-dsp-mskpat 27_293
DSP_L.DSP48.DSP_1.MASK[3] origin:100-dsp-mskpat 26_167
DSP_L.DSP48.DSP_1.MASK[40] origin:100-dsp-mskpat 26_296
DSP_L.DSP48.DSP_1.MASK[41] origin:100-dsp-mskpat 27_297
DSP_L.DSP48.DSP_1.MASK[42] origin:100-dsp-mskpat 27_304
@ -188,13 +194,16 @@ DSP_L.DSP48.DSP_1.MASK[44] origin:100-dsp-mskpat 26_309
DSP_L.DSP48.DSP_1.MASK[45] origin:100-dsp-mskpat 27_310
DSP_L.DSP48.DSP_1.MASK[46] origin:100-dsp-mskpat 26_313
DSP_L.DSP48.DSP_1.MASK[47] origin:100-dsp-mskpat 26_314
DSP_L.DSP48.DSP_1.MASK[4] origin:100-dsp-mskpat 26_170
DSP_L.DSP48.DSP_1.MASK[5] origin:100-dsp-mskpat 27_171
DSP_L.DSP48.DSP_1.MASK[6] origin:100-dsp-mskpat 26_178
DSP_L.DSP48.DSP_1.MASK[7] origin:100-dsp-mskpat 27_179
DSP_L.DSP48.DSP_1.MASK[8] origin:100-dsp-mskpat 26_182
DSP_L.DSP48.DSP_1.MASK[9] origin:100-dsp-mskpat 27_183
DSP_L.DSP48.DSP_1.PATTERN[0] origin:100-dsp-mskpat 26_161
DSP_L.DSP48.DSP_1.PATTERN[1] origin:100-dsp-mskpat 26_164
DSP_L.DSP48.DSP_1.PATTERN[2] origin:100-dsp-mskpat 26_165
DSP_L.DSP48.DSP_1.PATTERN[3] origin:100-dsp-mskpat 27_168
DSP_L.DSP48.DSP_1.PATTERN[4] origin:100-dsp-mskpat 26_169
DSP_L.DSP48.DSP_1.PATTERN[5] origin:100-dsp-mskpat 26_172
DSP_L.DSP48.DSP_1.PATTERN[6] origin:100-dsp-mskpat 27_177
DSP_L.DSP48.DSP_1.PATTERN[7] origin:100-dsp-mskpat 26_180
DSP_L.DSP48.DSP_1.PATTERN[8] origin:100-dsp-mskpat 27_181
DSP_L.DSP48.DSP_1.PATTERN[9] origin:100-dsp-mskpat 27_184
DSP_L.DSP48.DSP_1.PATTERN[10] origin:100-dsp-mskpat 26_186
DSP_L.DSP48.DSP_1.PATTERN[11] origin:100-dsp-mskpat 26_189
DSP_L.DSP48.DSP_1.PATTERN[12] origin:100-dsp-mskpat 27_200
@ -205,7 +214,6 @@ DSP_L.DSP48.DSP_1.PATTERN[16] origin:100-dsp-mskpat 27_208
DSP_L.DSP48.DSP_1.PATTERN[17] origin:100-dsp-mskpat 26_211
DSP_L.DSP48.DSP_1.PATTERN[18] origin:100-dsp-mskpat 26_217
DSP_L.DSP48.DSP_1.PATTERN[19] origin:100-dsp-mskpat 26_220
DSP_L.DSP48.DSP_1.PATTERN[1] origin:100-dsp-mskpat 26_164
DSP_L.DSP48.DSP_1.PATTERN[20] origin:100-dsp-mskpat 27_221
DSP_L.DSP48.DSP_1.PATTERN[21] origin:100-dsp-mskpat 26_224
DSP_L.DSP48.DSP_1.PATTERN[22] origin:100-dsp-mskpat 27_225
@ -216,7 +224,6 @@ DSP_L.DSP48.DSP_1.PATTERN[26] origin:100-dsp-mskpat 26_250
DSP_L.DSP48.DSP_1.PATTERN[27] origin:100-dsp-mskpat 27_252
DSP_L.DSP48.DSP_1.PATTERN[28] origin:100-dsp-mskpat 26_254
DSP_L.DSP48.DSP_1.PATTERN[29] origin:100-dsp-mskpat 26_257
DSP_L.DSP48.DSP_1.PATTERN[2] origin:100-dsp-mskpat 26_165
DSP_L.DSP48.DSP_1.PATTERN[30] origin:100-dsp-mskpat 27_261
DSP_L.DSP48.DSP_1.PATTERN[31] origin:100-dsp-mskpat 27_264
DSP_L.DSP48.DSP_1.PATTERN[32] origin:100-dsp-mskpat 26_266
@ -227,7 +234,6 @@ DSP_L.DSP48.DSP_1.PATTERN[36] origin:100-dsp-mskpat 26_287
DSP_L.DSP48.DSP_1.PATTERN[37] origin:100-dsp-mskpat 26_290
DSP_L.DSP48.DSP_1.PATTERN[38] origin:100-dsp-mskpat 27_291
DSP_L.DSP48.DSP_1.PATTERN[39] origin:100-dsp-mskpat 26_294
DSP_L.DSP48.DSP_1.PATTERN[3] origin:100-dsp-mskpat 27_168
DSP_L.DSP48.DSP_1.PATTERN[40] origin:100-dsp-mskpat 27_295
DSP_L.DSP48.DSP_1.PATTERN[41] origin:100-dsp-mskpat 26_298
DSP_L.DSP48.DSP_1.PATTERN[42] origin:100-dsp-mskpat 26_304
@ -236,12 +242,6 @@ DSP_L.DSP48.DSP_1.PATTERN[44] origin:100-dsp-mskpat 26_308
DSP_L.DSP48.DSP_1.PATTERN[45] origin:100-dsp-mskpat 26_311
DSP_L.DSP48.DSP_1.PATTERN[46] origin:100-dsp-mskpat 27_312
DSP_L.DSP48.DSP_1.PATTERN[47] origin:100-dsp-mskpat 26_315
DSP_L.DSP48.DSP_1.PATTERN[4] origin:100-dsp-mskpat 26_169
DSP_L.DSP48.DSP_1.PATTERN[5] origin:100-dsp-mskpat 26_172
DSP_L.DSP48.DSP_1.PATTERN[6] origin:100-dsp-mskpat 27_177
DSP_L.DSP48.DSP_1.PATTERN[7] origin:100-dsp-mskpat 26_180
DSP_L.DSP48.DSP_1.PATTERN[8] origin:100-dsp-mskpat 27_181
DSP_L.DSP48.DSP_1.PATTERN[9] origin:100-dsp-mskpat 27_184
DSP_L.DSP48.DSP_1.SEL_MASK_C origin:100-dsp-mskpat 26_243
DSP_L.DSP48.DSP_1.SEL_MASK_ROUNDING_MODE1 origin:100-dsp-mskpat 27_242
DSP_L.DSP48.DSP_1.SEL_MASK_ROUNDING_MODE2 origin:100-dsp-mskpat 27_241 27_242

80
artix7/segbits_dsp_r.origin_info.db
View File

@ -1,12 +1,21 @@
DSP_R.DSP48.DSP_0.A_INPUT[0] origin:100-dsp-mskpat 27_84
DSP_R.DSP48.DSP_0.AREG_0 origin:100-dsp-mskpat 26_113 26_137 27_111
DSP_R.DSP48.DSP_0.AREG_2 origin:100-dsp-mskpat 27_136
DSP_R.DSP48.DSP_0.AUTORESET_PATDET_RESET origin:100-dsp-mskpat 26_79
DSP_R.DSP48.DSP_0.AUTORESET_PATDET_RESET_NOT_MATCH origin:100-dsp-mskpat 26_78
DSP_R.DSP48.DSP_0.A_INPUT[0] origin:100-dsp-mskpat 27_84
DSP_R.DSP48.DSP_0.B_INPUT[0] origin:100-dsp-mskpat 26_11
DSP_R.DSP48.DSP_0.BREG_0 origin:100-dsp-mskpat 26_40 26_48 27_38
DSP_R.DSP48.DSP_0.BREG_2 origin:100-dsp-mskpat 27_47
DSP_R.DSP48.DSP_0.B_INPUT[0] origin:100-dsp-mskpat 26_11
DSP_R.DSP48.DSP_0.MASK[0] origin:100-dsp-mskpat 27_01
DSP_R.DSP48.DSP_0.MASK[1] origin:100-dsp-mskpat 26_03
DSP_R.DSP48.DSP_0.MASK[2] origin:100-dsp-mskpat 27_06
DSP_R.DSP48.DSP_0.MASK[3] origin:100-dsp-mskpat 26_07
DSP_R.DSP48.DSP_0.MASK[4] origin:100-dsp-mskpat 26_10
DSP_R.DSP48.DSP_0.MASK[5] origin:100-dsp-mskpat 27_11
DSP_R.DSP48.DSP_0.MASK[6] origin:100-dsp-mskpat 26_18
DSP_R.DSP48.DSP_0.MASK[7] origin:100-dsp-mskpat 27_19
DSP_R.DSP48.DSP_0.MASK[8] origin:100-dsp-mskpat 26_22
DSP_R.DSP48.DSP_0.MASK[9] origin:100-dsp-mskpat 27_23
DSP_R.DSP48.DSP_0.MASK[10] origin:100-dsp-mskpat 27_26
DSP_R.DSP48.DSP_0.MASK[11] origin:100-dsp-mskpat 26_28
DSP_R.DSP48.DSP_0.MASK[12] origin:100-dsp-mskpat 26_41
@ -17,7 +26,6 @@ DSP_R.DSP48.DSP_0.MASK[16] origin:100-dsp-mskpat 26_49
DSP_R.DSP48.DSP_0.MASK[17] origin:100-dsp-mskpat 27_50
DSP_R.DSP48.DSP_0.MASK[18] origin:100-dsp-mskpat 27_57
DSP_R.DSP48.DSP_0.MASK[19] origin:100-dsp-mskpat 26_59
DSP_R.DSP48.DSP_0.MASK[1] origin:100-dsp-mskpat 26_03
DSP_R.DSP48.DSP_0.MASK[20] origin:100-dsp-mskpat 26_62
DSP_R.DSP48.DSP_0.MASK[21] origin:100-dsp-mskpat 27_63
DSP_R.DSP48.DSP_0.MASK[22] origin:100-dsp-mskpat 26_66
@ -28,7 +36,6 @@ DSP_R.DSP48.DSP_0.MASK[26] origin:100-dsp-mskpat 27_90
DSP_R.DSP48.DSP_0.MASK[27] origin:100-dsp-mskpat 26_92
DSP_R.DSP48.DSP_0.MASK[28] origin:100-dsp-mskpat 27_94
DSP_R.DSP48.DSP_0.MASK[29] origin:100-dsp-mskpat 26_96
DSP_R.DSP48.DSP_0.MASK[2] origin:100-dsp-mskpat 27_06
DSP_R.DSP48.DSP_0.MASK[30] origin:100-dsp-mskpat 27_102
DSP_R.DSP48.DSP_0.MASK[31] origin:100-dsp-mskpat 26_104
DSP_R.DSP48.DSP_0.MASK[32] origin:100-dsp-mskpat 27_106
@ -39,7 +46,6 @@ DSP_R.DSP48.DSP_0.MASK[36] origin:100-dsp-mskpat 27_127
DSP_R.DSP48.DSP_0.MASK[37] origin:100-dsp-mskpat 26_129
DSP_R.DSP48.DSP_0.MASK[38] origin:100-dsp-mskpat 26_132
DSP_R.DSP48.DSP_0.MASK[39] origin:100-dsp-mskpat 27_133
DSP_R.DSP48.DSP_0.MASK[3] origin:100-dsp-mskpat 26_07
DSP_R.DSP48.DSP_0.MASK[40] origin:100-dsp-mskpat 26_136
DSP_R.DSP48.DSP_0.MASK[41] origin:100-dsp-mskpat 27_137
DSP_R.DSP48.DSP_0.MASK[42] origin:100-dsp-mskpat 27_144
@ -48,13 +54,16 @@ DSP_R.DSP48.DSP_0.MASK[44] origin:100-dsp-mskpat 26_149
DSP_R.DSP48.DSP_0.MASK[45] origin:100-dsp-mskpat 27_150
DSP_R.DSP48.DSP_0.MASK[46] origin:100-dsp-mskpat 26_153
DSP_R.DSP48.DSP_0.MASK[47] origin:100-dsp-mskpat 26_154
DSP_R.DSP48.DSP_0.MASK[4] origin:100-dsp-mskpat 26_10
DSP_R.DSP48.DSP_0.MASK[5] origin:100-dsp-mskpat 27_11
DSP_R.DSP48.DSP_0.MASK[6] origin:100-dsp-mskpat 26_18
DSP_R.DSP48.DSP_0.MASK[7] origin:100-dsp-mskpat 27_19
DSP_R.DSP48.DSP_0.MASK[8] origin:100-dsp-mskpat 26_22
DSP_R.DSP48.DSP_0.MASK[9] origin:100-dsp-mskpat 27_23
DSP_R.DSP48.DSP_0.PATTERN[0] origin:100-dsp-mskpat 26_01
DSP_R.DSP48.DSP_0.PATTERN[1] origin:100-dsp-mskpat 26_04
DSP_R.DSP48.DSP_0.PATTERN[2] origin:100-dsp-mskpat 26_05
DSP_R.DSP48.DSP_0.PATTERN[3] origin:100-dsp-mskpat 27_08
DSP_R.DSP48.DSP_0.PATTERN[4] origin:100-dsp-mskpat 26_09
DSP_R.DSP48.DSP_0.PATTERN[5] origin:100-dsp-mskpat 26_12
DSP_R.DSP48.DSP_0.PATTERN[6] origin:100-dsp-mskpat 27_17
DSP_R.DSP48.DSP_0.PATTERN[7] origin:100-dsp-mskpat 26_20
DSP_R.DSP48.DSP_0.PATTERN[8] origin:100-dsp-mskpat 27_21
DSP_R.DSP48.DSP_0.PATTERN[9] origin:100-dsp-mskpat 27_24
DSP_R.DSP48.DSP_0.PATTERN[10] origin:100-dsp-mskpat 26_26
DSP_R.DSP48.DSP_0.PATTERN[11] origin:100-dsp-mskpat 26_29
DSP_R.DSP48.DSP_0.PATTERN[12] origin:100-dsp-mskpat 27_40
@ -65,7 +74,6 @@ DSP_R.DSP48.DSP_0.PATTERN[16] origin:100-dsp-mskpat 27_48
DSP_R.DSP48.DSP_0.PATTERN[17] origin:100-dsp-mskpat 26_51
DSP_R.DSP48.DSP_0.PATTERN[18] origin:100-dsp-mskpat 26_57
DSP_R.DSP48.DSP_0.PATTERN[19] origin:100-dsp-mskpat 26_60
DSP_R.DSP48.DSP_0.PATTERN[1] origin:100-dsp-mskpat 26_04
DSP_R.DSP48.DSP_0.PATTERN[20] origin:100-dsp-mskpat 27_61
DSP_R.DSP48.DSP_0.PATTERN[21] origin:100-dsp-mskpat 26_64
DSP_R.DSP48.DSP_0.PATTERN[22] origin:100-dsp-mskpat 27_65
@ -76,7 +84,6 @@ DSP_R.DSP48.DSP_0.PATTERN[26] origin:100-dsp-mskpat 26_90
DSP_R.DSP48.DSP_0.PATTERN[27] origin:100-dsp-mskpat 27_92
DSP_R.DSP48.DSP_0.PATTERN[28] origin:100-dsp-mskpat 26_94
DSP_R.DSP48.DSP_0.PATTERN[29] origin:100-dsp-mskpat 26_97
DSP_R.DSP48.DSP_0.PATTERN[2] origin:100-dsp-mskpat 26_05
DSP_R.DSP48.DSP_0.PATTERN[30] origin:100-dsp-mskpat 27_101
DSP_R.DSP48.DSP_0.PATTERN[31] origin:100-dsp-mskpat 27_104
DSP_R.DSP48.DSP_0.PATTERN[32] origin:100-dsp-mskpat 26_106
@ -87,7 +94,6 @@ DSP_R.DSP48.DSP_0.PATTERN[36] origin:100-dsp-mskpat 26_127
DSP_R.DSP48.DSP_0.PATTERN[37] origin:100-dsp-mskpat 26_130
DSP_R.DSP48.DSP_0.PATTERN[38] origin:100-dsp-mskpat 27_131
DSP_R.DSP48.DSP_0.PATTERN[39] origin:100-dsp-mskpat 26_134
DSP_R.DSP48.DSP_0.PATTERN[3] origin:100-dsp-mskpat 27_08
DSP_R.DSP48.DSP_0.PATTERN[40] origin:100-dsp-mskpat 27_135
DSP_R.DSP48.DSP_0.PATTERN[41] origin:100-dsp-mskpat 26_138
DSP_R.DSP48.DSP_0.PATTERN[42] origin:100-dsp-mskpat 26_144
@ -96,12 +102,6 @@ DSP_R.DSP48.DSP_0.PATTERN[44] origin:100-dsp-mskpat 26_148
DSP_R.DSP48.DSP_0.PATTERN[45] origin:100-dsp-mskpat 26_151
DSP_R.DSP48.DSP_0.PATTERN[46] origin:100-dsp-mskpat 27_152
DSP_R.DSP48.DSP_0.PATTERN[47] origin:100-dsp-mskpat 26_155
DSP_R.DSP48.DSP_0.PATTERN[4] origin:100-dsp-mskpat 26_09
DSP_R.DSP48.DSP_0.PATTERN[5] origin:100-dsp-mskpat 26_12
DSP_R.DSP48.DSP_0.PATTERN[6] origin:100-dsp-mskpat 27_17
DSP_R.DSP48.DSP_0.PATTERN[7] origin:100-dsp-mskpat 26_20
DSP_R.DSP48.DSP_0.PATTERN[8] origin:100-dsp-mskpat 27_21
DSP_R.DSP48.DSP_0.PATTERN[9] origin:100-dsp-mskpat 27_24
DSP_R.DSP48.DSP_0.SEL_MASK_C origin:100-dsp-mskpat 26_83
DSP_R.DSP48.DSP_0.SEL_MASK_ROUNDING_MODE1 origin:100-dsp-mskpat 27_82
DSP_R.DSP48.DSP_0.SEL_MASK_ROUNDING_MODE2 origin:100-dsp-mskpat 27_81 27_82
@ -138,15 +138,24 @@ DSP_R.DSP48.DSP_0.ZIS_OPMODE_INVERTED[6] origin:100-dsp-mskpat 27_13
DSP_R.DSP48.DSP_0.ZMREG[0] origin:100-dsp-mskpat 26_38
DSP_R.DSP48.DSP_0.ZOPMODEREG[0] origin:100-dsp-mskpat 26_25
DSP_R.DSP48.DSP_0.ZPREG[0] origin:100-dsp-mskpat 27_75
DSP_R.DSP48.DSP_1.A_INPUT[0] origin:100-dsp-mskpat 27_244
DSP_R.DSP48.DSP_1.AREG_0 origin:100-dsp-mskpat 26_273 26_297 27_271
DSP_R.DSP48.DSP_1.AREG_2 origin:100-dsp-mskpat 27_296
DSP_R.DSP48.DSP_1.AUTORESET_PATDET_RESET origin:100-dsp-mskpat 26_239
DSP_R.DSP48.DSP_1.AUTORESET_PATDET_RESET_NOT_MATCH origin:100-dsp-mskpat 26_238
DSP_R.DSP48.DSP_1.A_INPUT[0] origin:100-dsp-mskpat 27_244
DSP_R.DSP48.DSP_1.B_INPUT[0] origin:100-dsp-mskpat 26_171
DSP_R.DSP48.DSP_1.BREG_0 origin:100-dsp-mskpat 26_200 26_208 27_198
DSP_R.DSP48.DSP_1.BREG_2 origin:100-dsp-mskpat 27_207
DSP_R.DSP48.DSP_1.B_INPUT[0] origin:100-dsp-mskpat 26_171
DSP_R.DSP48.DSP_1.MASK[0] origin:100-dsp-mskpat 27_161
DSP_R.DSP48.DSP_1.MASK[1] origin:100-dsp-mskpat 26_163
DSP_R.DSP48.DSP_1.MASK[2] origin:100-dsp-mskpat 27_166
DSP_R.DSP48.DSP_1.MASK[3] origin:100-dsp-mskpat 26_167
DSP_R.DSP48.DSP_1.MASK[4] origin:100-dsp-mskpat 26_170
DSP_R.DSP48.DSP_1.MASK[5] origin:100-dsp-mskpat 27_171
DSP_R.DSP48.DSP_1.MASK[6] origin:100-dsp-mskpat 26_178
DSP_R.DSP48.DSP_1.MASK[7] origin:100-dsp-mskpat 27_179
DSP_R.DSP48.DSP_1.MASK[8] origin:100-dsp-mskpat 26_182
DSP_R.DSP48.DSP_1.MASK[9] origin:100-dsp-mskpat 27_183
DSP_R.DSP48.DSP_1.MASK[10] origin:100-dsp-mskpat 27_186
DSP_R.DSP48.DSP_1.MASK[11] origin:100-dsp-mskpat 26_188
DSP_R.DSP48.DSP_1.MASK[12] origin:100-dsp-mskpat 26_201
@ -157,7 +166,6 @@ DSP_R.DSP48.DSP_1.MASK[16] origin:100-dsp-mskpat 26_209
DSP_R.DSP48.DSP_1.MASK[17] origin:100-dsp-mskpat 27_210
DSP_R.DSP48.DSP_1.MASK[18] origin:100-dsp-mskpat 27_217
DSP_R.DSP48.DSP_1.MASK[19] origin:100-dsp-mskpat 26_219
DSP_R.DSP48.DSP_1.MASK[1] origin:100-dsp-mskpat 26_163
DSP_R.DSP48.DSP_1.MASK[20] origin:100-dsp-mskpat 26_222
DSP_R.DSP48.DSP_1.MASK[21] origin:100-dsp-mskpat 27_223
DSP_R.DSP48.DSP_1.MASK[22] origin:100-dsp-mskpat 26_226
@ -168,7 +176,6 @@ DSP_R.DSP48.DSP_1.MASK[26] origin:100-dsp-mskpat 27_250
DSP_R.DSP48.DSP_1.MASK[27] origin:100-dsp-mskpat 26_252
DSP_R.DSP48.DSP_1.MASK[28] origin:100-dsp-mskpat 27_254
DSP_R.DSP48.DSP_1.MASK[29] origin:100-dsp-mskpat 26_256
DSP_R.DSP48.DSP_1.MASK[2] origin:100-dsp-mskpat 27_166
DSP_R.DSP48.DSP_1.MASK[30] origin:100-dsp-mskpat 27_262
DSP_R.DSP48.DSP_1.MASK[31] origin:100-dsp-mskpat 26_264
DSP_R.DSP48.DSP_1.MASK[32] origin:100-dsp-mskpat 27_266
@ -179,7 +186,6 @@ DSP_R.DSP48.DSP_1.MASK[36] origin:100-dsp-mskpat 27_287
DSP_R.DSP48.DSP_1.MASK[37] origin:100-dsp-mskpat 26_289
DSP_R.DSP48.DSP_1.MASK[38] origin:100-dsp-mskpat 26_292
DSP_R.DSP48.DSP_1.MASK[39] origin:100-dsp-mskpat 27_293
DSP_R.DSP48.DSP_1.MASK[3] origin:100-dsp-mskpat 26_167
DSP_R.DSP48.DSP_1.MASK[40] origin:100-dsp-mskpat 26_296
DSP_R.DSP48.DSP_1.MASK[41] origin:100-dsp-mskpat 27_297
DSP_R.DSP48.DSP_1.MASK[42] origin:100-dsp-mskpat 27_304
@ -188,13 +194,16 @@ DSP_R.DSP48.DSP_1.MASK[44] origin:100-dsp-mskpat 26_309
DSP_R.DSP48.DSP_1.MASK[45] origin:100-dsp-mskpat 27_310
DSP_R.DSP48.DSP_1.MASK[46] origin:100-dsp-mskpat 26_313
DSP_R.DSP48.DSP_1.MASK[47] origin:100-dsp-mskpat 26_314
DSP_R.DSP48.DSP_1.MASK[4] origin:100-dsp-mskpat 26_170
DSP_R.DSP48.DSP_1.MASK[5] origin:100-dsp-mskpat 27_171
DSP_R.DSP48.DSP_1.MASK[6] origin:100-dsp-mskpat 26_178
DSP_R.DSP48.DSP_1.MASK[7] origin:100-dsp-mskpat 27_179
DSP_R.DSP48.DSP_1.MASK[8] origin:100-dsp-mskpat 26_182
DSP_R.DSP48.DSP_1.MASK[9] origin:100-dsp-mskpat 27_183
DSP_R.DSP48.DSP_1.PATTERN[0] origin:100-dsp-mskpat 26_161
DSP_R.DSP48.DSP_1.PATTERN[1] origin:100-dsp-mskpat 26_164
DSP_R.DSP48.DSP_1.PATTERN[2] origin:100-dsp-mskpat 26_165
DSP_R.DSP48.DSP_1.PATTERN[3] origin:100-dsp-mskpat 27_168
DSP_R.DSP48.DSP_1.PATTERN[4] origin:100-dsp-mskpat 26_169
DSP_R.DSP48.DSP_1.PATTERN[5] origin:100-dsp-mskpat 26_172
DSP_R.DSP48.DSP_1.PATTERN[6] origin:100-dsp-mskpat 27_177
DSP_R.DSP48.DSP_1.PATTERN[7] origin:100-dsp-mskpat 26_180
DSP_R.DSP48.DSP_1.PATTERN[8] origin:100-dsp-mskpat 27_181
DSP_R.DSP48.DSP_1.PATTERN[9] origin:100-dsp-mskpat 27_184
DSP_R.DSP48.DSP_1.PATTERN[10] origin:100-dsp-mskpat 26_186
DSP_R.DSP48.DSP_1.PATTERN[11] origin:100-dsp-mskpat 26_189
DSP_R.DSP48.DSP_1.PATTERN[12] origin:100-dsp-mskpat 27_200
@ -205,7 +214,6 @@ DSP_R.DSP48.DSP_1.PATTERN[16] origin:100-dsp-mskpat 27_208
DSP_R.DSP48.DSP_1.PATTERN[17] origin:100-dsp-mskpat 26_211
DSP_R.DSP48.DSP_1.PATTERN[18] origin:100-dsp-mskpat 26_217
DSP_R.DSP48.DSP_1.PATTERN[19] origin:100-dsp-mskpat 26_220
DSP_R.DSP48.DSP_1.PATTERN[1] origin:100-dsp-mskpat 26_164
DSP_R.DSP48.DSP_1.PATTERN[20] origin:100-dsp-mskpat 27_221
DSP_R.DSP48.DSP_1.PATTERN[21] origin:100-dsp-mskpat 26_224
DSP_R.DSP48.DSP_1.PATTERN[22] origin:100-dsp-mskpat 27_225
@ -216,7 +224,6 @@ DSP_R.DSP48.DSP_1.PATTERN[26] origin:100-dsp-mskpat 26_250
DSP_R.DSP48.DSP_1.PATTERN[27] origin:100-dsp-mskpat 27_252
DSP_R.DSP48.DSP_1.PATTERN[28] origin:100-dsp-mskpat 26_254
DSP_R.DSP48.DSP_1.PATTERN[29] origin:100-dsp-mskpat 26_257
DSP_R.DSP48.DSP_1.PATTERN[2] origin:100-dsp-mskpat 26_165
DSP_R.DSP48.DSP_1.PATTERN[30] origin:100-dsp-mskpat 27_261
DSP_R.DSP48.DSP_1.PATTERN[31] origin:100-dsp-mskpat 27_264
DSP_R.DSP48.DSP_1.PATTERN[32] origin:100-dsp-mskpat 26_266
@ -227,7 +234,6 @@ DSP_R.DSP48.DSP_1.PATTERN[36] origin:100-dsp-mskpat 26_287
DSP_R.DSP48.DSP_1.PATTERN[37] origin:100-dsp-mskpat 26_290
DSP_R.DSP48.DSP_1.PATTERN[38] origin:100-dsp-mskpat 27_291
DSP_R.DSP48.DSP_1.PATTERN[39] origin:100-dsp-mskpat 26_294
DSP_R.DSP48.DSP_1.PATTERN[3] origin:100-dsp-mskpat 27_168
DSP_R.DSP48.DSP_1.PATTERN[40] origin:100-dsp-mskpat 27_295
DSP_R.DSP48.DSP_1.PATTERN[41] origin:100-dsp-mskpat 26_298
DSP_R.DSP48.DSP_1.PATTERN[42] origin:100-dsp-mskpat 26_304
@ -236,12 +242,6 @@ DSP_R.DSP48.DSP_1.PATTERN[44] origin:100-dsp-mskpat 26_308
DSP_R.DSP48.DSP_1.PATTERN[45] origin:100-dsp-mskpat 26_311
DSP_R.DSP48.DSP_1.PATTERN[46] origin:100-dsp-mskpat 27_312
DSP_R.DSP48.DSP_1.PATTERN[47] origin:100-dsp-mskpat 26_315
DSP_R.DSP48.DSP_1.PATTERN[4] origin:100-dsp-mskpat 26_169
DSP_R.DSP48.DSP_1.PATTERN[5] origin:100-dsp-mskpat 26_172
DSP_R.DSP48.DSP_1.PATTERN[6] origin:100-dsp-mskpat 27_177
DSP_R.DSP48.DSP_1.PATTERN[7] origin:100-dsp-mskpat 26_180
DSP_R.DSP48.DSP_1.PATTERN[8] origin:100-dsp-mskpat 27_181
DSP_R.DSP48.DSP_1.PATTERN[9] origin:100-dsp-mskpat 27_184
DSP_R.DSP48.DSP_1.SEL_MASK_C origin:100-dsp-mskpat 26_243
DSP_R.DSP48.DSP_1.SEL_MASK_ROUNDING_MODE1 origin:100-dsp-mskpat 27_242
DSP_R.DSP48.DSP_1.SEL_MASK_ROUNDING_MODE2 origin:100-dsp-mskpat 27_241 27_242

560
artix7/segbits_hclk_cmt.origin_info.db
View File

@ -1,14 +1,4 @@
HCLK_CMT.HCLK_CMT_CCIO0_ACTIVE origin:045-hclk-cmt-pips 27_159
HCLK_CMT.HCLK_CMT_CCIO0_USED origin:045-hclk-cmt-pips 27_157
HCLK_CMT.HCLK_CMT_CCIO1_ACTIVE origin:045-hclk-cmt-pips 26_159
HCLK_CMT.HCLK_CMT_CCIO1_USED origin:045-hclk-cmt-pips 26_156
HCLK_CMT.HCLK_CMT_CCIO2_ACTIVE origin:045-hclk-cmt-pips 27_158
HCLK_CMT.HCLK_CMT_CCIO2_USED origin:045-hclk-cmt-pips 28_217
HCLK_CMT.HCLK_CMT_CCIO3_ACTIVE origin:045-hclk-cmt-pips 26_158
HCLK_CMT.HCLK_CMT_CCIO3_USED origin:045-hclk-cmt-pips 29_218
HCLK_CMT.HCLK_CMT_CK_BUFHCLK0_USED origin:045-hclk-cmt-pips 27_185
HCLK_CMT.HCLK_CMT_CK_BUFHCLK10_USED origin:045-hclk-cmt-pips 28_186
HCLK_CMT.HCLK_CMT_CK_BUFHCLK11_USED origin:045-hclk-cmt-pips 29_186
HCLK_CMT.HCLK_CMT_CK_BUFHCLK1_USED origin:045-hclk-cmt-pips 26_185
HCLK_CMT.HCLK_CMT_CK_BUFHCLK2_USED origin:045-hclk-cmt-pips 27_184
HCLK_CMT.HCLK_CMT_CK_BUFHCLK3_USED origin:045-hclk-cmt-pips 26_184
@ -18,18 +8,14 @@ HCLK_CMT.HCLK_CMT_CK_BUFHCLK6_USED origin:045-hclk-cmt-pips 27_182
HCLK_CMT.HCLK_CMT_CK_BUFHCLK7_USED origin:045-hclk-cmt-pips 26_182
HCLK_CMT.HCLK_CMT_CK_BUFHCLK8_USED origin:045-hclk-cmt-pips 27_181
HCLK_CMT.HCLK_CMT_CK_BUFHCLK9_USED origin:045-hclk-cmt-pips 26_181
HCLK_CMT.HCLK_CMT_CK_BUFHCLK10_USED origin:045-hclk-cmt-pips 28_186
HCLK_CMT.HCLK_CMT_CK_BUFHCLK11_USED origin:045-hclk-cmt-pips 29_186
HCLK_CMT.HCLK_CMT_CK_BUFRCLK0_USED origin:045-hclk-cmt-pips 28_174
HCLK_CMT.HCLK_CMT_CK_BUFRCLK1_USED origin:045-hclk-cmt-pips 29_174
HCLK_CMT.HCLK_CMT_CK_BUFRCLK2_USED origin:045-hclk-cmt-pips 28_175
HCLK_CMT.HCLK_CMT_CK_BUFRCLK3_USED origin:045-hclk-cmt-pips 29_175
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 27_151 27_153
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_153 27_151
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_152 27_153
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 26_152 26_153
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 27_150 27_155
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_155 27_150
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_151 27_153
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 26_151 26_153
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 27_150 27_154
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 26_154 27_150
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 27_150 27_153
@ -38,11 +24,10 @@ HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 26_151
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 26_151 26_155
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 26_151 27_154
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 26_151 26_154
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_151 27_153
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 26_151 26_153
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 27_149 27_154
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 26_154 27_149
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 27_151 27_155
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 26_155 27_151
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 27_151 27_154
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 27_149 27_153
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 26_153 27_149
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 26_150 27_155
@ -51,6 +36,9 @@ HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 26_1
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 26_150 26_154
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 26_150 27_153
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 26_150 26_153
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 27_151 27_155
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 26_155 27_151
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 27_151 27_154
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 26_149 27_155
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 26_149 26_155
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 26_149 27_154
@ -58,14 +46,12 @@ HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 26_14
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 26_149 27_153
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 26_149 26_153
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 27_149 27_155
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 29_151 29_153
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_153 29_151
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_152 29_153
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 28_152 28_153
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 27_151 27_153
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_153 27_151
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_152 27_153
HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 26_152 26_153
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 29_150 29_155
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 28_155 29_150
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 28_151 29_153
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 28_151 28_153
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 29_150 29_154
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 28_154 29_150
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 29_150 29_153
@ -74,11 +60,10 @@ HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 28_151
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 28_151 28_155
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 28_151 29_154
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 28_151 28_154
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 28_151 29_153
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 28_151 28_153
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 29_149 29_154
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 28_154 29_149
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 29_151 29_155
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 28_155 29_151
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 29_151 29_154
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 29_149 29_153
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 28_153 29_149
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 28_150 29_155
@ -87,6 +72,9 @@ HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 28_1
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 28_150 28_154
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 28_150 29_153
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 28_150 28_153
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 29_151 29_155
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 28_155 29_151
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 29_151 29_154
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 28_149 29_155
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 28_149 28_155
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 28_149 29_154
@ -94,158 +82,12 @@ HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 28_14
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 28_149 29_153
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 28_149 28_153
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 29_149 29_155
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 28_205 28_207
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_207 29_205
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_205 29_206
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 29_205 29_206
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 28_203 28_208
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 28_208 29_203
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 28_205 29_207
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 29_205 29_207
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 28_204 28_208
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 28_208 29_204
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 28_205 28_208
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_CK_BUFHCLK5 origin:045-hclk-cmt-pips 28_208 29_205
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 28_203 29_207
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 29_203 29_207
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 28_204 29_207
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 29_204 29_207
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 28_204 28_209
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 28_209 29_204
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 28_203 28_207
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 28_207 29_203
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 28_204 28_207
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 28_205 28_209
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 28_209 29_205
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 28_203 29_208
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_MMCM5 origin:045-hclk-cmt-pips 29_203 29_208
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 28_204 29_208
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 29_204 29_208
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 28_205 29_208
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 29_205 29_208
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 28_203 29_209
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 29_203 29_209
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 28_204 29_209
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 29_204 29_209
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 28_205 29_209
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 29_205 29_209
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 28_203 28_209
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 26_212 26_214
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_214 27_212
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_212 27_213
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 27_212 27_213
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 26_210 26_215
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_215 27_210
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_212 27_214
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 27_212 27_214
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 26_211 26_215
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 26_215 27_211
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 26_212 26_215
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_CK_BUFHCLK5 origin:045-hclk-cmt-pips 26_215 27_212
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 26_210 27_214
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 27_210 27_214
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 26_211 27_214
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 27_211 27_214
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 26_211 26_216
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 26_216 27_211
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 26_210 26_214
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 26_214 27_210
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 26_211 26_214
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 26_212 26_216
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 26_216 27_212
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 26_210 27_215
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_MMCM5 origin:045-hclk-cmt-pips 27_210 27_215
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 26_211 27_215
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 27_211 27_215
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 26_212 27_215
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 27_212 27_215
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 26_210 27_216
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 27_210 27_216
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 26_211 27_216
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 27_211 27_216
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 26_212 27_216
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 27_212 27_216
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 26_210 26_216
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 28_212 28_214
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_214 29_212
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_212 29_213
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 29_212 29_213
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 28_210 28_215
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 28_215 29_210
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 28_212 29_214
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 29_212 29_214
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 28_211 28_215
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 28_215 29_211
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 28_212 28_215
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_CK_BUFHCLK5 origin:045-hclk-cmt-pips 28_215 29_212
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 28_210 29_214
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 29_210 29_214
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 28_211 29_214
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 29_211 29_214
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 28_211 28_216
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 28_216 29_211
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 28_210 28_214
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 28_214 29_210
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 28_211 28_214
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 28_212 28_216
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 28_216 29_212
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 28_210 29_215
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_MMCM5 origin:045-hclk-cmt-pips 29_210 29_215
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 28_211 29_215
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 29_211 29_215
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 28_212 29_215
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 29_212 29_215
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 28_210 29_216
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 29_210 29_216
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 28_211 29_216
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 29_211 29_216
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 28_212 29_216
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 29_212 29_216
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 28_210 28_216
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 26_219 26_221
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_221 27_219
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_219 27_220
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 27_219 27_220
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 26_217 26_222
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_222 27_217
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_219 27_221
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 27_219 27_221
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 26_218 26_222
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 26_222 27_218
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 26_219 26_222
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_CK_BUFHCLK5 origin:045-hclk-cmt-pips 26_222 27_219
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 26_217 27_221
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 27_217 27_221
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 26_218 27_221
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 27_218 27_221
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 26_218 26_223
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 26_223 27_218
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 26_217 26_221
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 26_221 27_217
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 26_218 26_221
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 26_219 26_223
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 26_223 27_219
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 26_217 27_222
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_MMCM5 origin:045-hclk-cmt-pips 27_217 27_222
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 26_218 27_222
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 27_218 27_222
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 26_219 27_222
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 27_219 27_222
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 26_217 27_223
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 27_217 27_223
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 26_218 27_223
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 27_218 27_223
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 26_219 27_223
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 27_219 27_223
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 26_217 26_223
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 27_144 27_146
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_146 27_144
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_145 27_146
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 26_145 26_146
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 29_151 29_153
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_153 29_151
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_152 29_153
HCLK_CMT.HCLK_CMT_MUX_CLK_1.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 28_152 28_153
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 27_143 27_148
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_148 27_143
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_144 27_146
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 26_144 26_146
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 27_143 27_147
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 26_147 27_143
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 27_143 27_146
@ -254,11 +96,10 @@ HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 26_144
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 26_144 26_148
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 26_144 27_147
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 26_144 26_147
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_144 27_146
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 26_144 26_146
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 27_142 27_147
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 26_147 27_142
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 27_144 27_148
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 26_148 27_144
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 27_144 27_147
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 27_142 27_146
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 26_146 27_142
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 26_143 27_148
@ -267,6 +108,9 @@ HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 26_1
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 26_143 26_147
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 26_143 27_146
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 26_143 26_146
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 27_144 27_148
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 26_148 27_144
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 27_144 27_147
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 26_142 27_148
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 26_142 26_148
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 26_142 27_147
@ -274,14 +118,12 @@ HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 26_14
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 26_142 27_146
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 26_142 26_146
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 27_142 27_148
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 29_144 29_146
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_146 29_144
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_145 29_146
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 28_145 28_146
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 27_144 27_146
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_146 27_144
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_145 27_146
HCLK_CMT.HCLK_CMT_MUX_CLK_2.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 26_145 26_146
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 29_143 29_148
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 28_148 29_143
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 28_144 29_146
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 28_144 28_146
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 29_143 29_147
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 28_147 29_143
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 29_143 29_146
@ -290,11 +132,10 @@ HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 28_144
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 28_144 28_148
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 28_144 29_147
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 28_144 28_147
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 28_144 29_146
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 28_144 28_146
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 29_142 29_147
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 28_147 29_142
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 29_144 29_148
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 28_148 29_144
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 29_144 29_147
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 29_142 29_146
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 28_146 29_142
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 28_143 29_148
@ -303,6 +144,9 @@ HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 28_1
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 28_143 28_147
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 28_143 29_146
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 28_143 28_146
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 29_144 29_148
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 28_148 29_144
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 29_144 29_147
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 28_142 29_148
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 28_142 28_148
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 28_142 29_147
@ -310,14 +154,12 @@ HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 28_14
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 28_142 29_146
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 28_142 28_146
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 29_142 29_148
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 27_137 27_139
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_139 27_137
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_138 27_139
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 26_138 26_139
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 29_144 29_146
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_146 29_144
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_145 29_146
HCLK_CMT.HCLK_CMT_MUX_CLK_3.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 28_145 28_146
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 27_136 27_141
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_141 27_136
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_137 27_139
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 26_137 26_139
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 27_136 27_140
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 26_140 27_136
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 27_136 27_139
@ -326,11 +168,10 @@ HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 26_137
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 26_137 26_141
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 26_137 27_140
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 26_137 26_140
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_137 27_139
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 26_137 26_139
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 27_135 27_140
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 26_140 27_135
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 27_137 27_141
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 26_141 27_137
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 27_137 27_140
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 27_135 27_139
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 26_139 27_135
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 26_136 27_141
@ -339,6 +180,9 @@ HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 26_1
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 26_136 26_140
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 26_136 27_139
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 26_136 26_139
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 27_137 27_141
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 26_141 27_137
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 27_137 27_140
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 26_135 27_141
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 26_135 26_141
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 26_135 27_140
@ -346,14 +190,12 @@ HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 26_13
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 26_135 27_139
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 26_135 26_139
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 27_135 27_141
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 29_137 29_139
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_139 29_137
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_138 29_139
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 28_138 28_139
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 27_137 27_139
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_139 27_137
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_138 27_139
HCLK_CMT.HCLK_CMT_MUX_CLK_4.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 26_138 26_139
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 29_136 29_141
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 28_141 29_136
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 28_137 29_139
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 28_137 28_139
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 29_136 29_140
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 28_140 29_136
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 29_136 29_139
@ -362,11 +204,10 @@ HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 28_137
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 28_137 28_141
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 28_137 29_140
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 28_137 28_140
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 28_137 29_139
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 28_137 28_139
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 29_135 29_140
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 28_140 29_135
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 29_137 29_141
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 28_141 29_137
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 29_137 29_140
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 29_135 29_139
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 28_139 29_135
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 28_136 29_141
@ -375,6 +216,9 @@ HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 28_1
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 28_136 28_140
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 28_136 29_139
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 28_136 28_139
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 29_137 29_141
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 28_141 29_137
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 29_137 29_140
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 28_135 29_141
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 28_135 28_141
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 28_135 29_140
@ -382,14 +226,12 @@ HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 28_13
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 28_135 29_139
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 28_135 28_139
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 29_135 29_141
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 27_130 27_132
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_132 27_130
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_131 27_132
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 26_131 26_132
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 29_137 29_139
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_139 29_137
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_138 29_139
HCLK_CMT.HCLK_CMT_MUX_CLK_5.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 28_138 28_139
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 27_129 27_134
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_134 27_129
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_130 27_132
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 26_130 26_132
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 27_129 27_133
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 26_133 27_129
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 27_129 27_132
@ -398,11 +240,10 @@ HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 26_130
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 26_130 26_134
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 26_130 27_133
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 26_130 26_133
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_130 27_132
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 26_130 26_132
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 27_128 27_133
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 26_133 27_128
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 27_130 27_134
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 26_134 27_130
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 27_130 27_133
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 27_128 27_132
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 26_132 27_128
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 26_129 27_134
@ -411,6 +252,9 @@ HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 26_1
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 26_129 26_133
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 26_129 27_132
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 26_129 26_132
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 27_130 27_134
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 26_134 27_130
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 27_130 27_133
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 26_128 27_134
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 26_128 26_134
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 26_128 27_133
@ -418,14 +262,12 @@ HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 26_12
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 26_128 27_132
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 26_128 26_132
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 27_128 27_134
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 26_198 26_200
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_200 27_198
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_198 27_199
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 27_198 27_199
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 27_130 27_132
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_132 27_130
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_131 27_132
HCLK_CMT.HCLK_CMT_MUX_CLK_6.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 26_131 26_132
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 26_196 26_201
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_201 27_196
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_198 27_200
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 27_198 27_200
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 26_197 26_201
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 26_201 27_197
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 26_198 26_201
@ -434,11 +276,10 @@ HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 26_196
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 27_196 27_200
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 26_197 27_200
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 27_197 27_200
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_198 27_200
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 27_198 27_200
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 26_197 26_202
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 26_202 27_197
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 26_196 26_200
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 26_200 27_196
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 26_197 26_200
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 26_198 26_202
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 26_202 27_198
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 26_196 27_201
@ -447,6 +288,9 @@ HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 26_1
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 27_197 27_201
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 26_198 27_201
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 27_198 27_201
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 26_196 26_200
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 26_200 27_196
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 26_197 26_200
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 26_196 27_202
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 27_196 27_202
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 26_197 27_202
@ -454,14 +298,12 @@ HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 27_19
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 26_198 27_202
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 27_198 27_202
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 26_196 26_202
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 28_198 28_200
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_200 29_198
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_198 29_199
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 29_198 29_199
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 26_198 26_200
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_200 27_198
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_198 27_199
HCLK_CMT.HCLK_CMT_MUX_CLK_7.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 27_198 27_199
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 28_196 28_201
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 28_201 29_196
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 28_198 29_200
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 29_198 29_200
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 28_197 28_201
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 28_201 29_197
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 28_198 28_201
@ -470,11 +312,10 @@ HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 28_196
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 29_196 29_200
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 28_197 29_200
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 29_197 29_200
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 28_198 29_200
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 29_198 29_200
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 28_197 28_202
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 28_202 29_197
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 28_196 28_200
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 28_200 29_196
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 28_197 28_200
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 28_198 28_202
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 28_202 29_198
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 28_196 29_201
@ -483,6 +324,9 @@ HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 28_1
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 29_197 29_201
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 28_198 29_201
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 29_198 29_201
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 28_196 28_200
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 28_200 29_196
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 28_197 28_200
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 28_196 29_202
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 29_196 29_202
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 28_197 29_202
@ -490,14 +334,12 @@ HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 29_19
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 28_198 29_202
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 29_198 29_202
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 28_196 28_202
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 26_205 26_207
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_207 27_205
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_205 27_206
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 27_205 27_206
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 28_198 28_200
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_200 29_198
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_198 29_199
HCLK_CMT.HCLK_CMT_MUX_CLK_8.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 29_198 29_199
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 26_203 26_208
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_208 27_203
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_205 27_207
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 27_205 27_207
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 26_204 26_208
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 26_208 27_204
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 26_205 26_208
@ -506,11 +348,10 @@ HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 26_203
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 27_203 27_207
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 26_204 27_207
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 27_204 27_207
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_205 27_207
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 27_205 27_207
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 26_204 26_209
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 26_209 27_204
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 26_203 26_207
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 26_207 27_203
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 26_204 26_207
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 26_205 26_209
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 26_209 27_205
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 26_203 27_208
@ -519,6 +360,9 @@ HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 26_2
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 27_204 27_208
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 26_205 27_208
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 27_205 27_208
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 26_203 26_207
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 26_207 27_203
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 26_204 26_207
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 26_203 27_209
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 27_203 27_209
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 26_204 27_209
@ -526,14 +370,156 @@ HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 27_20
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 26_205 27_209
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 27_205 27_209
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 26_203 26_209
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 27_123 27_125
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_125 27_123
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_124 27_125
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 26_124 26_125
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 26_205 26_207
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_207 27_205
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_205 27_206
HCLK_CMT.HCLK_CMT_MUX_CLK_9.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 27_205 27_206
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 28_203 28_208
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 28_208 29_203
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 28_204 28_208
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 28_208 29_204
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 28_205 28_208
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_CK_BUFHCLK5 origin:045-hclk-cmt-pips 28_208 29_205
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 28_203 29_207
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 29_203 29_207
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 28_204 29_207
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 29_204 29_207
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 28_205 29_207
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 29_205 29_207
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 28_204 28_209
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 28_209 29_204
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 28_205 28_209
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 28_209 29_205
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 28_203 29_208
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_MMCM5 origin:045-hclk-cmt-pips 29_203 29_208
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 28_204 29_208
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 29_204 29_208
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 28_205 29_208
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 29_205 29_208
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 28_203 28_207
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 28_207 29_203
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 28_204 28_207
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 28_203 29_209
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 29_203 29_209
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 28_204 29_209
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 29_204 29_209
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 28_205 29_209
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 29_205 29_209
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 28_203 28_209
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 28_205 28_207
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_207 29_205
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_205 29_206
HCLK_CMT.HCLK_CMT_MUX_CLK_10.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 29_205 29_206
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 26_210 26_215
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_215 27_210
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 26_211 26_215
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 26_215 27_211
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 26_212 26_215
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_CK_BUFHCLK5 origin:045-hclk-cmt-pips 26_215 27_212
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 26_210 27_214
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 27_210 27_214
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 26_211 27_214
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 27_211 27_214
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_212 27_214
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 27_212 27_214
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 26_211 26_216
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 26_216 27_211
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 26_212 26_216
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 26_216 27_212
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 26_210 27_215
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_MMCM5 origin:045-hclk-cmt-pips 27_210 27_215
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 26_211 27_215
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 27_211 27_215
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 26_212 27_215
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 27_212 27_215
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 26_210 26_214
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 26_214 27_210
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 26_211 26_214
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 26_210 27_216
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 27_210 27_216
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 26_211 27_216
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 27_211 27_216
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 26_212 27_216
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 27_212 27_216
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 26_210 26_216
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 26_212 26_214
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_214 27_212
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_212 27_213
HCLK_CMT.HCLK_CMT_MUX_CLK_11.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 27_212 27_213
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 28_210 28_215
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 28_215 29_210
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 28_211 28_215
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 28_215 29_211
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 28_212 28_215
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_CK_BUFHCLK5 origin:045-hclk-cmt-pips 28_215 29_212
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 28_210 29_214
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 29_210 29_214
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 28_211 29_214
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 29_211 29_214
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 28_212 29_214
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 29_212 29_214
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 28_211 28_216
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 28_216 29_211
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 28_212 28_216
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 28_216 29_212
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 28_210 29_215
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_MMCM5 origin:045-hclk-cmt-pips 29_210 29_215
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 28_211 29_215
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 29_211 29_215
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 28_212 29_215
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 29_212 29_215
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 28_210 28_214
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 28_214 29_210
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 28_211 28_214
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 28_210 29_216
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 29_210 29_216
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 28_211 29_216
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 29_211 29_216
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 28_212 29_216
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 29_212 29_216
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 28_210 28_216
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 28_212 28_214
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_214 29_212
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_212 29_213
HCLK_CMT.HCLK_CMT_MUX_CLK_12.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 29_212 29_213
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 26_217 26_222
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_222 27_217
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 26_218 26_222
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 26_222 27_218
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 26_219 26_222
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_CK_BUFHCLK5 origin:045-hclk-cmt-pips 26_222 27_219
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 26_217 27_221
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 27_217 27_221
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 26_218 27_221
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 27_218 27_221
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_219 27_221
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 27_219 27_221
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 26_218 26_223
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 26_223 27_218
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 26_219 26_223
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 26_223 27_219
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 26_217 27_222
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_MMCM5 origin:045-hclk-cmt-pips 27_217 27_222
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 26_218 27_222
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 27_218 27_222
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 26_219 27_222
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 27_219 27_222
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 26_217 26_221
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 26_221 27_217
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 26_218 26_221
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 26_217 27_223
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 27_217 27_223
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 26_218 27_223
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 27_218 27_223
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 26_219 27_223
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 27_219 27_223
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 26_217 26_223
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 26_219 26_221
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_221 27_219
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_219 27_220
HCLK_CMT.HCLK_CMT_MUX_CLK_13.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 27_219 27_220
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 27_122 27_127
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_127 27_122
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_123 27_125
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 26_123 26_125
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 27_122 27_126
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 26_126 27_122
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 27_122 27_125
@ -542,18 +528,18 @@ HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 26_123 26_127
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 26_123 27_126
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 26_123 26_126
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_123 27_125
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 26_123 26_125
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFRCLK0 origin:045-hclk-cmt-pips 27_123 27_127
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFRCLK1 origin:045-hclk-cmt-pips 26_127 27_123
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFRCLK2 origin:045-hclk-cmt-pips 27_123 27_126
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFRCLK3 origin:045-hclk-cmt-pips 26_126 27_123
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 28_118 28_120
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_118 29_119
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_120 29_118
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 29_118 29_119
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 27_123 27_125
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_125 27_123
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_124 27_125
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 26_124 26_125
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 28_117 28_122
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 28_117 29_121
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 28_120 29_117
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 29_117 29_119
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 28_117 28_121
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 28_117 29_120
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 28_117 28_120
@ -562,18 +548,18 @@ HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 29_117 29_121
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 28_121 29_117
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 29_117 29_120
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 28_120 29_117
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 29_117 29_119
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFRCLK0 origin:045-hclk-cmt-pips 28_118 28_122
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFRCLK1 origin:045-hclk-cmt-pips 28_118 29_121
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFRCLK2 origin:045-hclk-cmt-pips 28_118 28_121
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFRCLK3 origin:045-hclk-cmt-pips 28_118 29_120
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 26_118 26_120
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_118 27_119
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_120 27_118
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 27_118 27_119
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 28_118 28_120
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_118 29_119
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_120 29_118
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 29_118 29_119
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 26_117 26_122
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_117 27_121
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_120 27_117
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 27_117 27_119
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 26_117 26_121
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 26_117 27_120
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 26_117 26_120
@ -582,18 +568,18 @@ HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 27_117 27_121
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 26_121 27_117
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 27_117 27_120
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_120 27_117
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 27_117 27_119
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFRCLK0 origin:045-hclk-cmt-pips 26_118 26_122
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFRCLK1 origin:045-hclk-cmt-pips 26_118 27_121
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFRCLK2 origin:045-hclk-cmt-pips 26_118 26_121
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFRCLK3 origin:045-hclk-cmt-pips 26_118 27_120
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 26_226 26_228
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_228 27_226
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_226 27_227
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 27_226 27_227
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 26_118 26_120
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_118 27_119
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_120 27_118
HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 27_118 27_119
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 26_224 26_229
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_229 27_224
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_226 27_228
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 27_226 27_228
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 26_225 26_229
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 26_229 27_225
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 26_226 26_229
@ -602,18 +588,18 @@ HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pip
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 27_224 27_228
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 26_225 27_228
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 27_225 27_228
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_226 27_228
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 27_226 27_228
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFRCLK0 origin:045-hclk-cmt-pips 26_224 26_228
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFRCLK1 origin:045-hclk-cmt-pips 26_228 27_224
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFRCLK2 origin:045-hclk-cmt-pips 26_225 26_228
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFRCLK3 origin:045-hclk-cmt-pips 26_228 27_225
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 29_231 29_233
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_232 29_233
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_233 29_231
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 28_232 28_233
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 26_226 26_228
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_228 27_226
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_226 27_227
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 27_226 27_227
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 29_229 29_234
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 28_230 29_234
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 28_234 29_231
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 28_232 28_234
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 29_230 29_234
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 28_231 29_234
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 29_231 29_234
@ -622,18 +608,18 @@ HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 28_230 28_234
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 28_234 29_230
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 28_231 28_234
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 28_234 29_231
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 28_232 28_234
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFRCLK0 origin:045-hclk-cmt-pips 29_229 29_233
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFRCLK1 origin:045-hclk-cmt-pips 28_230 29_233
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFRCLK2 origin:045-hclk-cmt-pips 29_230 29_233
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFRCLK3 origin:045-hclk-cmt-pips 28_231 29_233
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 27_231 27_233
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_232 27_233
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_233 27_231
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 26_232 26_233
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 29_231 29_233
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_232 29_233
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_233 29_231
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 28_232 28_233
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 27_229 27_234
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_230 27_234
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_234 27_231
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 26_232 26_234
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 27_230 27_234
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 26_231 27_234
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 27_231 27_234
@ -642,7 +628,21 @@ HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 26_230 26_234
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 26_234 27_230
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 26_231 26_234
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_234 27_231
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 26_232 26_234
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFRCLK0 origin:045-hclk-cmt-pips 27_229 27_233
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFRCLK1 origin:045-hclk-cmt-pips 26_230 27_233
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFRCLK2 origin:045-hclk-cmt-pips 27_230 27_233
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFRCLK3 origin:045-hclk-cmt-pips 26_231 27_233
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 27_231 27_233
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_232 27_233
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_233 27_231
HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 26_232 26_233
HCLK_CMT.HCLK_CMT_CCIO0_ACTIVE origin:045-hclk-cmt-pips 27_159
HCLK_CMT.HCLK_CMT_CCIO0_USED origin:045-hclk-cmt-pips 27_157
HCLK_CMT.HCLK_CMT_CCIO1_ACTIVE origin:045-hclk-cmt-pips 26_159
HCLK_CMT.HCLK_CMT_CCIO1_USED origin:045-hclk-cmt-pips 26_156
HCLK_CMT.HCLK_CMT_CCIO2_ACTIVE origin:045-hclk-cmt-pips 27_158
HCLK_CMT.HCLK_CMT_CCIO2_USED origin:045-hclk-cmt-pips 28_217
HCLK_CMT.HCLK_CMT_CCIO3_ACTIVE origin:045-hclk-cmt-pips 26_158
HCLK_CMT.HCLK_CMT_CCIO3_USED origin:045-hclk-cmt-pips 29_218

560
artix7/segbits_hclk_cmt_l.origin_info.db
View File

@ -1,14 +1,4 @@
HCLK_CMT_L.HCLK_CMT_CCIO0_ACTIVE origin:045-hclk-cmt-pips 27_159
HCLK_CMT_L.HCLK_CMT_CCIO0_USED origin:045-hclk-cmt-pips 27_157
HCLK_CMT_L.HCLK_CMT_CCIO1_ACTIVE origin:045-hclk-cmt-pips 26_159
HCLK_CMT_L.HCLK_CMT_CCIO1_USED origin:045-hclk-cmt-pips 26_156
HCLK_CMT_L.HCLK_CMT_CCIO2_ACTIVE origin:045-hclk-cmt-pips 27_158
HCLK_CMT_L.HCLK_CMT_CCIO2_USED origin:045-hclk-cmt-pips 28_217
HCLK_CMT_L.HCLK_CMT_CCIO3_ACTIVE origin:045-hclk-cmt-pips 26_158
HCLK_CMT_L.HCLK_CMT_CCIO3_USED origin:045-hclk-cmt-pips 29_218
HCLK_CMT_L.HCLK_CMT_CK_BUFHCLK0_USED origin:045-hclk-cmt-pips 27_185
HCLK_CMT_L.HCLK_CMT_CK_BUFHCLK10_USED origin:045-hclk-cmt-pips 28_186
HCLK_CMT_L.HCLK_CMT_CK_BUFHCLK11_USED origin:045-hclk-cmt-pips 29_186
HCLK_CMT_L.HCLK_CMT_CK_BUFHCLK1_USED origin:045-hclk-cmt-pips 26_185
HCLK_CMT_L.HCLK_CMT_CK_BUFHCLK2_USED origin:045-hclk-cmt-pips 27_184
HCLK_CMT_L.HCLK_CMT_CK_BUFHCLK3_USED origin:045-hclk-cmt-pips 26_184
@ -18,18 +8,14 @@ HCLK_CMT_L.HCLK_CMT_CK_BUFHCLK6_USED origin:045-hclk-cmt-pips 27_182
HCLK_CMT_L.HCLK_CMT_CK_BUFHCLK7_USED origin:045-hclk-cmt-pips 26_182
HCLK_CMT_L.HCLK_CMT_CK_BUFHCLK8_USED origin:045-hclk-cmt-pips 27_181
HCLK_CMT_L.HCLK_CMT_CK_BUFHCLK9_USED origin:045-hclk-cmt-pips 26_181
HCLK_CMT_L.HCLK_CMT_CK_BUFHCLK10_USED origin:045-hclk-cmt-pips 28_186
HCLK_CMT_L.HCLK_CMT_CK_BUFHCLK11_USED origin:045-hclk-cmt-pips 29_186
HCLK_CMT_L.HCLK_CMT_CK_BUFRCLK0_USED origin:045-hclk-cmt-pips 28_174
HCLK_CMT_L.HCLK_CMT_CK_BUFRCLK1_USED origin:045-hclk-cmt-pips 29_174
HCLK_CMT_L.HCLK_CMT_CK_BUFRCLK2_USED origin:045-hclk-cmt-pips 28_175
HCLK_CMT_L.HCLK_CMT_CK_BUFRCLK3_USED origin:045-hclk-cmt-pips 29_175
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 27_151 27_153
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_153 27_151
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_152 27_153
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 26_152 26_153
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 27_150 27_155
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_155 27_150
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_151 27_153
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 26_151 26_153
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 27_150 27_154
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 26_154 27_150
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 27_150 27_153
@ -38,11 +24,10 @@ HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 26_151
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 26_151 26_155
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 26_151 27_154
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 26_151 26_154
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_151 27_153
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 26_151 26_153
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 27_149 27_154
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 26_154 27_149
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 27_151 27_155
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 26_155 27_151
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 27_151 27_154
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 27_149 27_153
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 26_153 27_149
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 26_150 27_155
@ -51,6 +36,9 @@ HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 26_15
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 26_150 26_154
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 26_150 27_153
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 26_150 26_153
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 27_151 27_155
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 26_155 27_151
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 27_151 27_154
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 26_149 27_155
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 26_149 26_155
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 26_149 27_154
@ -58,14 +46,12 @@ HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 26_149
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 26_149 27_153
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 26_149 26_153
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 27_149 27_155
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 29_151 29_153
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_153 29_151
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_152 29_153
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 28_152 28_153
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 27_151 27_153
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_153 27_151
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_152 27_153
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 26_152 26_153
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 29_150 29_155
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 28_155 29_150
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 28_151 29_153
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 28_151 28_153
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 29_150 29_154
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 28_154 29_150
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 29_150 29_153
@ -74,11 +60,10 @@ HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 28_151
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 28_151 28_155
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 28_151 29_154
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 28_151 28_154
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 28_151 29_153
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 28_151 28_153
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 29_149 29_154
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 28_154 29_149
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 29_151 29_155
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 28_155 29_151
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 29_151 29_154
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 29_149 29_153
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 28_153 29_149
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 28_150 29_155
@ -87,6 +72,9 @@ HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 28_15
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 28_150 28_154
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 28_150 29_153
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 28_150 28_153
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 29_151 29_155
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 28_155 29_151
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 29_151 29_154
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 28_149 29_155
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 28_149 28_155
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 28_149 29_154
@ -94,158 +82,12 @@ HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 28_149
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 28_149 29_153
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 28_149 28_153
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 29_149 29_155
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 28_205 28_207
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_207 29_205
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_205 29_206
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 29_205 29_206
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 28_203 28_208
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 28_208 29_203
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 28_205 29_207
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 29_205 29_207
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 28_204 28_208
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 28_208 29_204
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 28_205 28_208
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK5 origin:045-hclk-cmt-pips 28_208 29_205
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 28_203 29_207
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 29_203 29_207
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 28_204 29_207
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 29_204 29_207
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 28_204 28_209
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 28_209 29_204
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 28_203 28_207
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 28_207 29_203
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 28_204 28_207
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 28_205 28_209
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 28_209 29_205
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 28_203 29_208
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM5 origin:045-hclk-cmt-pips 29_203 29_208
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 28_204 29_208
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 29_204 29_208
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 28_205 29_208
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 29_205 29_208
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 28_203 29_209
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 29_203 29_209
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 28_204 29_209
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 29_204 29_209
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 28_205 29_209
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 29_205 29_209
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 28_203 28_209
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 26_212 26_214
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_214 27_212
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_212 27_213
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 27_212 27_213
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 26_210 26_215
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_215 27_210
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_212 27_214
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 27_212 27_214
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 26_211 26_215
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 26_215 27_211
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 26_212 26_215
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK5 origin:045-hclk-cmt-pips 26_215 27_212
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 26_210 27_214
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 27_210 27_214
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 26_211 27_214
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 27_211 27_214
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 26_211 26_216
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 26_216 27_211
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 26_210 26_214
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 26_214 27_210
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 26_211 26_214
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 26_212 26_216
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 26_216 27_212
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 26_210 27_215
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM5 origin:045-hclk-cmt-pips 27_210 27_215
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 26_211 27_215
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 27_211 27_215
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 26_212 27_215
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 27_212 27_215
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 26_210 27_216
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 27_210 27_216
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 26_211 27_216
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 27_211 27_216
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 26_212 27_216
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 27_212 27_216
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 26_210 26_216
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 28_212 28_214
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_214 29_212
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_212 29_213
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 29_212 29_213
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 28_210 28_215
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 28_215 29_210
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 28_212 29_214
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 29_212 29_214
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 28_211 28_215
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 28_215 29_211
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 28_212 28_215
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK5 origin:045-hclk-cmt-pips 28_215 29_212
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 28_210 29_214
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 29_210 29_214
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 28_211 29_214
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 29_211 29_214
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 28_211 28_216
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 28_216 29_211
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 28_210 28_214
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 28_214 29_210
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 28_211 28_214
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 28_212 28_216
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 28_216 29_212
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 28_210 29_215
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM5 origin:045-hclk-cmt-pips 29_210 29_215
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 28_211 29_215
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 29_211 29_215
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 28_212 29_215
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 29_212 29_215
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 28_210 29_216
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 29_210 29_216
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 28_211 29_216
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 29_211 29_216
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 28_212 29_216
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 29_212 29_216
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 28_210 28_216
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 26_219 26_221
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_221 27_219
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_219 27_220
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 27_219 27_220
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 26_217 26_222
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_222 27_217
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_219 27_221
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 27_219 27_221
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 26_218 26_222
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 26_222 27_218
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 26_219 26_222
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK5 origin:045-hclk-cmt-pips 26_222 27_219
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 26_217 27_221
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 27_217 27_221
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 26_218 27_221
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 27_218 27_221
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 26_218 26_223
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 26_223 27_218
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 26_217 26_221
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 26_221 27_217
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 26_218 26_221
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 26_219 26_223
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 26_223 27_219
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 26_217 27_222
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM5 origin:045-hclk-cmt-pips 27_217 27_222
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 26_218 27_222
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 27_218 27_222
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 26_219 27_222
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 27_219 27_222
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 26_217 27_223
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 27_217 27_223
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 26_218 27_223
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 27_218 27_223
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 26_219 27_223
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 27_219 27_223
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 26_217 26_223
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 27_144 27_146
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_146 27_144
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_145 27_146
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 26_145 26_146
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 29_151 29_153
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_153 29_151
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_152 29_153
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 28_152 28_153
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 27_143 27_148
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_148 27_143
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_144 27_146
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 26_144 26_146
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 27_143 27_147
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 26_147 27_143
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 27_143 27_146
@ -254,11 +96,10 @@ HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 26_144
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 26_144 26_148
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 26_144 27_147
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 26_144 26_147
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_144 27_146
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 26_144 26_146
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 27_142 27_147
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 26_147 27_142
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 27_144 27_148
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 26_148 27_144
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 27_144 27_147
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 27_142 27_146
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 26_146 27_142
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 26_143 27_148
@ -267,6 +108,9 @@ HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 26_14
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 26_143 26_147
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 26_143 27_146
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 26_143 26_146
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 27_144 27_148
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 26_148 27_144
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 27_144 27_147
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 26_142 27_148
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 26_142 26_148
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 26_142 27_147
@ -274,14 +118,12 @@ HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 26_142
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 26_142 27_146
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 26_142 26_146
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 27_142 27_148
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 29_144 29_146
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_146 29_144
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_145 29_146
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 28_145 28_146
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 27_144 27_146
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_146 27_144
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_145 27_146
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 26_145 26_146
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 29_143 29_148
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 28_148 29_143
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 28_144 29_146
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 28_144 28_146
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 29_143 29_147
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 28_147 29_143
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 29_143 29_146
@ -290,11 +132,10 @@ HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 28_144
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 28_144 28_148
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 28_144 29_147
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 28_144 28_147
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 28_144 29_146
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 28_144 28_146
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 29_142 29_147
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 28_147 29_142
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 29_144 29_148
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 28_148 29_144
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 29_144 29_147
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 29_142 29_146
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 28_146 29_142
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 28_143 29_148
@ -303,6 +144,9 @@ HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 28_14
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 28_143 28_147
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 28_143 29_146
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 28_143 28_146
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 29_144 29_148
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 28_148 29_144
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 29_144 29_147
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 28_142 29_148
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 28_142 28_148
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 28_142 29_147
@ -310,14 +154,12 @@ HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 28_142
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 28_142 29_146
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 28_142 28_146
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 29_142 29_148
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 27_137 27_139
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_139 27_137
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_138 27_139
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 26_138 26_139
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 29_144 29_146
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_146 29_144
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_145 29_146
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 28_145 28_146
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 27_136 27_141
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_141 27_136
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_137 27_139
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 26_137 26_139
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 27_136 27_140
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 26_140 27_136
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 27_136 27_139
@ -326,11 +168,10 @@ HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 26_137
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 26_137 26_141
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 26_137 27_140
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 26_137 26_140
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_137 27_139
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 26_137 26_139
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 27_135 27_140
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 26_140 27_135
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 27_137 27_141
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 26_141 27_137
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 27_137 27_140
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 27_135 27_139
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 26_139 27_135
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 26_136 27_141
@ -339,6 +180,9 @@ HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 26_13
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 26_136 26_140
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 26_136 27_139
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 26_136 26_139
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 27_137 27_141
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 26_141 27_137
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 27_137 27_140
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 26_135 27_141
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 26_135 26_141
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 26_135 27_140
@ -346,14 +190,12 @@ HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 26_135
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 26_135 27_139
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 26_135 26_139
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 27_135 27_141
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 29_137 29_139
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_139 29_137
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_138 29_139
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 28_138 28_139
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 27_137 27_139
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_139 27_137
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_138 27_139
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 26_138 26_139
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 29_136 29_141
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 28_141 29_136
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 28_137 29_139
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 28_137 28_139
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 29_136 29_140
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 28_140 29_136
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 29_136 29_139
@ -362,11 +204,10 @@ HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 28_137
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 28_137 28_141
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 28_137 29_140
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 28_137 28_140
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 28_137 29_139
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 28_137 28_139
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 29_135 29_140
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 28_140 29_135
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 29_137 29_141
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 28_141 29_137
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 29_137 29_140
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 29_135 29_139
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 28_139 29_135
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 28_136 29_141
@ -375,6 +216,9 @@ HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 28_13
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 28_136 28_140
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 28_136 29_139
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 28_136 28_139
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 29_137 29_141
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 28_141 29_137
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 29_137 29_140
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 28_135 29_141
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 28_135 28_141
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 28_135 29_140
@ -382,14 +226,12 @@ HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 28_135
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 28_135 29_139
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 28_135 28_139
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 29_135 29_141
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 27_130 27_132
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_132 27_130
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_131 27_132
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 26_131 26_132
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 29_137 29_139
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_139 29_137
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_138 29_139
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 28_138 28_139
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 27_129 27_134
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_134 27_129
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_130 27_132
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 26_130 26_132
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 27_129 27_133
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 26_133 27_129
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 27_129 27_132
@ -398,11 +240,10 @@ HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 26_130
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 26_130 26_134
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 26_130 27_133
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 26_130 26_133
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_130 27_132
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 26_130 26_132
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 27_128 27_133
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 26_133 27_128
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 27_130 27_134
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 26_134 27_130
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 27_130 27_133
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 27_128 27_132
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 26_132 27_128
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 26_129 27_134
@ -411,6 +252,9 @@ HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 26_12
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 26_129 26_133
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 26_129 27_132
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 26_129 26_132
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 27_130 27_134
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 26_134 27_130
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 27_130 27_133
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 26_128 27_134
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 26_128 26_134
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 26_128 27_133
@ -418,14 +262,12 @@ HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 26_128
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 26_128 27_132
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 26_128 26_132
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 27_128 27_134
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 26_198 26_200
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_200 27_198
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_198 27_199
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 27_198 27_199
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 27_130 27_132
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_132 27_130
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_131 27_132
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 26_131 26_132
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 26_196 26_201
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_201 27_196
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_198 27_200
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 27_198 27_200
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 26_197 26_201
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 26_201 27_197
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 26_198 26_201
@ -434,11 +276,10 @@ HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 26_196
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 27_196 27_200
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 26_197 27_200
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 27_197 27_200
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_198 27_200
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 27_198 27_200
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 26_197 26_202
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 26_202 27_197
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 26_196 26_200
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 26_200 27_196
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 26_197 26_200
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 26_198 26_202
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 26_202 27_198
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 26_196 27_201
@ -447,6 +288,9 @@ HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 26_19
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 27_197 27_201
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 26_198 27_201
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 27_198 27_201
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 26_196 26_200
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 26_200 27_196
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 26_197 26_200
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 26_196 27_202
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 27_196 27_202
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 26_197 27_202
@ -454,14 +298,12 @@ HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 27_197
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 26_198 27_202
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 27_198 27_202
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 26_196 26_202
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 28_198 28_200
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_200 29_198
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_198 29_199
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 29_198 29_199
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 26_198 26_200
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_200 27_198
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_198 27_199
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 27_198 27_199
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 28_196 28_201
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 28_201 29_196
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 28_198 29_200
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 29_198 29_200
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 28_197 28_201
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 28_201 29_197
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 28_198 28_201
@ -470,11 +312,10 @@ HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 28_196
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 29_196 29_200
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 28_197 29_200
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 29_197 29_200
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 28_198 29_200
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 29_198 29_200
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 28_197 28_202
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 28_202 29_197
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 28_196 28_200
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 28_200 29_196
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 28_197 28_200
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 28_198 28_202
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 28_202 29_198
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 28_196 29_201
@ -483,6 +324,9 @@ HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 28_19
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 29_197 29_201
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 28_198 29_201
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 29_198 29_201
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 28_196 28_200
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 28_200 29_196
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 28_197 28_200
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 28_196 29_202
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 29_196 29_202
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 28_197 29_202
@ -490,14 +334,12 @@ HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 29_197
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 28_198 29_202
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 29_198 29_202
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 28_196 28_202
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 26_205 26_207
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_207 27_205
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_205 27_206
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 27_205 27_206
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 28_198 28_200
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_200 29_198
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_198 29_199
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 29_198 29_199
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 26_203 26_208
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_208 27_203
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_205 27_207
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 27_205 27_207
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 26_204 26_208
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 26_208 27_204
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 26_205 26_208
@ -506,11 +348,10 @@ HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 26_203
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 27_203 27_207
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 26_204 27_207
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 27_204 27_207
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_205 27_207
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 27_205 27_207
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 26_204 26_209
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 26_209 27_204
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 26_203 26_207
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 26_207 27_203
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 26_204 26_207
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 26_205 26_209
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 26_209 27_205
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 26_203 27_208
@ -519,6 +360,9 @@ HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 26_20
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 27_204 27_208
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 26_205 27_208
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 27_205 27_208
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 26_203 26_207
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 26_207 27_203
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 26_204 26_207
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 26_203 27_209
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 27_203 27_209
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 26_204 27_209
@ -526,14 +370,156 @@ HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 27_204
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 26_205 27_209
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 27_205 27_209
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 26_203 26_209
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 27_123 27_125
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_125 27_123
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_124 27_125
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 26_124 26_125
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 26_205 26_207
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_207 27_205
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_205 27_206
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 27_205 27_206
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 28_203 28_208
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 28_208 29_203
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 28_204 28_208
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 28_208 29_204
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 28_205 28_208
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK5 origin:045-hclk-cmt-pips 28_208 29_205
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 28_203 29_207
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 29_203 29_207
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 28_204 29_207
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 29_204 29_207
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 28_205 29_207
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 29_205 29_207
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 28_204 28_209
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 28_209 29_204
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 28_205 28_209
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 28_209 29_205
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 28_203 29_208
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM5 origin:045-hclk-cmt-pips 29_203 29_208
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 28_204 29_208
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 29_204 29_208
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 28_205 29_208
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 29_205 29_208
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 28_203 28_207
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 28_207 29_203
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 28_204 28_207
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 28_203 29_209
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 29_203 29_209
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 28_204 29_209
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 29_204 29_209
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 28_205 29_209
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 29_205 29_209
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 28_203 28_209
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 28_205 28_207
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_207 29_205
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_205 29_206
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 29_205 29_206
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 26_210 26_215
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_215 27_210
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 26_211 26_215
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 26_215 27_211
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 26_212 26_215
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK5 origin:045-hclk-cmt-pips 26_215 27_212
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 26_210 27_214
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 27_210 27_214
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 26_211 27_214
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 27_211 27_214
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_212 27_214
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 27_212 27_214
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 26_211 26_216
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 26_216 27_211
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 26_212 26_216
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 26_216 27_212
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 26_210 27_215
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM5 origin:045-hclk-cmt-pips 27_210 27_215
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 26_211 27_215
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 27_211 27_215
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 26_212 27_215
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 27_212 27_215
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 26_210 26_214
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 26_214 27_210
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 26_211 26_214
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 26_210 27_216
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 27_210 27_216
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 26_211 27_216
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 27_211 27_216
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 26_212 27_216
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 27_212 27_216
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 26_210 26_216
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 26_212 26_214
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_214 27_212
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_212 27_213
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 27_212 27_213
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 28_210 28_215
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 28_215 29_210
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 28_211 28_215
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 28_215 29_211
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 28_212 28_215
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK5 origin:045-hclk-cmt-pips 28_215 29_212
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 28_210 29_214
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 29_210 29_214
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 28_211 29_214
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 29_211 29_214
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 28_212 29_214
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 29_212 29_214
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 28_211 28_216
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 28_216 29_211
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 28_212 28_216
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 28_216 29_212
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 28_210 29_215
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM5 origin:045-hclk-cmt-pips 29_210 29_215
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 28_211 29_215
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 29_211 29_215
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 28_212 29_215
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 29_212 29_215
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 28_210 28_214
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 28_214 29_210
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 28_211 28_214
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 28_210 29_216
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 29_210 29_216
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 28_211 29_216
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 29_211 29_216
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 28_212 29_216
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 29_212 29_216
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 28_210 28_216
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 28_212 28_214
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_214 29_212
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_212 29_213
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 29_212 29_213
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 26_217 26_222
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_222 27_217
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 26_218 26_222
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 26_222 27_218
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 26_219 26_222
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK5 origin:045-hclk-cmt-pips 26_222 27_219
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pips 26_217 27_221
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 27_217 27_221
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 26_218 27_221
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 27_218 27_221
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_219 27_221
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 27_219 27_221
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM0 origin:045-hclk-cmt-pips 26_218 26_223
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM1 origin:045-hclk-cmt-pips 26_223 27_218
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM2 origin:045-hclk-cmt-pips 26_219 26_223
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM3 origin:045-hclk-cmt-pips 26_223 27_219
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM4 origin:045-hclk-cmt-pips 26_217 27_222
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM5 origin:045-hclk-cmt-pips 27_217 27_222
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM6 origin:045-hclk-cmt-pips 26_218 27_222
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM7 origin:045-hclk-cmt-pips 27_218 27_222
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM8 origin:045-hclk-cmt-pips 26_219 27_222
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM9 origin:045-hclk-cmt-pips 27_219 27_222
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM10 origin:045-hclk-cmt-pips 26_217 26_221
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM11 origin:045-hclk-cmt-pips 26_221 27_217
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM12 origin:045-hclk-cmt-pips 26_218 26_221
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_PLL0 origin:045-hclk-cmt-pips 26_217 27_223
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_PLL1 origin:045-hclk-cmt-pips 27_217 27_223
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_PLL2 origin:045-hclk-cmt-pips 26_218 27_223
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_PLL3 origin:045-hclk-cmt-pips 27_218 27_223
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_PLL4 origin:045-hclk-cmt-pips 26_219 27_223
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_PLL5 origin:045-hclk-cmt-pips 27_219 27_223
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_PLL6 origin:045-hclk-cmt-pips 26_217 26_223
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 26_219 26_221
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_221 27_219
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_219 27_220
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 27_219 27_220
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 27_122 27_127
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_127 27_122
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_123 27_125
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 26_123 26_125
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 27_122 27_126
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 26_126 27_122
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 27_122 27_125
@ -542,18 +528,18 @@ HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pi
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 26_123 26_127
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 26_123 27_126
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 26_123 26_126
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_123 27_125
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 26_123 26_125
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFRCLK0 origin:045-hclk-cmt-pips 27_123 27_127
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFRCLK1 origin:045-hclk-cmt-pips 26_127 27_123
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFRCLK2 origin:045-hclk-cmt-pips 27_123 27_126
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFRCLK3 origin:045-hclk-cmt-pips 26_126 27_123
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 28_118 28_120
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_118 29_119
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_120 29_118
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 29_118 29_119
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 27_123 27_125
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_125 27_123
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_124 27_125
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 26_124 26_125
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 28_117 28_122
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 28_117 29_121
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 28_120 29_117
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 29_117 29_119
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 28_117 28_121
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 28_117 29_120
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 28_117 28_120
@ -562,18 +548,18 @@ HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pip
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 29_117 29_121
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 28_121 29_117
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 29_117 29_120
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 28_120 29_117
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 29_117 29_119
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFRCLK0 origin:045-hclk-cmt-pips 28_118 28_122
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFRCLK1 origin:045-hclk-cmt-pips 28_118 29_121
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFRCLK2 origin:045-hclk-cmt-pips 28_118 28_121
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFRCLK3 origin:045-hclk-cmt-pips 28_118 29_120
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 26_118 26_120
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_118 27_119
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_120 27_118
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 27_118 27_119
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 28_118 28_120
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_118 29_119
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_120 29_118
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 29_118 29_119
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 26_117 26_122
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_117 27_121
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_120 27_117
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 27_117 27_119
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 26_117 26_121
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 26_117 27_120
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 26_117 26_120
@ -582,18 +568,18 @@ HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pip
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 27_117 27_121
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 26_121 27_117
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 27_117 27_120
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_120 27_117
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 27_117 27_119
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFRCLK0 origin:045-hclk-cmt-pips 26_118 26_122
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFRCLK1 origin:045-hclk-cmt-pips 26_118 27_121
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFRCLK2 origin:045-hclk-cmt-pips 26_118 26_121
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFRCLK3 origin:045-hclk-cmt-pips 26_118 27_120
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 26_226 26_228
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_228 27_226
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_226 27_227
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 27_226 27_227
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 26_118 26_120
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_118 27_119
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_120 27_118
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 27_118 27_119
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 26_224 26_229
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_229 27_224
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_226 27_228
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 27_226 27_228
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 26_225 26_229
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 26_229 27_225
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 26_226 26_229
@ -602,18 +588,18 @@ HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-p
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 27_224 27_228
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 26_225 27_228
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 27_225 27_228
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_226 27_228
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 27_226 27_228
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFRCLK0 origin:045-hclk-cmt-pips 26_224 26_228
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFRCLK1 origin:045-hclk-cmt-pips 26_228 27_224
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFRCLK2 origin:045-hclk-cmt-pips 26_225 26_228
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFRCLK3 origin:045-hclk-cmt-pips 26_228 27_225
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 29_231 29_233
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_232 29_233
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_233 29_231
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 28_232 28_233
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 26_226 26_228
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_228 27_226
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_226 27_227
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 27_226 27_227
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 29_229 29_234
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 28_230 29_234
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 28_234 29_231
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 28_232 28_234
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 29_230 29_234
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 28_231 29_234
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 29_231 29_234
@ -622,18 +608,18 @@ HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pi
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 28_230 28_234
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 28_234 29_230
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 28_231 28_234
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 28_234 29_231
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 28_232 28_234
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFRCLK0 origin:045-hclk-cmt-pips 29_229 29_233
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFRCLK1 origin:045-hclk-cmt-pips 28_230 29_233
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFRCLK2 origin:045-hclk-cmt-pips 29_230 29_233
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFRCLK3 origin:045-hclk-cmt-pips 28_231 29_233
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 27_231 27_233
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_232 27_233
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_233 27_231
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 26_232 26_233
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 29_231 29_233
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_232 29_233
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_233 29_231
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 28_232 28_233
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 27_229 27_234
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_230 27_234
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_234 27_231
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 26_232 26_234
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 27_230 27_234
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK3 origin:045-hclk-cmt-pips 26_231 27_234
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK4 origin:045-hclk-cmt-pips 27_231 27_234
@ -642,7 +628,21 @@ HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK6 origin:045-hclk-cmt-pi
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK7 origin:045-hclk-cmt-pips 26_230 26_234
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK8 origin:045-hclk-cmt-pips 26_234 27_230
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK9 origin:045-hclk-cmt-pips 26_231 26_234
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK10 origin:045-hclk-cmt-pips 26_234 27_231
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK11 origin:045-hclk-cmt-pips 26_232 26_234
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFRCLK0 origin:045-hclk-cmt-pips 27_229 27_233
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFRCLK1 origin:045-hclk-cmt-pips 26_230 27_233
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFRCLK2 origin:045-hclk-cmt-pips 27_230 27_233
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFRCLK3 origin:045-hclk-cmt-pips 26_231 27_233
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 27_231 27_233
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_232 27_233
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_233 27_231
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 26_232 26_233
HCLK_CMT_L.HCLK_CMT_CCIO0_ACTIVE origin:045-hclk-cmt-pips 27_159
HCLK_CMT_L.HCLK_CMT_CCIO0_USED origin:045-hclk-cmt-pips 27_157
HCLK_CMT_L.HCLK_CMT_CCIO1_ACTIVE origin:045-hclk-cmt-pips 26_159
HCLK_CMT_L.HCLK_CMT_CCIO1_USED origin:045-hclk-cmt-pips 26_156
HCLK_CMT_L.HCLK_CMT_CCIO2_ACTIVE origin:045-hclk-cmt-pips 27_158
HCLK_CMT_L.HCLK_CMT_CCIO2_USED origin:045-hclk-cmt-pips 28_217
HCLK_CMT_L.HCLK_CMT_CCIO3_ACTIVE origin:045-hclk-cmt-pips 26_158
HCLK_CMT_L.HCLK_CMT_CCIO3_USED origin:045-hclk-cmt-pips 29_218

84
artix7/segbits_hclk_ioi3.origin_info.db
View File

@ -40,8 +40,6 @@ HCLK_IOI3.BUFR_Y3.BUFR_DIVIDE.D8 origin:039-hclk-config 32_28 33_23 33_24 33_25
HCLK_IOI3.BUFR_Y3.IN_USE origin:039-hclk-config 32_26
HCLK_IOI3.HCLK_IOI_CK_IGCLK0.HCLK_IOI_CK_BUFHCLK0 origin:047-hclk-ioi-pips 28_15
HCLK_IOI3.HCLK_IOI_CK_IGCLK1.HCLK_IOI_CK_BUFHCLK1 origin:047-hclk-ioi-pips 29_14
HCLK_IOI3.HCLK_IOI_CK_IGCLK10.HCLK_IOI_CK_BUFHCLK10 origin:047-hclk-ioi-pips 29_17
HCLK_IOI3.HCLK_IOI_CK_IGCLK11.HCLK_IOI_CK_BUFHCLK11 origin:047-hclk-ioi-pips 29_19
HCLK_IOI3.HCLK_IOI_CK_IGCLK2.HCLK_IOI_CK_BUFHCLK2 origin:047-hclk-ioi-pips 29_16
HCLK_IOI3.HCLK_IOI_CK_IGCLK3.HCLK_IOI_CK_BUFHCLK3 origin:047-hclk-ioi-pips 29_18
HCLK_IOI3.HCLK_IOI_CK_IGCLK4.HCLK_IOI_CK_BUFHCLK4 origin:047-hclk-ioi-pips 29_23
@ -50,6 +48,8 @@ HCLK_IOI3.HCLK_IOI_CK_IGCLK6.HCLK_IOI_CK_BUFHCLK6 origin:047-hclk-ioi-pips 29_30
HCLK_IOI3.HCLK_IOI_CK_IGCLK7.HCLK_IOI_CK_BUFHCLK7 origin:047-hclk-ioi-pips 29_31
HCLK_IOI3.HCLK_IOI_CK_IGCLK8.HCLK_IOI_CK_BUFHCLK8 origin:047-hclk-ioi-pips 28_14
HCLK_IOI3.HCLK_IOI_CK_IGCLK9.HCLK_IOI_CK_BUFHCLK9 origin:047-hclk-ioi-pips 29_15
HCLK_IOI3.HCLK_IOI_CK_IGCLK10.HCLK_IOI_CK_BUFHCLK10 origin:047-hclk-ioi-pips 29_17
HCLK_IOI3.HCLK_IOI_CK_IGCLK11.HCLK_IOI_CK_BUFHCLK11 origin:047-hclk-ioi-pips 29_19
HCLK_IOI3.HCLK_IOI_IDELAYCTRL_REFCLK.HCLK_IOI_LEAF_GCLK_BOT0 origin:047a-hclk-idelayctrl-pips 26_20 37_28 37_29
HCLK_IOI3.HCLK_IOI_IDELAYCTRL_REFCLK.HCLK_IOI_LEAF_GCLK_BOT1 origin:047a-hclk-idelayctrl-pips 26_21 37_28 37_29
HCLK_IOI3.HCLK_IOI_IDELAYCTRL_REFCLK.HCLK_IOI_LEAF_GCLK_BOT2 origin:047a-hclk-idelayctrl-pips 26_22 37_28 37_29
@ -68,8 +68,6 @@ HCLK_IOI3.HCLK_IOI_IO_PLL_CLK2_DMUX.HCLK_IOI_IOCLK_PLL2 origin:047-hclk-ioi-pips
HCLK_IOI3.HCLK_IOI_IO_PLL_CLK3_DMUX.HCLK_IOI_IOCLK_PLL3 origin:047-hclk-ioi-pips 37_14 37_17
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK0 origin:047-hclk-ioi-pips 29_24 29_29
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK1 origin:047-hclk-ioi-pips 27_19 29_24
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi-pips 27_23 29_25
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi-pips 27_27 29_25
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK2 origin:047-hclk-ioi-pips 27_23 29_24
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK3 origin:047-hclk-ioi-pips 27_27 29_24
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK4 origin:047-hclk-ioi-pips 28_18 29_29
@ -78,10 +76,10 @@ HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK6 origin:047-hclk-ioi-pips 27
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK7 origin:047-hclk-ioi-pips 27_27 28_18
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK8 origin:047-hclk-ioi-pips 29_25 29_29
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK9 origin:047-hclk-ioi-pips 27_19 29_25
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi-pips 27_23 29_25
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi-pips 27_27 29_25
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK0 origin:047-hclk-ioi-pips 27_17 32_25
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK1 origin:047-hclk-ioi-pips 27_20 32_25
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi-pips 27_24 28_19
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi-pips 27_28 28_19
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK2 origin:047-hclk-ioi-pips 27_24 32_25
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK3 origin:047-hclk-ioi-pips 27_28 32_25
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK4 origin:047-hclk-ioi-pips 27_17 31_29
@ -90,10 +88,10 @@ HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK6 origin:047-hclk-ioi-pips 27
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK7 origin:047-hclk-ioi-pips 27_28 31_29
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK8 origin:047-hclk-ioi-pips 27_17 28_19
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK9 origin:047-hclk-ioi-pips 27_20 28_19
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi-pips 27_24 28_19
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi-pips 27_28 28_19
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK0 origin:047-hclk-ioi-pips 30_30 31_25
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK1 origin:047-hclk-ioi-pips 30_28 31_25
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi-pips 30_26 31_26
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi-pips 30_24 31_26
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK2 origin:047-hclk-ioi-pips 30_26 31_25
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK3 origin:047-hclk-ioi-pips 30_24 31_25
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK4 origin:047-hclk-ioi-pips 30_30 31_24
@ -102,10 +100,10 @@ HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK6 origin:047-hclk-ioi-pips 30
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK7 origin:047-hclk-ioi-pips 30_24 31_24
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK8 origin:047-hclk-ioi-pips 30_30 31_26
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK9 origin:047-hclk-ioi-pips 30_28 31_26
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi-pips 30_26 31_26
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi-pips 30_24 31_26
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK0 origin:047-hclk-ioi-pips 26_16 27_31
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK1 origin:047-hclk-ioi-pips 26_16 28_28
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi-pips 26_14 28_24
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi-pips 26_14 29_21
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK2 origin:047-hclk-ioi-pips 26_16 28_24
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK3 origin:047-hclk-ioi-pips 26_16 29_21
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK4 origin:047-hclk-ioi-pips 27_15 27_31
@ -114,10 +112,10 @@ HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK6 origin:047-hclk-ioi-pips 27
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK7 origin:047-hclk-ioi-pips 27_15 29_21
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK8 origin:047-hclk-ioi-pips 26_14 27_31
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK9 origin:047-hclk-ioi-pips 26_14 28_28
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi-pips 26_14 28_24
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi-pips 26_14 29_21
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK0 origin:047-hclk-ioi-pips 27_30 31_27
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK1 origin:047-hclk-ioi-pips 28_29 31_27
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi-pips 28_20 28_25
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi-pips 28_20 28_22
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK2 origin:047-hclk-ioi-pips 28_25 31_27
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK3 origin:047-hclk-ioi-pips 28_22 31_27
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK4 origin:047-hclk-ioi-pips 27_30 31_30
@ -126,10 +124,10 @@ HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK6 origin:047-hclk-ioi-pips 28
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK7 origin:047-hclk-ioi-pips 28_22 31_30
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK8 origin:047-hclk-ioi-pips 27_30 28_20
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK9 origin:047-hclk-ioi-pips 28_20 28_29
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi-pips 28_20 28_25
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi-pips 28_20 28_22
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK0 origin:047-hclk-ioi-pips 31_18 31_23
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK1 origin:047-hclk-ioi-pips 31_16 31_23
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi-pips 31_14 31_21
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi-pips 30_15 31_21
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK2 origin:047-hclk-ioi-pips 31_14 31_23
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK3 origin:047-hclk-ioi-pips 30_15 31_23
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK4 origin:047-hclk-ioi-pips 31_18 31_22
@ -138,10 +136,10 @@ HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK6 origin:047-hclk-ioi-pips 31
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK7 origin:047-hclk-ioi-pips 30_15 31_22
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK8 origin:047-hclk-ioi-pips 31_18 31_21
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK9 origin:047-hclk-ioi-pips 31_16 31_21
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi-pips 31_14 31_21
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi-pips 30_15 31_21
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK0 origin:047-hclk-ioi-pips 26_19 29_28
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK1 origin:047-hclk-ioi-pips 26_19 27_21
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi-pips 26_17 27_25
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi-pips 26_17 29_26
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK2 origin:047-hclk-ioi-pips 26_19 27_25
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK3 origin:047-hclk-ioi-pips 26_19 29_26
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK4 origin:047-hclk-ioi-pips 26_18 29_28
@ -150,10 +148,10 @@ HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK6 origin:047-hclk-ioi-pips 26
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK7 origin:047-hclk-ioi-pips 26_18 29_26
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK8 origin:047-hclk-ioi-pips 26_17 29_28
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK9 origin:047-hclk-ioi-pips 26_17 27_21
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi-pips 26_17 27_25
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi-pips 26_17 29_26
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK0 origin:047-hclk-ioi-pips 27_18 32_24
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK1 origin:047-hclk-ioi-pips 27_22 32_24
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi-pips 27_26 31_28
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi-pips 27_29 31_28
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK2 origin:047-hclk-ioi-pips 27_26 32_24
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK3 origin:047-hclk-ioi-pips 27_29 32_24
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK4 origin:047-hclk-ioi-pips 27_18 31_31
@ -162,10 +160,10 @@ HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK6 origin:047-hclk-ioi-pips 27
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK7 origin:047-hclk-ioi-pips 27_29 31_31
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK8 origin:047-hclk-ioi-pips 27_18 31_28
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK9 origin:047-hclk-ioi-pips 27_22 31_28
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi-pips 27_26 31_28
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi-pips 27_29 31_28
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK0 origin:047-hclk-ioi-pips 30_22 30_29
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK1 origin:047-hclk-ioi-pips 30_22 30_27
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi-pips 30_20 30_25
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi-pips 30_20 30_23
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK2 origin:047-hclk-ioi-pips 30_22 30_25
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK3 origin:047-hclk-ioi-pips 30_22 30_23
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK4 origin:047-hclk-ioi-pips 30_21 30_29
@ -174,10 +172,10 @@ HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK6 origin:047-hclk-ioi-pips 30
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK7 origin:047-hclk-ioi-pips 30_21 30_23
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK8 origin:047-hclk-ioi-pips 30_20 30_29
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK9 origin:047-hclk-ioi-pips 30_20 30_27
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi-pips 30_20 30_25
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi-pips 30_20 30_23
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK0 origin:047-hclk-ioi-pips 26_15 28_30
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK1 origin:047-hclk-ioi-pips 26_15 28_26
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi-pips 27_16 29_20
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi-pips 27_16 29_22
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK2 origin:047-hclk-ioi-pips 26_15 29_20
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK3 origin:047-hclk-ioi-pips 26_15 29_22
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK4 origin:047-hclk-ioi-pips 27_14 28_30
@ -186,10 +184,10 @@ HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK6 origin:047-hclk-ioi-pips 27
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK7 origin:047-hclk-ioi-pips 27_14 29_22
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK8 origin:047-hclk-ioi-pips 27_16 28_30
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK9 origin:047-hclk-ioi-pips 27_16 28_26
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi-pips 27_16 29_20
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi-pips 27_16 29_22
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK0 origin:047-hclk-ioi-pips 28_31 32_23
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK1 origin:047-hclk-ioi-pips 28_27 32_23
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi-pips 28_23 32_14
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi-pips 28_21 32_14
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK2 origin:047-hclk-ioi-pips 28_23 32_23
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK3 origin:047-hclk-ioi-pips 28_21 32_23
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK4 origin:047-hclk-ioi-pips 28_31 32_15
@ -198,10 +196,10 @@ HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK6 origin:047-hclk-ioi-pips 28
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK7 origin:047-hclk-ioi-pips 28_21 32_15
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK8 origin:047-hclk-ioi-pips 28_31 32_14
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK9 origin:047-hclk-ioi-pips 28_27 32_14
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi-pips 28_23 32_14
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi-pips 28_21 32_14
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK0 origin:047-hclk-ioi-pips 30_17 31_17
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK1 origin:047-hclk-ioi-pips 30_17 31_15
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi-pips 30_14 30_19
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi-pips 30_16 30_19
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK2 origin:047-hclk-ioi-pips 30_14 30_17
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK3 origin:047-hclk-ioi-pips 30_16 30_17
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK4 origin:047-hclk-ioi-pips 30_18 31_17
@ -210,38 +208,40 @@ HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK6 origin:047-hclk-ioi-pips 30
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK7 origin:047-hclk-ioi-pips 30_16 30_18
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK8 origin:047-hclk-ioi-pips 30_19 31_17
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK9 origin:047-hclk-ioi-pips 30_19 31_15
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV0.HCLK_IOI_RCLK0 origin:047-hclk-ioi-pips 32_30 35_23
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV0.HCLK_IOI_RCLK1 origin:047-hclk-ioi-pips 32_30 35_24
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV0.HCLK_IOI_RCLK2 origin:047-hclk-ioi-pips 32_30 34_31
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV0.HCLK_IOI_RCLK3 origin:047-hclk-ioi-pips 32_30 35_25
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi-pips 30_14 30_19
HCLK_IOI3.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi-pips 30_16 30_19
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV0.HCLK_IOI_RCLK_IMUX0 origin:047-hclk-ioi-pips 32_30 35_26
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV0.HCLK_IOI_RCLK_IMUX1 origin:047-hclk-ioi-pips 32_30 35_27
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV0.HCLK_IOI_RCLK_IMUX2 origin:047-hclk-ioi-pips 32_30 35_28
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV0.HCLK_IOI_RCLK_IMUX3 origin:047-hclk-ioi-pips 32_30 35_29
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV1.HCLK_IOI_RCLK0 origin:047-hclk-ioi-pips 32_26 36_26
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV1.HCLK_IOI_RCLK1 origin:047-hclk-ioi-pips 32_26 36_27
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV1.HCLK_IOI_RCLK2 origin:047-hclk-ioi-pips 32_26 34_23
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV1.HCLK_IOI_RCLK3 origin:047-hclk-ioi-pips 32_26 34_24
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV0.HCLK_IOI_RCLK0 origin:047-hclk-ioi-pips 32_30 35_23
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV0.HCLK_IOI_RCLK1 origin:047-hclk-ioi-pips 32_30 35_24
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV0.HCLK_IOI_RCLK2 origin:047-hclk-ioi-pips 32_30 34_31
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV0.HCLK_IOI_RCLK3 origin:047-hclk-ioi-pips 32_30 35_25
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV1.HCLK_IOI_RCLK_IMUX0 origin:047-hclk-ioi-pips 32_26 34_25
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV1.HCLK_IOI_RCLK_IMUX1 origin:047-hclk-ioi-pips 32_26 34_26
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV1.HCLK_IOI_RCLK_IMUX2 origin:047-hclk-ioi-pips 32_26 34_30
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV1.HCLK_IOI_RCLK_IMUX3 origin:047-hclk-ioi-pips 32_26 34_29
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV2.HCLK_IOI_RCLK0 origin:047-hclk-ioi-pips 32_20 36_24
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV2.HCLK_IOI_RCLK1 origin:047-hclk-ioi-pips 32_20 36_25
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV2.HCLK_IOI_RCLK2 origin:047-hclk-ioi-pips 32_20 34_15
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV2.HCLK_IOI_RCLK3 origin:047-hclk-ioi-pips 32_20 34_16
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV1.HCLK_IOI_RCLK0 origin:047-hclk-ioi-pips 32_26 36_26
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV1.HCLK_IOI_RCLK1 origin:047-hclk-ioi-pips 32_26 36_27
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV1.HCLK_IOI_RCLK2 origin:047-hclk-ioi-pips 32_26 34_23
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV1.HCLK_IOI_RCLK3 origin:047-hclk-ioi-pips 32_26 34_24
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV2.HCLK_IOI_RCLK_IMUX0 origin:047-hclk-ioi-pips 32_20 34_17
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV2.HCLK_IOI_RCLK_IMUX1 origin:047-hclk-ioi-pips 32_20 34_18
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV2.HCLK_IOI_RCLK_IMUX2 origin:047-hclk-ioi-pips 32_20 34_19
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV2.HCLK_IOI_RCLK_IMUX3 origin:047-hclk-ioi-pips 32_20 34_20
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK0 origin:047-hclk-ioi-pips 32_16 32_19
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK1 origin:047-hclk-ioi-pips 32_19 35_21
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK2 origin:047-hclk-ioi-pips 31_20 32_19
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK3 origin:047-hclk-ioi-pips 32_19 35_19
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV2.HCLK_IOI_RCLK0 origin:047-hclk-ioi-pips 32_20 36_24
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV2.HCLK_IOI_RCLK1 origin:047-hclk-ioi-pips 32_20 36_25
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV2.HCLK_IOI_RCLK2 origin:047-hclk-ioi-pips 32_20 34_15
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV2.HCLK_IOI_RCLK3 origin:047-hclk-ioi-pips 32_20 34_16
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK_IMUX0 origin:047-hclk-ioi-pips 32_19 35_18
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK_IMUX1 origin:047-hclk-ioi-pips 32_19 35_17
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK_IMUX2 origin:047-hclk-ioi-pips 32_19 35_16
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK_IMUX3 origin:047-hclk-ioi-pips 32_19 35_15
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK0 origin:047-hclk-ioi-pips 32_16 32_19
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK1 origin:047-hclk-ioi-pips 32_19 35_21
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK2 origin:047-hclk-ioi-pips 31_20 32_19
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK3 origin:047-hclk-ioi-pips 32_19 35_19
HCLK_IOI3.STEPDOWN origin:030-iob 38_15 39_14 39_15 39_16
HCLK_IOI3.VREF.V_600_MV origin:030-iob 38_26 39_30
HCLK_IOI3.VREF.V_675_MV origin:030-iob 38_26 39_22

196
artix7/segbits_hclk_l.origin_info.db
View File

@ -1,15 +1,7 @@
HCLK_L.ENABLE_BUFFER.HCLK_CK_BUFHCLK10 origin:058-pip-hclk 00_22
HCLK_L.ENABLE_BUFFER.HCLK_CK_BUFHCLK11 origin:058-pip-hclk 01_22
HCLK_L.ENABLE_BUFFER.HCLK_CK_BUFHCLK8 origin:058-pip-hclk 00_14
HCLK_L.ENABLE_BUFFER.HCLK_CK_BUFHCLK9 origin:058-pip-hclk 01_19
HCLK_L.HCLK_LEAF_CLK_B_BOTL0.HCLK_CK_BUFHCLK10 origin:058-pip-hclk 01_15 04_15
HCLK_L.HCLK_LEAF_CLK_B_BOTL0.HCLK_CK_BUFHCLK11 origin:058-pip-hclk 01_15 03_15
HCLK_L.HCLK_LEAF_CLK_B_BOTL0.HCLK_CK_BUFHCLK8 origin:058-pip-hclk 01_15 04_14
HCLK_L.HCLK_LEAF_CLK_B_BOTL0.HCLK_CK_BUFHCLK9 origin:058-pip-hclk 01_15 03_14
HCLK_L.HCLK_LEAF_CLK_B_BOTL0.HCLK_CK_BUFRCLK0 origin:058-pip-hclk 00_16 04_14
HCLK_L.HCLK_LEAF_CLK_B_BOTL0.HCLK_CK_BUFRCLK1 origin:058-pip-hclk 00_16 03_14
HCLK_L.HCLK_LEAF_CLK_B_BOTL0.HCLK_CK_BUFRCLK2 origin:058-pip-hclk 00_16 04_15
HCLK_L.HCLK_LEAF_CLK_B_BOTL0.HCLK_CK_BUFRCLK3 origin:058-pip-hclk 00_16 03_15
HCLK_L.ENABLE_BUFFER.HCLK_CK_BUFHCLK10 origin:058-pip-hclk 00_22
HCLK_L.ENABLE_BUFFER.HCLK_CK_BUFHCLK11 origin:058-pip-hclk 01_22
HCLK_L.HCLK_LEAF_CLK_B_BOTL0.HCLK_CK_OUTIN_L0 origin:058-pip-hclk 01_14 04_14
HCLK_L.HCLK_LEAF_CLK_B_BOTL0.HCLK_CK_OUTIN_L1 origin:058-pip-hclk 01_14 03_14
HCLK_L.HCLK_LEAF_CLK_B_BOTL0.HCLK_CK_OUTIN_L2 origin:058-pip-hclk 01_14 04_15
@ -18,14 +10,14 @@ HCLK_L.HCLK_LEAF_CLK_B_BOTL0.HCLK_CK_OUTIN_L4 origin:058-pip-hclk 00_15 04_14
HCLK_L.HCLK_LEAF_CLK_B_BOTL0.HCLK_CK_OUTIN_L5 origin:058-pip-hclk 00_15 03_14
HCLK_L.HCLK_LEAF_CLK_B_BOTL0.HCLK_CK_OUTIN_L6 origin:058-pip-hclk 00_15 04_15
HCLK_L.HCLK_LEAF_CLK_B_BOTL0.HCLK_CK_OUTIN_L7 origin:058-pip-hclk 00_15 03_15
HCLK_L.HCLK_LEAF_CLK_B_BOTL1.HCLK_CK_BUFHCLK10 origin:058-pip-hclk 02_15 04_16
HCLK_L.HCLK_LEAF_CLK_B_BOTL1.HCLK_CK_BUFHCLK11 origin:058-pip-hclk 04_16 05_15
HCLK_L.HCLK_LEAF_CLK_B_BOTL1.HCLK_CK_BUFHCLK8 origin:058-pip-hclk 02_14 04_16
HCLK_L.HCLK_LEAF_CLK_B_BOTL1.HCLK_CK_BUFHCLK9 origin:058-pip-hclk 04_16 05_14
HCLK_L.HCLK_LEAF_CLK_B_BOTL1.HCLK_CK_BUFRCLK0 origin:058-pip-hclk 02_14 02_16
HCLK_L.HCLK_LEAF_CLK_B_BOTL1.HCLK_CK_BUFRCLK1 origin:058-pip-hclk 02_16 05_14
HCLK_L.HCLK_LEAF_CLK_B_BOTL1.HCLK_CK_BUFRCLK2 origin:058-pip-hclk 02_15 02_16
HCLK_L.HCLK_LEAF_CLK_B_BOTL1.HCLK_CK_BUFRCLK3 origin:058-pip-hclk 02_16 05_15
HCLK_L.HCLK_LEAF_CLK_B_BOTL0.HCLK_CK_BUFHCLK8 origin:058-pip-hclk 01_15 04_14
HCLK_L.HCLK_LEAF_CLK_B_BOTL0.HCLK_CK_BUFHCLK9 origin:058-pip-hclk 01_15 03_14
HCLK_L.HCLK_LEAF_CLK_B_BOTL0.HCLK_CK_BUFHCLK10 origin:058-pip-hclk 01_15 04_15
HCLK_L.HCLK_LEAF_CLK_B_BOTL0.HCLK_CK_BUFHCLK11 origin:058-pip-hclk 01_15 03_15
HCLK_L.HCLK_LEAF_CLK_B_BOTL0.HCLK_CK_BUFRCLK0 origin:058-pip-hclk 00_16 04_14
HCLK_L.HCLK_LEAF_CLK_B_BOTL0.HCLK_CK_BUFRCLK1 origin:058-pip-hclk 00_16 03_14
HCLK_L.HCLK_LEAF_CLK_B_BOTL0.HCLK_CK_BUFRCLK2 origin:058-pip-hclk 00_16 04_15
HCLK_L.HCLK_LEAF_CLK_B_BOTL0.HCLK_CK_BUFRCLK3 origin:058-pip-hclk 00_16 03_15
HCLK_L.HCLK_LEAF_CLK_B_BOTL1.HCLK_CK_OUTIN_L0 origin:058-pip-hclk 02_14 03_16
HCLK_L.HCLK_LEAF_CLK_B_BOTL1.HCLK_CK_OUTIN_L1 origin:058-pip-hclk 03_16 05_14
HCLK_L.HCLK_LEAF_CLK_B_BOTL1.HCLK_CK_OUTIN_L2 origin:058-pip-hclk 02_15 03_16
@ -34,14 +26,14 @@ HCLK_L.HCLK_LEAF_CLK_B_BOTL1.HCLK_CK_OUTIN_L4 origin:058-pip-hclk 02_14 05_16
HCLK_L.HCLK_LEAF_CLK_B_BOTL1.HCLK_CK_OUTIN_L5 origin:058-pip-hclk 05_14 05_16
HCLK_L.HCLK_LEAF_CLK_B_BOTL1.HCLK_CK_OUTIN_L6 origin:058-pip-hclk 02_15 05_16
HCLK_L.HCLK_LEAF_CLK_B_BOTL1.HCLK_CK_OUTIN_L7 origin:058-pip-hclk 05_15 05_16
HCLK_L.HCLK_LEAF_CLK_B_BOTL2.HCLK_CK_BUFHCLK10 origin:058-pip-hclk 00_17 05_18
HCLK_L.HCLK_LEAF_CLK_B_BOTL2.HCLK_CK_BUFHCLK11 origin:058-pip-hclk 00_17 02_18
HCLK_L.HCLK_LEAF_CLK_B_BOTL2.HCLK_CK_BUFHCLK8 origin:058-pip-hclk 00_17 05_19
HCLK_L.HCLK_LEAF_CLK_B_BOTL2.HCLK_CK_BUFHCLK9 origin:058-pip-hclk 00_17 02_19
HCLK_L.HCLK_LEAF_CLK_B_BOTL2.HCLK_CK_BUFRCLK0 origin:058-pip-hclk 01_16 05_19
HCLK_L.HCLK_LEAF_CLK_B_BOTL2.HCLK_CK_BUFRCLK1 origin:058-pip-hclk 01_16 02_19
HCLK_L.HCLK_LEAF_CLK_B_BOTL2.HCLK_CK_BUFRCLK2 origin:058-pip-hclk 01_16 05_18
HCLK_L.HCLK_LEAF_CLK_B_BOTL2.HCLK_CK_BUFRCLK3 origin:058-pip-hclk 01_16 02_18
HCLK_L.HCLK_LEAF_CLK_B_BOTL1.HCLK_CK_BUFHCLK8 origin:058-pip-hclk 02_14 04_16
HCLK_L.HCLK_LEAF_CLK_B_BOTL1.HCLK_CK_BUFHCLK9 origin:058-pip-hclk 04_16 05_14
HCLK_L.HCLK_LEAF_CLK_B_BOTL1.HCLK_CK_BUFHCLK10 origin:058-pip-hclk 02_15 04_16
HCLK_L.HCLK_LEAF_CLK_B_BOTL1.HCLK_CK_BUFHCLK11 origin:058-pip-hclk 04_16 05_15
HCLK_L.HCLK_LEAF_CLK_B_BOTL1.HCLK_CK_BUFRCLK0 origin:058-pip-hclk 02_14 02_16
HCLK_L.HCLK_LEAF_CLK_B_BOTL1.HCLK_CK_BUFRCLK1 origin:058-pip-hclk 02_16 05_14
HCLK_L.HCLK_LEAF_CLK_B_BOTL1.HCLK_CK_BUFRCLK2 origin:058-pip-hclk 02_15 02_16
HCLK_L.HCLK_LEAF_CLK_B_BOTL1.HCLK_CK_BUFRCLK3 origin:058-pip-hclk 02_16 05_15
HCLK_L.HCLK_LEAF_CLK_B_BOTL2.HCLK_CK_OUTIN_L0 origin:058-pip-hclk 00_18 05_19
HCLK_L.HCLK_LEAF_CLK_B_BOTL2.HCLK_CK_OUTIN_L1 origin:058-pip-hclk 00_18 02_19
HCLK_L.HCLK_LEAF_CLK_B_BOTL2.HCLK_CK_OUTIN_L2 origin:058-pip-hclk 00_18 05_18
@ -50,14 +42,14 @@ HCLK_L.HCLK_LEAF_CLK_B_BOTL2.HCLK_CK_OUTIN_L4 origin:058-pip-hclk 01_17 05_19
HCLK_L.HCLK_LEAF_CLK_B_BOTL2.HCLK_CK_OUTIN_L5 origin:058-pip-hclk 01_17 02_19
HCLK_L.HCLK_LEAF_CLK_B_BOTL2.HCLK_CK_OUTIN_L6 origin:058-pip-hclk 01_17 05_18
HCLK_L.HCLK_LEAF_CLK_B_BOTL2.HCLK_CK_OUTIN_L7 origin:058-pip-hclk 01_17 02_18
HCLK_L.HCLK_LEAF_CLK_B_BOTL3.HCLK_CK_BUFHCLK10 origin:058-pip-hclk 03_18 05_17
HCLK_L.HCLK_LEAF_CLK_B_BOTL3.HCLK_CK_BUFHCLK11 origin:058-pip-hclk 04_18 05_17
HCLK_L.HCLK_LEAF_CLK_B_BOTL3.HCLK_CK_BUFHCLK8 origin:058-pip-hclk 03_19 05_17
HCLK_L.HCLK_LEAF_CLK_B_BOTL3.HCLK_CK_BUFHCLK9 origin:058-pip-hclk 04_19 05_17
HCLK_L.HCLK_LEAF_CLK_B_BOTL3.HCLK_CK_BUFRCLK0 origin:058-pip-hclk 03_17 03_19
HCLK_L.HCLK_LEAF_CLK_B_BOTL3.HCLK_CK_BUFRCLK1 origin:058-pip-hclk 03_17 04_19
HCLK_L.HCLK_LEAF_CLK_B_BOTL3.HCLK_CK_BUFRCLK2 origin:058-pip-hclk 03_17 03_18
HCLK_L.HCLK_LEAF_CLK_B_BOTL3.HCLK_CK_BUFRCLK3 origin:058-pip-hclk 03_17 04_18
HCLK_L.HCLK_LEAF_CLK_B_BOTL2.HCLK_CK_BUFHCLK8 origin:058-pip-hclk 00_17 05_19
HCLK_L.HCLK_LEAF_CLK_B_BOTL2.HCLK_CK_BUFHCLK9 origin:058-pip-hclk 00_17 02_19
HCLK_L.HCLK_LEAF_CLK_B_BOTL2.HCLK_CK_BUFHCLK10 origin:058-pip-hclk 00_17 05_18
HCLK_L.HCLK_LEAF_CLK_B_BOTL2.HCLK_CK_BUFHCLK11 origin:058-pip-hclk 00_17 02_18
HCLK_L.HCLK_LEAF_CLK_B_BOTL2.HCLK_CK_BUFRCLK0 origin:058-pip-hclk 01_16 05_19
HCLK_L.HCLK_LEAF_CLK_B_BOTL2.HCLK_CK_BUFRCLK1 origin:058-pip-hclk 01_16 02_19
HCLK_L.HCLK_LEAF_CLK_B_BOTL2.HCLK_CK_BUFRCLK2 origin:058-pip-hclk 01_16 05_18
HCLK_L.HCLK_LEAF_CLK_B_BOTL2.HCLK_CK_BUFRCLK3 origin:058-pip-hclk 01_16 02_18
HCLK_L.HCLK_LEAF_CLK_B_BOTL3.HCLK_CK_OUTIN_L0 origin:058-pip-hclk 02_17 03_19
HCLK_L.HCLK_LEAF_CLK_B_BOTL3.HCLK_CK_OUTIN_L1 origin:058-pip-hclk 02_17 04_19
HCLK_L.HCLK_LEAF_CLK_B_BOTL3.HCLK_CK_OUTIN_L2 origin:058-pip-hclk 02_17 03_18
@ -66,14 +58,14 @@ HCLK_L.HCLK_LEAF_CLK_B_BOTL3.HCLK_CK_OUTIN_L4 origin:058-pip-hclk 03_19 04_17
HCLK_L.HCLK_LEAF_CLK_B_BOTL3.HCLK_CK_OUTIN_L5 origin:058-pip-hclk 04_17 04_19
HCLK_L.HCLK_LEAF_CLK_B_BOTL3.HCLK_CK_OUTIN_L6 origin:058-pip-hclk 03_18 04_17
HCLK_L.HCLK_LEAF_CLK_B_BOTL3.HCLK_CK_OUTIN_L7 origin:058-pip-hclk 04_17 04_18
HCLK_L.HCLK_LEAF_CLK_B_BOTL4.HCLK_CK_BUFHCLK10 origin:058-pip-hclk 00_21 04_21
HCLK_L.HCLK_LEAF_CLK_B_BOTL4.HCLK_CK_BUFHCLK11 origin:058-pip-hclk 00_21 03_21
HCLK_L.HCLK_LEAF_CLK_B_BOTL4.HCLK_CK_BUFHCLK8 origin:058-pip-hclk 00_21 04_20
HCLK_L.HCLK_LEAF_CLK_B_BOTL4.HCLK_CK_BUFHCLK9 origin:058-pip-hclk 00_21 03_20
HCLK_L.HCLK_LEAF_CLK_B_BOTL4.HCLK_CK_BUFRCLK0 origin:058-pip-hclk 01_21 04_20
HCLK_L.HCLK_LEAF_CLK_B_BOTL4.HCLK_CK_BUFRCLK1 origin:058-pip-hclk 01_21 03_20
HCLK_L.HCLK_LEAF_CLK_B_BOTL4.HCLK_CK_BUFRCLK2 origin:058-pip-hclk 01_21 04_21
HCLK_L.HCLK_LEAF_CLK_B_BOTL4.HCLK_CK_BUFRCLK3 origin:058-pip-hclk 01_21 03_21
HCLK_L.HCLK_LEAF_CLK_B_BOTL3.HCLK_CK_BUFHCLK8 origin:058-pip-hclk 03_19 05_17
HCLK_L.HCLK_LEAF_CLK_B_BOTL3.HCLK_CK_BUFHCLK9 origin:058-pip-hclk 04_19 05_17
HCLK_L.HCLK_LEAF_CLK_B_BOTL3.HCLK_CK_BUFHCLK10 origin:058-pip-hclk 03_18 05_17
HCLK_L.HCLK_LEAF_CLK_B_BOTL3.HCLK_CK_BUFHCLK11 origin:058-pip-hclk 04_18 05_17
HCLK_L.HCLK_LEAF_CLK_B_BOTL3.HCLK_CK_BUFRCLK0 origin:058-pip-hclk 03_17 03_19
HCLK_L.HCLK_LEAF_CLK_B_BOTL3.HCLK_CK_BUFRCLK1 origin:058-pip-hclk 03_17 04_19
HCLK_L.HCLK_LEAF_CLK_B_BOTL3.HCLK_CK_BUFRCLK2 origin:058-pip-hclk 03_17 03_18
HCLK_L.HCLK_LEAF_CLK_B_BOTL3.HCLK_CK_BUFRCLK3 origin:058-pip-hclk 03_17 04_18
HCLK_L.HCLK_LEAF_CLK_B_BOTL4.HCLK_CK_OUTIN_L0 origin:058-pip-hclk 00_20 04_20
HCLK_L.HCLK_LEAF_CLK_B_BOTL4.HCLK_CK_OUTIN_L1 origin:058-pip-hclk 00_20 03_20
HCLK_L.HCLK_LEAF_CLK_B_BOTL4.HCLK_CK_OUTIN_L2 origin:058-pip-hclk 00_20 04_21
@ -82,14 +74,14 @@ HCLK_L.HCLK_LEAF_CLK_B_BOTL4.HCLK_CK_OUTIN_L4 origin:058-pip-hclk 01_20 04_20
HCLK_L.HCLK_LEAF_CLK_B_BOTL4.HCLK_CK_OUTIN_L5 origin:058-pip-hclk 01_20 03_20
HCLK_L.HCLK_LEAF_CLK_B_BOTL4.HCLK_CK_OUTIN_L6 origin:058-pip-hclk 01_20 04_21
HCLK_L.HCLK_LEAF_CLK_B_BOTL4.HCLK_CK_OUTIN_L7 origin:058-pip-hclk 01_20 03_21
HCLK_L.HCLK_LEAF_CLK_B_BOTL5.HCLK_CK_BUFHCLK10 origin:058-pip-hclk 02_21 04_22
HCLK_L.HCLK_LEAF_CLK_B_BOTL5.HCLK_CK_BUFHCLK11 origin:058-pip-hclk 04_22 05_21
HCLK_L.HCLK_LEAF_CLK_B_BOTL5.HCLK_CK_BUFHCLK8 origin:058-pip-hclk 02_20 04_22
HCLK_L.HCLK_LEAF_CLK_B_BOTL5.HCLK_CK_BUFHCLK9 origin:058-pip-hclk 04_22 05_20
HCLK_L.HCLK_LEAF_CLK_B_BOTL5.HCLK_CK_BUFRCLK0 origin:058-pip-hclk 02_20 02_22
HCLK_L.HCLK_LEAF_CLK_B_BOTL5.HCLK_CK_BUFRCLK1 origin:058-pip-hclk 02_22 05_20
HCLK_L.HCLK_LEAF_CLK_B_BOTL5.HCLK_CK_BUFRCLK2 origin:058-pip-hclk 02_21 02_22
HCLK_L.HCLK_LEAF_CLK_B_BOTL5.HCLK_CK_BUFRCLK3 origin:058-pip-hclk 02_22 05_21
HCLK_L.HCLK_LEAF_CLK_B_BOTL4.HCLK_CK_BUFHCLK8 origin:058-pip-hclk 00_21 04_20
HCLK_L.HCLK_LEAF_CLK_B_BOTL4.HCLK_CK_BUFHCLK9 origin:058-pip-hclk 00_21 03_20
HCLK_L.HCLK_LEAF_CLK_B_BOTL4.HCLK_CK_BUFHCLK10 origin:058-pip-hclk 00_21 04_21
HCLK_L.HCLK_LEAF_CLK_B_BOTL4.HCLK_CK_BUFHCLK11 origin:058-pip-hclk 00_21 03_21
HCLK_L.HCLK_LEAF_CLK_B_BOTL4.HCLK_CK_BUFRCLK0 origin:058-pip-hclk 01_21 04_20
HCLK_L.HCLK_LEAF_CLK_B_BOTL4.HCLK_CK_BUFRCLK1 origin:058-pip-hclk 01_21 03_20
HCLK_L.HCLK_LEAF_CLK_B_BOTL4.HCLK_CK_BUFRCLK2 origin:058-pip-hclk 01_21 04_21
HCLK_L.HCLK_LEAF_CLK_B_BOTL4.HCLK_CK_BUFRCLK3 origin:058-pip-hclk 01_21 03_21
HCLK_L.HCLK_LEAF_CLK_B_BOTL5.HCLK_CK_OUTIN_L0 origin:058-pip-hclk 02_20 03_22
HCLK_L.HCLK_LEAF_CLK_B_BOTL5.HCLK_CK_OUTIN_L1 origin:058-pip-hclk 03_22 05_20
HCLK_L.HCLK_LEAF_CLK_B_BOTL5.HCLK_CK_OUTIN_L2 origin:058-pip-hclk 02_21 03_22
@ -98,14 +90,14 @@ HCLK_L.HCLK_LEAF_CLK_B_BOTL5.HCLK_CK_OUTIN_L4 origin:058-pip-hclk 02_20 05_22
HCLK_L.HCLK_LEAF_CLK_B_BOTL5.HCLK_CK_OUTIN_L5 origin:058-pip-hclk 05_20 05_22
HCLK_L.HCLK_LEAF_CLK_B_BOTL5.HCLK_CK_OUTIN_L6 origin:058-pip-hclk 02_21 05_22
HCLK_L.HCLK_LEAF_CLK_B_BOTL5.HCLK_CK_OUTIN_L7 origin:058-pip-hclk 05_21 05_22
HCLK_L.HCLK_LEAF_CLK_B_TOPL0.HCLK_CK_BUFHCLK10 origin:058-pip-hclk 01_29 05_30
HCLK_L.HCLK_LEAF_CLK_B_TOPL0.HCLK_CK_BUFHCLK11 origin:058-pip-hclk 01_29 02_30
HCLK_L.HCLK_LEAF_CLK_B_TOPL0.HCLK_CK_BUFHCLK8 origin:058-pip-hclk 01_29 05_31
HCLK_L.HCLK_LEAF_CLK_B_TOPL0.HCLK_CK_BUFHCLK9 origin:058-pip-hclk 01_29 02_31
HCLK_L.HCLK_LEAF_CLK_B_TOPL0.HCLK_CK_BUFRCLK0 origin:058-pip-hclk 00_29 05_31
HCLK_L.HCLK_LEAF_CLK_B_TOPL0.HCLK_CK_BUFRCLK1 origin:058-pip-hclk 00_29 02_31
HCLK_L.HCLK_LEAF_CLK_B_TOPL0.HCLK_CK_BUFRCLK2 origin:058-pip-hclk 00_29 05_30
HCLK_L.HCLK_LEAF_CLK_B_TOPL0.HCLK_CK_BUFRCLK3 origin:058-pip-hclk 00_29 02_30
HCLK_L.HCLK_LEAF_CLK_B_BOTL5.HCLK_CK_BUFHCLK8 origin:058-pip-hclk 02_20 04_22
HCLK_L.HCLK_LEAF_CLK_B_BOTL5.HCLK_CK_BUFHCLK9 origin:058-pip-hclk 04_22 05_20
HCLK_L.HCLK_LEAF_CLK_B_BOTL5.HCLK_CK_BUFHCLK10 origin:058-pip-hclk 02_21 04_22
HCLK_L.HCLK_LEAF_CLK_B_BOTL5.HCLK_CK_BUFHCLK11 origin:058-pip-hclk 04_22 05_21
HCLK_L.HCLK_LEAF_CLK_B_BOTL5.HCLK_CK_BUFRCLK0 origin:058-pip-hclk 02_20 02_22
HCLK_L.HCLK_LEAF_CLK_B_BOTL5.HCLK_CK_BUFRCLK1 origin:058-pip-hclk 02_22 05_20
HCLK_L.HCLK_LEAF_CLK_B_BOTL5.HCLK_CK_BUFRCLK2 origin:058-pip-hclk 02_21 02_22
HCLK_L.HCLK_LEAF_CLK_B_BOTL5.HCLK_CK_BUFRCLK3 origin:058-pip-hclk 02_22 05_21
HCLK_L.HCLK_LEAF_CLK_B_TOPL0.HCLK_CK_OUTIN_L0 origin:058-pip-hclk 01_30 05_31
HCLK_L.HCLK_LEAF_CLK_B_TOPL0.HCLK_CK_OUTIN_L1 origin:058-pip-hclk 01_30 02_31
HCLK_L.HCLK_LEAF_CLK_B_TOPL0.HCLK_CK_OUTIN_L2 origin:058-pip-hclk 01_30 05_30
@ -114,14 +106,14 @@ HCLK_L.HCLK_LEAF_CLK_B_TOPL0.HCLK_CK_OUTIN_L4 origin:058-pip-hclk 00_30 05_31
HCLK_L.HCLK_LEAF_CLK_B_TOPL0.HCLK_CK_OUTIN_L5 origin:058-pip-hclk 00_30 02_31
HCLK_L.HCLK_LEAF_CLK_B_TOPL0.HCLK_CK_OUTIN_L6 origin:058-pip-hclk 00_30 05_30
HCLK_L.HCLK_LEAF_CLK_B_TOPL0.HCLK_CK_OUTIN_L7 origin:058-pip-hclk 00_30 02_30
HCLK_L.HCLK_LEAF_CLK_B_TOPL1.HCLK_CK_BUFHCLK10 origin:058-pip-hclk 03_30 05_29
HCLK_L.HCLK_LEAF_CLK_B_TOPL1.HCLK_CK_BUFHCLK11 origin:058-pip-hclk 04_30 05_29
HCLK_L.HCLK_LEAF_CLK_B_TOPL1.HCLK_CK_BUFHCLK8 origin:058-pip-hclk 03_31 05_29
HCLK_L.HCLK_LEAF_CLK_B_TOPL1.HCLK_CK_BUFHCLK9 origin:058-pip-hclk 04_31 05_29
HCLK_L.HCLK_LEAF_CLK_B_TOPL1.HCLK_CK_BUFRCLK0 origin:058-pip-hclk 03_29 03_31
HCLK_L.HCLK_LEAF_CLK_B_TOPL1.HCLK_CK_BUFRCLK1 origin:058-pip-hclk 03_29 04_31
HCLK_L.HCLK_LEAF_CLK_B_TOPL1.HCLK_CK_BUFRCLK2 origin:058-pip-hclk 03_29 03_30
HCLK_L.HCLK_LEAF_CLK_B_TOPL1.HCLK_CK_BUFRCLK3 origin:058-pip-hclk 03_29 04_30
HCLK_L.HCLK_LEAF_CLK_B_TOPL0.HCLK_CK_BUFHCLK8 origin:058-pip-hclk 01_29 05_31
HCLK_L.HCLK_LEAF_CLK_B_TOPL0.HCLK_CK_BUFHCLK9 origin:058-pip-hclk 01_29 02_31
HCLK_L.HCLK_LEAF_CLK_B_TOPL0.HCLK_CK_BUFHCLK10 origin:058-pip-hclk 01_29 05_30
HCLK_L.HCLK_LEAF_CLK_B_TOPL0.HCLK_CK_BUFHCLK11 origin:058-pip-hclk 01_29 02_30
HCLK_L.HCLK_LEAF_CLK_B_TOPL0.HCLK_CK_BUFRCLK0 origin:058-pip-hclk 00_29 05_31
HCLK_L.HCLK_LEAF_CLK_B_TOPL0.HCLK_CK_BUFRCLK1 origin:058-pip-hclk 00_29 02_31
HCLK_L.HCLK_LEAF_CLK_B_TOPL0.HCLK_CK_BUFRCLK2 origin:058-pip-hclk 00_29 05_30
HCLK_L.HCLK_LEAF_CLK_B_TOPL0.HCLK_CK_BUFRCLK3 origin:058-pip-hclk 00_29 02_30
HCLK_L.HCLK_LEAF_CLK_B_TOPL1.HCLK_CK_OUTIN_L0 origin:058-pip-hclk 02_29 03_31
HCLK_L.HCLK_LEAF_CLK_B_TOPL1.HCLK_CK_OUTIN_L1 origin:058-pip-hclk 02_29 04_31
HCLK_L.HCLK_LEAF_CLK_B_TOPL1.HCLK_CK_OUTIN_L2 origin:058-pip-hclk 02_29 03_30
@ -130,14 +122,14 @@ HCLK_L.HCLK_LEAF_CLK_B_TOPL1.HCLK_CK_OUTIN_L4 origin:058-pip-hclk 03_31 04_29
HCLK_L.HCLK_LEAF_CLK_B_TOPL1.HCLK_CK_OUTIN_L5 origin:058-pip-hclk 04_29 04_31
HCLK_L.HCLK_LEAF_CLK_B_TOPL1.HCLK_CK_OUTIN_L6 origin:058-pip-hclk 03_30 04_29
HCLK_L.HCLK_LEAF_CLK_B_TOPL1.HCLK_CK_OUTIN_L7 origin:058-pip-hclk 04_29 04_30
HCLK_L.HCLK_LEAF_CLK_B_TOPL2.HCLK_CK_BUFHCLK10 origin:058-pip-hclk 00_28 04_27
HCLK_L.HCLK_LEAF_CLK_B_TOPL2.HCLK_CK_BUFHCLK11 origin:058-pip-hclk 00_28 03_27
HCLK_L.HCLK_LEAF_CLK_B_TOPL2.HCLK_CK_BUFHCLK8 origin:058-pip-hclk 00_28 04_26
HCLK_L.HCLK_LEAF_CLK_B_TOPL2.HCLK_CK_BUFHCLK9 origin:058-pip-hclk 00_28 03_26
HCLK_L.HCLK_LEAF_CLK_B_TOPL2.HCLK_CK_BUFRCLK0 origin:058-pip-hclk 01_28 04_26
HCLK_L.HCLK_LEAF_CLK_B_TOPL2.HCLK_CK_BUFRCLK1 origin:058-pip-hclk 01_28 03_26
HCLK_L.HCLK_LEAF_CLK_B_TOPL2.HCLK_CK_BUFRCLK2 origin:058-pip-hclk 01_28 04_27
HCLK_L.HCLK_LEAF_CLK_B_TOPL2.HCLK_CK_BUFRCLK3 origin:058-pip-hclk 01_28 03_27
HCLK_L.HCLK_LEAF_CLK_B_TOPL1.HCLK_CK_BUFHCLK8 origin:058-pip-hclk 03_31 05_29
HCLK_L.HCLK_LEAF_CLK_B_TOPL1.HCLK_CK_BUFHCLK9 origin:058-pip-hclk 04_31 05_29
HCLK_L.HCLK_LEAF_CLK_B_TOPL1.HCLK_CK_BUFHCLK10 origin:058-pip-hclk 03_30 05_29
HCLK_L.HCLK_LEAF_CLK_B_TOPL1.HCLK_CK_BUFHCLK11 origin:058-pip-hclk 04_30 05_29
HCLK_L.HCLK_LEAF_CLK_B_TOPL1.HCLK_CK_BUFRCLK0 origin:058-pip-hclk 03_29 03_31
HCLK_L.HCLK_LEAF_CLK_B_TOPL1.HCLK_CK_BUFRCLK1 origin:058-pip-hclk 03_29 04_31
HCLK_L.HCLK_LEAF_CLK_B_TOPL1.HCLK_CK_BUFRCLK2 origin:058-pip-hclk 03_29 03_30
HCLK_L.HCLK_LEAF_CLK_B_TOPL1.HCLK_CK_BUFRCLK3 origin:058-pip-hclk 03_29 04_30
HCLK_L.HCLK_LEAF_CLK_B_TOPL2.HCLK_CK_OUTIN_L0 origin:058-pip-hclk 00_26 04_26
HCLK_L.HCLK_LEAF_CLK_B_TOPL2.HCLK_CK_OUTIN_L1 origin:058-pip-hclk 00_26 03_26
HCLK_L.HCLK_LEAF_CLK_B_TOPL2.HCLK_CK_OUTIN_L2 origin:058-pip-hclk 00_26 04_27
@ -146,14 +138,14 @@ HCLK_L.HCLK_LEAF_CLK_B_TOPL2.HCLK_CK_OUTIN_L4 origin:058-pip-hclk 01_26 04_26
HCLK_L.HCLK_LEAF_CLK_B_TOPL2.HCLK_CK_OUTIN_L5 origin:058-pip-hclk 01_26 03_26
HCLK_L.HCLK_LEAF_CLK_B_TOPL2.HCLK_CK_OUTIN_L6 origin:058-pip-hclk 01_26 04_27
HCLK_L.HCLK_LEAF_CLK_B_TOPL2.HCLK_CK_OUTIN_L7 origin:058-pip-hclk 01_26 03_27
HCLK_L.HCLK_LEAF_CLK_B_TOPL3.HCLK_CK_BUFHCLK10 origin:058-pip-hclk 02_27 04_28
HCLK_L.HCLK_LEAF_CLK_B_TOPL3.HCLK_CK_BUFHCLK11 origin:058-pip-hclk 04_28 05_27
HCLK_L.HCLK_LEAF_CLK_B_TOPL3.HCLK_CK_BUFHCLK8 origin:058-pip-hclk 02_26 04_28
HCLK_L.HCLK_LEAF_CLK_B_TOPL3.HCLK_CK_BUFHCLK9 origin:058-pip-hclk 04_28 05_26
HCLK_L.HCLK_LEAF_CLK_B_TOPL3.HCLK_CK_BUFRCLK0 origin:058-pip-hclk 02_26 02_28
HCLK_L.HCLK_LEAF_CLK_B_TOPL3.HCLK_CK_BUFRCLK1 origin:058-pip-hclk 02_28 05_26
HCLK_L.HCLK_LEAF_CLK_B_TOPL3.HCLK_CK_BUFRCLK2 origin:058-pip-hclk 02_27 02_28
HCLK_L.HCLK_LEAF_CLK_B_TOPL3.HCLK_CK_BUFRCLK3 origin:058-pip-hclk 02_28 05_27
HCLK_L.HCLK_LEAF_CLK_B_TOPL2.HCLK_CK_BUFHCLK8 origin:058-pip-hclk 00_28 04_26
HCLK_L.HCLK_LEAF_CLK_B_TOPL2.HCLK_CK_BUFHCLK9 origin:058-pip-hclk 00_28 03_26
HCLK_L.HCLK_LEAF_CLK_B_TOPL2.HCLK_CK_BUFHCLK10 origin:058-pip-hclk 00_28 04_27
HCLK_L.HCLK_LEAF_CLK_B_TOPL2.HCLK_CK_BUFHCLK11 origin:058-pip-hclk 00_28 03_27
HCLK_L.HCLK_LEAF_CLK_B_TOPL2.HCLK_CK_BUFRCLK0 origin:058-pip-hclk 01_28 04_26
HCLK_L.HCLK_LEAF_CLK_B_TOPL2.HCLK_CK_BUFRCLK1 origin:058-pip-hclk 01_28 03_26
HCLK_L.HCLK_LEAF_CLK_B_TOPL2.HCLK_CK_BUFRCLK2 origin:058-pip-hclk 01_28 04_27
HCLK_L.HCLK_LEAF_CLK_B_TOPL2.HCLK_CK_BUFRCLK3 origin:058-pip-hclk 01_28 03_27
HCLK_L.HCLK_LEAF_CLK_B_TOPL3.HCLK_CK_OUTIN_L0 origin:058-pip-hclk 02_26 03_28
HCLK_L.HCLK_LEAF_CLK_B_TOPL3.HCLK_CK_OUTIN_L1 origin:058-pip-hclk 03_28 05_26
HCLK_L.HCLK_LEAF_CLK_B_TOPL3.HCLK_CK_OUTIN_L2 origin:058-pip-hclk 02_27 03_28
@ -162,14 +154,14 @@ HCLK_L.HCLK_LEAF_CLK_B_TOPL3.HCLK_CK_OUTIN_L4 origin:058-pip-hclk 02_26 05_28
HCLK_L.HCLK_LEAF_CLK_B_TOPL3.HCLK_CK_OUTIN_L5 origin:058-pip-hclk 05_26 05_28
HCLK_L.HCLK_LEAF_CLK_B_TOPL3.HCLK_CK_OUTIN_L6 origin:058-pip-hclk 02_27 05_28
HCLK_L.HCLK_LEAF_CLK_B_TOPL3.HCLK_CK_OUTIN_L7 origin:058-pip-hclk 05_27 05_28
HCLK_L.HCLK_LEAF_CLK_B_TOPL4.HCLK_CK_BUFHCLK10 origin:058-pip-hclk 01_24 05_24
HCLK_L.HCLK_LEAF_CLK_B_TOPL4.HCLK_CK_BUFHCLK11 origin:058-pip-hclk 01_24 02_24
HCLK_L.HCLK_LEAF_CLK_B_TOPL4.HCLK_CK_BUFHCLK8 origin:058-pip-hclk 01_24 05_25
HCLK_L.HCLK_LEAF_CLK_B_TOPL4.HCLK_CK_BUFHCLK9 origin:058-pip-hclk 01_24 02_25
HCLK_L.HCLK_LEAF_CLK_B_TOPL4.HCLK_CK_BUFRCLK0 origin:058-pip-hclk 00_24 05_25
HCLK_L.HCLK_LEAF_CLK_B_TOPL4.HCLK_CK_BUFRCLK1 origin:058-pip-hclk 00_24 02_25
HCLK_L.HCLK_LEAF_CLK_B_TOPL4.HCLK_CK_BUFRCLK2 origin:058-pip-hclk 00_24 05_24
HCLK_L.HCLK_LEAF_CLK_B_TOPL4.HCLK_CK_BUFRCLK3 origin:058-pip-hclk 00_24 02_24
HCLK_L.HCLK_LEAF_CLK_B_TOPL3.HCLK_CK_BUFHCLK8 origin:058-pip-hclk 02_26 04_28
HCLK_L.HCLK_LEAF_CLK_B_TOPL3.HCLK_CK_BUFHCLK9 origin:058-pip-hclk 04_28 05_26
HCLK_L.HCLK_LEAF_CLK_B_TOPL3.HCLK_CK_BUFHCLK10 origin:058-pip-hclk 02_27 04_28
HCLK_L.HCLK_LEAF_CLK_B_TOPL3.HCLK_CK_BUFHCLK11 origin:058-pip-hclk 04_28 05_27
HCLK_L.HCLK_LEAF_CLK_B_TOPL3.HCLK_CK_BUFRCLK0 origin:058-pip-hclk 02_26 02_28
HCLK_L.HCLK_LEAF_CLK_B_TOPL3.HCLK_CK_BUFRCLK1 origin:058-pip-hclk 02_28 05_26
HCLK_L.HCLK_LEAF_CLK_B_TOPL3.HCLK_CK_BUFRCLK2 origin:058-pip-hclk 02_27 02_28
HCLK_L.HCLK_LEAF_CLK_B_TOPL3.HCLK_CK_BUFRCLK3 origin:058-pip-hclk 02_28 05_27
HCLK_L.HCLK_LEAF_CLK_B_TOPL4.HCLK_CK_OUTIN_L0 origin:058-pip-hclk 01_25 05_25
HCLK_L.HCLK_LEAF_CLK_B_TOPL4.HCLK_CK_OUTIN_L1 origin:058-pip-hclk 01_25 02_25
HCLK_L.HCLK_LEAF_CLK_B_TOPL4.HCLK_CK_OUTIN_L2 origin:058-pip-hclk 01_25 05_24
@ -178,14 +170,14 @@ HCLK_L.HCLK_LEAF_CLK_B_TOPL4.HCLK_CK_OUTIN_L4 origin:058-pip-hclk 00_25 05_25
HCLK_L.HCLK_LEAF_CLK_B_TOPL4.HCLK_CK_OUTIN_L5 origin:058-pip-hclk 00_25 02_25
HCLK_L.HCLK_LEAF_CLK_B_TOPL4.HCLK_CK_OUTIN_L6 origin:058-pip-hclk 00_25 05_24
HCLK_L.HCLK_LEAF_CLK_B_TOPL4.HCLK_CK_OUTIN_L7 origin:058-pip-hclk 00_25 02_24
HCLK_L.HCLK_LEAF_CLK_B_TOPL5.HCLK_CK_BUFHCLK10 origin:058-pip-hclk 03_24 05_23
HCLK_L.HCLK_LEAF_CLK_B_TOPL5.HCLK_CK_BUFHCLK11 origin:058-pip-hclk 04_24 05_23
HCLK_L.HCLK_LEAF_CLK_B_TOPL5.HCLK_CK_BUFHCLK8 origin:058-pip-hclk 03_25 05_23
HCLK_L.HCLK_LEAF_CLK_B_TOPL5.HCLK_CK_BUFHCLK9 origin:058-pip-hclk 04_25 05_23
HCLK_L.HCLK_LEAF_CLK_B_TOPL5.HCLK_CK_BUFRCLK0 origin:058-pip-hclk 03_23 03_25
HCLK_L.HCLK_LEAF_CLK_B_TOPL5.HCLK_CK_BUFRCLK1 origin:058-pip-hclk 03_23 04_25
HCLK_L.HCLK_LEAF_CLK_B_TOPL5.HCLK_CK_BUFRCLK2 origin:058-pip-hclk 03_23 03_24
HCLK_L.HCLK_LEAF_CLK_B_TOPL5.HCLK_CK_BUFRCLK3 origin:058-pip-hclk 03_23 04_24
HCLK_L.HCLK_LEAF_CLK_B_TOPL4.HCLK_CK_BUFHCLK8 origin:058-pip-hclk 01_24 05_25
HCLK_L.HCLK_LEAF_CLK_B_TOPL4.HCLK_CK_BUFHCLK9 origin:058-pip-hclk 01_24 02_25
HCLK_L.HCLK_LEAF_CLK_B_TOPL4.HCLK_CK_BUFHCLK10 origin:058-pip-hclk 01_24 05_24
HCLK_L.HCLK_LEAF_CLK_B_TOPL4.HCLK_CK_BUFHCLK11 origin:058-pip-hclk 01_24 02_24
HCLK_L.HCLK_LEAF_CLK_B_TOPL4.HCLK_CK_BUFRCLK0 origin:058-pip-hclk 00_24 05_25
HCLK_L.HCLK_LEAF_CLK_B_TOPL4.HCLK_CK_BUFRCLK1 origin:058-pip-hclk 00_24 02_25
HCLK_L.HCLK_LEAF_CLK_B_TOPL4.HCLK_CK_BUFRCLK2 origin:058-pip-hclk 00_24 05_24
HCLK_L.HCLK_LEAF_CLK_B_TOPL4.HCLK_CK_BUFRCLK3 origin:058-pip-hclk 00_24 02_24
HCLK_L.HCLK_LEAF_CLK_B_TOPL5.HCLK_CK_OUTIN_L0 origin:058-pip-hclk 02_23 03_25
HCLK_L.HCLK_LEAF_CLK_B_TOPL5.HCLK_CK_OUTIN_L1 origin:058-pip-hclk 02_23 04_25
HCLK_L.HCLK_LEAF_CLK_B_TOPL5.HCLK_CK_OUTIN_L2 origin:058-pip-hclk 02_23 03_24
@ -194,3 +186,11 @@ HCLK_L.HCLK_LEAF_CLK_B_TOPL5.HCLK_CK_OUTIN_L4 origin:058-pip-hclk 03_25 04_23
HCLK_L.HCLK_LEAF_CLK_B_TOPL5.HCLK_CK_OUTIN_L5 origin:058-pip-hclk 04_23 04_25
HCLK_L.HCLK_LEAF_CLK_B_TOPL5.HCLK_CK_OUTIN_L6 origin:058-pip-hclk 03_24 04_23
HCLK_L.HCLK_LEAF_CLK_B_TOPL5.HCLK_CK_OUTIN_L7 origin:058-pip-hclk 04_23 04_24
HCLK_L.HCLK_LEAF_CLK_B_TOPL5.HCLK_CK_BUFHCLK8 origin:058-pip-hclk 03_25 05_23
HCLK_L.HCLK_LEAF_CLK_B_TOPL5.HCLK_CK_BUFHCLK9 origin:058-pip-hclk 04_25 05_23
HCLK_L.HCLK_LEAF_CLK_B_TOPL5.HCLK_CK_BUFHCLK10 origin:058-pip-hclk 03_24 05_23
HCLK_L.HCLK_LEAF_CLK_B_TOPL5.HCLK_CK_BUFHCLK11 origin:058-pip-hclk 04_24 05_23
HCLK_L.HCLK_LEAF_CLK_B_TOPL5.HCLK_CK_BUFRCLK0 origin:058-pip-hclk 03_23 03_25
HCLK_L.HCLK_LEAF_CLK_B_TOPL5.HCLK_CK_BUFRCLK1 origin:058-pip-hclk 03_23 04_25
HCLK_L.HCLK_LEAF_CLK_B_TOPL5.HCLK_CK_BUFRCLK2 origin:058-pip-hclk 03_23 03_24
HCLK_L.HCLK_LEAF_CLK_B_TOPL5.HCLK_CK_BUFRCLK3 origin:058-pip-hclk 03_23 04_24

192
artix7/segbits_hclk_r.origin_info.db
View File

@ -6,14 +6,6 @@ HCLK_R.ENABLE_BUFFER.HCLK_CK_BUFHCLK4 origin:058-pip-hclk 00_23
HCLK_R.ENABLE_BUFFER.HCLK_CK_BUFHCLK5 origin:058-pip-hclk 01_23
HCLK_R.ENABLE_BUFFER.HCLK_CK_BUFHCLK6 origin:058-pip-hclk 00_31
HCLK_R.ENABLE_BUFFER.HCLK_CK_BUFHCLK7 origin:058-pip-hclk 01_31
HCLK_R.HCLK_LEAF_CLK_B_BOT0.HCLK_CK_BUFHCLK0 origin:058-pip-hclk 01_14 04_14
HCLK_R.HCLK_LEAF_CLK_B_BOT0.HCLK_CK_BUFHCLK1 origin:058-pip-hclk 01_14 03_14
HCLK_R.HCLK_LEAF_CLK_B_BOT0.HCLK_CK_BUFHCLK2 origin:058-pip-hclk 01_14 04_15
HCLK_R.HCLK_LEAF_CLK_B_BOT0.HCLK_CK_BUFHCLK3 origin:058-pip-hclk 01_14 03_15
HCLK_R.HCLK_LEAF_CLK_B_BOT0.HCLK_CK_BUFHCLK4 origin:058-pip-hclk 00_15 04_14
HCLK_R.HCLK_LEAF_CLK_B_BOT0.HCLK_CK_BUFHCLK5 origin:058-pip-hclk 00_15 03_14
HCLK_R.HCLK_LEAF_CLK_B_BOT0.HCLK_CK_BUFHCLK6 origin:058-pip-hclk 00_15 04_15
HCLK_R.HCLK_LEAF_CLK_B_BOT0.HCLK_CK_BUFHCLK7 origin:058-pip-hclk 00_15 03_15
HCLK_R.HCLK_LEAF_CLK_B_BOT0.HCLK_CK_OUTIN_R0 origin:058-pip-hclk 00_16 04_14
HCLK_R.HCLK_LEAF_CLK_B_BOT0.HCLK_CK_OUTIN_R1 origin:058-pip-hclk 00_16 03_14
HCLK_R.HCLK_LEAF_CLK_B_BOT0.HCLK_CK_OUTIN_R2 origin:058-pip-hclk 00_16 04_15
@ -22,14 +14,14 @@ HCLK_R.HCLK_LEAF_CLK_B_BOT0.HCLK_CK_OUTIN_R4 origin:058-pip-hclk 01_15 04_14
HCLK_R.HCLK_LEAF_CLK_B_BOT0.HCLK_CK_OUTIN_R5 origin:058-pip-hclk 01_15 03_14
HCLK_R.HCLK_LEAF_CLK_B_BOT0.HCLK_CK_OUTIN_R6 origin:058-pip-hclk 01_15 04_15
HCLK_R.HCLK_LEAF_CLK_B_BOT0.HCLK_CK_OUTIN_R7 origin:058-pip-hclk 01_15 03_15
HCLK_R.HCLK_LEAF_CLK_B_BOT1.HCLK_CK_BUFHCLK0 origin:058-pip-hclk 02_14 03_16
HCLK_R.HCLK_LEAF_CLK_B_BOT1.HCLK_CK_BUFHCLK1 origin:058-pip-hclk 03_16 05_14
HCLK_R.HCLK_LEAF_CLK_B_BOT1.HCLK_CK_BUFHCLK2 origin:058-pip-hclk 02_15 03_16
HCLK_R.HCLK_LEAF_CLK_B_BOT1.HCLK_CK_BUFHCLK3 origin:058-pip-hclk 03_16 05_15
HCLK_R.HCLK_LEAF_CLK_B_BOT1.HCLK_CK_BUFHCLK4 origin:058-pip-hclk 02_14 05_16
HCLK_R.HCLK_LEAF_CLK_B_BOT1.HCLK_CK_BUFHCLK5 origin:058-pip-hclk 05_14 05_16
HCLK_R.HCLK_LEAF_CLK_B_BOT1.HCLK_CK_BUFHCLK6 origin:058-pip-hclk 02_15 05_16
HCLK_R.HCLK_LEAF_CLK_B_BOT1.HCLK_CK_BUFHCLK7 origin:058-pip-hclk 05_15 05_16
HCLK_R.HCLK_LEAF_CLK_B_BOT0.HCLK_CK_BUFHCLK0 origin:058-pip-hclk 01_14 04_14
HCLK_R.HCLK_LEAF_CLK_B_BOT0.HCLK_CK_BUFHCLK1 origin:058-pip-hclk 01_14 03_14
HCLK_R.HCLK_LEAF_CLK_B_BOT0.HCLK_CK_BUFHCLK2 origin:058-pip-hclk 01_14 04_15
HCLK_R.HCLK_LEAF_CLK_B_BOT0.HCLK_CK_BUFHCLK3 origin:058-pip-hclk 01_14 03_15
HCLK_R.HCLK_LEAF_CLK_B_BOT0.HCLK_CK_BUFHCLK4 origin:058-pip-hclk 00_15 04_14
HCLK_R.HCLK_LEAF_CLK_B_BOT0.HCLK_CK_BUFHCLK5 origin:058-pip-hclk 00_15 03_14
HCLK_R.HCLK_LEAF_CLK_B_BOT0.HCLK_CK_BUFHCLK6 origin:058-pip-hclk 00_15 04_15
HCLK_R.HCLK_LEAF_CLK_B_BOT0.HCLK_CK_BUFHCLK7 origin:058-pip-hclk 00_15 03_15
HCLK_R.HCLK_LEAF_CLK_B_BOT1.HCLK_CK_OUTIN_R0 origin:058-pip-hclk 02_14 02_16
HCLK_R.HCLK_LEAF_CLK_B_BOT1.HCLK_CK_OUTIN_R1 origin:058-pip-hclk 02_16 05_14
HCLK_R.HCLK_LEAF_CLK_B_BOT1.HCLK_CK_OUTIN_R2 origin:058-pip-hclk 02_15 02_16
@ -38,14 +30,14 @@ HCLK_R.HCLK_LEAF_CLK_B_BOT1.HCLK_CK_OUTIN_R4 origin:058-pip-hclk 02_14 04_16
HCLK_R.HCLK_LEAF_CLK_B_BOT1.HCLK_CK_OUTIN_R5 origin:058-pip-hclk 04_16 05_14
HCLK_R.HCLK_LEAF_CLK_B_BOT1.HCLK_CK_OUTIN_R6 origin:058-pip-hclk 02_15 04_16
HCLK_R.HCLK_LEAF_CLK_B_BOT1.HCLK_CK_OUTIN_R7 origin:058-pip-hclk 04_16 05_15
HCLK_R.HCLK_LEAF_CLK_B_BOT2.HCLK_CK_BUFHCLK0 origin:058-pip-hclk 00_18 05_19
HCLK_R.HCLK_LEAF_CLK_B_BOT2.HCLK_CK_BUFHCLK1 origin:058-pip-hclk 00_18 02_19
HCLK_R.HCLK_LEAF_CLK_B_BOT2.HCLK_CK_BUFHCLK2 origin:058-pip-hclk 00_18 05_18
HCLK_R.HCLK_LEAF_CLK_B_BOT2.HCLK_CK_BUFHCLK3 origin:058-pip-hclk 00_18 02_18
HCLK_R.HCLK_LEAF_CLK_B_BOT2.HCLK_CK_BUFHCLK4 origin:058-pip-hclk 01_17 05_19
HCLK_R.HCLK_LEAF_CLK_B_BOT2.HCLK_CK_BUFHCLK5 origin:058-pip-hclk 01_17 02_19
HCLK_R.HCLK_LEAF_CLK_B_BOT2.HCLK_CK_BUFHCLK6 origin:058-pip-hclk 01_17 05_18
HCLK_R.HCLK_LEAF_CLK_B_BOT2.HCLK_CK_BUFHCLK7 origin:058-pip-hclk 01_17 02_18
HCLK_R.HCLK_LEAF_CLK_B_BOT1.HCLK_CK_BUFHCLK0 origin:058-pip-hclk 02_14 03_16
HCLK_R.HCLK_LEAF_CLK_B_BOT1.HCLK_CK_BUFHCLK1 origin:058-pip-hclk 03_16 05_14
HCLK_R.HCLK_LEAF_CLK_B_BOT1.HCLK_CK_BUFHCLK2 origin:058-pip-hclk 02_15 03_16
HCLK_R.HCLK_LEAF_CLK_B_BOT1.HCLK_CK_BUFHCLK3 origin:058-pip-hclk 03_16 05_15
HCLK_R.HCLK_LEAF_CLK_B_BOT1.HCLK_CK_BUFHCLK4 origin:058-pip-hclk 02_14 05_16
HCLK_R.HCLK_LEAF_CLK_B_BOT1.HCLK_CK_BUFHCLK5 origin:058-pip-hclk 05_14 05_16
HCLK_R.HCLK_LEAF_CLK_B_BOT1.HCLK_CK_BUFHCLK6 origin:058-pip-hclk 02_15 05_16
HCLK_R.HCLK_LEAF_CLK_B_BOT1.HCLK_CK_BUFHCLK7 origin:058-pip-hclk 05_15 05_16
HCLK_R.HCLK_LEAF_CLK_B_BOT2.HCLK_CK_OUTIN_R0 origin:058-pip-hclk 01_16 05_19
HCLK_R.HCLK_LEAF_CLK_B_BOT2.HCLK_CK_OUTIN_R1 origin:058-pip-hclk 01_16 02_19
HCLK_R.HCLK_LEAF_CLK_B_BOT2.HCLK_CK_OUTIN_R2 origin:058-pip-hclk 01_16 05_18
@ -54,14 +46,14 @@ HCLK_R.HCLK_LEAF_CLK_B_BOT2.HCLK_CK_OUTIN_R4 origin:058-pip-hclk 00_17 05_19
HCLK_R.HCLK_LEAF_CLK_B_BOT2.HCLK_CK_OUTIN_R5 origin:058-pip-hclk 00_17 02_19
HCLK_R.HCLK_LEAF_CLK_B_BOT2.HCLK_CK_OUTIN_R6 origin:058-pip-hclk 00_17 05_18
HCLK_R.HCLK_LEAF_CLK_B_BOT2.HCLK_CK_OUTIN_R7 origin:058-pip-hclk 00_17 02_18
HCLK_R.HCLK_LEAF_CLK_B_BOT3.HCLK_CK_BUFHCLK0 origin:058-pip-hclk 02_17 03_19
HCLK_R.HCLK_LEAF_CLK_B_BOT3.HCLK_CK_BUFHCLK1 origin:058-pip-hclk 02_17 04_19
HCLK_R.HCLK_LEAF_CLK_B_BOT3.HCLK_CK_BUFHCLK2 origin:058-pip-hclk 02_17 03_18
HCLK_R.HCLK_LEAF_CLK_B_BOT3.HCLK_CK_BUFHCLK3 origin:058-pip-hclk 02_17 04_18
HCLK_R.HCLK_LEAF_CLK_B_BOT3.HCLK_CK_BUFHCLK4 origin:058-pip-hclk 03_19 04_17
HCLK_R.HCLK_LEAF_CLK_B_BOT3.HCLK_CK_BUFHCLK5 origin:058-pip-hclk 04_17 04_19
HCLK_R.HCLK_LEAF_CLK_B_BOT3.HCLK_CK_BUFHCLK6 origin:058-pip-hclk 03_18 04_17
HCLK_R.HCLK_LEAF_CLK_B_BOT3.HCLK_CK_BUFHCLK7 origin:058-pip-hclk 04_17 04_18
HCLK_R.HCLK_LEAF_CLK_B_BOT2.HCLK_CK_BUFHCLK0 origin:058-pip-hclk 00_18 05_19
HCLK_R.HCLK_LEAF_CLK_B_BOT2.HCLK_CK_BUFHCLK1 origin:058-pip-hclk 00_18 02_19
HCLK_R.HCLK_LEAF_CLK_B_BOT2.HCLK_CK_BUFHCLK2 origin:058-pip-hclk 00_18 05_18
HCLK_R.HCLK_LEAF_CLK_B_BOT2.HCLK_CK_BUFHCLK3 origin:058-pip-hclk 00_18 02_18
HCLK_R.HCLK_LEAF_CLK_B_BOT2.HCLK_CK_BUFHCLK4 origin:058-pip-hclk 01_17 05_19
HCLK_R.HCLK_LEAF_CLK_B_BOT2.HCLK_CK_BUFHCLK5 origin:058-pip-hclk 01_17 02_19
HCLK_R.HCLK_LEAF_CLK_B_BOT2.HCLK_CK_BUFHCLK6 origin:058-pip-hclk 01_17 05_18
HCLK_R.HCLK_LEAF_CLK_B_BOT2.HCLK_CK_BUFHCLK7 origin:058-pip-hclk 01_17 02_18
HCLK_R.HCLK_LEAF_CLK_B_BOT3.HCLK_CK_OUTIN_R0 origin:058-pip-hclk 03_17 03_19
HCLK_R.HCLK_LEAF_CLK_B_BOT3.HCLK_CK_OUTIN_R1 origin:058-pip-hclk 03_17 04_19
HCLK_R.HCLK_LEAF_CLK_B_BOT3.HCLK_CK_OUTIN_R2 origin:058-pip-hclk 03_17 03_18
@ -70,14 +62,14 @@ HCLK_R.HCLK_LEAF_CLK_B_BOT3.HCLK_CK_OUTIN_R4 origin:058-pip-hclk 03_19 05_17
HCLK_R.HCLK_LEAF_CLK_B_BOT3.HCLK_CK_OUTIN_R5 origin:058-pip-hclk 04_19 05_17
HCLK_R.HCLK_LEAF_CLK_B_BOT3.HCLK_CK_OUTIN_R6 origin:058-pip-hclk 03_18 05_17
HCLK_R.HCLK_LEAF_CLK_B_BOT3.HCLK_CK_OUTIN_R7 origin:058-pip-hclk 04_18 05_17
HCLK_R.HCLK_LEAF_CLK_B_BOT4.HCLK_CK_BUFHCLK0 origin:058-pip-hclk 00_20 04_20
HCLK_R.HCLK_LEAF_CLK_B_BOT4.HCLK_CK_BUFHCLK1 origin:058-pip-hclk 00_20 03_20
HCLK_R.HCLK_LEAF_CLK_B_BOT4.HCLK_CK_BUFHCLK2 origin:058-pip-hclk 00_20 04_21
HCLK_R.HCLK_LEAF_CLK_B_BOT4.HCLK_CK_BUFHCLK3 origin:058-pip-hclk 00_20 03_21
HCLK_R.HCLK_LEAF_CLK_B_BOT4.HCLK_CK_BUFHCLK4 origin:058-pip-hclk 01_20 04_20
HCLK_R.HCLK_LEAF_CLK_B_BOT4.HCLK_CK_BUFHCLK5 origin:058-pip-hclk 01_20 03_20
HCLK_R.HCLK_LEAF_CLK_B_BOT4.HCLK_CK_BUFHCLK6 origin:058-pip-hclk 01_20 04_21
HCLK_R.HCLK_LEAF_CLK_B_BOT4.HCLK_CK_BUFHCLK7 origin:058-pip-hclk 01_20 03_21
HCLK_R.HCLK_LEAF_CLK_B_BOT3.HCLK_CK_BUFHCLK0 origin:058-pip-hclk 02_17 03_19
HCLK_R.HCLK_LEAF_CLK_B_BOT3.HCLK_CK_BUFHCLK1 origin:058-pip-hclk 02_17 04_19
HCLK_R.HCLK_LEAF_CLK_B_BOT3.HCLK_CK_BUFHCLK2 origin:058-pip-hclk 02_17 03_18
HCLK_R.HCLK_LEAF_CLK_B_BOT3.HCLK_CK_BUFHCLK3 origin:058-pip-hclk 02_17 04_18
HCLK_R.HCLK_LEAF_CLK_B_BOT3.HCLK_CK_BUFHCLK4 origin:058-pip-hclk 03_19 04_17
HCLK_R.HCLK_LEAF_CLK_B_BOT3.HCLK_CK_BUFHCLK5 origin:058-pip-hclk 04_17 04_19
HCLK_R.HCLK_LEAF_CLK_B_BOT3.HCLK_CK_BUFHCLK6 origin:058-pip-hclk 03_18 04_17
HCLK_R.HCLK_LEAF_CLK_B_BOT3.HCLK_CK_BUFHCLK7 origin:058-pip-hclk 04_17 04_18
HCLK_R.HCLK_LEAF_CLK_B_BOT4.HCLK_CK_OUTIN_R0 origin:058-pip-hclk 01_21 04_20
HCLK_R.HCLK_LEAF_CLK_B_BOT4.HCLK_CK_OUTIN_R1 origin:058-pip-hclk 01_21 03_20
HCLK_R.HCLK_LEAF_CLK_B_BOT4.HCLK_CK_OUTIN_R2 origin:058-pip-hclk 01_21 04_21
@ -86,14 +78,14 @@ HCLK_R.HCLK_LEAF_CLK_B_BOT4.HCLK_CK_OUTIN_R4 origin:058-pip-hclk 00_21 04_20
HCLK_R.HCLK_LEAF_CLK_B_BOT4.HCLK_CK_OUTIN_R5 origin:058-pip-hclk 00_21 03_20
HCLK_R.HCLK_LEAF_CLK_B_BOT4.HCLK_CK_OUTIN_R6 origin:058-pip-hclk 00_21 04_21
HCLK_R.HCLK_LEAF_CLK_B_BOT4.HCLK_CK_OUTIN_R7 origin:058-pip-hclk 00_21 03_21
HCLK_R.HCLK_LEAF_CLK_B_BOT5.HCLK_CK_BUFHCLK0 origin:058-pip-hclk 02_20 03_22
HCLK_R.HCLK_LEAF_CLK_B_BOT5.HCLK_CK_BUFHCLK1 origin:058-pip-hclk 03_22 05_20
HCLK_R.HCLK_LEAF_CLK_B_BOT5.HCLK_CK_BUFHCLK2 origin:058-pip-hclk 02_21 03_22
HCLK_R.HCLK_LEAF_CLK_B_BOT5.HCLK_CK_BUFHCLK3 origin:058-pip-hclk 03_22 05_21
HCLK_R.HCLK_LEAF_CLK_B_BOT5.HCLK_CK_BUFHCLK4 origin:058-pip-hclk 02_20 05_22
HCLK_R.HCLK_LEAF_CLK_B_BOT5.HCLK_CK_BUFHCLK5 origin:058-pip-hclk 05_20 05_22
HCLK_R.HCLK_LEAF_CLK_B_BOT5.HCLK_CK_BUFHCLK6 origin:058-pip-hclk 02_21 05_22
HCLK_R.HCLK_LEAF_CLK_B_BOT5.HCLK_CK_BUFHCLK7 origin:058-pip-hclk 05_21 05_22
HCLK_R.HCLK_LEAF_CLK_B_BOT4.HCLK_CK_BUFHCLK0 origin:058-pip-hclk 00_20 04_20
HCLK_R.HCLK_LEAF_CLK_B_BOT4.HCLK_CK_BUFHCLK1 origin:058-pip-hclk 00_20 03_20
HCLK_R.HCLK_LEAF_CLK_B_BOT4.HCLK_CK_BUFHCLK2 origin:058-pip-hclk 00_20 04_21
HCLK_R.HCLK_LEAF_CLK_B_BOT4.HCLK_CK_BUFHCLK3 origin:058-pip-hclk 00_20 03_21
HCLK_R.HCLK_LEAF_CLK_B_BOT4.HCLK_CK_BUFHCLK4 origin:058-pip-hclk 01_20 04_20
HCLK_R.HCLK_LEAF_CLK_B_BOT4.HCLK_CK_BUFHCLK5 origin:058-pip-hclk 01_20 03_20
HCLK_R.HCLK_LEAF_CLK_B_BOT4.HCLK_CK_BUFHCLK6 origin:058-pip-hclk 01_20 04_21
HCLK_R.HCLK_LEAF_CLK_B_BOT4.HCLK_CK_BUFHCLK7 origin:058-pip-hclk 01_20 03_21
HCLK_R.HCLK_LEAF_CLK_B_BOT5.HCLK_CK_OUTIN_R0 origin:058-pip-hclk 02_20 02_22
HCLK_R.HCLK_LEAF_CLK_B_BOT5.HCLK_CK_OUTIN_R1 origin:058-pip-hclk 02_22 05_20
HCLK_R.HCLK_LEAF_CLK_B_BOT5.HCLK_CK_OUTIN_R2 origin:058-pip-hclk 02_21 02_22
@ -102,14 +94,14 @@ HCLK_R.HCLK_LEAF_CLK_B_BOT5.HCLK_CK_OUTIN_R4 origin:058-pip-hclk 02_20 04_22
HCLK_R.HCLK_LEAF_CLK_B_BOT5.HCLK_CK_OUTIN_R5 origin:058-pip-hclk 04_22 05_20
HCLK_R.HCLK_LEAF_CLK_B_BOT5.HCLK_CK_OUTIN_R6 origin:058-pip-hclk 02_21 04_22
HCLK_R.HCLK_LEAF_CLK_B_BOT5.HCLK_CK_OUTIN_R7 origin:058-pip-hclk 04_22 05_21
HCLK_R.HCLK_LEAF_CLK_B_TOP0.HCLK_CK_BUFHCLK0 origin:058-pip-hclk 01_30 05_31
HCLK_R.HCLK_LEAF_CLK_B_TOP0.HCLK_CK_BUFHCLK1 origin:058-pip-hclk 01_30 02_31
HCLK_R.HCLK_LEAF_CLK_B_TOP0.HCLK_CK_BUFHCLK2 origin:058-pip-hclk 01_30 05_30
HCLK_R.HCLK_LEAF_CLK_B_TOP0.HCLK_CK_BUFHCLK3 origin:058-pip-hclk 01_30 02_30
HCLK_R.HCLK_LEAF_CLK_B_TOP0.HCLK_CK_BUFHCLK4 origin:058-pip-hclk 00_30 05_31
HCLK_R.HCLK_LEAF_CLK_B_TOP0.HCLK_CK_BUFHCLK5 origin:058-pip-hclk 00_30 02_31
HCLK_R.HCLK_LEAF_CLK_B_TOP0.HCLK_CK_BUFHCLK6 origin:058-pip-hclk 00_30 05_30
HCLK_R.HCLK_LEAF_CLK_B_TOP0.HCLK_CK_BUFHCLK7 origin:058-pip-hclk 00_30 02_30
HCLK_R.HCLK_LEAF_CLK_B_BOT5.HCLK_CK_BUFHCLK0 origin:058-pip-hclk 02_20 03_22
HCLK_R.HCLK_LEAF_CLK_B_BOT5.HCLK_CK_BUFHCLK1 origin:058-pip-hclk 03_22 05_20
HCLK_R.HCLK_LEAF_CLK_B_BOT5.HCLK_CK_BUFHCLK2 origin:058-pip-hclk 02_21 03_22
HCLK_R.HCLK_LEAF_CLK_B_BOT5.HCLK_CK_BUFHCLK3 origin:058-pip-hclk 03_22 05_21
HCLK_R.HCLK_LEAF_CLK_B_BOT5.HCLK_CK_BUFHCLK4 origin:058-pip-hclk 02_20 05_22
HCLK_R.HCLK_LEAF_CLK_B_BOT5.HCLK_CK_BUFHCLK5 origin:058-pip-hclk 05_20 05_22
HCLK_R.HCLK_LEAF_CLK_B_BOT5.HCLK_CK_BUFHCLK6 origin:058-pip-hclk 02_21 05_22
HCLK_R.HCLK_LEAF_CLK_B_BOT5.HCLK_CK_BUFHCLK7 origin:058-pip-hclk 05_21 05_22
HCLK_R.HCLK_LEAF_CLK_B_TOP0.HCLK_CK_OUTIN_R0 origin:058-pip-hclk 00_29 05_31
HCLK_R.HCLK_LEAF_CLK_B_TOP0.HCLK_CK_OUTIN_R1 origin:058-pip-hclk 00_29 02_31
HCLK_R.HCLK_LEAF_CLK_B_TOP0.HCLK_CK_OUTIN_R2 origin:058-pip-hclk 00_29 05_30
@ -118,14 +110,14 @@ HCLK_R.HCLK_LEAF_CLK_B_TOP0.HCLK_CK_OUTIN_R4 origin:058-pip-hclk 01_29 05_31
HCLK_R.HCLK_LEAF_CLK_B_TOP0.HCLK_CK_OUTIN_R5 origin:058-pip-hclk 01_29 02_31
HCLK_R.HCLK_LEAF_CLK_B_TOP0.HCLK_CK_OUTIN_R6 origin:058-pip-hclk 01_29 05_30
HCLK_R.HCLK_LEAF_CLK_B_TOP0.HCLK_CK_OUTIN_R7 origin:058-pip-hclk 01_29 02_30
HCLK_R.HCLK_LEAF_CLK_B_TOP1.HCLK_CK_BUFHCLK0 origin:058-pip-hclk 02_29 03_31
HCLK_R.HCLK_LEAF_CLK_B_TOP1.HCLK_CK_BUFHCLK1 origin:058-pip-hclk 02_29 04_31
HCLK_R.HCLK_LEAF_CLK_B_TOP1.HCLK_CK_BUFHCLK2 origin:058-pip-hclk 02_29 03_30
HCLK_R.HCLK_LEAF_CLK_B_TOP1.HCLK_CK_BUFHCLK3 origin:058-pip-hclk 02_29 04_30
HCLK_R.HCLK_LEAF_CLK_B_TOP1.HCLK_CK_BUFHCLK4 origin:058-pip-hclk 03_31 04_29
HCLK_R.HCLK_LEAF_CLK_B_TOP1.HCLK_CK_BUFHCLK5 origin:058-pip-hclk 04_29 04_31
HCLK_R.HCLK_LEAF_CLK_B_TOP1.HCLK_CK_BUFHCLK6 origin:058-pip-hclk 03_30 04_29
HCLK_R.HCLK_LEAF_CLK_B_TOP1.HCLK_CK_BUFHCLK7 origin:058-pip-hclk 04_29 04_30
HCLK_R.HCLK_LEAF_CLK_B_TOP0.HCLK_CK_BUFHCLK0 origin:058-pip-hclk 01_30 05_31
HCLK_R.HCLK_LEAF_CLK_B_TOP0.HCLK_CK_BUFHCLK1 origin:058-pip-hclk 01_30 02_31
HCLK_R.HCLK_LEAF_CLK_B_TOP0.HCLK_CK_BUFHCLK2 origin:058-pip-hclk 01_30 05_30
HCLK_R.HCLK_LEAF_CLK_B_TOP0.HCLK_CK_BUFHCLK3 origin:058-pip-hclk 01_30 02_30
HCLK_R.HCLK_LEAF_CLK_B_TOP0.HCLK_CK_BUFHCLK4 origin:058-pip-hclk 00_30 05_31
HCLK_R.HCLK_LEAF_CLK_B_TOP0.HCLK_CK_BUFHCLK5 origin:058-pip-hclk 00_30 02_31
HCLK_R.HCLK_LEAF_CLK_B_TOP0.HCLK_CK_BUFHCLK6 origin:058-pip-hclk 00_30 05_30
HCLK_R.HCLK_LEAF_CLK_B_TOP0.HCLK_CK_BUFHCLK7 origin:058-pip-hclk 00_30 02_30
HCLK_R.HCLK_LEAF_CLK_B_TOP1.HCLK_CK_OUTIN_R0 origin:058-pip-hclk 03_29 03_31
HCLK_R.HCLK_LEAF_CLK_B_TOP1.HCLK_CK_OUTIN_R1 origin:058-pip-hclk 03_29 04_31
HCLK_R.HCLK_LEAF_CLK_B_TOP1.HCLK_CK_OUTIN_R2 origin:058-pip-hclk 03_29 03_30
@ -134,14 +126,14 @@ HCLK_R.HCLK_LEAF_CLK_B_TOP1.HCLK_CK_OUTIN_R4 origin:058-pip-hclk 03_31 05_29
HCLK_R.HCLK_LEAF_CLK_B_TOP1.HCLK_CK_OUTIN_R5 origin:058-pip-hclk 04_31 05_29
HCLK_R.HCLK_LEAF_CLK_B_TOP1.HCLK_CK_OUTIN_R6 origin:058-pip-hclk 03_30 05_29
HCLK_R.HCLK_LEAF_CLK_B_TOP1.HCLK_CK_OUTIN_R7 origin:058-pip-hclk 04_30 05_29
HCLK_R.HCLK_LEAF_CLK_B_TOP2.HCLK_CK_BUFHCLK0 origin:058-pip-hclk 00_26 04_26
HCLK_R.HCLK_LEAF_CLK_B_TOP2.HCLK_CK_BUFHCLK1 origin:058-pip-hclk 00_26 03_26
HCLK_R.HCLK_LEAF_CLK_B_TOP2.HCLK_CK_BUFHCLK2 origin:058-pip-hclk 00_26 04_27
HCLK_R.HCLK_LEAF_CLK_B_TOP2.HCLK_CK_BUFHCLK3 origin:058-pip-hclk 00_26 03_27
HCLK_R.HCLK_LEAF_CLK_B_TOP2.HCLK_CK_BUFHCLK4 origin:058-pip-hclk 01_26 04_26
HCLK_R.HCLK_LEAF_CLK_B_TOP2.HCLK_CK_BUFHCLK5 origin:058-pip-hclk 01_26 03_26
HCLK_R.HCLK_LEAF_CLK_B_TOP2.HCLK_CK_BUFHCLK6 origin:058-pip-hclk 01_26 04_27
HCLK_R.HCLK_LEAF_CLK_B_TOP2.HCLK_CK_BUFHCLK7 origin:058-pip-hclk 01_26 03_27
HCLK_R.HCLK_LEAF_CLK_B_TOP1.HCLK_CK_BUFHCLK0 origin:058-pip-hclk 02_29 03_31
HCLK_R.HCLK_LEAF_CLK_B_TOP1.HCLK_CK_BUFHCLK1 origin:058-pip-hclk 02_29 04_31
HCLK_R.HCLK_LEAF_CLK_B_TOP1.HCLK_CK_BUFHCLK2 origin:058-pip-hclk 02_29 03_30
HCLK_R.HCLK_LEAF_CLK_B_TOP1.HCLK_CK_BUFHCLK3 origin:058-pip-hclk 02_29 04_30
HCLK_R.HCLK_LEAF_CLK_B_TOP1.HCLK_CK_BUFHCLK4 origin:058-pip-hclk 03_31 04_29
HCLK_R.HCLK_LEAF_CLK_B_TOP1.HCLK_CK_BUFHCLK5 origin:058-pip-hclk 04_29 04_31
HCLK_R.HCLK_LEAF_CLK_B_TOP1.HCLK_CK_BUFHCLK6 origin:058-pip-hclk 03_30 04_29
HCLK_R.HCLK_LEAF_CLK_B_TOP1.HCLK_CK_BUFHCLK7 origin:058-pip-hclk 04_29 04_30
HCLK_R.HCLK_LEAF_CLK_B_TOP2.HCLK_CK_OUTIN_R0 origin:058-pip-hclk 01_28 04_26
HCLK_R.HCLK_LEAF_CLK_B_TOP2.HCLK_CK_OUTIN_R1 origin:058-pip-hclk 01_28 03_26
HCLK_R.HCLK_LEAF_CLK_B_TOP2.HCLK_CK_OUTIN_R2 origin:058-pip-hclk 01_28 04_27
@ -150,14 +142,14 @@ HCLK_R.HCLK_LEAF_CLK_B_TOP2.HCLK_CK_OUTIN_R4 origin:058-pip-hclk 00_28 04_26
HCLK_R.HCLK_LEAF_CLK_B_TOP2.HCLK_CK_OUTIN_R5 origin:058-pip-hclk 00_28 03_26
HCLK_R.HCLK_LEAF_CLK_B_TOP2.HCLK_CK_OUTIN_R6 origin:058-pip-hclk 00_28 04_27
HCLK_R.HCLK_LEAF_CLK_B_TOP2.HCLK_CK_OUTIN_R7 origin:058-pip-hclk 00_28 03_27
HCLK_R.HCLK_LEAF_CLK_B_TOP3.HCLK_CK_BUFHCLK0 origin:058-pip-hclk 02_26 03_28
HCLK_R.HCLK_LEAF_CLK_B_TOP3.HCLK_CK_BUFHCLK1 origin:058-pip-hclk 03_28 05_26
HCLK_R.HCLK_LEAF_CLK_B_TOP3.HCLK_CK_BUFHCLK2 origin:058-pip-hclk 02_27 03_28
HCLK_R.HCLK_LEAF_CLK_B_TOP3.HCLK_CK_BUFHCLK3 origin:058-pip-hclk 03_28 05_27
HCLK_R.HCLK_LEAF_CLK_B_TOP3.HCLK_CK_BUFHCLK4 origin:058-pip-hclk 02_26 05_28
HCLK_R.HCLK_LEAF_CLK_B_TOP3.HCLK_CK_BUFHCLK5 origin:058-pip-hclk 05_26 05_28
HCLK_R.HCLK_LEAF_CLK_B_TOP3.HCLK_CK_BUFHCLK6 origin:058-pip-hclk 02_27 05_28
HCLK_R.HCLK_LEAF_CLK_B_TOP3.HCLK_CK_BUFHCLK7 origin:058-pip-hclk 05_27 05_28
HCLK_R.HCLK_LEAF_CLK_B_TOP2.HCLK_CK_BUFHCLK0 origin:058-pip-hclk 00_26 04_26
HCLK_R.HCLK_LEAF_CLK_B_TOP2.HCLK_CK_BUFHCLK1 origin:058-pip-hclk 00_26 03_26
HCLK_R.HCLK_LEAF_CLK_B_TOP2.HCLK_CK_BUFHCLK2 origin:058-pip-hclk 00_26 04_27
HCLK_R.HCLK_LEAF_CLK_B_TOP2.HCLK_CK_BUFHCLK3 origin:058-pip-hclk 00_26 03_27
HCLK_R.HCLK_LEAF_CLK_B_TOP2.HCLK_CK_BUFHCLK4 origin:058-pip-hclk 01_26 04_26
HCLK_R.HCLK_LEAF_CLK_B_TOP2.HCLK_CK_BUFHCLK5 origin:058-pip-hclk 01_26 03_26
HCLK_R.HCLK_LEAF_CLK_B_TOP2.HCLK_CK_BUFHCLK6 origin:058-pip-hclk 01_26 04_27
HCLK_R.HCLK_LEAF_CLK_B_TOP2.HCLK_CK_BUFHCLK7 origin:058-pip-hclk 01_26 03_27
HCLK_R.HCLK_LEAF_CLK_B_TOP3.HCLK_CK_OUTIN_R0 origin:058-pip-hclk 02_26 02_28
HCLK_R.HCLK_LEAF_CLK_B_TOP3.HCLK_CK_OUTIN_R1 origin:058-pip-hclk 02_28 05_26
HCLK_R.HCLK_LEAF_CLK_B_TOP3.HCLK_CK_OUTIN_R2 origin:058-pip-hclk 02_27 02_28
@ -166,14 +158,14 @@ HCLK_R.HCLK_LEAF_CLK_B_TOP3.HCLK_CK_OUTIN_R4 origin:058-pip-hclk 02_26 04_28
HCLK_R.HCLK_LEAF_CLK_B_TOP3.HCLK_CK_OUTIN_R5 origin:058-pip-hclk 04_28 05_26
HCLK_R.HCLK_LEAF_CLK_B_TOP3.HCLK_CK_OUTIN_R6 origin:058-pip-hclk 02_27 04_28
HCLK_R.HCLK_LEAF_CLK_B_TOP3.HCLK_CK_OUTIN_R7 origin:058-pip-hclk 04_28 05_27
HCLK_R.HCLK_LEAF_CLK_B_TOP4.HCLK_CK_BUFHCLK0 origin:058-pip-hclk 01_25 05_25
HCLK_R.HCLK_LEAF_CLK_B_TOP4.HCLK_CK_BUFHCLK1 origin:058-pip-hclk 01_25 02_25
HCLK_R.HCLK_LEAF_CLK_B_TOP4.HCLK_CK_BUFHCLK2 origin:058-pip-hclk 01_25 05_24
HCLK_R.HCLK_LEAF_CLK_B_TOP4.HCLK_CK_BUFHCLK3 origin:058-pip-hclk 01_25 02_24
HCLK_R.HCLK_LEAF_CLK_B_TOP4.HCLK_CK_BUFHCLK4 origin:058-pip-hclk 00_25 05_25
HCLK_R.HCLK_LEAF_CLK_B_TOP4.HCLK_CK_BUFHCLK5 origin:058-pip-hclk 00_25 02_25
HCLK_R.HCLK_LEAF_CLK_B_TOP4.HCLK_CK_BUFHCLK6 origin:058-pip-hclk 00_25 05_24
HCLK_R.HCLK_LEAF_CLK_B_TOP4.HCLK_CK_BUFHCLK7 origin:058-pip-hclk 00_25 02_24
HCLK_R.HCLK_LEAF_CLK_B_TOP3.HCLK_CK_BUFHCLK0 origin:058-pip-hclk 02_26 03_28
HCLK_R.HCLK_LEAF_CLK_B_TOP3.HCLK_CK_BUFHCLK1 origin:058-pip-hclk 03_28 05_26
HCLK_R.HCLK_LEAF_CLK_B_TOP3.HCLK_CK_BUFHCLK2 origin:058-pip-hclk 02_27 03_28
HCLK_R.HCLK_LEAF_CLK_B_TOP3.HCLK_CK_BUFHCLK3 origin:058-pip-hclk 03_28 05_27
HCLK_R.HCLK_LEAF_CLK_B_TOP3.HCLK_CK_BUFHCLK4 origin:058-pip-hclk 02_26 05_28
HCLK_R.HCLK_LEAF_CLK_B_TOP3.HCLK_CK_BUFHCLK5 origin:058-pip-hclk 05_26 05_28
HCLK_R.HCLK_LEAF_CLK_B_TOP3.HCLK_CK_BUFHCLK6 origin:058-pip-hclk 02_27 05_28
HCLK_R.HCLK_LEAF_CLK_B_TOP3.HCLK_CK_BUFHCLK7 origin:058-pip-hclk 05_27 05_28
HCLK_R.HCLK_LEAF_CLK_B_TOP4.HCLK_CK_OUTIN_R0 origin:058-pip-hclk 00_24 05_25
HCLK_R.HCLK_LEAF_CLK_B_TOP4.HCLK_CK_OUTIN_R1 origin:058-pip-hclk 00_24 02_25
HCLK_R.HCLK_LEAF_CLK_B_TOP4.HCLK_CK_OUTIN_R2 origin:058-pip-hclk 00_24 05_24
@ -182,14 +174,14 @@ HCLK_R.HCLK_LEAF_CLK_B_TOP4.HCLK_CK_OUTIN_R4 origin:058-pip-hclk 01_24 05_25
HCLK_R.HCLK_LEAF_CLK_B_TOP4.HCLK_CK_OUTIN_R5 origin:058-pip-hclk 01_24 02_25
HCLK_R.HCLK_LEAF_CLK_B_TOP4.HCLK_CK_OUTIN_R6 origin:058-pip-hclk 01_24 05_24
HCLK_R.HCLK_LEAF_CLK_B_TOP4.HCLK_CK_OUTIN_R7 origin:058-pip-hclk 01_24 02_24
HCLK_R.HCLK_LEAF_CLK_B_TOP5.HCLK_CK_BUFHCLK0 origin:058-pip-hclk 02_23 03_25
HCLK_R.HCLK_LEAF_CLK_B_TOP5.HCLK_CK_BUFHCLK1 origin:058-pip-hclk 02_23 04_25
HCLK_R.HCLK_LEAF_CLK_B_TOP5.HCLK_CK_BUFHCLK2 origin:058-pip-hclk 02_23 03_24
HCLK_R.HCLK_LEAF_CLK_B_TOP5.HCLK_CK_BUFHCLK3 origin:058-pip-hclk 02_23 04_24
HCLK_R.HCLK_LEAF_CLK_B_TOP5.HCLK_CK_BUFHCLK4 origin:058-pip-hclk 03_25 04_23
HCLK_R.HCLK_LEAF_CLK_B_TOP5.HCLK_CK_BUFHCLK5 origin:058-pip-hclk 04_23 04_25
HCLK_R.HCLK_LEAF_CLK_B_TOP5.HCLK_CK_BUFHCLK6 origin:058-pip-hclk 03_24 04_23
HCLK_R.HCLK_LEAF_CLK_B_TOP5.HCLK_CK_BUFHCLK7 origin:058-pip-hclk 04_23 04_24
HCLK_R.HCLK_LEAF_CLK_B_TOP4.HCLK_CK_BUFHCLK0 origin:058-pip-hclk 01_25 05_25
HCLK_R.HCLK_LEAF_CLK_B_TOP4.HCLK_CK_BUFHCLK1 origin:058-pip-hclk 01_25 02_25
HCLK_R.HCLK_LEAF_CLK_B_TOP4.HCLK_CK_BUFHCLK2 origin:058-pip-hclk 01_25 05_24
HCLK_R.HCLK_LEAF_CLK_B_TOP4.HCLK_CK_BUFHCLK3 origin:058-pip-hclk 01_25 02_24
HCLK_R.HCLK_LEAF_CLK_B_TOP4.HCLK_CK_BUFHCLK4 origin:058-pip-hclk 00_25 05_25
HCLK_R.HCLK_LEAF_CLK_B_TOP4.HCLK_CK_BUFHCLK5 origin:058-pip-hclk 00_25 02_25
HCLK_R.HCLK_LEAF_CLK_B_TOP4.HCLK_CK_BUFHCLK6 origin:058-pip-hclk 00_25 05_24
HCLK_R.HCLK_LEAF_CLK_B_TOP4.HCLK_CK_BUFHCLK7 origin:058-pip-hclk 00_25 02_24
HCLK_R.HCLK_LEAF_CLK_B_TOP5.HCLK_CK_OUTIN_R0 origin:058-pip-hclk 03_23 03_25
HCLK_R.HCLK_LEAF_CLK_B_TOP5.HCLK_CK_OUTIN_R1 origin:058-pip-hclk 03_23 04_25
HCLK_R.HCLK_LEAF_CLK_B_TOP5.HCLK_CK_OUTIN_R2 origin:058-pip-hclk 03_23 03_24
@ -198,3 +190,11 @@ HCLK_R.HCLK_LEAF_CLK_B_TOP5.HCLK_CK_OUTIN_R4 origin:058-pip-hclk 03_25 05_23
HCLK_R.HCLK_LEAF_CLK_B_TOP5.HCLK_CK_OUTIN_R5 origin:058-pip-hclk 04_25 05_23
HCLK_R.HCLK_LEAF_CLK_B_TOP5.HCLK_CK_OUTIN_R6 origin:058-pip-hclk 03_24 05_23
HCLK_R.HCLK_LEAF_CLK_B_TOP5.HCLK_CK_OUTIN_R7 origin:058-pip-hclk 04_24 05_23
HCLK_R.HCLK_LEAF_CLK_B_TOP5.HCLK_CK_BUFHCLK0 origin:058-pip-hclk 02_23 03_25
HCLK_R.HCLK_LEAF_CLK_B_TOP5.HCLK_CK_BUFHCLK1 origin:058-pip-hclk 02_23 04_25
HCLK_R.HCLK_LEAF_CLK_B_TOP5.HCLK_CK_BUFHCLK2 origin:058-pip-hclk 02_23 03_24
HCLK_R.HCLK_LEAF_CLK_B_TOP5.HCLK_CK_BUFHCLK3 origin:058-pip-hclk 02_23 04_24
HCLK_R.HCLK_LEAF_CLK_B_TOP5.HCLK_CK_BUFHCLK4 origin:058-pip-hclk 03_25 04_23
HCLK_R.HCLK_LEAF_CLK_B_TOP5.HCLK_CK_BUFHCLK5 origin:058-pip-hclk 04_23 04_25
HCLK_R.HCLK_LEAF_CLK_B_TOP5.HCLK_CK_BUFHCLK6 origin:058-pip-hclk 03_24 04_23
HCLK_R.HCLK_LEAF_CLK_B_TOP5.HCLK_CK_BUFHCLK7 origin:058-pip-hclk 04_23 04_24

2692
artix7/segbits_int_l.origin_info.db
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File diff suppressed because it is too large Load Diff

2656
artix7/segbits_int_r.origin_info.db
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File diff suppressed because it is too large Load Diff

44
artix7/segbits_liob33.origin_info.db
View File

@ -1,19 +1,25 @@
LIOB33.IOB_Y0.IBUFDISABLE.I origin:030-iob 38_82
LIOB33.IOB_Y0.INTERMDISABLE.I origin:030-iob 39_89
LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_120 38_122 39_121 39_123
LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob 38_120 38_122 39_123
LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob 38_120 39_123
LIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 origin:030-iob !38_118 !39_117 !39_119 !39_125 38_112 38_126 38_64 39_113 39_127 39_65
LIOB33.IOB_Y0.INTERMDISABLE.I origin:030-iob 39_89
LIOB33.IOB_Y0.LVTTL.DRIVE.I24 origin:030-iob !38_112 !38_118 !39_125 !39_127 38_126 38_64 39_117 39_119 39_65
LIOB33.IOB_Y0.PULLTYPE.KEEPER origin:030-iob !39_93 38_92 38_94
LIOB33.IOB_Y0.PULLTYPE.NONE origin:030-iob !38_92 !39_93 38_94
LIOB33.IOB_Y0.PULLTYPE.PULLDOWN origin:030-iob !38_92 !38_94 !39_93
LIOB33.IOB_Y0.PULLTYPE.PULLUP origin:030-iob !38_92 38_94 39_93
LIOB33.IOB_Y0.ZIBUF_LOW_PWR origin:030-iob 38_84
LIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 origin:030-iob !39_117 !39_119 !39_127 38_112 38_118 38_126 38_64 39_113 39_125 39_65
LIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 origin:030-iob !38_118 !39_117 !39_119 !39_125 38_112 38_126 38_64 39_113 39_127 39_65
LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18.IN origin:030-iob !39_87 38_86 39_85
LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST origin:030-iob !38_106 !38_110 !39_105 !39_107 !39_109 !39_111
LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY origin:030-iob !38_112 !38_126 !38_64 !39_117 !39_127 !39_65 38_118 39_113 39_119 39_125
LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW origin:030-iob !39_107 !39_111 38_106 38_110 39_105 39_109
LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN origin:030-iob 39_95
LIOB33.IOB_Y0.LVCMOS12_LVCMOS25.DRIVE.I8 origin:030-iob !38_118 !38_126 !39_117 !39_125 !39_127 38_112 38_64 39_113 39_119 39_65
LIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 origin:030-iob !38_118 !39_117 38_112 38_126 38_64 39_113 39_119 39_125 39_127 39_65
LIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 origin:030-iob !38_118 !38_126 !39_117 !39_119 !39_125 38_112 38_64 39_113 39_127 39_65
LIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 origin:030-iob !39_119 !39_125 38_112 38_118 38_126 38_64 39_113 39_117 39_127 39_65
LIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 origin:030-iob !38_118 !39_117 38_112 38_126 38_64 39_113 39_119 39_125 39_127 39_65
LIOB33.IOB_Y0.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 origin:030-iob !38_126 !39_117 !39_119 38_112 38_118 38_64 39_113 39_125 39_127 39_65
LIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 origin:030-iob !38_118 !39_117 !39_127 38_112 38_126 38_64 39_113 39_119 39_125 39_65
LIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 origin:030-iob !38_118 !39_117 !39_119 38_112 38_126 38_64 39_113 39_125 39_127 39_65
@ -22,35 +28,35 @@ LIOB33.IOB_Y0.LVCMOS25.DRIVE.I12 origin:030-iob !38_118 !38_126 !39_117 !39_119
LIOB33.IOB_Y0.LVCMOS25.DRIVE.I16 origin:030-iob !39_119 !39_125 !39_127 38_112 38_118 38_126 38_64 39_113 39_117 39_65
LIOB33.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN origin:030-iob 38_86 39_85 39_87
LIOB33.IOB_Y0.LVCMOS33.DRIVE.I16 origin:030-iob !38_112 !38_126 !39_119 !39_125 38_118 38_64 39_117 39_127 39_65
LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16 origin:030-iob !38_112 !38_118 !39_117 !39_119 38_126 38_64 39_125 39_127 39_65
LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I8 origin:030-iob !38_112 !38_118 !39_117 !39_127 38_126 38_64 39_119 39_125 39_65
LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I4 origin:030-iob !38_112 !38_126 !39_117 !39_119 38_118 38_64 39_125 39_127 39_65
LIOB33.IOB_Y0.LVTTL.DRIVE.I24 origin:030-iob !38_112 !38_118 !39_125 !39_127 38_126 38_64 39_117 39_119 39_65
LIOB33.IOB_Y0.PULLTYPE.KEEPER origin:030-iob !39_93 38_92 38_94
LIOB33.IOB_Y0.PULLTYPE.NONE origin:030-iob !38_92 !39_93 38_94
LIOB33.IOB_Y0.PULLTYPE.PULLDOWN origin:030-iob !38_92 !38_94 !39_93
LIOB33.IOB_Y0.PULLTYPE.PULLUP origin:030-iob !38_92 38_94 39_93
LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I8 origin:030-iob !38_112 !38_118 !39_117 !39_127 38_126 38_64 39_119 39_125 39_65
LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16 origin:030-iob !38_112 !38_118 !39_117 !39_119 38_126 38_64 39_125 39_127 39_65
LIOB33.IOB_Y0.SSTL135.DRIVE.I_FIXED origin:030-iob !39_125 38_112 38_118 38_126 38_64 39_113 39_117 39_119 39_127 39_65
LIOB33.IOB_Y0.SSTL135.IN origin:030-iob !38_86 !39_85 39_87
LIOB33.IOB_Y0.SSTL135.IN_DIFF origin:030-iob !39_85 38_86 39_87
LIOB33.IOB_Y0.SSTL135.SLEW.FAST origin:030-iob !38_106 38_110 39_105 39_107 39_109 39_111
LIOB33.IOB_Y0.ZIBUF_LOW_PWR origin:030-iob 38_84
LIOB33.IOB_Y1.IBUFDISABLE.I origin:030-iob 39_45
LIOB33.IOB_Y1.INTERMDISABLE.I origin:030-iob 38_38
LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_04 38_06 39_05 39_07
LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob 38_04 39_05 39_07
LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob 38_04 39_07
LIOB33.IOB_Y1.LVCMOS12.DRIVE.I12 origin:030-iob !38_02 !38_08 !38_10 !39_09 38_00 38_14 38_62 39_01 39_15 39_63
LIOB33.IOB_Y1.INTERMDISABLE.I origin:030-iob 38_38
LIOB33.IOB_Y1.LVTTL.DRIVE.I24 origin:030-iob !38_00 !38_02 !39_09 !39_15 38_08 38_10 38_62 39_01 39_63
LIOB33.IOB_Y1.PULLTYPE.KEEPER origin:030-iob !38_34 39_33 39_35
LIOB33.IOB_Y1.PULLTYPE.NONE origin:030-iob !38_34 !39_35 39_33
LIOB33.IOB_Y1.PULLTYPE.PULLDOWN origin:030-iob !38_34 !39_33 !39_35
LIOB33.IOB_Y1.PULLTYPE.PULLUP origin:030-iob !39_35 38_34 39_33
LIOB33.IOB_Y1.ZIBUF_LOW_PWR origin:030-iob 39_43
LIOB33.IOB_Y1.LVCMOS12.DRIVE.I4 origin:030-iob !38_00 !38_08 !38_10 38_02 38_14 38_62 39_01 39_09 39_15 39_63
LIOB33.IOB_Y1.LVCMOS12.DRIVE.I12 origin:030-iob !38_02 !38_08 !38_10 !39_09 38_00 38_14 38_62 39_01 39_15 39_63
LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18.IN origin:030-iob !38_40 38_42 39_41
LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST origin:030-iob !38_16 !38_18 !38_20 !38_22 !39_17 !39_21
LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY origin:030-iob !38_00 !38_10 !38_62 !39_01 !39_15 !39_63 38_02 38_08 38_14 39_09
LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW origin:030-iob !38_16 !38_20 38_18 38_22 39_17 39_21
LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN origin:030-iob 38_32
LIOB33.IOB_Y1.LVCMOS12_LVCMOS25.DRIVE.I8 origin:030-iob !38_00 !38_02 !38_10 !39_01 !39_09 38_08 38_14 38_62 39_15 39_63
LIOB33.IOB_Y1.LVCMOS15.DRIVE.I8 origin:030-iob !38_10 !39_09 38_00 38_02 38_08 38_14 38_62 39_01 39_15 39_63
LIOB33.IOB_Y1.LVCMOS15.DRIVE.I12 origin:030-iob !38_02 !38_08 !38_10 !39_01 !39_09 38_00 38_14 38_62 39_15 39_63
LIOB33.IOB_Y1.LVCMOS15.DRIVE.I16 origin:030-iob !38_02 !38_08 38_00 38_10 38_14 38_62 39_01 39_09 39_15 39_63
LIOB33.IOB_Y1.LVCMOS15.DRIVE.I8 origin:030-iob !38_10 !39_09 38_00 38_02 38_08 38_14 38_62 39_01 39_15 39_63
LIOB33.IOB_Y1.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 origin:030-iob !38_08 !38_10 !39_01 38_00 38_02 38_14 38_62 39_09 39_15 39_63
LIOB33.IOB_Y1.LVCMOS18.DRIVE.I12_I8 origin:030-iob !38_00 !38_10 !39_09 38_02 38_08 38_14 38_62 39_01 39_15 39_63
LIOB33.IOB_Y1.LVCMOS18.DRIVE.I16 origin:030-iob !38_08 !38_10 !39_09 38_00 38_02 38_14 38_62 39_01 39_15 39_63
@ -59,16 +65,10 @@ LIOB33.IOB_Y1.LVCMOS25.DRIVE.I12 origin:030-iob !38_00 !38_02 !38_08 !38_10 !39_
LIOB33.IOB_Y1.LVCMOS25.DRIVE.I16 origin:030-iob !38_00 !38_02 !38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
LIOB33.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN origin:030-iob 38_40 38_42 39_41
LIOB33.IOB_Y1.LVCMOS33.DRIVE.I16 origin:030-iob !38_02 !38_08 !39_01 !39_15 38_00 38_10 38_62 39_09 39_63
LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16 origin:030-iob !38_08 !38_10 !39_09 !39_15 38_00 38_02 38_62 39_01 39_63
LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I8 origin:030-iob !38_00 !38_10 !39_09 !39_15 38_02 38_08 38_62 39_01 39_63
LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I4 origin:030-iob !38_08 !38_10 !39_01 !39_15 38_00 38_02 38_62 39_09 39_63
LIOB33.IOB_Y1.LVTTL.DRIVE.I24 origin:030-iob !38_00 !38_02 !39_09 !39_15 38_08 38_10 38_62 39_01 39_63
LIOB33.IOB_Y1.PULLTYPE.KEEPER origin:030-iob !38_34 39_33 39_35
LIOB33.IOB_Y1.PULLTYPE.NONE origin:030-iob !38_34 !39_35 39_33
LIOB33.IOB_Y1.PULLTYPE.PULLDOWN origin:030-iob !38_34 !39_33 !39_35
LIOB33.IOB_Y1.PULLTYPE.PULLUP origin:030-iob !39_35 38_34 39_33
LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I8 origin:030-iob !38_00 !38_10 !39_09 !39_15 38_02 38_08 38_62 39_01 39_63
LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16 origin:030-iob !38_08 !38_10 !39_09 !39_15 38_00 38_02 38_62 39_01 39_63
LIOB33.IOB_Y1.SSTL135.DRIVE.I_FIXED origin:030-iob !38_02 38_00 38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
LIOB33.IOB_Y1.SSTL135.IN origin:030-iob !38_42 !39_41 38_40
LIOB33.IOB_Y1.SSTL135.SLEW.FAST origin:030-iob !39_21 38_16 38_18 38_20 38_22 39_17
LIOB33.IOB_Y1.ZIBUF_LOW_PWR origin:030-iob 39_43
LIOB33.OUT_DIFF origin:030-iob 39_59 39_61

226
artix7/segbits_lioi3.origin_info.db
View File

@ -3,8 +3,8 @@ LIOI3.IDELAY_Y0.DELAY_SRC_DATAIN origin:035a-iob-idelay !34_72 35_69
LIOI3.IDELAY_Y0.DELAY_SRC_IDATAIN origin:035a-iob-idelay !35_69 34_72
LIOI3.IDELAY_Y0.HIGH_PERFORMANCE_MODE origin:035a-iob-idelay 32_109
LIOI3.IDELAY_Y0.IDELAY_TYPE_FIXED origin:035a-iob-idelay !35_113 !35_119
LIOI3.IDELAY_Y0.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !35_113 35_119
LIOI3.IDELAY_Y0.IDELAY_TYPE_VAR_LOAD origin:035a-iob-idelay 35_113 35_119
LIOI3.IDELAY_Y0.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !35_113 35_119
LIOI3.IDELAY_Y0.IDELAY_VALUE[0] origin:035a-iob-idelay !34_120 34_122
LIOI3.IDELAY_Y0.IDELAY_VALUE[1] origin:035a-iob-idelay !34_114 34_116
LIOI3.IDELAY_Y0.IDELAY_VALUE[2] origin:035a-iob-idelay !34_108 34_110
@ -24,8 +24,8 @@ LIOI3.IDELAY_Y1.DELAY_SRC_DATAIN origin:035a-iob-idelay !35_55 34_58
LIOI3.IDELAY_Y1.DELAY_SRC_IDATAIN origin:035a-iob-idelay !34_58 35_55
LIOI3.IDELAY_Y1.HIGH_PERFORMANCE_MODE origin:035a-iob-idelay 33_18
LIOI3.IDELAY_Y1.IDELAY_TYPE_FIXED origin:035a-iob-idelay !34_08 !34_14
LIOI3.IDELAY_Y1.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !34_14 34_08
LIOI3.IDELAY_Y1.IDELAY_TYPE_VAR_LOAD origin:035a-iob-idelay 34_08 34_14
LIOI3.IDELAY_Y1.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !34_14 34_08
LIOI3.IDELAY_Y1.IDELAY_VALUE[0] origin:035a-iob-idelay !35_07 35_05
LIOI3.IDELAY_Y1.IDELAY_VALUE[1] origin:035a-iob-idelay !35_13 35_11
LIOI3.IDELAY_Y1.IDELAY_VALUE[2] origin:035a-iob-idelay !35_19 35_17
@ -40,10 +40,9 @@ LIOI3.IDELAY_Y1.ZIDELAY_VALUE[1] origin:035a-iob-idelay !35_11 35_13
LIOI3.IDELAY_Y1.ZIDELAY_VALUE[2] origin:035a-iob-idelay !35_17 35_19
LIOI3.IDELAY_Y1.ZIDELAY_VALUE[3] origin:035a-iob-idelay !35_25 35_27
LIOI3.IDELAY_Y1.ZIDELAY_VALUE[4] origin:035a-iob-idelay !35_31 35_33
LIOI3.ILOGIC_Y0.DYN_CLKDIV_INV_EN origin:035-iob-ilogic 27_118
LIOI3.ILOGIC_Y0.DYN_CLK_INV_EN origin:035-iob-ilogic 29_127
LIOI3.ILOGIC_Y0.DYN_CLKDIV_INV_EN origin:035-iob-ilogic 27_118
LIOI3.ILOGIC_Y0.IDDR_OR_ISERDES.IN_USE origin:035-iob-ilogic 26_71
LIOI3.ILOGIC_Y0.IDELMUXE3.P0 origin:035-iob-ilogic 29_101
LIOI3.ILOGIC_Y0.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE origin:035-iob-ilogic 27_98
LIOI3.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE origin:035-iob-ilogic 26_99
LIOI3.ILOGIC_Y0.IFF.INV_OCLK origin:035-iob-ilogic 28_124
@ -58,23 +57,23 @@ LIOI3.ILOGIC_Y0.IFF.ZSRVAL_Q1 origin:035-iob-ilogic 29_71
LIOI3.ILOGIC_Y0.IFF.ZSRVAL_Q2 origin:035-iob-ilogic 29_75
LIOI3.ILOGIC_Y0.IFF.ZSRVAL_Q3 origin:035-iob-ilogic 29_85
LIOI3.ILOGIC_Y0.IFF.ZSRVAL_Q4 origin:035-iob-ilogic 29_93
LIOI3.ILOGIC_Y0.IFFDELMUXE3.P0 origin:035-iob-ilogic 28_116
LIOI3.ILOGIC_Y0.ISERDES.DATA_RATE.SDR origin:035-iob-ilogic 27_108
LIOI3.ILOGIC_Y0.ISERDES.DATA_WIDTH.W3 origin:035-iob-ilogic !26_109 !27_110 27_112
LIOI3.ILOGIC_Y0.ISERDES.DATA_WIDTH.W4_6 origin:035-iob-ilogic !26_109 !27_112 27_110
LIOI3.ILOGIC_Y0.ISERDES.DATA_WIDTH.W5_7 origin:035-iob-ilogic !26_109 27_110 27_112
LIOI3.ILOGIC_Y0.ISERDES.DATA_WIDTH.W8 origin:035-iob-ilogic !27_110 !27_112 26_109
LIOI3.ILOGIC_Y0.ISERDES.IN_USE origin:035-iob-ilogic 27_102 27_70 28_110
LIOI3.ILOGIC_Y0.ISERDES.INTERFACE_TYPE.MEMORY_DDR3 origin:035-iob-ilogic 26_117
LIOI3.ILOGIC_Y0.ISERDES.INTERFACE_TYPE.NOT_MEMORY origin:035-iob-ilogic 26_107
LIOI3.ILOGIC_Y0.ISERDES.INTERFACE_TYPE.OVERSAMPLE origin:035-iob-ilogic 26_115
LIOI3.ILOGIC_Y0.ISERDES.INTERFACE_TYPE.Z_MEMORY origin:035-iob-ilogic 26_121
LIOI3.ILOGIC_Y0.ISERDES.IN_USE origin:035-iob-ilogic 27_102 27_70 28_110
LIOI3.ILOGIC_Y0.ISERDES.NUM_CE.N2 origin:035-iob-ilogic 27_80
LIOI3.ILOGIC_Y0.ZINV_D origin:035-iob-ilogic 29_109
LIOI3.ILOGIC_Y1.DYN_CLKDIV_INV_EN origin:035-iob-ilogic 26_09
LIOI3.ILOGIC_Y0.IDELMUXE3.P0 origin:035-iob-ilogic 29_101
LIOI3.ILOGIC_Y0.IFFDELMUXE3.P0 origin:035-iob-ilogic 28_116
LIOI3.ILOGIC_Y1.DYN_CLK_INV_EN origin:035-iob-ilogic 28_00
LIOI3.ILOGIC_Y1.DYN_CLKDIV_INV_EN origin:035-iob-ilogic 26_09
LIOI3.ILOGIC_Y1.IDDR_OR_ISERDES.IN_USE origin:035-iob-ilogic 27_56
LIOI3.ILOGIC_Y1.IDELMUXE3.P0 origin:035-iob-ilogic 28_26
LIOI3.ILOGIC_Y1.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE origin:035-iob-ilogic 26_29
LIOI3.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE origin:035-iob-ilogic 27_28
LIOI3.ILOGIC_Y1.IFF.INV_OCLK origin:035-iob-ilogic 29_03
@ -89,115 +88,20 @@ LIOI3.ILOGIC_Y1.IFF.ZSRVAL_Q1 origin:035-iob-ilogic 28_56
LIOI3.ILOGIC_Y1.IFF.ZSRVAL_Q2 origin:035-iob-ilogic 28_52
LIOI3.ILOGIC_Y1.IFF.ZSRVAL_Q3 origin:035-iob-ilogic 28_42
LIOI3.ILOGIC_Y1.IFF.ZSRVAL_Q4 origin:035-iob-ilogic 28_34
LIOI3.ILOGIC_Y1.IFFDELMUXE3.P0 origin:035-iob-ilogic 29_11
LIOI3.ILOGIC_Y1.ISERDES.DATA_RATE.SDR origin:035-iob-ilogic 26_19
LIOI3.ILOGIC_Y1.ISERDES.DATA_WIDTH.W3 origin:035-iob-ilogic !26_17 !27_18 26_15
LIOI3.ILOGIC_Y1.ISERDES.DATA_WIDTH.W4_6 origin:035-iob-ilogic !26_15 !27_18 26_17
LIOI3.ILOGIC_Y1.ISERDES.DATA_WIDTH.W5_7 origin:035-iob-ilogic !27_18 26_15 26_17
LIOI3.ILOGIC_Y1.ISERDES.DATA_WIDTH.W8 origin:035-iob-ilogic !26_15 !26_17 27_18
LIOI3.ILOGIC_Y1.ISERDES.IN_USE origin:035-iob-ilogic 26_25 26_57 29_17
LIOI3.ILOGIC_Y1.ISERDES.INTERFACE_TYPE.MEMORY_DDR3 origin:035-iob-ilogic 27_10
LIOI3.ILOGIC_Y1.ISERDES.INTERFACE_TYPE.NOT_MEMORY origin:035-iob-ilogic 27_20
LIOI3.ILOGIC_Y1.ISERDES.INTERFACE_TYPE.OVERSAMPLE origin:035-iob-ilogic 27_12
LIOI3.ILOGIC_Y1.ISERDES.INTERFACE_TYPE.Z_MEMORY origin:035-iob-ilogic 27_06
LIOI3.ILOGIC_Y1.ISERDES.IN_USE origin:035-iob-ilogic 26_25 26_57 29_17
LIOI3.ILOGIC_Y1.ISERDES.NUM_CE.N2 origin:035-iob-ilogic 26_47
LIOI3.ILOGIC_Y1.ZINV_D origin:035-iob-ilogic 28_18
LIOI3.IOI_ILOGIC0_CLK.IOI_IMUX20_1 origin:037-iob-pips 28_67 28_77 29_80
LIOI3.IOI_ILOGIC0_CLK.IOI_IMUX22_1 origin:037-iob-pips 28_67 28_77 29_78
LIOI3.IOI_ILOGIC0_CLK.IOI_IOCLK0 origin:037-iob-pips 28_67 29_76 29_78
LIOI3.IOI_ILOGIC0_CLK.IOI_IOCLK1 origin:037-iob-pips 28_67 29_76 29_80
LIOI3.IOI_ILOGIC0_CLK.IOI_IOCLK2 origin:037-iob-pips 28_67 28_77 28_79
LIOI3.IOI_ILOGIC0_CLK.IOI_IOCLK3 origin:037-iob-pips 28_67 28_77 28_81
LIOI3.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK0 origin:037-iob-pips 28_67 28_79 29_74
LIOI3.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK1 origin:037-iob-pips 28_67 28_81 29_74
LIOI3.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK2 origin:037-iob-pips 28_67 29_74 29_78
LIOI3.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK3 origin:037-iob-pips 28_67 29_74 29_80
LIOI3.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK4 origin:037-iob-pips 28_67 28_75 28_79
LIOI3.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK5 origin:037-iob-pips 28_67 28_75 28_81
LIOI3.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO0 origin:037-iob-pips 28_67 28_75 29_78
LIOI3.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO1 origin:037-iob-pips 28_67 28_75 29_80
LIOI3.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO2 origin:037-iob-pips 28_67 28_79 29_76
LIOI3.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO3 origin:037-iob-pips 28_67 28_81 29_76
LIOI3.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 origin:037-iob-pips 30_80 31_67 31_77
LIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_76 30_78 31_67
LIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_76 30_80 31_67
LIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK2 origin:037-iob-pips 31_67 31_77 31_79
LIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK3 origin:037-iob-pips 31_67 31_77 31_81
LIOI3.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK0 origin:037-iob-pips 30_74 31_67 31_79
LIOI3.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK1 origin:037-iob-pips 30_74 31_67 31_81
LIOI3.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK2 origin:037-iob-pips 30_74 30_78 31_67
LIOI3.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK3 origin:037-iob-pips 30_74 30_80 31_67
LIOI3.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK4 origin:037-iob-pips 31_67 31_75 31_79
LIOI3.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK5 origin:037-iob-pips 31_67 31_75 31_81
LIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO0 origin:037-iob-pips 30_78 31_67 31_75
LIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_80 31_67 31_75
LIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_76 31_67 31_79
LIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_76 31_67 31_81
LIOI3.IOI_ILOGIC1_CLK.IOI_IMUX20_0 origin:037-iob-pips 28_47 29_50 29_60
LIOI3.IOI_ILOGIC1_CLK.IOI_IMUX22_0 origin:037-iob-pips 28_49 29_50 29_60
LIOI3.IOI_ILOGIC1_CLK.IOI_IOCLK0 origin:037-iob-pips 28_49 28_51 29_60
LIOI3.IOI_ILOGIC1_CLK.IOI_IOCLK1 origin:037-iob-pips 28_47 28_51 29_60
LIOI3.IOI_ILOGIC1_CLK.IOI_IOCLK2 origin:037-iob-pips 29_48 29_50 29_60
LIOI3.IOI_ILOGIC1_CLK.IOI_IOCLK3 origin:037-iob-pips 29_46 29_50 29_60
LIOI3.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK0 origin:037-iob-pips 28_53 29_48 29_60
LIOI3.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK1 origin:037-iob-pips 28_53 29_46 29_60
LIOI3.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK2 origin:037-iob-pips 28_49 28_53 29_60
LIOI3.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK3 origin:037-iob-pips 28_47 28_53 29_60
LIOI3.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK4 origin:037-iob-pips 29_48 29_52 29_60
LIOI3.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK5 origin:037-iob-pips 29_46 29_52 29_60
LIOI3.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO0 origin:037-iob-pips 28_49 29_52 29_60
LIOI3.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO1 origin:037-iob-pips 28_47 29_52 29_60
LIOI3.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO2 origin:037-iob-pips 28_51 29_48 29_60
LIOI3.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO3 origin:037-iob-pips 28_51 29_46 29_60
LIOI3.IOI_ILOGIC1_CLKB.IOI_IMUX20_0 origin:037-iob-pips 30_50 30_60 31_47
LIOI3.IOI_ILOGIC1_CLKB.IOI_IMUX22_0 origin:037-iob-pips 30_50 30_60 31_49
LIOI3.IOI_ILOGIC1_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_60 31_49 31_51
LIOI3.IOI_ILOGIC1_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_60 31_47 31_51
LIOI3.IOI_ILOGIC1_CLKB.IOI_IOCLK2 origin:037-iob-pips 30_48 30_50 30_60
LIOI3.IOI_ILOGIC1_CLKB.IOI_IOCLK3 origin:037-iob-pips 30_46 30_50 30_60
LIOI3.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK0 origin:037-iob-pips 30_48 30_60 31_53
LIOI3.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK1 origin:037-iob-pips 30_46 30_60 31_53
LIOI3.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK2 origin:037-iob-pips 30_60 31_49 31_53
LIOI3.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK3 origin:037-iob-pips 30_60 31_47 31_53
LIOI3.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK4 origin:037-iob-pips 30_48 30_52 30_60
LIOI3.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK5 origin:037-iob-pips 30_46 30_52 30_60
LIOI3.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO0 origin:037-iob-pips 30_52 30_60 31_49
LIOI3.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_52 30_60 31_47
LIOI3.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_48 30_60 31_51
LIOI3.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_46 30_60 31_51
LIOI3.IOI_OCLKM_0.IOI_IOCLK0 origin:037-iob-pips 30_92 30_94 31_83
LIOI3.IOI_OCLKM_0.IOI_IOCLK1 origin:037-iob-pips 30_92 30_96 31_83
LIOI3.IOI_OCLKM_0.IOI_IOCLK2 origin:037-iob-pips 31_83 31_93 31_95
LIOI3.IOI_OCLKM_0.IOI_IOCLK3 origin:037-iob-pips 31_83 31_93 31_97
LIOI3.IOI_OCLKM_0.IOI_LEAF_GCLK0 origin:037-iob-pips 30_88 31_83 31_95
LIOI3.IOI_OCLKM_0.IOI_LEAF_GCLK1 origin:037-iob-pips 30_88 31_83 31_97
LIOI3.IOI_OCLKM_0.IOI_LEAF_GCLK2 origin:037-iob-pips 30_88 30_94 31_83
LIOI3.IOI_OCLKM_0.IOI_LEAF_GCLK3 origin:037-iob-pips 30_88 30_96 31_83
LIOI3.IOI_OCLKM_0.IOI_LEAF_GCLK4 origin:037-iob-pips 31_83 31_89 31_95
LIOI3.IOI_OCLKM_0.IOI_LEAF_GCLK5 origin:037-iob-pips 31_83 31_89 31_97
LIOI3.IOI_OCLKM_0.IOI_RCLK_FORIO0 origin:037-iob-pips 30_94 31_83 31_89
LIOI3.IOI_OCLKM_0.IOI_RCLK_FORIO1 origin:037-iob-pips 30_96 31_83 31_89
LIOI3.IOI_OCLKM_0.IOI_RCLK_FORIO2 origin:037-iob-pips 30_92 31_83 31_95
LIOI3.IOI_OCLKM_0.IOI_RCLK_FORIO3 origin:037-iob-pips 30_92 31_83 31_97
LIOI3.IOI_OCLKM_1.IOI_IOCLK0 origin:037-iob-pips 30_44 31_33 31_35
LIOI3.IOI_OCLKM_1.IOI_IOCLK1 origin:037-iob-pips 30_44 31_31 31_35
LIOI3.IOI_OCLKM_1.IOI_IOCLK2 origin:037-iob-pips 30_32 30_34 30_44
LIOI3.IOI_OCLKM_1.IOI_IOCLK3 origin:037-iob-pips 30_30 30_34 30_44
LIOI3.IOI_OCLKM_1.IOI_LEAF_GCLK0 origin:037-iob-pips 30_32 30_44 31_39
LIOI3.IOI_OCLKM_1.IOI_LEAF_GCLK1 origin:037-iob-pips 30_30 30_44 31_39
LIOI3.IOI_OCLKM_1.IOI_LEAF_GCLK2 origin:037-iob-pips 30_44 31_33 31_39
LIOI3.IOI_OCLKM_1.IOI_LEAF_GCLK3 origin:037-iob-pips 30_44 31_31 31_39
LIOI3.IOI_OCLKM_1.IOI_LEAF_GCLK4 origin:037-iob-pips 30_32 30_38 30_44
LIOI3.IOI_OCLKM_1.IOI_LEAF_GCLK5 origin:037-iob-pips 30_30 30_38 30_44
LIOI3.IOI_OCLKM_1.IOI_RCLK_FORIO0 origin:037-iob-pips 30_38 30_44 31_33
LIOI3.IOI_OCLKM_1.IOI_RCLK_FORIO1 origin:037-iob-pips 30_38 30_44 31_31
LIOI3.IOI_OCLKM_1.IOI_RCLK_FORIO2 origin:037-iob-pips 30_32 30_44 31_35
LIOI3.IOI_OCLKM_1.IOI_RCLK_FORIO3 origin:037-iob-pips 30_30 30_44 31_35
LIOI3.IOI_OCLK_0.IOI_IMUX31_1 origin:037-iob-pips 28_83 28_93 29_94
LIOI3.IOI_OCLK_0.IOI_IOCLK0 origin:037-iob-pips 28_83 29_92 29_94
LIOI3.IOI_OCLK_0.IOI_IOCLK1 origin:037-iob-pips 28_83 29_92 29_96
LIOI3.IOI_OCLK_0.IOI_IOCLK2 origin:037-iob-pips 28_83 28_93 28_95
LIOI3.IOI_OCLK_0.IOI_IOCLK3 origin:037-iob-pips 28_83 28_93 28_97
LIOI3.ILOGIC_Y1.IDELMUXE3.P0 origin:035-iob-ilogic 28_26
LIOI3.ILOGIC_Y1.IFFDELMUXE3.P0 origin:035-iob-ilogic 29_11
LIOI3.IOI_OCLK_0.IOI_LEAF_GCLK0 origin:037-iob-pips 28_83 28_95 29_88
LIOI3.IOI_OCLK_0.IOI_LEAF_GCLK1 origin:037-iob-pips 28_83 28_97 29_88
LIOI3.IOI_OCLK_0.IOI_LEAF_GCLK2 origin:037-iob-pips 28_83 29_88 29_94
@ -208,11 +112,11 @@ LIOI3.IOI_OCLK_0.IOI_RCLK_FORIO0 origin:037-iob-pips 28_83 28_89 29_94
LIOI3.IOI_OCLK_0.IOI_RCLK_FORIO1 origin:037-iob-pips 28_83 28_89 29_96
LIOI3.IOI_OCLK_0.IOI_RCLK_FORIO2 origin:037-iob-pips 28_83 28_95 29_92
LIOI3.IOI_OCLK_0.IOI_RCLK_FORIO3 origin:037-iob-pips 28_83 28_97 29_92
LIOI3.IOI_OCLK_1.IOI_IMUX31_0 origin:037-iob-pips 28_33 29_34 29_44
LIOI3.IOI_OCLK_1.IOI_IOCLK0 origin:037-iob-pips 28_33 28_35 29_44
LIOI3.IOI_OCLK_1.IOI_IOCLK1 origin:037-iob-pips 28_31 28_35 29_44
LIOI3.IOI_OCLK_1.IOI_IOCLK2 origin:037-iob-pips 29_32 29_34 29_44
LIOI3.IOI_OCLK_1.IOI_IOCLK3 origin:037-iob-pips 29_30 29_34 29_44
LIOI3.IOI_OCLK_0.IOI_IMUX31_1 origin:037-iob-pips 28_83 28_93 29_94
LIOI3.IOI_OCLK_0.IOI_IOCLK0 origin:037-iob-pips 28_83 29_92 29_94
LIOI3.IOI_OCLK_0.IOI_IOCLK1 origin:037-iob-pips 28_83 29_92 29_96
LIOI3.IOI_OCLK_0.IOI_IOCLK2 origin:037-iob-pips 28_83 28_93 28_95
LIOI3.IOI_OCLK_0.IOI_IOCLK3 origin:037-iob-pips 28_83 28_93 28_97
LIOI3.IOI_OCLK_1.IOI_LEAF_GCLK0 origin:037-iob-pips 28_39 29_32 29_44
LIOI3.IOI_OCLK_1.IOI_LEAF_GCLK1 origin:037-iob-pips 28_39 29_30 29_44
LIOI3.IOI_OCLK_1.IOI_LEAF_GCLK2 origin:037-iob-pips 28_33 28_39 29_44
@ -223,7 +127,102 @@ LIOI3.IOI_OCLK_1.IOI_RCLK_FORIO0 origin:037-iob-pips 28_33 29_38 29_44
LIOI3.IOI_OCLK_1.IOI_RCLK_FORIO1 origin:037-iob-pips 28_31 29_38 29_44
LIOI3.IOI_OCLK_1.IOI_RCLK_FORIO2 origin:037-iob-pips 28_35 29_32 29_44
LIOI3.IOI_OCLK_1.IOI_RCLK_FORIO3 origin:037-iob-pips 28_35 29_30 29_44
LIOI3.IOI_OLOGIC0_CLKDIV.IOI_IMUX8_1 origin:037-iob-pips 28_111 28_121 28_123 31_111 31_121 31_123
LIOI3.IOI_OCLK_1.IOI_IMUX31_0 origin:037-iob-pips 28_33 29_34 29_44
LIOI3.IOI_OCLK_1.IOI_IOCLK0 origin:037-iob-pips 28_33 28_35 29_44
LIOI3.IOI_OCLK_1.IOI_IOCLK1 origin:037-iob-pips 28_31 28_35 29_44
LIOI3.IOI_OCLK_1.IOI_IOCLK2 origin:037-iob-pips 29_32 29_34 29_44
LIOI3.IOI_OCLK_1.IOI_IOCLK3 origin:037-iob-pips 29_30 29_34 29_44
LIOI3.IOI_OCLKM_0.IOI_LEAF_GCLK0 origin:037-iob-pips 30_88 31_83 31_95
LIOI3.IOI_OCLKM_0.IOI_LEAF_GCLK1 origin:037-iob-pips 30_88 31_83 31_97
LIOI3.IOI_OCLKM_0.IOI_LEAF_GCLK2 origin:037-iob-pips 30_88 30_94 31_83
LIOI3.IOI_OCLKM_0.IOI_LEAF_GCLK3 origin:037-iob-pips 30_88 30_96 31_83
LIOI3.IOI_OCLKM_0.IOI_LEAF_GCLK4 origin:037-iob-pips 31_83 31_89 31_95
LIOI3.IOI_OCLKM_0.IOI_LEAF_GCLK5 origin:037-iob-pips 31_83 31_89 31_97
LIOI3.IOI_OCLKM_0.IOI_RCLK_FORIO0 origin:037-iob-pips 30_94 31_83 31_89
LIOI3.IOI_OCLKM_0.IOI_RCLK_FORIO1 origin:037-iob-pips 30_96 31_83 31_89
LIOI3.IOI_OCLKM_0.IOI_RCLK_FORIO2 origin:037-iob-pips 30_92 31_83 31_95
LIOI3.IOI_OCLKM_0.IOI_RCLK_FORIO3 origin:037-iob-pips 30_92 31_83 31_97
LIOI3.IOI_OCLKM_0.IOI_IOCLK0 origin:037-iob-pips 30_92 30_94 31_83
LIOI3.IOI_OCLKM_0.IOI_IOCLK1 origin:037-iob-pips 30_92 30_96 31_83
LIOI3.IOI_OCLKM_0.IOI_IOCLK2 origin:037-iob-pips 31_83 31_93 31_95
LIOI3.IOI_OCLKM_0.IOI_IOCLK3 origin:037-iob-pips 31_83 31_93 31_97
LIOI3.IOI_OCLKM_1.IOI_LEAF_GCLK0 origin:037-iob-pips 30_32 30_44 31_39
LIOI3.IOI_OCLKM_1.IOI_LEAF_GCLK1 origin:037-iob-pips 30_30 30_44 31_39
LIOI3.IOI_OCLKM_1.IOI_LEAF_GCLK2 origin:037-iob-pips 30_44 31_33 31_39
LIOI3.IOI_OCLKM_1.IOI_LEAF_GCLK3 origin:037-iob-pips 30_44 31_31 31_39
LIOI3.IOI_OCLKM_1.IOI_LEAF_GCLK4 origin:037-iob-pips 30_32 30_38 30_44
LIOI3.IOI_OCLKM_1.IOI_LEAF_GCLK5 origin:037-iob-pips 30_30 30_38 30_44
LIOI3.IOI_OCLKM_1.IOI_RCLK_FORIO0 origin:037-iob-pips 30_38 30_44 31_33
LIOI3.IOI_OCLKM_1.IOI_RCLK_FORIO1 origin:037-iob-pips 30_38 30_44 31_31
LIOI3.IOI_OCLKM_1.IOI_RCLK_FORIO2 origin:037-iob-pips 30_32 30_44 31_35
LIOI3.IOI_OCLKM_1.IOI_RCLK_FORIO3 origin:037-iob-pips 30_30 30_44 31_35
LIOI3.IOI_OCLKM_1.IOI_IOCLK0 origin:037-iob-pips 30_44 31_33 31_35
LIOI3.IOI_OCLKM_1.IOI_IOCLK1 origin:037-iob-pips 30_44 31_31 31_35
LIOI3.IOI_OCLKM_1.IOI_IOCLK2 origin:037-iob-pips 30_32 30_34 30_44
LIOI3.IOI_OCLKM_1.IOI_IOCLK3 origin:037-iob-pips 30_30 30_34 30_44
LIOI3.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK0 origin:037-iob-pips 28_67 28_79 29_74
LIOI3.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK1 origin:037-iob-pips 28_67 28_81 29_74
LIOI3.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK2 origin:037-iob-pips 28_67 29_74 29_78
LIOI3.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK3 origin:037-iob-pips 28_67 29_74 29_80
LIOI3.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK4 origin:037-iob-pips 28_67 28_75 28_79
LIOI3.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK5 origin:037-iob-pips 28_67 28_75 28_81
LIOI3.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO0 origin:037-iob-pips 28_67 28_75 29_78
LIOI3.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO1 origin:037-iob-pips 28_67 28_75 29_80
LIOI3.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO2 origin:037-iob-pips 28_67 28_79 29_76
LIOI3.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO3 origin:037-iob-pips 28_67 28_81 29_76
LIOI3.IOI_ILOGIC0_CLK.IOI_IMUX20_1 origin:037-iob-pips 28_67 28_77 29_80
LIOI3.IOI_ILOGIC0_CLK.IOI_IMUX22_1 origin:037-iob-pips 28_67 28_77 29_78
LIOI3.IOI_ILOGIC0_CLK.IOI_IOCLK0 origin:037-iob-pips 28_67 29_76 29_78
LIOI3.IOI_ILOGIC0_CLK.IOI_IOCLK1 origin:037-iob-pips 28_67 29_76 29_80
LIOI3.IOI_ILOGIC0_CLK.IOI_IOCLK2 origin:037-iob-pips 28_67 28_77 28_79
LIOI3.IOI_ILOGIC0_CLK.IOI_IOCLK3 origin:037-iob-pips 28_67 28_77 28_81
LIOI3.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK0 origin:037-iob-pips 30_74 31_67 31_79
LIOI3.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK1 origin:037-iob-pips 30_74 31_67 31_81
LIOI3.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK2 origin:037-iob-pips 30_74 30_78 31_67
LIOI3.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK3 origin:037-iob-pips 30_74 30_80 31_67
LIOI3.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK4 origin:037-iob-pips 31_67 31_75 31_79
LIOI3.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK5 origin:037-iob-pips 31_67 31_75 31_81
LIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO0 origin:037-iob-pips 30_78 31_67 31_75
LIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_80 31_67 31_75
LIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_76 31_67 31_79
LIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_76 31_67 31_81
LIOI3.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 origin:037-iob-pips 30_80 31_67 31_77
LIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_76 30_78 31_67
LIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_76 30_80 31_67
LIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK2 origin:037-iob-pips 31_67 31_77 31_79
LIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK3 origin:037-iob-pips 31_67 31_77 31_81
LIOI3.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK0 origin:037-iob-pips 28_53 29_48 29_60
LIOI3.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK1 origin:037-iob-pips 28_53 29_46 29_60
LIOI3.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK2 origin:037-iob-pips 28_49 28_53 29_60
LIOI3.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK3 origin:037-iob-pips 28_47 28_53 29_60
LIOI3.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK4 origin:037-iob-pips 29_48 29_52 29_60
LIOI3.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK5 origin:037-iob-pips 29_46 29_52 29_60
LIOI3.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO0 origin:037-iob-pips 28_49 29_52 29_60
LIOI3.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO1 origin:037-iob-pips 28_47 29_52 29_60
LIOI3.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO2 origin:037-iob-pips 28_51 29_48 29_60
LIOI3.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO3 origin:037-iob-pips 28_51 29_46 29_60
LIOI3.IOI_ILOGIC1_CLK.IOI_IMUX20_0 origin:037-iob-pips 28_47 29_50 29_60
LIOI3.IOI_ILOGIC1_CLK.IOI_IMUX22_0 origin:037-iob-pips 28_49 29_50 29_60
LIOI3.IOI_ILOGIC1_CLK.IOI_IOCLK0 origin:037-iob-pips 28_49 28_51 29_60
LIOI3.IOI_ILOGIC1_CLK.IOI_IOCLK1 origin:037-iob-pips 28_47 28_51 29_60
LIOI3.IOI_ILOGIC1_CLK.IOI_IOCLK2 origin:037-iob-pips 29_48 29_50 29_60
LIOI3.IOI_ILOGIC1_CLK.IOI_IOCLK3 origin:037-iob-pips 29_46 29_50 29_60
LIOI3.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK0 origin:037-iob-pips 30_48 30_60 31_53
LIOI3.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK1 origin:037-iob-pips 30_46 30_60 31_53
LIOI3.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK2 origin:037-iob-pips 30_60 31_49 31_53
LIOI3.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK3 origin:037-iob-pips 30_60 31_47 31_53
LIOI3.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK4 origin:037-iob-pips 30_48 30_52 30_60
LIOI3.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK5 origin:037-iob-pips 30_46 30_52 30_60
LIOI3.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO0 origin:037-iob-pips 30_52 30_60 31_49
LIOI3.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_52 30_60 31_47
LIOI3.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_48 30_60 31_51
LIOI3.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_46 30_60 31_51
LIOI3.IOI_ILOGIC1_CLKB.IOI_IMUX20_0 origin:037-iob-pips 30_50 30_60 31_47
LIOI3.IOI_ILOGIC1_CLKB.IOI_IMUX22_0 origin:037-iob-pips 30_50 30_60 31_49
LIOI3.IOI_ILOGIC1_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_60 31_49 31_51
LIOI3.IOI_ILOGIC1_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_60 31_47 31_51
LIOI3.IOI_ILOGIC1_CLKB.IOI_IOCLK2 origin:037-iob-pips 30_48 30_50 30_60
LIOI3.IOI_ILOGIC1_CLKB.IOI_IOCLK3 origin:037-iob-pips 30_46 30_50 30_60
LIOI3.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK0 origin:037-iob-pips 28_111 29_118 29_124 30_118 30_124 31_111
LIOI3.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK1 origin:037-iob-pips 28_111 29_118 29_126 30_118 30_126 31_111
LIOI3.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK2 origin:037-iob-pips 28_111 28_123 29_118 30_118 31_111 31_123
@ -234,7 +233,7 @@ LIOI3.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO0 origin:037-iob-pips 28_111 28_119 28_12
LIOI3.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO1 origin:037-iob-pips 28_111 28_119 28_125 31_111 31_119 31_125
LIOI3.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO2 origin:037-iob-pips 28_111 28_121 29_124 30_124 31_111 31_121
LIOI3.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO3 origin:037-iob-pips 28_111 28_121 29_126 30_126 31_111 31_121
LIOI3.IOI_OLOGIC1_CLKDIV.IOI_IMUX8_0 origin:037-iob-pips 29_04 29_06 29_16 30_04 30_06 30_16
LIOI3.IOI_OLOGIC0_CLKDIV.IOI_IMUX8_1 origin:037-iob-pips 28_111 28_121 28_123 31_111 31_121 31_123
LIOI3.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK0 origin:037-iob-pips 28_03 28_09 29_16 30_16 31_03 31_09
LIOI3.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK1 origin:037-iob-pips 28_01 28_09 29_16 30_16 31_01 31_09
LIOI3.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK2 origin:037-iob-pips 28_09 29_04 29_16 30_04 30_16 31_09
@ -245,6 +244,7 @@ LIOI3.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO0 origin:037-iob-pips 29_04 29_08 29_16 3
LIOI3.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO1 origin:037-iob-pips 29_02 29_08 29_16 30_02 30_08 30_16
LIOI3.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO2 origin:037-iob-pips 28_03 29_06 29_16 30_06 30_16 31_03
LIOI3.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO3 origin:037-iob-pips 28_01 29_06 29_16 30_06 30_16 31_01
LIOI3.IOI_OLOGIC1_CLKDIV.IOI_IMUX8_0 origin:037-iob-pips 29_04 29_06 29_16 30_04 30_06 30_16
LIOI3.OLOGIC_Y0.IS_CLKDIV_INVERTED origin:036-iob-ologic 30_85
LIOI3.OLOGIC_Y0.IS_D1_INVERTED origin:036-iob-ologic 30_97
LIOI3.OLOGIC_Y0.IS_D2_INVERTED origin:036-iob-ologic 31_102

226
artix7/segbits_lioi3_tbytesrc.origin_info.db
View File

@ -3,8 +3,8 @@ LIOI3_TBYTESRC.IDELAY_Y0.DELAY_SRC_DATAIN origin:035a-iob-idelay !34_72 35_69
LIOI3_TBYTESRC.IDELAY_Y0.DELAY_SRC_IDATAIN origin:035a-iob-idelay !35_69 34_72
LIOI3_TBYTESRC.IDELAY_Y0.HIGH_PERFORMANCE_MODE origin:035a-iob-idelay 32_109
LIOI3_TBYTESRC.IDELAY_Y0.IDELAY_TYPE_FIXED origin:035a-iob-idelay !35_113 !35_119
LIOI3_TBYTESRC.IDELAY_Y0.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !35_113 35_119
LIOI3_TBYTESRC.IDELAY_Y0.IDELAY_TYPE_VAR_LOAD origin:035a-iob-idelay 35_113 35_119
LIOI3_TBYTESRC.IDELAY_Y0.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !35_113 35_119
LIOI3_TBYTESRC.IDELAY_Y0.IDELAY_VALUE[0] origin:035a-iob-idelay !34_120 34_122
LIOI3_TBYTESRC.IDELAY_Y0.IDELAY_VALUE[1] origin:035a-iob-idelay !34_114 34_116
LIOI3_TBYTESRC.IDELAY_Y0.IDELAY_VALUE[2] origin:035a-iob-idelay !34_108 34_110
@ -24,8 +24,8 @@ LIOI3_TBYTESRC.IDELAY_Y1.DELAY_SRC_DATAIN origin:035a-iob-idelay !35_55 34_58
LIOI3_TBYTESRC.IDELAY_Y1.DELAY_SRC_IDATAIN origin:035a-iob-idelay !34_58 35_55
LIOI3_TBYTESRC.IDELAY_Y1.HIGH_PERFORMANCE_MODE origin:035a-iob-idelay 33_18
LIOI3_TBYTESRC.IDELAY_Y1.IDELAY_TYPE_FIXED origin:035a-iob-idelay !34_08 !34_14
LIOI3_TBYTESRC.IDELAY_Y1.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !34_14 34_08
LIOI3_TBYTESRC.IDELAY_Y1.IDELAY_TYPE_VAR_LOAD origin:035a-iob-idelay 34_08 34_14
LIOI3_TBYTESRC.IDELAY_Y1.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !34_14 34_08
LIOI3_TBYTESRC.IDELAY_Y1.IDELAY_VALUE[0] origin:035a-iob-idelay !35_07 35_05
LIOI3_TBYTESRC.IDELAY_Y1.IDELAY_VALUE[1] origin:035a-iob-idelay !35_13 35_11
LIOI3_TBYTESRC.IDELAY_Y1.IDELAY_VALUE[2] origin:035a-iob-idelay !35_19 35_17
@ -40,10 +40,9 @@ LIOI3_TBYTESRC.IDELAY_Y1.ZIDELAY_VALUE[1] origin:035a-iob-idelay !35_11 35_13
LIOI3_TBYTESRC.IDELAY_Y1.ZIDELAY_VALUE[2] origin:035a-iob-idelay !35_17 35_19
LIOI3_TBYTESRC.IDELAY_Y1.ZIDELAY_VALUE[3] origin:035a-iob-idelay !35_25 35_27
LIOI3_TBYTESRC.IDELAY_Y1.ZIDELAY_VALUE[4] origin:035a-iob-idelay !35_31 35_33
LIOI3_TBYTESRC.ILOGIC_Y0.DYN_CLKDIV_INV_EN origin:035-iob-ilogic 27_118
LIOI3_TBYTESRC.ILOGIC_Y0.DYN_CLK_INV_EN origin:035-iob-ilogic 29_127
LIOI3_TBYTESRC.ILOGIC_Y0.DYN_CLKDIV_INV_EN origin:035-iob-ilogic 27_118
LIOI3_TBYTESRC.ILOGIC_Y0.IDDR_OR_ISERDES.IN_USE origin:035-iob-ilogic 26_71
LIOI3_TBYTESRC.ILOGIC_Y0.IDELMUXE3.P0 origin:035-iob-ilogic 29_101
LIOI3_TBYTESRC.ILOGIC_Y0.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE origin:035-iob-ilogic 27_98
LIOI3_TBYTESRC.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE origin:035-iob-ilogic 26_99
LIOI3_TBYTESRC.ILOGIC_Y0.IFF.INV_OCLK origin:035-iob-ilogic 28_124
@ -58,23 +57,23 @@ LIOI3_TBYTESRC.ILOGIC_Y0.IFF.ZSRVAL_Q1 origin:035-iob-ilogic 29_71
LIOI3_TBYTESRC.ILOGIC_Y0.IFF.ZSRVAL_Q2 origin:035-iob-ilogic 29_75
LIOI3_TBYTESRC.ILOGIC_Y0.IFF.ZSRVAL_Q3 origin:035-iob-ilogic 29_85
LIOI3_TBYTESRC.ILOGIC_Y0.IFF.ZSRVAL_Q4 origin:035-iob-ilogic 29_93
LIOI3_TBYTESRC.ILOGIC_Y0.IFFDELMUXE3.P0 origin:035-iob-ilogic 28_116
LIOI3_TBYTESRC.ILOGIC_Y0.ISERDES.DATA_RATE.SDR origin:035-iob-ilogic 27_108
LIOI3_TBYTESRC.ILOGIC_Y0.ISERDES.DATA_WIDTH.W3 origin:035-iob-ilogic !26_109 !27_110 27_112
LIOI3_TBYTESRC.ILOGIC_Y0.ISERDES.DATA_WIDTH.W4_6 origin:035-iob-ilogic !26_109 !27_112 27_110
LIOI3_TBYTESRC.ILOGIC_Y0.ISERDES.DATA_WIDTH.W5_7 origin:035-iob-ilogic !26_109 27_110 27_112
LIOI3_TBYTESRC.ILOGIC_Y0.ISERDES.DATA_WIDTH.W8 origin:035-iob-ilogic !27_110 !27_112 26_109
LIOI3_TBYTESRC.ILOGIC_Y0.ISERDES.IN_USE origin:035-iob-ilogic 27_102 27_70 28_110
LIOI3_TBYTESRC.ILOGIC_Y0.ISERDES.INTERFACE_TYPE.MEMORY_DDR3 origin:035-iob-ilogic 26_117
LIOI3_TBYTESRC.ILOGIC_Y0.ISERDES.INTERFACE_TYPE.NOT_MEMORY origin:035-iob-ilogic 26_107
LIOI3_TBYTESRC.ILOGIC_Y0.ISERDES.INTERFACE_TYPE.OVERSAMPLE origin:035-iob-ilogic 26_115
LIOI3_TBYTESRC.ILOGIC_Y0.ISERDES.INTERFACE_TYPE.Z_MEMORY origin:035-iob-ilogic 26_121
LIOI3_TBYTESRC.ILOGIC_Y0.ISERDES.IN_USE origin:035-iob-ilogic 27_102 27_70 28_110
LIOI3_TBYTESRC.ILOGIC_Y0.ISERDES.NUM_CE.N2 origin:035-iob-ilogic 27_80
LIOI3_TBYTESRC.ILOGIC_Y0.ZINV_D origin:035-iob-ilogic 29_109
LIOI3_TBYTESRC.ILOGIC_Y1.DYN_CLKDIV_INV_EN origin:035-iob-ilogic 26_09
LIOI3_TBYTESRC.ILOGIC_Y0.IDELMUXE3.P0 origin:035-iob-ilogic 29_101
LIOI3_TBYTESRC.ILOGIC_Y0.IFFDELMUXE3.P0 origin:035-iob-ilogic 28_116
LIOI3_TBYTESRC.ILOGIC_Y1.DYN_CLK_INV_EN origin:035-iob-ilogic 28_00
LIOI3_TBYTESRC.ILOGIC_Y1.DYN_CLKDIV_INV_EN origin:035-iob-ilogic 26_09
LIOI3_TBYTESRC.ILOGIC_Y1.IDDR_OR_ISERDES.IN_USE origin:035-iob-ilogic 27_56
LIOI3_TBYTESRC.ILOGIC_Y1.IDELMUXE3.P0 origin:035-iob-ilogic 28_26
LIOI3_TBYTESRC.ILOGIC_Y1.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE origin:035-iob-ilogic 26_29
LIOI3_TBYTESRC.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE origin:035-iob-ilogic 27_28
LIOI3_TBYTESRC.ILOGIC_Y1.IFF.INV_OCLK origin:035-iob-ilogic 29_03
@ -89,115 +88,20 @@ LIOI3_TBYTESRC.ILOGIC_Y1.IFF.ZSRVAL_Q1 origin:035-iob-ilogic 28_56
LIOI3_TBYTESRC.ILOGIC_Y1.IFF.ZSRVAL_Q2 origin:035-iob-ilogic 28_52
LIOI3_TBYTESRC.ILOGIC_Y1.IFF.ZSRVAL_Q3 origin:035-iob-ilogic 28_42
LIOI3_TBYTESRC.ILOGIC_Y1.IFF.ZSRVAL_Q4 origin:035-iob-ilogic 28_34
LIOI3_TBYTESRC.ILOGIC_Y1.IFFDELMUXE3.P0 origin:035-iob-ilogic 29_11
LIOI3_TBYTESRC.ILOGIC_Y1.ISERDES.DATA_RATE.SDR origin:035-iob-ilogic 26_19
LIOI3_TBYTESRC.ILOGIC_Y1.ISERDES.DATA_WIDTH.W3 origin:035-iob-ilogic !26_17 !27_18 26_15
LIOI3_TBYTESRC.ILOGIC_Y1.ISERDES.DATA_WIDTH.W4_6 origin:035-iob-ilogic !26_15 !27_18 26_17
LIOI3_TBYTESRC.ILOGIC_Y1.ISERDES.DATA_WIDTH.W5_7 origin:035-iob-ilogic !27_18 26_15 26_17
LIOI3_TBYTESRC.ILOGIC_Y1.ISERDES.DATA_WIDTH.W8 origin:035-iob-ilogic !26_15 !26_17 27_18
LIOI3_TBYTESRC.ILOGIC_Y1.ISERDES.IN_USE origin:035-iob-ilogic 26_25 26_57 29_17
LIOI3_TBYTESRC.ILOGIC_Y1.ISERDES.INTERFACE_TYPE.MEMORY_DDR3 origin:035-iob-ilogic 27_10
LIOI3_TBYTESRC.ILOGIC_Y1.ISERDES.INTERFACE_TYPE.NOT_MEMORY origin:035-iob-ilogic 27_20
LIOI3_TBYTESRC.ILOGIC_Y1.ISERDES.INTERFACE_TYPE.OVERSAMPLE origin:035-iob-ilogic 27_12
LIOI3_TBYTESRC.ILOGIC_Y1.ISERDES.INTERFACE_TYPE.Z_MEMORY origin:035-iob-ilogic 27_06
LIOI3_TBYTESRC.ILOGIC_Y1.ISERDES.IN_USE origin:035-iob-ilogic 26_25 26_57 29_17
LIOI3_TBYTESRC.ILOGIC_Y1.ISERDES.NUM_CE.N2 origin:035-iob-ilogic 26_47
LIOI3_TBYTESRC.ILOGIC_Y1.ZINV_D origin:035-iob-ilogic 28_18
LIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IMUX20_1 origin:037-iob-pips 28_67 28_77 29_80
LIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IMUX22_1 origin:037-iob-pips 28_67 28_77 29_78
LIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IOCLK0 origin:037-iob-pips 28_67 29_76 29_78
LIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IOCLK1 origin:037-iob-pips 28_67 29_76 29_80
LIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IOCLK2 origin:037-iob-pips 28_67 28_77 28_79
LIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IOCLK3 origin:037-iob-pips 28_67 28_77 28_81
LIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK0 origin:037-iob-pips 28_67 28_79 29_74
LIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK1 origin:037-iob-pips 28_67 28_81 29_74
LIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK2 origin:037-iob-pips 28_67 29_74 29_78
LIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK3 origin:037-iob-pips 28_67 29_74 29_80
LIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK4 origin:037-iob-pips 28_67 28_75 28_79
LIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK5 origin:037-iob-pips 28_67 28_75 28_81
LIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO0 origin:037-iob-pips 28_67 28_75 29_78
LIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO1 origin:037-iob-pips 28_67 28_75 29_80
LIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO2 origin:037-iob-pips 28_67 28_79 29_76
LIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO3 origin:037-iob-pips 28_67 28_81 29_76
LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 origin:037-iob-pips 30_80 31_67 31_77
LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_76 30_78 31_67
LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_76 30_80 31_67
LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK2 origin:037-iob-pips 31_67 31_77 31_79
LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK3 origin:037-iob-pips 31_67 31_77 31_81
LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK0 origin:037-iob-pips 30_74 31_67 31_79
LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK1 origin:037-iob-pips 30_74 31_67 31_81
LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK2 origin:037-iob-pips 30_74 30_78 31_67
LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK3 origin:037-iob-pips 30_74 30_80 31_67
LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK4 origin:037-iob-pips 31_67 31_75 31_79
LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK5 origin:037-iob-pips 31_67 31_75 31_81
LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO0 origin:037-iob-pips 30_78 31_67 31_75
LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_80 31_67 31_75
LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_76 31_67 31_79
LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_76 31_67 31_81
LIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IMUX20_0 origin:037-iob-pips 28_47 29_50 29_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IMUX22_0 origin:037-iob-pips 28_49 29_50 29_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IOCLK0 origin:037-iob-pips 28_49 28_51 29_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IOCLK1 origin:037-iob-pips 28_47 28_51 29_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IOCLK2 origin:037-iob-pips 29_48 29_50 29_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IOCLK3 origin:037-iob-pips 29_46 29_50 29_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK0 origin:037-iob-pips 28_53 29_48 29_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK1 origin:037-iob-pips 28_53 29_46 29_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK2 origin:037-iob-pips 28_49 28_53 29_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK3 origin:037-iob-pips 28_47 28_53 29_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK4 origin:037-iob-pips 29_48 29_52 29_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK5 origin:037-iob-pips 29_46 29_52 29_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO0 origin:037-iob-pips 28_49 29_52 29_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO1 origin:037-iob-pips 28_47 29_52 29_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO2 origin:037-iob-pips 28_51 29_48 29_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO3 origin:037-iob-pips 28_51 29_46 29_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IMUX20_0 origin:037-iob-pips 30_50 30_60 31_47
LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IMUX22_0 origin:037-iob-pips 30_50 30_60 31_49
LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_60 31_49 31_51
LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_60 31_47 31_51
LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK2 origin:037-iob-pips 30_48 30_50 30_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK3 origin:037-iob-pips 30_46 30_50 30_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK0 origin:037-iob-pips 30_48 30_60 31_53
LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK1 origin:037-iob-pips 30_46 30_60 31_53
LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK2 origin:037-iob-pips 30_60 31_49 31_53
LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK3 origin:037-iob-pips 30_60 31_47 31_53
LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK4 origin:037-iob-pips 30_48 30_52 30_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK5 origin:037-iob-pips 30_46 30_52 30_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO0 origin:037-iob-pips 30_52 30_60 31_49
LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_52 30_60 31_47
LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_48 30_60 31_51
LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_46 30_60 31_51
LIOI3_TBYTESRC.IOI_OCLKM_0.IOI_IOCLK0 origin:037-iob-pips 30_92 30_94 31_83
LIOI3_TBYTESRC.IOI_OCLKM_0.IOI_IOCLK1 origin:037-iob-pips 30_92 30_96 31_83
LIOI3_TBYTESRC.IOI_OCLKM_0.IOI_IOCLK2 origin:037-iob-pips 31_83 31_93 31_95
LIOI3_TBYTESRC.IOI_OCLKM_0.IOI_IOCLK3 origin:037-iob-pips 31_83 31_93 31_97
LIOI3_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK0 origin:037-iob-pips 30_88 31_83 31_95
LIOI3_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK1 origin:037-iob-pips 30_88 31_83 31_97
LIOI3_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK2 origin:037-iob-pips 30_88 30_94 31_83
LIOI3_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK3 origin:037-iob-pips 30_88 30_96 31_83
LIOI3_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK4 origin:037-iob-pips 31_83 31_89 31_95
LIOI3_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK5 origin:037-iob-pips 31_83 31_89 31_97
LIOI3_TBYTESRC.IOI_OCLKM_0.IOI_RCLK_FORIO0 origin:037-iob-pips 30_94 31_83 31_89
LIOI3_TBYTESRC.IOI_OCLKM_0.IOI_RCLK_FORIO1 origin:037-iob-pips 30_96 31_83 31_89
LIOI3_TBYTESRC.IOI_OCLKM_0.IOI_RCLK_FORIO2 origin:037-iob-pips 30_92 31_83 31_95
LIOI3_TBYTESRC.IOI_OCLKM_0.IOI_RCLK_FORIO3 origin:037-iob-pips 30_92 31_83 31_97
LIOI3_TBYTESRC.IOI_OCLKM_1.IOI_IOCLK0 origin:037-iob-pips 30_44 31_33 31_35
LIOI3_TBYTESRC.IOI_OCLKM_1.IOI_IOCLK1 origin:037-iob-pips 30_44 31_31 31_35
LIOI3_TBYTESRC.IOI_OCLKM_1.IOI_IOCLK2 origin:037-iob-pips 30_32 30_34 30_44
LIOI3_TBYTESRC.IOI_OCLKM_1.IOI_IOCLK3 origin:037-iob-pips 30_30 30_34 30_44
LIOI3_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK0 origin:037-iob-pips 30_32 30_44 31_39
LIOI3_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK1 origin:037-iob-pips 30_30 30_44 31_39
LIOI3_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK2 origin:037-iob-pips 30_44 31_33 31_39
LIOI3_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK3 origin:037-iob-pips 30_44 31_31 31_39
LIOI3_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK4 origin:037-iob-pips 30_32 30_38 30_44
LIOI3_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK5 origin:037-iob-pips 30_30 30_38 30_44
LIOI3_TBYTESRC.IOI_OCLKM_1.IOI_RCLK_FORIO0 origin:037-iob-pips 30_38 30_44 31_33
LIOI3_TBYTESRC.IOI_OCLKM_1.IOI_RCLK_FORIO1 origin:037-iob-pips 30_38 30_44 31_31
LIOI3_TBYTESRC.IOI_OCLKM_1.IOI_RCLK_FORIO2 origin:037-iob-pips 30_32 30_44 31_35
LIOI3_TBYTESRC.IOI_OCLKM_1.IOI_RCLK_FORIO3 origin:037-iob-pips 30_30 30_44 31_35
LIOI3_TBYTESRC.IOI_OCLK_0.IOI_IMUX31_1 origin:037-iob-pips 28_83 28_93 29_94
LIOI3_TBYTESRC.IOI_OCLK_0.IOI_IOCLK0 origin:037-iob-pips 28_83 29_92 29_94
LIOI3_TBYTESRC.IOI_OCLK_0.IOI_IOCLK1 origin:037-iob-pips 28_83 29_92 29_96
LIOI3_TBYTESRC.IOI_OCLK_0.IOI_IOCLK2 origin:037-iob-pips 28_83 28_93 28_95
LIOI3_TBYTESRC.IOI_OCLK_0.IOI_IOCLK3 origin:037-iob-pips 28_83 28_93 28_97
LIOI3_TBYTESRC.ILOGIC_Y1.IDELMUXE3.P0 origin:035-iob-ilogic 28_26
LIOI3_TBYTESRC.ILOGIC_Y1.IFFDELMUXE3.P0 origin:035-iob-ilogic 29_11
LIOI3_TBYTESRC.IOI_OCLK_0.IOI_LEAF_GCLK0 origin:037-iob-pips 28_83 28_95 29_88
LIOI3_TBYTESRC.IOI_OCLK_0.IOI_LEAF_GCLK1 origin:037-iob-pips 28_83 28_97 29_88
LIOI3_TBYTESRC.IOI_OCLK_0.IOI_LEAF_GCLK2 origin:037-iob-pips 28_83 29_88 29_94
@ -208,11 +112,11 @@ LIOI3_TBYTESRC.IOI_OCLK_0.IOI_RCLK_FORIO0 origin:037-iob-pips 28_83 28_89 29_94
LIOI3_TBYTESRC.IOI_OCLK_0.IOI_RCLK_FORIO1 origin:037-iob-pips 28_83 28_89 29_96
LIOI3_TBYTESRC.IOI_OCLK_0.IOI_RCLK_FORIO2 origin:037-iob-pips 28_83 28_95 29_92
LIOI3_TBYTESRC.IOI_OCLK_0.IOI_RCLK_FORIO3 origin:037-iob-pips 28_83 28_97 29_92
LIOI3_TBYTESRC.IOI_OCLK_1.IOI_IMUX31_0 origin:037-iob-pips 28_33 29_34 29_44
LIOI3_TBYTESRC.IOI_OCLK_1.IOI_IOCLK0 origin:037-iob-pips 28_33 28_35 29_44
LIOI3_TBYTESRC.IOI_OCLK_1.IOI_IOCLK1 origin:037-iob-pips 28_31 28_35 29_44
LIOI3_TBYTESRC.IOI_OCLK_1.IOI_IOCLK2 origin:037-iob-pips 29_32 29_34 29_44
LIOI3_TBYTESRC.IOI_OCLK_1.IOI_IOCLK3 origin:037-iob-pips 29_30 29_34 29_44
LIOI3_TBYTESRC.IOI_OCLK_0.IOI_IMUX31_1 origin:037-iob-pips 28_83 28_93 29_94
LIOI3_TBYTESRC.IOI_OCLK_0.IOI_IOCLK0 origin:037-iob-pips 28_83 29_92 29_94
LIOI3_TBYTESRC.IOI_OCLK_0.IOI_IOCLK1 origin:037-iob-pips 28_83 29_92 29_96
LIOI3_TBYTESRC.IOI_OCLK_0.IOI_IOCLK2 origin:037-iob-pips 28_83 28_93 28_95
LIOI3_TBYTESRC.IOI_OCLK_0.IOI_IOCLK3 origin:037-iob-pips 28_83 28_93 28_97
LIOI3_TBYTESRC.IOI_OCLK_1.IOI_LEAF_GCLK0 origin:037-iob-pips 28_39 29_32 29_44
LIOI3_TBYTESRC.IOI_OCLK_1.IOI_LEAF_GCLK1 origin:037-iob-pips 28_39 29_30 29_44
LIOI3_TBYTESRC.IOI_OCLK_1.IOI_LEAF_GCLK2 origin:037-iob-pips 28_33 28_39 29_44
@ -223,7 +127,102 @@ LIOI3_TBYTESRC.IOI_OCLK_1.IOI_RCLK_FORIO0 origin:037-iob-pips 28_33 29_38 29_44
LIOI3_TBYTESRC.IOI_OCLK_1.IOI_RCLK_FORIO1 origin:037-iob-pips 28_31 29_38 29_44
LIOI3_TBYTESRC.IOI_OCLK_1.IOI_RCLK_FORIO2 origin:037-iob-pips 28_35 29_32 29_44
LIOI3_TBYTESRC.IOI_OCLK_1.IOI_RCLK_FORIO3 origin:037-iob-pips 28_35 29_30 29_44
LIOI3_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_IMUX8_1 origin:037-iob-pips 28_111 28_121 28_123 31_111 31_121 31_123
LIOI3_TBYTESRC.IOI_OCLK_1.IOI_IMUX31_0 origin:037-iob-pips 28_33 29_34 29_44
LIOI3_TBYTESRC.IOI_OCLK_1.IOI_IOCLK0 origin:037-iob-pips 28_33 28_35 29_44
LIOI3_TBYTESRC.IOI_OCLK_1.IOI_IOCLK1 origin:037-iob-pips 28_31 28_35 29_44
LIOI3_TBYTESRC.IOI_OCLK_1.IOI_IOCLK2 origin:037-iob-pips 29_32 29_34 29_44
LIOI3_TBYTESRC.IOI_OCLK_1.IOI_IOCLK3 origin:037-iob-pips 29_30 29_34 29_44
LIOI3_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK0 origin:037-iob-pips 30_88 31_83 31_95
LIOI3_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK1 origin:037-iob-pips 30_88 31_83 31_97
LIOI3_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK2 origin:037-iob-pips 30_88 30_94 31_83
LIOI3_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK3 origin:037-iob-pips 30_88 30_96 31_83
LIOI3_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK4 origin:037-iob-pips 31_83 31_89 31_95
LIOI3_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK5 origin:037-iob-pips 31_83 31_89 31_97
LIOI3_TBYTESRC.IOI_OCLKM_0.IOI_RCLK_FORIO0 origin:037-iob-pips 30_94 31_83 31_89
LIOI3_TBYTESRC.IOI_OCLKM_0.IOI_RCLK_FORIO1 origin:037-iob-pips 30_96 31_83 31_89
LIOI3_TBYTESRC.IOI_OCLKM_0.IOI_RCLK_FORIO2 origin:037-iob-pips 30_92 31_83 31_95
LIOI3_TBYTESRC.IOI_OCLKM_0.IOI_RCLK_FORIO3 origin:037-iob-pips 30_92 31_83 31_97
LIOI3_TBYTESRC.IOI_OCLKM_0.IOI_IOCLK0 origin:037-iob-pips 30_92 30_94 31_83
LIOI3_TBYTESRC.IOI_OCLKM_0.IOI_IOCLK1 origin:037-iob-pips 30_92 30_96 31_83
LIOI3_TBYTESRC.IOI_OCLKM_0.IOI_IOCLK2 origin:037-iob-pips 31_83 31_93 31_95
LIOI3_TBYTESRC.IOI_OCLKM_0.IOI_IOCLK3 origin:037-iob-pips 31_83 31_93 31_97
LIOI3_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK0 origin:037-iob-pips 30_32 30_44 31_39
LIOI3_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK1 origin:037-iob-pips 30_30 30_44 31_39
LIOI3_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK2 origin:037-iob-pips 30_44 31_33 31_39
LIOI3_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK3 origin:037-iob-pips 30_44 31_31 31_39
LIOI3_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK4 origin:037-iob-pips 30_32 30_38 30_44
LIOI3_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK5 origin:037-iob-pips 30_30 30_38 30_44
LIOI3_TBYTESRC.IOI_OCLKM_1.IOI_RCLK_FORIO0 origin:037-iob-pips 30_38 30_44 31_33
LIOI3_TBYTESRC.IOI_OCLKM_1.IOI_RCLK_FORIO1 origin:037-iob-pips 30_38 30_44 31_31
LIOI3_TBYTESRC.IOI_OCLKM_1.IOI_RCLK_FORIO2 origin:037-iob-pips 30_32 30_44 31_35
LIOI3_TBYTESRC.IOI_OCLKM_1.IOI_RCLK_FORIO3 origin:037-iob-pips 30_30 30_44 31_35
LIOI3_TBYTESRC.IOI_OCLKM_1.IOI_IOCLK0 origin:037-iob-pips 30_44 31_33 31_35
LIOI3_TBYTESRC.IOI_OCLKM_1.IOI_IOCLK1 origin:037-iob-pips 30_44 31_31 31_35
LIOI3_TBYTESRC.IOI_OCLKM_1.IOI_IOCLK2 origin:037-iob-pips 30_32 30_34 30_44
LIOI3_TBYTESRC.IOI_OCLKM_1.IOI_IOCLK3 origin:037-iob-pips 30_30 30_34 30_44
LIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK0 origin:037-iob-pips 28_67 28_79 29_74
LIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK1 origin:037-iob-pips 28_67 28_81 29_74
LIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK2 origin:037-iob-pips 28_67 29_74 29_78
LIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK3 origin:037-iob-pips 28_67 29_74 29_80
LIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK4 origin:037-iob-pips 28_67 28_75 28_79
LIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK5 origin:037-iob-pips 28_67 28_75 28_81
LIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO0 origin:037-iob-pips 28_67 28_75 29_78
LIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO1 origin:037-iob-pips 28_67 28_75 29_80
LIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO2 origin:037-iob-pips 28_67 28_79 29_76
LIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO3 origin:037-iob-pips 28_67 28_81 29_76
LIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IMUX20_1 origin:037-iob-pips 28_67 28_77 29_80
LIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IMUX22_1 origin:037-iob-pips 28_67 28_77 29_78
LIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IOCLK0 origin:037-iob-pips 28_67 29_76 29_78
LIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IOCLK1 origin:037-iob-pips 28_67 29_76 29_80
LIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IOCLK2 origin:037-iob-pips 28_67 28_77 28_79
LIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IOCLK3 origin:037-iob-pips 28_67 28_77 28_81
LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK0 origin:037-iob-pips 30_74 31_67 31_79
LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK1 origin:037-iob-pips 30_74 31_67 31_81
LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK2 origin:037-iob-pips 30_74 30_78 31_67
LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK3 origin:037-iob-pips 30_74 30_80 31_67
LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK4 origin:037-iob-pips 31_67 31_75 31_79
LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK5 origin:037-iob-pips 31_67 31_75 31_81
LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO0 origin:037-iob-pips 30_78 31_67 31_75
LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_80 31_67 31_75
LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_76 31_67 31_79
LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_76 31_67 31_81
LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 origin:037-iob-pips 30_80 31_67 31_77
LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_76 30_78 31_67
LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_76 30_80 31_67
LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK2 origin:037-iob-pips 31_67 31_77 31_79
LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK3 origin:037-iob-pips 31_67 31_77 31_81
LIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK0 origin:037-iob-pips 28_53 29_48 29_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK1 origin:037-iob-pips 28_53 29_46 29_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK2 origin:037-iob-pips 28_49 28_53 29_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK3 origin:037-iob-pips 28_47 28_53 29_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK4 origin:037-iob-pips 29_48 29_52 29_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK5 origin:037-iob-pips 29_46 29_52 29_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO0 origin:037-iob-pips 28_49 29_52 29_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO1 origin:037-iob-pips 28_47 29_52 29_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO2 origin:037-iob-pips 28_51 29_48 29_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO3 origin:037-iob-pips 28_51 29_46 29_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IMUX20_0 origin:037-iob-pips 28_47 29_50 29_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IMUX22_0 origin:037-iob-pips 28_49 29_50 29_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IOCLK0 origin:037-iob-pips 28_49 28_51 29_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IOCLK1 origin:037-iob-pips 28_47 28_51 29_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IOCLK2 origin:037-iob-pips 29_48 29_50 29_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IOCLK3 origin:037-iob-pips 29_46 29_50 29_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK0 origin:037-iob-pips 30_48 30_60 31_53
LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK1 origin:037-iob-pips 30_46 30_60 31_53
LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK2 origin:037-iob-pips 30_60 31_49 31_53
LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK3 origin:037-iob-pips 30_60 31_47 31_53
LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK4 origin:037-iob-pips 30_48 30_52 30_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK5 origin:037-iob-pips 30_46 30_52 30_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO0 origin:037-iob-pips 30_52 30_60 31_49
LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_52 30_60 31_47
LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_48 30_60 31_51
LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_46 30_60 31_51
LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IMUX20_0 origin:037-iob-pips 30_50 30_60 31_47
LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IMUX22_0 origin:037-iob-pips 30_50 30_60 31_49
LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_60 31_49 31_51
LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_60 31_47 31_51
LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK2 origin:037-iob-pips 30_48 30_50 30_60
LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK3 origin:037-iob-pips 30_46 30_50 30_60
LIOI3_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK0 origin:037-iob-pips 28_111 29_118 29_124 30_118 30_124 31_111
LIOI3_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK1 origin:037-iob-pips 28_111 29_118 29_126 30_118 30_126 31_111
LIOI3_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK2 origin:037-iob-pips 28_111 28_123 29_118 30_118 31_111 31_123
@ -234,7 +233,7 @@ LIOI3_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO0 origin:037-iob-pips 28_111 28_
LIOI3_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO1 origin:037-iob-pips 28_111 28_119 28_125 31_111 31_119 31_125
LIOI3_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO2 origin:037-iob-pips 28_111 28_121 29_124 30_124 31_111 31_121
LIOI3_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO3 origin:037-iob-pips 28_111 28_121 29_126 30_126 31_111 31_121
LIOI3_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_IMUX8_0 origin:037-iob-pips 29_04 29_06 29_16 30_04 30_06 30_16
LIOI3_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_IMUX8_1 origin:037-iob-pips 28_111 28_121 28_123 31_111 31_121 31_123
LIOI3_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK0 origin:037-iob-pips 28_03 28_09 29_16 30_16 31_03 31_09
LIOI3_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK1 origin:037-iob-pips 28_01 28_09 29_16 30_16 31_01 31_09
LIOI3_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK2 origin:037-iob-pips 28_09 29_04 29_16 30_04 30_16 31_09
@ -245,6 +244,7 @@ LIOI3_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO0 origin:037-iob-pips 29_04 29_0
LIOI3_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO1 origin:037-iob-pips 29_02 29_08 29_16 30_02 30_08 30_16
LIOI3_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO2 origin:037-iob-pips 28_03 29_06 29_16 30_06 30_16 31_03
LIOI3_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO3 origin:037-iob-pips 28_01 29_06 29_16 30_06 30_16 31_01
LIOI3_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_IMUX8_0 origin:037-iob-pips 29_04 29_06 29_16 30_04 30_06 30_16
LIOI3_TBYTESRC.OLOGIC_Y0.IS_CLKDIV_INVERTED origin:036-iob-ologic 30_85
LIOI3_TBYTESRC.OLOGIC_Y0.IS_D1_INVERTED origin:036-iob-ologic 30_97
LIOI3_TBYTESRC.OLOGIC_Y0.IS_D2_INVERTED origin:036-iob-ologic 31_102

226
artix7/segbits_lioi3_tbyteterm.origin_info.db
View File

@ -3,8 +3,8 @@ LIOI3_TBYTETERM.IDELAY_Y0.DELAY_SRC_DATAIN origin:035a-iob-idelay !34_72 35_69
LIOI3_TBYTETERM.IDELAY_Y0.DELAY_SRC_IDATAIN origin:035a-iob-idelay !35_69 34_72
LIOI3_TBYTETERM.IDELAY_Y0.HIGH_PERFORMANCE_MODE origin:035a-iob-idelay 32_109
LIOI3_TBYTETERM.IDELAY_Y0.IDELAY_TYPE_FIXED origin:035a-iob-idelay !35_113 !35_119
LIOI3_TBYTETERM.IDELAY_Y0.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !35_113 35_119
LIOI3_TBYTETERM.IDELAY_Y0.IDELAY_TYPE_VAR_LOAD origin:035a-iob-idelay 35_113 35_119
LIOI3_TBYTETERM.IDELAY_Y0.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !35_113 35_119
LIOI3_TBYTETERM.IDELAY_Y0.IDELAY_VALUE[0] origin:035a-iob-idelay !34_120 34_122
LIOI3_TBYTETERM.IDELAY_Y0.IDELAY_VALUE[1] origin:035a-iob-idelay !34_114 34_116
LIOI3_TBYTETERM.IDELAY_Y0.IDELAY_VALUE[2] origin:035a-iob-idelay !34_108 34_110
@ -24,8 +24,8 @@ LIOI3_TBYTETERM.IDELAY_Y1.DELAY_SRC_DATAIN origin:035a-iob-idelay !35_55 34_58
LIOI3_TBYTETERM.IDELAY_Y1.DELAY_SRC_IDATAIN origin:035a-iob-idelay !34_58 35_55
LIOI3_TBYTETERM.IDELAY_Y1.HIGH_PERFORMANCE_MODE origin:035a-iob-idelay 33_18
LIOI3_TBYTETERM.IDELAY_Y1.IDELAY_TYPE_FIXED origin:035a-iob-idelay !34_08 !34_14
LIOI3_TBYTETERM.IDELAY_Y1.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !34_14 34_08
LIOI3_TBYTETERM.IDELAY_Y1.IDELAY_TYPE_VAR_LOAD origin:035a-iob-idelay 34_08 34_14
LIOI3_TBYTETERM.IDELAY_Y1.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !34_14 34_08
LIOI3_TBYTETERM.IDELAY_Y1.IDELAY_VALUE[0] origin:035a-iob-idelay !35_07 35_05
LIOI3_TBYTETERM.IDELAY_Y1.IDELAY_VALUE[1] origin:035a-iob-idelay !35_13 35_11
LIOI3_TBYTETERM.IDELAY_Y1.IDELAY_VALUE[2] origin:035a-iob-idelay !35_19 35_17
@ -40,10 +40,9 @@ LIOI3_TBYTETERM.IDELAY_Y1.ZIDELAY_VALUE[1] origin:035a-iob-idelay !35_11 35_13
LIOI3_TBYTETERM.IDELAY_Y1.ZIDELAY_VALUE[2] origin:035a-iob-idelay !35_17 35_19
LIOI3_TBYTETERM.IDELAY_Y1.ZIDELAY_VALUE[3] origin:035a-iob-idelay !35_25 35_27
LIOI3_TBYTETERM.IDELAY_Y1.ZIDELAY_VALUE[4] origin:035a-iob-idelay !35_31 35_33
LIOI3_TBYTETERM.ILOGIC_Y0.DYN_CLKDIV_INV_EN origin:035-iob-ilogic 27_118
LIOI3_TBYTETERM.ILOGIC_Y0.DYN_CLK_INV_EN origin:035-iob-ilogic 29_127
LIOI3_TBYTETERM.ILOGIC_Y0.DYN_CLKDIV_INV_EN origin:035-iob-ilogic 27_118
LIOI3_TBYTETERM.ILOGIC_Y0.IDDR_OR_ISERDES.IN_USE origin:035-iob-ilogic 26_71
LIOI3_TBYTETERM.ILOGIC_Y0.IDELMUXE3.P0 origin:035-iob-ilogic 29_101
LIOI3_TBYTETERM.ILOGIC_Y0.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE origin:035-iob-ilogic 27_98
LIOI3_TBYTETERM.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE origin:035-iob-ilogic 26_99
LIOI3_TBYTETERM.ILOGIC_Y0.IFF.INV_OCLK origin:035-iob-ilogic 28_124
@ -58,23 +57,23 @@ LIOI3_TBYTETERM.ILOGIC_Y0.IFF.ZSRVAL_Q1 origin:035-iob-ilogic 29_71
LIOI3_TBYTETERM.ILOGIC_Y0.IFF.ZSRVAL_Q2 origin:035-iob-ilogic 29_75
LIOI3_TBYTETERM.ILOGIC_Y0.IFF.ZSRVAL_Q3 origin:035-iob-ilogic 29_85
LIOI3_TBYTETERM.ILOGIC_Y0.IFF.ZSRVAL_Q4 origin:035-iob-ilogic 29_93
LIOI3_TBYTETERM.ILOGIC_Y0.IFFDELMUXE3.P0 origin:035-iob-ilogic 28_116
LIOI3_TBYTETERM.ILOGIC_Y0.ISERDES.DATA_RATE.SDR origin:035-iob-ilogic 27_108
LIOI3_TBYTETERM.ILOGIC_Y0.ISERDES.DATA_WIDTH.W3 origin:035-iob-ilogic !26_109 !27_110 27_112
LIOI3_TBYTETERM.ILOGIC_Y0.ISERDES.DATA_WIDTH.W4_6 origin:035-iob-ilogic !26_109 !27_112 27_110
LIOI3_TBYTETERM.ILOGIC_Y0.ISERDES.DATA_WIDTH.W5_7 origin:035-iob-ilogic !26_109 27_110 27_112
LIOI3_TBYTETERM.ILOGIC_Y0.ISERDES.DATA_WIDTH.W8 origin:035-iob-ilogic !27_110 !27_112 26_109
LIOI3_TBYTETERM.ILOGIC_Y0.ISERDES.IN_USE origin:035-iob-ilogic 27_102 27_70 28_110
LIOI3_TBYTETERM.ILOGIC_Y0.ISERDES.INTERFACE_TYPE.MEMORY_DDR3 origin:035-iob-ilogic 26_117
LIOI3_TBYTETERM.ILOGIC_Y0.ISERDES.INTERFACE_TYPE.NOT_MEMORY origin:035-iob-ilogic 26_107
LIOI3_TBYTETERM.ILOGIC_Y0.ISERDES.INTERFACE_TYPE.OVERSAMPLE origin:035-iob-ilogic 26_115
LIOI3_TBYTETERM.ILOGIC_Y0.ISERDES.INTERFACE_TYPE.Z_MEMORY origin:035-iob-ilogic 26_121
LIOI3_TBYTETERM.ILOGIC_Y0.ISERDES.IN_USE origin:035-iob-ilogic 27_102 27_70 28_110
LIOI3_TBYTETERM.ILOGIC_Y0.ISERDES.NUM_CE.N2 origin:035-iob-ilogic 27_80
LIOI3_TBYTETERM.ILOGIC_Y0.ZINV_D origin:035-iob-ilogic 29_109
LIOI3_TBYTETERM.ILOGIC_Y1.DYN_CLKDIV_INV_EN origin:035-iob-ilogic 26_09
LIOI3_TBYTETERM.ILOGIC_Y0.IDELMUXE3.P0 origin:035-iob-ilogic 29_101
LIOI3_TBYTETERM.ILOGIC_Y0.IFFDELMUXE3.P0 origin:035-iob-ilogic 28_116
LIOI3_TBYTETERM.ILOGIC_Y1.DYN_CLK_INV_EN origin:035-iob-ilogic 28_00
LIOI3_TBYTETERM.ILOGIC_Y1.DYN_CLKDIV_INV_EN origin:035-iob-ilogic 26_09
LIOI3_TBYTETERM.ILOGIC_Y1.IDDR_OR_ISERDES.IN_USE origin:035-iob-ilogic 27_56
LIOI3_TBYTETERM.ILOGIC_Y1.IDELMUXE3.P0 origin:035-iob-ilogic 28_26
LIOI3_TBYTETERM.ILOGIC_Y1.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE origin:035-iob-ilogic 26_29
LIOI3_TBYTETERM.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE origin:035-iob-ilogic 27_28
LIOI3_TBYTETERM.ILOGIC_Y1.IFF.INV_OCLK origin:035-iob-ilogic 29_03
@ -89,115 +88,20 @@ LIOI3_TBYTETERM.ILOGIC_Y1.IFF.ZSRVAL_Q1 origin:035-iob-ilogic 28_56
LIOI3_TBYTETERM.ILOGIC_Y1.IFF.ZSRVAL_Q2 origin:035-iob-ilogic 28_52
LIOI3_TBYTETERM.ILOGIC_Y1.IFF.ZSRVAL_Q3 origin:035-iob-ilogic 28_42
LIOI3_TBYTETERM.ILOGIC_Y1.IFF.ZSRVAL_Q4 origin:035-iob-ilogic 28_34
LIOI3_TBYTETERM.ILOGIC_Y1.IFFDELMUXE3.P0 origin:035-iob-ilogic 29_11
LIOI3_TBYTETERM.ILOGIC_Y1.ISERDES.DATA_RATE.SDR origin:035-iob-ilogic 26_19
LIOI3_TBYTETERM.ILOGIC_Y1.ISERDES.DATA_WIDTH.W3 origin:035-iob-ilogic !26_17 !27_18 26_15
LIOI3_TBYTETERM.ILOGIC_Y1.ISERDES.DATA_WIDTH.W4_6 origin:035-iob-ilogic !26_15 !27_18 26_17
LIOI3_TBYTETERM.ILOGIC_Y1.ISERDES.DATA_WIDTH.W5_7 origin:035-iob-ilogic !27_18 26_15 26_17
LIOI3_TBYTETERM.ILOGIC_Y1.ISERDES.DATA_WIDTH.W8 origin:035-iob-ilogic !26_15 !26_17 27_18
LIOI3_TBYTETERM.ILOGIC_Y1.ISERDES.IN_USE origin:035-iob-ilogic 26_25 26_57 29_17
LIOI3_TBYTETERM.ILOGIC_Y1.ISERDES.INTERFACE_TYPE.MEMORY_DDR3 origin:035-iob-ilogic 27_10
LIOI3_TBYTETERM.ILOGIC_Y1.ISERDES.INTERFACE_TYPE.NOT_MEMORY origin:035-iob-ilogic 27_20
LIOI3_TBYTETERM.ILOGIC_Y1.ISERDES.INTERFACE_TYPE.OVERSAMPLE origin:035-iob-ilogic 27_12
LIOI3_TBYTETERM.ILOGIC_Y1.ISERDES.INTERFACE_TYPE.Z_MEMORY origin:035-iob-ilogic 27_06
LIOI3_TBYTETERM.ILOGIC_Y1.ISERDES.IN_USE origin:035-iob-ilogic 26_25 26_57 29_17
LIOI3_TBYTETERM.ILOGIC_Y1.ISERDES.NUM_CE.N2 origin:035-iob-ilogic 26_47
LIOI3_TBYTETERM.ILOGIC_Y1.ZINV_D origin:035-iob-ilogic 28_18
LIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IMUX20_1 origin:037-iob-pips 28_67 28_77 29_80
LIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IMUX22_1 origin:037-iob-pips 28_67 28_77 29_78
LIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IOCLK0 origin:037-iob-pips 28_67 29_76 29_78
LIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IOCLK1 origin:037-iob-pips 28_67 29_76 29_80
LIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IOCLK2 origin:037-iob-pips 28_67 28_77 28_79
LIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IOCLK3 origin:037-iob-pips 28_67 28_77 28_81
LIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK0 origin:037-iob-pips 28_67 28_79 29_74
LIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK1 origin:037-iob-pips 28_67 28_81 29_74
LIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK2 origin:037-iob-pips 28_67 29_74 29_78
LIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK3 origin:037-iob-pips 28_67 29_74 29_80
LIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK4 origin:037-iob-pips 28_67 28_75 28_79
LIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK5 origin:037-iob-pips 28_67 28_75 28_81
LIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO0 origin:037-iob-pips 28_67 28_75 29_78
LIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO1 origin:037-iob-pips 28_67 28_75 29_80
LIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO2 origin:037-iob-pips 28_67 28_79 29_76
LIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO3 origin:037-iob-pips 28_67 28_81 29_76
LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 origin:037-iob-pips 30_80 31_67 31_77
LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_76 30_78 31_67
LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_76 30_80 31_67
LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK2 origin:037-iob-pips 31_67 31_77 31_79
LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK3 origin:037-iob-pips 31_67 31_77 31_81
LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK0 origin:037-iob-pips 30_74 31_67 31_79
LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK1 origin:037-iob-pips 30_74 31_67 31_81
LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK2 origin:037-iob-pips 30_74 30_78 31_67
LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK3 origin:037-iob-pips 30_74 30_80 31_67
LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK4 origin:037-iob-pips 31_67 31_75 31_79
LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK5 origin:037-iob-pips 31_67 31_75 31_81
LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO0 origin:037-iob-pips 30_78 31_67 31_75
LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_80 31_67 31_75
LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_76 31_67 31_79
LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_76 31_67 31_81
LIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IMUX20_0 origin:037-iob-pips 28_47 29_50 29_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IMUX22_0 origin:037-iob-pips 28_49 29_50 29_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IOCLK0 origin:037-iob-pips 28_49 28_51 29_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IOCLK1 origin:037-iob-pips 28_47 28_51 29_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IOCLK2 origin:037-iob-pips 29_48 29_50 29_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IOCLK3 origin:037-iob-pips 29_46 29_50 29_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK0 origin:037-iob-pips 28_53 29_48 29_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK1 origin:037-iob-pips 28_53 29_46 29_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK2 origin:037-iob-pips 28_49 28_53 29_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK3 origin:037-iob-pips 28_47 28_53 29_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK4 origin:037-iob-pips 29_48 29_52 29_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK5 origin:037-iob-pips 29_46 29_52 29_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO0 origin:037-iob-pips 28_49 29_52 29_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO1 origin:037-iob-pips 28_47 29_52 29_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO2 origin:037-iob-pips 28_51 29_48 29_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO3 origin:037-iob-pips 28_51 29_46 29_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IMUX20_0 origin:037-iob-pips 30_50 30_60 31_47
LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IMUX22_0 origin:037-iob-pips 30_50 30_60 31_49
LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_60 31_49 31_51
LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_60 31_47 31_51
LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK2 origin:037-iob-pips 30_48 30_50 30_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK3 origin:037-iob-pips 30_46 30_50 30_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK0 origin:037-iob-pips 30_48 30_60 31_53
LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK1 origin:037-iob-pips 30_46 30_60 31_53
LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK2 origin:037-iob-pips 30_60 31_49 31_53
LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK3 origin:037-iob-pips 30_60 31_47 31_53
LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK4 origin:037-iob-pips 30_48 30_52 30_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK5 origin:037-iob-pips 30_46 30_52 30_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO0 origin:037-iob-pips 30_52 30_60 31_49
LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_52 30_60 31_47
LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_48 30_60 31_51
LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_46 30_60 31_51
LIOI3_TBYTETERM.IOI_OCLKM_0.IOI_IOCLK0 origin:037-iob-pips 30_92 30_94 31_83
LIOI3_TBYTETERM.IOI_OCLKM_0.IOI_IOCLK1 origin:037-iob-pips 30_92 30_96 31_83
LIOI3_TBYTETERM.IOI_OCLKM_0.IOI_IOCLK2 origin:037-iob-pips 31_83 31_93 31_95
LIOI3_TBYTETERM.IOI_OCLKM_0.IOI_IOCLK3 origin:037-iob-pips 31_83 31_93 31_97
LIOI3_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK0 origin:037-iob-pips 30_88 31_83 31_95
LIOI3_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK1 origin:037-iob-pips 30_88 31_83 31_97
LIOI3_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK2 origin:037-iob-pips 30_88 30_94 31_83
LIOI3_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK3 origin:037-iob-pips 30_88 30_96 31_83
LIOI3_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK4 origin:037-iob-pips 31_83 31_89 31_95
LIOI3_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK5 origin:037-iob-pips 31_83 31_89 31_97
LIOI3_TBYTETERM.IOI_OCLKM_0.IOI_RCLK_FORIO0 origin:037-iob-pips 30_94 31_83 31_89
LIOI3_TBYTETERM.IOI_OCLKM_0.IOI_RCLK_FORIO1 origin:037-iob-pips 30_96 31_83 31_89
LIOI3_TBYTETERM.IOI_OCLKM_0.IOI_RCLK_FORIO2 origin:037-iob-pips 30_92 31_83 31_95
LIOI3_TBYTETERM.IOI_OCLKM_0.IOI_RCLK_FORIO3 origin:037-iob-pips 30_92 31_83 31_97
LIOI3_TBYTETERM.IOI_OCLKM_1.IOI_IOCLK0 origin:037-iob-pips 30_44 31_33 31_35
LIOI3_TBYTETERM.IOI_OCLKM_1.IOI_IOCLK1 origin:037-iob-pips 30_44 31_31 31_35
LIOI3_TBYTETERM.IOI_OCLKM_1.IOI_IOCLK2 origin:037-iob-pips 30_32 30_34 30_44
LIOI3_TBYTETERM.IOI_OCLKM_1.IOI_IOCLK3 origin:037-iob-pips 30_30 30_34 30_44
LIOI3_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK0 origin:037-iob-pips 30_32 30_44 31_39
LIOI3_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK1 origin:037-iob-pips 30_30 30_44 31_39
LIOI3_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK2 origin:037-iob-pips 30_44 31_33 31_39
LIOI3_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK3 origin:037-iob-pips 30_44 31_31 31_39
LIOI3_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK4 origin:037-iob-pips 30_32 30_38 30_44
LIOI3_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK5 origin:037-iob-pips 30_30 30_38 30_44
LIOI3_TBYTETERM.IOI_OCLKM_1.IOI_RCLK_FORIO0 origin:037-iob-pips 30_38 30_44 31_33
LIOI3_TBYTETERM.IOI_OCLKM_1.IOI_RCLK_FORIO1 origin:037-iob-pips 30_38 30_44 31_31
LIOI3_TBYTETERM.IOI_OCLKM_1.IOI_RCLK_FORIO2 origin:037-iob-pips 30_32 30_44 31_35
LIOI3_TBYTETERM.IOI_OCLKM_1.IOI_RCLK_FORIO3 origin:037-iob-pips 30_30 30_44 31_35
LIOI3_TBYTETERM.IOI_OCLK_0.IOI_IMUX31_1 origin:037-iob-pips 28_83 28_93 29_94
LIOI3_TBYTETERM.IOI_OCLK_0.IOI_IOCLK0 origin:037-iob-pips 28_83 29_92 29_94
LIOI3_TBYTETERM.IOI_OCLK_0.IOI_IOCLK1 origin:037-iob-pips 28_83 29_92 29_96
LIOI3_TBYTETERM.IOI_OCLK_0.IOI_IOCLK2 origin:037-iob-pips 28_83 28_93 28_95
LIOI3_TBYTETERM.IOI_OCLK_0.IOI_IOCLK3 origin:037-iob-pips 28_83 28_93 28_97
LIOI3_TBYTETERM.ILOGIC_Y1.IDELMUXE3.P0 origin:035-iob-ilogic 28_26
LIOI3_TBYTETERM.ILOGIC_Y1.IFFDELMUXE3.P0 origin:035-iob-ilogic 29_11
LIOI3_TBYTETERM.IOI_OCLK_0.IOI_LEAF_GCLK0 origin:037-iob-pips 28_83 28_95 29_88
LIOI3_TBYTETERM.IOI_OCLK_0.IOI_LEAF_GCLK1 origin:037-iob-pips 28_83 28_97 29_88
LIOI3_TBYTETERM.IOI_OCLK_0.IOI_LEAF_GCLK2 origin:037-iob-pips 28_83 29_88 29_94
@ -208,11 +112,11 @@ LIOI3_TBYTETERM.IOI_OCLK_0.IOI_RCLK_FORIO0 origin:037-iob-pips 28_83 28_89 29_94
LIOI3_TBYTETERM.IOI_OCLK_0.IOI_RCLK_FORIO1 origin:037-iob-pips 28_83 28_89 29_96
LIOI3_TBYTETERM.IOI_OCLK_0.IOI_RCLK_FORIO2 origin:037-iob-pips 28_83 28_95 29_92
LIOI3_TBYTETERM.IOI_OCLK_0.IOI_RCLK_FORIO3 origin:037-iob-pips 28_83 28_97 29_92
LIOI3_TBYTETERM.IOI_OCLK_1.IOI_IMUX31_0 origin:037-iob-pips 28_33 29_34 29_44
LIOI3_TBYTETERM.IOI_OCLK_1.IOI_IOCLK0 origin:037-iob-pips 28_33 28_35 29_44
LIOI3_TBYTETERM.IOI_OCLK_1.IOI_IOCLK1 origin:037-iob-pips 28_31 28_35 29_44
LIOI3_TBYTETERM.IOI_OCLK_1.IOI_IOCLK2 origin:037-iob-pips 29_32 29_34 29_44
LIOI3_TBYTETERM.IOI_OCLK_1.IOI_IOCLK3 origin:037-iob-pips 29_30 29_34 29_44
LIOI3_TBYTETERM.IOI_OCLK_0.IOI_IMUX31_1 origin:037-iob-pips 28_83 28_93 29_94
LIOI3_TBYTETERM.IOI_OCLK_0.IOI_IOCLK0 origin:037-iob-pips 28_83 29_92 29_94
LIOI3_TBYTETERM.IOI_OCLK_0.IOI_IOCLK1 origin:037-iob-pips 28_83 29_92 29_96
LIOI3_TBYTETERM.IOI_OCLK_0.IOI_IOCLK2 origin:037-iob-pips 28_83 28_93 28_95
LIOI3_TBYTETERM.IOI_OCLK_0.IOI_IOCLK3 origin:037-iob-pips 28_83 28_93 28_97
LIOI3_TBYTETERM.IOI_OCLK_1.IOI_LEAF_GCLK0 origin:037-iob-pips 28_39 29_32 29_44
LIOI3_TBYTETERM.IOI_OCLK_1.IOI_LEAF_GCLK1 origin:037-iob-pips 28_39 29_30 29_44
LIOI3_TBYTETERM.IOI_OCLK_1.IOI_LEAF_GCLK2 origin:037-iob-pips 28_33 28_39 29_44
@ -223,7 +127,102 @@ LIOI3_TBYTETERM.IOI_OCLK_1.IOI_RCLK_FORIO0 origin:037-iob-pips 28_33 29_38 29_44
LIOI3_TBYTETERM.IOI_OCLK_1.IOI_RCLK_FORIO1 origin:037-iob-pips 28_31 29_38 29_44
LIOI3_TBYTETERM.IOI_OCLK_1.IOI_RCLK_FORIO2 origin:037-iob-pips 28_35 29_32 29_44
LIOI3_TBYTETERM.IOI_OCLK_1.IOI_RCLK_FORIO3 origin:037-iob-pips 28_35 29_30 29_44
LIOI3_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_IMUX8_1 origin:037-iob-pips 28_111 28_121 28_123 31_111 31_121 31_123
LIOI3_TBYTETERM.IOI_OCLK_1.IOI_IMUX31_0 origin:037-iob-pips 28_33 29_34 29_44
LIOI3_TBYTETERM.IOI_OCLK_1.IOI_IOCLK0 origin:037-iob-pips 28_33 28_35 29_44
LIOI3_TBYTETERM.IOI_OCLK_1.IOI_IOCLK1 origin:037-iob-pips 28_31 28_35 29_44
LIOI3_TBYTETERM.IOI_OCLK_1.IOI_IOCLK2 origin:037-iob-pips 29_32 29_34 29_44
LIOI3_TBYTETERM.IOI_OCLK_1.IOI_IOCLK3 origin:037-iob-pips 29_30 29_34 29_44
LIOI3_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK0 origin:037-iob-pips 30_88 31_83 31_95
LIOI3_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK1 origin:037-iob-pips 30_88 31_83 31_97
LIOI3_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK2 origin:037-iob-pips 30_88 30_94 31_83
LIOI3_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK3 origin:037-iob-pips 30_88 30_96 31_83
LIOI3_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK4 origin:037-iob-pips 31_83 31_89 31_95
LIOI3_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK5 origin:037-iob-pips 31_83 31_89 31_97
LIOI3_TBYTETERM.IOI_OCLKM_0.IOI_RCLK_FORIO0 origin:037-iob-pips 30_94 31_83 31_89
LIOI3_TBYTETERM.IOI_OCLKM_0.IOI_RCLK_FORIO1 origin:037-iob-pips 30_96 31_83 31_89
LIOI3_TBYTETERM.IOI_OCLKM_0.IOI_RCLK_FORIO2 origin:037-iob-pips 30_92 31_83 31_95
LIOI3_TBYTETERM.IOI_OCLKM_0.IOI_RCLK_FORIO3 origin:037-iob-pips 30_92 31_83 31_97
LIOI3_TBYTETERM.IOI_OCLKM_0.IOI_IOCLK0 origin:037-iob-pips 30_92 30_94 31_83
LIOI3_TBYTETERM.IOI_OCLKM_0.IOI_IOCLK1 origin:037-iob-pips 30_92 30_96 31_83
LIOI3_TBYTETERM.IOI_OCLKM_0.IOI_IOCLK2 origin:037-iob-pips 31_83 31_93 31_95
LIOI3_TBYTETERM.IOI_OCLKM_0.IOI_IOCLK3 origin:037-iob-pips 31_83 31_93 31_97
LIOI3_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK0 origin:037-iob-pips 30_32 30_44 31_39
LIOI3_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK1 origin:037-iob-pips 30_30 30_44 31_39
LIOI3_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK2 origin:037-iob-pips 30_44 31_33 31_39
LIOI3_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK3 origin:037-iob-pips 30_44 31_31 31_39
LIOI3_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK4 origin:037-iob-pips 30_32 30_38 30_44
LIOI3_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK5 origin:037-iob-pips 30_30 30_38 30_44
LIOI3_TBYTETERM.IOI_OCLKM_1.IOI_RCLK_FORIO0 origin:037-iob-pips 30_38 30_44 31_33
LIOI3_TBYTETERM.IOI_OCLKM_1.IOI_RCLK_FORIO1 origin:037-iob-pips 30_38 30_44 31_31
LIOI3_TBYTETERM.IOI_OCLKM_1.IOI_RCLK_FORIO2 origin:037-iob-pips 30_32 30_44 31_35
LIOI3_TBYTETERM.IOI_OCLKM_1.IOI_RCLK_FORIO3 origin:037-iob-pips 30_30 30_44 31_35
LIOI3_TBYTETERM.IOI_OCLKM_1.IOI_IOCLK0 origin:037-iob-pips 30_44 31_33 31_35
LIOI3_TBYTETERM.IOI_OCLKM_1.IOI_IOCLK1 origin:037-iob-pips 30_44 31_31 31_35
LIOI3_TBYTETERM.IOI_OCLKM_1.IOI_IOCLK2 origin:037-iob-pips 30_32 30_34 30_44
LIOI3_TBYTETERM.IOI_OCLKM_1.IOI_IOCLK3 origin:037-iob-pips 30_30 30_34 30_44
LIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK0 origin:037-iob-pips 28_67 28_79 29_74
LIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK1 origin:037-iob-pips 28_67 28_81 29_74
LIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK2 origin:037-iob-pips 28_67 29_74 29_78
LIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK3 origin:037-iob-pips 28_67 29_74 29_80
LIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK4 origin:037-iob-pips 28_67 28_75 28_79
LIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK5 origin:037-iob-pips 28_67 28_75 28_81
LIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO0 origin:037-iob-pips 28_67 28_75 29_78
LIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO1 origin:037-iob-pips 28_67 28_75 29_80
LIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO2 origin:037-iob-pips 28_67 28_79 29_76
LIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO3 origin:037-iob-pips 28_67 28_81 29_76
LIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IMUX20_1 origin:037-iob-pips 28_67 28_77 29_80
LIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IMUX22_1 origin:037-iob-pips 28_67 28_77 29_78
LIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IOCLK0 origin:037-iob-pips 28_67 29_76 29_78
LIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IOCLK1 origin:037-iob-pips 28_67 29_76 29_80
LIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IOCLK2 origin:037-iob-pips 28_67 28_77 28_79
LIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IOCLK3 origin:037-iob-pips 28_67 28_77 28_81
LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK0 origin:037-iob-pips 30_74 31_67 31_79
LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK1 origin:037-iob-pips 30_74 31_67 31_81
LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK2 origin:037-iob-pips 30_74 30_78 31_67
LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK3 origin:037-iob-pips 30_74 30_80 31_67
LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK4 origin:037-iob-pips 31_67 31_75 31_79
LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK5 origin:037-iob-pips 31_67 31_75 31_81
LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO0 origin:037-iob-pips 30_78 31_67 31_75
LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_80 31_67 31_75
LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_76 31_67 31_79
LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_76 31_67 31_81
LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 origin:037-iob-pips 30_80 31_67 31_77
LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_76 30_78 31_67
LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_76 30_80 31_67
LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK2 origin:037-iob-pips 31_67 31_77 31_79
LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK3 origin:037-iob-pips 31_67 31_77 31_81
LIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK0 origin:037-iob-pips 28_53 29_48 29_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK1 origin:037-iob-pips 28_53 29_46 29_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK2 origin:037-iob-pips 28_49 28_53 29_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK3 origin:037-iob-pips 28_47 28_53 29_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK4 origin:037-iob-pips 29_48 29_52 29_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK5 origin:037-iob-pips 29_46 29_52 29_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO0 origin:037-iob-pips 28_49 29_52 29_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO1 origin:037-iob-pips 28_47 29_52 29_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO2 origin:037-iob-pips 28_51 29_48 29_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO3 origin:037-iob-pips 28_51 29_46 29_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IMUX20_0 origin:037-iob-pips 28_47 29_50 29_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IMUX22_0 origin:037-iob-pips 28_49 29_50 29_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IOCLK0 origin:037-iob-pips 28_49 28_51 29_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IOCLK1 origin:037-iob-pips 28_47 28_51 29_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IOCLK2 origin:037-iob-pips 29_48 29_50 29_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IOCLK3 origin:037-iob-pips 29_46 29_50 29_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK0 origin:037-iob-pips 30_48 30_60 31_53
LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK1 origin:037-iob-pips 30_46 30_60 31_53
LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK2 origin:037-iob-pips 30_60 31_49 31_53
LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK3 origin:037-iob-pips 30_60 31_47 31_53
LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK4 origin:037-iob-pips 30_48 30_52 30_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK5 origin:037-iob-pips 30_46 30_52 30_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO0 origin:037-iob-pips 30_52 30_60 31_49
LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_52 30_60 31_47
LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_48 30_60 31_51
LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_46 30_60 31_51
LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IMUX20_0 origin:037-iob-pips 30_50 30_60 31_47
LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IMUX22_0 origin:037-iob-pips 30_50 30_60 31_49
LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_60 31_49 31_51
LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_60 31_47 31_51
LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK2 origin:037-iob-pips 30_48 30_50 30_60
LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK3 origin:037-iob-pips 30_46 30_50 30_60
LIOI3_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK0 origin:037-iob-pips 28_111 29_118 29_124 30_118 30_124 31_111
LIOI3_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK1 origin:037-iob-pips 28_111 29_118 29_126 30_118 30_126 31_111
LIOI3_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK2 origin:037-iob-pips 28_111 28_123 29_118 30_118 31_111 31_123
@ -234,7 +233,7 @@ LIOI3_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO0 origin:037-iob-pips 28_111 28
LIOI3_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO1 origin:037-iob-pips 28_111 28_119 28_125 31_111 31_119 31_125
LIOI3_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO2 origin:037-iob-pips 28_111 28_121 29_124 30_124 31_111 31_121
LIOI3_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO3 origin:037-iob-pips 28_111 28_121 29_126 30_126 31_111 31_121
LIOI3_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_IMUX8_0 origin:037-iob-pips 29_04 29_06 29_16 30_04 30_06 30_16
LIOI3_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_IMUX8_1 origin:037-iob-pips 28_111 28_121 28_123 31_111 31_121 31_123
LIOI3_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK0 origin:037-iob-pips 28_03 28_09 29_16 30_16 31_03 31_09
LIOI3_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK1 origin:037-iob-pips 28_01 28_09 29_16 30_16 31_01 31_09
LIOI3_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK2 origin:037-iob-pips 28_09 29_04 29_16 30_04 30_16 31_09
@ -245,6 +244,7 @@ LIOI3_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO0 origin:037-iob-pips 29_04 29_
LIOI3_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO1 origin:037-iob-pips 29_02 29_08 29_16 30_02 30_08 30_16
LIOI3_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO2 origin:037-iob-pips 28_03 29_06 29_16 30_06 30_16 31_03
LIOI3_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO3 origin:037-iob-pips 28_01 29_06 29_16 30_06 30_16 31_01
LIOI3_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_IMUX8_0 origin:037-iob-pips 29_04 29_06 29_16 30_04 30_06 30_16
LIOI3_TBYTETERM.OLOGIC_Y0.IS_CLKDIV_INVERTED origin:036-iob-ologic 30_85
LIOI3_TBYTETERM.OLOGIC_Y0.IS_D1_INVERTED origin:036-iob-ologic 30_97
LIOI3_TBYTETERM.OLOGIC_Y0.IS_D2_INVERTED origin:036-iob-ologic 31_102

44
artix7/segbits_riob33.origin_info.db
View File

@ -1,19 +1,25 @@
RIOB33.IOB_Y0.IBUFDISABLE.I origin:030-iob 38_82
RIOB33.IOB_Y0.INTERMDISABLE.I origin:030-iob 39_89
RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_120 38_122 39_121 39_123
RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob 38_120 38_122 39_123
RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob 38_120 39_123
RIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 origin:030-iob !38_118 !39_117 !39_119 !39_125 38_112 38_126 38_64 39_113 39_127 39_65
RIOB33.IOB_Y0.INTERMDISABLE.I origin:030-iob 39_89
RIOB33.IOB_Y0.LVTTL.DRIVE.I24 origin:030-iob !38_112 !38_118 !39_125 !39_127 38_126 38_64 39_117 39_119 39_65
RIOB33.IOB_Y0.PULLTYPE.KEEPER origin:030-iob !39_93 38_92 38_94
RIOB33.IOB_Y0.PULLTYPE.NONE origin:030-iob !38_92 !39_93 38_94
RIOB33.IOB_Y0.PULLTYPE.PULLDOWN origin:030-iob !38_92 !38_94 !39_93
RIOB33.IOB_Y0.PULLTYPE.PULLUP origin:030-iob !38_92 38_94 39_93
RIOB33.IOB_Y0.ZIBUF_LOW_PWR origin:030-iob 38_84
RIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 origin:030-iob !39_117 !39_119 !39_127 38_112 38_118 38_126 38_64 39_113 39_125 39_65
RIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 origin:030-iob !38_118 !39_117 !39_119 !39_125 38_112 38_126 38_64 39_113 39_127 39_65
RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18.IN origin:030-iob !39_87 38_86 39_85
RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST origin:030-iob !38_106 !38_110 !39_105 !39_107 !39_109 !39_111
RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY origin:030-iob !38_112 !38_126 !38_64 !39_117 !39_127 !39_65 38_118 39_113 39_119 39_125
RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW origin:030-iob !39_107 !39_111 38_106 38_110 39_105 39_109
RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN origin:030-iob 39_95
RIOB33.IOB_Y0.LVCMOS12_LVCMOS25.DRIVE.I8 origin:030-iob !38_118 !38_126 !39_117 !39_125 !39_127 38_112 38_64 39_113 39_119 39_65
RIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 origin:030-iob !38_118 !39_117 38_112 38_126 38_64 39_113 39_119 39_125 39_127 39_65
RIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 origin:030-iob !38_118 !38_126 !39_117 !39_119 !39_125 38_112 38_64 39_113 39_127 39_65
RIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 origin:030-iob !39_119 !39_125 38_112 38_118 38_126 38_64 39_113 39_117 39_127 39_65
RIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 origin:030-iob !38_118 !39_117 38_112 38_126 38_64 39_113 39_119 39_125 39_127 39_65
RIOB33.IOB_Y0.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 origin:030-iob !38_126 !39_117 !39_119 38_112 38_118 38_64 39_113 39_125 39_127 39_65
RIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 origin:030-iob !38_118 !39_117 !39_127 38_112 38_126 38_64 39_113 39_119 39_125 39_65
RIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 origin:030-iob !38_118 !39_117 !39_119 38_112 38_126 38_64 39_113 39_125 39_127 39_65
@ -22,35 +28,35 @@ RIOB33.IOB_Y0.LVCMOS25.DRIVE.I12 origin:030-iob !38_118 !38_126 !39_117 !39_119
RIOB33.IOB_Y0.LVCMOS25.DRIVE.I16 origin:030-iob !39_119 !39_125 !39_127 38_112 38_118 38_126 38_64 39_113 39_117 39_65
RIOB33.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN origin:030-iob 38_86 39_85 39_87
RIOB33.IOB_Y0.LVCMOS33.DRIVE.I16 origin:030-iob !38_112 !38_126 !39_119 !39_125 38_118 38_64 39_117 39_127 39_65
RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16 origin:030-iob !38_112 !38_118 !39_117 !39_119 38_126 38_64 39_125 39_127 39_65
RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I8 origin:030-iob !38_112 !38_118 !39_117 !39_127 38_126 38_64 39_119 39_125 39_65
RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I4 origin:030-iob !38_112 !38_126 !39_117 !39_119 38_118 38_64 39_125 39_127 39_65
RIOB33.IOB_Y0.LVTTL.DRIVE.I24 origin:030-iob !38_112 !38_118 !39_125 !39_127 38_126 38_64 39_117 39_119 39_65
RIOB33.IOB_Y0.PULLTYPE.KEEPER origin:030-iob !39_93 38_92 38_94
RIOB33.IOB_Y0.PULLTYPE.NONE origin:030-iob !38_92 !39_93 38_94
RIOB33.IOB_Y0.PULLTYPE.PULLDOWN origin:030-iob !38_92 !38_94 !39_93
RIOB33.IOB_Y0.PULLTYPE.PULLUP origin:030-iob !38_92 38_94 39_93
RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I8 origin:030-iob !38_112 !38_118 !39_117 !39_127 38_126 38_64 39_119 39_125 39_65
RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16 origin:030-iob !38_112 !38_118 !39_117 !39_119 38_126 38_64 39_125 39_127 39_65
RIOB33.IOB_Y0.SSTL135.DRIVE.I_FIXED origin:030-iob !39_125 38_112 38_118 38_126 38_64 39_113 39_117 39_119 39_127 39_65
RIOB33.IOB_Y0.SSTL135.IN origin:030-iob !38_86 !39_85 39_87
RIOB33.IOB_Y0.SSTL135.IN_DIFF origin:030-iob !39_85 38_86 39_87
RIOB33.IOB_Y0.SSTL135.SLEW.FAST origin:030-iob !38_106 38_110 39_105 39_107 39_109 39_111
RIOB33.IOB_Y0.ZIBUF_LOW_PWR origin:030-iob 38_84
RIOB33.IOB_Y1.IBUFDISABLE.I origin:030-iob 39_45
RIOB33.IOB_Y1.INTERMDISABLE.I origin:030-iob 38_38
RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_04 38_06 39_05 39_07
RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob 38_04 39_05 39_07
RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob 38_04 39_07
RIOB33.IOB_Y1.LVCMOS12.DRIVE.I12 origin:030-iob !38_02 !38_08 !38_10 !39_09 38_00 38_14 38_62 39_01 39_15 39_63
RIOB33.IOB_Y1.INTERMDISABLE.I origin:030-iob 38_38
RIOB33.IOB_Y1.LVTTL.DRIVE.I24 origin:030-iob !38_00 !38_02 !39_09 !39_15 38_08 38_10 38_62 39_01 39_63
RIOB33.IOB_Y1.PULLTYPE.KEEPER origin:030-iob !38_34 39_33 39_35
RIOB33.IOB_Y1.PULLTYPE.NONE origin:030-iob !38_34 !39_35 39_33
RIOB33.IOB_Y1.PULLTYPE.PULLDOWN origin:030-iob !38_34 !39_33 !39_35
RIOB33.IOB_Y1.PULLTYPE.PULLUP origin:030-iob !39_35 38_34 39_33
RIOB33.IOB_Y1.ZIBUF_LOW_PWR origin:030-iob 39_43
RIOB33.IOB_Y1.LVCMOS12.DRIVE.I4 origin:030-iob !38_00 !38_08 !38_10 38_02 38_14 38_62 39_01 39_09 39_15 39_63
RIOB33.IOB_Y1.LVCMOS12.DRIVE.I12 origin:030-iob !38_02 !38_08 !38_10 !39_09 38_00 38_14 38_62 39_01 39_15 39_63
RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18.IN origin:030-iob !38_40 38_42 39_41
RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST origin:030-iob !38_16 !38_18 !38_20 !38_22 !39_17 !39_21
RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY origin:030-iob !38_00 !38_10 !38_62 !39_01 !39_15 !39_63 38_02 38_08 38_14 39_09
RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW origin:030-iob !38_16 !38_20 38_18 38_22 39_17 39_21
RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN origin:030-iob 38_32
RIOB33.IOB_Y1.LVCMOS12_LVCMOS25.DRIVE.I8 origin:030-iob !38_00 !38_02 !38_10 !39_01 !39_09 38_08 38_14 38_62 39_15 39_63
RIOB33.IOB_Y1.LVCMOS15.DRIVE.I8 origin:030-iob !38_10 !39_09 38_00 38_02 38_08 38_14 38_62 39_01 39_15 39_63
RIOB33.IOB_Y1.LVCMOS15.DRIVE.I12 origin:030-iob !38_02 !38_08 !38_10 !39_01 !39_09 38_00 38_14 38_62 39_15 39_63
RIOB33.IOB_Y1.LVCMOS15.DRIVE.I16 origin:030-iob !38_02 !38_08 38_00 38_10 38_14 38_62 39_01 39_09 39_15 39_63
RIOB33.IOB_Y1.LVCMOS15.DRIVE.I8 origin:030-iob !38_10 !39_09 38_00 38_02 38_08 38_14 38_62 39_01 39_15 39_63
RIOB33.IOB_Y1.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 origin:030-iob !38_08 !38_10 !39_01 38_00 38_02 38_14 38_62 39_09 39_15 39_63
RIOB33.IOB_Y1.LVCMOS18.DRIVE.I12_I8 origin:030-iob !38_00 !38_10 !39_09 38_02 38_08 38_14 38_62 39_01 39_15 39_63
RIOB33.IOB_Y1.LVCMOS18.DRIVE.I16 origin:030-iob !38_08 !38_10 !39_09 38_00 38_02 38_14 38_62 39_01 39_15 39_63
@ -59,16 +65,10 @@ RIOB33.IOB_Y1.LVCMOS25.DRIVE.I12 origin:030-iob !38_00 !38_02 !38_08 !38_10 !39_
RIOB33.IOB_Y1.LVCMOS25.DRIVE.I16 origin:030-iob !38_00 !38_02 !38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
RIOB33.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN origin:030-iob 38_40 38_42 39_41
RIOB33.IOB_Y1.LVCMOS33.DRIVE.I16 origin:030-iob !38_02 !38_08 !39_01 !39_15 38_00 38_10 38_62 39_09 39_63
RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16 origin:030-iob !38_08 !38_10 !39_09 !39_15 38_00 38_02 38_62 39_01 39_63
RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I8 origin:030-iob !38_00 !38_10 !39_09 !39_15 38_02 38_08 38_62 39_01 39_63
RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I4 origin:030-iob !38_08 !38_10 !39_01 !39_15 38_00 38_02 38_62 39_09 39_63
RIOB33.IOB_Y1.LVTTL.DRIVE.I24 origin:030-iob !38_00 !38_02 !39_09 !39_15 38_08 38_10 38_62 39_01 39_63
RIOB33.IOB_Y1.PULLTYPE.KEEPER origin:030-iob !38_34 39_33 39_35
RIOB33.IOB_Y1.PULLTYPE.NONE origin:030-iob !38_34 !39_35 39_33
RIOB33.IOB_Y1.PULLTYPE.PULLDOWN origin:030-iob !38_34 !39_33 !39_35
RIOB33.IOB_Y1.PULLTYPE.PULLUP origin:030-iob !39_35 38_34 39_33
RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I8 origin:030-iob !38_00 !38_10 !39_09 !39_15 38_02 38_08 38_62 39_01 39_63
RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16 origin:030-iob !38_08 !38_10 !39_09 !39_15 38_00 38_02 38_62 39_01 39_63
RIOB33.IOB_Y1.SSTL135.DRIVE.I_FIXED origin:030-iob !38_02 38_00 38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
RIOB33.IOB_Y1.SSTL135.IN origin:030-iob !38_42 !39_41 38_40
RIOB33.IOB_Y1.SSTL135.SLEW.FAST origin:030-iob !39_21 38_16 38_18 38_20 38_22 39_17
RIOB33.IOB_Y1.ZIBUF_LOW_PWR origin:030-iob 39_43
RIOB33.OUT_DIFF origin:030-iob 39_59 39_61

226
artix7/segbits_rioi3.origin_info.db
View File

@ -3,8 +3,8 @@ RIOI3.IDELAY_Y0.DELAY_SRC_DATAIN origin:035a-iob-idelay !34_72 35_69
RIOI3.IDELAY_Y0.DELAY_SRC_IDATAIN origin:035a-iob-idelay !35_69 34_72
RIOI3.IDELAY_Y0.HIGH_PERFORMANCE_MODE origin:035a-iob-idelay 32_109
RIOI3.IDELAY_Y0.IDELAY_TYPE_FIXED origin:035a-iob-idelay !35_113 !35_119
RIOI3.IDELAY_Y0.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !35_113 35_119
RIOI3.IDELAY_Y0.IDELAY_TYPE_VAR_LOAD origin:035a-iob-idelay 35_113 35_119
RIOI3.IDELAY_Y0.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !35_113 35_119
RIOI3.IDELAY_Y0.IDELAY_VALUE[0] origin:035a-iob-idelay !34_120 34_122
RIOI3.IDELAY_Y0.IDELAY_VALUE[1] origin:035a-iob-idelay !34_114 34_116
RIOI3.IDELAY_Y0.IDELAY_VALUE[2] origin:035a-iob-idelay !34_108 34_110
@ -24,8 +24,8 @@ RIOI3.IDELAY_Y1.DELAY_SRC_DATAIN origin:035a-iob-idelay !35_55 34_58
RIOI3.IDELAY_Y1.DELAY_SRC_IDATAIN origin:035a-iob-idelay !34_58 35_55
RIOI3.IDELAY_Y1.HIGH_PERFORMANCE_MODE origin:035a-iob-idelay 33_18
RIOI3.IDELAY_Y1.IDELAY_TYPE_FIXED origin:035a-iob-idelay !34_08 !34_14
RIOI3.IDELAY_Y1.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !34_14 34_08
RIOI3.IDELAY_Y1.IDELAY_TYPE_VAR_LOAD origin:035a-iob-idelay 34_08 34_14
RIOI3.IDELAY_Y1.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !34_14 34_08
RIOI3.IDELAY_Y1.IDELAY_VALUE[0] origin:035a-iob-idelay !35_07 35_05
RIOI3.IDELAY_Y1.IDELAY_VALUE[1] origin:035a-iob-idelay !35_13 35_11
RIOI3.IDELAY_Y1.IDELAY_VALUE[2] origin:035a-iob-idelay !35_19 35_17
@ -40,10 +40,9 @@ RIOI3.IDELAY_Y1.ZIDELAY_VALUE[1] origin:035a-iob-idelay !35_11 35_13
RIOI3.IDELAY_Y1.ZIDELAY_VALUE[2] origin:035a-iob-idelay !35_17 35_19
RIOI3.IDELAY_Y1.ZIDELAY_VALUE[3] origin:035a-iob-idelay !35_25 35_27
RIOI3.IDELAY_Y1.ZIDELAY_VALUE[4] origin:035a-iob-idelay !35_31 35_33
RIOI3.ILOGIC_Y0.DYN_CLKDIV_INV_EN origin:035-iob-ilogic 27_118
RIOI3.ILOGIC_Y0.DYN_CLK_INV_EN origin:035-iob-ilogic 29_127
RIOI3.ILOGIC_Y0.DYN_CLKDIV_INV_EN origin:035-iob-ilogic 27_118
RIOI3.ILOGIC_Y0.IDDR_OR_ISERDES.IN_USE origin:035-iob-ilogic 26_71
RIOI3.ILOGIC_Y0.IDELMUXE3.P0 origin:035-iob-ilogic 29_101
RIOI3.ILOGIC_Y0.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE origin:035-iob-ilogic 27_98
RIOI3.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE origin:035-iob-ilogic 26_99
RIOI3.ILOGIC_Y0.IFF.INV_OCLK origin:035-iob-ilogic 28_124
@ -58,23 +57,23 @@ RIOI3.ILOGIC_Y0.IFF.ZSRVAL_Q1 origin:035-iob-ilogic 29_71
RIOI3.ILOGIC_Y0.IFF.ZSRVAL_Q2 origin:035-iob-ilogic 29_75
RIOI3.ILOGIC_Y0.IFF.ZSRVAL_Q3 origin:035-iob-ilogic 29_85
RIOI3.ILOGIC_Y0.IFF.ZSRVAL_Q4 origin:035-iob-ilogic 29_93
RIOI3.ILOGIC_Y0.IFFDELMUXE3.P0 origin:035-iob-ilogic 28_116
RIOI3.ILOGIC_Y0.ISERDES.DATA_RATE.SDR origin:035-iob-ilogic 27_108
RIOI3.ILOGIC_Y0.ISERDES.DATA_WIDTH.W3 origin:035-iob-ilogic !26_109 !27_110 27_112
RIOI3.ILOGIC_Y0.ISERDES.DATA_WIDTH.W4_6 origin:035-iob-ilogic !26_109 !27_112 27_110
RIOI3.ILOGIC_Y0.ISERDES.DATA_WIDTH.W5_7 origin:035-iob-ilogic !26_109 27_110 27_112
RIOI3.ILOGIC_Y0.ISERDES.DATA_WIDTH.W8 origin:035-iob-ilogic !27_110 !27_112 26_109
RIOI3.ILOGIC_Y0.ISERDES.IN_USE origin:035-iob-ilogic 27_102 27_70 28_110
RIOI3.ILOGIC_Y0.ISERDES.INTERFACE_TYPE.MEMORY_DDR3 origin:035-iob-ilogic 26_117
RIOI3.ILOGIC_Y0.ISERDES.INTERFACE_TYPE.NOT_MEMORY origin:035-iob-ilogic 26_107
RIOI3.ILOGIC_Y0.ISERDES.INTERFACE_TYPE.OVERSAMPLE origin:035-iob-ilogic 26_115
RIOI3.ILOGIC_Y0.ISERDES.INTERFACE_TYPE.Z_MEMORY origin:035-iob-ilogic 26_121
RIOI3.ILOGIC_Y0.ISERDES.IN_USE origin:035-iob-ilogic 27_102 27_70 28_110
RIOI3.ILOGIC_Y0.ISERDES.NUM_CE.N2 origin:035-iob-ilogic 27_80
RIOI3.ILOGIC_Y0.ZINV_D origin:035-iob-ilogic 29_109
RIOI3.ILOGIC_Y1.DYN_CLKDIV_INV_EN origin:035-iob-ilogic 26_09
RIOI3.ILOGIC_Y0.IDELMUXE3.P0 origin:035-iob-ilogic 29_101
RIOI3.ILOGIC_Y0.IFFDELMUXE3.P0 origin:035-iob-ilogic 28_116
RIOI3.ILOGIC_Y1.DYN_CLK_INV_EN origin:035-iob-ilogic 28_00
RIOI3.ILOGIC_Y1.DYN_CLKDIV_INV_EN origin:035-iob-ilogic 26_09
RIOI3.ILOGIC_Y1.IDDR_OR_ISERDES.IN_USE origin:035-iob-ilogic 27_56
RIOI3.ILOGIC_Y1.IDELMUXE3.P0 origin:035-iob-ilogic 28_26
RIOI3.ILOGIC_Y1.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE origin:035-iob-ilogic 26_29
RIOI3.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE origin:035-iob-ilogic 27_28
RIOI3.ILOGIC_Y1.IFF.INV_OCLK origin:035-iob-ilogic 29_03
@ -89,115 +88,20 @@ RIOI3.ILOGIC_Y1.IFF.ZSRVAL_Q1 origin:035-iob-ilogic 28_56
RIOI3.ILOGIC_Y1.IFF.ZSRVAL_Q2 origin:035-iob-ilogic 28_52
RIOI3.ILOGIC_Y1.IFF.ZSRVAL_Q3 origin:035-iob-ilogic 28_42
RIOI3.ILOGIC_Y1.IFF.ZSRVAL_Q4 origin:035-iob-ilogic 28_34
RIOI3.ILOGIC_Y1.IFFDELMUXE3.P0 origin:035-iob-ilogic 29_11
RIOI3.ILOGIC_Y1.ISERDES.DATA_RATE.SDR origin:035-iob-ilogic 26_19
RIOI3.ILOGIC_Y1.ISERDES.DATA_WIDTH.W3 origin:035-iob-ilogic !26_17 !27_18 26_15
RIOI3.ILOGIC_Y1.ISERDES.DATA_WIDTH.W4_6 origin:035-iob-ilogic !26_15 !27_18 26_17
RIOI3.ILOGIC_Y1.ISERDES.DATA_WIDTH.W5_7 origin:035-iob-ilogic !27_18 26_15 26_17
RIOI3.ILOGIC_Y1.ISERDES.DATA_WIDTH.W8 origin:035-iob-ilogic !26_15 !26_17 27_18
RIOI3.ILOGIC_Y1.ISERDES.IN_USE origin:035-iob-ilogic 26_25 26_57 29_17
RIOI3.ILOGIC_Y1.ISERDES.INTERFACE_TYPE.MEMORY_DDR3 origin:035-iob-ilogic 27_10
RIOI3.ILOGIC_Y1.ISERDES.INTERFACE_TYPE.NOT_MEMORY origin:035-iob-ilogic 27_20
RIOI3.ILOGIC_Y1.ISERDES.INTERFACE_TYPE.OVERSAMPLE origin:035-iob-ilogic 27_12
RIOI3.ILOGIC_Y1.ISERDES.INTERFACE_TYPE.Z_MEMORY origin:035-iob-ilogic 27_06
RIOI3.ILOGIC_Y1.ISERDES.IN_USE origin:035-iob-ilogic 26_25 26_57 29_17
RIOI3.ILOGIC_Y1.ISERDES.NUM_CE.N2 origin:035-iob-ilogic 26_47
RIOI3.ILOGIC_Y1.ZINV_D origin:035-iob-ilogic 28_18
RIOI3.IOI_ILOGIC0_CLK.IOI_IMUX20_1 origin:037-iob-pips 28_67 28_77 29_80
RIOI3.IOI_ILOGIC0_CLK.IOI_IMUX22_1 origin:037-iob-pips 28_67 28_77 29_78
RIOI3.IOI_ILOGIC0_CLK.IOI_IOCLK0 origin:037-iob-pips 28_67 29_76 29_78
RIOI3.IOI_ILOGIC0_CLK.IOI_IOCLK1 origin:037-iob-pips 28_67 29_76 29_80
RIOI3.IOI_ILOGIC0_CLK.IOI_IOCLK2 origin:037-iob-pips 28_67 28_77 28_79
RIOI3.IOI_ILOGIC0_CLK.IOI_IOCLK3 origin:037-iob-pips 28_67 28_77 28_81
RIOI3.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK0 origin:037-iob-pips 28_67 28_79 29_74
RIOI3.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK1 origin:037-iob-pips 28_67 28_81 29_74
RIOI3.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK2 origin:037-iob-pips 28_67 29_74 29_78
RIOI3.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK3 origin:037-iob-pips 28_67 29_74 29_80
RIOI3.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK4 origin:037-iob-pips 28_67 28_75 28_79
RIOI3.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK5 origin:037-iob-pips 28_67 28_75 28_81
RIOI3.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO0 origin:037-iob-pips 28_67 28_75 29_78
RIOI3.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO1 origin:037-iob-pips 28_67 28_75 29_80
RIOI3.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO2 origin:037-iob-pips 28_67 28_79 29_76
RIOI3.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO3 origin:037-iob-pips 28_67 28_81 29_76
RIOI3.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 origin:037-iob-pips 30_80 31_67 31_77
RIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_76 30_78 31_67
RIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_76 30_80 31_67
RIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK2 origin:037-iob-pips 31_67 31_77 31_79
RIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK3 origin:037-iob-pips 31_67 31_77 31_81
RIOI3.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK0 origin:037-iob-pips 30_74 31_67 31_79
RIOI3.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK1 origin:037-iob-pips 30_74 31_67 31_81
RIOI3.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK2 origin:037-iob-pips 30_74 30_78 31_67
RIOI3.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK3 origin:037-iob-pips 30_74 30_80 31_67
RIOI3.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK4 origin:037-iob-pips 31_67 31_75 31_79
RIOI3.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK5 origin:037-iob-pips 31_67 31_75 31_81
RIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO0 origin:037-iob-pips 30_78 31_67 31_75
RIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_80 31_67 31_75
RIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_76 31_67 31_79
RIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_76 31_67 31_81
RIOI3.IOI_ILOGIC1_CLK.IOI_IMUX20_0 origin:037-iob-pips 28_47 29_50 29_60
RIOI3.IOI_ILOGIC1_CLK.IOI_IMUX22_0 origin:037-iob-pips 28_49 29_50 29_60
RIOI3.IOI_ILOGIC1_CLK.IOI_IOCLK0 origin:037-iob-pips 28_49 28_51 29_60
RIOI3.IOI_ILOGIC1_CLK.IOI_IOCLK1 origin:037-iob-pips 28_47 28_51 29_60
RIOI3.IOI_ILOGIC1_CLK.IOI_IOCLK2 origin:037-iob-pips 29_48 29_50 29_60
RIOI3.IOI_ILOGIC1_CLK.IOI_IOCLK3 origin:037-iob-pips 29_46 29_50 29_60
RIOI3.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK0 origin:037-iob-pips 28_53 29_48 29_60
RIOI3.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK1 origin:037-iob-pips 28_53 29_46 29_60
RIOI3.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK2 origin:037-iob-pips 28_49 28_53 29_60
RIOI3.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK3 origin:037-iob-pips 28_47 28_53 29_60
RIOI3.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK4 origin:037-iob-pips 29_48 29_52 29_60
RIOI3.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK5 origin:037-iob-pips 29_46 29_52 29_60
RIOI3.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO0 origin:037-iob-pips 28_49 29_52 29_60
RIOI3.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO1 origin:037-iob-pips 28_47 29_52 29_60
RIOI3.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO2 origin:037-iob-pips 28_51 29_48 29_60
RIOI3.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO3 origin:037-iob-pips 28_51 29_46 29_60
RIOI3.IOI_ILOGIC1_CLKB.IOI_IMUX20_0 origin:037-iob-pips 30_50 30_60 31_47
RIOI3.IOI_ILOGIC1_CLKB.IOI_IMUX22_0 origin:037-iob-pips 30_50 30_60 31_49
RIOI3.IOI_ILOGIC1_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_60 31_49 31_51
RIOI3.IOI_ILOGIC1_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_60 31_47 31_51
RIOI3.IOI_ILOGIC1_CLKB.IOI_IOCLK2 origin:037-iob-pips 30_48 30_50 30_60
RIOI3.IOI_ILOGIC1_CLKB.IOI_IOCLK3 origin:037-iob-pips 30_46 30_50 30_60
RIOI3.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK0 origin:037-iob-pips 30_48 30_60 31_53
RIOI3.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK1 origin:037-iob-pips 30_46 30_60 31_53
RIOI3.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK2 origin:037-iob-pips 30_60 31_49 31_53
RIOI3.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK3 origin:037-iob-pips 30_60 31_47 31_53
RIOI3.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK4 origin:037-iob-pips 30_48 30_52 30_60
RIOI3.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK5 origin:037-iob-pips 30_46 30_52 30_60
RIOI3.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO0 origin:037-iob-pips 30_52 30_60 31_49
RIOI3.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_52 30_60 31_47
RIOI3.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_48 30_60 31_51
RIOI3.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_46 30_60 31_51
RIOI3.IOI_OCLKM_0.IOI_IOCLK0 origin:037-iob-pips 30_92 30_94 31_83
RIOI3.IOI_OCLKM_0.IOI_IOCLK1 origin:037-iob-pips 30_92 30_96 31_83
RIOI3.IOI_OCLKM_0.IOI_IOCLK2 origin:037-iob-pips 31_83 31_93 31_95
RIOI3.IOI_OCLKM_0.IOI_IOCLK3 origin:037-iob-pips 31_83 31_93 31_97
RIOI3.IOI_OCLKM_0.IOI_LEAF_GCLK0 origin:037-iob-pips 30_88 31_83 31_95
RIOI3.IOI_OCLKM_0.IOI_LEAF_GCLK1 origin:037-iob-pips 30_88 31_83 31_97
RIOI3.IOI_OCLKM_0.IOI_LEAF_GCLK2 origin:037-iob-pips 30_88 30_94 31_83
RIOI3.IOI_OCLKM_0.IOI_LEAF_GCLK3 origin:037-iob-pips 30_88 30_96 31_83
RIOI3.IOI_OCLKM_0.IOI_LEAF_GCLK4 origin:037-iob-pips 31_83 31_89 31_95
RIOI3.IOI_OCLKM_0.IOI_LEAF_GCLK5 origin:037-iob-pips 31_83 31_89 31_97
RIOI3.IOI_OCLKM_0.IOI_RCLK_FORIO0 origin:037-iob-pips 30_94 31_83 31_89
RIOI3.IOI_OCLKM_0.IOI_RCLK_FORIO1 origin:037-iob-pips 30_96 31_83 31_89
RIOI3.IOI_OCLKM_0.IOI_RCLK_FORIO2 origin:037-iob-pips 30_92 31_83 31_95
RIOI3.IOI_OCLKM_0.IOI_RCLK_FORIO3 origin:037-iob-pips 30_92 31_83 31_97
RIOI3.IOI_OCLKM_1.IOI_IOCLK0 origin:037-iob-pips 30_44 31_33 31_35
RIOI3.IOI_OCLKM_1.IOI_IOCLK1 origin:037-iob-pips 30_44 31_31 31_35
RIOI3.IOI_OCLKM_1.IOI_IOCLK2 origin:037-iob-pips 30_32 30_34 30_44
RIOI3.IOI_OCLKM_1.IOI_IOCLK3 origin:037-iob-pips 30_30 30_34 30_44
RIOI3.IOI_OCLKM_1.IOI_LEAF_GCLK0 origin:037-iob-pips 30_32 30_44 31_39
RIOI3.IOI_OCLKM_1.IOI_LEAF_GCLK1 origin:037-iob-pips 30_30 30_44 31_39
RIOI3.IOI_OCLKM_1.IOI_LEAF_GCLK2 origin:037-iob-pips 30_44 31_33 31_39
RIOI3.IOI_OCLKM_1.IOI_LEAF_GCLK3 origin:037-iob-pips 30_44 31_31 31_39
RIOI3.IOI_OCLKM_1.IOI_LEAF_GCLK4 origin:037-iob-pips 30_32 30_38 30_44
RIOI3.IOI_OCLKM_1.IOI_LEAF_GCLK5 origin:037-iob-pips 30_30 30_38 30_44
RIOI3.IOI_OCLKM_1.IOI_RCLK_FORIO0 origin:037-iob-pips 30_38 30_44 31_33
RIOI3.IOI_OCLKM_1.IOI_RCLK_FORIO1 origin:037-iob-pips 30_38 30_44 31_31
RIOI3.IOI_OCLKM_1.IOI_RCLK_FORIO2 origin:037-iob-pips 30_32 30_44 31_35
RIOI3.IOI_OCLKM_1.IOI_RCLK_FORIO3 origin:037-iob-pips 30_30 30_44 31_35
RIOI3.IOI_OCLK_0.IOI_IMUX31_1 origin:037-iob-pips 28_83 28_93 29_94
RIOI3.IOI_OCLK_0.IOI_IOCLK0 origin:037-iob-pips 28_83 29_92 29_94
RIOI3.IOI_OCLK_0.IOI_IOCLK1 origin:037-iob-pips 28_83 29_92 29_96
RIOI3.IOI_OCLK_0.IOI_IOCLK2 origin:037-iob-pips 28_83 28_93 28_95
RIOI3.IOI_OCLK_0.IOI_IOCLK3 origin:037-iob-pips 28_83 28_93 28_97
RIOI3.ILOGIC_Y1.IDELMUXE3.P0 origin:035-iob-ilogic 28_26
RIOI3.ILOGIC_Y1.IFFDELMUXE3.P0 origin:035-iob-ilogic 29_11
RIOI3.IOI_OCLK_0.IOI_LEAF_GCLK0 origin:037-iob-pips 28_83 28_95 29_88
RIOI3.IOI_OCLK_0.IOI_LEAF_GCLK1 origin:037-iob-pips 28_83 28_97 29_88
RIOI3.IOI_OCLK_0.IOI_LEAF_GCLK2 origin:037-iob-pips 28_83 29_88 29_94
@ -208,11 +112,11 @@ RIOI3.IOI_OCLK_0.IOI_RCLK_FORIO0 origin:037-iob-pips 28_83 28_89 29_94
RIOI3.IOI_OCLK_0.IOI_RCLK_FORIO1 origin:037-iob-pips 28_83 28_89 29_96
RIOI3.IOI_OCLK_0.IOI_RCLK_FORIO2 origin:037-iob-pips 28_83 28_95 29_92
RIOI3.IOI_OCLK_0.IOI_RCLK_FORIO3 origin:037-iob-pips 28_83 28_97 29_92
RIOI3.IOI_OCLK_1.IOI_IMUX31_0 origin:037-iob-pips 28_33 29_34 29_44
RIOI3.IOI_OCLK_1.IOI_IOCLK0 origin:037-iob-pips 28_33 28_35 29_44
RIOI3.IOI_OCLK_1.IOI_IOCLK1 origin:037-iob-pips 28_31 28_35 29_44
RIOI3.IOI_OCLK_1.IOI_IOCLK2 origin:037-iob-pips 29_32 29_34 29_44
RIOI3.IOI_OCLK_1.IOI_IOCLK3 origin:037-iob-pips 29_30 29_34 29_44
RIOI3.IOI_OCLK_0.IOI_IMUX31_1 origin:037-iob-pips 28_83 28_93 29_94
RIOI3.IOI_OCLK_0.IOI_IOCLK0 origin:037-iob-pips 28_83 29_92 29_94
RIOI3.IOI_OCLK_0.IOI_IOCLK1 origin:037-iob-pips 28_83 29_92 29_96
RIOI3.IOI_OCLK_0.IOI_IOCLK2 origin:037-iob-pips 28_83 28_93 28_95
RIOI3.IOI_OCLK_0.IOI_IOCLK3 origin:037-iob-pips 28_83 28_93 28_97
RIOI3.IOI_OCLK_1.IOI_LEAF_GCLK0 origin:037-iob-pips 28_39 29_32 29_44
RIOI3.IOI_OCLK_1.IOI_LEAF_GCLK1 origin:037-iob-pips 28_39 29_30 29_44
RIOI3.IOI_OCLK_1.IOI_LEAF_GCLK2 origin:037-iob-pips 28_33 28_39 29_44
@ -223,7 +127,102 @@ RIOI3.IOI_OCLK_1.IOI_RCLK_FORIO0 origin:037-iob-pips 28_33 29_38 29_44
RIOI3.IOI_OCLK_1.IOI_RCLK_FORIO1 origin:037-iob-pips 28_31 29_38 29_44
RIOI3.IOI_OCLK_1.IOI_RCLK_FORIO2 origin:037-iob-pips 28_35 29_32 29_44
RIOI3.IOI_OCLK_1.IOI_RCLK_FORIO3 origin:037-iob-pips 28_35 29_30 29_44
RIOI3.IOI_OLOGIC0_CLKDIV.IOI_IMUX8_1 origin:037-iob-pips 28_111 28_121 28_123 31_111 31_121 31_123
RIOI3.IOI_OCLK_1.IOI_IMUX31_0 origin:037-iob-pips 28_33 29_34 29_44
RIOI3.IOI_OCLK_1.IOI_IOCLK0 origin:037-iob-pips 28_33 28_35 29_44
RIOI3.IOI_OCLK_1.IOI_IOCLK1 origin:037-iob-pips 28_31 28_35 29_44
RIOI3.IOI_OCLK_1.IOI_IOCLK2 origin:037-iob-pips 29_32 29_34 29_44
RIOI3.IOI_OCLK_1.IOI_IOCLK3 origin:037-iob-pips 29_30 29_34 29_44
RIOI3.IOI_OCLKM_0.IOI_LEAF_GCLK0 origin:037-iob-pips 30_88 31_83 31_95
RIOI3.IOI_OCLKM_0.IOI_LEAF_GCLK1 origin:037-iob-pips 30_88 31_83 31_97
RIOI3.IOI_OCLKM_0.IOI_LEAF_GCLK2 origin:037-iob-pips 30_88 30_94 31_83
RIOI3.IOI_OCLKM_0.IOI_LEAF_GCLK3 origin:037-iob-pips 30_88 30_96 31_83
RIOI3.IOI_OCLKM_0.IOI_LEAF_GCLK4 origin:037-iob-pips 31_83 31_89 31_95
RIOI3.IOI_OCLKM_0.IOI_LEAF_GCLK5 origin:037-iob-pips 31_83 31_89 31_97
RIOI3.IOI_OCLKM_0.IOI_RCLK_FORIO0 origin:037-iob-pips 30_94 31_83 31_89
RIOI3.IOI_OCLKM_0.IOI_RCLK_FORIO1 origin:037-iob-pips 30_96 31_83 31_89
RIOI3.IOI_OCLKM_0.IOI_RCLK_FORIO2 origin:037-iob-pips 30_92 31_83 31_95
RIOI3.IOI_OCLKM_0.IOI_RCLK_FORIO3 origin:037-iob-pips 30_92 31_83 31_97
RIOI3.IOI_OCLKM_0.IOI_IOCLK0 origin:037-iob-pips 30_92 30_94 31_83
RIOI3.IOI_OCLKM_0.IOI_IOCLK1 origin:037-iob-pips 30_92 30_96 31_83
RIOI3.IOI_OCLKM_0.IOI_IOCLK2 origin:037-iob-pips 31_83 31_93 31_95
RIOI3.IOI_OCLKM_0.IOI_IOCLK3 origin:037-iob-pips 31_83 31_93 31_97
RIOI3.IOI_OCLKM_1.IOI_LEAF_GCLK0 origin:037-iob-pips 30_32 30_44 31_39
RIOI3.IOI_OCLKM_1.IOI_LEAF_GCLK1 origin:037-iob-pips 30_30 30_44 31_39
RIOI3.IOI_OCLKM_1.IOI_LEAF_GCLK2 origin:037-iob-pips 30_44 31_33 31_39
RIOI3.IOI_OCLKM_1.IOI_LEAF_GCLK3 origin:037-iob-pips 30_44 31_31 31_39
RIOI3.IOI_OCLKM_1.IOI_LEAF_GCLK4 origin:037-iob-pips 30_32 30_38 30_44
RIOI3.IOI_OCLKM_1.IOI_LEAF_GCLK5 origin:037-iob-pips 30_30 30_38 30_44
RIOI3.IOI_OCLKM_1.IOI_RCLK_FORIO0 origin:037-iob-pips 30_38 30_44 31_33
RIOI3.IOI_OCLKM_1.IOI_RCLK_FORIO1 origin:037-iob-pips 30_38 30_44 31_31
RIOI3.IOI_OCLKM_1.IOI_RCLK_FORIO2 origin:037-iob-pips 30_32 30_44 31_35
RIOI3.IOI_OCLKM_1.IOI_RCLK_FORIO3 origin:037-iob-pips 30_30 30_44 31_35
RIOI3.IOI_OCLKM_1.IOI_IOCLK0 origin:037-iob-pips 30_44 31_33 31_35
RIOI3.IOI_OCLKM_1.IOI_IOCLK1 origin:037-iob-pips 30_44 31_31 31_35
RIOI3.IOI_OCLKM_1.IOI_IOCLK2 origin:037-iob-pips 30_32 30_34 30_44
RIOI3.IOI_OCLKM_1.IOI_IOCLK3 origin:037-iob-pips 30_30 30_34 30_44
RIOI3.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK0 origin:037-iob-pips 28_67 28_79 29_74
RIOI3.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK1 origin:037-iob-pips 28_67 28_81 29_74
RIOI3.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK2 origin:037-iob-pips 28_67 29_74 29_78
RIOI3.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK3 origin:037-iob-pips 28_67 29_74 29_80
RIOI3.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK4 origin:037-iob-pips 28_67 28_75 28_79
RIOI3.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK5 origin:037-iob-pips 28_67 28_75 28_81
RIOI3.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO0 origin:037-iob-pips 28_67 28_75 29_78
RIOI3.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO1 origin:037-iob-pips 28_67 28_75 29_80
RIOI3.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO2 origin:037-iob-pips 28_67 28_79 29_76
RIOI3.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO3 origin:037-iob-pips 28_67 28_81 29_76
RIOI3.IOI_ILOGIC0_CLK.IOI_IMUX20_1 origin:037-iob-pips 28_67 28_77 29_80
RIOI3.IOI_ILOGIC0_CLK.IOI_IMUX22_1 origin:037-iob-pips 28_67 28_77 29_78
RIOI3.IOI_ILOGIC0_CLK.IOI_IOCLK0 origin:037-iob-pips 28_67 29_76 29_78
RIOI3.IOI_ILOGIC0_CLK.IOI_IOCLK1 origin:037-iob-pips 28_67 29_76 29_80
RIOI3.IOI_ILOGIC0_CLK.IOI_IOCLK2 origin:037-iob-pips 28_67 28_77 28_79
RIOI3.IOI_ILOGIC0_CLK.IOI_IOCLK3 origin:037-iob-pips 28_67 28_77 28_81
RIOI3.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK0 origin:037-iob-pips 30_74 31_67 31_79
RIOI3.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK1 origin:037-iob-pips 30_74 31_67 31_81
RIOI3.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK2 origin:037-iob-pips 30_74 30_78 31_67
RIOI3.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK3 origin:037-iob-pips 30_74 30_80 31_67
RIOI3.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK4 origin:037-iob-pips 31_67 31_75 31_79
RIOI3.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK5 origin:037-iob-pips 31_67 31_75 31_81
RIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO0 origin:037-iob-pips 30_78 31_67 31_75
RIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_80 31_67 31_75
RIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_76 31_67 31_79
RIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_76 31_67 31_81
RIOI3.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 origin:037-iob-pips 30_80 31_67 31_77
RIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_76 30_78 31_67
RIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_76 30_80 31_67
RIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK2 origin:037-iob-pips 31_67 31_77 31_79
RIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK3 origin:037-iob-pips 31_67 31_77 31_81
RIOI3.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK0 origin:037-iob-pips 28_53 29_48 29_60
RIOI3.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK1 origin:037-iob-pips 28_53 29_46 29_60
RIOI3.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK2 origin:037-iob-pips 28_49 28_53 29_60
RIOI3.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK3 origin:037-iob-pips 28_47 28_53 29_60
RIOI3.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK4 origin:037-iob-pips 29_48 29_52 29_60
RIOI3.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK5 origin:037-iob-pips 29_46 29_52 29_60
RIOI3.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO0 origin:037-iob-pips 28_49 29_52 29_60
RIOI3.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO1 origin:037-iob-pips 28_47 29_52 29_60
RIOI3.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO2 origin:037-iob-pips 28_51 29_48 29_60
RIOI3.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO3 origin:037-iob-pips 28_51 29_46 29_60
RIOI3.IOI_ILOGIC1_CLK.IOI_IMUX20_0 origin:037-iob-pips 28_47 29_50 29_60
RIOI3.IOI_ILOGIC1_CLK.IOI_IMUX22_0 origin:037-iob-pips 28_49 29_50 29_60
RIOI3.IOI_ILOGIC1_CLK.IOI_IOCLK0 origin:037-iob-pips 28_49 28_51 29_60
RIOI3.IOI_ILOGIC1_CLK.IOI_IOCLK1 origin:037-iob-pips 28_47 28_51 29_60
RIOI3.IOI_ILOGIC1_CLK.IOI_IOCLK2 origin:037-iob-pips 29_48 29_50 29_60
RIOI3.IOI_ILOGIC1_CLK.IOI_IOCLK3 origin:037-iob-pips 29_46 29_50 29_60
RIOI3.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK0 origin:037-iob-pips 30_48 30_60 31_53
RIOI3.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK1 origin:037-iob-pips 30_46 30_60 31_53
RIOI3.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK2 origin:037-iob-pips 30_60 31_49 31_53
RIOI3.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK3 origin:037-iob-pips 30_60 31_47 31_53
RIOI3.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK4 origin:037-iob-pips 30_48 30_52 30_60
RIOI3.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK5 origin:037-iob-pips 30_46 30_52 30_60
RIOI3.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO0 origin:037-iob-pips 30_52 30_60 31_49
RIOI3.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_52 30_60 31_47
RIOI3.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_48 30_60 31_51
RIOI3.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_46 30_60 31_51
RIOI3.IOI_ILOGIC1_CLKB.IOI_IMUX20_0 origin:037-iob-pips 30_50 30_60 31_47
RIOI3.IOI_ILOGIC1_CLKB.IOI_IMUX22_0 origin:037-iob-pips 30_50 30_60 31_49
RIOI3.IOI_ILOGIC1_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_60 31_49 31_51
RIOI3.IOI_ILOGIC1_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_60 31_47 31_51
RIOI3.IOI_ILOGIC1_CLKB.IOI_IOCLK2 origin:037-iob-pips 30_48 30_50 30_60
RIOI3.IOI_ILOGIC1_CLKB.IOI_IOCLK3 origin:037-iob-pips 30_46 30_50 30_60
RIOI3.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK0 origin:037-iob-pips 28_111 29_118 29_124 30_118 30_124 31_111
RIOI3.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK1 origin:037-iob-pips 28_111 29_118 29_126 30_118 30_126 31_111
RIOI3.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK2 origin:037-iob-pips 28_111 28_123 29_118 30_118 31_111 31_123
@ -234,7 +233,7 @@ RIOI3.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO0 origin:037-iob-pips 28_111 28_119 28_12
RIOI3.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO1 origin:037-iob-pips 28_111 28_119 28_125 31_111 31_119 31_125
RIOI3.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO2 origin:037-iob-pips 28_111 28_121 29_124 30_124 31_111 31_121
RIOI3.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO3 origin:037-iob-pips 28_111 28_121 29_126 30_126 31_111 31_121
RIOI3.IOI_OLOGIC1_CLKDIV.IOI_IMUX8_0 origin:037-iob-pips 29_04 29_06 29_16 30_04 30_06 30_16
RIOI3.IOI_OLOGIC0_CLKDIV.IOI_IMUX8_1 origin:037-iob-pips 28_111 28_121 28_123 31_111 31_121 31_123
RIOI3.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK0 origin:037-iob-pips 28_03 28_09 29_16 30_16 31_03 31_09
RIOI3.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK1 origin:037-iob-pips 28_01 28_09 29_16 30_16 31_01 31_09
RIOI3.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK2 origin:037-iob-pips 28_09 29_04 29_16 30_04 30_16 31_09
@ -245,6 +244,7 @@ RIOI3.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO0 origin:037-iob-pips 29_04 29_08 29_16 3
RIOI3.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO1 origin:037-iob-pips 29_02 29_08 29_16 30_02 30_08 30_16
RIOI3.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO2 origin:037-iob-pips 28_03 29_06 29_16 30_06 30_16 31_03
RIOI3.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO3 origin:037-iob-pips 28_01 29_06 29_16 30_06 30_16 31_01
RIOI3.IOI_OLOGIC1_CLKDIV.IOI_IMUX8_0 origin:037-iob-pips 29_04 29_06 29_16 30_04 30_06 30_16
RIOI3.OLOGIC_Y0.IS_CLKDIV_INVERTED origin:036-iob-ologic 30_85
RIOI3.OLOGIC_Y0.IS_D1_INVERTED origin:036-iob-ologic 30_97
RIOI3.OLOGIC_Y0.IS_D2_INVERTED origin:036-iob-ologic 31_102

226
artix7/segbits_rioi3_tbytesrc.origin_info.db
View File

@ -3,8 +3,8 @@ RIOI3_TBYTESRC.IDELAY_Y0.DELAY_SRC_DATAIN origin:035a-iob-idelay !34_72 35_69
RIOI3_TBYTESRC.IDELAY_Y0.DELAY_SRC_IDATAIN origin:035a-iob-idelay !35_69 34_72
RIOI3_TBYTESRC.IDELAY_Y0.HIGH_PERFORMANCE_MODE origin:035a-iob-idelay 32_109
RIOI3_TBYTESRC.IDELAY_Y0.IDELAY_TYPE_FIXED origin:035a-iob-idelay !35_113 !35_119
RIOI3_TBYTESRC.IDELAY_Y0.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !35_113 35_119
RIOI3_TBYTESRC.IDELAY_Y0.IDELAY_TYPE_VAR_LOAD origin:035a-iob-idelay 35_113 35_119
RIOI3_TBYTESRC.IDELAY_Y0.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !35_113 35_119
RIOI3_TBYTESRC.IDELAY_Y0.IDELAY_VALUE[0] origin:035a-iob-idelay !34_120 34_122
RIOI3_TBYTESRC.IDELAY_Y0.IDELAY_VALUE[1] origin:035a-iob-idelay !34_114 34_116
RIOI3_TBYTESRC.IDELAY_Y0.IDELAY_VALUE[2] origin:035a-iob-idelay !34_108 34_110
@ -24,8 +24,8 @@ RIOI3_TBYTESRC.IDELAY_Y1.DELAY_SRC_DATAIN origin:035a-iob-idelay !35_55 34_58
RIOI3_TBYTESRC.IDELAY_Y1.DELAY_SRC_IDATAIN origin:035a-iob-idelay !34_58 35_55
RIOI3_TBYTESRC.IDELAY_Y1.HIGH_PERFORMANCE_MODE origin:035a-iob-idelay 33_18
RIOI3_TBYTESRC.IDELAY_Y1.IDELAY_TYPE_FIXED origin:035a-iob-idelay !34_08 !34_14
RIOI3_TBYTESRC.IDELAY_Y1.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !34_14 34_08
RIOI3_TBYTESRC.IDELAY_Y1.IDELAY_TYPE_VAR_LOAD origin:035a-iob-idelay 34_08 34_14
RIOI3_TBYTESRC.IDELAY_Y1.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !34_14 34_08
RIOI3_TBYTESRC.IDELAY_Y1.IDELAY_VALUE[0] origin:035a-iob-idelay !35_07 35_05
RIOI3_TBYTESRC.IDELAY_Y1.IDELAY_VALUE[1] origin:035a-iob-idelay !35_13 35_11
RIOI3_TBYTESRC.IDELAY_Y1.IDELAY_VALUE[2] origin:035a-iob-idelay !35_19 35_17
@ -40,10 +40,9 @@ RIOI3_TBYTESRC.IDELAY_Y1.ZIDELAY_VALUE[1] origin:035a-iob-idelay !35_11 35_13
RIOI3_TBYTESRC.IDELAY_Y1.ZIDELAY_VALUE[2] origin:035a-iob-idelay !35_17 35_19
RIOI3_TBYTESRC.IDELAY_Y1.ZIDELAY_VALUE[3] origin:035a-iob-idelay !35_25 35_27
RIOI3_TBYTESRC.IDELAY_Y1.ZIDELAY_VALUE[4] origin:035a-iob-idelay !35_31 35_33
RIOI3_TBYTESRC.ILOGIC_Y0.DYN_CLKDIV_INV_EN origin:035-iob-ilogic 27_118
RIOI3_TBYTESRC.ILOGIC_Y0.DYN_CLK_INV_EN origin:035-iob-ilogic 29_127
RIOI3_TBYTESRC.ILOGIC_Y0.DYN_CLKDIV_INV_EN origin:035-iob-ilogic 27_118
RIOI3_TBYTESRC.ILOGIC_Y0.IDDR_OR_ISERDES.IN_USE origin:035-iob-ilogic 26_71
RIOI3_TBYTESRC.ILOGIC_Y0.IDELMUXE3.P0 origin:035-iob-ilogic 29_101
RIOI3_TBYTESRC.ILOGIC_Y0.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE origin:035-iob-ilogic 27_98
RIOI3_TBYTESRC.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE origin:035-iob-ilogic 26_99
RIOI3_TBYTESRC.ILOGIC_Y0.IFF.INV_OCLK origin:035-iob-ilogic 28_124
@ -58,23 +57,23 @@ RIOI3_TBYTESRC.ILOGIC_Y0.IFF.ZSRVAL_Q1 origin:035-iob-ilogic 29_71
RIOI3_TBYTESRC.ILOGIC_Y0.IFF.ZSRVAL_Q2 origin:035-iob-ilogic 29_75
RIOI3_TBYTESRC.ILOGIC_Y0.IFF.ZSRVAL_Q3 origin:035-iob-ilogic 29_85
RIOI3_TBYTESRC.ILOGIC_Y0.IFF.ZSRVAL_Q4 origin:035-iob-ilogic 29_93
RIOI3_TBYTESRC.ILOGIC_Y0.IFFDELMUXE3.P0 origin:035-iob-ilogic 28_116
RIOI3_TBYTESRC.ILOGIC_Y0.ISERDES.DATA_RATE.SDR origin:035-iob-ilogic 27_108
RIOI3_TBYTESRC.ILOGIC_Y0.ISERDES.DATA_WIDTH.W3 origin:035-iob-ilogic !26_109 !27_110 27_112
RIOI3_TBYTESRC.ILOGIC_Y0.ISERDES.DATA_WIDTH.W4_6 origin:035-iob-ilogic !26_109 !27_112 27_110
RIOI3_TBYTESRC.ILOGIC_Y0.ISERDES.DATA_WIDTH.W5_7 origin:035-iob-ilogic !26_109 27_110 27_112
RIOI3_TBYTESRC.ILOGIC_Y0.ISERDES.DATA_WIDTH.W8 origin:035-iob-ilogic !27_110 !27_112 26_109
RIOI3_TBYTESRC.ILOGIC_Y0.ISERDES.IN_USE origin:035-iob-ilogic 27_102 27_70 28_110
RIOI3_TBYTESRC.ILOGIC_Y0.ISERDES.INTERFACE_TYPE.MEMORY_DDR3 origin:035-iob-ilogic 26_117
RIOI3_TBYTESRC.ILOGIC_Y0.ISERDES.INTERFACE_TYPE.NOT_MEMORY origin:035-iob-ilogic 26_107
RIOI3_TBYTESRC.ILOGIC_Y0.ISERDES.INTERFACE_TYPE.OVERSAMPLE origin:035-iob-ilogic 26_115
RIOI3_TBYTESRC.ILOGIC_Y0.ISERDES.INTERFACE_TYPE.Z_MEMORY origin:035-iob-ilogic 26_121
RIOI3_TBYTESRC.ILOGIC_Y0.ISERDES.IN_USE origin:035-iob-ilogic 27_102 27_70 28_110
RIOI3_TBYTESRC.ILOGIC_Y0.ISERDES.NUM_CE.N2 origin:035-iob-ilogic 27_80
RIOI3_TBYTESRC.ILOGIC_Y0.ZINV_D origin:035-iob-ilogic 29_109
RIOI3_TBYTESRC.ILOGIC_Y1.DYN_CLKDIV_INV_EN origin:035-iob-ilogic 26_09
RIOI3_TBYTESRC.ILOGIC_Y0.IDELMUXE3.P0 origin:035-iob-ilogic 29_101
RIOI3_TBYTESRC.ILOGIC_Y0.IFFDELMUXE3.P0 origin:035-iob-ilogic 28_116
RIOI3_TBYTESRC.ILOGIC_Y1.DYN_CLK_INV_EN origin:035-iob-ilogic 28_00
RIOI3_TBYTESRC.ILOGIC_Y1.DYN_CLKDIV_INV_EN origin:035-iob-ilogic 26_09
RIOI3_TBYTESRC.ILOGIC_Y1.IDDR_OR_ISERDES.IN_USE origin:035-iob-ilogic 27_56
RIOI3_TBYTESRC.ILOGIC_Y1.IDELMUXE3.P0 origin:035-iob-ilogic 28_26
RIOI3_TBYTESRC.ILOGIC_Y1.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE origin:035-iob-ilogic 26_29
RIOI3_TBYTESRC.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE origin:035-iob-ilogic 27_28
RIOI3_TBYTESRC.ILOGIC_Y1.IFF.INV_OCLK origin:035-iob-ilogic 29_03
@ -89,115 +88,20 @@ RIOI3_TBYTESRC.ILOGIC_Y1.IFF.ZSRVAL_Q1 origin:035-iob-ilogic 28_56
RIOI3_TBYTESRC.ILOGIC_Y1.IFF.ZSRVAL_Q2 origin:035-iob-ilogic 28_52
RIOI3_TBYTESRC.ILOGIC_Y1.IFF.ZSRVAL_Q3 origin:035-iob-ilogic 28_42
RIOI3_TBYTESRC.ILOGIC_Y1.IFF.ZSRVAL_Q4 origin:035-iob-ilogic 28_34
RIOI3_TBYTESRC.ILOGIC_Y1.IFFDELMUXE3.P0 origin:035-iob-ilogic 29_11
RIOI3_TBYTESRC.ILOGIC_Y1.ISERDES.DATA_RATE.SDR origin:035-iob-ilogic 26_19
RIOI3_TBYTESRC.ILOGIC_Y1.ISERDES.DATA_WIDTH.W3 origin:035-iob-ilogic !26_17 !27_18 26_15
RIOI3_TBYTESRC.ILOGIC_Y1.ISERDES.DATA_WIDTH.W4_6 origin:035-iob-ilogic !26_15 !27_18 26_17
RIOI3_TBYTESRC.ILOGIC_Y1.ISERDES.DATA_WIDTH.W5_7 origin:035-iob-ilogic !27_18 26_15 26_17
RIOI3_TBYTESRC.ILOGIC_Y1.ISERDES.DATA_WIDTH.W8 origin:035-iob-ilogic !26_15 !26_17 27_18
RIOI3_TBYTESRC.ILOGIC_Y1.ISERDES.IN_USE origin:035-iob-ilogic 26_25 26_57 29_17
RIOI3_TBYTESRC.ILOGIC_Y1.ISERDES.INTERFACE_TYPE.MEMORY_DDR3 origin:035-iob-ilogic 27_10
RIOI3_TBYTESRC.ILOGIC_Y1.ISERDES.INTERFACE_TYPE.NOT_MEMORY origin:035-iob-ilogic 27_20
RIOI3_TBYTESRC.ILOGIC_Y1.ISERDES.INTERFACE_TYPE.OVERSAMPLE origin:035-iob-ilogic 27_12
RIOI3_TBYTESRC.ILOGIC_Y1.ISERDES.INTERFACE_TYPE.Z_MEMORY origin:035-iob-ilogic 27_06
RIOI3_TBYTESRC.ILOGIC_Y1.ISERDES.IN_USE origin:035-iob-ilogic 26_25 26_57 29_17
RIOI3_TBYTESRC.ILOGIC_Y1.ISERDES.NUM_CE.N2 origin:035-iob-ilogic 26_47
RIOI3_TBYTESRC.ILOGIC_Y1.ZINV_D origin:035-iob-ilogic 28_18
RIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IMUX20_1 origin:037-iob-pips 28_67 28_77 29_80
RIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IMUX22_1 origin:037-iob-pips 28_67 28_77 29_78
RIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IOCLK0 origin:037-iob-pips 28_67 29_76 29_78
RIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IOCLK1 origin:037-iob-pips 28_67 29_76 29_80
RIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IOCLK2 origin:037-iob-pips 28_67 28_77 28_79
RIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IOCLK3 origin:037-iob-pips 28_67 28_77 28_81
RIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK0 origin:037-iob-pips 28_67 28_79 29_74
RIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK1 origin:037-iob-pips 28_67 28_81 29_74
RIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK2 origin:037-iob-pips 28_67 29_74 29_78
RIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK3 origin:037-iob-pips 28_67 29_74 29_80
RIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK4 origin:037-iob-pips 28_67 28_75 28_79
RIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK5 origin:037-iob-pips 28_67 28_75 28_81
RIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO0 origin:037-iob-pips 28_67 28_75 29_78
RIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO1 origin:037-iob-pips 28_67 28_75 29_80
RIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO2 origin:037-iob-pips 28_67 28_79 29_76
RIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO3 origin:037-iob-pips 28_67 28_81 29_76
RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 origin:037-iob-pips 30_80 31_67 31_77
RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_76 30_78 31_67
RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_76 30_80 31_67
RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK2 origin:037-iob-pips 31_67 31_77 31_79
RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK3 origin:037-iob-pips 31_67 31_77 31_81
RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK0 origin:037-iob-pips 30_74 31_67 31_79
RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK1 origin:037-iob-pips 30_74 31_67 31_81
RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK2 origin:037-iob-pips 30_74 30_78 31_67
RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK3 origin:037-iob-pips 30_74 30_80 31_67
RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK4 origin:037-iob-pips 31_67 31_75 31_79
RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK5 origin:037-iob-pips 31_67 31_75 31_81
RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO0 origin:037-iob-pips 30_78 31_67 31_75
RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_80 31_67 31_75
RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_76 31_67 31_79
RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_76 31_67 31_81
RIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IMUX20_0 origin:037-iob-pips 28_47 29_50 29_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IMUX22_0 origin:037-iob-pips 28_49 29_50 29_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IOCLK0 origin:037-iob-pips 28_49 28_51 29_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IOCLK1 origin:037-iob-pips 28_47 28_51 29_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IOCLK2 origin:037-iob-pips 29_48 29_50 29_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IOCLK3 origin:037-iob-pips 29_46 29_50 29_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK0 origin:037-iob-pips 28_53 29_48 29_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK1 origin:037-iob-pips 28_53 29_46 29_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK2 origin:037-iob-pips 28_49 28_53 29_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK3 origin:037-iob-pips 28_47 28_53 29_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK4 origin:037-iob-pips 29_48 29_52 29_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK5 origin:037-iob-pips 29_46 29_52 29_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO0 origin:037-iob-pips 28_49 29_52 29_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO1 origin:037-iob-pips 28_47 29_52 29_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO2 origin:037-iob-pips 28_51 29_48 29_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO3 origin:037-iob-pips 28_51 29_46 29_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IMUX20_0 origin:037-iob-pips 30_50 30_60 31_47
RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IMUX22_0 origin:037-iob-pips 30_50 30_60 31_49
RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_60 31_49 31_51
RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_60 31_47 31_51
RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK2 origin:037-iob-pips 30_48 30_50 30_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK3 origin:037-iob-pips 30_46 30_50 30_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK0 origin:037-iob-pips 30_48 30_60 31_53
RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK1 origin:037-iob-pips 30_46 30_60 31_53
RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK2 origin:037-iob-pips 30_60 31_49 31_53
RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK3 origin:037-iob-pips 30_60 31_47 31_53
RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK4 origin:037-iob-pips 30_48 30_52 30_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK5 origin:037-iob-pips 30_46 30_52 30_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO0 origin:037-iob-pips 30_52 30_60 31_49
RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_52 30_60 31_47
RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_48 30_60 31_51
RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_46 30_60 31_51
RIOI3_TBYTESRC.IOI_OCLKM_0.IOI_IOCLK0 origin:037-iob-pips 30_92 30_94 31_83
RIOI3_TBYTESRC.IOI_OCLKM_0.IOI_IOCLK1 origin:037-iob-pips 30_92 30_96 31_83
RIOI3_TBYTESRC.IOI_OCLKM_0.IOI_IOCLK2 origin:037-iob-pips 31_83 31_93 31_95
RIOI3_TBYTESRC.IOI_OCLKM_0.IOI_IOCLK3 origin:037-iob-pips 31_83 31_93 31_97
RIOI3_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK0 origin:037-iob-pips 30_88 31_83 31_95
RIOI3_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK1 origin:037-iob-pips 30_88 31_83 31_97
RIOI3_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK2 origin:037-iob-pips 30_88 30_94 31_83
RIOI3_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK3 origin:037-iob-pips 30_88 30_96 31_83
RIOI3_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK4 origin:037-iob-pips 31_83 31_89 31_95
RIOI3_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK5 origin:037-iob-pips 31_83 31_89 31_97
RIOI3_TBYTESRC.IOI_OCLKM_0.IOI_RCLK_FORIO0 origin:037-iob-pips 30_94 31_83 31_89
RIOI3_TBYTESRC.IOI_OCLKM_0.IOI_RCLK_FORIO1 origin:037-iob-pips 30_96 31_83 31_89
RIOI3_TBYTESRC.IOI_OCLKM_0.IOI_RCLK_FORIO2 origin:037-iob-pips 30_92 31_83 31_95
RIOI3_TBYTESRC.IOI_OCLKM_0.IOI_RCLK_FORIO3 origin:037-iob-pips 30_92 31_83 31_97
RIOI3_TBYTESRC.IOI_OCLKM_1.IOI_IOCLK0 origin:037-iob-pips 30_44 31_33 31_35
RIOI3_TBYTESRC.IOI_OCLKM_1.IOI_IOCLK1 origin:037-iob-pips 30_44 31_31 31_35
RIOI3_TBYTESRC.IOI_OCLKM_1.IOI_IOCLK2 origin:037-iob-pips 30_32 30_34 30_44
RIOI3_TBYTESRC.IOI_OCLKM_1.IOI_IOCLK3 origin:037-iob-pips 30_30 30_34 30_44
RIOI3_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK0 origin:037-iob-pips 30_32 30_44 31_39
RIOI3_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK1 origin:037-iob-pips 30_30 30_44 31_39
RIOI3_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK2 origin:037-iob-pips 30_44 31_33 31_39
RIOI3_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK3 origin:037-iob-pips 30_44 31_31 31_39
RIOI3_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK4 origin:037-iob-pips 30_32 30_38 30_44
RIOI3_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK5 origin:037-iob-pips 30_30 30_38 30_44
RIOI3_TBYTESRC.IOI_OCLKM_1.IOI_RCLK_FORIO0 origin:037-iob-pips 30_38 30_44 31_33
RIOI3_TBYTESRC.IOI_OCLKM_1.IOI_RCLK_FORIO1 origin:037-iob-pips 30_38 30_44 31_31
RIOI3_TBYTESRC.IOI_OCLKM_1.IOI_RCLK_FORIO2 origin:037-iob-pips 30_32 30_44 31_35
RIOI3_TBYTESRC.IOI_OCLKM_1.IOI_RCLK_FORIO3 origin:037-iob-pips 30_30 30_44 31_35
RIOI3_TBYTESRC.IOI_OCLK_0.IOI_IMUX31_1 origin:037-iob-pips 28_83 28_93 29_94
RIOI3_TBYTESRC.IOI_OCLK_0.IOI_IOCLK0 origin:037-iob-pips 28_83 29_92 29_94
RIOI3_TBYTESRC.IOI_OCLK_0.IOI_IOCLK1 origin:037-iob-pips 28_83 29_92 29_96
RIOI3_TBYTESRC.IOI_OCLK_0.IOI_IOCLK2 origin:037-iob-pips 28_83 28_93 28_95
RIOI3_TBYTESRC.IOI_OCLK_0.IOI_IOCLK3 origin:037-iob-pips 28_83 28_93 28_97
RIOI3_TBYTESRC.ILOGIC_Y1.IDELMUXE3.P0 origin:035-iob-ilogic 28_26
RIOI3_TBYTESRC.ILOGIC_Y1.IFFDELMUXE3.P0 origin:035-iob-ilogic 29_11
RIOI3_TBYTESRC.IOI_OCLK_0.IOI_LEAF_GCLK0 origin:037-iob-pips 28_83 28_95 29_88
RIOI3_TBYTESRC.IOI_OCLK_0.IOI_LEAF_GCLK1 origin:037-iob-pips 28_83 28_97 29_88
RIOI3_TBYTESRC.IOI_OCLK_0.IOI_LEAF_GCLK2 origin:037-iob-pips 28_83 29_88 29_94
@ -208,11 +112,11 @@ RIOI3_TBYTESRC.IOI_OCLK_0.IOI_RCLK_FORIO0 origin:037-iob-pips 28_83 28_89 29_94
RIOI3_TBYTESRC.IOI_OCLK_0.IOI_RCLK_FORIO1 origin:037-iob-pips 28_83 28_89 29_96
RIOI3_TBYTESRC.IOI_OCLK_0.IOI_RCLK_FORIO2 origin:037-iob-pips 28_83 28_95 29_92
RIOI3_TBYTESRC.IOI_OCLK_0.IOI_RCLK_FORIO3 origin:037-iob-pips 28_83 28_97 29_92
RIOI3_TBYTESRC.IOI_OCLK_1.IOI_IMUX31_0 origin:037-iob-pips 28_33 29_34 29_44
RIOI3_TBYTESRC.IOI_OCLK_1.IOI_IOCLK0 origin:037-iob-pips 28_33 28_35 29_44
RIOI3_TBYTESRC.IOI_OCLK_1.IOI_IOCLK1 origin:037-iob-pips 28_31 28_35 29_44
RIOI3_TBYTESRC.IOI_OCLK_1.IOI_IOCLK2 origin:037-iob-pips 29_32 29_34 29_44
RIOI3_TBYTESRC.IOI_OCLK_1.IOI_IOCLK3 origin:037-iob-pips 29_30 29_34 29_44
RIOI3_TBYTESRC.IOI_OCLK_0.IOI_IMUX31_1 origin:037-iob-pips 28_83 28_93 29_94
RIOI3_TBYTESRC.IOI_OCLK_0.IOI_IOCLK0 origin:037-iob-pips 28_83 29_92 29_94
RIOI3_TBYTESRC.IOI_OCLK_0.IOI_IOCLK1 origin:037-iob-pips 28_83 29_92 29_96
RIOI3_TBYTESRC.IOI_OCLK_0.IOI_IOCLK2 origin:037-iob-pips 28_83 28_93 28_95
RIOI3_TBYTESRC.IOI_OCLK_0.IOI_IOCLK3 origin:037-iob-pips 28_83 28_93 28_97
RIOI3_TBYTESRC.IOI_OCLK_1.IOI_LEAF_GCLK0 origin:037-iob-pips 28_39 29_32 29_44
RIOI3_TBYTESRC.IOI_OCLK_1.IOI_LEAF_GCLK1 origin:037-iob-pips 28_39 29_30 29_44
RIOI3_TBYTESRC.IOI_OCLK_1.IOI_LEAF_GCLK2 origin:037-iob-pips 28_33 28_39 29_44
@ -223,7 +127,102 @@ RIOI3_TBYTESRC.IOI_OCLK_1.IOI_RCLK_FORIO0 origin:037-iob-pips 28_33 29_38 29_44
RIOI3_TBYTESRC.IOI_OCLK_1.IOI_RCLK_FORIO1 origin:037-iob-pips 28_31 29_38 29_44
RIOI3_TBYTESRC.IOI_OCLK_1.IOI_RCLK_FORIO2 origin:037-iob-pips 28_35 29_32 29_44
RIOI3_TBYTESRC.IOI_OCLK_1.IOI_RCLK_FORIO3 origin:037-iob-pips 28_35 29_30 29_44
RIOI3_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_IMUX8_1 origin:037-iob-pips 28_111 28_121 28_123 31_111 31_121 31_123
RIOI3_TBYTESRC.IOI_OCLK_1.IOI_IMUX31_0 origin:037-iob-pips 28_33 29_34 29_44
RIOI3_TBYTESRC.IOI_OCLK_1.IOI_IOCLK0 origin:037-iob-pips 28_33 28_35 29_44
RIOI3_TBYTESRC.IOI_OCLK_1.IOI_IOCLK1 origin:037-iob-pips 28_31 28_35 29_44
RIOI3_TBYTESRC.IOI_OCLK_1.IOI_IOCLK2 origin:037-iob-pips 29_32 29_34 29_44
RIOI3_TBYTESRC.IOI_OCLK_1.IOI_IOCLK3 origin:037-iob-pips 29_30 29_34 29_44
RIOI3_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK0 origin:037-iob-pips 30_88 31_83 31_95
RIOI3_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK1 origin:037-iob-pips 30_88 31_83 31_97
RIOI3_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK2 origin:037-iob-pips 30_88 30_94 31_83
RIOI3_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK3 origin:037-iob-pips 30_88 30_96 31_83
RIOI3_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK4 origin:037-iob-pips 31_83 31_89 31_95
RIOI3_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK5 origin:037-iob-pips 31_83 31_89 31_97
RIOI3_TBYTESRC.IOI_OCLKM_0.IOI_RCLK_FORIO0 origin:037-iob-pips 30_94 31_83 31_89
RIOI3_TBYTESRC.IOI_OCLKM_0.IOI_RCLK_FORIO1 origin:037-iob-pips 30_96 31_83 31_89
RIOI3_TBYTESRC.IOI_OCLKM_0.IOI_RCLK_FORIO2 origin:037-iob-pips 30_92 31_83 31_95
RIOI3_TBYTESRC.IOI_OCLKM_0.IOI_RCLK_FORIO3 origin:037-iob-pips 30_92 31_83 31_97
RIOI3_TBYTESRC.IOI_OCLKM_0.IOI_IOCLK0 origin:037-iob-pips 30_92 30_94 31_83
RIOI3_TBYTESRC.IOI_OCLKM_0.IOI_IOCLK1 origin:037-iob-pips 30_92 30_96 31_83
RIOI3_TBYTESRC.IOI_OCLKM_0.IOI_IOCLK2 origin:037-iob-pips 31_83 31_93 31_95
RIOI3_TBYTESRC.IOI_OCLKM_0.IOI_IOCLK3 origin:037-iob-pips 31_83 31_93 31_97
RIOI3_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK0 origin:037-iob-pips 30_32 30_44 31_39
RIOI3_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK1 origin:037-iob-pips 30_30 30_44 31_39
RIOI3_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK2 origin:037-iob-pips 30_44 31_33 31_39
RIOI3_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK3 origin:037-iob-pips 30_44 31_31 31_39
RIOI3_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK4 origin:037-iob-pips 30_32 30_38 30_44
RIOI3_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK5 origin:037-iob-pips 30_30 30_38 30_44
RIOI3_TBYTESRC.IOI_OCLKM_1.IOI_RCLK_FORIO0 origin:037-iob-pips 30_38 30_44 31_33
RIOI3_TBYTESRC.IOI_OCLKM_1.IOI_RCLK_FORIO1 origin:037-iob-pips 30_38 30_44 31_31
RIOI3_TBYTESRC.IOI_OCLKM_1.IOI_RCLK_FORIO2 origin:037-iob-pips 30_32 30_44 31_35
RIOI3_TBYTESRC.IOI_OCLKM_1.IOI_RCLK_FORIO3 origin:037-iob-pips 30_30 30_44 31_35
RIOI3_TBYTESRC.IOI_OCLKM_1.IOI_IOCLK0 origin:037-iob-pips 30_44 31_33 31_35
RIOI3_TBYTESRC.IOI_OCLKM_1.IOI_IOCLK1 origin:037-iob-pips 30_44 31_31 31_35
RIOI3_TBYTESRC.IOI_OCLKM_1.IOI_IOCLK2 origin:037-iob-pips 30_32 30_34 30_44
RIOI3_TBYTESRC.IOI_OCLKM_1.IOI_IOCLK3 origin:037-iob-pips 30_30 30_34 30_44
RIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK0 origin:037-iob-pips 28_67 28_79 29_74
RIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK1 origin:037-iob-pips 28_67 28_81 29_74
RIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK2 origin:037-iob-pips 28_67 29_74 29_78
RIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK3 origin:037-iob-pips 28_67 29_74 29_80
RIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK4 origin:037-iob-pips 28_67 28_75 28_79
RIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK5 origin:037-iob-pips 28_67 28_75 28_81
RIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO0 origin:037-iob-pips 28_67 28_75 29_78
RIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO1 origin:037-iob-pips 28_67 28_75 29_80
RIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO2 origin:037-iob-pips 28_67 28_79 29_76
RIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO3 origin:037-iob-pips 28_67 28_81 29_76
RIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IMUX20_1 origin:037-iob-pips 28_67 28_77 29_80
RIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IMUX22_1 origin:037-iob-pips 28_67 28_77 29_78
RIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IOCLK0 origin:037-iob-pips 28_67 29_76 29_78
RIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IOCLK1 origin:037-iob-pips 28_67 29_76 29_80
RIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IOCLK2 origin:037-iob-pips 28_67 28_77 28_79
RIOI3_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IOCLK3 origin:037-iob-pips 28_67 28_77 28_81
RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK0 origin:037-iob-pips 30_74 31_67 31_79
RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK1 origin:037-iob-pips 30_74 31_67 31_81
RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK2 origin:037-iob-pips 30_74 30_78 31_67
RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK3 origin:037-iob-pips 30_74 30_80 31_67
RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK4 origin:037-iob-pips 31_67 31_75 31_79
RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK5 origin:037-iob-pips 31_67 31_75 31_81
RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO0 origin:037-iob-pips 30_78 31_67 31_75
RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_80 31_67 31_75
RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_76 31_67 31_79
RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_76 31_67 31_81
RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 origin:037-iob-pips 30_80 31_67 31_77
RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_76 30_78 31_67
RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_76 30_80 31_67
RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK2 origin:037-iob-pips 31_67 31_77 31_79
RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK3 origin:037-iob-pips 31_67 31_77 31_81
RIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK0 origin:037-iob-pips 28_53 29_48 29_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK1 origin:037-iob-pips 28_53 29_46 29_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK2 origin:037-iob-pips 28_49 28_53 29_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK3 origin:037-iob-pips 28_47 28_53 29_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK4 origin:037-iob-pips 29_48 29_52 29_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK5 origin:037-iob-pips 29_46 29_52 29_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO0 origin:037-iob-pips 28_49 29_52 29_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO1 origin:037-iob-pips 28_47 29_52 29_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO2 origin:037-iob-pips 28_51 29_48 29_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO3 origin:037-iob-pips 28_51 29_46 29_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IMUX20_0 origin:037-iob-pips 28_47 29_50 29_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IMUX22_0 origin:037-iob-pips 28_49 29_50 29_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IOCLK0 origin:037-iob-pips 28_49 28_51 29_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IOCLK1 origin:037-iob-pips 28_47 28_51 29_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IOCLK2 origin:037-iob-pips 29_48 29_50 29_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IOCLK3 origin:037-iob-pips 29_46 29_50 29_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK0 origin:037-iob-pips 30_48 30_60 31_53
RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK1 origin:037-iob-pips 30_46 30_60 31_53
RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK2 origin:037-iob-pips 30_60 31_49 31_53
RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK3 origin:037-iob-pips 30_60 31_47 31_53
RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK4 origin:037-iob-pips 30_48 30_52 30_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK5 origin:037-iob-pips 30_46 30_52 30_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO0 origin:037-iob-pips 30_52 30_60 31_49
RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_52 30_60 31_47
RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_48 30_60 31_51
RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_46 30_60 31_51
RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IMUX20_0 origin:037-iob-pips 30_50 30_60 31_47
RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IMUX22_0 origin:037-iob-pips 30_50 30_60 31_49
RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_60 31_49 31_51
RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_60 31_47 31_51
RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK2 origin:037-iob-pips 30_48 30_50 30_60
RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK3 origin:037-iob-pips 30_46 30_50 30_60
RIOI3_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK0 origin:037-iob-pips 28_111 29_118 29_124 30_118 30_124 31_111
RIOI3_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK1 origin:037-iob-pips 28_111 29_118 29_126 30_118 30_126 31_111
RIOI3_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK2 origin:037-iob-pips 28_111 28_123 29_118 30_118 31_111 31_123
@ -234,7 +233,7 @@ RIOI3_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO0 origin:037-iob-pips 28_111 28_
RIOI3_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO1 origin:037-iob-pips 28_111 28_119 28_125 31_111 31_119 31_125
RIOI3_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO2 origin:037-iob-pips 28_111 28_121 29_124 30_124 31_111 31_121
RIOI3_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO3 origin:037-iob-pips 28_111 28_121 29_126 30_126 31_111 31_121
RIOI3_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_IMUX8_0 origin:037-iob-pips 29_04 29_06 29_16 30_04 30_06 30_16
RIOI3_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_IMUX8_1 origin:037-iob-pips 28_111 28_121 28_123 31_111 31_121 31_123
RIOI3_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK0 origin:037-iob-pips 28_03 28_09 29_16 30_16 31_03 31_09
RIOI3_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK1 origin:037-iob-pips 28_01 28_09 29_16 30_16 31_01 31_09
RIOI3_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK2 origin:037-iob-pips 28_09 29_04 29_16 30_04 30_16 31_09
@ -245,6 +244,7 @@ RIOI3_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO0 origin:037-iob-pips 29_04 29_0
RIOI3_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO1 origin:037-iob-pips 29_02 29_08 29_16 30_02 30_08 30_16
RIOI3_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO2 origin:037-iob-pips 28_03 29_06 29_16 30_06 30_16 31_03
RIOI3_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO3 origin:037-iob-pips 28_01 29_06 29_16 30_06 30_16 31_01
RIOI3_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_IMUX8_0 origin:037-iob-pips 29_04 29_06 29_16 30_04 30_06 30_16
RIOI3_TBYTESRC.OLOGIC_Y0.IS_CLKDIV_INVERTED origin:036-iob-ologic 30_85
RIOI3_TBYTESRC.OLOGIC_Y0.IS_D1_INVERTED origin:036-iob-ologic 30_97
RIOI3_TBYTESRC.OLOGIC_Y0.IS_D2_INVERTED origin:036-iob-ologic 31_102

226
artix7/segbits_rioi3_tbyteterm.origin_info.db
View File

@ -3,8 +3,8 @@ RIOI3_TBYTETERM.IDELAY_Y0.DELAY_SRC_DATAIN origin:035a-iob-idelay !34_72 35_69
RIOI3_TBYTETERM.IDELAY_Y0.DELAY_SRC_IDATAIN origin:035a-iob-idelay !35_69 34_72
RIOI3_TBYTETERM.IDELAY_Y0.HIGH_PERFORMANCE_MODE origin:035a-iob-idelay 32_109
RIOI3_TBYTETERM.IDELAY_Y0.IDELAY_TYPE_FIXED origin:035a-iob-idelay !35_113 !35_119
RIOI3_TBYTETERM.IDELAY_Y0.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !35_113 35_119
RIOI3_TBYTETERM.IDELAY_Y0.IDELAY_TYPE_VAR_LOAD origin:035a-iob-idelay 35_113 35_119
RIOI3_TBYTETERM.IDELAY_Y0.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !35_113 35_119
RIOI3_TBYTETERM.IDELAY_Y0.IDELAY_VALUE[0] origin:035a-iob-idelay !34_120 34_122
RIOI3_TBYTETERM.IDELAY_Y0.IDELAY_VALUE[1] origin:035a-iob-idelay !34_114 34_116
RIOI3_TBYTETERM.IDELAY_Y0.IDELAY_VALUE[2] origin:035a-iob-idelay !34_108 34_110
@ -24,8 +24,8 @@ RIOI3_TBYTETERM.IDELAY_Y1.DELAY_SRC_DATAIN origin:035a-iob-idelay !35_55 34_58
RIOI3_TBYTETERM.IDELAY_Y1.DELAY_SRC_IDATAIN origin:035a-iob-idelay !34_58 35_55
RIOI3_TBYTETERM.IDELAY_Y1.HIGH_PERFORMANCE_MODE origin:035a-iob-idelay 33_18
RIOI3_TBYTETERM.IDELAY_Y1.IDELAY_TYPE_FIXED origin:035a-iob-idelay !34_08 !34_14
RIOI3_TBYTETERM.IDELAY_Y1.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !34_14 34_08
RIOI3_TBYTETERM.IDELAY_Y1.IDELAY_TYPE_VAR_LOAD origin:035a-iob-idelay 34_08 34_14
RIOI3_TBYTETERM.IDELAY_Y1.IDELAY_TYPE_VARIABLE origin:035a-iob-idelay !34_14 34_08
RIOI3_TBYTETERM.IDELAY_Y1.IDELAY_VALUE[0] origin:035a-iob-idelay !35_07 35_05
RIOI3_TBYTETERM.IDELAY_Y1.IDELAY_VALUE[1] origin:035a-iob-idelay !35_13 35_11
RIOI3_TBYTETERM.IDELAY_Y1.IDELAY_VALUE[2] origin:035a-iob-idelay !35_19 35_17
@ -40,10 +40,9 @@ RIOI3_TBYTETERM.IDELAY_Y1.ZIDELAY_VALUE[1] origin:035a-iob-idelay !35_11 35_13
RIOI3_TBYTETERM.IDELAY_Y1.ZIDELAY_VALUE[2] origin:035a-iob-idelay !35_17 35_19
RIOI3_TBYTETERM.IDELAY_Y1.ZIDELAY_VALUE[3] origin:035a-iob-idelay !35_25 35_27
RIOI3_TBYTETERM.IDELAY_Y1.ZIDELAY_VALUE[4] origin:035a-iob-idelay !35_31 35_33
RIOI3_TBYTETERM.ILOGIC_Y0.DYN_CLKDIV_INV_EN origin:035-iob-ilogic 27_118
RIOI3_TBYTETERM.ILOGIC_Y0.DYN_CLK_INV_EN origin:035-iob-ilogic 29_127
RIOI3_TBYTETERM.ILOGIC_Y0.DYN_CLKDIV_INV_EN origin:035-iob-ilogic 27_118
RIOI3_TBYTETERM.ILOGIC_Y0.IDDR_OR_ISERDES.IN_USE origin:035-iob-ilogic 26_71
RIOI3_TBYTETERM.ILOGIC_Y0.IDELMUXE3.P0 origin:035-iob-ilogic 29_101
RIOI3_TBYTETERM.ILOGIC_Y0.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE origin:035-iob-ilogic 27_98
RIOI3_TBYTETERM.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE origin:035-iob-ilogic 26_99
RIOI3_TBYTETERM.ILOGIC_Y0.IFF.INV_OCLK origin:035-iob-ilogic 28_124
@ -58,23 +57,23 @@ RIOI3_TBYTETERM.ILOGIC_Y0.IFF.ZSRVAL_Q1 origin:035-iob-ilogic 29_71
RIOI3_TBYTETERM.ILOGIC_Y0.IFF.ZSRVAL_Q2 origin:035-iob-ilogic 29_75
RIOI3_TBYTETERM.ILOGIC_Y0.IFF.ZSRVAL_Q3 origin:035-iob-ilogic 29_85
RIOI3_TBYTETERM.ILOGIC_Y0.IFF.ZSRVAL_Q4 origin:035-iob-ilogic 29_93
RIOI3_TBYTETERM.ILOGIC_Y0.IFFDELMUXE3.P0 origin:035-iob-ilogic 28_116
RIOI3_TBYTETERM.ILOGIC_Y0.ISERDES.DATA_RATE.SDR origin:035-iob-ilogic 27_108
RIOI3_TBYTETERM.ILOGIC_Y0.ISERDES.DATA_WIDTH.W3 origin:035-iob-ilogic !26_109 !27_110 27_112
RIOI3_TBYTETERM.ILOGIC_Y0.ISERDES.DATA_WIDTH.W4_6 origin:035-iob-ilogic !26_109 !27_112 27_110
RIOI3_TBYTETERM.ILOGIC_Y0.ISERDES.DATA_WIDTH.W5_7 origin:035-iob-ilogic !26_109 27_110 27_112
RIOI3_TBYTETERM.ILOGIC_Y0.ISERDES.DATA_WIDTH.W8 origin:035-iob-ilogic !27_110 !27_112 26_109
RIOI3_TBYTETERM.ILOGIC_Y0.ISERDES.IN_USE origin:035-iob-ilogic 27_102 27_70 28_110
RIOI3_TBYTETERM.ILOGIC_Y0.ISERDES.INTERFACE_TYPE.MEMORY_DDR3 origin:035-iob-ilogic 26_117
RIOI3_TBYTETERM.ILOGIC_Y0.ISERDES.INTERFACE_TYPE.NOT_MEMORY origin:035-iob-ilogic 26_107
RIOI3_TBYTETERM.ILOGIC_Y0.ISERDES.INTERFACE_TYPE.OVERSAMPLE origin:035-iob-ilogic 26_115
RIOI3_TBYTETERM.ILOGIC_Y0.ISERDES.INTERFACE_TYPE.Z_MEMORY origin:035-iob-ilogic 26_121
RIOI3_TBYTETERM.ILOGIC_Y0.ISERDES.IN_USE origin:035-iob-ilogic 27_102 27_70 28_110
RIOI3_TBYTETERM.ILOGIC_Y0.ISERDES.NUM_CE.N2 origin:035-iob-ilogic 27_80
RIOI3_TBYTETERM.ILOGIC_Y0.ZINV_D origin:035-iob-ilogic 29_109
RIOI3_TBYTETERM.ILOGIC_Y1.DYN_CLKDIV_INV_EN origin:035-iob-ilogic 26_09
RIOI3_TBYTETERM.ILOGIC_Y0.IDELMUXE3.P0 origin:035-iob-ilogic 29_101
RIOI3_TBYTETERM.ILOGIC_Y0.IFFDELMUXE3.P0 origin:035-iob-ilogic 28_116
RIOI3_TBYTETERM.ILOGIC_Y1.DYN_CLK_INV_EN origin:035-iob-ilogic 28_00
RIOI3_TBYTETERM.ILOGIC_Y1.DYN_CLKDIV_INV_EN origin:035-iob-ilogic 26_09
RIOI3_TBYTETERM.ILOGIC_Y1.IDDR_OR_ISERDES.IN_USE origin:035-iob-ilogic 27_56
RIOI3_TBYTETERM.ILOGIC_Y1.IDELMUXE3.P0 origin:035-iob-ilogic 28_26
RIOI3_TBYTETERM.ILOGIC_Y1.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE origin:035-iob-ilogic 26_29
RIOI3_TBYTETERM.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE origin:035-iob-ilogic 27_28
RIOI3_TBYTETERM.ILOGIC_Y1.IFF.INV_OCLK origin:035-iob-ilogic 29_03
@ -89,115 +88,20 @@ RIOI3_TBYTETERM.ILOGIC_Y1.IFF.ZSRVAL_Q1 origin:035-iob-ilogic 28_56
RIOI3_TBYTETERM.ILOGIC_Y1.IFF.ZSRVAL_Q2 origin:035-iob-ilogic 28_52
RIOI3_TBYTETERM.ILOGIC_Y1.IFF.ZSRVAL_Q3 origin:035-iob-ilogic 28_42
RIOI3_TBYTETERM.ILOGIC_Y1.IFF.ZSRVAL_Q4 origin:035-iob-ilogic 28_34
RIOI3_TBYTETERM.ILOGIC_Y1.IFFDELMUXE3.P0 origin:035-iob-ilogic 29_11
RIOI3_TBYTETERM.ILOGIC_Y1.ISERDES.DATA_RATE.SDR origin:035-iob-ilogic 26_19
RIOI3_TBYTETERM.ILOGIC_Y1.ISERDES.DATA_WIDTH.W3 origin:035-iob-ilogic !26_17 !27_18 26_15
RIOI3_TBYTETERM.ILOGIC_Y1.ISERDES.DATA_WIDTH.W4_6 origin:035-iob-ilogic !26_15 !27_18 26_17
RIOI3_TBYTETERM.ILOGIC_Y1.ISERDES.DATA_WIDTH.W5_7 origin:035-iob-ilogic !27_18 26_15 26_17
RIOI3_TBYTETERM.ILOGIC_Y1.ISERDES.DATA_WIDTH.W8 origin:035-iob-ilogic !26_15 !26_17 27_18
RIOI3_TBYTETERM.ILOGIC_Y1.ISERDES.IN_USE origin:035-iob-ilogic 26_25 26_57 29_17
RIOI3_TBYTETERM.ILOGIC_Y1.ISERDES.INTERFACE_TYPE.MEMORY_DDR3 origin:035-iob-ilogic 27_10
RIOI3_TBYTETERM.ILOGIC_Y1.ISERDES.INTERFACE_TYPE.NOT_MEMORY origin:035-iob-ilogic 27_20
RIOI3_TBYTETERM.ILOGIC_Y1.ISERDES.INTERFACE_TYPE.OVERSAMPLE origin:035-iob-ilogic 27_12
RIOI3_TBYTETERM.ILOGIC_Y1.ISERDES.INTERFACE_TYPE.Z_MEMORY origin:035-iob-ilogic 27_06
RIOI3_TBYTETERM.ILOGIC_Y1.ISERDES.IN_USE origin:035-iob-ilogic 26_25 26_57 29_17
RIOI3_TBYTETERM.ILOGIC_Y1.ISERDES.NUM_CE.N2 origin:035-iob-ilogic 26_47
RIOI3_TBYTETERM.ILOGIC_Y1.ZINV_D origin:035-iob-ilogic 28_18
RIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IMUX20_1 origin:037-iob-pips 28_67 28_77 29_80
RIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IMUX22_1 origin:037-iob-pips 28_67 28_77 29_78
RIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IOCLK0 origin:037-iob-pips 28_67 29_76 29_78
RIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IOCLK1 origin:037-iob-pips 28_67 29_76 29_80
RIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IOCLK2 origin:037-iob-pips 28_67 28_77 28_79
RIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IOCLK3 origin:037-iob-pips 28_67 28_77 28_81
RIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK0 origin:037-iob-pips 28_67 28_79 29_74
RIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK1 origin:037-iob-pips 28_67 28_81 29_74
RIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK2 origin:037-iob-pips 28_67 29_74 29_78
RIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK3 origin:037-iob-pips 28_67 29_74 29_80
RIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK4 origin:037-iob-pips 28_67 28_75 28_79
RIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK5 origin:037-iob-pips 28_67 28_75 28_81
RIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO0 origin:037-iob-pips 28_67 28_75 29_78
RIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO1 origin:037-iob-pips 28_67 28_75 29_80
RIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO2 origin:037-iob-pips 28_67 28_79 29_76
RIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO3 origin:037-iob-pips 28_67 28_81 29_76
RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 origin:037-iob-pips 30_80 31_67 31_77
RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_76 30_78 31_67
RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_76 30_80 31_67
RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK2 origin:037-iob-pips 31_67 31_77 31_79
RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK3 origin:037-iob-pips 31_67 31_77 31_81
RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK0 origin:037-iob-pips 30_74 31_67 31_79
RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK1 origin:037-iob-pips 30_74 31_67 31_81
RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK2 origin:037-iob-pips 30_74 30_78 31_67
RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK3 origin:037-iob-pips 30_74 30_80 31_67
RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK4 origin:037-iob-pips 31_67 31_75 31_79
RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK5 origin:037-iob-pips 31_67 31_75 31_81
RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO0 origin:037-iob-pips 30_78 31_67 31_75
RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_80 31_67 31_75
RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_76 31_67 31_79
RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_76 31_67 31_81
RIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IMUX20_0 origin:037-iob-pips 28_47 29_50 29_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IMUX22_0 origin:037-iob-pips 28_49 29_50 29_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IOCLK0 origin:037-iob-pips 28_49 28_51 29_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IOCLK1 origin:037-iob-pips 28_47 28_51 29_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IOCLK2 origin:037-iob-pips 29_48 29_50 29_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IOCLK3 origin:037-iob-pips 29_46 29_50 29_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK0 origin:037-iob-pips 28_53 29_48 29_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK1 origin:037-iob-pips 28_53 29_46 29_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK2 origin:037-iob-pips 28_49 28_53 29_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK3 origin:037-iob-pips 28_47 28_53 29_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK4 origin:037-iob-pips 29_48 29_52 29_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK5 origin:037-iob-pips 29_46 29_52 29_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO0 origin:037-iob-pips 28_49 29_52 29_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO1 origin:037-iob-pips 28_47 29_52 29_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO2 origin:037-iob-pips 28_51 29_48 29_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO3 origin:037-iob-pips 28_51 29_46 29_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IMUX20_0 origin:037-iob-pips 30_50 30_60 31_47
RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IMUX22_0 origin:037-iob-pips 30_50 30_60 31_49
RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_60 31_49 31_51
RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_60 31_47 31_51
RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK2 origin:037-iob-pips 30_48 30_50 30_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK3 origin:037-iob-pips 30_46 30_50 30_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK0 origin:037-iob-pips 30_48 30_60 31_53
RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK1 origin:037-iob-pips 30_46 30_60 31_53
RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK2 origin:037-iob-pips 30_60 31_49 31_53
RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK3 origin:037-iob-pips 30_60 31_47 31_53
RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK4 origin:037-iob-pips 30_48 30_52 30_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK5 origin:037-iob-pips 30_46 30_52 30_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO0 origin:037-iob-pips 30_52 30_60 31_49
RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_52 30_60 31_47
RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_48 30_60 31_51
RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_46 30_60 31_51
RIOI3_TBYTETERM.IOI_OCLKM_0.IOI_IOCLK0 origin:037-iob-pips 30_92 30_94 31_83
RIOI3_TBYTETERM.IOI_OCLKM_0.IOI_IOCLK1 origin:037-iob-pips 30_92 30_96 31_83
RIOI3_TBYTETERM.IOI_OCLKM_0.IOI_IOCLK2 origin:037-iob-pips 31_83 31_93 31_95
RIOI3_TBYTETERM.IOI_OCLKM_0.IOI_IOCLK3 origin:037-iob-pips 31_83 31_93 31_97
RIOI3_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK0 origin:037-iob-pips 30_88 31_83 31_95
RIOI3_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK1 origin:037-iob-pips 30_88 31_83 31_97
RIOI3_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK2 origin:037-iob-pips 30_88 30_94 31_83
RIOI3_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK3 origin:037-iob-pips 30_88 30_96 31_83
RIOI3_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK4 origin:037-iob-pips 31_83 31_89 31_95
RIOI3_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK5 origin:037-iob-pips 31_83 31_89 31_97
RIOI3_TBYTETERM.IOI_OCLKM_0.IOI_RCLK_FORIO0 origin:037-iob-pips 30_94 31_83 31_89
RIOI3_TBYTETERM.IOI_OCLKM_0.IOI_RCLK_FORIO1 origin:037-iob-pips 30_96 31_83 31_89
RIOI3_TBYTETERM.IOI_OCLKM_0.IOI_RCLK_FORIO2 origin:037-iob-pips 30_92 31_83 31_95
RIOI3_TBYTETERM.IOI_OCLKM_0.IOI_RCLK_FORIO3 origin:037-iob-pips 30_92 31_83 31_97
RIOI3_TBYTETERM.IOI_OCLKM_1.IOI_IOCLK0 origin:037-iob-pips 30_44 31_33 31_35
RIOI3_TBYTETERM.IOI_OCLKM_1.IOI_IOCLK1 origin:037-iob-pips 30_44 31_31 31_35
RIOI3_TBYTETERM.IOI_OCLKM_1.IOI_IOCLK2 origin:037-iob-pips 30_32 30_34 30_44
RIOI3_TBYTETERM.IOI_OCLKM_1.IOI_IOCLK3 origin:037-iob-pips 30_30 30_34 30_44
RIOI3_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK0 origin:037-iob-pips 30_32 30_44 31_39
RIOI3_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK1 origin:037-iob-pips 30_30 30_44 31_39
RIOI3_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK2 origin:037-iob-pips 30_44 31_33 31_39
RIOI3_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK3 origin:037-iob-pips 30_44 31_31 31_39
RIOI3_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK4 origin:037-iob-pips 30_32 30_38 30_44
RIOI3_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK5 origin:037-iob-pips 30_30 30_38 30_44
RIOI3_TBYTETERM.IOI_OCLKM_1.IOI_RCLK_FORIO0 origin:037-iob-pips 30_38 30_44 31_33
RIOI3_TBYTETERM.IOI_OCLKM_1.IOI_RCLK_FORIO1 origin:037-iob-pips 30_38 30_44 31_31
RIOI3_TBYTETERM.IOI_OCLKM_1.IOI_RCLK_FORIO2 origin:037-iob-pips 30_32 30_44 31_35
RIOI3_TBYTETERM.IOI_OCLKM_1.IOI_RCLK_FORIO3 origin:037-iob-pips 30_30 30_44 31_35
RIOI3_TBYTETERM.IOI_OCLK_0.IOI_IMUX31_1 origin:037-iob-pips 28_83 28_93 29_94
RIOI3_TBYTETERM.IOI_OCLK_0.IOI_IOCLK0 origin:037-iob-pips 28_83 29_92 29_94
RIOI3_TBYTETERM.IOI_OCLK_0.IOI_IOCLK1 origin:037-iob-pips 28_83 29_92 29_96
RIOI3_TBYTETERM.IOI_OCLK_0.IOI_IOCLK2 origin:037-iob-pips 28_83 28_93 28_95
RIOI3_TBYTETERM.IOI_OCLK_0.IOI_IOCLK3 origin:037-iob-pips 28_83 28_93 28_97
RIOI3_TBYTETERM.ILOGIC_Y1.IDELMUXE3.P0 origin:035-iob-ilogic 28_26
RIOI3_TBYTETERM.ILOGIC_Y1.IFFDELMUXE3.P0 origin:035-iob-ilogic 29_11
RIOI3_TBYTETERM.IOI_OCLK_0.IOI_LEAF_GCLK0 origin:037-iob-pips 28_83 28_95 29_88
RIOI3_TBYTETERM.IOI_OCLK_0.IOI_LEAF_GCLK1 origin:037-iob-pips 28_83 28_97 29_88
RIOI3_TBYTETERM.IOI_OCLK_0.IOI_LEAF_GCLK2 origin:037-iob-pips 28_83 29_88 29_94
@ -208,11 +112,11 @@ RIOI3_TBYTETERM.IOI_OCLK_0.IOI_RCLK_FORIO0 origin:037-iob-pips 28_83 28_89 29_94
RIOI3_TBYTETERM.IOI_OCLK_0.IOI_RCLK_FORIO1 origin:037-iob-pips 28_83 28_89 29_96
RIOI3_TBYTETERM.IOI_OCLK_0.IOI_RCLK_FORIO2 origin:037-iob-pips 28_83 28_95 29_92
RIOI3_TBYTETERM.IOI_OCLK_0.IOI_RCLK_FORIO3 origin:037-iob-pips 28_83 28_97 29_92
RIOI3_TBYTETERM.IOI_OCLK_1.IOI_IMUX31_0 origin:037-iob-pips 28_33 29_34 29_44
RIOI3_TBYTETERM.IOI_OCLK_1.IOI_IOCLK0 origin:037-iob-pips 28_33 28_35 29_44
RIOI3_TBYTETERM.IOI_OCLK_1.IOI_IOCLK1 origin:037-iob-pips 28_31 28_35 29_44
RIOI3_TBYTETERM.IOI_OCLK_1.IOI_IOCLK2 origin:037-iob-pips 29_32 29_34 29_44
RIOI3_TBYTETERM.IOI_OCLK_1.IOI_IOCLK3 origin:037-iob-pips 29_30 29_34 29_44
RIOI3_TBYTETERM.IOI_OCLK_0.IOI_IMUX31_1 origin:037-iob-pips 28_83 28_93 29_94
RIOI3_TBYTETERM.IOI_OCLK_0.IOI_IOCLK0 origin:037-iob-pips 28_83 29_92 29_94
RIOI3_TBYTETERM.IOI_OCLK_0.IOI_IOCLK1 origin:037-iob-pips 28_83 29_92 29_96
RIOI3_TBYTETERM.IOI_OCLK_0.IOI_IOCLK2 origin:037-iob-pips 28_83 28_93 28_95
RIOI3_TBYTETERM.IOI_OCLK_0.IOI_IOCLK3 origin:037-iob-pips 28_83 28_93 28_97
RIOI3_TBYTETERM.IOI_OCLK_1.IOI_LEAF_GCLK0 origin:037-iob-pips 28_39 29_32 29_44
RIOI3_TBYTETERM.IOI_OCLK_1.IOI_LEAF_GCLK1 origin:037-iob-pips 28_39 29_30 29_44
RIOI3_TBYTETERM.IOI_OCLK_1.IOI_LEAF_GCLK2 origin:037-iob-pips 28_33 28_39 29_44
@ -223,7 +127,102 @@ RIOI3_TBYTETERM.IOI_OCLK_1.IOI_RCLK_FORIO0 origin:037-iob-pips 28_33 29_38 29_44
RIOI3_TBYTETERM.IOI_OCLK_1.IOI_RCLK_FORIO1 origin:037-iob-pips 28_31 29_38 29_44
RIOI3_TBYTETERM.IOI_OCLK_1.IOI_RCLK_FORIO2 origin:037-iob-pips 28_35 29_32 29_44
RIOI3_TBYTETERM.IOI_OCLK_1.IOI_RCLK_FORIO3 origin:037-iob-pips 28_35 29_30 29_44
RIOI3_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_IMUX8_1 origin:037-iob-pips 28_111 28_121 28_123 31_111 31_121 31_123
RIOI3_TBYTETERM.IOI_OCLK_1.IOI_IMUX31_0 origin:037-iob-pips 28_33 29_34 29_44
RIOI3_TBYTETERM.IOI_OCLK_1.IOI_IOCLK0 origin:037-iob-pips 28_33 28_35 29_44
RIOI3_TBYTETERM.IOI_OCLK_1.IOI_IOCLK1 origin:037-iob-pips 28_31 28_35 29_44
RIOI3_TBYTETERM.IOI_OCLK_1.IOI_IOCLK2 origin:037-iob-pips 29_32 29_34 29_44
RIOI3_TBYTETERM.IOI_OCLK_1.IOI_IOCLK3 origin:037-iob-pips 29_30 29_34 29_44
RIOI3_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK0 origin:037-iob-pips 30_88 31_83 31_95
RIOI3_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK1 origin:037-iob-pips 30_88 31_83 31_97
RIOI3_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK2 origin:037-iob-pips 30_88 30_94 31_83
RIOI3_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK3 origin:037-iob-pips 30_88 30_96 31_83
RIOI3_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK4 origin:037-iob-pips 31_83 31_89 31_95
RIOI3_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK5 origin:037-iob-pips 31_83 31_89 31_97
RIOI3_TBYTETERM.IOI_OCLKM_0.IOI_RCLK_FORIO0 origin:037-iob-pips 30_94 31_83 31_89
RIOI3_TBYTETERM.IOI_OCLKM_0.IOI_RCLK_FORIO1 origin:037-iob-pips 30_96 31_83 31_89
RIOI3_TBYTETERM.IOI_OCLKM_0.IOI_RCLK_FORIO2 origin:037-iob-pips 30_92 31_83 31_95
RIOI3_TBYTETERM.IOI_OCLKM_0.IOI_RCLK_FORIO3 origin:037-iob-pips 30_92 31_83 31_97
RIOI3_TBYTETERM.IOI_OCLKM_0.IOI_IOCLK0 origin:037-iob-pips 30_92 30_94 31_83
RIOI3_TBYTETERM.IOI_OCLKM_0.IOI_IOCLK1 origin:037-iob-pips 30_92 30_96 31_83
RIOI3_TBYTETERM.IOI_OCLKM_0.IOI_IOCLK2 origin:037-iob-pips 31_83 31_93 31_95
RIOI3_TBYTETERM.IOI_OCLKM_0.IOI_IOCLK3 origin:037-iob-pips 31_83 31_93 31_97
RIOI3_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK0 origin:037-iob-pips 30_32 30_44 31_39
RIOI3_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK1 origin:037-iob-pips 30_30 30_44 31_39
RIOI3_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK2 origin:037-iob-pips 30_44 31_33 31_39
RIOI3_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK3 origin:037-iob-pips 30_44 31_31 31_39
RIOI3_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK4 origin:037-iob-pips 30_32 30_38 30_44
RIOI3_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK5 origin:037-iob-pips 30_30 30_38 30_44
RIOI3_TBYTETERM.IOI_OCLKM_1.IOI_RCLK_FORIO0 origin:037-iob-pips 30_38 30_44 31_33
RIOI3_TBYTETERM.IOI_OCLKM_1.IOI_RCLK_FORIO1 origin:037-iob-pips 30_38 30_44 31_31
RIOI3_TBYTETERM.IOI_OCLKM_1.IOI_RCLK_FORIO2 origin:037-iob-pips 30_32 30_44 31_35
RIOI3_TBYTETERM.IOI_OCLKM_1.IOI_RCLK_FORIO3 origin:037-iob-pips 30_30 30_44 31_35
RIOI3_TBYTETERM.IOI_OCLKM_1.IOI_IOCLK0 origin:037-iob-pips 30_44 31_33 31_35
RIOI3_TBYTETERM.IOI_OCLKM_1.IOI_IOCLK1 origin:037-iob-pips 30_44 31_31 31_35
RIOI3_TBYTETERM.IOI_OCLKM_1.IOI_IOCLK2 origin:037-iob-pips 30_32 30_34 30_44
RIOI3_TBYTETERM.IOI_OCLKM_1.IOI_IOCLK3 origin:037-iob-pips 30_30 30_34 30_44
RIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK0 origin:037-iob-pips 28_67 28_79 29_74
RIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK1 origin:037-iob-pips 28_67 28_81 29_74
RIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK2 origin:037-iob-pips 28_67 29_74 29_78
RIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK3 origin:037-iob-pips 28_67 29_74 29_80
RIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK4 origin:037-iob-pips 28_67 28_75 28_79
RIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK5 origin:037-iob-pips 28_67 28_75 28_81
RIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO0 origin:037-iob-pips 28_67 28_75 29_78
RIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO1 origin:037-iob-pips 28_67 28_75 29_80
RIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO2 origin:037-iob-pips 28_67 28_79 29_76
RIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO3 origin:037-iob-pips 28_67 28_81 29_76
RIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IMUX20_1 origin:037-iob-pips 28_67 28_77 29_80
RIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IMUX22_1 origin:037-iob-pips 28_67 28_77 29_78
RIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IOCLK0 origin:037-iob-pips 28_67 29_76 29_78
RIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IOCLK1 origin:037-iob-pips 28_67 29_76 29_80
RIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IOCLK2 origin:037-iob-pips 28_67 28_77 28_79
RIOI3_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IOCLK3 origin:037-iob-pips 28_67 28_77 28_81
RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK0 origin:037-iob-pips 30_74 31_67 31_79
RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK1 origin:037-iob-pips 30_74 31_67 31_81
RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK2 origin:037-iob-pips 30_74 30_78 31_67
RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK3 origin:037-iob-pips 30_74 30_80 31_67
RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK4 origin:037-iob-pips 31_67 31_75 31_79
RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK5 origin:037-iob-pips 31_67 31_75 31_81
RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO0 origin:037-iob-pips 30_78 31_67 31_75
RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_80 31_67 31_75
RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_76 31_67 31_79
RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_76 31_67 31_81
RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 origin:037-iob-pips 30_80 31_67 31_77
RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_76 30_78 31_67
RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_76 30_80 31_67
RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK2 origin:037-iob-pips 31_67 31_77 31_79
RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK3 origin:037-iob-pips 31_67 31_77 31_81
RIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK0 origin:037-iob-pips 28_53 29_48 29_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK1 origin:037-iob-pips 28_53 29_46 29_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK2 origin:037-iob-pips 28_49 28_53 29_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK3 origin:037-iob-pips 28_47 28_53 29_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK4 origin:037-iob-pips 29_48 29_52 29_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK5 origin:037-iob-pips 29_46 29_52 29_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO0 origin:037-iob-pips 28_49 29_52 29_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO1 origin:037-iob-pips 28_47 29_52 29_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO2 origin:037-iob-pips 28_51 29_48 29_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO3 origin:037-iob-pips 28_51 29_46 29_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IMUX20_0 origin:037-iob-pips 28_47 29_50 29_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IMUX22_0 origin:037-iob-pips 28_49 29_50 29_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IOCLK0 origin:037-iob-pips 28_49 28_51 29_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IOCLK1 origin:037-iob-pips 28_47 28_51 29_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IOCLK2 origin:037-iob-pips 29_48 29_50 29_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IOCLK3 origin:037-iob-pips 29_46 29_50 29_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK0 origin:037-iob-pips 30_48 30_60 31_53
RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK1 origin:037-iob-pips 30_46 30_60 31_53
RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK2 origin:037-iob-pips 30_60 31_49 31_53
RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK3 origin:037-iob-pips 30_60 31_47 31_53
RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK4 origin:037-iob-pips 30_48 30_52 30_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK5 origin:037-iob-pips 30_46 30_52 30_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO0 origin:037-iob-pips 30_52 30_60 31_49
RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_52 30_60 31_47
RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_48 30_60 31_51
RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_46 30_60 31_51
RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IMUX20_0 origin:037-iob-pips 30_50 30_60 31_47
RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IMUX22_0 origin:037-iob-pips 30_50 30_60 31_49
RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_60 31_49 31_51
RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_60 31_47 31_51
RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK2 origin:037-iob-pips 30_48 30_50 30_60
RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK3 origin:037-iob-pips 30_46 30_50 30_60
RIOI3_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK0 origin:037-iob-pips 28_111 29_118 29_124 30_118 30_124 31_111
RIOI3_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK1 origin:037-iob-pips 28_111 29_118 29_126 30_118 30_126 31_111
RIOI3_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK2 origin:037-iob-pips 28_111 28_123 29_118 30_118 31_111 31_123
@ -234,7 +233,7 @@ RIOI3_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO0 origin:037-iob-pips 28_111 28
RIOI3_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO1 origin:037-iob-pips 28_111 28_119 28_125 31_111 31_119 31_125
RIOI3_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO2 origin:037-iob-pips 28_111 28_121 29_124 30_124 31_111 31_121
RIOI3_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO3 origin:037-iob-pips 28_111 28_121 29_126 30_126 31_111 31_121
RIOI3_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_IMUX8_0 origin:037-iob-pips 29_04 29_06 29_16 30_04 30_06 30_16
RIOI3_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_IMUX8_1 origin:037-iob-pips 28_111 28_121 28_123 31_111 31_121 31_123
RIOI3_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK0 origin:037-iob-pips 28_03 28_09 29_16 30_16 31_03 31_09
RIOI3_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK1 origin:037-iob-pips 28_01 28_09 29_16 30_16 31_01 31_09
RIOI3_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK2 origin:037-iob-pips 28_09 29_04 29_16 30_04 30_16 31_09
@ -245,6 +244,7 @@ RIOI3_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO0 origin:037-iob-pips 29_04 29_
RIOI3_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO1 origin:037-iob-pips 29_02 29_08 29_16 30_02 30_08 30_16
RIOI3_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO2 origin:037-iob-pips 28_03 29_06 29_16 30_06 30_16 31_03
RIOI3_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO3 origin:037-iob-pips 28_01 29_06 29_16 30_06 30_16 31_01
RIOI3_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_IMUX8_0 origin:037-iob-pips 29_04 29_06 29_16 30_04 30_06 30_16
RIOI3_TBYTETERM.OLOGIC_Y0.IS_CLKDIV_INVERTED origin:036-iob-ologic 30_85
RIOI3_TBYTETERM.OLOGIC_Y0.IS_D1_INVERTED origin:036-iob-ologic 30_97
RIOI3_TBYTETERM.OLOGIC_Y0.IS_D2_INVERTED origin:036-iob-ologic 31_102

528
artix7/site_type_DSP48E1.json
View File

@ -6,6 +6,30 @@
"A1": {
"direction": "IN"
},
"A2": {
"direction": "IN"
},
"A3": {
"direction": "IN"
},
"A4": {
"direction": "IN"
},
"A5": {
"direction": "IN"
},
"A6": {
"direction": "IN"
},
"A7": {
"direction": "IN"
},
"A8": {
"direction": "IN"
},
"A9": {
"direction": "IN"
},
"A10": {
"direction": "IN"
},
@ -36,9 +60,6 @@
"A19": {
"direction": "IN"
},
"A2": {
"direction": "IN"
},
"A20": {
"direction": "IN"
},
@ -69,33 +90,36 @@
"A29": {
"direction": "IN"
},
"A3": {
"direction": "IN"
},
"A4": {
"direction": "IN"
},
"A5": {
"direction": "IN"
},
"A6": {
"direction": "IN"
},
"A7": {
"direction": "IN"
},
"A8": {
"direction": "IN"
},
"A9": {
"direction": "IN"
},
"ACIN0": {
"direction": "IN"
},
"ACIN1": {
"direction": "IN"
},
"ACIN2": {
"direction": "IN"
},
"ACIN3": {
"direction": "IN"
},
"ACIN4": {
"direction": "IN"
},
"ACIN5": {
"direction": "IN"
},
"ACIN6": {
"direction": "IN"
},
"ACIN7": {
"direction": "IN"
},
"ACIN8": {
"direction": "IN"
},
"ACIN9": {
"direction": "IN"
},
"ACIN10": {
"direction": "IN"
},
@ -126,9 +150,6 @@
"ACIN19": {
"direction": "IN"
},
"ACIN2": {
"direction": "IN"
},
"ACIN20": {
"direction": "IN"
},
@ -159,33 +180,36 @@
"ACIN29": {
"direction": "IN"
},
"ACIN3": {
"direction": "IN"
},
"ACIN4": {
"direction": "IN"
},
"ACIN5": {
"direction": "IN"
},
"ACIN6": {
"direction": "IN"
},
"ACIN7": {
"direction": "IN"
},
"ACIN8": {
"direction": "IN"
},
"ACIN9": {
"direction": "IN"
},
"ACOUT0": {
"direction": "OUT"
},
"ACOUT1": {
"direction": "OUT"
},
"ACOUT2": {
"direction": "OUT"
},
"ACOUT3": {
"direction": "OUT"
},
"ACOUT4": {
"direction": "OUT"
},
"ACOUT5": {
"direction": "OUT"
},
"ACOUT6": {
"direction": "OUT"
},
"ACOUT7": {
"direction": "OUT"
},
"ACOUT8": {
"direction": "OUT"
},
"ACOUT9": {
"direction": "OUT"
},
"ACOUT10": {
"direction": "OUT"
},
@ -216,9 +240,6 @@
"ACOUT19": {
"direction": "OUT"
},
"ACOUT2": {
"direction": "OUT"
},
"ACOUT20": {
"direction": "OUT"
},
@ -249,27 +270,6 @@
"ACOUT29": {
"direction": "OUT"
},
"ACOUT3": {
"direction": "OUT"
},
"ACOUT4": {
"direction": "OUT"
},
"ACOUT5": {
"direction": "OUT"
},
"ACOUT6": {
"direction": "OUT"
},
"ACOUT7": {
"direction": "OUT"
},
"ACOUT8": {
"direction": "OUT"
},
"ACOUT9": {
"direction": "OUT"
},
"ALUMODE0": {
"direction": "IN"
},
@ -288,30 +288,6 @@
"B1": {
"direction": "IN"
},
"B10": {
"direction": "IN"
},
"B11": {
"direction": "IN"
},
"B12": {
"direction": "IN"
},
"B13": {
"direction": "IN"
},
"B14": {
"direction": "IN"
},
"B15": {
"direction": "IN"
},
"B16": {
"direction": "IN"
},
"B17": {
"direction": "IN"
},
"B2": {
"direction": "IN"
},
@ -336,36 +312,36 @@
"B9": {
"direction": "IN"
},
"B10": {
"direction": "IN"
},
"B11": {
"direction": "IN"
},
"B12": {
"direction": "IN"
},
"B13": {
"direction": "IN"
},
"B14": {
"direction": "IN"
},
"B15": {
"direction": "IN"
},
"B16": {
"direction": "IN"
},
"B17": {
"direction": "IN"
},
"BCIN0": {
"direction": "IN"
},
"BCIN1": {
"direction": "IN"
},
"BCIN10": {
"direction": "IN"
},
"BCIN11": {
"direction": "IN"
},
"BCIN12": {
"direction": "IN"
},
"BCIN13": {
"direction": "IN"
},
"BCIN14": {
"direction": "IN"
},
"BCIN15": {
"direction": "IN"
},
"BCIN16": {
"direction": "IN"
},
"BCIN17": {
"direction": "IN"
},
"BCIN2": {
"direction": "IN"
},
@ -390,36 +366,36 @@
"BCIN9": {
"direction": "IN"
},
"BCIN10": {
"direction": "IN"
},
"BCIN11": {
"direction": "IN"
},
"BCIN12": {
"direction": "IN"
},
"BCIN13": {
"direction": "IN"
},
"BCIN14": {
"direction": "IN"
},
"BCIN15": {
"direction": "IN"
},
"BCIN16": {
"direction": "IN"
},
"BCIN17": {
"direction": "IN"
},
"BCOUT0": {
"direction": "OUT"
},
"BCOUT1": {
"direction": "OUT"
},
"BCOUT10": {
"direction": "OUT"
},
"BCOUT11": {
"direction": "OUT"
},
"BCOUT12": {
"direction": "OUT"
},
"BCOUT13": {
"direction": "OUT"
},
"BCOUT14": {
"direction": "OUT"
},
"BCOUT15": {
"direction": "OUT"
},
"BCOUT16": {
"direction": "OUT"
},
"BCOUT17": {
"direction": "OUT"
},
"BCOUT2": {
"direction": "OUT"
},
@ -444,12 +420,60 @@
"BCOUT9": {
"direction": "OUT"
},
"BCOUT10": {
"direction": "OUT"
},
"BCOUT11": {
"direction": "OUT"
},
"BCOUT12": {
"direction": "OUT"
},
"BCOUT13": {
"direction": "OUT"
},
"BCOUT14": {
"direction": "OUT"
},
"BCOUT15": {
"direction": "OUT"
},
"BCOUT16": {
"direction": "OUT"
},
"BCOUT17": {
"direction": "OUT"
},
"C0": {
"direction": "IN"
},
"C1": {
"direction": "IN"
},
"C2": {
"direction": "IN"
},
"C3": {
"direction": "IN"
},
"C4": {
"direction": "IN"
},
"C5": {
"direction": "IN"
},
"C6": {
"direction": "IN"
},
"C7": {
"direction": "IN"
},
"C8": {
"direction": "IN"
},
"C9": {
"direction": "IN"
},
"C10": {
"direction": "IN"
},
@ -480,9 +504,6 @@
"C19": {
"direction": "IN"
},
"C2": {
"direction": "IN"
},
"C20": {
"direction": "IN"
},
@ -513,9 +534,6 @@
"C29": {
"direction": "IN"
},
"C3": {
"direction": "IN"
},
"C30": {
"direction": "IN"
},
@ -546,9 +564,6 @@
"C39": {
"direction": "IN"
},
"C4": {
"direction": "IN"
},
"C40": {
"direction": "IN"
},
@ -573,21 +588,6 @@
"C47": {
"direction": "IN"
},
"C5": {
"direction": "IN"
},
"C6": {
"direction": "IN"
},
"C7": {
"direction": "IN"
},
"C8": {
"direction": "IN"
},
"C9": {
"direction": "IN"
},
"CARRYCASCIN": {
"direction": "IN"
},
@ -666,6 +666,30 @@
"D1": {
"direction": "IN"
},
"D2": {
"direction": "IN"
},
"D3": {
"direction": "IN"
},
"D4": {
"direction": "IN"
},
"D5": {
"direction": "IN"
},
"D6": {
"direction": "IN"
},
"D7": {
"direction": "IN"
},
"D8": {
"direction": "IN"
},
"D9": {
"direction": "IN"
},
"D10": {
"direction": "IN"
},
@ -696,9 +720,6 @@
"D19": {
"direction": "IN"
},
"D2": {
"direction": "IN"
},
"D20": {
"direction": "IN"
},
@ -714,27 +735,6 @@
"D24": {
"direction": "IN"
},
"D3": {
"direction": "IN"
},
"D4": {
"direction": "IN"
},
"D5": {
"direction": "IN"
},
"D6": {
"direction": "IN"
},
"D7": {
"direction": "IN"
},
"D8": {
"direction": "IN"
},
"D9": {
"direction": "IN"
},
"INMODE0": {
"direction": "IN"
},
@ -786,6 +786,30 @@
"P1": {
"direction": "OUT"
},
"P2": {
"direction": "OUT"
},
"P3": {
"direction": "OUT"
},
"P4": {
"direction": "OUT"
},
"P5": {
"direction": "OUT"
},
"P6": {
"direction": "OUT"
},
"P7": {
"direction": "OUT"
},
"P8": {
"direction": "OUT"
},
"P9": {
"direction": "OUT"
},
"P10": {
"direction": "OUT"
},
@ -816,9 +840,6 @@
"P19": {
"direction": "OUT"
},
"P2": {
"direction": "OUT"
},
"P20": {
"direction": "OUT"
},
@ -849,9 +870,6 @@
"P29": {
"direction": "OUT"
},
"P3": {
"direction": "OUT"
},
"P30": {
"direction": "OUT"
},
@ -882,9 +900,6 @@
"P39": {
"direction": "OUT"
},
"P4": {
"direction": "OUT"
},
"P40": {
"direction": "OUT"
},
@ -909,21 +924,6 @@
"P47": {
"direction": "OUT"
},
"P5": {
"direction": "OUT"
},
"P6": {
"direction": "OUT"
},
"P7": {
"direction": "OUT"
},
"P8": {
"direction": "OUT"
},
"P9": {
"direction": "OUT"
},
"PATTERNBDETECT": {
"direction": "OUT"
},
@ -936,6 +936,30 @@
"PCIN1": {
"direction": "IN"
},
"PCIN2": {
"direction": "IN"
},
"PCIN3": {
"direction": "IN"
},
"PCIN4": {
"direction": "IN"
},
"PCIN5": {
"direction": "IN"
},
"PCIN6": {
"direction": "IN"
},
"PCIN7": {
"direction": "IN"
},
"PCIN8": {
"direction": "IN"
},
"PCIN9": {
"direction": "IN"
},
"PCIN10": {
"direction": "IN"
},
@ -966,9 +990,6 @@
"PCIN19": {
"direction": "IN"
},
"PCIN2": {
"direction": "IN"
},
"PCIN20": {
"direction": "IN"
},
@ -999,9 +1020,6 @@
"PCIN29": {
"direction": "IN"
},
"PCIN3": {
"direction": "IN"
},
"PCIN30": {
"direction": "IN"
},
@ -1032,9 +1050,6 @@
"PCIN39": {
"direction": "IN"
},
"PCIN4": {
"direction": "IN"
},
"PCIN40": {
"direction": "IN"
},
@ -1059,27 +1074,36 @@
"PCIN47": {
"direction": "IN"
},
"PCIN5": {
"direction": "IN"
},
"PCIN6": {
"direction": "IN"
},
"PCIN7": {
"direction": "IN"
},
"PCIN8": {
"direction": "IN"
},
"PCIN9": {
"direction": "IN"
},
"PCOUT0": {
"direction": "OUT"
},
"PCOUT1": {
"direction": "OUT"
},
"PCOUT2": {
"direction": "OUT"
},
"PCOUT3": {
"direction": "OUT"
},
"PCOUT4": {
"direction": "OUT"
},
"PCOUT5": {
"direction": "OUT"
},
"PCOUT6": {
"direction": "OUT"
},
"PCOUT7": {
"direction": "OUT"
},
"PCOUT8": {
"direction": "OUT"
},
"PCOUT9": {
"direction": "OUT"
},
"PCOUT10": {
"direction": "OUT"
},
@ -1110,9 +1134,6 @@
"PCOUT19": {
"direction": "OUT"
},
"PCOUT2": {
"direction": "OUT"
},
"PCOUT20": {
"direction": "OUT"
},
@ -1143,9 +1164,6 @@
"PCOUT29": {
"direction": "OUT"
},
"PCOUT3": {
"direction": "OUT"
},
"PCOUT30": {
"direction": "OUT"
},
@ -1176,9 +1194,6 @@
"PCOUT39": {
"direction": "OUT"
},
"PCOUT4": {
"direction": "OUT"
},
"PCOUT40": {
"direction": "OUT"
},
@ -1203,21 +1218,6 @@
"PCOUT47": {
"direction": "OUT"
},
"PCOUT5": {
"direction": "OUT"
},
"PCOUT6": {
"direction": "OUT"
},
"PCOUT7": {
"direction": "OUT"
},
"PCOUT8": {
"direction": "OUT"
},
"PCOUT9": {
"direction": "OUT"
},
"RSTA": {
"direction": "IN"
},

48
artix7/site_type_EFUSE_USR.json
View File

@ -6,6 +6,30 @@
"EFUSEUSR1": {
"direction": "OUT"
},
"EFUSEUSR2": {
"direction": "OUT"
},
"EFUSEUSR3": {
"direction": "OUT"
},
"EFUSEUSR4": {
"direction": "OUT"
},
"EFUSEUSR5": {
"direction": "OUT"
},
"EFUSEUSR6": {
"direction": "OUT"
},
"EFUSEUSR7": {
"direction": "OUT"
},
"EFUSEUSR8": {
"direction": "OUT"
},
"EFUSEUSR9": {
"direction": "OUT"
},
"EFUSEUSR10": {
"direction": "OUT"
},
@ -36,9 +60,6 @@
"EFUSEUSR19": {
"direction": "OUT"
},
"EFUSEUSR2": {
"direction": "OUT"
},
"EFUSEUSR20": {
"direction": "OUT"
},
@ -69,32 +90,11 @@
"EFUSEUSR29": {
"direction": "OUT"
},
"EFUSEUSR3": {
"direction": "OUT"
},
"EFUSEUSR30": {
"direction": "OUT"
},
"EFUSEUSR31": {
"direction": "OUT"
},
"EFUSEUSR4": {
"direction": "OUT"
},
"EFUSEUSR5": {
"direction": "OUT"
},
"EFUSEUSR6": {
"direction": "OUT"
},
"EFUSEUSR7": {
"direction": "OUT"
},
"EFUSEUSR8": {
"direction": "OUT"
},
"EFUSEUSR9": {
"direction": "OUT"
}
},
"site_pips": {},

192
artix7/site_type_FIFO18E1.json
View File

@ -6,18 +6,6 @@
"ADDRARDADDR1": {
"direction": "IN"
},
"ADDRARDADDR10": {
"direction": "IN"
},
"ADDRARDADDR11": {
"direction": "IN"
},
"ADDRARDADDR12": {
"direction": "IN"
},
"ADDRARDADDR13": {
"direction": "IN"
},
"ADDRARDADDR2": {
"direction": "IN"
},
@ -42,6 +30,18 @@
"ADDRARDADDR9": {
"direction": "IN"
},
"ADDRARDADDR10": {
"direction": "IN"
},
"ADDRARDADDR11": {
"direction": "IN"
},
"ADDRARDADDR12": {
"direction": "IN"
},
"ADDRARDADDR13": {
"direction": "IN"
},
"ADDRATIEHIGH0": {
"direction": "IN"
},
@ -60,18 +60,6 @@
"ADDRBWRADDR1": {
"direction": "IN"
},
"ADDRBWRADDR10": {
"direction": "IN"
},
"ADDRBWRADDR11": {
"direction": "IN"
},
"ADDRBWRADDR12": {
"direction": "IN"
},
"ADDRBWRADDR13": {
"direction": "IN"
},
"ADDRBWRADDR2": {
"direction": "IN"
},
@ -96,6 +84,18 @@
"ADDRBWRADDR9": {
"direction": "IN"
},
"ADDRBWRADDR10": {
"direction": "IN"
},
"ADDRBWRADDR11": {
"direction": "IN"
},
"ADDRBWRADDR12": {
"direction": "IN"
},
"ADDRBWRADDR13": {
"direction": "IN"
},
"ALMOSTEMPTY": {
"direction": "OUT"
},
@ -108,24 +108,6 @@
"DIADI1": {
"direction": "IN"
},
"DIADI10": {
"direction": "IN"
},
"DIADI11": {
"direction": "IN"
},
"DIADI12": {
"direction": "IN"
},
"DIADI13": {
"direction": "IN"
},
"DIADI14": {
"direction": "IN"
},
"DIADI15": {
"direction": "IN"
},
"DIADI2": {
"direction": "IN"
},
@ -150,30 +132,30 @@
"DIADI9": {
"direction": "IN"
},
"DIADI10": {
"direction": "IN"
},
"DIADI11": {
"direction": "IN"
},
"DIADI12": {
"direction": "IN"
},
"DIADI13": {
"direction": "IN"
},
"DIADI14": {
"direction": "IN"
},
"DIADI15": {
"direction": "IN"
},
"DIBDI0": {
"direction": "IN"
},
"DIBDI1": {
"direction": "IN"
},
"DIBDI10": {
"direction": "IN"
},
"DIBDI11": {
"direction": "IN"
},
"DIBDI12": {
"direction": "IN"
},
"DIBDI13": {
"direction": "IN"
},
"DIBDI14": {
"direction": "IN"
},
"DIBDI15": {
"direction": "IN"
},
"DIBDI2": {
"direction": "IN"
},
@ -198,6 +180,24 @@
"DIBDI9": {
"direction": "IN"
},
"DIBDI10": {
"direction": "IN"
},
"DIBDI11": {
"direction": "IN"
},
"DIBDI12": {
"direction": "IN"
},
"DIBDI13": {
"direction": "IN"
},
"DIBDI14": {
"direction": "IN"
},
"DIBDI15": {
"direction": "IN"
},
"DIPADIP0": {
"direction": "IN"
},
@ -216,6 +216,30 @@
"DO1": {
"direction": "OUT"
},
"DO2": {
"direction": "OUT"
},
"DO3": {
"direction": "OUT"
},
"DO4": {
"direction": "OUT"
},
"DO5": {
"direction": "OUT"
},
"DO6": {
"direction": "OUT"
},
"DO7": {
"direction": "OUT"
},
"DO8": {
"direction": "OUT"
},
"DO9": {
"direction": "OUT"
},
"DO10": {
"direction": "OUT"
},
@ -246,9 +270,6 @@
"DO19": {
"direction": "OUT"
},
"DO2": {
"direction": "OUT"
},
"DO20": {
"direction": "OUT"
},
@ -279,33 +300,12 @@
"DO29": {
"direction": "OUT"
},
"DO3": {
"direction": "OUT"
},
"DO30": {
"direction": "OUT"
},
"DO31": {
"direction": "OUT"
},
"DO4": {
"direction": "OUT"
},
"DO5": {
"direction": "OUT"
},
"DO6": {
"direction": "OUT"
},
"DO7": {
"direction": "OUT"
},
"DO8": {
"direction": "OUT"
},
"DO9": {
"direction": "OUT"
},
"DOP0": {
"direction": "OUT"
},
@ -333,12 +333,6 @@
"RDCOUNT1": {
"direction": "OUT"
},
"RDCOUNT10": {
"direction": "OUT"
},
"RDCOUNT11": {
"direction": "OUT"
},
"RDCOUNT2": {
"direction": "OUT"
},
@ -363,6 +357,12 @@
"RDCOUNT9": {
"direction": "OUT"
},
"RDCOUNT10": {
"direction": "OUT"
},
"RDCOUNT11": {
"direction": "OUT"
},
"RDEN": {
"direction": "IN"
},
@ -438,12 +438,6 @@
"WRCOUNT1": {
"direction": "OUT"
},
"WRCOUNT10": {
"direction": "OUT"
},
"WRCOUNT11": {
"direction": "OUT"
},
"WRCOUNT2": {
"direction": "OUT"
},
@ -468,6 +462,12 @@
"WRCOUNT9": {
"direction": "OUT"
},
"WRCOUNT10": {
"direction": "OUT"
},
"WRCOUNT11": {
"direction": "OUT"
},
"WREN": {
"direction": "IN"
},

66
artix7/site_type_FRAME_ECC.json
View File

@ -15,6 +15,30 @@
"FAR1": {
"direction": "OUT"
},
"FAR2": {
"direction": "OUT"
},
"FAR3": {
"direction": "OUT"
},
"FAR4": {
"direction": "OUT"
},
"FAR5": {
"direction": "OUT"
},
"FAR6": {
"direction": "OUT"
},
"FAR7": {
"direction": "OUT"
},
"FAR8": {
"direction": "OUT"
},
"FAR9": {
"direction": "OUT"
},
"FAR10": {
"direction": "OUT"
},
@ -45,9 +69,6 @@
"FAR19": {
"direction": "OUT"
},
"FAR2": {
"direction": "OUT"
},
"FAR20": {
"direction": "OUT"
},
@ -66,27 +87,6 @@
"FAR25": {
"direction": "OUT"
},
"FAR3": {
"direction": "OUT"
},
"FAR4": {
"direction": "OUT"
},
"FAR5": {
"direction": "OUT"
},
"FAR6": {
"direction": "OUT"
},
"FAR7": {
"direction": "OUT"
},
"FAR8": {
"direction": "OUT"
},
"FAR9": {
"direction": "OUT"
},
"SYNBIT0": {
"direction": "OUT"
},
@ -108,15 +108,6 @@
"SYNDROME1": {
"direction": "OUT"
},
"SYNDROME10": {
"direction": "OUT"
},
"SYNDROME11": {
"direction": "OUT"
},
"SYNDROME12": {
"direction": "OUT"
},
"SYNDROME2": {
"direction": "OUT"
},
@ -141,6 +132,15 @@
"SYNDROME9": {
"direction": "OUT"
},
"SYNDROME10": {
"direction": "OUT"
},
"SYNDROME11": {
"direction": "OUT"
},
"SYNDROME12": {
"direction": "OUT"
},
"SYNDROMEVALID": {
"direction": "OUT"
},

378
artix7/site_type_GTPE2_CHANNEL.json
View File

@ -21,21 +21,6 @@
"DMONITOROUT1": {
"direction": "OUT"
},
"DMONITOROUT10": {
"direction": "OUT"
},
"DMONITOROUT11": {
"direction": "OUT"
},
"DMONITOROUT12": {
"direction": "OUT"
},
"DMONITOROUT13": {
"direction": "OUT"
},
"DMONITOROUT14": {
"direction": "OUT"
},
"DMONITOROUT2": {
"direction": "OUT"
},
@ -60,6 +45,21 @@
"DMONITOROUT9": {
"direction": "OUT"
},
"DMONITOROUT10": {
"direction": "OUT"
},
"DMONITOROUT11": {
"direction": "OUT"
},
"DMONITOROUT12": {
"direction": "OUT"
},
"DMONITOROUT13": {
"direction": "OUT"
},
"DMONITOROUT14": {
"direction": "OUT"
},
"DRPADDR0": {
"direction": "IN"
},
@ -96,24 +96,6 @@
"DRPDI1": {
"direction": "IN"
},
"DRPDI10": {
"direction": "IN"
},
"DRPDI11": {
"direction": "IN"
},
"DRPDI12": {
"direction": "IN"
},
"DRPDI13": {
"direction": "IN"
},
"DRPDI14": {
"direction": "IN"
},
"DRPDI15": {
"direction": "IN"
},
"DRPDI2": {
"direction": "IN"
},
@ -138,30 +120,30 @@
"DRPDI9": {
"direction": "IN"
},
"DRPDI10": {
"direction": "IN"
},
"DRPDI11": {
"direction": "IN"
},
"DRPDI12": {
"direction": "IN"
},
"DRPDI13": {
"direction": "IN"
},
"DRPDI14": {
"direction": "IN"
},
"DRPDI15": {
"direction": "IN"
},
"DRPDO0": {
"direction": "OUT"
},
"DRPDO1": {
"direction": "OUT"
},
"DRPDO10": {
"direction": "OUT"
},
"DRPDO11": {
"direction": "OUT"
},
"DRPDO12": {
"direction": "OUT"
},
"DRPDO13": {
"direction": "OUT"
},
"DRPDO14": {
"direction": "OUT"
},
"DRPDO15": {
"direction": "OUT"
},
"DRPDO2": {
"direction": "OUT"
},
@ -186,6 +168,24 @@
"DRPDO9": {
"direction": "OUT"
},
"DRPDO10": {
"direction": "OUT"
},
"DRPDO11": {
"direction": "OUT"
},
"DRPDO12": {
"direction": "OUT"
},
"DRPDO13": {
"direction": "OUT"
},
"DRPDO14": {
"direction": "OUT"
},
"DRPDO15": {
"direction": "OUT"
},
"DRPEN": {
"direction": "IN"
},
@ -228,24 +228,6 @@
"GTRSVD1": {
"direction": "IN"
},
"GTRSVD10": {
"direction": "IN"
},
"GTRSVD11": {
"direction": "IN"
},
"GTRSVD12": {
"direction": "IN"
},
"GTRSVD13": {
"direction": "IN"
},
"GTRSVD14": {
"direction": "IN"
},
"GTRSVD15": {
"direction": "IN"
},
"GTRSVD2": {
"direction": "IN"
},
@ -270,6 +252,24 @@
"GTRSVD9": {
"direction": "IN"
},
"GTRSVD10": {
"direction": "IN"
},
"GTRSVD11": {
"direction": "IN"
},
"GTRSVD12": {
"direction": "IN"
},
"GTRSVD13": {
"direction": "IN"
},
"GTRSVD14": {
"direction": "IN"
},
"GTRSVD15": {
"direction": "IN"
},
"GTRXRESET": {
"direction": "IN"
},
@ -291,24 +291,6 @@
"PCSRSVDIN1": {
"direction": "IN"
},
"PCSRSVDIN10": {
"direction": "IN"
},
"PCSRSVDIN11": {
"direction": "IN"
},
"PCSRSVDIN12": {
"direction": "IN"
},
"PCSRSVDIN13": {
"direction": "IN"
},
"PCSRSVDIN14": {
"direction": "IN"
},
"PCSRSVDIN15": {
"direction": "IN"
},
"PCSRSVDIN2": {
"direction": "IN"
},
@ -333,30 +315,30 @@
"PCSRSVDIN9": {
"direction": "IN"
},
"PCSRSVDIN10": {
"direction": "IN"
},
"PCSRSVDIN11": {
"direction": "IN"
},
"PCSRSVDIN12": {
"direction": "IN"
},
"PCSRSVDIN13": {
"direction": "IN"
},
"PCSRSVDIN14": {
"direction": "IN"
},
"PCSRSVDIN15": {
"direction": "IN"
},
"PCSRSVDOUT0": {
"direction": "OUT"
},
"PCSRSVDOUT1": {
"direction": "OUT"
},
"PCSRSVDOUT10": {
"direction": "OUT"
},
"PCSRSVDOUT11": {
"direction": "OUT"
},
"PCSRSVDOUT12": {
"direction": "OUT"
},
"PCSRSVDOUT13": {
"direction": "OUT"
},
"PCSRSVDOUT14": {
"direction": "OUT"
},
"PCSRSVDOUT15": {
"direction": "OUT"
},
"PCSRSVDOUT2": {
"direction": "OUT"
},
@ -381,6 +363,24 @@
"PCSRSVDOUT9": {
"direction": "OUT"
},
"PCSRSVDOUT10": {
"direction": "OUT"
},
"PCSRSVDOUT11": {
"direction": "OUT"
},
"PCSRSVDOUT12": {
"direction": "OUT"
},
"PCSRSVDOUT13": {
"direction": "OUT"
},
"PCSRSVDOUT14": {
"direction": "OUT"
},
"PCSRSVDOUT15": {
"direction": "OUT"
},
"PHYSTATUS": {
"direction": "OUT"
},
@ -492,18 +492,6 @@
"RXADAPTSELTEST1": {
"direction": "IN"
},
"RXADAPTSELTEST10": {
"direction": "IN"
},
"RXADAPTSELTEST11": {
"direction": "IN"
},
"RXADAPTSELTEST12": {
"direction": "IN"
},
"RXADAPTSELTEST13": {
"direction": "IN"
},
"RXADAPTSELTEST2": {
"direction": "IN"
},
@ -528,6 +516,18 @@
"RXADAPTSELTEST9": {
"direction": "IN"
},
"RXADAPTSELTEST10": {
"direction": "IN"
},
"RXADAPTSELTEST11": {
"direction": "IN"
},
"RXADAPTSELTEST12": {
"direction": "IN"
},
"RXADAPTSELTEST13": {
"direction": "IN"
},
"RXBUFRESET": {
"direction": "IN"
},
@ -666,6 +666,30 @@
"RXDATA1": {
"direction": "OUT"
},
"RXDATA2": {
"direction": "OUT"
},
"RXDATA3": {
"direction": "OUT"
},
"RXDATA4": {
"direction": "OUT"
},
"RXDATA5": {
"direction": "OUT"
},
"RXDATA6": {
"direction": "OUT"
},
"RXDATA7": {
"direction": "OUT"
},
"RXDATA8": {
"direction": "OUT"
},
"RXDATA9": {
"direction": "OUT"
},
"RXDATA10": {
"direction": "OUT"
},
@ -696,9 +720,6 @@
"RXDATA19": {
"direction": "OUT"
},
"RXDATA2": {
"direction": "OUT"
},
"RXDATA20": {
"direction": "OUT"
},
@ -729,33 +750,12 @@
"RXDATA29": {
"direction": "OUT"
},
"RXDATA3": {
"direction": "OUT"
},
"RXDATA30": {
"direction": "OUT"
},
"RXDATA31": {
"direction": "OUT"
},
"RXDATA4": {
"direction": "OUT"
},
"RXDATA5": {
"direction": "OUT"
},
"RXDATA6": {
"direction": "OUT"
},
"RXDATA7": {
"direction": "OUT"
},
"RXDATA8": {
"direction": "OUT"
},
"RXDATA9": {
"direction": "OUT"
},
"RXDATAVALID0": {
"direction": "OUT"
},
@ -1161,6 +1161,30 @@
"TSTIN1": {
"direction": "IN"
},
"TSTIN2": {
"direction": "IN"
},
"TSTIN3": {
"direction": "IN"
},
"TSTIN4": {
"direction": "IN"
},
"TSTIN5": {
"direction": "IN"
},
"TSTIN6": {
"direction": "IN"
},
"TSTIN7": {
"direction": "IN"
},
"TSTIN8": {
"direction": "IN"
},
"TSTIN9": {
"direction": "IN"
},
"TSTIN10": {
"direction": "IN"
},
@ -1191,30 +1215,6 @@
"TSTIN19": {
"direction": "IN"
},
"TSTIN2": {
"direction": "IN"
},
"TSTIN3": {
"direction": "IN"
},
"TSTIN4": {
"direction": "IN"
},
"TSTIN5": {
"direction": "IN"
},
"TSTIN6": {
"direction": "IN"
},
"TSTIN7": {
"direction": "IN"
},
"TSTIN8": {
"direction": "IN"
},
"TSTIN9": {
"direction": "IN"
},
"TSTPD0": {
"direction": "IN"
},
@ -1317,6 +1317,30 @@
"TXDATA1": {
"direction": "IN"
},
"TXDATA2": {
"direction": "IN"
},
"TXDATA3": {
"direction": "IN"
},
"TXDATA4": {
"direction": "IN"
},
"TXDATA5": {
"direction": "IN"
},
"TXDATA6": {
"direction": "IN"
},
"TXDATA7": {
"direction": "IN"
},
"TXDATA8": {
"direction": "IN"
},
"TXDATA9": {
"direction": "IN"
},
"TXDATA10": {
"direction": "IN"
},
@ -1347,9 +1371,6 @@
"TXDATA19": {
"direction": "IN"
},
"TXDATA2": {
"direction": "IN"
},
"TXDATA20": {
"direction": "IN"
},
@ -1380,33 +1401,12 @@
"TXDATA29": {
"direction": "IN"
},
"TXDATA3": {
"direction": "IN"
},
"TXDATA30": {
"direction": "IN"
},
"TXDATA31": {
"direction": "IN"
},
"TXDATA4": {
"direction": "IN"
},
"TXDATA5": {
"direction": "IN"
},
"TXDATA6": {
"direction": "IN"
},
"TXDATA7": {
"direction": "IN"
},
"TXDATA8": {
"direction": "IN"
},
"TXDATA9": {
"direction": "IN"
},
"TXDEEMPH": {
"direction": "IN"
},

144
artix7/site_type_GTPE2_COMMON.json
View File

@ -84,24 +84,6 @@
"DRPDI1": {
"direction": "IN"
},
"DRPDI10": {
"direction": "IN"
},
"DRPDI11": {
"direction": "IN"
},
"DRPDI12": {
"direction": "IN"
},
"DRPDI13": {
"direction": "IN"
},
"DRPDI14": {
"direction": "IN"
},
"DRPDI15": {
"direction": "IN"
},
"DRPDI2": {
"direction": "IN"
},
@ -126,30 +108,30 @@
"DRPDI9": {
"direction": "IN"
},
"DRPDI10": {
"direction": "IN"
},
"DRPDI11": {
"direction": "IN"
},
"DRPDI12": {
"direction": "IN"
},
"DRPDI13": {
"direction": "IN"
},
"DRPDI14": {
"direction": "IN"
},
"DRPDI15": {
"direction": "IN"
},
"DRPDO0": {
"direction": "OUT"
},
"DRPDO1": {
"direction": "OUT"
},
"DRPDO10": {
"direction": "OUT"
},
"DRPDO11": {
"direction": "OUT"
},
"DRPDO12": {
"direction": "OUT"
},
"DRPDO13": {
"direction": "OUT"
},
"DRPDO14": {
"direction": "OUT"
},
"DRPDO15": {
"direction": "OUT"
},
"DRPDO2": {
"direction": "OUT"
},
@ -174,6 +156,24 @@
"DRPDO9": {
"direction": "OUT"
},
"DRPDO10": {
"direction": "OUT"
},
"DRPDO11": {
"direction": "OUT"
},
"DRPDO12": {
"direction": "OUT"
},
"DRPDO13": {
"direction": "OUT"
},
"DRPDO14": {
"direction": "OUT"
},
"DRPDO15": {
"direction": "OUT"
},
"DRPEN": {
"direction": "IN"
},
@ -288,24 +288,6 @@
"PLLRSVD11": {
"direction": "IN"
},
"PLLRSVD110": {
"direction": "IN"
},
"PLLRSVD111": {
"direction": "IN"
},
"PLLRSVD112": {
"direction": "IN"
},
"PLLRSVD113": {
"direction": "IN"
},
"PLLRSVD114": {
"direction": "IN"
},
"PLLRSVD115": {
"direction": "IN"
},
"PLLRSVD12": {
"direction": "IN"
},
@ -345,6 +327,24 @@
"PLLRSVD24": {
"direction": "IN"
},
"PLLRSVD110": {
"direction": "IN"
},
"PLLRSVD111": {
"direction": "IN"
},
"PLLRSVD112": {
"direction": "IN"
},
"PLLRSVD113": {
"direction": "IN"
},
"PLLRSVD114": {
"direction": "IN"
},
"PLLRSVD115": {
"direction": "IN"
},
"PMARSVD0": {
"direction": "IN"
},
@ -375,24 +375,6 @@
"PMARSVDOUT1": {
"direction": "OUT"
},
"PMARSVDOUT10": {
"direction": "OUT"
},
"PMARSVDOUT11": {
"direction": "OUT"
},
"PMARSVDOUT12": {
"direction": "OUT"
},
"PMARSVDOUT13": {
"direction": "OUT"
},
"PMARSVDOUT14": {
"direction": "OUT"
},
"PMARSVDOUT15": {
"direction": "OUT"
},
"PMARSVDOUT2": {
"direction": "OUT"
},
@ -417,6 +399,24 @@
"PMARSVDOUT9": {
"direction": "OUT"
},
"PMARSVDOUT10": {
"direction": "OUT"
},
"PMARSVDOUT11": {
"direction": "OUT"
},
"PMARSVDOUT12": {
"direction": "OUT"
},
"PMARSVDOUT13": {
"direction": "OUT"
},
"PMARSVDOUT14": {
"direction": "OUT"
},
"PMARSVDOUT15": {
"direction": "OUT"
},
"PMASCANCLK0": {
"direction": "IN"
},

96
artix7/site_type_ICAP.json
View File

@ -12,6 +12,30 @@
"I1": {
"direction": "IN"
},
"I2": {
"direction": "IN"
},
"I3": {
"direction": "IN"
},
"I4": {
"direction": "IN"
},
"I5": {
"direction": "IN"
},
"I6": {
"direction": "IN"
},
"I7": {
"direction": "IN"
},
"I8": {
"direction": "IN"
},
"I9": {
"direction": "IN"
},
"I10": {
"direction": "IN"
},
@ -42,9 +66,6 @@
"I19": {
"direction": "IN"
},
"I2": {
"direction": "IN"
},
"I20": {
"direction": "IN"
},
@ -75,39 +96,42 @@
"I29": {
"direction": "IN"
},
"I3": {
"direction": "IN"
},
"I30": {
"direction": "IN"
},
"I31": {
"direction": "IN"
},
"I4": {
"direction": "IN"
},
"I5": {
"direction": "IN"
},
"I6": {
"direction": "IN"
},
"I7": {
"direction": "IN"
},
"I8": {
"direction": "IN"
},
"I9": {
"direction": "IN"
},
"O0": {
"direction": "OUT"
},
"O1": {
"direction": "OUT"
},
"O2": {
"direction": "OUT"
},
"O3": {
"direction": "OUT"
},
"O4": {
"direction": "OUT"
},
"O5": {
"direction": "OUT"
},
"O6": {
"direction": "OUT"
},
"O7": {
"direction": "OUT"
},
"O8": {
"direction": "OUT"
},
"O9": {
"direction": "OUT"
},
"O10": {
"direction": "OUT"
},
@ -138,9 +162,6 @@
"O19": {
"direction": "OUT"
},
"O2": {
"direction": "OUT"
},
"O20": {
"direction": "OUT"
},
@ -171,33 +192,12 @@
"O29": {
"direction": "OUT"
},
"O3": {
"direction": "OUT"
},
"O30": {
"direction": "OUT"
},
"O31": {
"direction": "OUT"
},
"O4": {
"direction": "OUT"
},
"O5": {
"direction": "OUT"
},
"O6": {
"direction": "OUT"
},
"O7": {
"direction": "OUT"
},
"O8": {
"direction": "OUT"
},
"O9": {
"direction": "OUT"
},
"RDWRB": {
"direction": "IN"
}

168
artix7/site_type_MMCME2_ADV.json
View File

@ -90,24 +90,6 @@
"DI1": {
"direction": "IN"
},
"DI10": {
"direction": "IN"
},
"DI11": {
"direction": "IN"
},
"DI12": {
"direction": "IN"
},
"DI13": {
"direction": "IN"
},
"DI14": {
"direction": "IN"
},
"DI15": {
"direction": "IN"
},
"DI2": {
"direction": "IN"
},
@ -132,30 +114,30 @@
"DI9": {
"direction": "IN"
},
"DI10": {
"direction": "IN"
},
"DI11": {
"direction": "IN"
},
"DI12": {
"direction": "IN"
},
"DI13": {
"direction": "IN"
},
"DI14": {
"direction": "IN"
},
"DI15": {
"direction": "IN"
},
"DO0": {
"direction": "OUT"
},
"DO1": {
"direction": "OUT"
},
"DO10": {
"direction": "OUT"
},
"DO11": {
"direction": "OUT"
},
"DO12": {
"direction": "OUT"
},
"DO13": {
"direction": "OUT"
},
"DO14": {
"direction": "OUT"
},
"DO15": {
"direction": "OUT"
},
"DO2": {
"direction": "OUT"
},
@ -180,6 +162,24 @@
"DO9": {
"direction": "OUT"
},
"DO10": {
"direction": "OUT"
},
"DO11": {
"direction": "OUT"
},
"DO12": {
"direction": "OUT"
},
"DO13": {
"direction": "OUT"
},
"DO14": {
"direction": "OUT"
},
"DO15": {
"direction": "OUT"
},
"DRDY": {
"direction": "OUT"
},
@ -213,6 +213,30 @@
"TESTIN1": {
"direction": "IN"
},
"TESTIN2": {
"direction": "IN"
},
"TESTIN3": {
"direction": "IN"
},
"TESTIN4": {
"direction": "IN"
},
"TESTIN5": {
"direction": "IN"
},
"TESTIN6": {
"direction": "IN"
},
"TESTIN7": {
"direction": "IN"
},
"TESTIN8": {
"direction": "IN"
},
"TESTIN9": {
"direction": "IN"
},
"TESTIN10": {
"direction": "IN"
},
@ -243,9 +267,6 @@
"TESTIN19": {
"direction": "IN"
},
"TESTIN2": {
"direction": "IN"
},
"TESTIN20": {
"direction": "IN"
},
@ -276,39 +297,42 @@
"TESTIN29": {
"direction": "IN"
},
"TESTIN3": {
"direction": "IN"
},
"TESTIN30": {
"direction": "IN"
},
"TESTIN31": {
"direction": "IN"
},
"TESTIN4": {
"direction": "IN"
},
"TESTIN5": {
"direction": "IN"
},
"TESTIN6": {
"direction": "IN"
},
"TESTIN7": {
"direction": "IN"
},
"TESTIN8": {
"direction": "IN"
},
"TESTIN9": {
"direction": "IN"
},
"TESTOUT0": {
"direction": "OUT"
},
"TESTOUT1": {
"direction": "OUT"
},
"TESTOUT2": {
"direction": "OUT"
},
"TESTOUT3": {
"direction": "OUT"
},
"TESTOUT4": {
"direction": "OUT"
},
"TESTOUT5": {
"direction": "OUT"
},
"TESTOUT6": {
"direction": "OUT"
},
"TESTOUT7": {
"direction": "OUT"
},
"TESTOUT8": {
"direction": "OUT"
},
"TESTOUT9": {
"direction": "OUT"
},
"TESTOUT10": {
"direction": "OUT"
},
@ -339,9 +363,6 @@
"TESTOUT19": {
"direction": "OUT"
},
"TESTOUT2": {
"direction": "OUT"
},
"TESTOUT20": {
"direction": "OUT"
},
@ -372,9 +393,6 @@
"TESTOUT29": {
"direction": "OUT"
},
"TESTOUT3": {
"direction": "OUT"
},
"TESTOUT30": {
"direction": "OUT"
},
@ -405,9 +423,6 @@
"TESTOUT39": {
"direction": "OUT"
},
"TESTOUT4": {
"direction": "OUT"
},
"TESTOUT40": {
"direction": "OUT"
},
@ -438,9 +453,6 @@
"TESTOUT49": {
"direction": "OUT"
},
"TESTOUT5": {
"direction": "OUT"
},
"TESTOUT50": {
"direction": "OUT"
},
@ -471,9 +483,6 @@
"TESTOUT59": {
"direction": "OUT"
},
"TESTOUT6": {
"direction": "OUT"
},
"TESTOUT60": {
"direction": "OUT"
},
@ -486,15 +495,6 @@
"TESTOUT63": {
"direction": "OUT"
},
"TESTOUT7": {
"direction": "OUT"
},
"TESTOUT8": {
"direction": "OUT"
},
"TESTOUT9": {
"direction": "OUT"
},
"TMUXOUT": {
"direction": "OUT"
}

2280
artix7/site_type_PCIE_2_1.json
View File

File diff suppressed because it is too large Load Diff

24
artix7/site_type_PHASER_IN_PHY.json
View File

@ -225,18 +225,6 @@
"TESTIN1": {
"direction": "IN"
},
"TESTIN10": {
"direction": "IN"
},
"TESTIN11": {
"direction": "IN"
},
"TESTIN12": {
"direction": "IN"
},
"TESTIN13": {
"direction": "IN"
},
"TESTIN2": {
"direction": "IN"
},
@ -261,6 +249,18 @@
"TESTIN9": {
"direction": "IN"
},
"TESTIN10": {
"direction": "IN"
},
"TESTIN11": {
"direction": "IN"
},
"TESTIN12": {
"direction": "IN"
},
"TESTIN13": {
"direction": "IN"
},
"TESTOUT0": {
"direction": "OUT"
},

36
artix7/site_type_PHASER_OUT_PHY.json
View File

@ -177,24 +177,6 @@
"TESTIN1": {
"direction": "IN"
},
"TESTIN10": {
"direction": "IN"
},
"TESTIN11": {
"direction": "IN"
},
"TESTIN12": {
"direction": "IN"
},
"TESTIN13": {
"direction": "IN"
},
"TESTIN14": {
"direction": "IN"
},
"TESTIN15": {
"direction": "IN"
},
"TESTIN2": {
"direction": "IN"
},
@ -219,6 +201,24 @@
"TESTIN9": {
"direction": "IN"
},
"TESTIN10": {
"direction": "IN"
},
"TESTIN11": {
"direction": "IN"
},
"TESTIN12": {
"direction": "IN"
},
"TESTIN13": {
"direction": "IN"
},
"TESTIN14": {
"direction": "IN"
},
"TESTIN15": {
"direction": "IN"
},
"TESTOUT0": {
"direction": "OUT"
},

120
artix7/site_type_PHY_CONTROL.json
View File

@ -93,6 +93,30 @@
"PHYCTLWD1": {
"direction": "IN"
},
"PHYCTLWD2": {
"direction": "IN"
},
"PHYCTLWD3": {
"direction": "IN"
},
"PHYCTLWD4": {
"direction": "IN"
},
"PHYCTLWD5": {
"direction": "IN"
},
"PHYCTLWD6": {
"direction": "IN"
},
"PHYCTLWD7": {
"direction": "IN"
},
"PHYCTLWD8": {
"direction": "IN"
},
"PHYCTLWD9": {
"direction": "IN"
},
"PHYCTLWD10": {
"direction": "IN"
},
@ -123,9 +147,6 @@
"PHYCTLWD19": {
"direction": "IN"
},
"PHYCTLWD2": {
"direction": "IN"
},
"PHYCTLWD20": {
"direction": "IN"
},
@ -156,33 +177,12 @@
"PHYCTLWD29": {
"direction": "IN"
},
"PHYCTLWD3": {
"direction": "IN"
},
"PHYCTLWD30": {
"direction": "IN"
},
"PHYCTLWD31": {
"direction": "IN"
},
"PHYCTLWD4": {
"direction": "IN"
},
"PHYCTLWD5": {
"direction": "IN"
},
"PHYCTLWD6": {
"direction": "IN"
},
"PHYCTLWD7": {
"direction": "IN"
},
"PHYCTLWD8": {
"direction": "IN"
},
"PHYCTLWD9": {
"direction": "IN"
},
"PHYCTLWRENABLE": {
"direction": "IN"
},
@ -210,24 +210,6 @@
"TESTINPUT1": {
"direction": "IN"
},
"TESTINPUT10": {
"direction": "IN"
},
"TESTINPUT11": {
"direction": "IN"
},
"TESTINPUT12": {
"direction": "IN"
},
"TESTINPUT13": {
"direction": "IN"
},
"TESTINPUT14": {
"direction": "IN"
},
"TESTINPUT15": {
"direction": "IN"
},
"TESTINPUT2": {
"direction": "IN"
},
@ -252,30 +234,30 @@
"TESTINPUT9": {
"direction": "IN"
},
"TESTINPUT10": {
"direction": "IN"
},
"TESTINPUT11": {
"direction": "IN"
},
"TESTINPUT12": {
"direction": "IN"
},
"TESTINPUT13": {
"direction": "IN"
},
"TESTINPUT14": {
"direction": "IN"
},
"TESTINPUT15": {
"direction": "IN"
},
"TESTOUTPUT0": {
"direction": "OUT"
},
"TESTOUTPUT1": {
"direction": "OUT"
},
"TESTOUTPUT10": {
"direction": "OUT"
},
"TESTOUTPUT11": {
"direction": "OUT"
},
"TESTOUTPUT12": {
"direction": "OUT"
},
"TESTOUTPUT13": {
"direction": "OUT"
},
"TESTOUTPUT14": {
"direction": "OUT"
},
"TESTOUTPUT15": {
"direction": "OUT"
},
"TESTOUTPUT2": {
"direction": "OUT"
},
@ -300,6 +282,24 @@
"TESTOUTPUT9": {
"direction": "OUT"
},
"TESTOUTPUT10": {
"direction": "OUT"
},
"TESTOUTPUT11": {
"direction": "OUT"
},
"TESTOUTPUT12": {
"direction": "OUT"
},
"TESTOUTPUT13": {
"direction": "OUT"
},
"TESTOUTPUT14": {
"direction": "OUT"
},
"TESTOUTPUT15": {
"direction": "OUT"
},
"TESTSELECT0": {
"direction": "IN"
},

168
artix7/site_type_PLLE2_ADV.json
View File

@ -66,24 +66,6 @@
"DI1": {
"direction": "IN"
},
"DI10": {
"direction": "IN"
},
"DI11": {
"direction": "IN"
},
"DI12": {
"direction": "IN"
},
"DI13": {
"direction": "IN"
},
"DI14": {
"direction": "IN"
},
"DI15": {
"direction": "IN"
},
"DI2": {
"direction": "IN"
},
@ -108,30 +90,30 @@
"DI9": {
"direction": "IN"
},
"DI10": {
"direction": "IN"
},
"DI11": {
"direction": "IN"
},
"DI12": {
"direction": "IN"
},
"DI13": {
"direction": "IN"
},
"DI14": {
"direction": "IN"
},
"DI15": {
"direction": "IN"
},
"DO0": {
"direction": "OUT"
},
"DO1": {
"direction": "OUT"
},
"DO10": {
"direction": "OUT"
},
"DO11": {
"direction": "OUT"
},
"DO12": {
"direction": "OUT"
},
"DO13": {
"direction": "OUT"
},
"DO14": {
"direction": "OUT"
},
"DO15": {
"direction": "OUT"
},
"DO2": {
"direction": "OUT"
},
@ -156,6 +138,24 @@
"DO9": {
"direction": "OUT"
},
"DO10": {
"direction": "OUT"
},
"DO11": {
"direction": "OUT"
},
"DO12": {
"direction": "OUT"
},
"DO13": {
"direction": "OUT"
},
"DO14": {
"direction": "OUT"
},
"DO15": {
"direction": "OUT"
},
"DRDY": {
"direction": "OUT"
},
@ -177,6 +177,30 @@
"TESTIN1": {
"direction": "IN"
},
"TESTIN2": {
"direction": "IN"
},
"TESTIN3": {
"direction": "IN"
},
"TESTIN4": {
"direction": "IN"
},
"TESTIN5": {
"direction": "IN"
},
"TESTIN6": {
"direction": "IN"
},
"TESTIN7": {
"direction": "IN"
},
"TESTIN8": {
"direction": "IN"
},
"TESTIN9": {
"direction": "IN"
},
"TESTIN10": {
"direction": "IN"
},
@ -207,9 +231,6 @@
"TESTIN19": {
"direction": "IN"
},
"TESTIN2": {
"direction": "IN"
},
"TESTIN20": {
"direction": "IN"
},
@ -240,39 +261,42 @@
"TESTIN29": {
"direction": "IN"
},
"TESTIN3": {
"direction": "IN"
},
"TESTIN30": {
"direction": "IN"
},
"TESTIN31": {
"direction": "IN"
},
"TESTIN4": {
"direction": "IN"
},
"TESTIN5": {
"direction": "IN"
},
"TESTIN6": {
"direction": "IN"
},
"TESTIN7": {
"direction": "IN"
},
"TESTIN8": {
"direction": "IN"
},
"TESTIN9": {
"direction": "IN"
},
"TESTOUT0": {
"direction": "OUT"
},
"TESTOUT1": {
"direction": "OUT"
},
"TESTOUT2": {
"direction": "OUT"
},
"TESTOUT3": {
"direction": "OUT"
},
"TESTOUT4": {
"direction": "OUT"
},
"TESTOUT5": {
"direction": "OUT"
},
"TESTOUT6": {
"direction": "OUT"
},
"TESTOUT7": {
"direction": "OUT"
},
"TESTOUT8": {
"direction": "OUT"
},
"TESTOUT9": {
"direction": "OUT"
},
"TESTOUT10": {
"direction": "OUT"
},
@ -303,9 +327,6 @@
"TESTOUT19": {
"direction": "OUT"
},
"TESTOUT2": {
"direction": "OUT"
},
"TESTOUT20": {
"direction": "OUT"
},
@ -336,9 +357,6 @@
"TESTOUT29": {
"direction": "OUT"
},
"TESTOUT3": {
"direction": "OUT"
},
"TESTOUT30": {
"direction": "OUT"
},
@ -369,9 +387,6 @@
"TESTOUT39": {
"direction": "OUT"
},
"TESTOUT4": {
"direction": "OUT"
},
"TESTOUT40": {
"direction": "OUT"
},
@ -402,9 +417,6 @@
"TESTOUT49": {
"direction": "OUT"
},
"TESTOUT5": {
"direction": "OUT"
},
"TESTOUT50": {
"direction": "OUT"
},
@ -435,9 +447,6 @@
"TESTOUT59": {
"direction": "OUT"
},
"TESTOUT6": {
"direction": "OUT"
},
"TESTOUT60": {
"direction": "OUT"
},
@ -450,15 +459,6 @@
"TESTOUT63": {
"direction": "OUT"
},
"TESTOUT7": {
"direction": "OUT"
},
"TESTOUT8": {
"direction": "OUT"
},
"TESTOUT9": {
"direction": "OUT"
},
"TMUXOUT": {
"direction": "OUT"
}

216
artix7/site_type_RAMB18E1.json
View File

@ -6,18 +6,6 @@
"ADDRARDADDR1": {
"direction": "IN"
},
"ADDRARDADDR10": {
"direction": "IN"
},
"ADDRARDADDR11": {
"direction": "IN"
},
"ADDRARDADDR12": {
"direction": "IN"
},
"ADDRARDADDR13": {
"direction": "IN"
},
"ADDRARDADDR2": {
"direction": "IN"
},
@ -42,6 +30,18 @@
"ADDRARDADDR9": {
"direction": "IN"
},
"ADDRARDADDR10": {
"direction": "IN"
},
"ADDRARDADDR11": {
"direction": "IN"
},
"ADDRARDADDR12": {
"direction": "IN"
},
"ADDRARDADDR13": {
"direction": "IN"
},
"ADDRATIEHIGH0": {
"direction": "IN"
},
@ -60,18 +60,6 @@
"ADDRBWRADDR1": {
"direction": "IN"
},
"ADDRBWRADDR10": {
"direction": "IN"
},
"ADDRBWRADDR11": {
"direction": "IN"
},
"ADDRBWRADDR12": {
"direction": "IN"
},
"ADDRBWRADDR13": {
"direction": "IN"
},
"ADDRBWRADDR2": {
"direction": "IN"
},
@ -96,6 +84,18 @@
"ADDRBWRADDR9": {
"direction": "IN"
},
"ADDRBWRADDR10": {
"direction": "IN"
},
"ADDRBWRADDR11": {
"direction": "IN"
},
"ADDRBWRADDR12": {
"direction": "IN"
},
"ADDRBWRADDR13": {
"direction": "IN"
},
"ALMOSTEMPTY": {
"direction": "OUT"
},
@ -114,24 +114,6 @@
"DIADI1": {
"direction": "IN"
},
"DIADI10": {
"direction": "IN"
},
"DIADI11": {
"direction": "IN"
},
"DIADI12": {
"direction": "IN"
},
"DIADI13": {
"direction": "IN"
},
"DIADI14": {
"direction": "IN"
},
"DIADI15": {
"direction": "IN"
},
"DIADI2": {
"direction": "IN"
},
@ -156,30 +138,30 @@
"DIADI9": {
"direction": "IN"
},
"DIADI10": {
"direction": "IN"
},
"DIADI11": {
"direction": "IN"
},
"DIADI12": {
"direction": "IN"
},
"DIADI13": {
"direction": "IN"
},
"DIADI14": {
"direction": "IN"
},
"DIADI15": {
"direction": "IN"
},
"DIBDI0": {
"direction": "IN"
},
"DIBDI1": {
"direction": "IN"
},
"DIBDI10": {
"direction": "IN"
},
"DIBDI11": {
"direction": "IN"
},
"DIBDI12": {
"direction": "IN"
},
"DIBDI13": {
"direction": "IN"
},
"DIBDI14": {
"direction": "IN"
},
"DIBDI15": {
"direction": "IN"
},
"DIBDI2": {
"direction": "IN"
},
@ -204,6 +186,24 @@
"DIBDI9": {
"direction": "IN"
},
"DIBDI10": {
"direction": "IN"
},
"DIBDI11": {
"direction": "IN"
},
"DIBDI12": {
"direction": "IN"
},
"DIBDI13": {
"direction": "IN"
},
"DIBDI14": {
"direction": "IN"
},
"DIBDI15": {
"direction": "IN"
},
"DIPADIP0": {
"direction": "IN"
},
@ -222,24 +222,6 @@
"DOADO1": {
"direction": "OUT"
},
"DOADO10": {
"direction": "OUT"
},
"DOADO11": {
"direction": "OUT"
},
"DOADO12": {
"direction": "OUT"
},
"DOADO13": {
"direction": "OUT"
},
"DOADO14": {
"direction": "OUT"
},
"DOADO15": {
"direction": "OUT"
},
"DOADO2": {
"direction": "OUT"
},
@ -264,30 +246,30 @@
"DOADO9": {
"direction": "OUT"
},
"DOADO10": {
"direction": "OUT"
},
"DOADO11": {
"direction": "OUT"
},
"DOADO12": {
"direction": "OUT"
},
"DOADO13": {
"direction": "OUT"
},
"DOADO14": {
"direction": "OUT"
},
"DOADO15": {
"direction": "OUT"
},
"DOBDO0": {
"direction": "OUT"
},
"DOBDO1": {
"direction": "OUT"
},
"DOBDO10": {
"direction": "OUT"
},
"DOBDO11": {
"direction": "OUT"
},
"DOBDO12": {
"direction": "OUT"
},
"DOBDO13": {
"direction": "OUT"
},
"DOBDO14": {
"direction": "OUT"
},
"DOBDO15": {
"direction": "OUT"
},
"DOBDO2": {
"direction": "OUT"
},
@ -312,6 +294,24 @@
"DOBDO9": {
"direction": "OUT"
},
"DOBDO10": {
"direction": "OUT"
},
"DOBDO11": {
"direction": "OUT"
},
"DOBDO12": {
"direction": "OUT"
},
"DOBDO13": {
"direction": "OUT"
},
"DOBDO14": {
"direction": "OUT"
},
"DOBDO15": {
"direction": "OUT"
},
"DOPADOP0": {
"direction": "OUT"
},
@ -342,12 +342,6 @@
"RDCOUNT1": {
"direction": "OUT"
},
"RDCOUNT10": {
"direction": "OUT"
},
"RDCOUNT11": {
"direction": "OUT"
},
"RDCOUNT2": {
"direction": "OUT"
},
@ -372,6 +366,12 @@
"RDCOUNT9": {
"direction": "OUT"
},
"RDCOUNT10": {
"direction": "OUT"
},
"RDCOUNT11": {
"direction": "OUT"
},
"RDERR": {
"direction": "OUT"
},
@ -441,12 +441,6 @@
"WRCOUNT1": {
"direction": "OUT"
},
"WRCOUNT10": {
"direction": "OUT"
},
"WRCOUNT11": {
"direction": "OUT"
},
"WRCOUNT2": {
"direction": "OUT"
},
@ -471,6 +465,12 @@
"WRCOUNT9": {
"direction": "OUT"
},
"WRCOUNT10": {
"direction": "OUT"
},
"WRCOUNT11": {
"direction": "OUT"
},
"WRERR": {
"direction": "OUT"
}

414
artix7/site_type_RAMBFIFO36E1.json
View File

@ -6,24 +6,6 @@
"ADDRARDADDRL1": {
"direction": "IN"
},
"ADDRARDADDRL10": {
"direction": "IN"
},
"ADDRARDADDRL11": {
"direction": "IN"
},
"ADDRARDADDRL12": {
"direction": "IN"
},
"ADDRARDADDRL13": {
"direction": "IN"
},
"ADDRARDADDRL14": {
"direction": "IN"
},
"ADDRARDADDRL15": {
"direction": "IN"
},
"ADDRARDADDRL2": {
"direction": "IN"
},
@ -48,27 +30,30 @@
"ADDRARDADDRL9": {
"direction": "IN"
},
"ADDRARDADDRL10": {
"direction": "IN"
},
"ADDRARDADDRL11": {
"direction": "IN"
},
"ADDRARDADDRL12": {
"direction": "IN"
},
"ADDRARDADDRL13": {
"direction": "IN"
},
"ADDRARDADDRL14": {
"direction": "IN"
},
"ADDRARDADDRL15": {
"direction": "IN"
},
"ADDRARDADDRU0": {
"direction": "IN"
},
"ADDRARDADDRU1": {
"direction": "IN"
},
"ADDRARDADDRU10": {
"direction": "IN"
},
"ADDRARDADDRU11": {
"direction": "IN"
},
"ADDRARDADDRU12": {
"direction": "IN"
},
"ADDRARDADDRU13": {
"direction": "IN"
},
"ADDRARDADDRU14": {
"direction": "IN"
},
"ADDRARDADDRU2": {
"direction": "IN"
},
@ -93,30 +78,27 @@
"ADDRARDADDRU9": {
"direction": "IN"
},
"ADDRARDADDRU10": {
"direction": "IN"
},
"ADDRARDADDRU11": {
"direction": "IN"
},
"ADDRARDADDRU12": {
"direction": "IN"
},
"ADDRARDADDRU13": {
"direction": "IN"
},
"ADDRARDADDRU14": {
"direction": "IN"
},
"ADDRBWRADDRL0": {
"direction": "IN"
},
"ADDRBWRADDRL1": {
"direction": "IN"
},
"ADDRBWRADDRL10": {
"direction": "IN"
},
"ADDRBWRADDRL11": {
"direction": "IN"
},
"ADDRBWRADDRL12": {
"direction": "IN"
},
"ADDRBWRADDRL13": {
"direction": "IN"
},
"ADDRBWRADDRL14": {
"direction": "IN"
},
"ADDRBWRADDRL15": {
"direction": "IN"
},
"ADDRBWRADDRL2": {
"direction": "IN"
},
@ -141,27 +123,30 @@
"ADDRBWRADDRL9": {
"direction": "IN"
},
"ADDRBWRADDRL10": {
"direction": "IN"
},
"ADDRBWRADDRL11": {
"direction": "IN"
},
"ADDRBWRADDRL12": {
"direction": "IN"
},
"ADDRBWRADDRL13": {
"direction": "IN"
},
"ADDRBWRADDRL14": {
"direction": "IN"
},
"ADDRBWRADDRL15": {
"direction": "IN"
},
"ADDRBWRADDRU0": {
"direction": "IN"
},
"ADDRBWRADDRU1": {
"direction": "IN"
},
"ADDRBWRADDRU10": {
"direction": "IN"
},
"ADDRBWRADDRU11": {
"direction": "IN"
},
"ADDRBWRADDRU12": {
"direction": "IN"
},
"ADDRBWRADDRU13": {
"direction": "IN"
},
"ADDRBWRADDRU14": {
"direction": "IN"
},
"ADDRBWRADDRU2": {
"direction": "IN"
},
@ -186,6 +171,21 @@
"ADDRBWRADDRU9": {
"direction": "IN"
},
"ADDRBWRADDRU10": {
"direction": "IN"
},
"ADDRBWRADDRU11": {
"direction": "IN"
},
"ADDRBWRADDRU12": {
"direction": "IN"
},
"ADDRBWRADDRU13": {
"direction": "IN"
},
"ADDRBWRADDRU14": {
"direction": "IN"
},
"ALMOSTEMPTY": {
"direction": "OUT"
},
@ -225,6 +225,30 @@
"DIADI1": {
"direction": "IN"
},
"DIADI2": {
"direction": "IN"
},
"DIADI3": {
"direction": "IN"
},
"DIADI4": {
"direction": "IN"
},
"DIADI5": {
"direction": "IN"
},
"DIADI6": {
"direction": "IN"
},
"DIADI7": {
"direction": "IN"
},
"DIADI8": {
"direction": "IN"
},
"DIADI9": {
"direction": "IN"
},
"DIADI10": {
"direction": "IN"
},
@ -255,9 +279,6 @@
"DIADI19": {
"direction": "IN"
},
"DIADI2": {
"direction": "IN"
},
"DIADI20": {
"direction": "IN"
},
@ -288,39 +309,42 @@
"DIADI29": {
"direction": "IN"
},
"DIADI3": {
"direction": "IN"
},
"DIADI30": {
"direction": "IN"
},
"DIADI31": {
"direction": "IN"
},
"DIADI4": {
"direction": "IN"
},
"DIADI5": {
"direction": "IN"
},
"DIADI6": {
"direction": "IN"
},
"DIADI7": {
"direction": "IN"
},
"DIADI8": {
"direction": "IN"
},
"DIADI9": {
"direction": "IN"
},
"DIBDI0": {
"direction": "IN"
},
"DIBDI1": {
"direction": "IN"
},
"DIBDI2": {
"direction": "IN"
},
"DIBDI3": {
"direction": "IN"
},
"DIBDI4": {
"direction": "IN"
},
"DIBDI5": {
"direction": "IN"
},
"DIBDI6": {
"direction": "IN"
},
"DIBDI7": {
"direction": "IN"
},
"DIBDI8": {
"direction": "IN"
},
"DIBDI9": {
"direction": "IN"
},
"DIBDI10": {
"direction": "IN"
},
@ -351,9 +375,6 @@
"DIBDI19": {
"direction": "IN"
},
"DIBDI2": {
"direction": "IN"
},
"DIBDI20": {
"direction": "IN"
},
@ -384,33 +405,12 @@
"DIBDI29": {
"direction": "IN"
},
"DIBDI3": {
"direction": "IN"
},
"DIBDI30": {
"direction": "IN"
},
"DIBDI31": {
"direction": "IN"
},
"DIBDI4": {
"direction": "IN"
},
"DIBDI5": {
"direction": "IN"
},
"DIBDI6": {
"direction": "IN"
},
"DIBDI7": {
"direction": "IN"
},
"DIBDI8": {
"direction": "IN"
},
"DIBDI9": {
"direction": "IN"
},
"DIPADIP0": {
"direction": "IN"
},
@ -441,6 +441,30 @@
"DOADO1": {
"direction": "OUT"
},
"DOADO2": {
"direction": "OUT"
},
"DOADO3": {
"direction": "OUT"
},
"DOADO4": {
"direction": "OUT"
},
"DOADO5": {
"direction": "OUT"
},
"DOADO6": {
"direction": "OUT"
},
"DOADO7": {
"direction": "OUT"
},
"DOADO8": {
"direction": "OUT"
},
"DOADO9": {
"direction": "OUT"
},
"DOADO10": {
"direction": "OUT"
},
@ -471,9 +495,6 @@
"DOADO19": {
"direction": "OUT"
},
"DOADO2": {
"direction": "OUT"
},
"DOADO20": {
"direction": "OUT"
},
@ -504,39 +525,42 @@
"DOADO29": {
"direction": "OUT"
},
"DOADO3": {
"direction": "OUT"
},
"DOADO30": {
"direction": "OUT"
},
"DOADO31": {
"direction": "OUT"
},
"DOADO4": {
"direction": "OUT"
},
"DOADO5": {
"direction": "OUT"
},
"DOADO6": {
"direction": "OUT"
},
"DOADO7": {
"direction": "OUT"
},
"DOADO8": {
"direction": "OUT"
},
"DOADO9": {
"direction": "OUT"
},
"DOBDO0": {
"direction": "OUT"
},
"DOBDO1": {
"direction": "OUT"
},
"DOBDO2": {
"direction": "OUT"
},
"DOBDO3": {
"direction": "OUT"
},
"DOBDO4": {
"direction": "OUT"
},
"DOBDO5": {
"direction": "OUT"
},
"DOBDO6": {
"direction": "OUT"
},
"DOBDO7": {
"direction": "OUT"
},
"DOBDO8": {
"direction": "OUT"
},
"DOBDO9": {
"direction": "OUT"
},
"DOBDO10": {
"direction": "OUT"
},
@ -567,9 +591,6 @@
"DOBDO19": {
"direction": "OUT"
},
"DOBDO2": {
"direction": "OUT"
},
"DOBDO20": {
"direction": "OUT"
},
@ -600,33 +621,12 @@
"DOBDO29": {
"direction": "OUT"
},
"DOBDO3": {
"direction": "OUT"
},
"DOBDO30": {
"direction": "OUT"
},
"DOBDO31": {
"direction": "OUT"
},
"DOBDO4": {
"direction": "OUT"
},
"DOBDO5": {
"direction": "OUT"
},
"DOBDO6": {
"direction": "OUT"
},
"DOBDO7": {
"direction": "OUT"
},
"DOBDO8": {
"direction": "OUT"
},
"DOBDO9": {
"direction": "OUT"
},
"DOPADOP0": {
"direction": "OUT"
},
@ -705,15 +705,6 @@
"RDCOUNT1": {
"direction": "OUT"
},
"RDCOUNT10": {
"direction": "OUT"
},
"RDCOUNT11": {
"direction": "OUT"
},
"RDCOUNT12": {
"direction": "OUT"
},
"RDCOUNT2": {
"direction": "OUT"
},
@ -738,6 +729,15 @@
"RDCOUNT9": {
"direction": "OUT"
},
"RDCOUNT10": {
"direction": "OUT"
},
"RDCOUNT11": {
"direction": "OUT"
},
"RDCOUNT12": {
"direction": "OUT"
},
"RDERR": {
"direction": "OUT"
},
@ -801,15 +801,6 @@
"TSTCNT1": {
"direction": "IN"
},
"TSTCNT10": {
"direction": "IN"
},
"TSTCNT11": {
"direction": "IN"
},
"TSTCNT12": {
"direction": "IN"
},
"TSTCNT2": {
"direction": "IN"
},
@ -834,6 +825,15 @@
"TSTCNT9": {
"direction": "IN"
},
"TSTCNT10": {
"direction": "IN"
},
"TSTCNT11": {
"direction": "IN"
},
"TSTCNT12": {
"direction": "IN"
},
"TSTFLAGIN": {
"direction": "IN"
},
@ -879,15 +879,6 @@
"TSTRDOS1": {
"direction": "IN"
},
"TSTRDOS10": {
"direction": "IN"
},
"TSTRDOS11": {
"direction": "IN"
},
"TSTRDOS12": {
"direction": "IN"
},
"TSTRDOS2": {
"direction": "IN"
},
@ -912,6 +903,15 @@
"TSTRDOS9": {
"direction": "IN"
},
"TSTRDOS10": {
"direction": "IN"
},
"TSTRDOS11": {
"direction": "IN"
},
"TSTRDOS12": {
"direction": "IN"
},
"TSTWRCNTOFF": {
"direction": "IN"
},
@ -921,15 +921,6 @@
"TSTWROS1": {
"direction": "IN"
},
"TSTWROS10": {
"direction": "IN"
},
"TSTWROS11": {
"direction": "IN"
},
"TSTWROS12": {
"direction": "IN"
},
"TSTWROS2": {
"direction": "IN"
},
@ -954,6 +945,15 @@
"TSTWROS9": {
"direction": "IN"
},
"TSTWROS10": {
"direction": "IN"
},
"TSTWROS11": {
"direction": "IN"
},
"TSTWROS12": {
"direction": "IN"
},
"WEAL0": {
"direction": "IN"
},
@ -1032,15 +1032,6 @@
"WRCOUNT1": {
"direction": "OUT"
},
"WRCOUNT10": {
"direction": "OUT"
},
"WRCOUNT11": {
"direction": "OUT"
},
"WRCOUNT12": {
"direction": "OUT"
},
"WRCOUNT2": {
"direction": "OUT"
},
@ -1065,6 +1056,15 @@
"WRCOUNT9": {
"direction": "OUT"
},
"WRCOUNT10": {
"direction": "OUT"
},
"WRCOUNT11": {
"direction": "OUT"
},
"WRCOUNT12": {
"direction": "OUT"
},
"WRERR": {
"direction": "OUT"
}

48
artix7/site_type_USR_ACCESS.json
View File

@ -9,6 +9,30 @@
"DATA1": {
"direction": "OUT"
},
"DATA2": {
"direction": "OUT"
},
"DATA3": {
"direction": "OUT"
},
"DATA4": {
"direction": "OUT"
},
"DATA5": {
"direction": "OUT"
},
"DATA6": {
"direction": "OUT"
},
"DATA7": {
"direction": "OUT"
},
"DATA8": {
"direction": "OUT"
},
"DATA9": {
"direction": "OUT"
},
"DATA10": {
"direction": "OUT"
},
@ -39,9 +63,6 @@
"DATA19": {
"direction": "OUT"
},
"DATA2": {
"direction": "OUT"
},
"DATA20": {
"direction": "OUT"
},
@ -72,33 +93,12 @@
"DATA29": {
"direction": "OUT"
},
"DATA3": {
"direction": "OUT"
},
"DATA30": {
"direction": "OUT"
},
"DATA31": {
"direction": "OUT"
},
"DATA4": {
"direction": "OUT"
},
"DATA5": {
"direction": "OUT"
},
"DATA6": {
"direction": "OUT"
},
"DATA7": {
"direction": "OUT"
},
"DATA8": {
"direction": "OUT"
},
"DATA9": {
"direction": "OUT"
},
"DATAVALID": {
"direction": "OUT"
}

324
artix7/site_type_XADC.json
View File

@ -81,24 +81,6 @@
"DI1": {
"direction": "IN"
},
"DI10": {
"direction": "IN"
},
"DI11": {
"direction": "IN"
},
"DI12": {
"direction": "IN"
},
"DI13": {
"direction": "IN"
},
"DI14": {
"direction": "IN"
},
"DI15": {
"direction": "IN"
},
"DI2": {
"direction": "IN"
},
@ -123,30 +105,30 @@
"DI9": {
"direction": "IN"
},
"DI10": {
"direction": "IN"
},
"DI11": {
"direction": "IN"
},
"DI12": {
"direction": "IN"
},
"DI13": {
"direction": "IN"
},
"DI14": {
"direction": "IN"
},
"DI15": {
"direction": "IN"
},
"DO0": {
"direction": "OUT"
},
"DO1": {
"direction": "OUT"
},
"DO10": {
"direction": "OUT"
},
"DO11": {
"direction": "OUT"
},
"DO12": {
"direction": "OUT"
},
"DO13": {
"direction": "OUT"
},
"DO14": {
"direction": "OUT"
},
"DO15": {
"direction": "OUT"
},
"DO2": {
"direction": "OUT"
},
@ -171,6 +153,24 @@
"DO9": {
"direction": "OUT"
},
"DO10": {
"direction": "OUT"
},
"DO11": {
"direction": "OUT"
},
"DO12": {
"direction": "OUT"
},
"DO13": {
"direction": "OUT"
},
"DO14": {
"direction": "OUT"
},
"DO15": {
"direction": "OUT"
},
"DRDY": {
"direction": "OUT"
},
@ -231,6 +231,30 @@
"TESTADCIN1": {
"direction": "IN"
},
"TESTADCIN2": {
"direction": "IN"
},
"TESTADCIN3": {
"direction": "IN"
},
"TESTADCIN4": {
"direction": "IN"
},
"TESTADCIN5": {
"direction": "IN"
},
"TESTADCIN6": {
"direction": "IN"
},
"TESTADCIN7": {
"direction": "IN"
},
"TESTADCIN8": {
"direction": "IN"
},
"TESTADCIN9": {
"direction": "IN"
},
"TESTADCIN10": {
"direction": "IN"
},
@ -261,15 +285,36 @@
"TESTADCIN19": {
"direction": "IN"
},
"TESTADCIN2": {
"direction": "IN"
},
"TESTADCIN20": {
"direction": "IN"
},
"TESTADCIN21": {
"direction": "IN"
},
"TESTADCIN22": {
"direction": "IN"
},
"TESTADCIN23": {
"direction": "IN"
},
"TESTADCIN24": {
"direction": "IN"
},
"TESTADCIN25": {
"direction": "IN"
},
"TESTADCIN26": {
"direction": "IN"
},
"TESTADCIN27": {
"direction": "IN"
},
"TESTADCIN28": {
"direction": "IN"
},
"TESTADCIN29": {
"direction": "IN"
},
"TESTADCIN210": {
"direction": "IN"
},
@ -300,57 +345,36 @@
"TESTADCIN219": {
"direction": "IN"
},
"TESTADCIN22": {
"direction": "IN"
},
"TESTADCIN23": {
"direction": "IN"
},
"TESTADCIN24": {
"direction": "IN"
},
"TESTADCIN25": {
"direction": "IN"
},
"TESTADCIN26": {
"direction": "IN"
},
"TESTADCIN27": {
"direction": "IN"
},
"TESTADCIN28": {
"direction": "IN"
},
"TESTADCIN29": {
"direction": "IN"
},
"TESTADCIN3": {
"direction": "IN"
},
"TESTADCIN4": {
"direction": "IN"
},
"TESTADCIN5": {
"direction": "IN"
},
"TESTADCIN6": {
"direction": "IN"
},
"TESTADCIN7": {
"direction": "IN"
},
"TESTADCIN8": {
"direction": "IN"
},
"TESTADCIN9": {
"direction": "IN"
},
"TESTADCOUT0": {
"direction": "OUT"
},
"TESTADCOUT1": {
"direction": "OUT"
},
"TESTADCOUT2": {
"direction": "OUT"
},
"TESTADCOUT3": {
"direction": "OUT"
},
"TESTADCOUT4": {
"direction": "OUT"
},
"TESTADCOUT5": {
"direction": "OUT"
},
"TESTADCOUT6": {
"direction": "OUT"
},
"TESTADCOUT7": {
"direction": "OUT"
},
"TESTADCOUT8": {
"direction": "OUT"
},
"TESTADCOUT9": {
"direction": "OUT"
},
"TESTADCOUT10": {
"direction": "OUT"
},
@ -381,30 +405,6 @@
"TESTADCOUT19": {
"direction": "OUT"
},
"TESTADCOUT2": {
"direction": "OUT"
},
"TESTADCOUT3": {
"direction": "OUT"
},
"TESTADCOUT4": {
"direction": "OUT"
},
"TESTADCOUT5": {
"direction": "OUT"
},
"TESTADCOUT6": {
"direction": "OUT"
},
"TESTADCOUT7": {
"direction": "OUT"
},
"TESTADCOUT8": {
"direction": "OUT"
},
"TESTADCOUT9": {
"direction": "OUT"
},
"TESTCAPTURE": {
"direction": "IN"
},
@ -414,24 +414,6 @@
"TESTDB1": {
"direction": "OUT"
},
"TESTDB10": {
"direction": "OUT"
},
"TESTDB11": {
"direction": "OUT"
},
"TESTDB12": {
"direction": "OUT"
},
"TESTDB13": {
"direction": "OUT"
},
"TESTDB14": {
"direction": "OUT"
},
"TESTDB15": {
"direction": "OUT"
},
"TESTDB2": {
"direction": "OUT"
},
@ -456,6 +438,24 @@
"TESTDB9": {
"direction": "OUT"
},
"TESTDB10": {
"direction": "OUT"
},
"TESTDB11": {
"direction": "OUT"
},
"TESTDB12": {
"direction": "OUT"
},
"TESTDB13": {
"direction": "OUT"
},
"TESTDB14": {
"direction": "OUT"
},
"TESTDB15": {
"direction": "OUT"
},
"TESTDRCK": {
"direction": "IN"
},
@ -564,24 +564,6 @@
"VAUXN1": {
"direction": "IN"
},
"VAUXN10": {
"direction": "IN"
},
"VAUXN11": {
"direction": "IN"
},
"VAUXN12": {
"direction": "IN"
},
"VAUXN13": {
"direction": "IN"
},
"VAUXN14": {
"direction": "IN"
},
"VAUXN15": {
"direction": "IN"
},
"VAUXN2": {
"direction": "IN"
},
@ -606,30 +588,30 @@
"VAUXN9": {
"direction": "IN"
},
"VAUXN10": {
"direction": "IN"
},
"VAUXN11": {
"direction": "IN"
},
"VAUXN12": {
"direction": "IN"
},
"VAUXN13": {
"direction": "IN"
},
"VAUXN14": {
"direction": "IN"
},
"VAUXN15": {
"direction": "IN"
},
"VAUXP0": {
"direction": "IN"
},
"VAUXP1": {
"direction": "IN"
},
"VAUXP10": {
"direction": "IN"
},
"VAUXP11": {
"direction": "IN"
},
"VAUXP12": {
"direction": "IN"
},
"VAUXP13": {
"direction": "IN"
},
"VAUXP14": {
"direction": "IN"
},
"VAUXP15": {
"direction": "IN"
},
"VAUXP2": {
"direction": "IN"
},
@ -654,6 +636,24 @@
"VAUXP9": {
"direction": "IN"
},
"VAUXP10": {
"direction": "IN"
},
"VAUXP11": {
"direction": "IN"
},
"VAUXP12": {
"direction": "IN"
},
"VAUXP13": {
"direction": "IN"
},
"VAUXP14": {
"direction": "IN"
},
"VAUXP15": {
"direction": "IN"
},
"VN": {
"direction": "IN"
},

518
artix7/tile_type_BRAM_INT_INTERFACE_L.json
View File

@ -56,6 +56,230 @@
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B1"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B2->>INT_INTERFACE_LOGIC_OUTS_L2": {
"can_invert": "0",
"dst_to_src": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L2",
"is_directional": "1",
"is_pass_transistor": 0,
"is_pseudo": "0",
"src_to_dst": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B2"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B3->>INT_INTERFACE_LOGIC_OUTS_L3": {
"can_invert": "0",
"dst_to_src": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L3",
"is_directional": "1",
"is_pass_transistor": 0,
"is_pseudo": "0",
"src_to_dst": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B3"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B4->>INT_INTERFACE_LOGIC_OUTS_L4": {
"can_invert": "0",
"dst_to_src": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L4",
"is_directional": "1",
"is_pass_transistor": 0,
"is_pseudo": "0",
"src_to_dst": {
"delay": [
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"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B4"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B5->>INT_INTERFACE_LOGIC_OUTS_L5": {
"can_invert": "0",
"dst_to_src": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L5",
"is_directional": "1",
"is_pass_transistor": 0,
"is_pseudo": "0",
"src_to_dst": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B5"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B6->>INT_INTERFACE_LOGIC_OUTS_L6": {
"can_invert": "0",
"dst_to_src": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L6",
"is_directional": "1",
"is_pass_transistor": 0,
"is_pseudo": "0",
"src_to_dst": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B6"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B7->>INT_INTERFACE_LOGIC_OUTS_L7": {
"can_invert": "0",
"dst_to_src": {
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"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L7",
"is_directional": "1",
"is_pass_transistor": 0,
"is_pseudo": "0",
"src_to_dst": {
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"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B7"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B8->>INT_INTERFACE_LOGIC_OUTS_L8": {
"can_invert": "0",
"dst_to_src": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L8",
"is_directional": "1",
"is_pass_transistor": 0,
"is_pseudo": "0",
"src_to_dst": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B8"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B9->>INT_INTERFACE_LOGIC_OUTS_L9": {
"can_invert": "0",
"dst_to_src": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L9",
"is_directional": "1",
"is_pass_transistor": 0,
"is_pseudo": "0",
"src_to_dst": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B9"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B10->>INT_INTERFACE_LOGIC_OUTS_L10": {
"can_invert": "0",
"dst_to_src": {
@ -336,34 +560,6 @@
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B19"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B2->>INT_INTERFACE_LOGIC_OUTS_L2": {
"can_invert": "0",
"dst_to_src": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L2",
"is_directional": "1",
"is_pass_transistor": 0,
"is_pseudo": "0",
"src_to_dst": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B2"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B20->>INT_INTERFACE_LOGIC_OUTS_L20": {
"can_invert": "0",
"dst_to_src": {
@ -475,202 +671,6 @@
"res": "1325.8925625"
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B23"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B3->>INT_INTERFACE_LOGIC_OUTS_L3": {
"can_invert": "0",
"dst_to_src": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L3",
"is_directional": "1",
"is_pass_transistor": 0,
"is_pseudo": "0",
"src_to_dst": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B3"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B4->>INT_INTERFACE_LOGIC_OUTS_L4": {
"can_invert": "0",
"dst_to_src": {
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"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L4",
"is_directional": "1",
"is_pass_transistor": 0,
"is_pseudo": "0",
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"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B4"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B5->>INT_INTERFACE_LOGIC_OUTS_L5": {
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"dst_to_src": {
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"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L5",
"is_directional": "1",
"is_pass_transistor": 0,
"is_pseudo": "0",
"src_to_dst": {
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"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B5"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B6->>INT_INTERFACE_LOGIC_OUTS_L6": {
"can_invert": "0",
"dst_to_src": {
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"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L6",
"is_directional": "1",
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"0.070",
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],
"in_cap": "5.962",
"res": "1325.8925625"
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B6"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B7->>INT_INTERFACE_LOGIC_OUTS_L7": {
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"dst_to_src": {
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"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L7",
"is_directional": "1",
"is_pass_transistor": 0,
"is_pseudo": "0",
"src_to_dst": {
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"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B7"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B8->>INT_INTERFACE_LOGIC_OUTS_L8": {
"can_invert": "0",
"dst_to_src": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L8",
"is_directional": "1",
"is_pass_transistor": 0,
"is_pseudo": "0",
"src_to_dst": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B8"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B9->>INT_INTERFACE_LOGIC_OUTS_L9": {
"can_invert": "0",
"dst_to_src": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L9",
"is_directional": "1",
"is_pass_transistor": 0,
"is_pseudo": "0",
"src_to_dst": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B9"
}
},
"sites": [],
@ -682,6 +682,14 @@
"INT_INTERFACE_BLOCK_OUTS_L_B3": null,
"INT_INTERFACE_BRAM_IMUX0": null,
"INT_INTERFACE_BRAM_IMUX1": null,
"INT_INTERFACE_BRAM_IMUX2": null,
"INT_INTERFACE_BRAM_IMUX3": null,
"INT_INTERFACE_BRAM_IMUX4": null,
"INT_INTERFACE_BRAM_IMUX5": null,
"INT_INTERFACE_BRAM_IMUX6": null,
"INT_INTERFACE_BRAM_IMUX7": null,
"INT_INTERFACE_BRAM_IMUX8": null,
"INT_INTERFACE_BRAM_IMUX9": null,
"INT_INTERFACE_BRAM_IMUX10": null,
"INT_INTERFACE_BRAM_IMUX11": null,
"INT_INTERFACE_BRAM_IMUX12": null,
@ -692,7 +700,6 @@
"INT_INTERFACE_BRAM_IMUX17": null,
"INT_INTERFACE_BRAM_IMUX18": null,
"INT_INTERFACE_BRAM_IMUX19": null,
"INT_INTERFACE_BRAM_IMUX2": null,
"INT_INTERFACE_BRAM_IMUX20": null,
"INT_INTERFACE_BRAM_IMUX21": null,
"INT_INTERFACE_BRAM_IMUX22": null,
@ -703,7 +710,6 @@
"INT_INTERFACE_BRAM_IMUX27": null,
"INT_INTERFACE_BRAM_IMUX28": null,
"INT_INTERFACE_BRAM_IMUX29": null,
"INT_INTERFACE_BRAM_IMUX3": null,
"INT_INTERFACE_BRAM_IMUX30": null,
"INT_INTERFACE_BRAM_IMUX31": null,
"INT_INTERFACE_BRAM_IMUX32": null,
@ -714,7 +720,6 @@
"INT_INTERFACE_BRAM_IMUX37": null,
"INT_INTERFACE_BRAM_IMUX38": null,
"INT_INTERFACE_BRAM_IMUX39": null,
"INT_INTERFACE_BRAM_IMUX4": null,
"INT_INTERFACE_BRAM_IMUX40": null,
"INT_INTERFACE_BRAM_IMUX41": null,
"INT_INTERFACE_BRAM_IMUX42": null,
@ -723,13 +728,16 @@
"INT_INTERFACE_BRAM_IMUX45": null,
"INT_INTERFACE_BRAM_IMUX46": null,
"INT_INTERFACE_BRAM_IMUX47": null,
"INT_INTERFACE_BRAM_IMUX5": null,
"INT_INTERFACE_BRAM_IMUX6": null,
"INT_INTERFACE_BRAM_IMUX7": null,
"INT_INTERFACE_BRAM_IMUX8": null,
"INT_INTERFACE_BRAM_IMUX9": null,
"INT_INTERFACE_BRAM_UTURN_IMUX0": null,
"INT_INTERFACE_BRAM_UTURN_IMUX1": null,
"INT_INTERFACE_BRAM_UTURN_IMUX2": null,
"INT_INTERFACE_BRAM_UTURN_IMUX3": null,
"INT_INTERFACE_BRAM_UTURN_IMUX4": null,
"INT_INTERFACE_BRAM_UTURN_IMUX5": null,
"INT_INTERFACE_BRAM_UTURN_IMUX6": null,
"INT_INTERFACE_BRAM_UTURN_IMUX7": null,
"INT_INTERFACE_BRAM_UTURN_IMUX8": null,
"INT_INTERFACE_BRAM_UTURN_IMUX9": null,
"INT_INTERFACE_BRAM_UTURN_IMUX10": null,
"INT_INTERFACE_BRAM_UTURN_IMUX11": null,
"INT_INTERFACE_BRAM_UTURN_IMUX12": null,
@ -740,7 +748,6 @@
"INT_INTERFACE_BRAM_UTURN_IMUX17": null,
"INT_INTERFACE_BRAM_UTURN_IMUX18": null,
"INT_INTERFACE_BRAM_UTURN_IMUX19": null,
"INT_INTERFACE_BRAM_UTURN_IMUX2": null,
"INT_INTERFACE_BRAM_UTURN_IMUX20": null,
"INT_INTERFACE_BRAM_UTURN_IMUX21": null,
"INT_INTERFACE_BRAM_UTURN_IMUX22": null,
@ -751,7 +758,6 @@
"INT_INTERFACE_BRAM_UTURN_IMUX27": null,
"INT_INTERFACE_BRAM_UTURN_IMUX28": null,
"INT_INTERFACE_BRAM_UTURN_IMUX29": null,
"INT_INTERFACE_BRAM_UTURN_IMUX3": null,
"INT_INTERFACE_BRAM_UTURN_IMUX30": null,
"INT_INTERFACE_BRAM_UTURN_IMUX31": null,
"INT_INTERFACE_BRAM_UTURN_IMUX32": null,
@ -762,7 +768,6 @@
"INT_INTERFACE_BRAM_UTURN_IMUX37": null,
"INT_INTERFACE_BRAM_UTURN_IMUX38": null,
"INT_INTERFACE_BRAM_UTURN_IMUX39": null,
"INT_INTERFACE_BRAM_UTURN_IMUX4": null,
"INT_INTERFACE_BRAM_UTURN_IMUX40": null,
"INT_INTERFACE_BRAM_UTURN_IMUX41": null,
"INT_INTERFACE_BRAM_UTURN_IMUX42": null,
@ -771,11 +776,6 @@
"INT_INTERFACE_BRAM_UTURN_IMUX45": null,
"INT_INTERFACE_BRAM_UTURN_IMUX46": null,
"INT_INTERFACE_BRAM_UTURN_IMUX47": null,
"INT_INTERFACE_BRAM_UTURN_IMUX5": null,
"INT_INTERFACE_BRAM_UTURN_IMUX6": null,
"INT_INTERFACE_BRAM_UTURN_IMUX7": null,
"INT_INTERFACE_BRAM_UTURN_IMUX8": null,
"INT_INTERFACE_BRAM_UTURN_IMUX9": null,
"INT_INTERFACE_BYP0": null,
"INT_INTERFACE_BYP1": null,
"INT_INTERFACE_BYP2": null,
@ -829,9 +829,6 @@
"INT_INTERFACE_FAN6": null,
"INT_INTERFACE_FAN7": null,
"INT_INTERFACE_LH1": null,
"INT_INTERFACE_LH10": null,
"INT_INTERFACE_LH11": null,
"INT_INTERFACE_LH12": null,
"INT_INTERFACE_LH2": null,
"INT_INTERFACE_LH3": null,
"INT_INTERFACE_LH4": null,
@ -840,8 +837,19 @@
"INT_INTERFACE_LH7": null,
"INT_INTERFACE_LH8": null,
"INT_INTERFACE_LH9": null,
"INT_INTERFACE_LH10": null,
"INT_INTERFACE_LH11": null,
"INT_INTERFACE_LH12": null,
"INT_INTERFACE_LOGIC_OUTS_L0": null,
"INT_INTERFACE_LOGIC_OUTS_L1": null,
"INT_INTERFACE_LOGIC_OUTS_L2": null,
"INT_INTERFACE_LOGIC_OUTS_L3": null,
"INT_INTERFACE_LOGIC_OUTS_L4": null,
"INT_INTERFACE_LOGIC_OUTS_L5": null,
"INT_INTERFACE_LOGIC_OUTS_L6": null,
"INT_INTERFACE_LOGIC_OUTS_L7": null,
"INT_INTERFACE_LOGIC_OUTS_L8": null,
"INT_INTERFACE_LOGIC_OUTS_L9": null,
"INT_INTERFACE_LOGIC_OUTS_L10": null,
"INT_INTERFACE_LOGIC_OUTS_L11": null,
"INT_INTERFACE_LOGIC_OUTS_L12": null,
@ -852,20 +860,20 @@
"INT_INTERFACE_LOGIC_OUTS_L17": null,
"INT_INTERFACE_LOGIC_OUTS_L18": null,
"INT_INTERFACE_LOGIC_OUTS_L19": null,
"INT_INTERFACE_LOGIC_OUTS_L2": null,
"INT_INTERFACE_LOGIC_OUTS_L20": null,
"INT_INTERFACE_LOGIC_OUTS_L21": null,
"INT_INTERFACE_LOGIC_OUTS_L22": null,
"INT_INTERFACE_LOGIC_OUTS_L23": null,
"INT_INTERFACE_LOGIC_OUTS_L3": null,
"INT_INTERFACE_LOGIC_OUTS_L4": null,
"INT_INTERFACE_LOGIC_OUTS_L5": null,
"INT_INTERFACE_LOGIC_OUTS_L6": null,
"INT_INTERFACE_LOGIC_OUTS_L7": null,
"INT_INTERFACE_LOGIC_OUTS_L8": null,
"INT_INTERFACE_LOGIC_OUTS_L9": null,
"INT_INTERFACE_LOGIC_OUTS_L_B0": null,
"INT_INTERFACE_LOGIC_OUTS_L_B1": null,
"INT_INTERFACE_LOGIC_OUTS_L_B2": null,
"INT_INTERFACE_LOGIC_OUTS_L_B3": null,
"INT_INTERFACE_LOGIC_OUTS_L_B4": null,
"INT_INTERFACE_LOGIC_OUTS_L_B5": null,
"INT_INTERFACE_LOGIC_OUTS_L_B6": null,
"INT_INTERFACE_LOGIC_OUTS_L_B7": null,
"INT_INTERFACE_LOGIC_OUTS_L_B8": null,
"INT_INTERFACE_LOGIC_OUTS_L_B9": null,
"INT_INTERFACE_LOGIC_OUTS_L_B10": null,
"INT_INTERFACE_LOGIC_OUTS_L_B11": null,
"INT_INTERFACE_LOGIC_OUTS_L_B12": null,
@ -876,18 +884,10 @@
"INT_INTERFACE_LOGIC_OUTS_L_B17": null,
"INT_INTERFACE_LOGIC_OUTS_L_B18": null,
"INT_INTERFACE_LOGIC_OUTS_L_B19": null,
"INT_INTERFACE_LOGIC_OUTS_L_B2": null,
"INT_INTERFACE_LOGIC_OUTS_L_B20": null,
"INT_INTERFACE_LOGIC_OUTS_L_B21": null,
"INT_INTERFACE_LOGIC_OUTS_L_B22": null,
"INT_INTERFACE_LOGIC_OUTS_L_B23": null,
"INT_INTERFACE_LOGIC_OUTS_L_B3": null,
"INT_INTERFACE_LOGIC_OUTS_L_B4": null,
"INT_INTERFACE_LOGIC_OUTS_L_B5": null,
"INT_INTERFACE_LOGIC_OUTS_L_B6": null,
"INT_INTERFACE_LOGIC_OUTS_L_B7": null,
"INT_INTERFACE_LOGIC_OUTS_L_B8": null,
"INT_INTERFACE_LOGIC_OUTS_L_B9": null,
"INT_INTERFACE_MONITOR_N": null,
"INT_INTERFACE_MONITOR_P": null,
"INT_INTERFACE_NE2A0": null,

518
artix7/tile_type_BRAM_INT_INTERFACE_R.json
View File

@ -56,6 +56,230 @@
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B1"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B2->>INT_INTERFACE_LOGIC_OUTS2": {
"can_invert": "0",
"dst_to_src": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"dst_wire": "INT_INTERFACE_LOGIC_OUTS2",
"is_directional": "1",
"is_pass_transistor": 0,
"is_pseudo": "0",
"src_to_dst": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B2"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B3->>INT_INTERFACE_LOGIC_OUTS3": {
"can_invert": "0",
"dst_to_src": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"dst_wire": "INT_INTERFACE_LOGIC_OUTS3",
"is_directional": "1",
"is_pass_transistor": 0,
"is_pseudo": "0",
"src_to_dst": {
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"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B3"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B4->>INT_INTERFACE_LOGIC_OUTS4": {
"can_invert": "0",
"dst_to_src": {
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"0.057",
"0.070",
"0.154",
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],
"in_cap": "5.962",
"res": "1325.8925625"
},
"dst_wire": "INT_INTERFACE_LOGIC_OUTS4",
"is_directional": "1",
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"is_pseudo": "0",
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"0.070",
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"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B4"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B5->>INT_INTERFACE_LOGIC_OUTS5": {
"can_invert": "0",
"dst_to_src": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"dst_wire": "INT_INTERFACE_LOGIC_OUTS5",
"is_directional": "1",
"is_pass_transistor": 0,
"is_pseudo": "0",
"src_to_dst": {
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"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B5"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B6->>INT_INTERFACE_LOGIC_OUTS6": {
"can_invert": "0",
"dst_to_src": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"dst_wire": "INT_INTERFACE_LOGIC_OUTS6",
"is_directional": "1",
"is_pass_transistor": 0,
"is_pseudo": "0",
"src_to_dst": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B6"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B7->>INT_INTERFACE_LOGIC_OUTS7": {
"can_invert": "0",
"dst_to_src": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"dst_wire": "INT_INTERFACE_LOGIC_OUTS7",
"is_directional": "1",
"is_pass_transistor": 0,
"is_pseudo": "0",
"src_to_dst": {
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"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B7"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B8->>INT_INTERFACE_LOGIC_OUTS8": {
"can_invert": "0",
"dst_to_src": {
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"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"dst_wire": "INT_INTERFACE_LOGIC_OUTS8",
"is_directional": "1",
"is_pass_transistor": 0,
"is_pseudo": "0",
"src_to_dst": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B8"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B9->>INT_INTERFACE_LOGIC_OUTS9": {
"can_invert": "0",
"dst_to_src": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"dst_wire": "INT_INTERFACE_LOGIC_OUTS9",
"is_directional": "1",
"is_pass_transistor": 0,
"is_pseudo": "0",
"src_to_dst": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B9"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B10->>INT_INTERFACE_LOGIC_OUTS10": {
"can_invert": "0",
"dst_to_src": {
@ -336,34 +560,6 @@
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B19"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B2->>INT_INTERFACE_LOGIC_OUTS2": {
"can_invert": "0",
"dst_to_src": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"dst_wire": "INT_INTERFACE_LOGIC_OUTS2",
"is_directional": "1",
"is_pass_transistor": 0,
"is_pseudo": "0",
"src_to_dst": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B2"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B20->>INT_INTERFACE_LOGIC_OUTS20": {
"can_invert": "0",
"dst_to_src": {
@ -475,202 +671,6 @@
"res": "1325.8925625"
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B23"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B3->>INT_INTERFACE_LOGIC_OUTS3": {
"can_invert": "0",
"dst_to_src": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"dst_wire": "INT_INTERFACE_LOGIC_OUTS3",
"is_directional": "1",
"is_pass_transistor": 0,
"is_pseudo": "0",
"src_to_dst": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B3"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B4->>INT_INTERFACE_LOGIC_OUTS4": {
"can_invert": "0",
"dst_to_src": {
"delay": [
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"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"dst_wire": "INT_INTERFACE_LOGIC_OUTS4",
"is_directional": "1",
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"is_pseudo": "0",
"src_to_dst": {
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"0.070",
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"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B4"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B5->>INT_INTERFACE_LOGIC_OUTS5": {
"can_invert": "0",
"dst_to_src": {
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],
"in_cap": "5.962",
"res": "1325.8925625"
},
"dst_wire": "INT_INTERFACE_LOGIC_OUTS5",
"is_directional": "1",
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"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B5"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B6->>INT_INTERFACE_LOGIC_OUTS6": {
"can_invert": "0",
"dst_to_src": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"dst_wire": "INT_INTERFACE_LOGIC_OUTS6",
"is_directional": "1",
"is_pass_transistor": 0,
"is_pseudo": "0",
"src_to_dst": {
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"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B6"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B7->>INT_INTERFACE_LOGIC_OUTS7": {
"can_invert": "0",
"dst_to_src": {
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],
"in_cap": "5.962",
"res": "1325.8925625"
},
"dst_wire": "INT_INTERFACE_LOGIC_OUTS7",
"is_directional": "1",
"is_pass_transistor": 0,
"is_pseudo": "0",
"src_to_dst": {
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"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B7"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B8->>INT_INTERFACE_LOGIC_OUTS8": {
"can_invert": "0",
"dst_to_src": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"dst_wire": "INT_INTERFACE_LOGIC_OUTS8",
"is_directional": "1",
"is_pass_transistor": 0,
"is_pseudo": "0",
"src_to_dst": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B8"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B9->>INT_INTERFACE_LOGIC_OUTS9": {
"can_invert": "0",
"dst_to_src": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"dst_wire": "INT_INTERFACE_LOGIC_OUTS9",
"is_directional": "1",
"is_pass_transistor": 0,
"is_pseudo": "0",
"src_to_dst": {
"delay": [
"0.057",
"0.070",
"0.154",
"0.186"
],
"in_cap": "5.962",
"res": "1325.8925625"
},
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B9"
}
},
"sites": [],
@ -682,6 +682,14 @@
"INT_INTERFACE_BLOCK_OUTS_B3": null,
"INT_INTERFACE_BRAM_IMUX0": null,
"INT_INTERFACE_BRAM_IMUX1": null,
"INT_INTERFACE_BRAM_IMUX2": null,
"INT_INTERFACE_BRAM_IMUX3": null,
"INT_INTERFACE_BRAM_IMUX4": null,
"INT_INTERFACE_BRAM_IMUX5": null,
"INT_INTERFACE_BRAM_IMUX6": null,
"INT_INTERFACE_BRAM_IMUX7": null,
"INT_INTERFACE_BRAM_IMUX8": null,
"INT_INTERFACE_BRAM_IMUX9": null,
"INT_INTERFACE_BRAM_IMUX10": null,
"INT_INTERFACE_BRAM_IMUX11": null,
"INT_INTERFACE_BRAM_IMUX12": null,
@ -692,7 +700,6 @@
"INT_INTERFACE_BRAM_IMUX17": null,
"INT_INTERFACE_BRAM_IMUX18": null,
"INT_INTERFACE_BRAM_IMUX19": null,
"INT_INTERFACE_BRAM_IMUX2": null,
"INT_INTERFACE_BRAM_IMUX20": null,
"INT_INTERFACE_BRAM_IMUX21": null,
"INT_INTERFACE_BRAM_IMUX22": null,
@ -703,7 +710,6 @@
"INT_INTERFACE_BRAM_IMUX27": null,
"INT_INTERFACE_BRAM_IMUX28": null,
"INT_INTERFACE_BRAM_IMUX29": null,
"INT_INTERFACE_BRAM_IMUX3": null,
"INT_INTERFACE_BRAM_IMUX30": null,
"INT_INTERFACE_BRAM_IMUX31": null,
"INT_INTERFACE_BRAM_IMUX32": null,
@ -714,7 +720,6 @@
"INT_INTERFACE_BRAM_IMUX37": null,
"INT_INTERFACE_BRAM_IMUX38": null,
"INT_INTERFACE_BRAM_IMUX39": null,
"INT_INTERFACE_BRAM_IMUX4": null,
"INT_INTERFACE_BRAM_IMUX40": null,
"INT_INTERFACE_BRAM_IMUX41": null,
"INT_INTERFACE_BRAM_IMUX42": null,
@ -723,13 +728,16 @@
"INT_INTERFACE_BRAM_IMUX45": null,
"INT_INTERFACE_BRAM_IMUX46": null,
"INT_INTERFACE_BRAM_IMUX47": null,
"INT_INTERFACE_BRAM_IMUX5": null,
"INT_INTERFACE_BRAM_IMUX6": null,
"INT_INTERFACE_BRAM_IMUX7": null,
"INT_INTERFACE_BRAM_IMUX8": null,
"INT_INTERFACE_BRAM_IMUX9": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX0": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX1": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX2": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX3": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX4": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX5": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX6": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX7": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX8": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX9": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX10": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX11": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX12": null,
@ -740,7 +748,6 @@
"INT_INTERFACE_BRAM_UTURN_R_IMUX17": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX18": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX19": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX2": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX20": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX21": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX22": null,
@ -751,7 +758,6 @@
"INT_INTERFACE_BRAM_UTURN_R_IMUX27": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX28": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX29": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX3": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX30": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX31": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX32": null,
@ -762,7 +768,6 @@
"INT_INTERFACE_BRAM_UTURN_R_IMUX37": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX38": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX39": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX4": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX40": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX41": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX42": null,
@ -771,11 +776,6 @@
"INT_INTERFACE_BRAM_UTURN_R_IMUX45": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX46": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX47": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX5": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX6": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX7": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX8": null,
"INT_INTERFACE_BRAM_UTURN_R_IMUX9": null,
"INT_INTERFACE_BYP0": null,
"INT_INTERFACE_BYP1": null,
"INT_INTERFACE_BYP2": null,
@ -829,9 +829,6 @@
"INT_INTERFACE_FAN6": null,
"INT_INTERFACE_FAN7": null,
"INT_INTERFACE_LH1": null,
"INT_INTERFACE_LH10": null,
"INT_INTERFACE_LH11": null,
"INT_INTERFACE_LH12": null,
"INT_INTERFACE_LH2": null,
"INT_INTERFACE_LH3": null,
"INT_INTERFACE_LH4": null,
@ -840,8 +837,19 @@
"INT_INTERFACE_LH7": null,
"INT_INTERFACE_LH8": null,
"INT_INTERFACE_LH9": null,
"INT_INTERFACE_LH10": null,
"INT_INTERFACE_LH11": null,
"INT_INTERFACE_LH12": null,
"INT_INTERFACE_LOGIC_OUTS0": null,
"INT_INTERFACE_LOGIC_OUTS1": null,
"INT_INTERFACE_LOGIC_OUTS2": null,
"INT_INTERFACE_LOGIC_OUTS3": null,
"INT_INTERFACE_LOGIC_OUTS4": null,
"INT_INTERFACE_LOGIC_OUTS5": null,
"INT_INTERFACE_LOGIC_OUTS6": null,
"INT_INTERFACE_LOGIC_OUTS7": null,
"INT_INTERFACE_LOGIC_OUTS8": null,
"INT_INTERFACE_LOGIC_OUTS9": null,
"INT_INTERFACE_LOGIC_OUTS10": null,
"INT_INTERFACE_LOGIC_OUTS11": null,
"INT_INTERFACE_LOGIC_OUTS12": null,
@ -852,20 +860,20 @@
"INT_INTERFACE_LOGIC_OUTS17": null,
"INT_INTERFACE_LOGIC_OUTS18": null,
"INT_INTERFACE_LOGIC_OUTS19": null,
"INT_INTERFACE_LOGIC_OUTS2": null,
"INT_INTERFACE_LOGIC_OUTS20": null,
"INT_INTERFACE_LOGIC_OUTS21": null,
"INT_INTERFACE_LOGIC_OUTS22": null,
"INT_INTERFACE_LOGIC_OUTS23": null,
"INT_INTERFACE_LOGIC_OUTS3": null,
"INT_INTERFACE_LOGIC_OUTS4": null,
"INT_INTERFACE_LOGIC_OUTS5": null,
"INT_INTERFACE_LOGIC_OUTS6": null,
"INT_INTERFACE_LOGIC_OUTS7": null,
"INT_INTERFACE_LOGIC_OUTS8": null,
"INT_INTERFACE_LOGIC_OUTS9": null,
"INT_INTERFACE_LOGIC_OUTS_B0": null,
"INT_INTERFACE_LOGIC_OUTS_B1": null,
"INT_INTERFACE_LOGIC_OUTS_B2": null,
"INT_INTERFACE_LOGIC_OUTS_B3": null,
"INT_INTERFACE_LOGIC_OUTS_B4": null,
"INT_INTERFACE_LOGIC_OUTS_B5": null,
"INT_INTERFACE_LOGIC_OUTS_B6": null,
"INT_INTERFACE_LOGIC_OUTS_B7": null,
"INT_INTERFACE_LOGIC_OUTS_B8": null,
"INT_INTERFACE_LOGIC_OUTS_B9": null,
"INT_INTERFACE_LOGIC_OUTS_B10": null,
"INT_INTERFACE_LOGIC_OUTS_B11": null,
"INT_INTERFACE_LOGIC_OUTS_B12": null,
@ -876,18 +884,10 @@
"INT_INTERFACE_LOGIC_OUTS_B17": null,
"INT_INTERFACE_LOGIC_OUTS_B18": null,
"INT_INTERFACE_LOGIC_OUTS_B19": null,
"INT_INTERFACE_LOGIC_OUTS_B2": null,
"INT_INTERFACE_LOGIC_OUTS_B20": null,
"INT_INTERFACE_LOGIC_OUTS_B21": null,
"INT_INTERFACE_LOGIC_OUTS_B22": null,
"INT_INTERFACE_LOGIC_OUTS_B23": null,
"INT_INTERFACE_LOGIC_OUTS_B3": null,
"INT_INTERFACE_LOGIC_OUTS_B4": null,
"INT_INTERFACE_LOGIC_OUTS_B5": null,
"INT_INTERFACE_LOGIC_OUTS_B6": null,
"INT_INTERFACE_LOGIC_OUTS_B7": null,
"INT_INTERFACE_LOGIC_OUTS_B8": null,
"INT_INTERFACE_LOGIC_OUTS_B9": null,
"INT_INTERFACE_MONITOR_N": null,
"INT_INTERFACE_MONITOR_P": null,
"INT_INTERFACE_NE2A0": null,

17584
artix7/tile_type_BRAM_L.json
View File

File diff suppressed because it is too large Load Diff

17284
artix7/tile_type_BRAM_R.json
View File

File diff suppressed because it is too large Load Diff

42
artix7/tile_type_BRKH_BRAM.json
View File

@ -9,11 +9,6 @@
"BRKH_BRAM_CASCADEB_R": null,
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU0": null,
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU1": null,
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU10": null,
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU11": null,
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU12": null,
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU13": null,
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU14": null,
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU2": null,
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU3": null,
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU4": null,
@ -22,13 +17,13 @@
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU7": null,
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU8": null,
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU9": null,
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU10": null,
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU11": null,
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU12": null,
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU13": null,
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU14": null,
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU0": null,
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU1": null,
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU10": null,
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU11": null,
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU12": null,
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU13": null,
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU14": null,
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU2": null,
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU3": null,
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU4": null,
@ -37,13 +32,13 @@
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU7": null,
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU8": null,
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU9": null,
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU10": null,
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU11": null,
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU12": null,
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU13": null,
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU14": null,
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU0": null,
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU1": null,
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU10": null,
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU11": null,
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU12": null,
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU13": null,
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU14": null,
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU2": null,
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU3": null,
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU4": null,
@ -52,13 +47,13 @@
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU7": null,
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU8": null,
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU9": null,
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU10": null,
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU11": null,
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU12": null,
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU13": null,
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU14": null,
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU0": null,
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU1": null,
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU10": null,
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU11": null,
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU12": null,
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU13": null,
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU14": null,
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU2": null,
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU3": null,
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU4": null,
@ -66,6 +61,11 @@
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU6": null,
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU7": null,
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU8": null,
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU9": null
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU9": null,
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU10": null,
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU11": null,
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU12": null,
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU13": null,
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU14": null
}
}

16
artix7/tile_type_BRKH_B_TERM_INT.json
View File

@ -9,10 +9,6 @@
"B_TERM_UTURN_INT_FAN_BOUNCE2": null,
"B_TERM_UTURN_INT_FAN_BOUNCE4": null,
"B_TERM_UTURN_INT_FAN_BOUNCE6": null,
"B_TERM_UTURN_INT_LV18": {
"cap": "13.000",
"res": "2.800"
},
"B_TERM_UTURN_INT_LV2": {
"cap": "13.000",
"res": "2.800"
@ -45,6 +41,10 @@
"cap": "13.000",
"res": "2.800"
},
"B_TERM_UTURN_INT_LV18": {
"cap": "13.000",
"res": "2.800"
},
"B_TERM_UTURN_INT_LVB0": {
"cap": "13.000",
"res": "2.800"
@ -93,10 +93,6 @@
"cap": "13.000",
"res": "2.800"
},
"B_TERM_UTURN_INT_LV_L18": {
"cap": "13.000",
"res": "2.800"
},
"B_TERM_UTURN_INT_LV_L2": {
"cap": "13.000",
"res": "2.800"
@ -129,6 +125,10 @@
"cap": "13.000",
"res": "2.800"
},
"B_TERM_UTURN_INT_LV_L18": {
"cap": "13.000",
"res": "2.800"
},
"B_TERM_UTURN_INT_SE2BEG0": null,
"B_TERM_UTURN_INT_SE2BEG1": null,
"B_TERM_UTURN_INT_SE2BEG2": null,

66
artix7/tile_type_BRKH_CLK.json
View File

@ -5,6 +5,14 @@
"wires": {
"BRKH_CLK_CK_BUFG_CASC0": null,
"BRKH_CLK_CK_BUFG_CASC1": null,
"BRKH_CLK_CK_BUFG_CASC2": null,
"BRKH_CLK_CK_BUFG_CASC3": null,
"BRKH_CLK_CK_BUFG_CASC4": null,
"BRKH_CLK_CK_BUFG_CASC5": null,
"BRKH_CLK_CK_BUFG_CASC6": null,
"BRKH_CLK_CK_BUFG_CASC7": null,
"BRKH_CLK_CK_BUFG_CASC8": null,
"BRKH_CLK_CK_BUFG_CASC9": null,
"BRKH_CLK_CK_BUFG_CASC10": null,
"BRKH_CLK_CK_BUFG_CASC11": null,
"BRKH_CLK_CK_BUFG_CASC12": null,
@ -15,7 +23,6 @@
"BRKH_CLK_CK_BUFG_CASC17": null,
"BRKH_CLK_CK_BUFG_CASC18": null,
"BRKH_CLK_CK_BUFG_CASC19": null,
"BRKH_CLK_CK_BUFG_CASC2": null,
"BRKH_CLK_CK_BUFG_CASC20": null,
"BRKH_CLK_CK_BUFG_CASC21": null,
"BRKH_CLK_CK_BUFG_CASC22": null,
@ -26,17 +33,18 @@
"BRKH_CLK_CK_BUFG_CASC27": null,
"BRKH_CLK_CK_BUFG_CASC28": null,
"BRKH_CLK_CK_BUFG_CASC29": null,
"BRKH_CLK_CK_BUFG_CASC3": null,
"BRKH_CLK_CK_BUFG_CASC30": null,
"BRKH_CLK_CK_BUFG_CASC31": null,
"BRKH_CLK_CK_BUFG_CASC4": null,
"BRKH_CLK_CK_BUFG_CASC5": null,
"BRKH_CLK_CK_BUFG_CASC6": null,
"BRKH_CLK_CK_BUFG_CASC7": null,
"BRKH_CLK_CK_BUFG_CASC8": null,
"BRKH_CLK_CK_BUFG_CASC9": null,
"BRKH_CLK_CK_GCLK0": null,
"BRKH_CLK_CK_GCLK1": null,
"BRKH_CLK_CK_GCLK2": null,
"BRKH_CLK_CK_GCLK3": null,
"BRKH_CLK_CK_GCLK4": null,
"BRKH_CLK_CK_GCLK5": null,
"BRKH_CLK_CK_GCLK6": null,
"BRKH_CLK_CK_GCLK7": null,
"BRKH_CLK_CK_GCLK8": null,
"BRKH_CLK_CK_GCLK9": null,
"BRKH_CLK_CK_GCLK10": null,
"BRKH_CLK_CK_GCLK11": null,
"BRKH_CLK_CK_GCLK12": null,
@ -47,7 +55,6 @@
"BRKH_CLK_CK_GCLK17": null,
"BRKH_CLK_CK_GCLK18": null,
"BRKH_CLK_CK_GCLK19": null,
"BRKH_CLK_CK_GCLK2": null,
"BRKH_CLK_CK_GCLK20": null,
"BRKH_CLK_CK_GCLK21": null,
"BRKH_CLK_CK_GCLK22": null,
@ -58,17 +65,18 @@
"BRKH_CLK_CK_GCLK27": null,
"BRKH_CLK_CK_GCLK28": null,
"BRKH_CLK_CK_GCLK29": null,
"BRKH_CLK_CK_GCLK3": null,
"BRKH_CLK_CK_GCLK30": null,
"BRKH_CLK_CK_GCLK31": null,
"BRKH_CLK_CK_GCLK4": null,
"BRKH_CLK_CK_GCLK5": null,
"BRKH_CLK_CK_GCLK6": null,
"BRKH_CLK_CK_GCLK7": null,
"BRKH_CLK_CK_GCLK8": null,
"BRKH_CLK_CK_GCLK9": null,
"BRKH_CLK_R_CK_BUFG_CASC0": null,
"BRKH_CLK_R_CK_BUFG_CASC1": null,
"BRKH_CLK_R_CK_BUFG_CASC2": null,
"BRKH_CLK_R_CK_BUFG_CASC3": null,
"BRKH_CLK_R_CK_BUFG_CASC4": null,
"BRKH_CLK_R_CK_BUFG_CASC5": null,
"BRKH_CLK_R_CK_BUFG_CASC6": null,
"BRKH_CLK_R_CK_BUFG_CASC7": null,
"BRKH_CLK_R_CK_BUFG_CASC8": null,
"BRKH_CLK_R_CK_BUFG_CASC9": null,
"BRKH_CLK_R_CK_BUFG_CASC10": null,
"BRKH_CLK_R_CK_BUFG_CASC11": null,
"BRKH_CLK_R_CK_BUFG_CASC12": null,
@ -79,7 +87,6 @@
"BRKH_CLK_R_CK_BUFG_CASC17": null,
"BRKH_CLK_R_CK_BUFG_CASC18": null,
"BRKH_CLK_R_CK_BUFG_CASC19": null,
"BRKH_CLK_R_CK_BUFG_CASC2": null,
"BRKH_CLK_R_CK_BUFG_CASC20": null,
"BRKH_CLK_R_CK_BUFG_CASC21": null,
"BRKH_CLK_R_CK_BUFG_CASC22": null,
@ -90,17 +97,18 @@
"BRKH_CLK_R_CK_BUFG_CASC27": null,
"BRKH_CLK_R_CK_BUFG_CASC28": null,
"BRKH_CLK_R_CK_BUFG_CASC29": null,
"BRKH_CLK_R_CK_BUFG_CASC3": null,
"BRKH_CLK_R_CK_BUFG_CASC30": null,
"BRKH_CLK_R_CK_BUFG_CASC31": null,
"BRKH_CLK_R_CK_BUFG_CASC4": null,
"BRKH_CLK_R_CK_BUFG_CASC5": null,
"BRKH_CLK_R_CK_BUFG_CASC6": null,
"BRKH_CLK_R_CK_BUFG_CASC7": null,
"BRKH_CLK_R_CK_BUFG_CASC8": null,
"BRKH_CLK_R_CK_BUFG_CASC9": null,
"BRKH_CLK_R_CK_GCLK0": null,
"BRKH_CLK_R_CK_GCLK1": null,
"BRKH_CLK_R_CK_GCLK2": null,
"BRKH_CLK_R_CK_GCLK3": null,
"BRKH_CLK_R_CK_GCLK4": null,
"BRKH_CLK_R_CK_GCLK5": null,
"BRKH_CLK_R_CK_GCLK6": null,
"BRKH_CLK_R_CK_GCLK7": null,
"BRKH_CLK_R_CK_GCLK8": null,
"BRKH_CLK_R_CK_GCLK9": null,
"BRKH_CLK_R_CK_GCLK10": null,
"BRKH_CLK_R_CK_GCLK11": null,
"BRKH_CLK_R_CK_GCLK12": null,
@ -111,7 +119,6 @@
"BRKH_CLK_R_CK_GCLK17": null,
"BRKH_CLK_R_CK_GCLK18": null,
"BRKH_CLK_R_CK_GCLK19": null,
"BRKH_CLK_R_CK_GCLK2": null,
"BRKH_CLK_R_CK_GCLK20": null,
"BRKH_CLK_R_CK_GCLK21": null,
"BRKH_CLK_R_CK_GCLK22": null,
@ -122,14 +129,7 @@
"BRKH_CLK_R_CK_GCLK27": null,
"BRKH_CLK_R_CK_GCLK28": null,
"BRKH_CLK_R_CK_GCLK29": null,
"BRKH_CLK_R_CK_GCLK3": null,
"BRKH_CLK_R_CK_GCLK30": null,
"BRKH_CLK_R_CK_GCLK31": null,
"BRKH_CLK_R_CK_GCLK4": null,
"BRKH_CLK_R_CK_GCLK5": null,
"BRKH_CLK_R_CK_GCLK6": null,
"BRKH_CLK_R_CK_GCLK7": null,
"BRKH_CLK_R_CK_GCLK8": null,
"BRKH_CLK_R_CK_GCLK9": null
"BRKH_CLK_R_CK_GCLK31": null
}
}

50
artix7/tile_type_BRKH_DSP_L.json
View File

@ -5,6 +5,14 @@
"wires": {
"BRKH_DSP_ACIN0": null,
"BRKH_DSP_ACIN1": null,
"BRKH_DSP_ACIN2": null,
"BRKH_DSP_ACIN3": null,
"BRKH_DSP_ACIN4": null,
"BRKH_DSP_ACIN5": null,
"BRKH_DSP_ACIN6": null,
"BRKH_DSP_ACIN7": null,
"BRKH_DSP_ACIN8": null,
"BRKH_DSP_ACIN9": null,
"BRKH_DSP_ACIN10": null,
"BRKH_DSP_ACIN11": null,
"BRKH_DSP_ACIN12": null,
@ -15,7 +23,6 @@
"BRKH_DSP_ACIN17": null,
"BRKH_DSP_ACIN18": null,
"BRKH_DSP_ACIN19": null,
"BRKH_DSP_ACIN2": null,
"BRKH_DSP_ACIN20": null,
"BRKH_DSP_ACIN21": null,
"BRKH_DSP_ACIN22": null,
@ -26,23 +33,8 @@
"BRKH_DSP_ACIN27": null,
"BRKH_DSP_ACIN28": null,
"BRKH_DSP_ACIN29": null,
"BRKH_DSP_ACIN3": null,
"BRKH_DSP_ACIN4": null,
"BRKH_DSP_ACIN5": null,
"BRKH_DSP_ACIN6": null,
"BRKH_DSP_ACIN7": null,
"BRKH_DSP_ACIN8": null,
"BRKH_DSP_ACIN9": null,
"BRKH_DSP_BCIN0": null,
"BRKH_DSP_BCIN1": null,
"BRKH_DSP_BCIN10": null,
"BRKH_DSP_BCIN11": null,
"BRKH_DSP_BCIN12": null,
"BRKH_DSP_BCIN13": null,
"BRKH_DSP_BCIN14": null,
"BRKH_DSP_BCIN15": null,
"BRKH_DSP_BCIN16": null,
"BRKH_DSP_BCIN17": null,
"BRKH_DSP_BCIN2": null,
"BRKH_DSP_BCIN3": null,
"BRKH_DSP_BCIN4": null,
@ -51,10 +43,26 @@
"BRKH_DSP_BCIN7": null,
"BRKH_DSP_BCIN8": null,
"BRKH_DSP_BCIN9": null,
"BRKH_DSP_BCIN10": null,
"BRKH_DSP_BCIN11": null,
"BRKH_DSP_BCIN12": null,
"BRKH_DSP_BCIN13": null,
"BRKH_DSP_BCIN14": null,
"BRKH_DSP_BCIN15": null,
"BRKH_DSP_BCIN16": null,
"BRKH_DSP_BCIN17": null,
"BRKH_DSP_CARRYCASCIN": null,
"BRKH_DSP_MULTSIGNIN": null,
"BRKH_DSP_PCIN0": null,
"BRKH_DSP_PCIN1": null,
"BRKH_DSP_PCIN2": null,
"BRKH_DSP_PCIN3": null,
"BRKH_DSP_PCIN4": null,
"BRKH_DSP_PCIN5": null,
"BRKH_DSP_PCIN6": null,
"BRKH_DSP_PCIN7": null,
"BRKH_DSP_PCIN8": null,
"BRKH_DSP_PCIN9": null,
"BRKH_DSP_PCIN10": null,
"BRKH_DSP_PCIN11": null,
"BRKH_DSP_PCIN12": null,
@ -65,7 +73,6 @@
"BRKH_DSP_PCIN17": null,
"BRKH_DSP_PCIN18": null,
"BRKH_DSP_PCIN19": null,
"BRKH_DSP_PCIN2": null,
"BRKH_DSP_PCIN20": null,
"BRKH_DSP_PCIN21": null,
"BRKH_DSP_PCIN22": null,
@ -76,7 +83,6 @@
"BRKH_DSP_PCIN27": null,
"BRKH_DSP_PCIN28": null,
"BRKH_DSP_PCIN29": null,
"BRKH_DSP_PCIN3": null,
"BRKH_DSP_PCIN30": null,
"BRKH_DSP_PCIN31": null,
"BRKH_DSP_PCIN32": null,
@ -87,7 +93,6 @@
"BRKH_DSP_PCIN37": null,
"BRKH_DSP_PCIN38": null,
"BRKH_DSP_PCIN39": null,
"BRKH_DSP_PCIN4": null,
"BRKH_DSP_PCIN40": null,
"BRKH_DSP_PCIN41": null,
"BRKH_DSP_PCIN42": null,
@ -95,11 +100,6 @@
"BRKH_DSP_PCIN44": null,
"BRKH_DSP_PCIN45": null,
"BRKH_DSP_PCIN46": null,
"BRKH_DSP_PCIN47": null,
"BRKH_DSP_PCIN5": null,
"BRKH_DSP_PCIN6": null,
"BRKH_DSP_PCIN7": null,
"BRKH_DSP_PCIN8": null,
"BRKH_DSP_PCIN9": null
"BRKH_DSP_PCIN47": null
}
}

50
artix7/tile_type_BRKH_DSP_R.json
View File

@ -5,6 +5,14 @@
"wires": {
"BRKH_DSP_ACIN0": null,
"BRKH_DSP_ACIN1": null,
"BRKH_DSP_ACIN2": null,
"BRKH_DSP_ACIN3": null,
"BRKH_DSP_ACIN4": null,
"BRKH_DSP_ACIN5": null,
"BRKH_DSP_ACIN6": null,
"BRKH_DSP_ACIN7": null,
"BRKH_DSP_ACIN8": null,
"BRKH_DSP_ACIN9": null,
"BRKH_DSP_ACIN10": null,
"BRKH_DSP_ACIN11": null,
"BRKH_DSP_ACIN12": null,
@ -15,7 +23,6 @@
"BRKH_DSP_ACIN17": null,
"BRKH_DSP_ACIN18": null,
"BRKH_DSP_ACIN19": null,
"BRKH_DSP_ACIN2": null,
"BRKH_DSP_ACIN20": null,
"BRKH_DSP_ACIN21": null,
"BRKH_DSP_ACIN22": null,
@ -26,23 +33,8 @@
"BRKH_DSP_ACIN27": null,
"BRKH_DSP_ACIN28": null,
"BRKH_DSP_ACIN29": null,
"BRKH_DSP_ACIN3": null,
"BRKH_DSP_ACIN4": null,
"BRKH_DSP_ACIN5": null,
"BRKH_DSP_ACIN6": null,
"BRKH_DSP_ACIN7": null,
"BRKH_DSP_ACIN8": null,
"BRKH_DSP_ACIN9": null,
"BRKH_DSP_BCIN0": null,
"BRKH_DSP_BCIN1": null,
"BRKH_DSP_BCIN10": null,
"BRKH_DSP_BCIN11": null,
"BRKH_DSP_BCIN12": null,
"BRKH_DSP_BCIN13": null,
"BRKH_DSP_BCIN14": null,
"BRKH_DSP_BCIN15": null,
"BRKH_DSP_BCIN16": null,
"BRKH_DSP_BCIN17": null,
"BRKH_DSP_BCIN2": null,
"BRKH_DSP_BCIN3": null,
"BRKH_DSP_BCIN4": null,
@ -51,10 +43,26 @@
"BRKH_DSP_BCIN7": null,
"BRKH_DSP_BCIN8": null,
"BRKH_DSP_BCIN9": null,
"BRKH_DSP_BCIN10": null,
"BRKH_DSP_BCIN11": null,
"BRKH_DSP_BCIN12": null,
"BRKH_DSP_BCIN13": null,
"BRKH_DSP_BCIN14": null,
"BRKH_DSP_BCIN15": null,
"BRKH_DSP_BCIN16": null,
"BRKH_DSP_BCIN17": null,
"BRKH_DSP_CARRYCASCIN": null,
"BRKH_DSP_MULTSIGNIN": null,
"BRKH_DSP_PCIN0": null,
"BRKH_DSP_PCIN1": null,
"BRKH_DSP_PCIN2": null,
"BRKH_DSP_PCIN3": null,
"BRKH_DSP_PCIN4": null,
"BRKH_DSP_PCIN5": null,
"BRKH_DSP_PCIN6": null,
"BRKH_DSP_PCIN7": null,
"BRKH_DSP_PCIN8": null,
"BRKH_DSP_PCIN9": null,
"BRKH_DSP_PCIN10": null,
"BRKH_DSP_PCIN11": null,
"BRKH_DSP_PCIN12": null,
@ -65,7 +73,6 @@
"BRKH_DSP_PCIN17": null,
"BRKH_DSP_PCIN18": null,
"BRKH_DSP_PCIN19": null,
"BRKH_DSP_PCIN2": null,
"BRKH_DSP_PCIN20": null,
"BRKH_DSP_PCIN21": null,
"BRKH_DSP_PCIN22": null,
@ -76,7 +83,6 @@
"BRKH_DSP_PCIN27": null,
"BRKH_DSP_PCIN28": null,
"BRKH_DSP_PCIN29": null,
"BRKH_DSP_PCIN3": null,
"BRKH_DSP_PCIN30": null,
"BRKH_DSP_PCIN31": null,
"BRKH_DSP_PCIN32": null,
@ -87,7 +93,6 @@
"BRKH_DSP_PCIN37": null,
"BRKH_DSP_PCIN38": null,
"BRKH_DSP_PCIN39": null,
"BRKH_DSP_PCIN4": null,
"BRKH_DSP_PCIN40": null,
"BRKH_DSP_PCIN41": null,
"BRKH_DSP_PCIN42": null,
@ -95,11 +100,6 @@
"BRKH_DSP_PCIN44": null,
"BRKH_DSP_PCIN45": null,
"BRKH_DSP_PCIN46": null,
"BRKH_DSP_PCIN47": null,
"BRKH_DSP_PCIN5": null,
"BRKH_DSP_PCIN6": null,
"BRKH_DSP_PCIN7": null,
"BRKH_DSP_PCIN8": null,
"BRKH_DSP_PCIN9": null
"BRKH_DSP_PCIN47": null
}
}

176
artix7/tile_type_BRKH_INT.json
View File

@ -452,38 +452,6 @@
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_LV10": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_LV11": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_LV12": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_LV13": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_LV14": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_LV15": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_LV16": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_LV17": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_LV2": {
"cap": "13.000",
"res": "2.800"
@ -516,22 +484,42 @@
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_LV10": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_LV11": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_LV12": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_LV13": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_LV14": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_LV15": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_LV16": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_LV17": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_LVB1": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_LVB10": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_LVB11": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_LVB12": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_LVB2": {
"cap": "13.000",
"res": "2.800"
@ -564,22 +552,22 @@
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_LVB10": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_LVB11": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_LVB12": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_LVB_L1": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_LVB_L10": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_LVB_L11": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_LVB_L12": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_LVB_L2": {
"cap": "13.000",
"res": "2.800"
@ -612,6 +600,18 @@
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_LVB_L10": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_LVB_L11": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_LVB_L12": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_L_LV0": {
"cap": "13.000",
"res": "2.800"
@ -620,38 +620,6 @@
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_L_LV10": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_L_LV11": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_L_LV12": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_L_LV13": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_L_LV14": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_L_LV15": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_L_LV16": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_L_LV17": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_L_LV2": {
"cap": "13.000",
"res": "2.800"
@ -684,6 +652,38 @@
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_L_LV10": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_L_LV11": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_L_LV12": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_L_LV13": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_L_LV14": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_L_LV15": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_L_LV16": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_L_LV17": {
"cap": "13.000",
"res": "2.800"
},
"BRKH_INT_NE2BEG0": {
"cap": "1.000",
"res": "5.230"

32
artix7/tile_type_BRKH_TERM_INT.json
View File

@ -3,14 +3,6 @@
"sites": [],
"tile_type": "BRKH_TERM_INT",
"wires": {
"T_TERM_INT_UTURN_LV_R16": {
"cap": "13.000",
"res": "2.800"
},
"T_TERM_INT_UTURN_LV_R17": {
"cap": "13.000",
"res": "2.800"
},
"T_TERM_INT_UTURN_LV_R2": {
"cap": "13.000",
"res": "2.800"
@ -39,6 +31,14 @@
"cap": "13.000",
"res": "2.800"
},
"T_TERM_INT_UTURN_LV_R16": {
"cap": "13.000",
"res": "2.800"
},
"T_TERM_INT_UTURN_LV_R17": {
"cap": "13.000",
"res": "2.800"
},
"T_TERM_UTURN_INT_ER1BEG_S0": null,
"T_TERM_UTURN_INT_ER1END3": null,
"T_TERM_UTURN_INT_FAN_BOUNCE_S3_0": null,
@ -93,14 +93,6 @@
"cap": "13.000",
"res": "2.800"
},
"T_TERM_UTURN_INT_LV_L16": {
"cap": "13.000",
"res": "2.800"
},
"T_TERM_UTURN_INT_LV_L17": {
"cap": "13.000",
"res": "2.800"
},
"T_TERM_UTURN_INT_LV_L2": {
"cap": "13.000",
"res": "2.800"
@ -129,6 +121,14 @@
"cap": "13.000",
"res": "2.800"
},
"T_TERM_UTURN_INT_LV_L16": {
"cap": "13.000",
"res": "2.800"
},
"T_TERM_UTURN_INT_LV_L17": {
"cap": "13.000",
"res": "2.800"
},
"T_TERM_UTURN_INT_SE2A0": null,
"T_TERM_UTURN_INT_SE2A1": null,
"T_TERM_UTURN_INT_SE2A2": null,

16
artix7/tile_type_B_TERM_INT.json
View File

@ -9,10 +9,6 @@
"B_TERM_UTURN_INT_FAN_BOUNCE2": null,
"B_TERM_UTURN_INT_FAN_BOUNCE4": null,
"B_TERM_UTURN_INT_FAN_BOUNCE6": null,
"B_TERM_UTURN_INT_LV18": {
"cap": "13.000",
"res": "2.800"
},
"B_TERM_UTURN_INT_LV2": {
"cap": "13.000",
"res": "2.800"
@ -45,6 +41,10 @@
"cap": "13.000",
"res": "2.800"
},
"B_TERM_UTURN_INT_LV18": {
"cap": "13.000",
"res": "2.800"
},
"B_TERM_UTURN_INT_LVB0": {
"cap": "13.000",
"res": "2.800"
@ -93,10 +93,6 @@
"cap": "13.000",
"res": "2.800"
},
"B_TERM_UTURN_INT_LV_L18": {
"cap": "13.000",
"res": "2.800"
},
"B_TERM_UTURN_INT_LV_L2": {
"cap": "13.000",
"res": "2.800"
@ -129,6 +125,10 @@
"cap": "13.000",
"res": "2.800"
},
"B_TERM_UTURN_INT_LV_L18": {
"cap": "13.000",
"res": "2.800"
},
"B_TERM_UTURN_INT_SE2BEG0": null,
"B_TERM_UTURN_INT_SE2BEG1": null,
"B_TERM_UTURN_INT_SE2BEG2": null,

18518
artix7/tile_type_CFG_CENTER_BOT.json
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File diff suppressed because it is too large Load Diff

24086
artix7/tile_type_CFG_CENTER_MID.json
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File diff suppressed because it is too large Load Diff

1984
artix7/tile_type_CFG_CENTER_TOP.json
View File

File diff suppressed because it is too large Load Diff

1062
artix7/tile_type_CLBLL_L.json
View File

File diff suppressed because it is too large Load Diff

1062
artix7/tile_type_CLBLL_R.json
View File

File diff suppressed because it is too large Load Diff

1062
artix7/tile_type_CLBLM_L.json
View File

File diff suppressed because it is too large Load Diff

1062
artix7/tile_type_CLBLM_R.json
View File

File diff suppressed because it is too large Load Diff

5432
artix7/tile_type_CLK_BUFG_BOT_R.json
View File

File diff suppressed because it is too large Load Diff

1666
artix7/tile_type_CLK_BUFG_REBUF.json
View File

File diff suppressed because it is too large Load Diff

5532
artix7/tile_type_CLK_BUFG_TOP_R.json
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File diff suppressed because it is too large Load Diff

70
artix7/tile_type_CLK_FEED.json
View File

@ -5,6 +5,14 @@
"wires": {
"CLK_FEED_CK_BUFG_CASC0": null,
"CLK_FEED_CK_BUFG_CASC1": null,
"CLK_FEED_CK_BUFG_CASC2": null,
"CLK_FEED_CK_BUFG_CASC3": null,
"CLK_FEED_CK_BUFG_CASC4": null,
"CLK_FEED_CK_BUFG_CASC5": null,
"CLK_FEED_CK_BUFG_CASC6": null,
"CLK_FEED_CK_BUFG_CASC7": null,
"CLK_FEED_CK_BUFG_CASC8": null,
"CLK_FEED_CK_BUFG_CASC9": null,
"CLK_FEED_CK_BUFG_CASC10": null,
"CLK_FEED_CK_BUFG_CASC11": null,
"CLK_FEED_CK_BUFG_CASC12": null,
@ -15,7 +23,6 @@
"CLK_FEED_CK_BUFG_CASC17": null,
"CLK_FEED_CK_BUFG_CASC18": null,
"CLK_FEED_CK_BUFG_CASC19": null,
"CLK_FEED_CK_BUFG_CASC2": null,
"CLK_FEED_CK_BUFG_CASC20": null,
"CLK_FEED_CK_BUFG_CASC21": null,
"CLK_FEED_CK_BUFG_CASC22": null,
@ -26,17 +33,18 @@
"CLK_FEED_CK_BUFG_CASC27": null,
"CLK_FEED_CK_BUFG_CASC28": null,
"CLK_FEED_CK_BUFG_CASC29": null,
"CLK_FEED_CK_BUFG_CASC3": null,
"CLK_FEED_CK_BUFG_CASC30": null,
"CLK_FEED_CK_BUFG_CASC31": null,
"CLK_FEED_CK_BUFG_CASC4": null,
"CLK_FEED_CK_BUFG_CASC5": null,
"CLK_FEED_CK_BUFG_CASC6": null,
"CLK_FEED_CK_BUFG_CASC7": null,
"CLK_FEED_CK_BUFG_CASC8": null,
"CLK_FEED_CK_BUFG_CASC9": null,
"CLK_FEED_CK_GCLK0": null,
"CLK_FEED_CK_GCLK1": null,
"CLK_FEED_CK_GCLK2": null,
"CLK_FEED_CK_GCLK3": null,
"CLK_FEED_CK_GCLK4": null,
"CLK_FEED_CK_GCLK5": null,
"CLK_FEED_CK_GCLK6": null,
"CLK_FEED_CK_GCLK7": null,
"CLK_FEED_CK_GCLK8": null,
"CLK_FEED_CK_GCLK9": null,
"CLK_FEED_CK_GCLK10": null,
"CLK_FEED_CK_GCLK11": null,
"CLK_FEED_CK_GCLK12": null,
@ -47,7 +55,6 @@
"CLK_FEED_CK_GCLK17": null,
"CLK_FEED_CK_GCLK18": null,
"CLK_FEED_CK_GCLK19": null,
"CLK_FEED_CK_GCLK2": null,
"CLK_FEED_CK_GCLK20": null,
"CLK_FEED_CK_GCLK21": null,
"CLK_FEED_CK_GCLK22": null,
@ -58,15 +65,8 @@
"CLK_FEED_CK_GCLK27": null,
"CLK_FEED_CK_GCLK28": null,
"CLK_FEED_CK_GCLK29": null,
"CLK_FEED_CK_GCLK3": null,
"CLK_FEED_CK_GCLK30": null,
"CLK_FEED_CK_GCLK31": null,
"CLK_FEED_CK_GCLK4": null,
"CLK_FEED_CK_GCLK5": null,
"CLK_FEED_CK_GCLK6": null,
"CLK_FEED_CK_GCLK7": null,
"CLK_FEED_CK_GCLK8": null,
"CLK_FEED_CK_GCLK9": null,
"CLK_FEED_EE2A0": null,
"CLK_FEED_EE2A1": null,
"CLK_FEED_EE2A2": null,
@ -100,9 +100,6 @@
"CLK_FEED_ER1BEG2": null,
"CLK_FEED_ER1BEG3": null,
"CLK_FEED_LH1": null,
"CLK_FEED_LH10": null,
"CLK_FEED_LH11": null,
"CLK_FEED_LH12": null,
"CLK_FEED_LH2": null,
"CLK_FEED_LH3": null,
"CLK_FEED_LH4": null,
@ -111,6 +108,9 @@
"CLK_FEED_LH7": null,
"CLK_FEED_LH8": null,
"CLK_FEED_LH9": null,
"CLK_FEED_LH10": null,
"CLK_FEED_LH11": null,
"CLK_FEED_LH12": null,
"CLK_FEED_MONITOR_N": null,
"CLK_FEED_MONITOR_P": null,
"CLK_FEED_NE2A0": null,
@ -139,6 +139,14 @@
"CLK_FEED_NW4END3": null,
"CLK_FEED_R_CK_BUFG_CASC0": null,
"CLK_FEED_R_CK_BUFG_CASC1": null,
"CLK_FEED_R_CK_BUFG_CASC2": null,
"CLK_FEED_R_CK_BUFG_CASC3": null,
"CLK_FEED_R_CK_BUFG_CASC4": null,
"CLK_FEED_R_CK_BUFG_CASC5": null,
"CLK_FEED_R_CK_BUFG_CASC6": null,
"CLK_FEED_R_CK_BUFG_CASC7": null,
"CLK_FEED_R_CK_BUFG_CASC8": null,
"CLK_FEED_R_CK_BUFG_CASC9": null,
"CLK_FEED_R_CK_BUFG_CASC10": null,
"CLK_FEED_R_CK_BUFG_CASC11": null,
"CLK_FEED_R_CK_BUFG_CASC12": null,
@ -149,7 +157,6 @@
"CLK_FEED_R_CK_BUFG_CASC17": null,
"CLK_FEED_R_CK_BUFG_CASC18": null,
"CLK_FEED_R_CK_BUFG_CASC19": null,
"CLK_FEED_R_CK_BUFG_CASC2": null,
"CLK_FEED_R_CK_BUFG_CASC20": null,
"CLK_FEED_R_CK_BUFG_CASC21": null,
"CLK_FEED_R_CK_BUFG_CASC22": null,
@ -160,17 +167,18 @@
"CLK_FEED_R_CK_BUFG_CASC27": null,
"CLK_FEED_R_CK_BUFG_CASC28": null,
"CLK_FEED_R_CK_BUFG_CASC29": null,
"CLK_FEED_R_CK_BUFG_CASC3": null,
"CLK_FEED_R_CK_BUFG_CASC30": null,
"CLK_FEED_R_CK_BUFG_CASC31": null,
"CLK_FEED_R_CK_BUFG_CASC4": null,
"CLK_FEED_R_CK_BUFG_CASC5": null,
"CLK_FEED_R_CK_BUFG_CASC6": null,
"CLK_FEED_R_CK_BUFG_CASC7": null,
"CLK_FEED_R_CK_BUFG_CASC8": null,
"CLK_FEED_R_CK_BUFG_CASC9": null,
"CLK_FEED_R_CK_GCLK0": null,
"CLK_FEED_R_CK_GCLK1": null,
"CLK_FEED_R_CK_GCLK2": null,
"CLK_FEED_R_CK_GCLK3": null,
"CLK_FEED_R_CK_GCLK4": null,
"CLK_FEED_R_CK_GCLK5": null,
"CLK_FEED_R_CK_GCLK6": null,
"CLK_FEED_R_CK_GCLK7": null,
"CLK_FEED_R_CK_GCLK8": null,
"CLK_FEED_R_CK_GCLK9": null,
"CLK_FEED_R_CK_GCLK10": null,
"CLK_FEED_R_CK_GCLK11": null,
"CLK_FEED_R_CK_GCLK12": null,
@ -181,7 +189,6 @@
"CLK_FEED_R_CK_GCLK17": null,
"CLK_FEED_R_CK_GCLK18": null,
"CLK_FEED_R_CK_GCLK19": null,
"CLK_FEED_R_CK_GCLK2": null,
"CLK_FEED_R_CK_GCLK20": null,
"CLK_FEED_R_CK_GCLK21": null,
"CLK_FEED_R_CK_GCLK22": null,
@ -192,15 +199,8 @@
"CLK_FEED_R_CK_GCLK27": null,
"CLK_FEED_R_CK_GCLK28": null,
"CLK_FEED_R_CK_GCLK29": null,
"CLK_FEED_R_CK_GCLK3": null,
"CLK_FEED_R_CK_GCLK30": null,
"CLK_FEED_R_CK_GCLK31": null,
"CLK_FEED_R_CK_GCLK4": null,
"CLK_FEED_R_CK_GCLK5": null,
"CLK_FEED_R_CK_GCLK6": null,
"CLK_FEED_R_CK_GCLK7": null,
"CLK_FEED_R_CK_GCLK8": null,
"CLK_FEED_R_CK_GCLK9": null,
"CLK_FEED_SE2A0": null,
"CLK_FEED_SE2A1": null,
"CLK_FEED_SE2A2": null,

77310
artix7/tile_type_CLK_HROW_BOT_R.json
View File

File diff suppressed because it is too large Load Diff

76894
artix7/tile_type_CLK_HROW_TOP_R.json
View File

File diff suppressed because it is too large Load Diff

108
artix7/tile_type_CLK_MTBF2.json
View File

@ -5,6 +5,14 @@
"wires": {
"CLK_FEED_CK_BUFG_CASC0": null,
"CLK_FEED_CK_BUFG_CASC1": null,
"CLK_FEED_CK_BUFG_CASC2": null,
"CLK_FEED_CK_BUFG_CASC3": null,
"CLK_FEED_CK_BUFG_CASC4": null,
"CLK_FEED_CK_BUFG_CASC5": null,
"CLK_FEED_CK_BUFG_CASC6": null,
"CLK_FEED_CK_BUFG_CASC7": null,
"CLK_FEED_CK_BUFG_CASC8": null,
"CLK_FEED_CK_BUFG_CASC9": null,
"CLK_FEED_CK_BUFG_CASC10": null,
"CLK_FEED_CK_BUFG_CASC11": null,
"CLK_FEED_CK_BUFG_CASC12": null,
@ -15,7 +23,6 @@
"CLK_FEED_CK_BUFG_CASC17": null,
"CLK_FEED_CK_BUFG_CASC18": null,
"CLK_FEED_CK_BUFG_CASC19": null,
"CLK_FEED_CK_BUFG_CASC2": null,
"CLK_FEED_CK_BUFG_CASC20": null,
"CLK_FEED_CK_BUFG_CASC21": null,
"CLK_FEED_CK_BUFG_CASC22": null,
@ -26,17 +33,18 @@
"CLK_FEED_CK_BUFG_CASC27": null,
"CLK_FEED_CK_BUFG_CASC28": null,
"CLK_FEED_CK_BUFG_CASC29": null,
"CLK_FEED_CK_BUFG_CASC3": null,
"CLK_FEED_CK_BUFG_CASC30": null,
"CLK_FEED_CK_BUFG_CASC31": null,
"CLK_FEED_CK_BUFG_CASC4": null,
"CLK_FEED_CK_BUFG_CASC5": null,
"CLK_FEED_CK_BUFG_CASC6": null,
"CLK_FEED_CK_BUFG_CASC7": null,
"CLK_FEED_CK_BUFG_CASC8": null,
"CLK_FEED_CK_BUFG_CASC9": null,
"CLK_FEED_CK_GCLK0": null,
"CLK_FEED_CK_GCLK1": null,
"CLK_FEED_CK_GCLK2": null,
"CLK_FEED_CK_GCLK3": null,
"CLK_FEED_CK_GCLK4": null,
"CLK_FEED_CK_GCLK5": null,
"CLK_FEED_CK_GCLK6": null,
"CLK_FEED_CK_GCLK7": null,
"CLK_FEED_CK_GCLK8": null,
"CLK_FEED_CK_GCLK9": null,
"CLK_FEED_CK_GCLK10": null,
"CLK_FEED_CK_GCLK11": null,
"CLK_FEED_CK_GCLK12": null,
@ -47,7 +55,6 @@
"CLK_FEED_CK_GCLK17": null,
"CLK_FEED_CK_GCLK18": null,
"CLK_FEED_CK_GCLK19": null,
"CLK_FEED_CK_GCLK2": null,
"CLK_FEED_CK_GCLK20": null,
"CLK_FEED_CK_GCLK21": null,
"CLK_FEED_CK_GCLK22": null,
@ -58,15 +65,8 @@
"CLK_FEED_CK_GCLK27": null,
"CLK_FEED_CK_GCLK28": null,
"CLK_FEED_CK_GCLK29": null,
"CLK_FEED_CK_GCLK3": null,
"CLK_FEED_CK_GCLK30": null,
"CLK_FEED_CK_GCLK31": null,
"CLK_FEED_CK_GCLK4": null,
"CLK_FEED_CK_GCLK5": null,
"CLK_FEED_CK_GCLK6": null,
"CLK_FEED_CK_GCLK7": null,
"CLK_FEED_CK_GCLK8": null,
"CLK_FEED_CK_GCLK9": null,
"CLK_FEED_EE2A0": null,
"CLK_FEED_EE2A1": null,
"CLK_FEED_EE2A2": null,
@ -100,9 +100,6 @@
"CLK_FEED_ER1BEG2": null,
"CLK_FEED_ER1BEG3": null,
"CLK_FEED_LH1": null,
"CLK_FEED_LH10": null,
"CLK_FEED_LH11": null,
"CLK_FEED_LH12": null,
"CLK_FEED_LH2": null,
"CLK_FEED_LH3": null,
"CLK_FEED_LH4": null,
@ -111,6 +108,9 @@
"CLK_FEED_LH7": null,
"CLK_FEED_LH8": null,
"CLK_FEED_LH9": null,
"CLK_FEED_LH10": null,
"CLK_FEED_LH11": null,
"CLK_FEED_LH12": null,
"CLK_FEED_MONITOR_N": null,
"CLK_FEED_MONITOR_P": null,
"CLK_FEED_NE2A0": null,
@ -139,6 +139,14 @@
"CLK_FEED_NW4END3": null,
"CLK_FEED_R_CK_BUFG_CASC0": null,
"CLK_FEED_R_CK_BUFG_CASC1": null,
"CLK_FEED_R_CK_BUFG_CASC2": null,
"CLK_FEED_R_CK_BUFG_CASC3": null,
"CLK_FEED_R_CK_BUFG_CASC4": null,
"CLK_FEED_R_CK_BUFG_CASC5": null,
"CLK_FEED_R_CK_BUFG_CASC6": null,
"CLK_FEED_R_CK_BUFG_CASC7": null,
"CLK_FEED_R_CK_BUFG_CASC8": null,
"CLK_FEED_R_CK_BUFG_CASC9": null,
"CLK_FEED_R_CK_BUFG_CASC10": null,
"CLK_FEED_R_CK_BUFG_CASC11": null,
"CLK_FEED_R_CK_BUFG_CASC12": null,
@ -149,7 +157,6 @@
"CLK_FEED_R_CK_BUFG_CASC17": null,
"CLK_FEED_R_CK_BUFG_CASC18": null,
"CLK_FEED_R_CK_BUFG_CASC19": null,
"CLK_FEED_R_CK_BUFG_CASC2": null,
"CLK_FEED_R_CK_BUFG_CASC20": null,
"CLK_FEED_R_CK_BUFG_CASC21": null,
"CLK_FEED_R_CK_BUFG_CASC22": null,
@ -160,17 +167,18 @@
"CLK_FEED_R_CK_BUFG_CASC27": null,
"CLK_FEED_R_CK_BUFG_CASC28": null,
"CLK_FEED_R_CK_BUFG_CASC29": null,
"CLK_FEED_R_CK_BUFG_CASC3": null,
"CLK_FEED_R_CK_BUFG_CASC30": null,
"CLK_FEED_R_CK_BUFG_CASC31": null,
"CLK_FEED_R_CK_BUFG_CASC4": null,
"CLK_FEED_R_CK_BUFG_CASC5": null,
"CLK_FEED_R_CK_BUFG_CASC6": null,
"CLK_FEED_R_CK_BUFG_CASC7": null,
"CLK_FEED_R_CK_BUFG_CASC8": null,
"CLK_FEED_R_CK_BUFG_CASC9": null,
"CLK_FEED_R_CK_GCLK0": null,
"CLK_FEED_R_CK_GCLK1": null,
"CLK_FEED_R_CK_GCLK2": null,
"CLK_FEED_R_CK_GCLK3": null,
"CLK_FEED_R_CK_GCLK4": null,
"CLK_FEED_R_CK_GCLK5": null,
"CLK_FEED_R_CK_GCLK6": null,
"CLK_FEED_R_CK_GCLK7": null,
"CLK_FEED_R_CK_GCLK8": null,
"CLK_FEED_R_CK_GCLK9": null,
"CLK_FEED_R_CK_GCLK10": null,
"CLK_FEED_R_CK_GCLK11": null,
"CLK_FEED_R_CK_GCLK12": null,
@ -181,7 +189,6 @@
"CLK_FEED_R_CK_GCLK17": null,
"CLK_FEED_R_CK_GCLK18": null,
"CLK_FEED_R_CK_GCLK19": null,
"CLK_FEED_R_CK_GCLK2": null,
"CLK_FEED_R_CK_GCLK20": null,
"CLK_FEED_R_CK_GCLK21": null,
"CLK_FEED_R_CK_GCLK22": null,
@ -192,15 +199,8 @@
"CLK_FEED_R_CK_GCLK27": null,
"CLK_FEED_R_CK_GCLK28": null,
"CLK_FEED_R_CK_GCLK29": null,
"CLK_FEED_R_CK_GCLK3": null,
"CLK_FEED_R_CK_GCLK30": null,
"CLK_FEED_R_CK_GCLK31": null,
"CLK_FEED_R_CK_GCLK4": null,
"CLK_FEED_R_CK_GCLK5": null,
"CLK_FEED_R_CK_GCLK6": null,
"CLK_FEED_R_CK_GCLK7": null,
"CLK_FEED_R_CK_GCLK8": null,
"CLK_FEED_R_CK_GCLK9": null,
"CLK_FEED_SE2A0": null,
"CLK_FEED_SE2A1": null,
"CLK_FEED_SE2A2": null,
@ -290,6 +290,15 @@
"CLK_PMV_FAN6_0": null,
"CLK_PMV_FAN7_0": null,
"CLK_PMV_IMUX0_0": null,
"CLK_PMV_IMUX1_0": null,
"CLK_PMV_IMUX2_0": null,
"CLK_PMV_IMUX3_0": null,
"CLK_PMV_IMUX4_0": null,
"CLK_PMV_IMUX5_0": null,
"CLK_PMV_IMUX6_0": null,
"CLK_PMV_IMUX7_0": null,
"CLK_PMV_IMUX8_0": null,
"CLK_PMV_IMUX9_0": null,
"CLK_PMV_IMUX10_0": null,
"CLK_PMV_IMUX11_0": null,
"CLK_PMV_IMUX12_0": null,
@ -300,7 +309,6 @@
"CLK_PMV_IMUX17_0": null,
"CLK_PMV_IMUX18_0": null,
"CLK_PMV_IMUX19_0": null,
"CLK_PMV_IMUX1_0": null,
"CLK_PMV_IMUX20_0": null,
"CLK_PMV_IMUX21_0": null,
"CLK_PMV_IMUX22_0": null,
@ -311,7 +319,6 @@
"CLK_PMV_IMUX27_0": null,
"CLK_PMV_IMUX28_0": null,
"CLK_PMV_IMUX29_0": null,
"CLK_PMV_IMUX2_0": null,
"CLK_PMV_IMUX30_0": null,
"CLK_PMV_IMUX31_0": null,
"CLK_PMV_IMUX32_0": null,
@ -322,7 +329,6 @@
"CLK_PMV_IMUX37_0": null,
"CLK_PMV_IMUX38_0": null,
"CLK_PMV_IMUX39_0": null,
"CLK_PMV_IMUX3_0": null,
"CLK_PMV_IMUX40_0": null,
"CLK_PMV_IMUX41_0": null,
"CLK_PMV_IMUX42_0": null,
@ -331,13 +337,16 @@
"CLK_PMV_IMUX45_0": null,
"CLK_PMV_IMUX46_0": null,
"CLK_PMV_IMUX47_0": null,
"CLK_PMV_IMUX4_0": null,
"CLK_PMV_IMUX5_0": null,
"CLK_PMV_IMUX6_0": null,
"CLK_PMV_IMUX7_0": null,
"CLK_PMV_IMUX8_0": null,
"CLK_PMV_IMUX9_0": null,
"CLK_PMV_LOGIC_OUTS0_0": null,
"CLK_PMV_LOGIC_OUTS1_0": null,
"CLK_PMV_LOGIC_OUTS2_0": null,
"CLK_PMV_LOGIC_OUTS3_0": null,
"CLK_PMV_LOGIC_OUTS4_0": null,
"CLK_PMV_LOGIC_OUTS5_0": null,
"CLK_PMV_LOGIC_OUTS6_0": null,
"CLK_PMV_LOGIC_OUTS7_0": null,
"CLK_PMV_LOGIC_OUTS8_0": null,
"CLK_PMV_LOGIC_OUTS9_0": null,
"CLK_PMV_LOGIC_OUTS10_0": null,
"CLK_PMV_LOGIC_OUTS11_0": null,
"CLK_PMV_LOGIC_OUTS12_0": null,
@ -348,18 +357,9 @@
"CLK_PMV_LOGIC_OUTS17_0": null,
"CLK_PMV_LOGIC_OUTS18_0": null,
"CLK_PMV_LOGIC_OUTS19_0": null,
"CLK_PMV_LOGIC_OUTS1_0": null,
"CLK_PMV_LOGIC_OUTS20_0": null,
"CLK_PMV_LOGIC_OUTS21_0": null,
"CLK_PMV_LOGIC_OUTS22_0": null,
"CLK_PMV_LOGIC_OUTS23_0": null,
"CLK_PMV_LOGIC_OUTS2_0": null,
"CLK_PMV_LOGIC_OUTS3_0": null,
"CLK_PMV_LOGIC_OUTS4_0": null,
"CLK_PMV_LOGIC_OUTS5_0": null,
"CLK_PMV_LOGIC_OUTS6_0": null,
"CLK_PMV_LOGIC_OUTS7_0": null,
"CLK_PMV_LOGIC_OUTS8_0": null,
"CLK_PMV_LOGIC_OUTS9_0": null
"CLK_PMV_LOGIC_OUTS23_0": null
}
}

358
artix7/tile_type_CLK_PMV.json
View File

@ -67,6 +67,14 @@
"CLK_PMV_BYP7_6": null,
"CLK_PMV_CK_BUFG_CASC0": null,
"CLK_PMV_CK_BUFG_CASC1": null,
"CLK_PMV_CK_BUFG_CASC2": null,
"CLK_PMV_CK_BUFG_CASC3": null,
"CLK_PMV_CK_BUFG_CASC4": null,
"CLK_PMV_CK_BUFG_CASC5": null,
"CLK_PMV_CK_BUFG_CASC6": null,
"CLK_PMV_CK_BUFG_CASC7": null,
"CLK_PMV_CK_BUFG_CASC8": null,
"CLK_PMV_CK_BUFG_CASC9": null,
"CLK_PMV_CK_BUFG_CASC10": null,
"CLK_PMV_CK_BUFG_CASC11": null,
"CLK_PMV_CK_BUFG_CASC12": null,
@ -77,7 +85,6 @@
"CLK_PMV_CK_BUFG_CASC17": null,
"CLK_PMV_CK_BUFG_CASC18": null,
"CLK_PMV_CK_BUFG_CASC19": null,
"CLK_PMV_CK_BUFG_CASC2": null,
"CLK_PMV_CK_BUFG_CASC20": null,
"CLK_PMV_CK_BUFG_CASC21": null,
"CLK_PMV_CK_BUFG_CASC22": null,
@ -88,17 +95,18 @@
"CLK_PMV_CK_BUFG_CASC27": null,
"CLK_PMV_CK_BUFG_CASC28": null,
"CLK_PMV_CK_BUFG_CASC29": null,
"CLK_PMV_CK_BUFG_CASC3": null,
"CLK_PMV_CK_BUFG_CASC30": null,
"CLK_PMV_CK_BUFG_CASC31": null,
"CLK_PMV_CK_BUFG_CASC4": null,
"CLK_PMV_CK_BUFG_CASC5": null,
"CLK_PMV_CK_BUFG_CASC6": null,
"CLK_PMV_CK_BUFG_CASC7": null,
"CLK_PMV_CK_BUFG_CASC8": null,
"CLK_PMV_CK_BUFG_CASC9": null,
"CLK_PMV_CK_GCLK0": null,
"CLK_PMV_CK_GCLK1": null,
"CLK_PMV_CK_GCLK2": null,
"CLK_PMV_CK_GCLK3": null,
"CLK_PMV_CK_GCLK4": null,
"CLK_PMV_CK_GCLK5": null,
"CLK_PMV_CK_GCLK6": null,
"CLK_PMV_CK_GCLK7": null,
"CLK_PMV_CK_GCLK8": null,
"CLK_PMV_CK_GCLK9": null,
"CLK_PMV_CK_GCLK10": null,
"CLK_PMV_CK_GCLK11": null,
"CLK_PMV_CK_GCLK12": null,
@ -109,7 +117,6 @@
"CLK_PMV_CK_GCLK17": null,
"CLK_PMV_CK_GCLK18": null,
"CLK_PMV_CK_GCLK19": null,
"CLK_PMV_CK_GCLK2": null,
"CLK_PMV_CK_GCLK20": null,
"CLK_PMV_CK_GCLK21": null,
"CLK_PMV_CK_GCLK22": null,
@ -120,15 +127,8 @@
"CLK_PMV_CK_GCLK27": null,
"CLK_PMV_CK_GCLK28": null,
"CLK_PMV_CK_GCLK29": null,
"CLK_PMV_CK_GCLK3": null,
"CLK_PMV_CK_GCLK30": null,
"CLK_PMV_CK_GCLK31": null,
"CLK_PMV_CK_GCLK4": null,
"CLK_PMV_CK_GCLK5": null,
"CLK_PMV_CK_GCLK6": null,
"CLK_PMV_CK_GCLK7": null,
"CLK_PMV_CK_GCLK8": null,
"CLK_PMV_CK_GCLK9": null,
"CLK_PMV_CLK0_0": null,
"CLK_PMV_CLK0_1": null,
"CLK_PMV_CLK0_2": null,
@ -445,6 +445,69 @@
"CLK_PMV_IMUX0_4": null,
"CLK_PMV_IMUX0_5": null,
"CLK_PMV_IMUX0_6": null,
"CLK_PMV_IMUX1_0": null,
"CLK_PMV_IMUX1_1": null,
"CLK_PMV_IMUX1_2": null,
"CLK_PMV_IMUX1_3": null,
"CLK_PMV_IMUX1_4": null,
"CLK_PMV_IMUX1_5": null,
"CLK_PMV_IMUX1_6": null,
"CLK_PMV_IMUX2_0": null,
"CLK_PMV_IMUX2_1": null,
"CLK_PMV_IMUX2_2": null,
"CLK_PMV_IMUX2_3": null,
"CLK_PMV_IMUX2_4": null,
"CLK_PMV_IMUX2_5": null,
"CLK_PMV_IMUX2_6": null,
"CLK_PMV_IMUX3_0": null,
"CLK_PMV_IMUX3_1": null,
"CLK_PMV_IMUX3_2": null,
"CLK_PMV_IMUX3_3": null,
"CLK_PMV_IMUX3_4": null,
"CLK_PMV_IMUX3_5": null,
"CLK_PMV_IMUX3_6": null,
"CLK_PMV_IMUX4_0": null,
"CLK_PMV_IMUX4_1": null,
"CLK_PMV_IMUX4_2": null,
"CLK_PMV_IMUX4_3": null,
"CLK_PMV_IMUX4_4": null,
"CLK_PMV_IMUX4_5": null,
"CLK_PMV_IMUX4_6": null,
"CLK_PMV_IMUX5_0": null,
"CLK_PMV_IMUX5_1": null,
"CLK_PMV_IMUX5_2": null,
"CLK_PMV_IMUX5_3": null,
"CLK_PMV_IMUX5_4": null,
"CLK_PMV_IMUX5_5": null,
"CLK_PMV_IMUX5_6": null,
"CLK_PMV_IMUX6_0": null,
"CLK_PMV_IMUX6_1": null,
"CLK_PMV_IMUX6_2": null,
"CLK_PMV_IMUX6_3": null,
"CLK_PMV_IMUX6_4": null,
"CLK_PMV_IMUX6_5": null,
"CLK_PMV_IMUX6_6": null,
"CLK_PMV_IMUX7_0": null,
"CLK_PMV_IMUX7_1": null,
"CLK_PMV_IMUX7_2": null,
"CLK_PMV_IMUX7_3": null,
"CLK_PMV_IMUX7_4": null,
"CLK_PMV_IMUX7_5": null,
"CLK_PMV_IMUX7_6": null,
"CLK_PMV_IMUX8_0": null,
"CLK_PMV_IMUX8_1": null,
"CLK_PMV_IMUX8_2": null,
"CLK_PMV_IMUX8_3": null,
"CLK_PMV_IMUX8_4": null,
"CLK_PMV_IMUX8_5": null,
"CLK_PMV_IMUX8_6": null,
"CLK_PMV_IMUX9_0": null,
"CLK_PMV_IMUX9_1": null,
"CLK_PMV_IMUX9_2": null,
"CLK_PMV_IMUX9_3": null,
"CLK_PMV_IMUX9_4": null,
"CLK_PMV_IMUX9_5": null,
"CLK_PMV_IMUX9_6": null,
"CLK_PMV_IMUX10_0": null,
"CLK_PMV_IMUX10_1": null,
"CLK_PMV_IMUX10_2": null,
@ -515,13 +578,6 @@
"CLK_PMV_IMUX19_4": null,
"CLK_PMV_IMUX19_5": null,
"CLK_PMV_IMUX19_6": null,
"CLK_PMV_IMUX1_0": null,
"CLK_PMV_IMUX1_1": null,
"CLK_PMV_IMUX1_2": null,
"CLK_PMV_IMUX1_3": null,
"CLK_PMV_IMUX1_4": null,
"CLK_PMV_IMUX1_5": null,
"CLK_PMV_IMUX1_6": null,
"CLK_PMV_IMUX20_0": null,
"CLK_PMV_IMUX20_1": null,
"CLK_PMV_IMUX20_2": null,
@ -592,13 +648,6 @@
"CLK_PMV_IMUX29_4": null,
"CLK_PMV_IMUX29_5": null,
"CLK_PMV_IMUX29_6": null,
"CLK_PMV_IMUX2_0": null,
"CLK_PMV_IMUX2_1": null,
"CLK_PMV_IMUX2_2": null,
"CLK_PMV_IMUX2_3": null,
"CLK_PMV_IMUX2_4": null,
"CLK_PMV_IMUX2_5": null,
"CLK_PMV_IMUX2_6": null,
"CLK_PMV_IMUX30_0": null,
"CLK_PMV_IMUX30_1": null,
"CLK_PMV_IMUX30_2": null,
@ -669,13 +718,6 @@
"CLK_PMV_IMUX39_4": null,
"CLK_PMV_IMUX39_5": null,
"CLK_PMV_IMUX39_6": null,
"CLK_PMV_IMUX3_0": null,
"CLK_PMV_IMUX3_1": null,
"CLK_PMV_IMUX3_2": null,
"CLK_PMV_IMUX3_3": null,
"CLK_PMV_IMUX3_4": null,
"CLK_PMV_IMUX3_5": null,
"CLK_PMV_IMUX3_6": null,
"CLK_PMV_IMUX40_0": null,
"CLK_PMV_IMUX40_1": null,
"CLK_PMV_IMUX40_2": null,
@ -732,69 +774,6 @@
"CLK_PMV_IMUX47_4": null,
"CLK_PMV_IMUX47_5": null,
"CLK_PMV_IMUX47_6": null,
"CLK_PMV_IMUX4_0": null,
"CLK_PMV_IMUX4_1": null,
"CLK_PMV_IMUX4_2": null,
"CLK_PMV_IMUX4_3": null,
"CLK_PMV_IMUX4_4": null,
"CLK_PMV_IMUX4_5": null,
"CLK_PMV_IMUX4_6": null,
"CLK_PMV_IMUX5_0": null,
"CLK_PMV_IMUX5_1": null,
"CLK_PMV_IMUX5_2": null,
"CLK_PMV_IMUX5_3": null,
"CLK_PMV_IMUX5_4": null,
"CLK_PMV_IMUX5_5": null,
"CLK_PMV_IMUX5_6": null,
"CLK_PMV_IMUX6_0": null,
"CLK_PMV_IMUX6_1": null,
"CLK_PMV_IMUX6_2": null,
"CLK_PMV_IMUX6_3": null,
"CLK_PMV_IMUX6_4": null,
"CLK_PMV_IMUX6_5": null,
"CLK_PMV_IMUX6_6": null,
"CLK_PMV_IMUX7_0": null,
"CLK_PMV_IMUX7_1": null,
"CLK_PMV_IMUX7_2": null,
"CLK_PMV_IMUX7_3": null,
"CLK_PMV_IMUX7_4": null,
"CLK_PMV_IMUX7_5": null,
"CLK_PMV_IMUX7_6": null,
"CLK_PMV_IMUX8_0": null,
"CLK_PMV_IMUX8_1": null,
"CLK_PMV_IMUX8_2": null,
"CLK_PMV_IMUX8_3": null,
"CLK_PMV_IMUX8_4": null,
"CLK_PMV_IMUX8_5": null,
"CLK_PMV_IMUX8_6": null,
"CLK_PMV_IMUX9_0": null,
"CLK_PMV_IMUX9_1": null,
"CLK_PMV_IMUX9_2": null,
"CLK_PMV_IMUX9_3": null,
"CLK_PMV_IMUX9_4": null,
"CLK_PMV_IMUX9_5": null,
"CLK_PMV_IMUX9_6": null,
"CLK_PMV_LH10_0": null,
"CLK_PMV_LH10_1": null,
"CLK_PMV_LH10_2": null,
"CLK_PMV_LH10_3": null,
"CLK_PMV_LH10_4": null,
"CLK_PMV_LH10_5": null,
"CLK_PMV_LH10_6": null,
"CLK_PMV_LH11_0": null,
"CLK_PMV_LH11_1": null,
"CLK_PMV_LH11_2": null,
"CLK_PMV_LH11_3": null,
"CLK_PMV_LH11_4": null,
"CLK_PMV_LH11_5": null,
"CLK_PMV_LH11_6": null,
"CLK_PMV_LH12_0": null,
"CLK_PMV_LH12_1": null,
"CLK_PMV_LH12_2": null,
"CLK_PMV_LH12_3": null,
"CLK_PMV_LH12_4": null,
"CLK_PMV_LH12_5": null,
"CLK_PMV_LH12_6": null,
"CLK_PMV_LH1_0": null,
"CLK_PMV_LH1_1": null,
"CLK_PMV_LH1_2": null,
@ -858,6 +837,27 @@
"CLK_PMV_LH9_4": null,
"CLK_PMV_LH9_5": null,
"CLK_PMV_LH9_6": null,
"CLK_PMV_LH10_0": null,
"CLK_PMV_LH10_1": null,
"CLK_PMV_LH10_2": null,
"CLK_PMV_LH10_3": null,
"CLK_PMV_LH10_4": null,
"CLK_PMV_LH10_5": null,
"CLK_PMV_LH10_6": null,
"CLK_PMV_LH11_0": null,
"CLK_PMV_LH11_1": null,
"CLK_PMV_LH11_2": null,
"CLK_PMV_LH11_3": null,
"CLK_PMV_LH11_4": null,
"CLK_PMV_LH11_5": null,
"CLK_PMV_LH11_6": null,
"CLK_PMV_LH12_0": null,
"CLK_PMV_LH12_1": null,
"CLK_PMV_LH12_2": null,
"CLK_PMV_LH12_3": null,
"CLK_PMV_LH12_4": null,
"CLK_PMV_LH12_5": null,
"CLK_PMV_LH12_6": null,
"CLK_PMV_LOGIC_OUTS0_0": null,
"CLK_PMV_LOGIC_OUTS0_1": null,
"CLK_PMV_LOGIC_OUTS0_2": null,
@ -865,6 +865,69 @@
"CLK_PMV_LOGIC_OUTS0_4": null,
"CLK_PMV_LOGIC_OUTS0_5": null,
"CLK_PMV_LOGIC_OUTS0_6": null,
"CLK_PMV_LOGIC_OUTS1_0": null,
"CLK_PMV_LOGIC_OUTS1_1": null,
"CLK_PMV_LOGIC_OUTS1_2": null,
"CLK_PMV_LOGIC_OUTS1_3": null,
"CLK_PMV_LOGIC_OUTS1_4": null,
"CLK_PMV_LOGIC_OUTS1_5": null,
"CLK_PMV_LOGIC_OUTS1_6": null,
"CLK_PMV_LOGIC_OUTS2_0": null,
"CLK_PMV_LOGIC_OUTS2_1": null,
"CLK_PMV_LOGIC_OUTS2_2": null,
"CLK_PMV_LOGIC_OUTS2_3": null,
"CLK_PMV_LOGIC_OUTS2_4": null,
"CLK_PMV_LOGIC_OUTS2_5": null,
"CLK_PMV_LOGIC_OUTS2_6": null,
"CLK_PMV_LOGIC_OUTS3_0": null,
"CLK_PMV_LOGIC_OUTS3_1": null,
"CLK_PMV_LOGIC_OUTS3_2": null,
"CLK_PMV_LOGIC_OUTS3_3": null,
"CLK_PMV_LOGIC_OUTS3_4": null,
"CLK_PMV_LOGIC_OUTS3_5": null,
"CLK_PMV_LOGIC_OUTS3_6": null,
"CLK_PMV_LOGIC_OUTS4_0": null,
"CLK_PMV_LOGIC_OUTS4_1": null,
"CLK_PMV_LOGIC_OUTS4_2": null,
"CLK_PMV_LOGIC_OUTS4_3": null,
"CLK_PMV_LOGIC_OUTS4_4": null,
"CLK_PMV_LOGIC_OUTS4_5": null,
"CLK_PMV_LOGIC_OUTS4_6": null,
"CLK_PMV_LOGIC_OUTS5_0": null,
"CLK_PMV_LOGIC_OUTS5_1": null,
"CLK_PMV_LOGIC_OUTS5_2": null,
"CLK_PMV_LOGIC_OUTS5_3": null,
"CLK_PMV_LOGIC_OUTS5_4": null,
"CLK_PMV_LOGIC_OUTS5_5": null,
"CLK_PMV_LOGIC_OUTS5_6": null,
"CLK_PMV_LOGIC_OUTS6_0": null,
"CLK_PMV_LOGIC_OUTS6_1": null,
"CLK_PMV_LOGIC_OUTS6_2": null,
"CLK_PMV_LOGIC_OUTS6_3": null,
"CLK_PMV_LOGIC_OUTS6_4": null,
"CLK_PMV_LOGIC_OUTS6_5": null,
"CLK_PMV_LOGIC_OUTS6_6": null,
"CLK_PMV_LOGIC_OUTS7_0": null,
"CLK_PMV_LOGIC_OUTS7_1": null,
"CLK_PMV_LOGIC_OUTS7_2": null,
"CLK_PMV_LOGIC_OUTS7_3": null,
"CLK_PMV_LOGIC_OUTS7_4": null,
"CLK_PMV_LOGIC_OUTS7_5": null,
"CLK_PMV_LOGIC_OUTS7_6": null,
"CLK_PMV_LOGIC_OUTS8_0": null,
"CLK_PMV_LOGIC_OUTS8_1": null,
"CLK_PMV_LOGIC_OUTS8_2": null,
"CLK_PMV_LOGIC_OUTS8_3": null,
"CLK_PMV_LOGIC_OUTS8_4": null,
"CLK_PMV_LOGIC_OUTS8_5": null,
"CLK_PMV_LOGIC_OUTS8_6": null,
"CLK_PMV_LOGIC_OUTS9_0": null,
"CLK_PMV_LOGIC_OUTS9_1": null,
"CLK_PMV_LOGIC_OUTS9_2": null,
"CLK_PMV_LOGIC_OUTS9_3": null,
"CLK_PMV_LOGIC_OUTS9_4": null,
"CLK_PMV_LOGIC_OUTS9_5": null,
"CLK_PMV_LOGIC_OUTS9_6": null,
"CLK_PMV_LOGIC_OUTS10_0": null,
"CLK_PMV_LOGIC_OUTS10_1": null,
"CLK_PMV_LOGIC_OUTS10_2": null,
@ -935,13 +998,6 @@
"CLK_PMV_LOGIC_OUTS19_4": null,
"CLK_PMV_LOGIC_OUTS19_5": null,
"CLK_PMV_LOGIC_OUTS19_6": null,
"CLK_PMV_LOGIC_OUTS1_0": null,
"CLK_PMV_LOGIC_OUTS1_1": null,
"CLK_PMV_LOGIC_OUTS1_2": null,
"CLK_PMV_LOGIC_OUTS1_3": null,
"CLK_PMV_LOGIC_OUTS1_4": null,
"CLK_PMV_LOGIC_OUTS1_5": null,
"CLK_PMV_LOGIC_OUTS1_6": null,
"CLK_PMV_LOGIC_OUTS20_0": null,
"CLK_PMV_LOGIC_OUTS20_1": null,
"CLK_PMV_LOGIC_OUTS20_2": null,
@ -970,62 +1026,6 @@
"CLK_PMV_LOGIC_OUTS23_4": null,
"CLK_PMV_LOGIC_OUTS23_5": null,
"CLK_PMV_LOGIC_OUTS23_6": null,
"CLK_PMV_LOGIC_OUTS2_0": null,
"CLK_PMV_LOGIC_OUTS2_1": null,
"CLK_PMV_LOGIC_OUTS2_2": null,
"CLK_PMV_LOGIC_OUTS2_3": null,
"CLK_PMV_LOGIC_OUTS2_4": null,
"CLK_PMV_LOGIC_OUTS2_5": null,
"CLK_PMV_LOGIC_OUTS2_6": null,
"CLK_PMV_LOGIC_OUTS3_0": null,
"CLK_PMV_LOGIC_OUTS3_1": null,
"CLK_PMV_LOGIC_OUTS3_2": null,
"CLK_PMV_LOGIC_OUTS3_3": null,
"CLK_PMV_LOGIC_OUTS3_4": null,
"CLK_PMV_LOGIC_OUTS3_5": null,
"CLK_PMV_LOGIC_OUTS3_6": null,
"CLK_PMV_LOGIC_OUTS4_0": null,
"CLK_PMV_LOGIC_OUTS4_1": null,
"CLK_PMV_LOGIC_OUTS4_2": null,
"CLK_PMV_LOGIC_OUTS4_3": null,
"CLK_PMV_LOGIC_OUTS4_4": null,
"CLK_PMV_LOGIC_OUTS4_5": null,
"CLK_PMV_LOGIC_OUTS4_6": null,
"CLK_PMV_LOGIC_OUTS5_0": null,
"CLK_PMV_LOGIC_OUTS5_1": null,
"CLK_PMV_LOGIC_OUTS5_2": null,
"CLK_PMV_LOGIC_OUTS5_3": null,
"CLK_PMV_LOGIC_OUTS5_4": null,
"CLK_PMV_LOGIC_OUTS5_5": null,
"CLK_PMV_LOGIC_OUTS5_6": null,
"CLK_PMV_LOGIC_OUTS6_0": null,
"CLK_PMV_LOGIC_OUTS6_1": null,
"CLK_PMV_LOGIC_OUTS6_2": null,
"CLK_PMV_LOGIC_OUTS6_3": null,
"CLK_PMV_LOGIC_OUTS6_4": null,
"CLK_PMV_LOGIC_OUTS6_5": null,
"CLK_PMV_LOGIC_OUTS6_6": null,
"CLK_PMV_LOGIC_OUTS7_0": null,
"CLK_PMV_LOGIC_OUTS7_1": null,
"CLK_PMV_LOGIC_OUTS7_2": null,
"CLK_PMV_LOGIC_OUTS7_3": null,
"CLK_PMV_LOGIC_OUTS7_4": null,
"CLK_PMV_LOGIC_OUTS7_5": null,
"CLK_PMV_LOGIC_OUTS7_6": null,
"CLK_PMV_LOGIC_OUTS8_0": null,
"CLK_PMV_LOGIC_OUTS8_1": null,
"CLK_PMV_LOGIC_OUTS8_2": null,
"CLK_PMV_LOGIC_OUTS8_3": null,
"CLK_PMV_LOGIC_OUTS8_4": null,
"CLK_PMV_LOGIC_OUTS8_5": null,
"CLK_PMV_LOGIC_OUTS8_6": null,
"CLK_PMV_LOGIC_OUTS9_0": null,
"CLK_PMV_LOGIC_OUTS9_1": null,
"CLK_PMV_LOGIC_OUTS9_2": null,
"CLK_PMV_LOGIC_OUTS9_3": null,
"CLK_PMV_LOGIC_OUTS9_4": null,
"CLK_PMV_LOGIC_OUTS9_5": null,
"CLK_PMV_LOGIC_OUTS9_6": null,
"CLK_PMV_MONITOR_N_0": null,
"CLK_PMV_MONITOR_N_1": null,
"CLK_PMV_MONITOR_N_2": null,
@ -1213,6 +1213,14 @@
"CLK_PMV_ODIV4": null,
"CLK_PMV_R_CK_BUFG_CASC0": null,
"CLK_PMV_R_CK_BUFG_CASC1": null,
"CLK_PMV_R_CK_BUFG_CASC2": null,
"CLK_PMV_R_CK_BUFG_CASC3": null,
"CLK_PMV_R_CK_BUFG_CASC4": null,
"CLK_PMV_R_CK_BUFG_CASC5": null,
"CLK_PMV_R_CK_BUFG_CASC6": null,
"CLK_PMV_R_CK_BUFG_CASC7": null,
"CLK_PMV_R_CK_BUFG_CASC8": null,
"CLK_PMV_R_CK_BUFG_CASC9": null,
"CLK_PMV_R_CK_BUFG_CASC10": null,
"CLK_PMV_R_CK_BUFG_CASC11": null,
"CLK_PMV_R_CK_BUFG_CASC12": null,
@ -1223,7 +1231,6 @@
"CLK_PMV_R_CK_BUFG_CASC17": null,
"CLK_PMV_R_CK_BUFG_CASC18": null,
"CLK_PMV_R_CK_BUFG_CASC19": null,
"CLK_PMV_R_CK_BUFG_CASC2": null,
"CLK_PMV_R_CK_BUFG_CASC20": null,
"CLK_PMV_R_CK_BUFG_CASC21": null,
"CLK_PMV_R_CK_BUFG_CASC22": null,
@ -1234,17 +1241,18 @@
"CLK_PMV_R_CK_BUFG_CASC27": null,
"CLK_PMV_R_CK_BUFG_CASC28": null,
"CLK_PMV_R_CK_BUFG_CASC29": null,
"CLK_PMV_R_CK_BUFG_CASC3": null,
"CLK_PMV_R_CK_BUFG_CASC30": null,
"CLK_PMV_R_CK_BUFG_CASC31": null,
"CLK_PMV_R_CK_BUFG_CASC4": null,
"CLK_PMV_R_CK_BUFG_CASC5": null,
"CLK_PMV_R_CK_BUFG_CASC6": null,
"CLK_PMV_R_CK_BUFG_CASC7": null,
"CLK_PMV_R_CK_BUFG_CASC8": null,
"CLK_PMV_R_CK_BUFG_CASC9": null,
"CLK_PMV_R_CK_GCLK0": null,
"CLK_PMV_R_CK_GCLK1": null,
"CLK_PMV_R_CK_GCLK2": null,
"CLK_PMV_R_CK_GCLK3": null,
"CLK_PMV_R_CK_GCLK4": null,
"CLK_PMV_R_CK_GCLK5": null,
"CLK_PMV_R_CK_GCLK6": null,
"CLK_PMV_R_CK_GCLK7": null,
"CLK_PMV_R_CK_GCLK8": null,
"CLK_PMV_R_CK_GCLK9": null,
"CLK_PMV_R_CK_GCLK10": null,
"CLK_PMV_R_CK_GCLK11": null,
"CLK_PMV_R_CK_GCLK12": null,
@ -1255,7 +1263,6 @@
"CLK_PMV_R_CK_GCLK17": null,
"CLK_PMV_R_CK_GCLK18": null,
"CLK_PMV_R_CK_GCLK19": null,
"CLK_PMV_R_CK_GCLK2": null,
"CLK_PMV_R_CK_GCLK20": null,
"CLK_PMV_R_CK_GCLK21": null,
"CLK_PMV_R_CK_GCLK22": null,
@ -1266,15 +1273,8 @@
"CLK_PMV_R_CK_GCLK27": null,
"CLK_PMV_R_CK_GCLK28": null,
"CLK_PMV_R_CK_GCLK29": null,
"CLK_PMV_R_CK_GCLK3": null,
"CLK_PMV_R_CK_GCLK30": null,
"CLK_PMV_R_CK_GCLK31": null,
"CLK_PMV_R_CK_GCLK4": null,
"CLK_PMV_R_CK_GCLK5": null,
"CLK_PMV_R_CK_GCLK6": null,
"CLK_PMV_R_CK_GCLK7": null,
"CLK_PMV_R_CK_GCLK8": null,
"CLK_PMV_R_CK_GCLK9": null,
"CLK_PMV_SE2A0_0": null,
"CLK_PMV_SE2A0_1": null,
"CLK_PMV_SE2A0_2": null,

108
artix7/tile_type_CLK_PMV2.json
View File

@ -85,6 +85,14 @@
"wires": {
"CLK_FEED_CK_BUFG_CASC0": null,
"CLK_FEED_CK_BUFG_CASC1": null,
"CLK_FEED_CK_BUFG_CASC2": null,
"CLK_FEED_CK_BUFG_CASC3": null,
"CLK_FEED_CK_BUFG_CASC4": null,
"CLK_FEED_CK_BUFG_CASC5": null,
"CLK_FEED_CK_BUFG_CASC6": null,
"CLK_FEED_CK_BUFG_CASC7": null,
"CLK_FEED_CK_BUFG_CASC8": null,
"CLK_FEED_CK_BUFG_CASC9": null,
"CLK_FEED_CK_BUFG_CASC10": null,
"CLK_FEED_CK_BUFG_CASC11": null,
"CLK_FEED_CK_BUFG_CASC12": null,
@ -95,7 +103,6 @@
"CLK_FEED_CK_BUFG_CASC17": null,
"CLK_FEED_CK_BUFG_CASC18": null,
"CLK_FEED_CK_BUFG_CASC19": null,
"CLK_FEED_CK_BUFG_CASC2": null,
"CLK_FEED_CK_BUFG_CASC20": null,
"CLK_FEED_CK_BUFG_CASC21": null,
"CLK_FEED_CK_BUFG_CASC22": null,
@ -106,17 +113,18 @@
"CLK_FEED_CK_BUFG_CASC27": null,
"CLK_FEED_CK_BUFG_CASC28": null,
"CLK_FEED_CK_BUFG_CASC29": null,
"CLK_FEED_CK_BUFG_CASC3": null,
"CLK_FEED_CK_BUFG_CASC30": null,
"CLK_FEED_CK_BUFG_CASC31": null,
"CLK_FEED_CK_BUFG_CASC4": null,
"CLK_FEED_CK_BUFG_CASC5": null,
"CLK_FEED_CK_BUFG_CASC6": null,
"CLK_FEED_CK_BUFG_CASC7": null,
"CLK_FEED_CK_BUFG_CASC8": null,
"CLK_FEED_CK_BUFG_CASC9": null,
"CLK_FEED_CK_GCLK0": null,
"CLK_FEED_CK_GCLK1": null,
"CLK_FEED_CK_GCLK2": null,
"CLK_FEED_CK_GCLK3": null,
"CLK_FEED_CK_GCLK4": null,
"CLK_FEED_CK_GCLK5": null,
"CLK_FEED_CK_GCLK6": null,
"CLK_FEED_CK_GCLK7": null,
"CLK_FEED_CK_GCLK8": null,
"CLK_FEED_CK_GCLK9": null,
"CLK_FEED_CK_GCLK10": null,
"CLK_FEED_CK_GCLK11": null,
"CLK_FEED_CK_GCLK12": null,
@ -127,7 +135,6 @@
"CLK_FEED_CK_GCLK17": null,
"CLK_FEED_CK_GCLK18": null,
"CLK_FEED_CK_GCLK19": null,
"CLK_FEED_CK_GCLK2": null,
"CLK_FEED_CK_GCLK20": null,
"CLK_FEED_CK_GCLK21": null,
"CLK_FEED_CK_GCLK22": null,
@ -138,15 +145,8 @@
"CLK_FEED_CK_GCLK27": null,
"CLK_FEED_CK_GCLK28": null,
"CLK_FEED_CK_GCLK29": null,
"CLK_FEED_CK_GCLK3": null,
"CLK_FEED_CK_GCLK30": null,
"CLK_FEED_CK_GCLK31": null,
"CLK_FEED_CK_GCLK4": null,
"CLK_FEED_CK_GCLK5": null,
"CLK_FEED_CK_GCLK6": null,
"CLK_FEED_CK_GCLK7": null,
"CLK_FEED_CK_GCLK8": null,
"CLK_FEED_CK_GCLK9": null,
"CLK_FEED_EE2A0": null,
"CLK_FEED_EE2A1": null,
"CLK_FEED_EE2A2": null,
@ -180,9 +180,6 @@
"CLK_FEED_ER1BEG2": null,
"CLK_FEED_ER1BEG3": null,
"CLK_FEED_LH1": null,
"CLK_FEED_LH10": null,
"CLK_FEED_LH11": null,
"CLK_FEED_LH12": null,
"CLK_FEED_LH2": null,
"CLK_FEED_LH3": null,
"CLK_FEED_LH4": null,
@ -191,6 +188,9 @@
"CLK_FEED_LH7": null,
"CLK_FEED_LH8": null,
"CLK_FEED_LH9": null,
"CLK_FEED_LH10": null,
"CLK_FEED_LH11": null,
"CLK_FEED_LH12": null,
"CLK_FEED_MONITOR_N": null,
"CLK_FEED_MONITOR_P": null,
"CLK_FEED_NE2A0": null,
@ -219,6 +219,14 @@
"CLK_FEED_NW4END3": null,
"CLK_FEED_R_CK_BUFG_CASC0": null,
"CLK_FEED_R_CK_BUFG_CASC1": null,
"CLK_FEED_R_CK_BUFG_CASC2": null,
"CLK_FEED_R_CK_BUFG_CASC3": null,
"CLK_FEED_R_CK_BUFG_CASC4": null,
"CLK_FEED_R_CK_BUFG_CASC5": null,
"CLK_FEED_R_CK_BUFG_CASC6": null,
"CLK_FEED_R_CK_BUFG_CASC7": null,
"CLK_FEED_R_CK_BUFG_CASC8": null,
"CLK_FEED_R_CK_BUFG_CASC9": null,
"CLK_FEED_R_CK_BUFG_CASC10": null,
"CLK_FEED_R_CK_BUFG_CASC11": null,
"CLK_FEED_R_CK_BUFG_CASC12": null,
@ -229,7 +237,6 @@
"CLK_FEED_R_CK_BUFG_CASC17": null,
"CLK_FEED_R_CK_BUFG_CASC18": null,
"CLK_FEED_R_CK_BUFG_CASC19": null,
"CLK_FEED_R_CK_BUFG_CASC2": null,
"CLK_FEED_R_CK_BUFG_CASC20": null,
"CLK_FEED_R_CK_BUFG_CASC21": null,
"CLK_FEED_R_CK_BUFG_CASC22": null,
@ -240,17 +247,18 @@
"CLK_FEED_R_CK_BUFG_CASC27": null,
"CLK_FEED_R_CK_BUFG_CASC28": null,
"CLK_FEED_R_CK_BUFG_CASC29": null,
"CLK_FEED_R_CK_BUFG_CASC3": null,
"CLK_FEED_R_CK_BUFG_CASC30": null,
"CLK_FEED_R_CK_BUFG_CASC31": null,
"CLK_FEED_R_CK_BUFG_CASC4": null,
"CLK_FEED_R_CK_BUFG_CASC5": null,
"CLK_FEED_R_CK_BUFG_CASC6": null,
"CLK_FEED_R_CK_BUFG_CASC7": null,
"CLK_FEED_R_CK_BUFG_CASC8": null,
"CLK_FEED_R_CK_BUFG_CASC9": null,
"CLK_FEED_R_CK_GCLK0": null,
"CLK_FEED_R_CK_GCLK1": null,
"CLK_FEED_R_CK_GCLK2": null,
"CLK_FEED_R_CK_GCLK3": null,
"CLK_FEED_R_CK_GCLK4": null,
"CLK_FEED_R_CK_GCLK5": null,
"CLK_FEED_R_CK_GCLK6": null,
"CLK_FEED_R_CK_GCLK7": null,
"CLK_FEED_R_CK_GCLK8": null,
"CLK_FEED_R_CK_GCLK9": null,
"CLK_FEED_R_CK_GCLK10": null,
"CLK_FEED_R_CK_GCLK11": null,
"CLK_FEED_R_CK_GCLK12": null,
@ -261,7 +269,6 @@
"CLK_FEED_R_CK_GCLK17": null,
"CLK_FEED_R_CK_GCLK18": null,
"CLK_FEED_R_CK_GCLK19": null,
"CLK_FEED_R_CK_GCLK2": null,
"CLK_FEED_R_CK_GCLK20": null,
"CLK_FEED_R_CK_GCLK21": null,
"CLK_FEED_R_CK_GCLK22": null,
@ -272,15 +279,8 @@
"CLK_FEED_R_CK_GCLK27": null,
"CLK_FEED_R_CK_GCLK28": null,
"CLK_FEED_R_CK_GCLK29": null,
"CLK_FEED_R_CK_GCLK3": null,
"CLK_FEED_R_CK_GCLK30": null,
"CLK_FEED_R_CK_GCLK31": null,
"CLK_FEED_R_CK_GCLK4": null,
"CLK_FEED_R_CK_GCLK5": null,
"CLK_FEED_R_CK_GCLK6": null,
"CLK_FEED_R_CK_GCLK7": null,
"CLK_FEED_R_CK_GCLK8": null,
"CLK_FEED_R_CK_GCLK9": null,
"CLK_FEED_SE2A0": null,
"CLK_FEED_SE2A1": null,
"CLK_FEED_SE2A2": null,
@ -365,6 +365,15 @@
"CLK_PMV_FAN6_0": null,
"CLK_PMV_FAN7_0": null,
"CLK_PMV_IMUX0_0": null,
"CLK_PMV_IMUX1_0": null,
"CLK_PMV_IMUX2_0": null,
"CLK_PMV_IMUX3_0": null,
"CLK_PMV_IMUX4_0": null,
"CLK_PMV_IMUX5_0": null,
"CLK_PMV_IMUX6_0": null,
"CLK_PMV_IMUX7_0": null,
"CLK_PMV_IMUX8_0": null,
"CLK_PMV_IMUX9_0": null,
"CLK_PMV_IMUX10_0": null,
"CLK_PMV_IMUX11_0": null,
"CLK_PMV_IMUX12_0": null,
@ -375,7 +384,6 @@
"CLK_PMV_IMUX17_0": null,
"CLK_PMV_IMUX18_0": null,
"CLK_PMV_IMUX19_0": null,
"CLK_PMV_IMUX1_0": null,
"CLK_PMV_IMUX20_0": null,
"CLK_PMV_IMUX21_0": null,
"CLK_PMV_IMUX22_0": null,
@ -386,7 +394,6 @@
"CLK_PMV_IMUX27_0": null,
"CLK_PMV_IMUX28_0": null,
"CLK_PMV_IMUX29_0": null,
"CLK_PMV_IMUX2_0": null,
"CLK_PMV_IMUX30_0": null,
"CLK_PMV_IMUX31_0": null,
"CLK_PMV_IMUX32_0": null,
@ -397,7 +404,6 @@
"CLK_PMV_IMUX37_0": null,
"CLK_PMV_IMUX38_0": null,
"CLK_PMV_IMUX39_0": null,
"CLK_PMV_IMUX3_0": null,
"CLK_PMV_IMUX40_0": null,
"CLK_PMV_IMUX41_0": null,
"CLK_PMV_IMUX42_0": null,
@ -406,13 +412,16 @@
"CLK_PMV_IMUX45_0": null,
"CLK_PMV_IMUX46_0": null,
"CLK_PMV_IMUX47_0": null,
"CLK_PMV_IMUX4_0": null,
"CLK_PMV_IMUX5_0": null,
"CLK_PMV_IMUX6_0": null,
"CLK_PMV_IMUX7_0": null,
"CLK_PMV_IMUX8_0": null,
"CLK_PMV_IMUX9_0": null,
"CLK_PMV_LOGIC_OUTS0_0": null,
"CLK_PMV_LOGIC_OUTS1_0": null,
"CLK_PMV_LOGIC_OUTS2_0": null,
"CLK_PMV_LOGIC_OUTS3_0": null,
"CLK_PMV_LOGIC_OUTS4_0": null,
"CLK_PMV_LOGIC_OUTS5_0": null,
"CLK_PMV_LOGIC_OUTS6_0": null,
"CLK_PMV_LOGIC_OUTS7_0": null,
"CLK_PMV_LOGIC_OUTS8_0": null,
"CLK_PMV_LOGIC_OUTS9_0": null,
"CLK_PMV_LOGIC_OUTS10_0": null,
"CLK_PMV_LOGIC_OUTS11_0": null,
"CLK_PMV_LOGIC_OUTS12_0": null,
@ -423,18 +432,9 @@
"CLK_PMV_LOGIC_OUTS17_0": null,
"CLK_PMV_LOGIC_OUTS18_0": null,
"CLK_PMV_LOGIC_OUTS19_0": null,
"CLK_PMV_LOGIC_OUTS1_0": null,
"CLK_PMV_LOGIC_OUTS20_0": null,
"CLK_PMV_LOGIC_OUTS21_0": null,
"CLK_PMV_LOGIC_OUTS22_0": null,
"CLK_PMV_LOGIC_OUTS23_0": null,
"CLK_PMV_LOGIC_OUTS2_0": null,
"CLK_PMV_LOGIC_OUTS3_0": null,
"CLK_PMV_LOGIC_OUTS4_0": null,
"CLK_PMV_LOGIC_OUTS5_0": null,
"CLK_PMV_LOGIC_OUTS6_0": null,
"CLK_PMV_LOGIC_OUTS7_0": null,
"CLK_PMV_LOGIC_OUTS8_0": null,
"CLK_PMV_LOGIC_OUTS9_0": null
"CLK_PMV_LOGIC_OUTS23_0": null
}
}

108
artix7/tile_type_CLK_PMV2_SVT.json
View File

@ -5,6 +5,14 @@
"wires": {
"CLK_FEED_CK_BUFG_CASC0": null,
"CLK_FEED_CK_BUFG_CASC1": null,
"CLK_FEED_CK_BUFG_CASC2": null,
"CLK_FEED_CK_BUFG_CASC3": null,
"CLK_FEED_CK_BUFG_CASC4": null,
"CLK_FEED_CK_BUFG_CASC5": null,
"CLK_FEED_CK_BUFG_CASC6": null,
"CLK_FEED_CK_BUFG_CASC7": null,
"CLK_FEED_CK_BUFG_CASC8": null,
"CLK_FEED_CK_BUFG_CASC9": null,
"CLK_FEED_CK_BUFG_CASC10": null,
"CLK_FEED_CK_BUFG_CASC11": null,
"CLK_FEED_CK_BUFG_CASC12": null,
@ -15,7 +23,6 @@
"CLK_FEED_CK_BUFG_CASC17": null,
"CLK_FEED_CK_BUFG_CASC18": null,
"CLK_FEED_CK_BUFG_CASC19": null,
"CLK_FEED_CK_BUFG_CASC2": null,
"CLK_FEED_CK_BUFG_CASC20": null,
"CLK_FEED_CK_BUFG_CASC21": null,
"CLK_FEED_CK_BUFG_CASC22": null,
@ -26,17 +33,18 @@
"CLK_FEED_CK_BUFG_CASC27": null,
"CLK_FEED_CK_BUFG_CASC28": null,
"CLK_FEED_CK_BUFG_CASC29": null,
"CLK_FEED_CK_BUFG_CASC3": null,
"CLK_FEED_CK_BUFG_CASC30": null,
"CLK_FEED_CK_BUFG_CASC31": null,
"CLK_FEED_CK_BUFG_CASC4": null,
"CLK_FEED_CK_BUFG_CASC5": null,
"CLK_FEED_CK_BUFG_CASC6": null,
"CLK_FEED_CK_BUFG_CASC7": null,
"CLK_FEED_CK_BUFG_CASC8": null,
"CLK_FEED_CK_BUFG_CASC9": null,
"CLK_FEED_CK_GCLK0": null,
"CLK_FEED_CK_GCLK1": null,
"CLK_FEED_CK_GCLK2": null,
"CLK_FEED_CK_GCLK3": null,
"CLK_FEED_CK_GCLK4": null,
"CLK_FEED_CK_GCLK5": null,
"CLK_FEED_CK_GCLK6": null,
"CLK_FEED_CK_GCLK7": null,
"CLK_FEED_CK_GCLK8": null,
"CLK_FEED_CK_GCLK9": null,
"CLK_FEED_CK_GCLK10": null,
"CLK_FEED_CK_GCLK11": null,
"CLK_FEED_CK_GCLK12": null,
@ -47,7 +55,6 @@
"CLK_FEED_CK_GCLK17": null,
"CLK_FEED_CK_GCLK18": null,
"CLK_FEED_CK_GCLK19": null,
"CLK_FEED_CK_GCLK2": null,
"CLK_FEED_CK_GCLK20": null,
"CLK_FEED_CK_GCLK21": null,
"CLK_FEED_CK_GCLK22": null,
@ -58,15 +65,8 @@
"CLK_FEED_CK_GCLK27": null,
"CLK_FEED_CK_GCLK28": null,
"CLK_FEED_CK_GCLK29": null,
"CLK_FEED_CK_GCLK3": null,
"CLK_FEED_CK_GCLK30": null,
"CLK_FEED_CK_GCLK31": null,
"CLK_FEED_CK_GCLK4": null,
"CLK_FEED_CK_GCLK5": null,
"CLK_FEED_CK_GCLK6": null,
"CLK_FEED_CK_GCLK7": null,
"CLK_FEED_CK_GCLK8": null,
"CLK_FEED_CK_GCLK9": null,
"CLK_FEED_EE2A0": null,
"CLK_FEED_EE2A1": null,
"CLK_FEED_EE2A2": null,
@ -100,9 +100,6 @@
"CLK_FEED_ER1BEG2": null,
"CLK_FEED_ER1BEG3": null,
"CLK_FEED_LH1": null,
"CLK_FEED_LH10": null,
"CLK_FEED_LH11": null,
"CLK_FEED_LH12": null,
"CLK_FEED_LH2": null,
"CLK_FEED_LH3": null,
"CLK_FEED_LH4": null,
@ -111,6 +108,9 @@
"CLK_FEED_LH7": null,
"CLK_FEED_LH8": null,
"CLK_FEED_LH9": null,
"CLK_FEED_LH10": null,
"CLK_FEED_LH11": null,
"CLK_FEED_LH12": null,
"CLK_FEED_MONITOR_N": null,
"CLK_FEED_MONITOR_P": null,
"CLK_FEED_NE2A0": null,
@ -139,6 +139,14 @@
"CLK_FEED_NW4END3": null,
"CLK_FEED_R_CK_BUFG_CASC0": null,
"CLK_FEED_R_CK_BUFG_CASC1": null,
"CLK_FEED_R_CK_BUFG_CASC2": null,
"CLK_FEED_R_CK_BUFG_CASC3": null,
"CLK_FEED_R_CK_BUFG_CASC4": null,
"CLK_FEED_R_CK_BUFG_CASC5": null,
"CLK_FEED_R_CK_BUFG_CASC6": null,
"CLK_FEED_R_CK_BUFG_CASC7": null,
"CLK_FEED_R_CK_BUFG_CASC8": null,
"CLK_FEED_R_CK_BUFG_CASC9": null,
"CLK_FEED_R_CK_BUFG_CASC10": null,
"CLK_FEED_R_CK_BUFG_CASC11": null,
"CLK_FEED_R_CK_BUFG_CASC12": null,
@ -149,7 +157,6 @@
"CLK_FEED_R_CK_BUFG_CASC17": null,
"CLK_FEED_R_CK_BUFG_CASC18": null,
"CLK_FEED_R_CK_BUFG_CASC19": null,
"CLK_FEED_R_CK_BUFG_CASC2": null,
"CLK_FEED_R_CK_BUFG_CASC20": null,
"CLK_FEED_R_CK_BUFG_CASC21": null,
"CLK_FEED_R_CK_BUFG_CASC22": null,
@ -160,17 +167,18 @@
"CLK_FEED_R_CK_BUFG_CASC27": null,
"CLK_FEED_R_CK_BUFG_CASC28": null,
"CLK_FEED_R_CK_BUFG_CASC29": null,
"CLK_FEED_R_CK_BUFG_CASC3": null,
"CLK_FEED_R_CK_BUFG_CASC30": null,
"CLK_FEED_R_CK_BUFG_CASC31": null,
"CLK_FEED_R_CK_BUFG_CASC4": null,
"CLK_FEED_R_CK_BUFG_CASC5": null,
"CLK_FEED_R_CK_BUFG_CASC6": null,
"CLK_FEED_R_CK_BUFG_CASC7": null,
"CLK_FEED_R_CK_BUFG_CASC8": null,
"CLK_FEED_R_CK_BUFG_CASC9": null,
"CLK_FEED_R_CK_GCLK0": null,
"CLK_FEED_R_CK_GCLK1": null,
"CLK_FEED_R_CK_GCLK2": null,
"CLK_FEED_R_CK_GCLK3": null,
"CLK_FEED_R_CK_GCLK4": null,
"CLK_FEED_R_CK_GCLK5": null,
"CLK_FEED_R_CK_GCLK6": null,
"CLK_FEED_R_CK_GCLK7": null,
"CLK_FEED_R_CK_GCLK8": null,
"CLK_FEED_R_CK_GCLK9": null,
"CLK_FEED_R_CK_GCLK10": null,
"CLK_FEED_R_CK_GCLK11": null,
"CLK_FEED_R_CK_GCLK12": null,
@ -181,7 +189,6 @@
"CLK_FEED_R_CK_GCLK17": null,
"CLK_FEED_R_CK_GCLK18": null,
"CLK_FEED_R_CK_GCLK19": null,
"CLK_FEED_R_CK_GCLK2": null,
"CLK_FEED_R_CK_GCLK20": null,
"CLK_FEED_R_CK_GCLK21": null,
"CLK_FEED_R_CK_GCLK22": null,
@ -192,15 +199,8 @@
"CLK_FEED_R_CK_GCLK27": null,
"CLK_FEED_R_CK_GCLK28": null,
"CLK_FEED_R_CK_GCLK29": null,
"CLK_FEED_R_CK_GCLK3": null,
"CLK_FEED_R_CK_GCLK30": null,
"CLK_FEED_R_CK_GCLK31": null,
"CLK_FEED_R_CK_GCLK4": null,
"CLK_FEED_R_CK_GCLK5": null,
"CLK_FEED_R_CK_GCLK6": null,
"CLK_FEED_R_CK_GCLK7": null,
"CLK_FEED_R_CK_GCLK8": null,
"CLK_FEED_R_CK_GCLK9": null,
"CLK_FEED_SE2A0": null,
"CLK_FEED_SE2A1": null,
"CLK_FEED_SE2A2": null,
@ -285,6 +285,15 @@
"CLK_PMV_FAN6_0": null,
"CLK_PMV_FAN7_0": null,
"CLK_PMV_IMUX0_0": null,
"CLK_PMV_IMUX1_0": null,
"CLK_PMV_IMUX2_0": null,
"CLK_PMV_IMUX3_0": null,
"CLK_PMV_IMUX4_0": null,
"CLK_PMV_IMUX5_0": null,
"CLK_PMV_IMUX6_0": null,
"CLK_PMV_IMUX7_0": null,
"CLK_PMV_IMUX8_0": null,
"CLK_PMV_IMUX9_0": null,
"CLK_PMV_IMUX10_0": null,
"CLK_PMV_IMUX11_0": null,
"CLK_PMV_IMUX12_0": null,
@ -295,7 +304,6 @@
"CLK_PMV_IMUX17_0": null,
"CLK_PMV_IMUX18_0": null,
"CLK_PMV_IMUX19_0": null,
"CLK_PMV_IMUX1_0": null,
"CLK_PMV_IMUX20_0": null,
"CLK_PMV_IMUX21_0": null,
"CLK_PMV_IMUX22_0": null,
@ -306,7 +314,6 @@
"CLK_PMV_IMUX27_0": null,
"CLK_PMV_IMUX28_0": null,
"CLK_PMV_IMUX29_0": null,
"CLK_PMV_IMUX2_0": null,
"CLK_PMV_IMUX30_0": null,
"CLK_PMV_IMUX31_0": null,
"CLK_PMV_IMUX32_0": null,
@ -317,7 +324,6 @@
"CLK_PMV_IMUX37_0": null,
"CLK_PMV_IMUX38_0": null,
"CLK_PMV_IMUX39_0": null,
"CLK_PMV_IMUX3_0": null,
"CLK_PMV_IMUX40_0": null,
"CLK_PMV_IMUX41_0": null,
"CLK_PMV_IMUX42_0": null,
@ -326,13 +332,16 @@
"CLK_PMV_IMUX45_0": null,
"CLK_PMV_IMUX46_0": null,
"CLK_PMV_IMUX47_0": null,
"CLK_PMV_IMUX4_0": null,
"CLK_PMV_IMUX5_0": null,
"CLK_PMV_IMUX6_0": null,
"CLK_PMV_IMUX7_0": null,
"CLK_PMV_IMUX8_0": null,
"CLK_PMV_IMUX9_0": null,
"CLK_PMV_LOGIC_OUTS0_0": null,
"CLK_PMV_LOGIC_OUTS1_0": null,
"CLK_PMV_LOGIC_OUTS2_0": null,
"CLK_PMV_LOGIC_OUTS3_0": null,
"CLK_PMV_LOGIC_OUTS4_0": null,
"CLK_PMV_LOGIC_OUTS5_0": null,
"CLK_PMV_LOGIC_OUTS6_0": null,
"CLK_PMV_LOGIC_OUTS7_0": null,
"CLK_PMV_LOGIC_OUTS8_0": null,
"CLK_PMV_LOGIC_OUTS9_0": null,
"CLK_PMV_LOGIC_OUTS10_0": null,
"CLK_PMV_LOGIC_OUTS11_0": null,
"CLK_PMV_LOGIC_OUTS12_0": null,
@ -343,18 +352,9 @@
"CLK_PMV_LOGIC_OUTS17_0": null,
"CLK_PMV_LOGIC_OUTS18_0": null,
"CLK_PMV_LOGIC_OUTS19_0": null,
"CLK_PMV_LOGIC_OUTS1_0": null,
"CLK_PMV_LOGIC_OUTS20_0": null,
"CLK_PMV_LOGIC_OUTS21_0": null,
"CLK_PMV_LOGIC_OUTS22_0": null,
"CLK_PMV_LOGIC_OUTS23_0": null,
"CLK_PMV_LOGIC_OUTS2_0": null,
"CLK_PMV_LOGIC_OUTS3_0": null,
"CLK_PMV_LOGIC_OUTS4_0": null,
"CLK_PMV_LOGIC_OUTS5_0": null,
"CLK_PMV_LOGIC_OUTS6_0": null,
"CLK_PMV_LOGIC_OUTS7_0": null,
"CLK_PMV_LOGIC_OUTS8_0": null,
"CLK_PMV_LOGIC_OUTS9_0": null
"CLK_PMV_LOGIC_OUTS23_0": null
}
}

108
artix7/tile_type_CLK_PMVIOB.json
View File

@ -5,6 +5,14 @@
"wires": {
"CLK_FEED_CK_BUFG_CASC0": null,
"CLK_FEED_CK_BUFG_CASC1": null,
"CLK_FEED_CK_BUFG_CASC2": null,
"CLK_FEED_CK_BUFG_CASC3": null,
"CLK_FEED_CK_BUFG_CASC4": null,
"CLK_FEED_CK_BUFG_CASC5": null,
"CLK_FEED_CK_BUFG_CASC6": null,
"CLK_FEED_CK_BUFG_CASC7": null,
"CLK_FEED_CK_BUFG_CASC8": null,
"CLK_FEED_CK_BUFG_CASC9": null,
"CLK_FEED_CK_BUFG_CASC10": null,
"CLK_FEED_CK_BUFG_CASC11": null,
"CLK_FEED_CK_BUFG_CASC12": null,
@ -15,7 +23,6 @@
"CLK_FEED_CK_BUFG_CASC17": null,
"CLK_FEED_CK_BUFG_CASC18": null,
"CLK_FEED_CK_BUFG_CASC19": null,
"CLK_FEED_CK_BUFG_CASC2": null,
"CLK_FEED_CK_BUFG_CASC20": null,
"CLK_FEED_CK_BUFG_CASC21": null,
"CLK_FEED_CK_BUFG_CASC22": null,
@ -26,17 +33,18 @@
"CLK_FEED_CK_BUFG_CASC27": null,
"CLK_FEED_CK_BUFG_CASC28": null,
"CLK_FEED_CK_BUFG_CASC29": null,
"CLK_FEED_CK_BUFG_CASC3": null,
"CLK_FEED_CK_BUFG_CASC30": null,
"CLK_FEED_CK_BUFG_CASC31": null,
"CLK_FEED_CK_BUFG_CASC4": null,
"CLK_FEED_CK_BUFG_CASC5": null,
"CLK_FEED_CK_BUFG_CASC6": null,
"CLK_FEED_CK_BUFG_CASC7": null,
"CLK_FEED_CK_BUFG_CASC8": null,
"CLK_FEED_CK_BUFG_CASC9": null,
"CLK_FEED_CK_GCLK0": null,
"CLK_FEED_CK_GCLK1": null,
"CLK_FEED_CK_GCLK2": null,
"CLK_FEED_CK_GCLK3": null,
"CLK_FEED_CK_GCLK4": null,
"CLK_FEED_CK_GCLK5": null,
"CLK_FEED_CK_GCLK6": null,
"CLK_FEED_CK_GCLK7": null,
"CLK_FEED_CK_GCLK8": null,
"CLK_FEED_CK_GCLK9": null,
"CLK_FEED_CK_GCLK10": null,
"CLK_FEED_CK_GCLK11": null,
"CLK_FEED_CK_GCLK12": null,
@ -47,7 +55,6 @@
"CLK_FEED_CK_GCLK17": null,
"CLK_FEED_CK_GCLK18": null,
"CLK_FEED_CK_GCLK19": null,
"CLK_FEED_CK_GCLK2": null,
"CLK_FEED_CK_GCLK20": null,
"CLK_FEED_CK_GCLK21": null,
"CLK_FEED_CK_GCLK22": null,
@ -58,15 +65,8 @@
"CLK_FEED_CK_GCLK27": null,
"CLK_FEED_CK_GCLK28": null,
"CLK_FEED_CK_GCLK29": null,
"CLK_FEED_CK_GCLK3": null,
"CLK_FEED_CK_GCLK30": null,
"CLK_FEED_CK_GCLK31": null,
"CLK_FEED_CK_GCLK4": null,
"CLK_FEED_CK_GCLK5": null,
"CLK_FEED_CK_GCLK6": null,
"CLK_FEED_CK_GCLK7": null,
"CLK_FEED_CK_GCLK8": null,
"CLK_FEED_CK_GCLK9": null,
"CLK_FEED_EE2A0": null,
"CLK_FEED_EE2A1": null,
"CLK_FEED_EE2A2": null,
@ -100,9 +100,6 @@
"CLK_FEED_ER1BEG2": null,
"CLK_FEED_ER1BEG3": null,
"CLK_FEED_LH1": null,
"CLK_FEED_LH10": null,
"CLK_FEED_LH11": null,
"CLK_FEED_LH12": null,
"CLK_FEED_LH2": null,
"CLK_FEED_LH3": null,
"CLK_FEED_LH4": null,
@ -111,6 +108,9 @@
"CLK_FEED_LH7": null,
"CLK_FEED_LH8": null,
"CLK_FEED_LH9": null,
"CLK_FEED_LH10": null,
"CLK_FEED_LH11": null,
"CLK_FEED_LH12": null,
"CLK_FEED_MONITOR_N": null,
"CLK_FEED_MONITOR_P": null,
"CLK_FEED_NE2A0": null,
@ -139,6 +139,14 @@
"CLK_FEED_NW4END3": null,
"CLK_FEED_R_CK_BUFG_CASC0": null,
"CLK_FEED_R_CK_BUFG_CASC1": null,
"CLK_FEED_R_CK_BUFG_CASC2": null,
"CLK_FEED_R_CK_BUFG_CASC3": null,
"CLK_FEED_R_CK_BUFG_CASC4": null,
"CLK_FEED_R_CK_BUFG_CASC5": null,
"CLK_FEED_R_CK_BUFG_CASC6": null,
"CLK_FEED_R_CK_BUFG_CASC7": null,
"CLK_FEED_R_CK_BUFG_CASC8": null,
"CLK_FEED_R_CK_BUFG_CASC9": null,
"CLK_FEED_R_CK_BUFG_CASC10": null,
"CLK_FEED_R_CK_BUFG_CASC11": null,
"CLK_FEED_R_CK_BUFG_CASC12": null,
@ -149,7 +157,6 @@
"CLK_FEED_R_CK_BUFG_CASC17": null,
"CLK_FEED_R_CK_BUFG_CASC18": null,
"CLK_FEED_R_CK_BUFG_CASC19": null,
"CLK_FEED_R_CK_BUFG_CASC2": null,
"CLK_FEED_R_CK_BUFG_CASC20": null,
"CLK_FEED_R_CK_BUFG_CASC21": null,
"CLK_FEED_R_CK_BUFG_CASC22": null,
@ -160,17 +167,18 @@
"CLK_FEED_R_CK_BUFG_CASC27": null,
"CLK_FEED_R_CK_BUFG_CASC28": null,
"CLK_FEED_R_CK_BUFG_CASC29": null,
"CLK_FEED_R_CK_BUFG_CASC3": null,
"CLK_FEED_R_CK_BUFG_CASC30": null,
"CLK_FEED_R_CK_BUFG_CASC31": null,
"CLK_FEED_R_CK_BUFG_CASC4": null,
"CLK_FEED_R_CK_BUFG_CASC5": null,
"CLK_FEED_R_CK_BUFG_CASC6": null,
"CLK_FEED_R_CK_BUFG_CASC7": null,
"CLK_FEED_R_CK_BUFG_CASC8": null,
"CLK_FEED_R_CK_BUFG_CASC9": null,
"CLK_FEED_R_CK_GCLK0": null,
"CLK_FEED_R_CK_GCLK1": null,
"CLK_FEED_R_CK_GCLK2": null,
"CLK_FEED_R_CK_GCLK3": null,
"CLK_FEED_R_CK_GCLK4": null,
"CLK_FEED_R_CK_GCLK5": null,
"CLK_FEED_R_CK_GCLK6": null,
"CLK_FEED_R_CK_GCLK7": null,
"CLK_FEED_R_CK_GCLK8": null,
"CLK_FEED_R_CK_GCLK9": null,
"CLK_FEED_R_CK_GCLK10": null,
"CLK_FEED_R_CK_GCLK11": null,
"CLK_FEED_R_CK_GCLK12": null,
@ -181,7 +189,6 @@
"CLK_FEED_R_CK_GCLK17": null,
"CLK_FEED_R_CK_GCLK18": null,
"CLK_FEED_R_CK_GCLK19": null,
"CLK_FEED_R_CK_GCLK2": null,
"CLK_FEED_R_CK_GCLK20": null,
"CLK_FEED_R_CK_GCLK21": null,
"CLK_FEED_R_CK_GCLK22": null,
@ -192,15 +199,8 @@
"CLK_FEED_R_CK_GCLK27": null,
"CLK_FEED_R_CK_GCLK28": null,
"CLK_FEED_R_CK_GCLK29": null,
"CLK_FEED_R_CK_GCLK3": null,
"CLK_FEED_R_CK_GCLK30": null,
"CLK_FEED_R_CK_GCLK31": null,
"CLK_FEED_R_CK_GCLK4": null,
"CLK_FEED_R_CK_GCLK5": null,
"CLK_FEED_R_CK_GCLK6": null,
"CLK_FEED_R_CK_GCLK7": null,
"CLK_FEED_R_CK_GCLK8": null,
"CLK_FEED_R_CK_GCLK9": null,
"CLK_FEED_SE2A0": null,
"CLK_FEED_SE2A1": null,
"CLK_FEED_SE2A2": null,
@ -284,6 +284,15 @@
"CLK_PMV_FAN6_0": null,
"CLK_PMV_FAN7_0": null,
"CLK_PMV_IMUX0_0": null,
"CLK_PMV_IMUX1_0": null,
"CLK_PMV_IMUX2_0": null,
"CLK_PMV_IMUX3_0": null,
"CLK_PMV_IMUX4_0": null,
"CLK_PMV_IMUX5_0": null,
"CLK_PMV_IMUX6_0": null,
"CLK_PMV_IMUX7_0": null,
"CLK_PMV_IMUX8_0": null,
"CLK_PMV_IMUX9_0": null,
"CLK_PMV_IMUX10_0": null,
"CLK_PMV_IMUX11_0": null,
"CLK_PMV_IMUX12_0": null,
@ -294,7 +303,6 @@
"CLK_PMV_IMUX17_0": null,
"CLK_PMV_IMUX18_0": null,
"CLK_PMV_IMUX19_0": null,
"CLK_PMV_IMUX1_0": null,
"CLK_PMV_IMUX20_0": null,
"CLK_PMV_IMUX21_0": null,
"CLK_PMV_IMUX22_0": null,
@ -305,7 +313,6 @@
"CLK_PMV_IMUX27_0": null,
"CLK_PMV_IMUX28_0": null,
"CLK_PMV_IMUX29_0": null,
"CLK_PMV_IMUX2_0": null,
"CLK_PMV_IMUX30_0": null,
"CLK_PMV_IMUX31_0": null,
"CLK_PMV_IMUX32_0": null,
@ -316,7 +323,6 @@
"CLK_PMV_IMUX37_0": null,
"CLK_PMV_IMUX38_0": null,
"CLK_PMV_IMUX39_0": null,
"CLK_PMV_IMUX3_0": null,
"CLK_PMV_IMUX40_0": null,
"CLK_PMV_IMUX41_0": null,
"CLK_PMV_IMUX42_0": null,
@ -325,13 +331,16 @@
"CLK_PMV_IMUX45_0": null,
"CLK_PMV_IMUX46_0": null,
"CLK_PMV_IMUX47_0": null,
"CLK_PMV_IMUX4_0": null,
"CLK_PMV_IMUX5_0": null,
"CLK_PMV_IMUX6_0": null,
"CLK_PMV_IMUX7_0": null,
"CLK_PMV_IMUX8_0": null,
"CLK_PMV_IMUX9_0": null,
"CLK_PMV_LOGIC_OUTS0_0": null,
"CLK_PMV_LOGIC_OUTS1_0": null,
"CLK_PMV_LOGIC_OUTS2_0": null,
"CLK_PMV_LOGIC_OUTS3_0": null,
"CLK_PMV_LOGIC_OUTS4_0": null,
"CLK_PMV_LOGIC_OUTS5_0": null,
"CLK_PMV_LOGIC_OUTS6_0": null,
"CLK_PMV_LOGIC_OUTS7_0": null,
"CLK_PMV_LOGIC_OUTS8_0": null,
"CLK_PMV_LOGIC_OUTS9_0": null,
"CLK_PMV_LOGIC_OUTS10_0": null,
"CLK_PMV_LOGIC_OUTS11_0": null,
"CLK_PMV_LOGIC_OUTS12_0": null,
@ -342,18 +351,9 @@
"CLK_PMV_LOGIC_OUTS17_0": null,
"CLK_PMV_LOGIC_OUTS18_0": null,
"CLK_PMV_LOGIC_OUTS19_0": null,
"CLK_PMV_LOGIC_OUTS1_0": null,
"CLK_PMV_LOGIC_OUTS20_0": null,
"CLK_PMV_LOGIC_OUTS21_0": null,
"CLK_PMV_LOGIC_OUTS22_0": null,
"CLK_PMV_LOGIC_OUTS23_0": null,
"CLK_PMV_LOGIC_OUTS2_0": null,
"CLK_PMV_LOGIC_OUTS3_0": null,
"CLK_PMV_LOGIC_OUTS4_0": null,
"CLK_PMV_LOGIC_OUTS5_0": null,
"CLK_PMV_LOGIC_OUTS6_0": null,
"CLK_PMV_LOGIC_OUTS7_0": null,
"CLK_PMV_LOGIC_OUTS8_0": null,
"CLK_PMV_LOGIC_OUTS9_0": null
"CLK_PMV_LOGIC_OUTS23_0": null
}
}

34
artix7/tile_type_CLK_TERM.json
View File

@ -5,6 +5,14 @@
"wires": {
"CLK_TERM_GCLK0": null,
"CLK_TERM_GCLK1": null,
"CLK_TERM_GCLK2": null,
"CLK_TERM_GCLK3": null,
"CLK_TERM_GCLK4": null,
"CLK_TERM_GCLK5": null,
"CLK_TERM_GCLK6": null,
"CLK_TERM_GCLK7": null,
"CLK_TERM_GCLK8": null,
"CLK_TERM_GCLK9": null,
"CLK_TERM_GCLK10": null,
"CLK_TERM_GCLK11": null,
"CLK_TERM_GCLK12": null,
@ -15,7 +23,6 @@
"CLK_TERM_GCLK17": null,
"CLK_TERM_GCLK18": null,
"CLK_TERM_GCLK19": null,
"CLK_TERM_GCLK2": null,
"CLK_TERM_GCLK20": null,
"CLK_TERM_GCLK21": null,
"CLK_TERM_GCLK22": null,
@ -26,17 +33,18 @@
"CLK_TERM_GCLK27": null,
"CLK_TERM_GCLK28": null,
"CLK_TERM_GCLK29": null,
"CLK_TERM_GCLK3": null,
"CLK_TERM_GCLK30": null,
"CLK_TERM_GCLK31": null,
"CLK_TERM_GCLK4": null,
"CLK_TERM_GCLK5": null,
"CLK_TERM_GCLK6": null,
"CLK_TERM_GCLK7": null,
"CLK_TERM_GCLK8": null,
"CLK_TERM_GCLK9": null,
"CLK_TERM_R_GCLK0": null,
"CLK_TERM_R_GCLK1": null,
"CLK_TERM_R_GCLK2": null,
"CLK_TERM_R_GCLK3": null,
"CLK_TERM_R_GCLK4": null,
"CLK_TERM_R_GCLK5": null,
"CLK_TERM_R_GCLK6": null,
"CLK_TERM_R_GCLK7": null,
"CLK_TERM_R_GCLK8": null,
"CLK_TERM_R_GCLK9": null,
"CLK_TERM_R_GCLK10": null,
"CLK_TERM_R_GCLK11": null,
"CLK_TERM_R_GCLK12": null,
@ -47,7 +55,6 @@
"CLK_TERM_R_GCLK17": null,
"CLK_TERM_R_GCLK18": null,
"CLK_TERM_R_GCLK19": null,
"CLK_TERM_R_GCLK2": null,
"CLK_TERM_R_GCLK20": null,
"CLK_TERM_R_GCLK21": null,
"CLK_TERM_R_GCLK22": null,
@ -58,14 +65,7 @@
"CLK_TERM_R_GCLK27": null,
"CLK_TERM_R_GCLK28": null,
"CLK_TERM_R_GCLK29": null,
"CLK_TERM_R_GCLK3": null,
"CLK_TERM_R_GCLK30": null,
"CLK_TERM_R_GCLK31": null,
"CLK_TERM_R_GCLK4": null,
"CLK_TERM_R_GCLK5": null,
"CLK_TERM_R_GCLK6": null,
"CLK_TERM_R_GCLK7": null,
"CLK_TERM_R_GCLK8": null,
"CLK_TERM_R_GCLK9": null
"CLK_TERM_R_GCLK31": null
}
}

7410
artix7/tile_type_CMT_FIFO_L.json
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7410
artix7/tile_type_CMT_FIFO_R.json
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56
artix7/tile_type_CMT_PMV.json
View File

@ -153,6 +153,14 @@
"CMT_PMV_FAN7": null,
"CMT_PMV_IMUX0": null,
"CMT_PMV_IMUX1": null,
"CMT_PMV_IMUX2": null,
"CMT_PMV_IMUX3": null,
"CMT_PMV_IMUX4": null,
"CMT_PMV_IMUX5": null,
"CMT_PMV_IMUX6": null,
"CMT_PMV_IMUX7": null,
"CMT_PMV_IMUX8": null,
"CMT_PMV_IMUX9": null,
"CMT_PMV_IMUX10": null,
"CMT_PMV_IMUX11": null,
"CMT_PMV_IMUX12": null,
@ -163,7 +171,6 @@
"CMT_PMV_IMUX17": null,
"CMT_PMV_IMUX18": null,
"CMT_PMV_IMUX19": null,
"CMT_PMV_IMUX2": null,
"CMT_PMV_IMUX20": null,
"CMT_PMV_IMUX21": null,
"CMT_PMV_IMUX22": null,
@ -174,7 +181,6 @@
"CMT_PMV_IMUX27": null,
"CMT_PMV_IMUX28": null,
"CMT_PMV_IMUX29": null,
"CMT_PMV_IMUX3": null,
"CMT_PMV_IMUX30": null,
"CMT_PMV_IMUX31": null,
"CMT_PMV_IMUX32": null,
@ -185,7 +191,6 @@
"CMT_PMV_IMUX37": null,
"CMT_PMV_IMUX38": null,
"CMT_PMV_IMUX39": null,
"CMT_PMV_IMUX4": null,
"CMT_PMV_IMUX40": null,
"CMT_PMV_IMUX41": null,
"CMT_PMV_IMUX42": null,
@ -194,27 +199,10 @@
"CMT_PMV_IMUX45": null,
"CMT_PMV_IMUX46": null,
"CMT_PMV_IMUX47": null,
"CMT_PMV_IMUX5": null,
"CMT_PMV_IMUX6": null,
"CMT_PMV_IMUX7": null,
"CMT_PMV_IMUX8": null,
"CMT_PMV_IMUX9": null,
"CMT_PMV_LH1": {
"cap": "60.260",
"res": "15.190"
},
"CMT_PMV_LH10": {
"cap": "60.260",
"res": "15.190"
},
"CMT_PMV_LH11": {
"cap": "60.260",
"res": "15.190"
},
"CMT_PMV_LH12": {
"cap": "60.260",
"res": "15.190"
},
"CMT_PMV_LH2": {
"cap": "60.260",
"res": "15.190"
@ -247,8 +235,28 @@
"cap": "60.260",
"res": "15.190"
},
"CMT_PMV_LH10": {
"cap": "60.260",
"res": "15.190"
},
"CMT_PMV_LH11": {
"cap": "60.260",
"res": "15.190"
},
"CMT_PMV_LH12": {
"cap": "60.260",
"res": "15.190"
},
"CMT_PMV_LOGIC_OUTS0": null,
"CMT_PMV_LOGIC_OUTS1": null,
"CMT_PMV_LOGIC_OUTS2": null,
"CMT_PMV_LOGIC_OUTS3": null,
"CMT_PMV_LOGIC_OUTS4": null,
"CMT_PMV_LOGIC_OUTS5": null,
"CMT_PMV_LOGIC_OUTS6": null,
"CMT_PMV_LOGIC_OUTS7": null,
"CMT_PMV_LOGIC_OUTS8": null,
"CMT_PMV_LOGIC_OUTS9": null,
"CMT_PMV_LOGIC_OUTS10": null,
"CMT_PMV_LOGIC_OUTS11": null,
"CMT_PMV_LOGIC_OUTS12": null,
@ -259,18 +267,10 @@
"CMT_PMV_LOGIC_OUTS17": null,
"CMT_PMV_LOGIC_OUTS18": null,
"CMT_PMV_LOGIC_OUTS19": null,
"CMT_PMV_LOGIC_OUTS2": null,
"CMT_PMV_LOGIC_OUTS20": null,
"CMT_PMV_LOGIC_OUTS21": null,
"CMT_PMV_LOGIC_OUTS22": null,
"CMT_PMV_LOGIC_OUTS23": null,
"CMT_PMV_LOGIC_OUTS3": null,
"CMT_PMV_LOGIC_OUTS4": null,
"CMT_PMV_LOGIC_OUTS5": null,
"CMT_PMV_LOGIC_OUTS6": null,
"CMT_PMV_LOGIC_OUTS7": null,
"CMT_PMV_LOGIC_OUTS8": null,
"CMT_PMV_LOGIC_OUTS9": null,
"CMT_PMV_MONITOR_N": null,
"CMT_PMV_MONITOR_P": null,
"CMT_PMV_NE2A0": {

56
artix7/tile_type_CMT_PMV_L.json
View File

@ -153,6 +153,14 @@
"CMT_PMV_FAN7": null,
"CMT_PMV_IMUX0": null,
"CMT_PMV_IMUX1": null,
"CMT_PMV_IMUX2": null,
"CMT_PMV_IMUX3": null,
"CMT_PMV_IMUX4": null,
"CMT_PMV_IMUX5": null,
"CMT_PMV_IMUX6": null,
"CMT_PMV_IMUX7": null,
"CMT_PMV_IMUX8": null,
"CMT_PMV_IMUX9": null,
"CMT_PMV_IMUX10": null,
"CMT_PMV_IMUX11": null,
"CMT_PMV_IMUX12": null,
@ -163,7 +171,6 @@
"CMT_PMV_IMUX17": null,
"CMT_PMV_IMUX18": null,
"CMT_PMV_IMUX19": null,
"CMT_PMV_IMUX2": null,
"CMT_PMV_IMUX20": null,
"CMT_PMV_IMUX21": null,
"CMT_PMV_IMUX22": null,
@ -174,7 +181,6 @@
"CMT_PMV_IMUX27": null,
"CMT_PMV_IMUX28": null,
"CMT_PMV_IMUX29": null,
"CMT_PMV_IMUX3": null,
"CMT_PMV_IMUX30": null,
"CMT_PMV_IMUX31": null,
"CMT_PMV_IMUX32": null,
@ -185,7 +191,6 @@
"CMT_PMV_IMUX37": null,
"CMT_PMV_IMUX38": null,
"CMT_PMV_IMUX39": null,
"CMT_PMV_IMUX4": null,
"CMT_PMV_IMUX40": null,
"CMT_PMV_IMUX41": null,
"CMT_PMV_IMUX42": null,
@ -194,27 +199,10 @@
"CMT_PMV_IMUX45": null,
"CMT_PMV_IMUX46": null,
"CMT_PMV_IMUX47": null,
"CMT_PMV_IMUX5": null,
"CMT_PMV_IMUX6": null,
"CMT_PMV_IMUX7": null,
"CMT_PMV_IMUX8": null,
"CMT_PMV_IMUX9": null,
"CMT_PMV_LH1": {
"cap": "60.260",
"res": "15.190"
},
"CMT_PMV_LH10": {
"cap": "60.260",
"res": "15.190"
},
"CMT_PMV_LH11": {
"cap": "60.260",
"res": "15.190"
},
"CMT_PMV_LH12": {
"cap": "60.260",
"res": "15.190"
},
"CMT_PMV_LH2": {
"cap": "60.260",
"res": "15.190"
@ -247,8 +235,28 @@
"cap": "60.260",
"res": "15.190"
},
"CMT_PMV_LH10": {
"cap": "60.260",
"res": "15.190"
},
"CMT_PMV_LH11": {
"cap": "60.260",
"res": "15.190"
},
"CMT_PMV_LH12": {
"cap": "60.260",
"res": "15.190"
},
"CMT_PMV_LOGIC_OUTS0": null,
"CMT_PMV_LOGIC_OUTS1": null,
"CMT_PMV_LOGIC_OUTS2": null,
"CMT_PMV_LOGIC_OUTS3": null,
"CMT_PMV_LOGIC_OUTS4": null,
"CMT_PMV_LOGIC_OUTS5": null,
"CMT_PMV_LOGIC_OUTS6": null,
"CMT_PMV_LOGIC_OUTS7": null,
"CMT_PMV_LOGIC_OUTS8": null,
"CMT_PMV_LOGIC_OUTS9": null,
"CMT_PMV_LOGIC_OUTS10": null,
"CMT_PMV_LOGIC_OUTS11": null,
"CMT_PMV_LOGIC_OUTS12": null,
@ -259,18 +267,10 @@
"CMT_PMV_LOGIC_OUTS17": null,
"CMT_PMV_LOGIC_OUTS18": null,
"CMT_PMV_LOGIC_OUTS19": null,
"CMT_PMV_LOGIC_OUTS2": null,
"CMT_PMV_LOGIC_OUTS20": null,
"CMT_PMV_LOGIC_OUTS21": null,
"CMT_PMV_LOGIC_OUTS22": null,
"CMT_PMV_LOGIC_OUTS23": null,
"CMT_PMV_LOGIC_OUTS3": null,
"CMT_PMV_LOGIC_OUTS4": null,
"CMT_PMV_LOGIC_OUTS5": null,
"CMT_PMV_LOGIC_OUTS6": null,
"CMT_PMV_LOGIC_OUTS7": null,
"CMT_PMV_LOGIC_OUTS8": null,
"CMT_PMV_LOGIC_OUTS9": null,
"CMT_PMV_MONITOR_N": null,
"CMT_PMV_MONITOR_P": null,
"CMT_PMV_NE2A0": {

14372
artix7/tile_type_CMT_TOP_L_LOWER_B.json
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3258
artix7/tile_type_CMT_TOP_L_LOWER_T.json
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artix7/tile_type_CMT_TOP_L_UPPER_B.json
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10108
artix7/tile_type_CMT_TOP_L_UPPER_T.json
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artix7/tile_type_CMT_TOP_R_LOWER_B.json
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artix7/tile_type_CMT_TOP_R_LOWER_T.json
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12868
artix7/tile_type_CMT_TOP_R_UPPER_B.json
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