Updating zynq7 based on "Merge pull request #836 from antmicro/sdf-sort".
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
This commit is contained in:
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Info.md
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Info.md
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@ -37,7 +37,7 @@ These files are released under the very permissive [CC0 1.0 Universal](COPYING).
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# Details
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Last updated on Thu May 30 18:22:08 UTC 2019 (2019-05-30T18:22:08+00:00).
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Last updated on Thu May 30 18:27:13 UTC 2019 (2019-05-30T18:27:13+00:00).
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Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [6e895f3](https://github.com/SymbiFlow/prjxray/commit/6e895f39c003e929942cc6af8c1378d14238d34f).
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@ -801,21 +801,23 @@ Results have checksums;
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* [`4f37a37c925f92956b6fc010034529a4cc37698ecb7dd263a0fe737ad600cde7 ./zynq7/mask_clbll_r.db`](./zynq7/mask_clbll_r.db)
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* [`5c274320294201935a3edccb43eca8e347ca1f0acded71ec388c794877d4b55b ./zynq7/mask_clblm_l.db`](./zynq7/mask_clblm_l.db)
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* [`5c274320294201935a3edccb43eca8e347ca1f0acded71ec388c794877d4b55b ./zynq7/mask_clblm_r.db`](./zynq7/mask_clblm_r.db)
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* [`f2932beb245918b0613c2abfad2b6d15c1cf31956d5a9ad9d76faec5e4dc54f7 ./zynq7/mask_clk_bufg_bot_r.db`](./zynq7/mask_clk_bufg_bot_r.db)
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* [`061f62437a067bb14f4904e40ca1bf01151eac5bef05867b7caf0c7de087c55e ./zynq7/mask_clk_bufg_bot_r.db`](./zynq7/mask_clk_bufg_bot_r.db)
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* [`fab582dba708b87f84b7d493cfc738317201a90cdf73a438a753f7512eee7dea ./zynq7/mask_clk_bufg_rebuf.db`](./zynq7/mask_clk_bufg_rebuf.db)
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* [`f2932beb245918b0613c2abfad2b6d15c1cf31956d5a9ad9d76faec5e4dc54f7 ./zynq7/mask_clk_bufg_top_r.db`](./zynq7/mask_clk_bufg_top_r.db)
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* [`54c076cbee2f848e15bc434a531fbe8fd2b73d3d3394c80b66e2b8ffa1a2b5c1 ./zynq7/mask_clk_hrow_bot_r.db`](./zynq7/mask_clk_hrow_bot_r.db)
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* [`54c076cbee2f848e15bc434a531fbe8fd2b73d3d3394c80b66e2b8ffa1a2b5c1 ./zynq7/mask_clk_hrow_top_r.db`](./zynq7/mask_clk_hrow_top_r.db)
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* [`061f62437a067bb14f4904e40ca1bf01151eac5bef05867b7caf0c7de087c55e ./zynq7/mask_clk_bufg_top_r.db`](./zynq7/mask_clk_bufg_top_r.db)
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* [`7d5219cfebf382e97dbb774dbb8cf0ba8736edabcd848a913819fd45474beba6 ./zynq7/mask_clk_hrow_bot_r.db`](./zynq7/mask_clk_hrow_bot_r.db)
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* [`7d5219cfebf382e97dbb774dbb8cf0ba8736edabcd848a913819fd45474beba6 ./zynq7/mask_clk_hrow_top_r.db`](./zynq7/mask_clk_hrow_top_r.db)
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* [`aab2e5f20890d805b6a78db6e6fd68d6024a140ac5e960feb4162d7e49582ca8 ./zynq7/mask_dsp_l.db`](./zynq7/mask_dsp_l.db)
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* [`aab2e5f20890d805b6a78db6e6fd68d6024a140ac5e960feb4162d7e49582ca8 ./zynq7/mask_dsp_r.db`](./zynq7/mask_dsp_r.db)
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* [`be757fb834be7ff84a2873c0ac6621c909a5e85362b397667760edde86616f84 ./zynq7/mask_hclk_cmt_l.db`](./zynq7/mask_hclk_cmt_l.db)
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* [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd ./zynq7/mask_hclk_l.db`](./zynq7/mask_hclk_l.db)
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* [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd ./zynq7/mask_hclk_r.db`](./zynq7/mask_hclk_r.db)
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* [`89a87d97a68658b2b9c7e9d6a68806179e82f3dd646d39e458c47d19f33172e9 ./zynq7/mask_liob33.db`](./zynq7/mask_liob33.db)
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* [`89a87d97a68658b2b9c7e9d6a68806179e82f3dd646d39e458c47d19f33172e9 ./zynq7/mask_riob33.db`](./zynq7/mask_riob33.db)
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* [`13dcba800fad00a8a87930bae3b302b32fd875c1a55e156616eadbb04e92ba58 ./zynq7/mask_liob33.db`](./zynq7/mask_liob33.db)
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* [`c45d74a80ffc51ec9ea12767877602de8432be7d5a11b5d1f4d81ad74e159d17 ./zynq7/mask_riob33.db`](./zynq7/mask_riob33.db)
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* [`d94e4d13df16da498224f0e94deaa310fbf471b6f9ec0ec8b2308fe62fa2eeaf ./zynq7/ppips_bram_int_interface_l.db`](./zynq7/ppips_bram_int_interface_l.db)
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* [`b48d766ac6f9dd0e21280d3a04dd448ea39016143309c0c7867fc00d730a59ae ./zynq7/ppips_bram_int_interface_r.db`](./zynq7/ppips_bram_int_interface_r.db)
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* [`2c68f8b128aeb79197013c3a1774522143a3507a8fa595a98c22dba2553fd5ce ./zynq7/ppips_bram_l.db`](./zynq7/ppips_bram_l.db)
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* [`e58acdfa3cc740d2346dcb5d3a4c13434d459ebdc2ceb655dcb65fd631da4e4d ./zynq7/ppips_bram_r.db`](./zynq7/ppips_bram_r.db)
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* [`be58cd551e870914cff515baabe383dc2655f34f5332c395ceb20ca25414dd63 ./zynq7/ppips_brkh_int.db`](./zynq7/ppips_brkh_int.db)
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* [`b4ffdb01ca695c7d52f34b88508aef6d596377fcffd7fa5e197212acc4b00e9a ./zynq7/ppips_clbll_l.db`](./zynq7/ppips_clbll_l.db)
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* [`bb75573609f56f082544644ecbb39125d023809340f7a30180cb9df823585009 ./zynq7/ppips_clbll_r.db`](./zynq7/ppips_clbll_r.db)
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* [`a5357b0c018ac9c8c1f8cccf3c36b69f66ffd0e29039dfadb5a829caafd71a73 ./zynq7/ppips_clblm_l.db`](./zynq7/ppips_clblm_l.db)
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@ -834,6 +836,7 @@ Results have checksums;
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* [`df11ac1c71eefa9c06abe06bc932d36368977543fba9666ee1b36e8417cd9f78 ./zynq7/ppips_rioi3.db`](./zynq7/ppips_rioi3.db)
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* [`0c6263c13669085c09a61f25d68786d8f6c9b12b162fe2cd6c9a50114106f739 ./zynq7/ppips_rioi3_sing.db`](./zynq7/ppips_rioi3_sing.db)
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* [`76c5978b345f11a9e46733a98875a6c419b75cf863a0e42d05e9ac94f9795bfc ./zynq7/ppips_rioi3_tbytesrc.db`](./zynq7/ppips_rioi3_tbytesrc.db)
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* [`a9705cd0ffc8f972a6c0981d65b200a93f0b0069327133bad2aff80a6fce08ab ./zynq7/ppips_rioi3_tbyteterm.db`](./zynq7/ppips_rioi3_tbyteterm.db)
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* [`8a2136e564ac92c06b226ef8715a122050fcabbb063f69eeaf46cfee5c89670f ./zynq7/segbits_bram_l.block_ram.db`](./zynq7/segbits_bram_l.block_ram.db)
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* [`53d975bf59b763b9f764106db362ee7f6a753e9e72a5e2be334041658a5ea4ba ./zynq7/segbits_bram_l.db`](./zynq7/segbits_bram_l.db)
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* [`a635577b55878c69df492c16b67a1dfbd1d4b786a695abe3e95a62d9540ecea5 ./zynq7/segbits_bram_r.block_ram.db`](./zynq7/segbits_bram_r.block_ram.db)
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@ -842,19 +845,20 @@ Results have checksums;
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* [`53c0ea2b05a2c4ddf2b6cce38073534d0c21b893fc5783dc777d97de2f2d6a9e ./zynq7/segbits_clbll_r.db`](./zynq7/segbits_clbll_r.db)
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* [`e6459c01d0c1c7724fa02716103fd02a3e2a75d6b7326f4c937f158a264ffe85 ./zynq7/segbits_clblm_l.db`](./zynq7/segbits_clblm_l.db)
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* [`5862b402a5e0a95be5f140112678fd39e1dc039bc339fda0e58111ca1ee9cb6e ./zynq7/segbits_clblm_r.db`](./zynq7/segbits_clblm_r.db)
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* [`b5e65e9c7e93a2d83f34aacf0e052154324afed5d6ba77008e3f79dedc8caf32 ./zynq7/segbits_clk_bufg_bot_r.db`](./zynq7/segbits_clk_bufg_bot_r.db)
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* [`3b9c63e801f7c8b683f2fbe0f64410a76abf611cbe001c30448da35a941d116d ./zynq7/segbits_clk_bufg_rebuf.db`](./zynq7/segbits_clk_bufg_rebuf.db)
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* [`0124518f026fd29ff7d48e9fe12fd9c5b189e8ca9e1257dc9decb714ee45c27b ./zynq7/segbits_clk_bufg_top_r.db`](./zynq7/segbits_clk_bufg_top_r.db)
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* [`baafdf449690428a45c1ecd6f7b774779cd7485438560f154f18d142663c1770 ./zynq7/segbits_clk_hrow_bot_r.db`](./zynq7/segbits_clk_hrow_bot_r.db)
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* [`4737c35514cc6acc472db3e06ffe048669a749199392a999dc65f2f0e779d8a3 ./zynq7/segbits_clk_hrow_top_r.db`](./zynq7/segbits_clk_hrow_top_r.db)
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* [`8d43bd09b2f7127ff9ed4803b92303d72c827d10b8b8d943c295343257b3e818 ./zynq7/segbits_clk_bufg_bot_r.db`](./zynq7/segbits_clk_bufg_bot_r.db)
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* [`d094c55a62408bd79c2606a8fc10839b23d979e4e924ced0d4276d285db7810f ./zynq7/segbits_clk_bufg_rebuf.db`](./zynq7/segbits_clk_bufg_rebuf.db)
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* [`6da9671e724a74e370b805ddd47e04eefd89daa0af4331e841720f7586d7eb2a ./zynq7/segbits_clk_bufg_top_r.db`](./zynq7/segbits_clk_bufg_top_r.db)
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* [`4383aafad32f56f21404c5e6092811874f869c920e23a02b57da8c3e739fe2a9 ./zynq7/segbits_clk_hrow_bot_r.db`](./zynq7/segbits_clk_hrow_bot_r.db)
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* [`972ea949e0bc360892d15ec0313d04e416a10a10fa594f3c361d37c357d59992 ./zynq7/segbits_clk_hrow_top_r.db`](./zynq7/segbits_clk_hrow_top_r.db)
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* [`0c4a6e4bc385a8b3a43d05a06d8e87c8822cf2cc1742593167244ff194af4a5e ./zynq7/segbits_dsp_l.db`](./zynq7/segbits_dsp_l.db)
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* [`b014d7e2b101b0b0540a539cb74a76ccbe3a494e225e8e510bf258a457b18685 ./zynq7/segbits_dsp_r.db`](./zynq7/segbits_dsp_r.db)
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* [`65c83253dc05bb790d71edc7f868f2f8c7e4d4c7817f073b9c853c1ac2e075b0 ./zynq7/segbits_hclk_cmt_l.db`](./zynq7/segbits_hclk_cmt_l.db)
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* [`1c2c7229781a4a1d51bbbdeea76238b10497c043aaadf2a76de783041a201878 ./zynq7/segbits_hclk_l.db`](./zynq7/segbits_hclk_l.db)
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* [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9 ./zynq7/segbits_hclk_r.db`](./zynq7/segbits_hclk_r.db)
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* [`39088cc92049e22e4d8a49aa0b7cc2ab468b9994a2e1d1c65388b3df6a0fc290 ./zynq7/segbits_int_l.db`](./zynq7/segbits_int_l.db)
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* [`760f9291e1c4ff7c9d0e8a35e9047d4bb157ee9b99ccafbfa1329daa39de48b1 ./zynq7/segbits_int_r.db`](./zynq7/segbits_int_r.db)
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* [`bed06fc405947c72a47a7fbac7adbc220efd2dc8d73f321ed70b8d2490ab745b ./zynq7/segbits_liob33.db`](./zynq7/segbits_liob33.db)
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* [`8ec421f8f4ce1bab7e81bcbf0cbdc37fb3f6ed4715bc2fdf75db336805efc53e ./zynq7/segbits_riob33.db`](./zynq7/segbits_riob33.db)
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* [`ebcb17bbb3ae3ea76b20e86ad7efda9a36b2ee024c4b08e6d5e8bbf4bc7838cc ./zynq7/segbits_int_l.db`](./zynq7/segbits_int_l.db)
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* [`90ac156ad102fd7f83f22f4cbbef5e1216b057c8c92fc1eec957f3c69c8b4368 ./zynq7/segbits_int_r.db`](./zynq7/segbits_int_r.db)
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* [`d1ad493bd149ba47ac50a68fef57809d21a1ef36db63725317a12df9266ca8d8 ./zynq7/segbits_liob33.db`](./zynq7/segbits_liob33.db)
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* [`32cae09e1ab0ba143570d702cfee2a3e04948c131f6511e6040c684638c67ed4 ./zynq7/segbits_riob33.db`](./zynq7/segbits_riob33.db)
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* [`ee26e7dbf78c2a37118c49ce7edb5fa44afd51850a24824ba8b68e34366f0787 ./zynq7/settings.sh`](./zynq7/settings.sh)
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* [`ac6ba9ad814503f0fdc1dabb4292aaccd1a2195f5b348276cfee12aed3d96a70 ./zynq7/site_type_BSCAN.json`](./zynq7/site_type_BSCAN.json)
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* [`64724ba2f8af98df5e1d92e5c2da2e6d5a41eec6580f796405e271dadb4e63be ./zynq7/site_type_BUFGCTRL.json`](./zynq7/site_type_BUFGCTRL.json)
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@ -988,7 +992,96 @@ Results have checksums;
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* [`dee783006fa5b5964d20457323cad59171a60397d730e9fe0840389587695727 ./zynq7/tile_type_VBRK.json`](./zynq7/tile_type_VBRK.json)
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* [`004efcd7f9e172780ca7b8c379ec329bcfc52f86beaa1d997f41dbef7ac4a242 ./zynq7/tile_type_VFRAME.json`](./zynq7/tile_type_VFRAME.json)
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* [`e6d0ebf9b27f60f4afdab85a357bff4d7cf2cd77c3a6c0f2d887022cda874066 ./zynq7/tileconn.json`](./zynq7/tileconn.json)
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* [`2f47bc43658a75f97bc3b2eab79d2a5d3adc9cb008609d2ed94ddb76e1386e11 ./zynq7/tilegrid.json`](./zynq7/tilegrid.json)
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* [`93ae29cf7cd85ac8baf94a8e98cc7857d3cdd7ac0ad5720a42d6da1597b6d773 ./zynq7/tilegrid.json`](./zynq7/tilegrid.json)
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* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/BRAM_INT_INTERFACE_L.sdf`](./zynq7/timings/BRAM_INT_INTERFACE_L.sdf)
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* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/BRAM_INT_INTERFACE_R.sdf`](./zynq7/timings/BRAM_INT_INTERFACE_R.sdf)
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* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/BRAM_L.sdf`](./zynq7/timings/BRAM_L.sdf)
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* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/BRAM_R.sdf`](./zynq7/timings/BRAM_R.sdf)
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* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/BRKH_BRAM.sdf`](./zynq7/timings/BRKH_BRAM.sdf)
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* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/BRKH_CLB.sdf`](./zynq7/timings/BRKH_CLB.sdf)
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* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/BRKH_CLK.sdf`](./zynq7/timings/BRKH_CLK.sdf)
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* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/BRKH_CMT.sdf`](./zynq7/timings/BRKH_CMT.sdf)
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* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/BRKH_DSP_L.sdf`](./zynq7/timings/BRKH_DSP_L.sdf)
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* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/BRKH_DSP_R.sdf`](./zynq7/timings/BRKH_DSP_R.sdf)
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* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/BRKH_INT.sdf`](./zynq7/timings/BRKH_INT.sdf)
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* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/B_TERM_INT.sdf`](./zynq7/timings/B_TERM_INT.sdf)
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* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/B_TERM_INT_PSS.sdf`](./zynq7/timings/B_TERM_INT_PSS.sdf)
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* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/B_TERM_VBRK.sdf`](./zynq7/timings/B_TERM_VBRK.sdf)
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* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/CFG_CENTER_BOT.sdf`](./zynq7/timings/CFG_CENTER_BOT.sdf)
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* [`83ccaee1987ba044700bac18832ddd61404fbef77bad1465086b51663fdfaebb ./zynq7/timings/CFG_CENTER_MID.sdf`](./zynq7/timings/CFG_CENTER_MID.sdf)
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* [`dab292d74a3178e993758ff011d870048c152ee15bffa56f92cb77ec84a5f356 ./zynq7/timings/CFG_CENTER_TOP.sdf`](./zynq7/timings/CFG_CENTER_TOP.sdf)
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* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/CFG_SECURITY_BOT_PELE1.sdf`](./zynq7/timings/CFG_SECURITY_BOT_PELE1.sdf)
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* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/CFG_SECURITY_MID_PELE1.sdf`](./zynq7/timings/CFG_SECURITY_MID_PELE1.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/CFG_SECURITY_TOP_PELE1.sdf`](./zynq7/timings/CFG_SECURITY_TOP_PELE1.sdf)
|
||||
* [`99a8265d9d9b9504c7a9da30353540edd417faa80a44f8bee82ff9ecb1460ee3 ./zynq7/timings/CLBLL_L.sdf`](./zynq7/timings/CLBLL_L.sdf)
|
||||
* [`99a8265d9d9b9504c7a9da30353540edd417faa80a44f8bee82ff9ecb1460ee3 ./zynq7/timings/CLBLL_R.sdf`](./zynq7/timings/CLBLL_R.sdf)
|
||||
* [`f41ed5dac99cebce35cbb26a260384b41284c7a7f10d9bf34ebbda984cc01106 ./zynq7/timings/CLBLM_L.sdf`](./zynq7/timings/CLBLM_L.sdf)
|
||||
* [`f41ed5dac99cebce35cbb26a260384b41284c7a7f10d9bf34ebbda984cc01106 ./zynq7/timings/CLBLM_R.sdf`](./zynq7/timings/CLBLM_R.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/CLK_BUFG_BOT_R.sdf`](./zynq7/timings/CLK_BUFG_BOT_R.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/CLK_BUFG_REBUF.sdf`](./zynq7/timings/CLK_BUFG_REBUF.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/CLK_BUFG_TOP_R.sdf`](./zynq7/timings/CLK_BUFG_TOP_R.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/CLK_FEED.sdf`](./zynq7/timings/CLK_FEED.sdf)
|
||||
* [`7c371dfcc5b331fe8067db83aae601f7a442a1ec2e9cd340aec83ae1b19d53c2 ./zynq7/timings/CLK_HROW_BOT_R.sdf`](./zynq7/timings/CLK_HROW_BOT_R.sdf)
|
||||
* [`7c371dfcc5b331fe8067db83aae601f7a442a1ec2e9cd340aec83ae1b19d53c2 ./zynq7/timings/CLK_HROW_TOP_R.sdf`](./zynq7/timings/CLK_HROW_TOP_R.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/CLK_MTBF2.sdf`](./zynq7/timings/CLK_MTBF2.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/CLK_PMV.sdf`](./zynq7/timings/CLK_PMV.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/CLK_PMV2.sdf`](./zynq7/timings/CLK_PMV2.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/CLK_PMV2_SVT.sdf`](./zynq7/timings/CLK_PMV2_SVT.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/CLK_PMVIOB.sdf`](./zynq7/timings/CLK_PMVIOB.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/CLK_TERM.sdf`](./zynq7/timings/CLK_TERM.sdf)
|
||||
* [`a69c35413d0acfc143124ba92da4bd0e06b219e7d653db33a2e0606f0bdf988c ./zynq7/timings/CMT_FIFO_L.sdf`](./zynq7/timings/CMT_FIFO_L.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/CMT_PMV_L.sdf`](./zynq7/timings/CMT_PMV_L.sdf)
|
||||
* [`9f3433d4e11f99aa29cc44cc2ddd44e53f582eebb41eca4bd8ec893b014b50e2 ./zynq7/timings/CMT_TOP_L_LOWER_B.sdf`](./zynq7/timings/CMT_TOP_L_LOWER_B.sdf)
|
||||
* [`31e8bf0838d94b1dfa4337a3c35a5971f5f1f9187d8ace9d1e9a413a054293c7 ./zynq7/timings/CMT_TOP_L_LOWER_T.sdf`](./zynq7/timings/CMT_TOP_L_LOWER_T.sdf)
|
||||
* [`01888b74b9bf90800da9210cf0acefa754106a21c1ea692a5825b15b1fd6b080 ./zynq7/timings/CMT_TOP_L_UPPER_B.sdf`](./zynq7/timings/CMT_TOP_L_UPPER_B.sdf)
|
||||
* [`58dcdaa7bed0e2d65c3587d59b5105ca78656ea5bf0822a3465c9cb6c2f5d80a ./zynq7/timings/CMT_TOP_L_UPPER_T.sdf`](./zynq7/timings/CMT_TOP_L_UPPER_T.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/HCLK_BRAM.sdf`](./zynq7/timings/HCLK_BRAM.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/HCLK_CLB.sdf`](./zynq7/timings/HCLK_CLB.sdf)
|
||||
* [`7ea90fd789cd110607d2deaf05bf2805751cfc5fe12d166e54b2ea44605d54aa ./zynq7/timings/HCLK_CMT_L.sdf`](./zynq7/timings/HCLK_CMT_L.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/HCLK_DSP_L.sdf`](./zynq7/timings/HCLK_DSP_L.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/HCLK_DSP_R.sdf`](./zynq7/timings/HCLK_DSP_R.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/HCLK_FEEDTHRU_1.sdf`](./zynq7/timings/HCLK_FEEDTHRU_1.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/HCLK_FEEDTHRU_1_PELE.sdf`](./zynq7/timings/HCLK_FEEDTHRU_1_PELE.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/HCLK_FEEDTHRU_2.sdf`](./zynq7/timings/HCLK_FEEDTHRU_2.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/HCLK_FIFO_L.sdf`](./zynq7/timings/HCLK_FIFO_L.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/HCLK_INT_INTERFACE.sdf`](./zynq7/timings/HCLK_INT_INTERFACE.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/HCLK_IOB.sdf`](./zynq7/timings/HCLK_IOB.sdf)
|
||||
* [`d4c7a8e99f9f1776bb03dffbea751fb5c72b3ba5f4ddaf0edcd6050bd117279d ./zynq7/timings/HCLK_IOI3.sdf`](./zynq7/timings/HCLK_IOI3.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/HCLK_L.sdf`](./zynq7/timings/HCLK_L.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/HCLK_R.sdf`](./zynq7/timings/HCLK_R.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/HCLK_TERM.sdf`](./zynq7/timings/HCLK_TERM.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/HCLK_VBRK.sdf`](./zynq7/timings/HCLK_VBRK.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/HCLK_VFRAME.sdf`](./zynq7/timings/HCLK_VFRAME.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/INT_FEEDTHRU_1.sdf`](./zynq7/timings/INT_FEEDTHRU_1.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/INT_FEEDTHRU_2.sdf`](./zynq7/timings/INT_FEEDTHRU_2.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/INT_INTERFACE_L.sdf`](./zynq7/timings/INT_INTERFACE_L.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/INT_INTERFACE_PSS_L.sdf`](./zynq7/timings/INT_INTERFACE_PSS_L.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/INT_INTERFACE_R.sdf`](./zynq7/timings/INT_INTERFACE_R.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/INT_L.sdf`](./zynq7/timings/INT_L.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/INT_R.sdf`](./zynq7/timings/INT_R.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/IO_INT_INTERFACE_R.sdf`](./zynq7/timings/IO_INT_INTERFACE_R.sdf)
|
||||
* [`766fd9751c301c63c9a07425bb51225d824c60782e9e119f6d1fdcb2da9d51f1 ./zynq7/timings/MONITOR_BOT_PELE1.sdf`](./zynq7/timings/MONITOR_BOT_PELE1.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/MONITOR_MID_PELE1.sdf`](./zynq7/timings/MONITOR_MID_PELE1.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/MONITOR_TOP_PELE1.sdf`](./zynq7/timings/MONITOR_TOP_PELE1.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/PCIE_NULL.sdf`](./zynq7/timings/PCIE_NULL.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/PSS0.sdf`](./zynq7/timings/PSS0.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/PSS1.sdf`](./zynq7/timings/PSS1.sdf)
|
||||
* [`3cd28a408ec8b72e5659564f253748fecf0c742222540b8b1d30c9daf270afcf ./zynq7/timings/PSS2.sdf`](./zynq7/timings/PSS2.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/PSS3.sdf`](./zynq7/timings/PSS3.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/PSS4.sdf`](./zynq7/timings/PSS4.sdf)
|
||||
* [`07d02169a43e8006ed50d8061f1a8a07677bfccb95999804f14b42021c43b4d8 ./zynq7/timings/RIOB33.sdf`](./zynq7/timings/RIOB33.sdf)
|
||||
* [`9befc627c1bb83308433ab488ade8d0e4e26dd59490d8d8f622a68406077b04f ./zynq7/timings/RIOB33_SING.sdf`](./zynq7/timings/RIOB33_SING.sdf)
|
||||
* [`f16cfa12415250f8d01ae89a5d4905af262293217cfd25314be2607a15e32a81 ./zynq7/timings/RIOI3.sdf`](./zynq7/timings/RIOI3.sdf)
|
||||
* [`f16cfa12415250f8d01ae89a5d4905af262293217cfd25314be2607a15e32a81 ./zynq7/timings/RIOI3_SING.sdf`](./zynq7/timings/RIOI3_SING.sdf)
|
||||
* [`f16cfa12415250f8d01ae89a5d4905af262293217cfd25314be2607a15e32a81 ./zynq7/timings/RIOI3_TBYTESRC.sdf`](./zynq7/timings/RIOI3_TBYTESRC.sdf)
|
||||
* [`f16cfa12415250f8d01ae89a5d4905af262293217cfd25314be2607a15e32a81 ./zynq7/timings/RIOI3_TBYTETERM.sdf`](./zynq7/timings/RIOI3_TBYTETERM.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/R_TERM_INT.sdf`](./zynq7/timings/R_TERM_INT.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/TERM_CMT.sdf`](./zynq7/timings/TERM_CMT.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/T_TERM_INT.sdf`](./zynq7/timings/T_TERM_INT.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/VBRK.sdf`](./zynq7/timings/VBRK.sdf)
|
||||
* [`fdbd15cd9a5b54d402980d250333c7ab8bdbff2f89eaffbc8053e1afde4dbfd5 ./zynq7/timings/VFRAME.sdf`](./zynq7/timings/VFRAME.sdf)
|
||||
* [`6187d7fa039c02e852bd43d318462c25fccd3d84a665c12299c511e11799eb46 ./zynq7/timings/slicel.sdf`](./zynq7/timings/slicel.sdf)
|
||||
* [`9459f4403f9b458b62fe8191ec07e9ca059fe623a9f86d23ee12bf02242b9062 ./zynq7/timings/slicem.sdf`](./zynq7/timings/slicem.sdf)
|
||||
* [`f3704845c7559e0289c9a1c6f42a7874be6d5d7aef3e0f285647b8ca62a154b3 ./zynq7/xc7z010clg400-1.json`](./zynq7/xc7z010clg400-1.json)
|
||||
* [`43a136f26603c51bd97e9489d223bbc80f278fcc234225ed9fde404402f22683 ./zynq7/xc7z010clg400-1.yaml`](./zynq7/xc7z010clg400-1.yaml)
|
||||
* [`d9914c14b3a8d59c76dd5992c4727e4002acd5e14b32c1afe49f7be8798e4db9 ./zynq7/xc7z010clg400-1_package_pins.csv`](./zynq7/xc7z010clg400-1_package_pins.csv)
|
||||
|
|
|
|||
|
|
@ -861,177 +861,305 @@ bit 25_249
|
|||
bit 25_251
|
||||
bit 26_01
|
||||
bit 26_02
|
||||
bit 26_04
|
||||
bit 26_05
|
||||
bit 26_07
|
||||
bit 26_08
|
||||
bit 26_11
|
||||
bit 26_12
|
||||
bit 26_14
|
||||
bit 26_17
|
||||
bit 26_18
|
||||
bit 26_20
|
||||
bit 26_21
|
||||
bit 26_23
|
||||
bit 26_24
|
||||
bit 26_27
|
||||
bit 26_28
|
||||
bit 26_30
|
||||
bit 26_33
|
||||
bit 26_34
|
||||
bit 26_36
|
||||
bit 26_37
|
||||
bit 26_39
|
||||
bit 26_40
|
||||
bit 26_43
|
||||
bit 26_44
|
||||
bit 26_46
|
||||
bit 26_49
|
||||
bit 26_50
|
||||
bit 26_52
|
||||
bit 26_53
|
||||
bit 26_55
|
||||
bit 26_56
|
||||
bit 26_59
|
||||
bit 26_60
|
||||
bit 26_62
|
||||
bit 26_65
|
||||
bit 26_66
|
||||
bit 26_68
|
||||
bit 26_69
|
||||
bit 26_71
|
||||
bit 26_72
|
||||
bit 26_75
|
||||
bit 26_76
|
||||
bit 26_78
|
||||
bit 26_81
|
||||
bit 26_82
|
||||
bit 26_84
|
||||
bit 26_85
|
||||
bit 26_87
|
||||
bit 26_88
|
||||
bit 26_91
|
||||
bit 26_92
|
||||
bit 26_94
|
||||
bit 26_97
|
||||
bit 26_98
|
||||
bit 26_100
|
||||
bit 26_101
|
||||
bit 26_103
|
||||
bit 26_104
|
||||
bit 26_107
|
||||
bit 26_108
|
||||
bit 26_110
|
||||
bit 26_113
|
||||
bit 26_114
|
||||
bit 26_116
|
||||
bit 26_117
|
||||
bit 26_119
|
||||
bit 26_120
|
||||
bit 26_123
|
||||
bit 26_124
|
||||
bit 26_126
|
||||
bit 26_129
|
||||
bit 26_130
|
||||
bit 26_132
|
||||
bit 26_133
|
||||
bit 26_135
|
||||
bit 26_136
|
||||
bit 26_139
|
||||
bit 26_140
|
||||
bit 26_142
|
||||
bit 26_145
|
||||
bit 26_146
|
||||
bit 26_148
|
||||
bit 26_149
|
||||
bit 26_151
|
||||
bit 26_152
|
||||
bit 26_155
|
||||
bit 26_156
|
||||
bit 26_158
|
||||
bit 26_161
|
||||
bit 26_162
|
||||
bit 26_164
|
||||
bit 26_165
|
||||
bit 26_167
|
||||
bit 26_168
|
||||
bit 26_171
|
||||
bit 26_172
|
||||
bit 26_174
|
||||
bit 26_177
|
||||
bit 26_178
|
||||
bit 26_180
|
||||
bit 26_181
|
||||
bit 26_183
|
||||
bit 26_184
|
||||
bit 26_187
|
||||
bit 26_188
|
||||
bit 26_190
|
||||
bit 26_193
|
||||
bit 26_194
|
||||
bit 26_196
|
||||
bit 26_197
|
||||
bit 26_199
|
||||
bit 26_200
|
||||
bit 26_203
|
||||
bit 26_204
|
||||
bit 26_206
|
||||
bit 26_209
|
||||
bit 26_210
|
||||
bit 26_212
|
||||
bit 26_213
|
||||
bit 26_215
|
||||
bit 26_216
|
||||
bit 26_219
|
||||
bit 26_220
|
||||
bit 26_222
|
||||
bit 26_225
|
||||
bit 26_226
|
||||
bit 26_228
|
||||
bit 26_229
|
||||
bit 26_231
|
||||
bit 26_232
|
||||
bit 26_235
|
||||
bit 26_236
|
||||
bit 26_238
|
||||
bit 26_241
|
||||
bit 26_242
|
||||
bit 26_244
|
||||
bit 26_245
|
||||
bit 26_247
|
||||
bit 26_248
|
||||
bit 26_251
|
||||
bit 26_252
|
||||
bit 26_254
|
||||
bit 27_00
|
||||
bit 27_02
|
||||
bit 27_03
|
||||
bit 27_05
|
||||
bit 27_06
|
||||
bit 27_11
|
||||
bit 27_12
|
||||
bit 27_13
|
||||
bit 27_14
|
||||
bit 27_15
|
||||
bit 27_16
|
||||
bit 27_18
|
||||
bit 27_19
|
||||
bit 27_21
|
||||
bit 27_22
|
||||
bit 27_27
|
||||
bit 27_28
|
||||
bit 27_29
|
||||
bit 27_30
|
||||
bit 27_31
|
||||
bit 27_32
|
||||
bit 27_34
|
||||
bit 27_35
|
||||
bit 27_37
|
||||
bit 27_38
|
||||
bit 27_43
|
||||
bit 27_44
|
||||
bit 27_45
|
||||
bit 27_46
|
||||
bit 27_47
|
||||
bit 27_48
|
||||
bit 27_50
|
||||
bit 27_51
|
||||
bit 27_53
|
||||
bit 27_54
|
||||
bit 27_59
|
||||
bit 27_60
|
||||
bit 27_61
|
||||
bit 27_62
|
||||
bit 27_63
|
||||
bit 27_64
|
||||
bit 27_66
|
||||
bit 27_67
|
||||
bit 27_69
|
||||
bit 27_70
|
||||
bit 27_75
|
||||
bit 27_76
|
||||
bit 27_77
|
||||
bit 27_78
|
||||
bit 27_79
|
||||
bit 27_80
|
||||
bit 27_82
|
||||
bit 27_83
|
||||
bit 27_85
|
||||
bit 27_86
|
||||
bit 27_91
|
||||
bit 27_92
|
||||
bit 27_93
|
||||
bit 27_94
|
||||
bit 27_95
|
||||
bit 27_96
|
||||
bit 27_98
|
||||
bit 27_99
|
||||
bit 27_101
|
||||
bit 27_102
|
||||
bit 27_107
|
||||
bit 27_108
|
||||
bit 27_109
|
||||
bit 27_110
|
||||
bit 27_111
|
||||
bit 27_112
|
||||
bit 27_114
|
||||
bit 27_115
|
||||
bit 27_117
|
||||
bit 27_118
|
||||
bit 27_123
|
||||
bit 27_124
|
||||
bit 27_125
|
||||
bit 27_126
|
||||
bit 27_127
|
||||
bit 27_128
|
||||
bit 27_130
|
||||
bit 27_131
|
||||
bit 27_133
|
||||
bit 27_134
|
||||
bit 27_139
|
||||
bit 27_140
|
||||
bit 27_141
|
||||
bit 27_142
|
||||
bit 27_143
|
||||
bit 27_144
|
||||
bit 27_146
|
||||
bit 27_147
|
||||
bit 27_149
|
||||
bit 27_150
|
||||
bit 27_155
|
||||
bit 27_156
|
||||
bit 27_157
|
||||
bit 27_158
|
||||
bit 27_159
|
||||
bit 27_160
|
||||
bit 27_162
|
||||
bit 27_163
|
||||
bit 27_165
|
||||
bit 27_166
|
||||
bit 27_171
|
||||
bit 27_172
|
||||
bit 27_173
|
||||
bit 27_174
|
||||
bit 27_175
|
||||
bit 27_176
|
||||
bit 27_178
|
||||
bit 27_179
|
||||
bit 27_181
|
||||
bit 27_182
|
||||
bit 27_187
|
||||
bit 27_188
|
||||
bit 27_189
|
||||
bit 27_190
|
||||
bit 27_191
|
||||
bit 27_192
|
||||
bit 27_194
|
||||
bit 27_195
|
||||
bit 27_197
|
||||
bit 27_198
|
||||
bit 27_203
|
||||
bit 27_204
|
||||
bit 27_205
|
||||
bit 27_206
|
||||
bit 27_207
|
||||
bit 27_208
|
||||
bit 27_210
|
||||
bit 27_211
|
||||
bit 27_213
|
||||
bit 27_214
|
||||
bit 27_219
|
||||
bit 27_220
|
||||
bit 27_221
|
||||
bit 27_222
|
||||
bit 27_223
|
||||
bit 27_224
|
||||
bit 27_226
|
||||
bit 27_227
|
||||
bit 27_229
|
||||
bit 27_230
|
||||
bit 27_235
|
||||
bit 27_236
|
||||
bit 27_237
|
||||
bit 27_238
|
||||
bit 27_239
|
||||
bit 27_240
|
||||
bit 27_242
|
||||
bit 27_243
|
||||
bit 27_245
|
||||
bit 27_246
|
||||
bit 27_251
|
||||
bit 27_252
|
||||
bit 27_253
|
||||
bit 27_254
|
||||
bit 27_255
|
||||
|
|
|
|||
|
|
@ -861,177 +861,305 @@ bit 25_249
|
|||
bit 25_251
|
||||
bit 26_01
|
||||
bit 26_02
|
||||
bit 26_04
|
||||
bit 26_05
|
||||
bit 26_07
|
||||
bit 26_08
|
||||
bit 26_11
|
||||
bit 26_12
|
||||
bit 26_14
|
||||
bit 26_17
|
||||
bit 26_18
|
||||
bit 26_20
|
||||
bit 26_21
|
||||
bit 26_23
|
||||
bit 26_24
|
||||
bit 26_27
|
||||
bit 26_28
|
||||
bit 26_30
|
||||
bit 26_33
|
||||
bit 26_34
|
||||
bit 26_36
|
||||
bit 26_37
|
||||
bit 26_39
|
||||
bit 26_40
|
||||
bit 26_43
|
||||
bit 26_44
|
||||
bit 26_46
|
||||
bit 26_49
|
||||
bit 26_50
|
||||
bit 26_52
|
||||
bit 26_53
|
||||
bit 26_55
|
||||
bit 26_56
|
||||
bit 26_59
|
||||
bit 26_60
|
||||
bit 26_62
|
||||
bit 26_65
|
||||
bit 26_66
|
||||
bit 26_68
|
||||
bit 26_69
|
||||
bit 26_71
|
||||
bit 26_72
|
||||
bit 26_75
|
||||
bit 26_76
|
||||
bit 26_78
|
||||
bit 26_81
|
||||
bit 26_82
|
||||
bit 26_84
|
||||
bit 26_85
|
||||
bit 26_87
|
||||
bit 26_88
|
||||
bit 26_91
|
||||
bit 26_92
|
||||
bit 26_94
|
||||
bit 26_97
|
||||
bit 26_98
|
||||
bit 26_100
|
||||
bit 26_101
|
||||
bit 26_103
|
||||
bit 26_104
|
||||
bit 26_107
|
||||
bit 26_108
|
||||
bit 26_110
|
||||
bit 26_113
|
||||
bit 26_114
|
||||
bit 26_116
|
||||
bit 26_117
|
||||
bit 26_119
|
||||
bit 26_120
|
||||
bit 26_123
|
||||
bit 26_124
|
||||
bit 26_126
|
||||
bit 26_129
|
||||
bit 26_130
|
||||
bit 26_132
|
||||
bit 26_133
|
||||
bit 26_135
|
||||
bit 26_136
|
||||
bit 26_139
|
||||
bit 26_140
|
||||
bit 26_142
|
||||
bit 26_145
|
||||
bit 26_146
|
||||
bit 26_148
|
||||
bit 26_149
|
||||
bit 26_151
|
||||
bit 26_152
|
||||
bit 26_155
|
||||
bit 26_156
|
||||
bit 26_158
|
||||
bit 26_161
|
||||
bit 26_162
|
||||
bit 26_164
|
||||
bit 26_165
|
||||
bit 26_167
|
||||
bit 26_168
|
||||
bit 26_171
|
||||
bit 26_172
|
||||
bit 26_174
|
||||
bit 26_177
|
||||
bit 26_178
|
||||
bit 26_180
|
||||
bit 26_181
|
||||
bit 26_183
|
||||
bit 26_184
|
||||
bit 26_187
|
||||
bit 26_188
|
||||
bit 26_190
|
||||
bit 26_193
|
||||
bit 26_194
|
||||
bit 26_196
|
||||
bit 26_197
|
||||
bit 26_199
|
||||
bit 26_200
|
||||
bit 26_203
|
||||
bit 26_204
|
||||
bit 26_206
|
||||
bit 26_209
|
||||
bit 26_210
|
||||
bit 26_212
|
||||
bit 26_213
|
||||
bit 26_215
|
||||
bit 26_216
|
||||
bit 26_219
|
||||
bit 26_220
|
||||
bit 26_222
|
||||
bit 26_225
|
||||
bit 26_226
|
||||
bit 26_228
|
||||
bit 26_229
|
||||
bit 26_231
|
||||
bit 26_232
|
||||
bit 26_235
|
||||
bit 26_236
|
||||
bit 26_238
|
||||
bit 26_241
|
||||
bit 26_242
|
||||
bit 26_244
|
||||
bit 26_245
|
||||
bit 26_247
|
||||
bit 26_248
|
||||
bit 26_251
|
||||
bit 26_252
|
||||
bit 26_254
|
||||
bit 27_00
|
||||
bit 27_02
|
||||
bit 27_03
|
||||
bit 27_05
|
||||
bit 27_06
|
||||
bit 27_11
|
||||
bit 27_12
|
||||
bit 27_13
|
||||
bit 27_14
|
||||
bit 27_15
|
||||
bit 27_16
|
||||
bit 27_18
|
||||
bit 27_19
|
||||
bit 27_21
|
||||
bit 27_22
|
||||
bit 27_27
|
||||
bit 27_28
|
||||
bit 27_29
|
||||
bit 27_30
|
||||
bit 27_31
|
||||
bit 27_32
|
||||
bit 27_34
|
||||
bit 27_35
|
||||
bit 27_37
|
||||
bit 27_38
|
||||
bit 27_43
|
||||
bit 27_44
|
||||
bit 27_45
|
||||
bit 27_46
|
||||
bit 27_47
|
||||
bit 27_48
|
||||
bit 27_50
|
||||
bit 27_51
|
||||
bit 27_53
|
||||
bit 27_54
|
||||
bit 27_59
|
||||
bit 27_60
|
||||
bit 27_61
|
||||
bit 27_62
|
||||
bit 27_63
|
||||
bit 27_64
|
||||
bit 27_66
|
||||
bit 27_67
|
||||
bit 27_69
|
||||
bit 27_70
|
||||
bit 27_75
|
||||
bit 27_76
|
||||
bit 27_77
|
||||
bit 27_78
|
||||
bit 27_79
|
||||
bit 27_80
|
||||
bit 27_82
|
||||
bit 27_83
|
||||
bit 27_85
|
||||
bit 27_86
|
||||
bit 27_91
|
||||
bit 27_92
|
||||
bit 27_93
|
||||
bit 27_94
|
||||
bit 27_95
|
||||
bit 27_96
|
||||
bit 27_98
|
||||
bit 27_99
|
||||
bit 27_101
|
||||
bit 27_102
|
||||
bit 27_107
|
||||
bit 27_108
|
||||
bit 27_109
|
||||
bit 27_110
|
||||
bit 27_111
|
||||
bit 27_112
|
||||
bit 27_114
|
||||
bit 27_115
|
||||
bit 27_117
|
||||
bit 27_118
|
||||
bit 27_123
|
||||
bit 27_124
|
||||
bit 27_125
|
||||
bit 27_126
|
||||
bit 27_127
|
||||
bit 27_128
|
||||
bit 27_130
|
||||
bit 27_131
|
||||
bit 27_133
|
||||
bit 27_134
|
||||
bit 27_139
|
||||
bit 27_140
|
||||
bit 27_141
|
||||
bit 27_142
|
||||
bit 27_143
|
||||
bit 27_144
|
||||
bit 27_146
|
||||
bit 27_147
|
||||
bit 27_149
|
||||
bit 27_150
|
||||
bit 27_155
|
||||
bit 27_156
|
||||
bit 27_157
|
||||
bit 27_158
|
||||
bit 27_159
|
||||
bit 27_160
|
||||
bit 27_162
|
||||
bit 27_163
|
||||
bit 27_165
|
||||
bit 27_166
|
||||
bit 27_171
|
||||
bit 27_172
|
||||
bit 27_173
|
||||
bit 27_174
|
||||
bit 27_175
|
||||
bit 27_176
|
||||
bit 27_178
|
||||
bit 27_179
|
||||
bit 27_181
|
||||
bit 27_182
|
||||
bit 27_187
|
||||
bit 27_188
|
||||
bit 27_189
|
||||
bit 27_190
|
||||
bit 27_191
|
||||
bit 27_192
|
||||
bit 27_194
|
||||
bit 27_195
|
||||
bit 27_197
|
||||
bit 27_198
|
||||
bit 27_203
|
||||
bit 27_204
|
||||
bit 27_205
|
||||
bit 27_206
|
||||
bit 27_207
|
||||
bit 27_208
|
||||
bit 27_210
|
||||
bit 27_211
|
||||
bit 27_213
|
||||
bit 27_214
|
||||
bit 27_219
|
||||
bit 27_220
|
||||
bit 27_221
|
||||
bit 27_222
|
||||
bit 27_223
|
||||
bit 27_224
|
||||
bit 27_226
|
||||
bit 27_227
|
||||
bit 27_229
|
||||
bit 27_230
|
||||
bit 27_235
|
||||
bit 27_236
|
||||
bit 27_237
|
||||
bit 27_238
|
||||
bit 27_239
|
||||
bit 27_240
|
||||
bit 27_242
|
||||
bit 27_243
|
||||
bit 27_245
|
||||
bit 27_246
|
||||
bit 27_251
|
||||
bit 27_252
|
||||
bit 27_253
|
||||
bit 27_254
|
||||
bit 27_255
|
||||
|
|
|
|||
|
|
@ -1,508 +1,96 @@
|
|||
bit 00_49
|
||||
bit 00_57
|
||||
bit 00_58
|
||||
bit 00_59
|
||||
bit 00_61
|
||||
bit 00_145
|
||||
bit 00_150
|
||||
bit 00_153
|
||||
bit 00_154
|
||||
bit 00_155
|
||||
bit 00_157
|
||||
bit 01_45
|
||||
bit 01_53
|
||||
bit 01_56
|
||||
bit 01_57
|
||||
bit 01_58
|
||||
bit 01_141
|
||||
bit 01_148
|
||||
bit 01_149
|
||||
bit 01_152
|
||||
bit 01_153
|
||||
bit 01_154
|
||||
bit 21_72
|
||||
bit 21_168
|
||||
bit 25_72
|
||||
bit 25_168
|
||||
bit 26_03
|
||||
bit 26_09
|
||||
bit 26_10
|
||||
bit 26_11
|
||||
bit 26_12
|
||||
bit 26_13
|
||||
bit 26_14
|
||||
bit 26_15
|
||||
bit 26_19
|
||||
bit 26_25
|
||||
bit 26_26
|
||||
bit 26_27
|
||||
bit 26_28
|
||||
bit 26_29
|
||||
bit 26_30
|
||||
bit 26_31
|
||||
bit 26_35
|
||||
bit 26_41
|
||||
bit 26_42
|
||||
bit 26_43
|
||||
bit 26_44
|
||||
bit 26_45
|
||||
bit 26_46
|
||||
bit 26_47
|
||||
bit 26_51
|
||||
bit 26_57
|
||||
bit 26_58
|
||||
bit 26_59
|
||||
bit 26_60
|
||||
bit 26_61
|
||||
bit 26_62
|
||||
bit 26_63
|
||||
bit 26_67
|
||||
bit 26_73
|
||||
bit 26_74
|
||||
bit 26_75
|
||||
bit 26_76
|
||||
bit 26_77
|
||||
bit 26_78
|
||||
bit 26_79
|
||||
bit 26_83
|
||||
bit 26_89
|
||||
bit 26_90
|
||||
bit 26_91
|
||||
bit 26_92
|
||||
bit 26_93
|
||||
bit 26_94
|
||||
bit 26_95
|
||||
bit 26_119
|
||||
bit 26_120
|
||||
bit 26_121
|
||||
bit 26_122
|
||||
bit 26_123
|
||||
bit 26_124
|
||||
bit 26_125
|
||||
bit 26_126
|
||||
bit 26_127
|
||||
bit 26_131
|
||||
bit 26_137
|
||||
bit 26_138
|
||||
bit 26_139
|
||||
bit 26_140
|
||||
bit 26_141
|
||||
bit 26_142
|
||||
bit 26_143
|
||||
bit 26_147
|
||||
bit 26_153
|
||||
bit 26_154
|
||||
bit 26_155
|
||||
bit 26_156
|
||||
bit 26_157
|
||||
bit 26_158
|
||||
bit 26_159
|
||||
bit 26_163
|
||||
bit 26_169
|
||||
bit 26_170
|
||||
bit 26_171
|
||||
bit 26_172
|
||||
bit 26_173
|
||||
bit 26_174
|
||||
bit 26_175
|
||||
bit 26_179
|
||||
bit 26_185
|
||||
bit 26_186
|
||||
bit 26_187
|
||||
bit 26_188
|
||||
bit 26_189
|
||||
bit 26_190
|
||||
bit 26_191
|
||||
bit 26_195
|
||||
bit 26_201
|
||||
bit 26_202
|
||||
bit 26_203
|
||||
bit 26_204
|
||||
bit 26_205
|
||||
bit 26_206
|
||||
bit 26_207
|
||||
bit 26_211
|
||||
bit 26_217
|
||||
bit 26_218
|
||||
bit 26_219
|
||||
bit 26_220
|
||||
bit 26_221
|
||||
bit 26_222
|
||||
bit 26_223
|
||||
bit 27_03
|
||||
bit 27_06
|
||||
bit 27_07
|
||||
bit 27_09
|
||||
bit 27_10
|
||||
bit 27_11
|
||||
bit 27_12
|
||||
bit 27_13
|
||||
bit 27_14
|
||||
bit 27_15
|
||||
bit 27_19
|
||||
bit 27_22
|
||||
bit 27_23
|
||||
bit 27_25
|
||||
bit 27_26
|
||||
bit 27_27
|
||||
bit 27_28
|
||||
bit 27_29
|
||||
bit 27_30
|
||||
bit 27_31
|
||||
bit 27_35
|
||||
bit 27_38
|
||||
bit 27_39
|
||||
bit 27_41
|
||||
bit 27_42
|
||||
bit 27_43
|
||||
bit 27_44
|
||||
bit 27_45
|
||||
bit 27_46
|
||||
bit 27_47
|
||||
bit 27_51
|
||||
bit 27_54
|
||||
bit 27_55
|
||||
bit 27_57
|
||||
bit 27_58
|
||||
bit 27_59
|
||||
bit 27_60
|
||||
bit 27_61
|
||||
bit 27_62
|
||||
bit 27_63
|
||||
bit 27_67
|
||||
bit 27_70
|
||||
bit 27_71
|
||||
bit 27_73
|
||||
bit 27_74
|
||||
bit 27_75
|
||||
bit 27_76
|
||||
bit 27_77
|
||||
bit 27_78
|
||||
bit 27_79
|
||||
bit 27_83
|
||||
bit 27_86
|
||||
bit 27_87
|
||||
bit 27_89
|
||||
bit 27_90
|
||||
bit 27_91
|
||||
bit 27_92
|
||||
bit 27_93
|
||||
bit 27_94
|
||||
bit 27_95
|
||||
bit 27_119
|
||||
bit 27_120
|
||||
bit 27_121
|
||||
bit 27_122
|
||||
bit 27_123
|
||||
bit 27_124
|
||||
bit 27_125
|
||||
bit 27_126
|
||||
bit 27_127
|
||||
bit 27_131
|
||||
bit 27_134
|
||||
bit 27_135
|
||||
bit 27_137
|
||||
bit 27_138
|
||||
bit 27_139
|
||||
bit 27_140
|
||||
bit 27_141
|
||||
bit 27_142
|
||||
bit 27_143
|
||||
bit 27_147
|
||||
bit 27_150
|
||||
bit 27_151
|
||||
bit 27_153
|
||||
bit 27_154
|
||||
bit 27_155
|
||||
bit 27_156
|
||||
bit 27_157
|
||||
bit 27_158
|
||||
bit 27_159
|
||||
bit 26_227
|
||||
bit 26_243
|
||||
bit 26_291
|
||||
bit 26_307
|
||||
bit 26_323
|
||||
bit 26_339
|
||||
bit 26_355
|
||||
bit 26_371
|
||||
bit 27_163
|
||||
bit 27_166
|
||||
bit 27_167
|
||||
bit 27_169
|
||||
bit 27_170
|
||||
bit 27_171
|
||||
bit 27_172
|
||||
bit 27_173
|
||||
bit 27_174
|
||||
bit 27_175
|
||||
bit 27_179
|
||||
bit 27_182
|
||||
bit 27_183
|
||||
bit 27_185
|
||||
bit 27_186
|
||||
bit 27_187
|
||||
bit 27_188
|
||||
bit 27_189
|
||||
bit 27_190
|
||||
bit 27_191
|
||||
bit 27_195
|
||||
bit 27_198
|
||||
bit 27_199
|
||||
bit 27_201
|
||||
bit 27_202
|
||||
bit 27_203
|
||||
bit 27_204
|
||||
bit 27_205
|
||||
bit 27_206
|
||||
bit 27_207
|
||||
bit 27_211
|
||||
bit 27_214
|
||||
bit 27_215
|
||||
bit 27_217
|
||||
bit 27_218
|
||||
bit 27_219
|
||||
bit 27_220
|
||||
bit 27_221
|
||||
bit 27_222
|
||||
bit 27_223
|
||||
bit 28_03
|
||||
bit 28_09
|
||||
bit 28_10
|
||||
bit 28_11
|
||||
bit 28_12
|
||||
bit 28_13
|
||||
bit 28_14
|
||||
bit 28_15
|
||||
bit 28_19
|
||||
bit 28_25
|
||||
bit 28_26
|
||||
bit 28_27
|
||||
bit 28_28
|
||||
bit 28_29
|
||||
bit 28_30
|
||||
bit 28_31
|
||||
bit 28_35
|
||||
bit 28_41
|
||||
bit 28_42
|
||||
bit 28_43
|
||||
bit 28_44
|
||||
bit 28_45
|
||||
bit 28_46
|
||||
bit 28_47
|
||||
bit 28_51
|
||||
bit 28_57
|
||||
bit 28_58
|
||||
bit 28_59
|
||||
bit 28_60
|
||||
bit 28_61
|
||||
bit 28_62
|
||||
bit 28_63
|
||||
bit 28_67
|
||||
bit 28_73
|
||||
bit 28_74
|
||||
bit 28_75
|
||||
bit 28_76
|
||||
bit 28_77
|
||||
bit 28_78
|
||||
bit 28_79
|
||||
bit 28_80
|
||||
bit 28_81
|
||||
bit 28_83
|
||||
bit 28_89
|
||||
bit 28_90
|
||||
bit 28_91
|
||||
bit 28_92
|
||||
bit 28_93
|
||||
bit 28_94
|
||||
bit 28_95
|
||||
bit 28_114
|
||||
bit 28_115
|
||||
bit 28_116
|
||||
bit 28_117
|
||||
bit 28_118
|
||||
bit 28_119
|
||||
bit 28_120
|
||||
bit 28_121
|
||||
bit 28_122
|
||||
bit 28_123
|
||||
bit 28_124
|
||||
bit 28_125
|
||||
bit 28_126
|
||||
bit 28_127
|
||||
bit 28_131
|
||||
bit 28_137
|
||||
bit 28_138
|
||||
bit 28_139
|
||||
bit 28_140
|
||||
bit 28_141
|
||||
bit 28_142
|
||||
bit 28_143
|
||||
bit 28_147
|
||||
bit 28_153
|
||||
bit 28_154
|
||||
bit 28_155
|
||||
bit 28_156
|
||||
bit 28_157
|
||||
bit 28_158
|
||||
bit 28_159
|
||||
bit 27_227
|
||||
bit 27_230
|
||||
bit 27_231
|
||||
bit 27_243
|
||||
bit 27_246
|
||||
bit 27_247
|
||||
bit 27_291
|
||||
bit 27_294
|
||||
bit 27_295
|
||||
bit 27_307
|
||||
bit 27_310
|
||||
bit 27_311
|
||||
bit 27_323
|
||||
bit 27_326
|
||||
bit 27_327
|
||||
bit 27_339
|
||||
bit 27_342
|
||||
bit 27_343
|
||||
bit 27_355
|
||||
bit 27_358
|
||||
bit 27_359
|
||||
bit 27_371
|
||||
bit 27_374
|
||||
bit 27_375
|
||||
bit 28_163
|
||||
bit 28_169
|
||||
bit 28_170
|
||||
bit 28_171
|
||||
bit 28_172
|
||||
bit 28_173
|
||||
bit 28_174
|
||||
bit 28_175
|
||||
bit 28_179
|
||||
bit 28_185
|
||||
bit 28_186
|
||||
bit 28_187
|
||||
bit 28_188
|
||||
bit 28_189
|
||||
bit 28_190
|
||||
bit 28_191
|
||||
bit 28_195
|
||||
bit 28_201
|
||||
bit 28_202
|
||||
bit 28_203
|
||||
bit 28_204
|
||||
bit 28_205
|
||||
bit 28_206
|
||||
bit 28_207
|
||||
bit 28_211
|
||||
bit 28_217
|
||||
bit 28_218
|
||||
bit 28_219
|
||||
bit 28_220
|
||||
bit 28_221
|
||||
bit 28_222
|
||||
bit 28_223
|
||||
bit 29_03
|
||||
bit 29_06
|
||||
bit 29_07
|
||||
bit 29_09
|
||||
bit 29_10
|
||||
bit 29_11
|
||||
bit 29_12
|
||||
bit 29_13
|
||||
bit 29_14
|
||||
bit 29_15
|
||||
bit 29_19
|
||||
bit 29_22
|
||||
bit 29_23
|
||||
bit 29_25
|
||||
bit 29_26
|
||||
bit 29_27
|
||||
bit 29_28
|
||||
bit 29_29
|
||||
bit 29_30
|
||||
bit 29_31
|
||||
bit 29_35
|
||||
bit 29_38
|
||||
bit 29_39
|
||||
bit 29_41
|
||||
bit 29_42
|
||||
bit 29_43
|
||||
bit 29_44
|
||||
bit 29_45
|
||||
bit 29_46
|
||||
bit 29_47
|
||||
bit 29_51
|
||||
bit 29_54
|
||||
bit 29_55
|
||||
bit 29_57
|
||||
bit 29_58
|
||||
bit 29_59
|
||||
bit 29_60
|
||||
bit 29_61
|
||||
bit 29_62
|
||||
bit 29_63
|
||||
bit 29_67
|
||||
bit 29_70
|
||||
bit 29_71
|
||||
bit 29_73
|
||||
bit 29_74
|
||||
bit 29_75
|
||||
bit 29_76
|
||||
bit 29_77
|
||||
bit 29_78
|
||||
bit 29_79
|
||||
bit 29_80
|
||||
bit 29_81
|
||||
bit 29_83
|
||||
bit 29_86
|
||||
bit 29_87
|
||||
bit 29_89
|
||||
bit 29_90
|
||||
bit 29_91
|
||||
bit 29_92
|
||||
bit 29_93
|
||||
bit 29_94
|
||||
bit 29_95
|
||||
bit 29_114
|
||||
bit 29_115
|
||||
bit 29_116
|
||||
bit 29_117
|
||||
bit 29_118
|
||||
bit 29_119
|
||||
bit 29_120
|
||||
bit 29_121
|
||||
bit 29_122
|
||||
bit 29_123
|
||||
bit 29_124
|
||||
bit 29_125
|
||||
bit 29_126
|
||||
bit 29_127
|
||||
bit 29_131
|
||||
bit 29_134
|
||||
bit 29_135
|
||||
bit 29_137
|
||||
bit 29_138
|
||||
bit 29_139
|
||||
bit 29_140
|
||||
bit 29_141
|
||||
bit 29_142
|
||||
bit 29_143
|
||||
bit 29_147
|
||||
bit 29_150
|
||||
bit 29_151
|
||||
bit 29_153
|
||||
bit 29_154
|
||||
bit 29_155
|
||||
bit 29_156
|
||||
bit 29_157
|
||||
bit 29_158
|
||||
bit 29_159
|
||||
bit 28_227
|
||||
bit 28_243
|
||||
bit 28_291
|
||||
bit 28_307
|
||||
bit 28_323
|
||||
bit 28_339
|
||||
bit 28_355
|
||||
bit 28_371
|
||||
bit 29_163
|
||||
bit 29_166
|
||||
bit 29_167
|
||||
bit 29_169
|
||||
bit 29_170
|
||||
bit 29_171
|
||||
bit 29_172
|
||||
bit 29_173
|
||||
bit 29_174
|
||||
bit 29_175
|
||||
bit 29_179
|
||||
bit 29_182
|
||||
bit 29_183
|
||||
bit 29_185
|
||||
bit 29_186
|
||||
bit 29_187
|
||||
bit 29_188
|
||||
bit 29_189
|
||||
bit 29_190
|
||||
bit 29_191
|
||||
bit 29_195
|
||||
bit 29_198
|
||||
bit 29_199
|
||||
bit 29_201
|
||||
bit 29_202
|
||||
bit 29_203
|
||||
bit 29_204
|
||||
bit 29_205
|
||||
bit 29_206
|
||||
bit 29_207
|
||||
bit 29_211
|
||||
bit 29_214
|
||||
bit 29_215
|
||||
bit 29_217
|
||||
bit 29_218
|
||||
bit 29_219
|
||||
bit 29_220
|
||||
bit 29_221
|
||||
bit 29_222
|
||||
bit 29_223
|
||||
bit 29_227
|
||||
bit 29_230
|
||||
bit 29_231
|
||||
bit 29_243
|
||||
bit 29_246
|
||||
bit 29_247
|
||||
bit 29_291
|
||||
bit 29_294
|
||||
bit 29_295
|
||||
bit 29_307
|
||||
bit 29_310
|
||||
bit 29_311
|
||||
bit 29_323
|
||||
bit 29_326
|
||||
bit 29_327
|
||||
bit 29_339
|
||||
bit 29_342
|
||||
bit 29_343
|
||||
bit 29_355
|
||||
bit 29_358
|
||||
bit 29_359
|
||||
bit 29_371
|
||||
bit 29_374
|
||||
bit 29_375
|
||||
|
|
|
|||
|
|
@ -1,508 +1,96 @@
|
|||
bit 00_49
|
||||
bit 00_57
|
||||
bit 00_58
|
||||
bit 00_59
|
||||
bit 00_61
|
||||
bit 00_145
|
||||
bit 00_150
|
||||
bit 00_153
|
||||
bit 00_154
|
||||
bit 00_155
|
||||
bit 00_157
|
||||
bit 01_45
|
||||
bit 01_53
|
||||
bit 01_56
|
||||
bit 01_57
|
||||
bit 01_58
|
||||
bit 01_141
|
||||
bit 01_148
|
||||
bit 01_149
|
||||
bit 01_152
|
||||
bit 01_153
|
||||
bit 01_154
|
||||
bit 21_72
|
||||
bit 21_168
|
||||
bit 25_72
|
||||
bit 25_168
|
||||
bit 26_03
|
||||
bit 26_09
|
||||
bit 26_10
|
||||
bit 26_11
|
||||
bit 26_12
|
||||
bit 26_13
|
||||
bit 26_14
|
||||
bit 26_15
|
||||
bit 26_19
|
||||
bit 26_25
|
||||
bit 26_26
|
||||
bit 26_27
|
||||
bit 26_28
|
||||
bit 26_29
|
||||
bit 26_30
|
||||
bit 26_31
|
||||
bit 26_35
|
||||
bit 26_41
|
||||
bit 26_42
|
||||
bit 26_43
|
||||
bit 26_44
|
||||
bit 26_45
|
||||
bit 26_46
|
||||
bit 26_47
|
||||
bit 26_51
|
||||
bit 26_57
|
||||
bit 26_58
|
||||
bit 26_59
|
||||
bit 26_60
|
||||
bit 26_61
|
||||
bit 26_62
|
||||
bit 26_63
|
||||
bit 26_67
|
||||
bit 26_73
|
||||
bit 26_74
|
||||
bit 26_75
|
||||
bit 26_76
|
||||
bit 26_77
|
||||
bit 26_78
|
||||
bit 26_79
|
||||
bit 26_83
|
||||
bit 26_89
|
||||
bit 26_90
|
||||
bit 26_91
|
||||
bit 26_92
|
||||
bit 26_93
|
||||
bit 26_94
|
||||
bit 26_95
|
||||
bit 26_119
|
||||
bit 26_120
|
||||
bit 26_121
|
||||
bit 26_122
|
||||
bit 26_123
|
||||
bit 26_124
|
||||
bit 26_125
|
||||
bit 26_126
|
||||
bit 26_127
|
||||
bit 26_131
|
||||
bit 26_137
|
||||
bit 26_138
|
||||
bit 26_139
|
||||
bit 26_140
|
||||
bit 26_141
|
||||
bit 26_142
|
||||
bit 26_143
|
||||
bit 26_147
|
||||
bit 26_153
|
||||
bit 26_154
|
||||
bit 26_155
|
||||
bit 26_156
|
||||
bit 26_157
|
||||
bit 26_158
|
||||
bit 26_159
|
||||
bit 26_163
|
||||
bit 26_169
|
||||
bit 26_170
|
||||
bit 26_171
|
||||
bit 26_172
|
||||
bit 26_173
|
||||
bit 26_174
|
||||
bit 26_175
|
||||
bit 26_179
|
||||
bit 26_185
|
||||
bit 26_186
|
||||
bit 26_187
|
||||
bit 26_188
|
||||
bit 26_189
|
||||
bit 26_190
|
||||
bit 26_191
|
||||
bit 26_195
|
||||
bit 26_201
|
||||
bit 26_202
|
||||
bit 26_203
|
||||
bit 26_204
|
||||
bit 26_205
|
||||
bit 26_206
|
||||
bit 26_207
|
||||
bit 26_211
|
||||
bit 26_217
|
||||
bit 26_218
|
||||
bit 26_219
|
||||
bit 26_220
|
||||
bit 26_221
|
||||
bit 26_222
|
||||
bit 26_223
|
||||
bit 27_03
|
||||
bit 27_06
|
||||
bit 27_07
|
||||
bit 27_09
|
||||
bit 27_10
|
||||
bit 27_11
|
||||
bit 27_12
|
||||
bit 27_13
|
||||
bit 27_14
|
||||
bit 27_15
|
||||
bit 27_19
|
||||
bit 27_22
|
||||
bit 27_23
|
||||
bit 27_25
|
||||
bit 27_26
|
||||
bit 27_27
|
||||
bit 27_28
|
||||
bit 27_29
|
||||
bit 27_30
|
||||
bit 27_31
|
||||
bit 27_35
|
||||
bit 27_38
|
||||
bit 27_39
|
||||
bit 27_41
|
||||
bit 27_42
|
||||
bit 27_43
|
||||
bit 27_44
|
||||
bit 27_45
|
||||
bit 27_46
|
||||
bit 27_47
|
||||
bit 27_51
|
||||
bit 27_54
|
||||
bit 27_55
|
||||
bit 27_57
|
||||
bit 27_58
|
||||
bit 27_59
|
||||
bit 27_60
|
||||
bit 27_61
|
||||
bit 27_62
|
||||
bit 27_63
|
||||
bit 27_67
|
||||
bit 27_70
|
||||
bit 27_71
|
||||
bit 27_73
|
||||
bit 27_74
|
||||
bit 27_75
|
||||
bit 27_76
|
||||
bit 27_77
|
||||
bit 27_78
|
||||
bit 27_79
|
||||
bit 27_83
|
||||
bit 27_86
|
||||
bit 27_87
|
||||
bit 27_89
|
||||
bit 27_90
|
||||
bit 27_91
|
||||
bit 27_92
|
||||
bit 27_93
|
||||
bit 27_94
|
||||
bit 27_95
|
||||
bit 27_119
|
||||
bit 27_120
|
||||
bit 27_121
|
||||
bit 27_122
|
||||
bit 27_123
|
||||
bit 27_124
|
||||
bit 27_125
|
||||
bit 27_126
|
||||
bit 27_127
|
||||
bit 27_131
|
||||
bit 27_134
|
||||
bit 27_135
|
||||
bit 27_137
|
||||
bit 27_138
|
||||
bit 27_139
|
||||
bit 27_140
|
||||
bit 27_141
|
||||
bit 27_142
|
||||
bit 27_143
|
||||
bit 27_147
|
||||
bit 27_150
|
||||
bit 27_151
|
||||
bit 27_153
|
||||
bit 27_154
|
||||
bit 27_155
|
||||
bit 27_156
|
||||
bit 27_157
|
||||
bit 27_158
|
||||
bit 27_159
|
||||
bit 26_227
|
||||
bit 26_243
|
||||
bit 26_291
|
||||
bit 26_307
|
||||
bit 26_323
|
||||
bit 26_339
|
||||
bit 26_355
|
||||
bit 26_371
|
||||
bit 27_163
|
||||
bit 27_166
|
||||
bit 27_167
|
||||
bit 27_169
|
||||
bit 27_170
|
||||
bit 27_171
|
||||
bit 27_172
|
||||
bit 27_173
|
||||
bit 27_174
|
||||
bit 27_175
|
||||
bit 27_179
|
||||
bit 27_182
|
||||
bit 27_183
|
||||
bit 27_185
|
||||
bit 27_186
|
||||
bit 27_187
|
||||
bit 27_188
|
||||
bit 27_189
|
||||
bit 27_190
|
||||
bit 27_191
|
||||
bit 27_195
|
||||
bit 27_198
|
||||
bit 27_199
|
||||
bit 27_201
|
||||
bit 27_202
|
||||
bit 27_203
|
||||
bit 27_204
|
||||
bit 27_205
|
||||
bit 27_206
|
||||
bit 27_207
|
||||
bit 27_211
|
||||
bit 27_214
|
||||
bit 27_215
|
||||
bit 27_217
|
||||
bit 27_218
|
||||
bit 27_219
|
||||
bit 27_220
|
||||
bit 27_221
|
||||
bit 27_222
|
||||
bit 27_223
|
||||
bit 28_03
|
||||
bit 28_09
|
||||
bit 28_10
|
||||
bit 28_11
|
||||
bit 28_12
|
||||
bit 28_13
|
||||
bit 28_14
|
||||
bit 28_15
|
||||
bit 28_19
|
||||
bit 28_25
|
||||
bit 28_26
|
||||
bit 28_27
|
||||
bit 28_28
|
||||
bit 28_29
|
||||
bit 28_30
|
||||
bit 28_31
|
||||
bit 28_35
|
||||
bit 28_41
|
||||
bit 28_42
|
||||
bit 28_43
|
||||
bit 28_44
|
||||
bit 28_45
|
||||
bit 28_46
|
||||
bit 28_47
|
||||
bit 28_51
|
||||
bit 28_57
|
||||
bit 28_58
|
||||
bit 28_59
|
||||
bit 28_60
|
||||
bit 28_61
|
||||
bit 28_62
|
||||
bit 28_63
|
||||
bit 28_67
|
||||
bit 28_73
|
||||
bit 28_74
|
||||
bit 28_75
|
||||
bit 28_76
|
||||
bit 28_77
|
||||
bit 28_78
|
||||
bit 28_79
|
||||
bit 28_80
|
||||
bit 28_81
|
||||
bit 28_83
|
||||
bit 28_89
|
||||
bit 28_90
|
||||
bit 28_91
|
||||
bit 28_92
|
||||
bit 28_93
|
||||
bit 28_94
|
||||
bit 28_95
|
||||
bit 28_114
|
||||
bit 28_115
|
||||
bit 28_116
|
||||
bit 28_117
|
||||
bit 28_118
|
||||
bit 28_119
|
||||
bit 28_120
|
||||
bit 28_121
|
||||
bit 28_122
|
||||
bit 28_123
|
||||
bit 28_124
|
||||
bit 28_125
|
||||
bit 28_126
|
||||
bit 28_127
|
||||
bit 28_131
|
||||
bit 28_137
|
||||
bit 28_138
|
||||
bit 28_139
|
||||
bit 28_140
|
||||
bit 28_141
|
||||
bit 28_142
|
||||
bit 28_143
|
||||
bit 28_147
|
||||
bit 28_153
|
||||
bit 28_154
|
||||
bit 28_155
|
||||
bit 28_156
|
||||
bit 28_157
|
||||
bit 28_158
|
||||
bit 28_159
|
||||
bit 27_227
|
||||
bit 27_230
|
||||
bit 27_231
|
||||
bit 27_243
|
||||
bit 27_246
|
||||
bit 27_247
|
||||
bit 27_291
|
||||
bit 27_294
|
||||
bit 27_295
|
||||
bit 27_307
|
||||
bit 27_310
|
||||
bit 27_311
|
||||
bit 27_323
|
||||
bit 27_326
|
||||
bit 27_327
|
||||
bit 27_339
|
||||
bit 27_342
|
||||
bit 27_343
|
||||
bit 27_355
|
||||
bit 27_358
|
||||
bit 27_359
|
||||
bit 27_371
|
||||
bit 27_374
|
||||
bit 27_375
|
||||
bit 28_163
|
||||
bit 28_169
|
||||
bit 28_170
|
||||
bit 28_171
|
||||
bit 28_172
|
||||
bit 28_173
|
||||
bit 28_174
|
||||
bit 28_175
|
||||
bit 28_179
|
||||
bit 28_185
|
||||
bit 28_186
|
||||
bit 28_187
|
||||
bit 28_188
|
||||
bit 28_189
|
||||
bit 28_190
|
||||
bit 28_191
|
||||
bit 28_195
|
||||
bit 28_201
|
||||
bit 28_202
|
||||
bit 28_203
|
||||
bit 28_204
|
||||
bit 28_205
|
||||
bit 28_206
|
||||
bit 28_207
|
||||
bit 28_211
|
||||
bit 28_217
|
||||
bit 28_218
|
||||
bit 28_219
|
||||
bit 28_220
|
||||
bit 28_221
|
||||
bit 28_222
|
||||
bit 28_223
|
||||
bit 29_03
|
||||
bit 29_06
|
||||
bit 29_07
|
||||
bit 29_09
|
||||
bit 29_10
|
||||
bit 29_11
|
||||
bit 29_12
|
||||
bit 29_13
|
||||
bit 29_14
|
||||
bit 29_15
|
||||
bit 29_19
|
||||
bit 29_22
|
||||
bit 29_23
|
||||
bit 29_25
|
||||
bit 29_26
|
||||
bit 29_27
|
||||
bit 29_28
|
||||
bit 29_29
|
||||
bit 29_30
|
||||
bit 29_31
|
||||
bit 29_35
|
||||
bit 29_38
|
||||
bit 29_39
|
||||
bit 29_41
|
||||
bit 29_42
|
||||
bit 29_43
|
||||
bit 29_44
|
||||
bit 29_45
|
||||
bit 29_46
|
||||
bit 29_47
|
||||
bit 29_51
|
||||
bit 29_54
|
||||
bit 29_55
|
||||
bit 29_57
|
||||
bit 29_58
|
||||
bit 29_59
|
||||
bit 29_60
|
||||
bit 29_61
|
||||
bit 29_62
|
||||
bit 29_63
|
||||
bit 29_67
|
||||
bit 29_70
|
||||
bit 29_71
|
||||
bit 29_73
|
||||
bit 29_74
|
||||
bit 29_75
|
||||
bit 29_76
|
||||
bit 29_77
|
||||
bit 29_78
|
||||
bit 29_79
|
||||
bit 29_80
|
||||
bit 29_81
|
||||
bit 29_83
|
||||
bit 29_86
|
||||
bit 29_87
|
||||
bit 29_89
|
||||
bit 29_90
|
||||
bit 29_91
|
||||
bit 29_92
|
||||
bit 29_93
|
||||
bit 29_94
|
||||
bit 29_95
|
||||
bit 29_114
|
||||
bit 29_115
|
||||
bit 29_116
|
||||
bit 29_117
|
||||
bit 29_118
|
||||
bit 29_119
|
||||
bit 29_120
|
||||
bit 29_121
|
||||
bit 29_122
|
||||
bit 29_123
|
||||
bit 29_124
|
||||
bit 29_125
|
||||
bit 29_126
|
||||
bit 29_127
|
||||
bit 29_131
|
||||
bit 29_134
|
||||
bit 29_135
|
||||
bit 29_137
|
||||
bit 29_138
|
||||
bit 29_139
|
||||
bit 29_140
|
||||
bit 29_141
|
||||
bit 29_142
|
||||
bit 29_143
|
||||
bit 29_147
|
||||
bit 29_150
|
||||
bit 29_151
|
||||
bit 29_153
|
||||
bit 29_154
|
||||
bit 29_155
|
||||
bit 29_156
|
||||
bit 29_157
|
||||
bit 29_158
|
||||
bit 29_159
|
||||
bit 28_227
|
||||
bit 28_243
|
||||
bit 28_291
|
||||
bit 28_307
|
||||
bit 28_323
|
||||
bit 28_339
|
||||
bit 28_355
|
||||
bit 28_371
|
||||
bit 29_163
|
||||
bit 29_166
|
||||
bit 29_167
|
||||
bit 29_169
|
||||
bit 29_170
|
||||
bit 29_171
|
||||
bit 29_172
|
||||
bit 29_173
|
||||
bit 29_174
|
||||
bit 29_175
|
||||
bit 29_179
|
||||
bit 29_182
|
||||
bit 29_183
|
||||
bit 29_185
|
||||
bit 29_186
|
||||
bit 29_187
|
||||
bit 29_188
|
||||
bit 29_189
|
||||
bit 29_190
|
||||
bit 29_191
|
||||
bit 29_195
|
||||
bit 29_198
|
||||
bit 29_199
|
||||
bit 29_201
|
||||
bit 29_202
|
||||
bit 29_203
|
||||
bit 29_204
|
||||
bit 29_205
|
||||
bit 29_206
|
||||
bit 29_207
|
||||
bit 29_211
|
||||
bit 29_214
|
||||
bit 29_215
|
||||
bit 29_217
|
||||
bit 29_218
|
||||
bit 29_219
|
||||
bit 29_220
|
||||
bit 29_221
|
||||
bit 29_222
|
||||
bit 29_223
|
||||
bit 29_227
|
||||
bit 29_230
|
||||
bit 29_231
|
||||
bit 29_243
|
||||
bit 29_246
|
||||
bit 29_247
|
||||
bit 29_291
|
||||
bit 29_294
|
||||
bit 29_295
|
||||
bit 29_307
|
||||
bit 29_310
|
||||
bit 29_311
|
||||
bit 29_323
|
||||
bit 29_326
|
||||
bit 29_327
|
||||
bit 29_339
|
||||
bit 29_342
|
||||
bit 29_343
|
||||
bit 29_355
|
||||
bit 29_358
|
||||
bit 29_359
|
||||
bit 29_371
|
||||
bit 29_374
|
||||
bit 29_375
|
||||
|
|
|
|||
|
|
@ -0,0 +1,266 @@
|
|||
bit 26_117
|
||||
bit 26_118
|
||||
bit 26_120
|
||||
bit 26_121
|
||||
bit 26_122
|
||||
bit 26_123
|
||||
bit 26_124
|
||||
bit 26_125
|
||||
bit 26_126
|
||||
bit 26_127
|
||||
bit 26_128
|
||||
bit 26_129
|
||||
bit 26_130
|
||||
bit 26_131
|
||||
bit 26_132
|
||||
bit 26_133
|
||||
bit 26_134
|
||||
bit 26_135
|
||||
bit 26_136
|
||||
bit 26_137
|
||||
bit 26_138
|
||||
bit 26_139
|
||||
bit 26_140
|
||||
bit 26_141
|
||||
bit 26_142
|
||||
bit 26_143
|
||||
bit 26_144
|
||||
bit 26_145
|
||||
bit 26_146
|
||||
bit 26_147
|
||||
bit 26_148
|
||||
bit 26_149
|
||||
bit 26_150
|
||||
bit 26_151
|
||||
bit 26_152
|
||||
bit 26_153
|
||||
bit 26_154
|
||||
bit 26_155
|
||||
bit 26_156
|
||||
bit 26_158
|
||||
bit 26_159
|
||||
bit 26_181
|
||||
bit 26_182
|
||||
bit 26_183
|
||||
bit 26_184
|
||||
bit 26_185
|
||||
bit 26_196
|
||||
bit 26_197
|
||||
bit 26_198
|
||||
bit 26_200
|
||||
bit 26_201
|
||||
bit 26_202
|
||||
bit 26_203
|
||||
bit 26_204
|
||||
bit 26_205
|
||||
bit 26_207
|
||||
bit 26_208
|
||||
bit 26_209
|
||||
bit 26_210
|
||||
bit 26_211
|
||||
bit 26_212
|
||||
bit 26_214
|
||||
bit 26_215
|
||||
bit 26_216
|
||||
bit 26_217
|
||||
bit 26_218
|
||||
bit 26_219
|
||||
bit 26_221
|
||||
bit 26_222
|
||||
bit 26_223
|
||||
bit 26_224
|
||||
bit 26_225
|
||||
bit 26_226
|
||||
bit 26_228
|
||||
bit 26_229
|
||||
bit 26_230
|
||||
bit 26_231
|
||||
bit 26_232
|
||||
bit 26_233
|
||||
bit 26_234
|
||||
bit 27_117
|
||||
bit 27_118
|
||||
bit 27_119
|
||||
bit 27_120
|
||||
bit 27_121
|
||||
bit 27_122
|
||||
bit 27_123
|
||||
bit 27_125
|
||||
bit 27_126
|
||||
bit 27_127
|
||||
bit 27_128
|
||||
bit 27_129
|
||||
bit 27_130
|
||||
bit 27_132
|
||||
bit 27_133
|
||||
bit 27_134
|
||||
bit 27_135
|
||||
bit 27_136
|
||||
bit 27_137
|
||||
bit 27_139
|
||||
bit 27_140
|
||||
bit 27_141
|
||||
bit 27_142
|
||||
bit 27_143
|
||||
bit 27_144
|
||||
bit 27_146
|
||||
bit 27_147
|
||||
bit 27_148
|
||||
bit 27_149
|
||||
bit 27_150
|
||||
bit 27_151
|
||||
bit 27_153
|
||||
bit 27_154
|
||||
bit 27_155
|
||||
bit 27_157
|
||||
bit 27_158
|
||||
bit 27_159
|
||||
bit 27_181
|
||||
bit 27_182
|
||||
bit 27_183
|
||||
bit 27_184
|
||||
bit 27_185
|
||||
bit 27_196
|
||||
bit 27_197
|
||||
bit 27_198
|
||||
bit 27_199
|
||||
bit 27_200
|
||||
bit 27_201
|
||||
bit 27_202
|
||||
bit 27_203
|
||||
bit 27_204
|
||||
bit 27_205
|
||||
bit 27_206
|
||||
bit 27_207
|
||||
bit 27_208
|
||||
bit 27_209
|
||||
bit 27_210
|
||||
bit 27_211
|
||||
bit 27_212
|
||||
bit 27_213
|
||||
bit 27_214
|
||||
bit 27_215
|
||||
bit 27_216
|
||||
bit 27_217
|
||||
bit 27_218
|
||||
bit 27_219
|
||||
bit 27_220
|
||||
bit 27_221
|
||||
bit 27_222
|
||||
bit 27_223
|
||||
bit 27_224
|
||||
bit 27_225
|
||||
bit 27_226
|
||||
bit 27_227
|
||||
bit 27_228
|
||||
bit 27_229
|
||||
bit 27_230
|
||||
bit 27_231
|
||||
bit 27_233
|
||||
bit 27_234
|
||||
bit 28_117
|
||||
bit 28_118
|
||||
bit 28_120
|
||||
bit 28_121
|
||||
bit 28_122
|
||||
bit 28_135
|
||||
bit 28_136
|
||||
bit 28_137
|
||||
bit 28_138
|
||||
bit 28_139
|
||||
bit 28_140
|
||||
bit 28_141
|
||||
bit 28_142
|
||||
bit 28_143
|
||||
bit 28_144
|
||||
bit 28_145
|
||||
bit 28_146
|
||||
bit 28_147
|
||||
bit 28_148
|
||||
bit 28_149
|
||||
bit 28_150
|
||||
bit 28_151
|
||||
bit 28_152
|
||||
bit 28_153
|
||||
bit 28_154
|
||||
bit 28_155
|
||||
bit 28_174
|
||||
bit 28_175
|
||||
bit 28_186
|
||||
bit 28_196
|
||||
bit 28_197
|
||||
bit 28_198
|
||||
bit 28_200
|
||||
bit 28_201
|
||||
bit 28_202
|
||||
bit 28_203
|
||||
bit 28_204
|
||||
bit 28_205
|
||||
bit 28_207
|
||||
bit 28_208
|
||||
bit 28_209
|
||||
bit 28_210
|
||||
bit 28_211
|
||||
bit 28_212
|
||||
bit 28_214
|
||||
bit 28_215
|
||||
bit 28_216
|
||||
bit 28_217
|
||||
bit 28_230
|
||||
bit 28_231
|
||||
bit 28_232
|
||||
bit 28_233
|
||||
bit 28_234
|
||||
bit 29_117
|
||||
bit 29_118
|
||||
bit 29_119
|
||||
bit 29_120
|
||||
bit 29_121
|
||||
bit 29_135
|
||||
bit 29_136
|
||||
bit 29_137
|
||||
bit 29_139
|
||||
bit 29_140
|
||||
bit 29_141
|
||||
bit 29_142
|
||||
bit 29_143
|
||||
bit 29_144
|
||||
bit 29_146
|
||||
bit 29_147
|
||||
bit 29_148
|
||||
bit 29_149
|
||||
bit 29_150
|
||||
bit 29_151
|
||||
bit 29_153
|
||||
bit 29_154
|
||||
bit 29_155
|
||||
bit 29_174
|
||||
bit 29_175
|
||||
bit 29_186
|
||||
bit 29_196
|
||||
bit 29_197
|
||||
bit 29_198
|
||||
bit 29_199
|
||||
bit 29_200
|
||||
bit 29_201
|
||||
bit 29_202
|
||||
bit 29_203
|
||||
bit 29_204
|
||||
bit 29_205
|
||||
bit 29_206
|
||||
bit 29_207
|
||||
bit 29_208
|
||||
bit 29_209
|
||||
bit 29_210
|
||||
bit 29_211
|
||||
bit 29_212
|
||||
bit 29_213
|
||||
bit 29_214
|
||||
bit 29_215
|
||||
bit 29_216
|
||||
bit 29_218
|
||||
bit 29_229
|
||||
bit 29_230
|
||||
bit 29_231
|
||||
bit 29_233
|
||||
bit 29_234
|
||||
|
|
@ -13,6 +13,7 @@ bit 00_35
|
|||
bit 00_38
|
||||
bit 00_39
|
||||
bit 00_42
|
||||
bit 00_45
|
||||
bit 00_46
|
||||
bit 00_65
|
||||
bit 00_67
|
||||
|
|
@ -56,8 +57,6 @@ bit 01_101
|
|||
bit 01_102
|
||||
bit 01_104
|
||||
bit 01_105
|
||||
bit 02_02
|
||||
bit 02_03
|
||||
bit 02_05
|
||||
bit 02_06
|
||||
bit 02_07
|
||||
|
|
@ -97,6 +96,7 @@ bit 02_93
|
|||
bit 02_94
|
||||
bit 02_95
|
||||
bit 02_102
|
||||
bit 02_103
|
||||
bit 02_106
|
||||
bit 02_110
|
||||
bit 02_111
|
||||
|
|
@ -112,7 +112,6 @@ bit 03_10
|
|||
bit 03_12
|
||||
bit 03_13
|
||||
bit 03_14
|
||||
bit 03_21
|
||||
bit 03_29
|
||||
bit 03_44
|
||||
bit 03_45
|
||||
|
|
@ -128,9 +127,9 @@ bit 03_76
|
|||
bit 03_77
|
||||
bit 03_78
|
||||
bit 03_93
|
||||
bit 03_109
|
||||
bit 03_110
|
||||
bit 03_116
|
||||
bit 03_125
|
||||
bit 03_126
|
||||
bit 04_06
|
||||
bit 04_07
|
||||
|
|
@ -139,7 +138,6 @@ bit 04_12
|
|||
bit 04_13
|
||||
bit 04_14
|
||||
bit 04_15
|
||||
bit 04_19
|
||||
bit 04_28
|
||||
bit 04_29
|
||||
bit 04_30
|
||||
|
|
@ -175,9 +173,7 @@ bit 05_05
|
|||
bit 05_07
|
||||
bit 05_10
|
||||
bit 05_13
|
||||
bit 05_17
|
||||
bit 05_18
|
||||
bit 05_26
|
||||
bit 05_42
|
||||
bit 05_49
|
||||
bit 05_50
|
||||
|
|
@ -186,18 +182,18 @@ bit 05_53
|
|||
bit 05_54
|
||||
bit 05_58
|
||||
bit 05_60
|
||||
bit 05_62
|
||||
bit 05_65
|
||||
bit 05_66
|
||||
bit 05_68
|
||||
bit 05_69
|
||||
bit 05_70
|
||||
bit 05_74
|
||||
bit 05_76
|
||||
bit 05_77
|
||||
bit 05_78
|
||||
bit 05_81
|
||||
bit 05_82
|
||||
bit 05_86
|
||||
bit 05_102
|
||||
bit 05_110
|
||||
bit 05_113
|
||||
bit 05_114
|
||||
|
|
@ -218,11 +214,11 @@ bit 06_13
|
|||
bit 06_14
|
||||
bit 06_15
|
||||
bit 06_17
|
||||
bit 06_20
|
||||
bit 06_22
|
||||
bit 06_23
|
||||
bit 06_27
|
||||
bit 06_28
|
||||
bit 06_29
|
||||
bit 06_30
|
||||
bit 06_31
|
||||
bit 06_39
|
||||
|
|
@ -231,8 +227,7 @@ bit 06_44
|
|||
bit 06_45
|
||||
bit 06_46
|
||||
bit 06_49
|
||||
bit 06_53
|
||||
bit 06_57
|
||||
bit 06_52
|
||||
bit 06_59
|
||||
bit 06_60
|
||||
bit 06_61
|
||||
|
|
@ -241,6 +236,7 @@ bit 06_65
|
|||
bit 06_66
|
||||
bit 06_68
|
||||
bit 06_70
|
||||
bit 06_71
|
||||
bit 06_74
|
||||
bit 06_75
|
||||
bit 06_76
|
||||
|
|
@ -248,6 +244,7 @@ bit 06_77
|
|||
bit 06_78
|
||||
bit 06_79
|
||||
bit 06_86
|
||||
bit 06_87
|
||||
bit 06_89
|
||||
bit 06_91
|
||||
bit 06_92
|
||||
|
|
@ -255,9 +252,9 @@ bit 06_93
|
|||
bit 06_94
|
||||
bit 06_103
|
||||
bit 06_107
|
||||
bit 06_121
|
||||
bit 06_108
|
||||
bit 06_123
|
||||
bit 06_124
|
||||
bit 06_125
|
||||
bit 07_00
|
||||
bit 07_03
|
||||
bit 07_04
|
||||
|
|
@ -283,6 +280,7 @@ bit 07_32
|
|||
bit 07_36
|
||||
bit 07_38
|
||||
bit 07_40
|
||||
bit 07_42
|
||||
bit 07_43
|
||||
bit 07_46
|
||||
bit 07_47
|
||||
|
|
@ -318,6 +316,7 @@ bit 07_100
|
|||
bit 07_102
|
||||
bit 07_103
|
||||
bit 07_104
|
||||
bit 07_106
|
||||
bit 07_107
|
||||
bit 07_110
|
||||
bit 07_111
|
||||
|
|
@ -350,9 +349,9 @@ bit 08_22
|
|||
bit 08_23
|
||||
bit 08_24
|
||||
bit 08_25
|
||||
bit 08_26
|
||||
bit 08_27
|
||||
bit 08_28
|
||||
bit 08_29
|
||||
bit 08_30
|
||||
bit 08_31
|
||||
bit 08_32
|
||||
|
|
@ -378,6 +377,8 @@ bit 08_63
|
|||
bit 08_64
|
||||
bit 08_65
|
||||
bit 08_66
|
||||
bit 08_68
|
||||
bit 08_69
|
||||
bit 08_70
|
||||
bit 08_71
|
||||
bit 08_72
|
||||
|
|
@ -397,11 +398,14 @@ bit 08_88
|
|||
bit 08_89
|
||||
bit 08_90
|
||||
bit 08_92
|
||||
bit 08_93
|
||||
bit 08_94
|
||||
bit 08_95
|
||||
bit 08_96
|
||||
bit 08_97
|
||||
bit 08_100
|
||||
bit 08_101
|
||||
bit 08_102
|
||||
bit 08_103
|
||||
bit 08_104
|
||||
bit 08_105
|
||||
|
|
@ -417,7 +421,6 @@ bit 08_120
|
|||
bit 08_121
|
||||
bit 08_122
|
||||
bit 08_123
|
||||
bit 08_125
|
||||
bit 08_126
|
||||
bit 08_127
|
||||
bit 09_00
|
||||
|
|
@ -429,14 +432,13 @@ bit 09_05
|
|||
bit 09_06
|
||||
bit 09_07
|
||||
bit 09_08
|
||||
bit 09_09
|
||||
bit 09_10
|
||||
bit 09_11
|
||||
bit 09_13
|
||||
bit 09_15
|
||||
bit 09_16
|
||||
bit 09_19
|
||||
bit 09_20
|
||||
bit 09_21
|
||||
bit 09_22
|
||||
bit 09_23
|
||||
bit 09_24
|
||||
|
|
@ -444,6 +446,7 @@ bit 09_27
|
|||
bit 09_34
|
||||
bit 09_35
|
||||
bit 09_36
|
||||
bit 09_37
|
||||
bit 09_39
|
||||
bit 09_40
|
||||
bit 09_41
|
||||
|
|
@ -467,13 +470,15 @@ bit 09_69
|
|||
bit 09_75
|
||||
bit 09_77
|
||||
bit 09_79
|
||||
bit 09_80
|
||||
bit 09_82
|
||||
bit 09_83
|
||||
bit 09_84
|
||||
bit 09_89
|
||||
bit 09_91
|
||||
bit 09_98
|
||||
bit 09_99
|
||||
bit 09_100
|
||||
bit 09_101
|
||||
bit 09_106
|
||||
bit 09_107
|
||||
bit 09_111
|
||||
|
|
@ -481,16 +486,15 @@ bit 09_114
|
|||
bit 09_115
|
||||
bit 09_116
|
||||
bit 09_120
|
||||
bit 09_121
|
||||
bit 09_122
|
||||
bit 09_123
|
||||
bit 09_127
|
||||
bit 10_00
|
||||
bit 10_01
|
||||
bit 10_02
|
||||
bit 10_03
|
||||
bit 10_05
|
||||
bit 10_06
|
||||
bit 10_07
|
||||
bit 10_08
|
||||
bit 10_09
|
||||
bit 10_10
|
||||
bit 10_11
|
||||
|
|
@ -509,17 +513,17 @@ bit 10_27
|
|||
bit 10_28
|
||||
bit 10_30
|
||||
bit 10_31
|
||||
bit 10_33
|
||||
bit 10_34
|
||||
bit 10_37
|
||||
bit 10_39
|
||||
bit 10_41
|
||||
bit 10_42
|
||||
bit 10_43
|
||||
bit 10_44
|
||||
bit 10_46
|
||||
bit 10_47
|
||||
bit 10_49
|
||||
bit 10_50
|
||||
bit 10_52
|
||||
bit 10_53
|
||||
bit 10_55
|
||||
bit 10_56
|
||||
|
|
@ -527,7 +531,6 @@ bit 10_57
|
|||
bit 10_58
|
||||
bit 10_59
|
||||
bit 10_60
|
||||
bit 10_62
|
||||
bit 10_63
|
||||
bit 10_64
|
||||
bit 10_65
|
||||
|
|
@ -543,8 +546,8 @@ bit 10_76
|
|||
bit 10_78
|
||||
bit 10_79
|
||||
bit 10_80
|
||||
bit 10_81
|
||||
bit 10_82
|
||||
bit 10_83
|
||||
bit 10_85
|
||||
bit 10_87
|
||||
bit 10_88
|
||||
|
|
@ -584,7 +587,7 @@ bit 11_15
|
|||
bit 11_17
|
||||
bit 11_18
|
||||
bit 11_19
|
||||
bit 11_20
|
||||
bit 11_21
|
||||
bit 11_23
|
||||
bit 11_24
|
||||
bit 11_25
|
||||
|
|
@ -623,6 +626,7 @@ bit 11_77
|
|||
bit 11_79
|
||||
bit 11_81
|
||||
bit 11_82
|
||||
bit 11_83
|
||||
bit 11_87
|
||||
bit 11_90
|
||||
bit 11_91
|
||||
|
|
@ -631,6 +635,7 @@ bit 11_97
|
|||
bit 11_100
|
||||
bit 11_101
|
||||
bit 11_103
|
||||
bit 11_104
|
||||
bit 11_105
|
||||
bit 11_106
|
||||
bit 11_107
|
||||
|
|
@ -639,11 +644,13 @@ bit 11_113
|
|||
bit 11_116
|
||||
bit 11_117
|
||||
bit 11_119
|
||||
bit 11_120
|
||||
bit 11_121
|
||||
bit 11_122
|
||||
bit 11_123
|
||||
bit 11_125
|
||||
bit 11_127
|
||||
bit 12_00
|
||||
bit 12_01
|
||||
bit 12_02
|
||||
bit 12_03
|
||||
|
|
@ -658,16 +665,16 @@ bit 12_14
|
|||
bit 12_15
|
||||
bit 12_16
|
||||
bit 12_17
|
||||
bit 12_19
|
||||
bit 12_20
|
||||
bit 12_21
|
||||
bit 12_23
|
||||
bit 12_25
|
||||
bit 12_26
|
||||
bit 12_27
|
||||
bit 12_29
|
||||
bit 12_30
|
||||
bit 12_31
|
||||
bit 12_33
|
||||
bit 12_34
|
||||
bit 12_37
|
||||
bit 12_39
|
||||
bit 12_41
|
||||
|
|
@ -677,7 +684,7 @@ bit 12_46
|
|||
bit 12_47
|
||||
bit 12_48
|
||||
bit 12_49
|
||||
bit 12_50
|
||||
bit 12_52
|
||||
bit 12_53
|
||||
bit 12_55
|
||||
bit 12_57
|
||||
|
|
@ -697,16 +704,18 @@ bit 12_78
|
|||
bit 12_79
|
||||
bit 12_81
|
||||
bit 12_82
|
||||
bit 12_83
|
||||
bit 12_85
|
||||
bit 12_87
|
||||
bit 12_88
|
||||
bit 12_89
|
||||
bit 12_90
|
||||
bit 12_91
|
||||
bit 12_93
|
||||
bit 12_94
|
||||
bit 12_95
|
||||
bit 12_97
|
||||
bit 12_98
|
||||
bit 12_100
|
||||
bit 12_101
|
||||
bit 12_103
|
||||
bit 12_105
|
||||
|
|
@ -723,6 +732,7 @@ bit 12_120
|
|||
bit 12_121
|
||||
bit 12_122
|
||||
bit 12_123
|
||||
bit 12_124
|
||||
bit 12_127
|
||||
bit 13_00
|
||||
bit 13_01
|
||||
|
|
@ -739,21 +749,20 @@ bit 13_12
|
|||
bit 13_13
|
||||
bit 13_14
|
||||
bit 13_15
|
||||
bit 13_16
|
||||
bit 13_17
|
||||
bit 13_18
|
||||
bit 13_19
|
||||
bit 13_20
|
||||
bit 13_22
|
||||
bit 13_23
|
||||
bit 13_24
|
||||
bit 13_25
|
||||
bit 13_26
|
||||
bit 13_28
|
||||
bit 13_29
|
||||
bit 13_30
|
||||
bit 13_31
|
||||
bit 13_33
|
||||
bit 13_34
|
||||
bit 13_36
|
||||
bit 13_38
|
||||
bit 13_39
|
||||
bit 13_40
|
||||
|
|
@ -772,12 +781,13 @@ bit 13_57
|
|||
bit 13_58
|
||||
bit 13_59
|
||||
bit 13_60
|
||||
bit 13_62
|
||||
bit 13_63
|
||||
bit 13_64
|
||||
bit 13_65
|
||||
bit 13_66
|
||||
bit 13_68
|
||||
bit 13_69
|
||||
bit 13_70
|
||||
bit 13_71
|
||||
bit 13_72
|
||||
bit 13_73
|
||||
|
|
@ -787,15 +797,17 @@ bit 13_76
|
|||
bit 13_77
|
||||
bit 13_78
|
||||
bit 13_79
|
||||
bit 13_80
|
||||
bit 13_81
|
||||
bit 13_82
|
||||
bit 13_83
|
||||
bit 13_86
|
||||
bit 13_87
|
||||
bit 13_88
|
||||
bit 13_89
|
||||
bit 13_90
|
||||
bit 13_92
|
||||
bit 13_93
|
||||
bit 13_94
|
||||
bit 13_95
|
||||
bit 13_97
|
||||
bit 13_98
|
||||
|
|
@ -817,14 +829,13 @@ bit 13_120
|
|||
bit 13_121
|
||||
bit 13_122
|
||||
bit 13_123
|
||||
bit 13_125
|
||||
bit 13_126
|
||||
bit 13_127
|
||||
bit 14_00
|
||||
bit 14_01
|
||||
bit 14_02
|
||||
bit 14_03
|
||||
bit 14_04
|
||||
bit 14_05
|
||||
bit 14_09
|
||||
bit 14_10
|
||||
bit 14_11
|
||||
|
|
@ -836,8 +847,10 @@ bit 14_16
|
|||
bit 14_18
|
||||
bit 14_19
|
||||
bit 14_20
|
||||
bit 14_23
|
||||
bit 14_25
|
||||
bit 14_26
|
||||
bit 14_28
|
||||
bit 14_29
|
||||
bit 14_30
|
||||
bit 14_31
|
||||
|
|
@ -856,7 +869,6 @@ bit 14_69
|
|||
bit 14_71
|
||||
bit 14_73
|
||||
bit 14_74
|
||||
bit 14_76
|
||||
bit 14_77
|
||||
bit 14_78
|
||||
bit 14_79
|
||||
|
|
@ -872,7 +884,6 @@ bit 14_94
|
|||
bit 14_95
|
||||
bit 14_98
|
||||
bit 14_100
|
||||
bit 14_106
|
||||
bit 14_114
|
||||
bit 14_116
|
||||
bit 14_120
|
||||
|
|
@ -881,14 +892,13 @@ bit 15_00
|
|||
bit 15_01
|
||||
bit 15_02
|
||||
bit 15_03
|
||||
bit 15_04
|
||||
bit 15_05
|
||||
bit 15_06
|
||||
bit 15_07
|
||||
bit 15_08
|
||||
bit 15_09
|
||||
bit 15_10
|
||||
bit 15_11
|
||||
bit 15_12
|
||||
bit 15_13
|
||||
bit 15_14
|
||||
bit 15_15
|
||||
bit 15_16
|
||||
|
|
@ -901,7 +911,6 @@ bit 15_25
|
|||
bit 15_26
|
||||
bit 15_27
|
||||
bit 15_28
|
||||
bit 15_29
|
||||
bit 15_30
|
||||
bit 15_31
|
||||
bit 15_33
|
||||
|
|
@ -918,10 +927,10 @@ bit 15_63
|
|||
bit 15_64
|
||||
bit 15_65
|
||||
bit 15_66
|
||||
bit 15_67
|
||||
bit 15_68
|
||||
bit 15_69
|
||||
bit 15_71
|
||||
bit 15_72
|
||||
bit 15_73
|
||||
bit 15_74
|
||||
bit 15_75
|
||||
|
|
@ -931,12 +940,14 @@ bit 15_78
|
|||
bit 15_79
|
||||
bit 15_80
|
||||
bit 15_81
|
||||
bit 15_82
|
||||
bit 15_85
|
||||
bit 15_87
|
||||
bit 15_89
|
||||
bit 15_90
|
||||
bit 15_91
|
||||
bit 15_92
|
||||
bit 15_93
|
||||
bit 15_94
|
||||
bit 15_95
|
||||
bit 15_97
|
||||
|
|
@ -1006,7 +1017,6 @@ bit 16_121
|
|||
bit 16_122
|
||||
bit 16_124
|
||||
bit 16_126
|
||||
bit 17_00
|
||||
bit 17_02
|
||||
bit 17_06
|
||||
bit 17_07
|
||||
|
|
@ -1019,7 +1029,6 @@ bit 17_23
|
|||
bit 17_24
|
||||
bit 17_30
|
||||
bit 17_31
|
||||
bit 17_32
|
||||
bit 17_35
|
||||
bit 17_38
|
||||
bit 17_39
|
||||
|
|
@ -1032,7 +1041,6 @@ bit 17_47
|
|||
bit 17_48
|
||||
bit 17_51
|
||||
bit 17_54
|
||||
bit 17_55
|
||||
bit 17_56
|
||||
bit 17_57
|
||||
bit 17_58
|
||||
|
|
@ -1040,14 +1048,11 @@ bit 17_60
|
|||
bit 17_62
|
||||
bit 17_66
|
||||
bit 17_70
|
||||
bit 17_71
|
||||
bit 17_73
|
||||
bit 17_79
|
||||
bit 17_80
|
||||
bit 17_85
|
||||
bit 17_86
|
||||
bit 17_87
|
||||
bit 17_88
|
||||
bit 17_94
|
||||
bit 17_95
|
||||
bit 17_99
|
||||
|
|
@ -1072,6 +1077,7 @@ bit 18_06
|
|||
bit 18_07
|
||||
bit 18_08
|
||||
bit 18_14
|
||||
bit 18_17
|
||||
bit 18_20
|
||||
bit 18_22
|
||||
bit 18_23
|
||||
|
|
@ -1146,7 +1152,6 @@ bit 19_46
|
|||
bit 19_47
|
||||
bit 19_49
|
||||
bit 19_50
|
||||
bit 19_54
|
||||
bit 19_55
|
||||
bit 19_56
|
||||
bit 19_57
|
||||
|
|
@ -1177,7 +1182,6 @@ bit 19_113
|
|||
bit 19_114
|
||||
bit 19_119
|
||||
bit 19_120
|
||||
bit 19_121
|
||||
bit 19_123
|
||||
bit 19_125
|
||||
bit 19_127
|
||||
|
|
@ -1195,7 +1199,6 @@ bit 20_42
|
|||
bit 20_43
|
||||
bit 20_44
|
||||
bit 20_46
|
||||
bit 20_48
|
||||
bit 20_54
|
||||
bit 20_55
|
||||
bit 20_57
|
||||
|
|
@ -1253,7 +1256,6 @@ bit 21_85
|
|||
bit 21_86
|
||||
bit 21_94
|
||||
bit 21_98
|
||||
bit 21_99
|
||||
bit 21_102
|
||||
bit 21_106
|
||||
bit 21_107
|
||||
|
|
@ -1275,10 +1277,8 @@ bit 22_22
|
|||
bit 22_23
|
||||
bit 22_30
|
||||
bit 22_31
|
||||
bit 22_32
|
||||
bit 22_35
|
||||
bit 22_38
|
||||
bit 22_40
|
||||
bit 22_42
|
||||
bit 22_43
|
||||
bit 22_44
|
||||
|
|
@ -1287,7 +1287,6 @@ bit 22_47
|
|||
bit 22_48
|
||||
bit 22_51
|
||||
bit 22_54
|
||||
bit 22_55
|
||||
bit 22_56
|
||||
bit 22_57
|
||||
bit 22_58
|
||||
|
|
@ -1295,14 +1294,13 @@ bit 22_60
|
|||
bit 22_62
|
||||
bit 22_66
|
||||
bit 22_70
|
||||
bit 22_71
|
||||
bit 22_73
|
||||
bit 22_79
|
||||
bit 22_85
|
||||
bit 22_86
|
||||
bit 22_87
|
||||
bit 22_94
|
||||
bit 22_95
|
||||
bit 22_96
|
||||
bit 22_99
|
||||
bit 22_102
|
||||
bit 22_103
|
||||
|
|
@ -1311,7 +1309,6 @@ bit 22_107
|
|||
bit 22_108
|
||||
bit 22_110
|
||||
bit 22_111
|
||||
bit 22_112
|
||||
bit 22_115
|
||||
bit 22_118
|
||||
bit 22_121
|
||||
|
|
@ -1333,6 +1330,7 @@ bit 23_31
|
|||
bit 23_32
|
||||
bit 23_35
|
||||
bit 23_38
|
||||
bit 23_39
|
||||
bit 23_40
|
||||
bit 23_42
|
||||
bit 23_43
|
||||
|
|
@ -1356,7 +1354,6 @@ bit 23_80
|
|||
bit 23_85
|
||||
bit 23_86
|
||||
bit 23_87
|
||||
bit 23_88
|
||||
bit 23_94
|
||||
bit 23_95
|
||||
bit 23_96
|
||||
|
|
@ -1424,7 +1421,6 @@ bit 24_84
|
|||
bit 24_85
|
||||
bit 24_86
|
||||
bit 24_87
|
||||
bit 24_88
|
||||
bit 24_94
|
||||
bit 24_95
|
||||
bit 24_96
|
||||
|
|
@ -1475,7 +1471,6 @@ bit 25_48
|
|||
bit 25_51
|
||||
bit 25_52
|
||||
bit 25_54
|
||||
bit 25_55
|
||||
bit 25_56
|
||||
bit 25_57
|
||||
bit 25_58
|
||||
|
|
@ -1745,12 +1740,10 @@ bit 38_18
|
|||
bit 38_22
|
||||
bit 38_32
|
||||
bit 38_34
|
||||
bit 38_38
|
||||
bit 38_40
|
||||
bit 38_42
|
||||
bit 38_62
|
||||
bit 38_64
|
||||
bit 38_82
|
||||
bit 38_86
|
||||
bit 38_92
|
||||
bit 38_94
|
||||
|
|
@ -1767,12 +1760,10 @@ bit 39_21
|
|||
bit 39_33
|
||||
bit 39_35
|
||||
bit 39_41
|
||||
bit 39_45
|
||||
bit 39_63
|
||||
bit 39_65
|
||||
bit 39_85
|
||||
bit 39_87
|
||||
bit 39_89
|
||||
bit 39_93
|
||||
bit 39_95
|
||||
bit 39_105
|
||||
|
|
|
|||
|
|
@ -13,6 +13,7 @@ bit 00_35
|
|||
bit 00_38
|
||||
bit 00_39
|
||||
bit 00_42
|
||||
bit 00_45
|
||||
bit 00_46
|
||||
bit 00_65
|
||||
bit 00_67
|
||||
|
|
@ -56,8 +57,6 @@ bit 01_101
|
|||
bit 01_102
|
||||
bit 01_104
|
||||
bit 01_105
|
||||
bit 02_02
|
||||
bit 02_03
|
||||
bit 02_05
|
||||
bit 02_06
|
||||
bit 02_07
|
||||
|
|
@ -97,6 +96,7 @@ bit 02_93
|
|||
bit 02_94
|
||||
bit 02_95
|
||||
bit 02_102
|
||||
bit 02_103
|
||||
bit 02_106
|
||||
bit 02_110
|
||||
bit 02_111
|
||||
|
|
@ -112,7 +112,6 @@ bit 03_10
|
|||
bit 03_12
|
||||
bit 03_13
|
||||
bit 03_14
|
||||
bit 03_21
|
||||
bit 03_29
|
||||
bit 03_44
|
||||
bit 03_45
|
||||
|
|
@ -128,9 +127,9 @@ bit 03_76
|
|||
bit 03_77
|
||||
bit 03_78
|
||||
bit 03_93
|
||||
bit 03_109
|
||||
bit 03_110
|
||||
bit 03_116
|
||||
bit 03_125
|
||||
bit 03_126
|
||||
bit 04_06
|
||||
bit 04_07
|
||||
|
|
@ -139,7 +138,6 @@ bit 04_12
|
|||
bit 04_13
|
||||
bit 04_14
|
||||
bit 04_15
|
||||
bit 04_19
|
||||
bit 04_28
|
||||
bit 04_29
|
||||
bit 04_30
|
||||
|
|
@ -175,9 +173,7 @@ bit 05_05
|
|||
bit 05_07
|
||||
bit 05_10
|
||||
bit 05_13
|
||||
bit 05_17
|
||||
bit 05_18
|
||||
bit 05_26
|
||||
bit 05_42
|
||||
bit 05_49
|
||||
bit 05_50
|
||||
|
|
@ -186,18 +182,18 @@ bit 05_53
|
|||
bit 05_54
|
||||
bit 05_58
|
||||
bit 05_60
|
||||
bit 05_62
|
||||
bit 05_65
|
||||
bit 05_66
|
||||
bit 05_68
|
||||
bit 05_69
|
||||
bit 05_70
|
||||
bit 05_74
|
||||
bit 05_76
|
||||
bit 05_77
|
||||
bit 05_78
|
||||
bit 05_81
|
||||
bit 05_82
|
||||
bit 05_86
|
||||
bit 05_102
|
||||
bit 05_110
|
||||
bit 05_113
|
||||
bit 05_114
|
||||
|
|
@ -218,11 +214,11 @@ bit 06_13
|
|||
bit 06_14
|
||||
bit 06_15
|
||||
bit 06_17
|
||||
bit 06_20
|
||||
bit 06_22
|
||||
bit 06_23
|
||||
bit 06_27
|
||||
bit 06_28
|
||||
bit 06_29
|
||||
bit 06_30
|
||||
bit 06_31
|
||||
bit 06_39
|
||||
|
|
@ -231,8 +227,7 @@ bit 06_44
|
|||
bit 06_45
|
||||
bit 06_46
|
||||
bit 06_49
|
||||
bit 06_53
|
||||
bit 06_57
|
||||
bit 06_52
|
||||
bit 06_59
|
||||
bit 06_60
|
||||
bit 06_61
|
||||
|
|
@ -241,6 +236,7 @@ bit 06_65
|
|||
bit 06_66
|
||||
bit 06_68
|
||||
bit 06_70
|
||||
bit 06_71
|
||||
bit 06_74
|
||||
bit 06_75
|
||||
bit 06_76
|
||||
|
|
@ -248,6 +244,7 @@ bit 06_77
|
|||
bit 06_78
|
||||
bit 06_79
|
||||
bit 06_86
|
||||
bit 06_87
|
||||
bit 06_89
|
||||
bit 06_91
|
||||
bit 06_92
|
||||
|
|
@ -255,9 +252,9 @@ bit 06_93
|
|||
bit 06_94
|
||||
bit 06_103
|
||||
bit 06_107
|
||||
bit 06_121
|
||||
bit 06_108
|
||||
bit 06_123
|
||||
bit 06_124
|
||||
bit 06_125
|
||||
bit 07_00
|
||||
bit 07_03
|
||||
bit 07_04
|
||||
|
|
@ -283,6 +280,7 @@ bit 07_32
|
|||
bit 07_36
|
||||
bit 07_38
|
||||
bit 07_40
|
||||
bit 07_42
|
||||
bit 07_43
|
||||
bit 07_46
|
||||
bit 07_47
|
||||
|
|
@ -318,6 +316,7 @@ bit 07_100
|
|||
bit 07_102
|
||||
bit 07_103
|
||||
bit 07_104
|
||||
bit 07_106
|
||||
bit 07_107
|
||||
bit 07_110
|
||||
bit 07_111
|
||||
|
|
@ -350,9 +349,9 @@ bit 08_22
|
|||
bit 08_23
|
||||
bit 08_24
|
||||
bit 08_25
|
||||
bit 08_26
|
||||
bit 08_27
|
||||
bit 08_28
|
||||
bit 08_29
|
||||
bit 08_30
|
||||
bit 08_31
|
||||
bit 08_32
|
||||
|
|
@ -378,6 +377,8 @@ bit 08_63
|
|||
bit 08_64
|
||||
bit 08_65
|
||||
bit 08_66
|
||||
bit 08_68
|
||||
bit 08_69
|
||||
bit 08_70
|
||||
bit 08_71
|
||||
bit 08_72
|
||||
|
|
@ -397,11 +398,14 @@ bit 08_88
|
|||
bit 08_89
|
||||
bit 08_90
|
||||
bit 08_92
|
||||
bit 08_93
|
||||
bit 08_94
|
||||
bit 08_95
|
||||
bit 08_96
|
||||
bit 08_97
|
||||
bit 08_100
|
||||
bit 08_101
|
||||
bit 08_102
|
||||
bit 08_103
|
||||
bit 08_104
|
||||
bit 08_105
|
||||
|
|
@ -417,7 +421,6 @@ bit 08_120
|
|||
bit 08_121
|
||||
bit 08_122
|
||||
bit 08_123
|
||||
bit 08_125
|
||||
bit 08_126
|
||||
bit 08_127
|
||||
bit 09_00
|
||||
|
|
@ -429,14 +432,13 @@ bit 09_05
|
|||
bit 09_06
|
||||
bit 09_07
|
||||
bit 09_08
|
||||
bit 09_09
|
||||
bit 09_10
|
||||
bit 09_11
|
||||
bit 09_13
|
||||
bit 09_15
|
||||
bit 09_16
|
||||
bit 09_19
|
||||
bit 09_20
|
||||
bit 09_21
|
||||
bit 09_22
|
||||
bit 09_23
|
||||
bit 09_24
|
||||
|
|
@ -444,6 +446,7 @@ bit 09_27
|
|||
bit 09_34
|
||||
bit 09_35
|
||||
bit 09_36
|
||||
bit 09_37
|
||||
bit 09_39
|
||||
bit 09_40
|
||||
bit 09_41
|
||||
|
|
@ -467,13 +470,15 @@ bit 09_69
|
|||
bit 09_75
|
||||
bit 09_77
|
||||
bit 09_79
|
||||
bit 09_80
|
||||
bit 09_82
|
||||
bit 09_83
|
||||
bit 09_84
|
||||
bit 09_89
|
||||
bit 09_91
|
||||
bit 09_98
|
||||
bit 09_99
|
||||
bit 09_100
|
||||
bit 09_101
|
||||
bit 09_106
|
||||
bit 09_107
|
||||
bit 09_111
|
||||
|
|
@ -481,16 +486,15 @@ bit 09_114
|
|||
bit 09_115
|
||||
bit 09_116
|
||||
bit 09_120
|
||||
bit 09_121
|
||||
bit 09_122
|
||||
bit 09_123
|
||||
bit 09_127
|
||||
bit 10_00
|
||||
bit 10_01
|
||||
bit 10_02
|
||||
bit 10_03
|
||||
bit 10_05
|
||||
bit 10_06
|
||||
bit 10_07
|
||||
bit 10_08
|
||||
bit 10_09
|
||||
bit 10_10
|
||||
bit 10_11
|
||||
|
|
@ -509,17 +513,17 @@ bit 10_27
|
|||
bit 10_28
|
||||
bit 10_30
|
||||
bit 10_31
|
||||
bit 10_33
|
||||
bit 10_34
|
||||
bit 10_37
|
||||
bit 10_39
|
||||
bit 10_41
|
||||
bit 10_42
|
||||
bit 10_43
|
||||
bit 10_44
|
||||
bit 10_46
|
||||
bit 10_47
|
||||
bit 10_49
|
||||
bit 10_50
|
||||
bit 10_52
|
||||
bit 10_53
|
||||
bit 10_55
|
||||
bit 10_56
|
||||
|
|
@ -527,7 +531,6 @@ bit 10_57
|
|||
bit 10_58
|
||||
bit 10_59
|
||||
bit 10_60
|
||||
bit 10_62
|
||||
bit 10_63
|
||||
bit 10_64
|
||||
bit 10_65
|
||||
|
|
@ -543,8 +546,8 @@ bit 10_76
|
|||
bit 10_78
|
||||
bit 10_79
|
||||
bit 10_80
|
||||
bit 10_81
|
||||
bit 10_82
|
||||
bit 10_83
|
||||
bit 10_85
|
||||
bit 10_87
|
||||
bit 10_88
|
||||
|
|
@ -584,7 +587,7 @@ bit 11_15
|
|||
bit 11_17
|
||||
bit 11_18
|
||||
bit 11_19
|
||||
bit 11_20
|
||||
bit 11_21
|
||||
bit 11_23
|
||||
bit 11_24
|
||||
bit 11_25
|
||||
|
|
@ -623,6 +626,7 @@ bit 11_77
|
|||
bit 11_79
|
||||
bit 11_81
|
||||
bit 11_82
|
||||
bit 11_83
|
||||
bit 11_87
|
||||
bit 11_90
|
||||
bit 11_91
|
||||
|
|
@ -631,6 +635,7 @@ bit 11_97
|
|||
bit 11_100
|
||||
bit 11_101
|
||||
bit 11_103
|
||||
bit 11_104
|
||||
bit 11_105
|
||||
bit 11_106
|
||||
bit 11_107
|
||||
|
|
@ -639,11 +644,13 @@ bit 11_113
|
|||
bit 11_116
|
||||
bit 11_117
|
||||
bit 11_119
|
||||
bit 11_120
|
||||
bit 11_121
|
||||
bit 11_122
|
||||
bit 11_123
|
||||
bit 11_125
|
||||
bit 11_127
|
||||
bit 12_00
|
||||
bit 12_01
|
||||
bit 12_02
|
||||
bit 12_03
|
||||
|
|
@ -658,16 +665,16 @@ bit 12_14
|
|||
bit 12_15
|
||||
bit 12_16
|
||||
bit 12_17
|
||||
bit 12_19
|
||||
bit 12_20
|
||||
bit 12_21
|
||||
bit 12_23
|
||||
bit 12_25
|
||||
bit 12_26
|
||||
bit 12_27
|
||||
bit 12_29
|
||||
bit 12_30
|
||||
bit 12_31
|
||||
bit 12_33
|
||||
bit 12_34
|
||||
bit 12_37
|
||||
bit 12_39
|
||||
bit 12_41
|
||||
|
|
@ -677,7 +684,7 @@ bit 12_46
|
|||
bit 12_47
|
||||
bit 12_48
|
||||
bit 12_49
|
||||
bit 12_50
|
||||
bit 12_52
|
||||
bit 12_53
|
||||
bit 12_55
|
||||
bit 12_57
|
||||
|
|
@ -697,16 +704,18 @@ bit 12_78
|
|||
bit 12_79
|
||||
bit 12_81
|
||||
bit 12_82
|
||||
bit 12_83
|
||||
bit 12_85
|
||||
bit 12_87
|
||||
bit 12_88
|
||||
bit 12_89
|
||||
bit 12_90
|
||||
bit 12_91
|
||||
bit 12_93
|
||||
bit 12_94
|
||||
bit 12_95
|
||||
bit 12_97
|
||||
bit 12_98
|
||||
bit 12_100
|
||||
bit 12_101
|
||||
bit 12_103
|
||||
bit 12_105
|
||||
|
|
@ -723,6 +732,7 @@ bit 12_120
|
|||
bit 12_121
|
||||
bit 12_122
|
||||
bit 12_123
|
||||
bit 12_124
|
||||
bit 12_127
|
||||
bit 13_00
|
||||
bit 13_01
|
||||
|
|
@ -739,21 +749,20 @@ bit 13_12
|
|||
bit 13_13
|
||||
bit 13_14
|
||||
bit 13_15
|
||||
bit 13_16
|
||||
bit 13_17
|
||||
bit 13_18
|
||||
bit 13_19
|
||||
bit 13_20
|
||||
bit 13_22
|
||||
bit 13_23
|
||||
bit 13_24
|
||||
bit 13_25
|
||||
bit 13_26
|
||||
bit 13_28
|
||||
bit 13_29
|
||||
bit 13_30
|
||||
bit 13_31
|
||||
bit 13_33
|
||||
bit 13_34
|
||||
bit 13_36
|
||||
bit 13_38
|
||||
bit 13_39
|
||||
bit 13_40
|
||||
|
|
@ -772,12 +781,13 @@ bit 13_57
|
|||
bit 13_58
|
||||
bit 13_59
|
||||
bit 13_60
|
||||
bit 13_62
|
||||
bit 13_63
|
||||
bit 13_64
|
||||
bit 13_65
|
||||
bit 13_66
|
||||
bit 13_68
|
||||
bit 13_69
|
||||
bit 13_70
|
||||
bit 13_71
|
||||
bit 13_72
|
||||
bit 13_73
|
||||
|
|
@ -787,15 +797,17 @@ bit 13_76
|
|||
bit 13_77
|
||||
bit 13_78
|
||||
bit 13_79
|
||||
bit 13_80
|
||||
bit 13_81
|
||||
bit 13_82
|
||||
bit 13_83
|
||||
bit 13_86
|
||||
bit 13_87
|
||||
bit 13_88
|
||||
bit 13_89
|
||||
bit 13_90
|
||||
bit 13_92
|
||||
bit 13_93
|
||||
bit 13_94
|
||||
bit 13_95
|
||||
bit 13_97
|
||||
bit 13_98
|
||||
|
|
@ -817,14 +829,13 @@ bit 13_120
|
|||
bit 13_121
|
||||
bit 13_122
|
||||
bit 13_123
|
||||
bit 13_125
|
||||
bit 13_126
|
||||
bit 13_127
|
||||
bit 14_00
|
||||
bit 14_01
|
||||
bit 14_02
|
||||
bit 14_03
|
||||
bit 14_04
|
||||
bit 14_05
|
||||
bit 14_09
|
||||
bit 14_10
|
||||
bit 14_11
|
||||
|
|
@ -836,8 +847,10 @@ bit 14_16
|
|||
bit 14_18
|
||||
bit 14_19
|
||||
bit 14_20
|
||||
bit 14_23
|
||||
bit 14_25
|
||||
bit 14_26
|
||||
bit 14_28
|
||||
bit 14_29
|
||||
bit 14_30
|
||||
bit 14_31
|
||||
|
|
@ -856,7 +869,6 @@ bit 14_69
|
|||
bit 14_71
|
||||
bit 14_73
|
||||
bit 14_74
|
||||
bit 14_76
|
||||
bit 14_77
|
||||
bit 14_78
|
||||
bit 14_79
|
||||
|
|
@ -872,7 +884,6 @@ bit 14_94
|
|||
bit 14_95
|
||||
bit 14_98
|
||||
bit 14_100
|
||||
bit 14_106
|
||||
bit 14_114
|
||||
bit 14_116
|
||||
bit 14_120
|
||||
|
|
@ -881,14 +892,13 @@ bit 15_00
|
|||
bit 15_01
|
||||
bit 15_02
|
||||
bit 15_03
|
||||
bit 15_04
|
||||
bit 15_05
|
||||
bit 15_06
|
||||
bit 15_07
|
||||
bit 15_08
|
||||
bit 15_09
|
||||
bit 15_10
|
||||
bit 15_11
|
||||
bit 15_12
|
||||
bit 15_13
|
||||
bit 15_14
|
||||
bit 15_15
|
||||
bit 15_16
|
||||
|
|
@ -901,7 +911,6 @@ bit 15_25
|
|||
bit 15_26
|
||||
bit 15_27
|
||||
bit 15_28
|
||||
bit 15_29
|
||||
bit 15_30
|
||||
bit 15_31
|
||||
bit 15_33
|
||||
|
|
@ -918,10 +927,10 @@ bit 15_63
|
|||
bit 15_64
|
||||
bit 15_65
|
||||
bit 15_66
|
||||
bit 15_67
|
||||
bit 15_68
|
||||
bit 15_69
|
||||
bit 15_71
|
||||
bit 15_72
|
||||
bit 15_73
|
||||
bit 15_74
|
||||
bit 15_75
|
||||
|
|
@ -931,12 +940,14 @@ bit 15_78
|
|||
bit 15_79
|
||||
bit 15_80
|
||||
bit 15_81
|
||||
bit 15_82
|
||||
bit 15_85
|
||||
bit 15_87
|
||||
bit 15_89
|
||||
bit 15_90
|
||||
bit 15_91
|
||||
bit 15_92
|
||||
bit 15_93
|
||||
bit 15_94
|
||||
bit 15_95
|
||||
bit 15_97
|
||||
|
|
@ -1006,7 +1017,6 @@ bit 16_121
|
|||
bit 16_122
|
||||
bit 16_124
|
||||
bit 16_126
|
||||
bit 17_00
|
||||
bit 17_02
|
||||
bit 17_06
|
||||
bit 17_07
|
||||
|
|
@ -1019,7 +1029,6 @@ bit 17_23
|
|||
bit 17_24
|
||||
bit 17_30
|
||||
bit 17_31
|
||||
bit 17_32
|
||||
bit 17_35
|
||||
bit 17_38
|
||||
bit 17_39
|
||||
|
|
@ -1032,7 +1041,6 @@ bit 17_47
|
|||
bit 17_48
|
||||
bit 17_51
|
||||
bit 17_54
|
||||
bit 17_55
|
||||
bit 17_56
|
||||
bit 17_57
|
||||
bit 17_58
|
||||
|
|
@ -1040,14 +1048,11 @@ bit 17_60
|
|||
bit 17_62
|
||||
bit 17_66
|
||||
bit 17_70
|
||||
bit 17_71
|
||||
bit 17_73
|
||||
bit 17_79
|
||||
bit 17_80
|
||||
bit 17_85
|
||||
bit 17_86
|
||||
bit 17_87
|
||||
bit 17_88
|
||||
bit 17_94
|
||||
bit 17_95
|
||||
bit 17_99
|
||||
|
|
@ -1072,6 +1077,7 @@ bit 18_06
|
|||
bit 18_07
|
||||
bit 18_08
|
||||
bit 18_14
|
||||
bit 18_17
|
||||
bit 18_20
|
||||
bit 18_22
|
||||
bit 18_23
|
||||
|
|
@ -1146,7 +1152,6 @@ bit 19_46
|
|||
bit 19_47
|
||||
bit 19_49
|
||||
bit 19_50
|
||||
bit 19_54
|
||||
bit 19_55
|
||||
bit 19_56
|
||||
bit 19_57
|
||||
|
|
@ -1177,7 +1182,6 @@ bit 19_113
|
|||
bit 19_114
|
||||
bit 19_119
|
||||
bit 19_120
|
||||
bit 19_121
|
||||
bit 19_123
|
||||
bit 19_125
|
||||
bit 19_127
|
||||
|
|
@ -1195,7 +1199,6 @@ bit 20_42
|
|||
bit 20_43
|
||||
bit 20_44
|
||||
bit 20_46
|
||||
bit 20_48
|
||||
bit 20_54
|
||||
bit 20_55
|
||||
bit 20_57
|
||||
|
|
@ -1253,7 +1256,6 @@ bit 21_85
|
|||
bit 21_86
|
||||
bit 21_94
|
||||
bit 21_98
|
||||
bit 21_99
|
||||
bit 21_102
|
||||
bit 21_106
|
||||
bit 21_107
|
||||
|
|
@ -1275,10 +1277,8 @@ bit 22_22
|
|||
bit 22_23
|
||||
bit 22_30
|
||||
bit 22_31
|
||||
bit 22_32
|
||||
bit 22_35
|
||||
bit 22_38
|
||||
bit 22_40
|
||||
bit 22_42
|
||||
bit 22_43
|
||||
bit 22_44
|
||||
|
|
@ -1287,7 +1287,6 @@ bit 22_47
|
|||
bit 22_48
|
||||
bit 22_51
|
||||
bit 22_54
|
||||
bit 22_55
|
||||
bit 22_56
|
||||
bit 22_57
|
||||
bit 22_58
|
||||
|
|
@ -1295,14 +1294,13 @@ bit 22_60
|
|||
bit 22_62
|
||||
bit 22_66
|
||||
bit 22_70
|
||||
bit 22_71
|
||||
bit 22_73
|
||||
bit 22_79
|
||||
bit 22_85
|
||||
bit 22_86
|
||||
bit 22_87
|
||||
bit 22_94
|
||||
bit 22_95
|
||||
bit 22_96
|
||||
bit 22_99
|
||||
bit 22_102
|
||||
bit 22_103
|
||||
|
|
@ -1311,7 +1309,6 @@ bit 22_107
|
|||
bit 22_108
|
||||
bit 22_110
|
||||
bit 22_111
|
||||
bit 22_112
|
||||
bit 22_115
|
||||
bit 22_118
|
||||
bit 22_121
|
||||
|
|
@ -1333,6 +1330,7 @@ bit 23_31
|
|||
bit 23_32
|
||||
bit 23_35
|
||||
bit 23_38
|
||||
bit 23_39
|
||||
bit 23_40
|
||||
bit 23_42
|
||||
bit 23_43
|
||||
|
|
@ -1356,7 +1354,6 @@ bit 23_80
|
|||
bit 23_85
|
||||
bit 23_86
|
||||
bit 23_87
|
||||
bit 23_88
|
||||
bit 23_94
|
||||
bit 23_95
|
||||
bit 23_96
|
||||
|
|
@ -1424,7 +1421,6 @@ bit 24_84
|
|||
bit 24_85
|
||||
bit 24_86
|
||||
bit 24_87
|
||||
bit 24_88
|
||||
bit 24_94
|
||||
bit 24_95
|
||||
bit 24_96
|
||||
|
|
@ -1475,7 +1471,6 @@ bit 25_48
|
|||
bit 25_51
|
||||
bit 25_52
|
||||
bit 25_54
|
||||
bit 25_55
|
||||
bit 25_56
|
||||
bit 25_57
|
||||
bit 25_58
|
||||
|
|
|
|||
|
|
@ -0,0 +1,14 @@
|
|||
BRKH_INT.BRKH_INT_NL1BEG0_SLOW.BRKH_INT_NL1BEG0 always
|
||||
BRKH_INT.BRKH_INT_NL1BEG1_SLOW.BRKH_INT_NL1BEG1 always
|
||||
BRKH_INT.BRKH_INT_NL1BEG2_SLOW.BRKH_INT_NL1BEG2 always
|
||||
BRKH_INT.BRKH_INT_NR1BEG0_SLOW.BRKH_INT_NR1BEG0 always
|
||||
BRKH_INT.BRKH_INT_NR1BEG1_SLOW.BRKH_INT_NR1BEG1 always
|
||||
BRKH_INT.BRKH_INT_NR1BEG2_SLOW.BRKH_INT_NR1BEG2 always
|
||||
BRKH_INT.BRKH_INT_NR1BEG3_SLOW.BRKH_INT_NR1BEG3 always
|
||||
BRKH_INT.BRKH_INT_SL1END0.BRKH_INT_SL1END0_SLOW always
|
||||
BRKH_INT.BRKH_INT_SL1END1.BRKH_INT_SL1END1_SLOW always
|
||||
BRKH_INT.BRKH_INT_SL1END2.BRKH_INT_SL1END2_SLOW always
|
||||
BRKH_INT.BRKH_INT_SL1END3.BRKH_INT_SL1END3_SLOW always
|
||||
BRKH_INT.BRKH_INT_SR1END1.BRKH_INT_SR1END1_SLOW always
|
||||
BRKH_INT.BRKH_INT_SR1END2.BRKH_INT_SR1END2_SLOW always
|
||||
BRKH_INT.BRKH_INT_SR1END3.BRKH_INT_SR1END3_SLOW always
|
||||
|
|
@ -0,0 +1,156 @@
|
|||
RIOI3_TBYTETERM.IOI_LOGIC_OUTS0_0.IOI_ILOGIC1_Q1 always
|
||||
RIOI3_TBYTETERM.IOI_LOGIC_OUTS0_1.IOI_ILOGIC0_Q1 always
|
||||
RIOI3_TBYTETERM.IOI_LOGIC_OUTS1_0.IOI_IDELAY1_CNTVALUEOUT1 always
|
||||
RIOI3_TBYTETERM.IOI_LOGIC_OUTS1_1.IOI_IDELAY0_CNTVALUEOUT1 always
|
||||
RIOI3_TBYTETERM.IOI_LOGIC_OUTS2_0.RIOI_OLOGIC1_TFB_LOCAL always
|
||||
RIOI3_TBYTETERM.IOI_LOGIC_OUTS2_1.RIOI_OLOGIC0_TFB_LOCAL always
|
||||
RIOI3_TBYTETERM.IOI_LOGIC_OUTS3_0.IOI_ILOGIC1_Q6 always
|
||||
RIOI3_TBYTETERM.IOI_LOGIC_OUTS3_1.IOI_ILOGIC0_Q6 always
|
||||
RIOI3_TBYTETERM.IOI_LOGIC_OUTS5_0.IOI_OLOGIC1_IOCLKGLITCH always
|
||||
RIOI3_TBYTETERM.IOI_LOGIC_OUTS5_1.IOI_OLOGIC0_IOCLKGLITCH always
|
||||
RIOI3_TBYTETERM.IOI_LOGIC_OUTS7_0.IOI_ILOGIC1_Q7 always
|
||||
RIOI3_TBYTETERM.IOI_LOGIC_OUTS7_1.IOI_ILOGIC0_Q7 always
|
||||
RIOI3_TBYTETERM.IOI_LOGIC_OUTS8_0.IOI_ILOGIC1_Q8 always
|
||||
RIOI3_TBYTETERM.IOI_LOGIC_OUTS8_1.IOI_ILOGIC0_Q8 always
|
||||
RIOI3_TBYTETERM.IOI_LOGIC_OUTS9_0.IOI_ILOGIC1_Q3 always
|
||||
RIOI3_TBYTETERM.IOI_LOGIC_OUTS9_1.IOI_ILOGIC0_Q3 always
|
||||
RIOI3_TBYTETERM.IOI_LOGIC_OUTS10_0.IOI_ILOGIC1_Q4 always
|
||||
RIOI3_TBYTETERM.IOI_LOGIC_OUTS10_1.IOI_ILOGIC0_Q4 always
|
||||
RIOI3_TBYTETERM.IOI_LOGIC_OUTS11_0.IOI_IDELAY1_CNTVALUEOUT4 always
|
||||
RIOI3_TBYTETERM.IOI_LOGIC_OUTS11_1.IOI_IDELAY0_CNTVALUEOUT4 always
|
||||
RIOI3_TBYTETERM.IOI_LOGIC_OUTS14_0.IOI_ILOGIC1_Q5 always
|
||||
RIOI3_TBYTETERM.IOI_LOGIC_OUTS14_1.IOI_ILOGIC0_Q5 always
|
||||
RIOI3_TBYTETERM.IOI_LOGIC_OUTS15_0.IOI_IDELAY1_CNTVALUEOUT3 always
|
||||
RIOI3_TBYTETERM.IOI_LOGIC_OUTS15_1.IOI_IDELAY0_CNTVALUEOUT3 always
|
||||
RIOI3_TBYTETERM.IOI_LOGIC_OUTS18_0.IOI_ILOGIC1_O always
|
||||
RIOI3_TBYTETERM.IOI_LOGIC_OUTS18_1.IOI_ILOGIC0_O always
|
||||
RIOI3_TBYTETERM.IOI_LOGIC_OUTS19_0.IOI_IDELAY1_CNTVALUEOUT2 always
|
||||
RIOI3_TBYTETERM.IOI_LOGIC_OUTS19_1.IOI_IDELAY0_CNTVALUEOUT2 always
|
||||
RIOI3_TBYTETERM.IOI_LOGIC_OUTS20_0.IOI_IDELAY1_CNTVALUEOUT0 always
|
||||
RIOI3_TBYTETERM.IOI_LOGIC_OUTS20_1.IOI_IDELAY0_CNTVALUEOUT0 always
|
||||
RIOI3_TBYTETERM.IOI_LOGIC_OUTS23_0.IOI_ILOGIC1_Q2 always
|
||||
RIOI3_TBYTETERM.IOI_LOGIC_OUTS23_1.IOI_ILOGIC0_Q2 always
|
||||
RIOI3_TBYTETERM.IOI_RCLK_DIV_CE0.IOI_BYP3_1 always
|
||||
RIOI3_TBYTETERM.IOI_RCLK_DIV_CE1.IOI_BYP4_1 always
|
||||
RIOI3_TBYTETERM.IOI_RCLK_DIV_CE2_1.IOI_BYP4_1 always
|
||||
RIOI3_TBYTETERM.IOI_RCLK_DIV_CE3_1.IOI_BYP3_1 always
|
||||
RIOI3_TBYTETERM.IOI_RCLK_DIV_CLR0_1.IOI_BYP3_0 always
|
||||
RIOI3_TBYTETERM.IOI_RCLK_DIV_CLR1_1.IOI_BYP4_0 always
|
||||
RIOI3_TBYTETERM.IOI_RCLK_DIV_CLR2.IOI_BYP4_0 always
|
||||
RIOI3_TBYTETERM.IOI_RCLK_DIV_CLR3.IOI_BYP3_0 always
|
||||
RIOI3_TBYTETERM.IOI_IDELAY0_C.IOI_CLK1_1 always
|
||||
RIOI3_TBYTETERM.IOI_IDELAY0_CE.IOI_IMUX32_1 always
|
||||
RIOI3_TBYTETERM.IOI_IDELAY0_CINVCTRL.IOI_BYP6_1 always
|
||||
RIOI3_TBYTETERM.IOI_IDELAY0_DATAIN.IOI_IMUX25_1 always
|
||||
RIOI3_TBYTETERM.IOI_IDELAY0_INC.IOI_IMUX26_1 always
|
||||
RIOI3_TBYTETERM.IOI_IDELAY0_LD.IOI_IMUX30_1 always
|
||||
RIOI3_TBYTETERM.IOI_IDELAY0_LDPIPEEN.IOI_IMUX33_1 always
|
||||
RIOI3_TBYTETERM.IOI_IDELAY0_REGRST.IOI_IMUX12_1 always
|
||||
RIOI3_TBYTETERM.IOI_IDELAY0_CNTVALUEIN0.IOI_IMUX41_1 always
|
||||
RIOI3_TBYTETERM.IOI_IDELAY0_CNTVALUEIN1.IOI_IMUX36_1 always
|
||||
RIOI3_TBYTETERM.IOI_IDELAY0_CNTVALUEIN2.IOI_IMUX35_1 always
|
||||
RIOI3_TBYTETERM.IOI_IDELAY0_CNTVALUEIN3.IOI_IMUX38_1 always
|
||||
RIOI3_TBYTETERM.IOI_IDELAY0_CNTVALUEIN4.IOI_IMUX39_1 always
|
||||
RIOI3_TBYTETERM.IOI_IDELAY1_C.IOI_CLK1_0 always
|
||||
RIOI3_TBYTETERM.IOI_IDELAY1_CE.IOI_IMUX32_0 always
|
||||
RIOI3_TBYTETERM.IOI_IDELAY1_CINVCTRL.IOI_BYP6_0 always
|
||||
RIOI3_TBYTETERM.IOI_IDELAY1_DATAIN.IOI_IMUX25_0 always
|
||||
RIOI3_TBYTETERM.IOI_IDELAY1_INC.IOI_IMUX26_0 always
|
||||
RIOI3_TBYTETERM.IOI_IDELAY1_LD.IOI_IMUX30_0 always
|
||||
RIOI3_TBYTETERM.IOI_IDELAY1_LDPIPEEN.IOI_IMUX33_0 always
|
||||
RIOI3_TBYTETERM.IOI_IDELAY1_REGRST.IOI_IMUX12_0 always
|
||||
RIOI3_TBYTETERM.IOI_IDELAY1_CNTVALUEIN0.IOI_IMUX41_0 always
|
||||
RIOI3_TBYTETERM.IOI_IDELAY1_CNTVALUEIN1.IOI_IMUX36_0 always
|
||||
RIOI3_TBYTETERM.IOI_IDELAY1_CNTVALUEIN2.IOI_IMUX35_0 always
|
||||
RIOI3_TBYTETERM.IOI_IDELAY1_CNTVALUEIN3.IOI_IMUX38_0 always
|
||||
RIOI3_TBYTETERM.IOI_IDELAY1_CNTVALUEIN4.IOI_IMUX39_0 always
|
||||
RIOI3_TBYTETERM.IOI_ILOGIC0_BITSLIP.IOI_IMUX0_1 always
|
||||
RIOI3_TBYTETERM.IOI_ILOGIC0_CLKDIV.IOI_CLK0_1 always
|
||||
RIOI3_TBYTETERM.IOI_ILOGIC0_DYNCLKDIVPSEL.IOI_IMUX10_1 always
|
||||
RIOI3_TBYTETERM.IOI_ILOGIC0_DYNCLKDIVSEL.IOI_IMUX4_1 always
|
||||
RIOI3_TBYTETERM.IOI_ILOGIC0_DYNCLKSEL.IOI_IMUX37_1 always
|
||||
RIOI3_TBYTETERM.IOI_ILOGIC0_OCLK.IOI_OCLK_0 always
|
||||
RIOI3_TBYTETERM.IOI_ILOGIC0_SR.IOI_CTRL1_1 always
|
||||
RIOI3_TBYTETERM.IOI_ILOGIC0_CE1.IOI_IMUX5_1 always
|
||||
RIOI3_TBYTETERM.IOI_ILOGIC0_CE2.IOI_IMUX14_1 always
|
||||
RIOI3_TBYTETERM.IOI_ILOGIC1_BITSLIP.IOI_IMUX0_0 always
|
||||
RIOI3_TBYTETERM.IOI_ILOGIC1_CLKDIV.IOI_CLK0_0 always
|
||||
RIOI3_TBYTETERM.IOI_ILOGIC1_DYNCLKDIVPSEL.IOI_IMUX10_0 always
|
||||
RIOI3_TBYTETERM.IOI_ILOGIC1_DYNCLKDIVSEL.IOI_IMUX4_0 always
|
||||
RIOI3_TBYTETERM.IOI_ILOGIC1_DYNCLKSEL.IOI_IMUX37_0 always
|
||||
RIOI3_TBYTETERM.IOI_ILOGIC1_OCLK.IOI_OCLK_1 always
|
||||
RIOI3_TBYTETERM.IOI_ILOGIC1_SR.IOI_CTRL1_0 always
|
||||
RIOI3_TBYTETERM.IOI_ILOGIC1_CE1.IOI_IMUX5_0 always
|
||||
RIOI3_TBYTETERM.IOI_ILOGIC1_CE2.IOI_IMUX14_0 always
|
||||
RIOI3_TBYTETERM.IOI_OLOGIC0_CLK.IOI_OCLK_0 always
|
||||
RIOI3_TBYTETERM.IOI_OLOGIC0_OCE.IOI_IMUX29_1 always
|
||||
RIOI3_TBYTETERM.IOI_OLOGIC0_SR.IOI_CTRL0_1 always
|
||||
RIOI3_TBYTETERM.IOI_OLOGIC0_TBYTEIN.IOI_TBYTEIN_TERM always
|
||||
RIOI3_TBYTETERM.IOI_OLOGIC0_TCE.IOI_IMUX1_1 always
|
||||
RIOI3_TBYTETERM.IOI_OLOGIC0_D1.IOI_IMUX34_1 always
|
||||
RIOI3_TBYTETERM.IOI_OLOGIC0_D2.IOI_IMUX40_1 always
|
||||
RIOI3_TBYTETERM.IOI_OLOGIC0_D3.IOI_IMUX44_1 always
|
||||
RIOI3_TBYTETERM.IOI_OLOGIC0_D4.IOI_IMUX42_1 always
|
||||
RIOI3_TBYTETERM.IOI_OLOGIC0_D5.IOI_IMUX43_1 always
|
||||
RIOI3_TBYTETERM.IOI_OLOGIC0_D6.IOI_IMUX45_1 always
|
||||
RIOI3_TBYTETERM.IOI_OLOGIC0_D7.IOI_IMUX46_1 always
|
||||
RIOI3_TBYTETERM.IOI_OLOGIC0_D8.IOI_IMUX47_1 always
|
||||
RIOI3_TBYTETERM.IOI_OLOGIC0_T1.IOI_IMUX15_1 always
|
||||
RIOI3_TBYTETERM.IOI_OLOGIC0_T2.IOI_IMUX7_1 always
|
||||
RIOI3_TBYTETERM.IOI_OLOGIC0_T3.IOI_IMUX13_1 always
|
||||
RIOI3_TBYTETERM.IOI_OLOGIC0_T4.IOI_IMUX21_1 always
|
||||
RIOI3_TBYTETERM.IOI_OLOGIC1_CLK.IOI_OCLK_1 always
|
||||
RIOI3_TBYTETERM.IOI_OLOGIC1_OCE.IOI_IMUX29_0 always
|
||||
RIOI3_TBYTETERM.IOI_OLOGIC1_SR.IOI_CTRL0_0 always
|
||||
RIOI3_TBYTETERM.IOI_OLOGIC1_TBYTEIN.IOI_TBYTEIN_TERM always
|
||||
RIOI3_TBYTETERM.IOI_OLOGIC1_TCE.IOI_IMUX1_0 always
|
||||
RIOI3_TBYTETERM.IOI_OLOGIC1_D1.IOI_IMUX34_0 always
|
||||
RIOI3_TBYTETERM.IOI_OLOGIC1_D2.IOI_IMUX40_0 always
|
||||
RIOI3_TBYTETERM.IOI_OLOGIC1_D3.IOI_IMUX44_0 always
|
||||
RIOI3_TBYTETERM.IOI_OLOGIC1_D4.IOI_IMUX42_0 always
|
||||
RIOI3_TBYTETERM.IOI_OLOGIC1_D5.IOI_IMUX43_0 always
|
||||
RIOI3_TBYTETERM.IOI_OLOGIC1_D6.IOI_IMUX45_0 always
|
||||
RIOI3_TBYTETERM.IOI_OLOGIC1_D7.IOI_IMUX46_0 always
|
||||
RIOI3_TBYTETERM.IOI_OLOGIC1_D8.IOI_IMUX47_0 always
|
||||
RIOI3_TBYTETERM.IOI_OLOGIC1_T1.IOI_IMUX15_0 always
|
||||
RIOI3_TBYTETERM.IOI_OLOGIC1_T2.IOI_IMUX7_0 always
|
||||
RIOI3_TBYTETERM.IOI_OLOGIC1_T3.IOI_IMUX13_0 always
|
||||
RIOI3_TBYTETERM.IOI_OLOGIC1_T4.IOI_IMUX21_0 always
|
||||
RIOI3_TBYTETERM.RIOI_DCI_T_TERM0.IOI_IMUX6_1 always
|
||||
RIOI3_TBYTETERM.RIOI_DCI_T_TERM1.IOI_IMUX6_0 always
|
||||
RIOI3_TBYTETERM.RIOI_IBUF_DISABLE0.IOI_IMUX9_1 always
|
||||
RIOI3_TBYTETERM.RIOI_IBUF_DISABLE1.IOI_IMUX9_0 always
|
||||
RIOI3_TBYTETERM.RIOI_I0.RIOI_IBUF0 always
|
||||
RIOI3_TBYTETERM.RIOI_I1.RIOI_IBUF1 always
|
||||
RIOI3_TBYTETERM.RIOI_IDELAY0_DATAOUT.RIOI_IDELAY0_IDATAIN always
|
||||
RIOI3_TBYTETERM.RIOI_IDELAY0_IDATAIN.RIOI_I0 always
|
||||
RIOI3_TBYTETERM.RIOI_IDELAY1_DATAOUT.RIOI_IDELAY1_IDATAIN always
|
||||
RIOI3_TBYTETERM.RIOI_IDELAY1_IDATAIN.RIOI_I1 always
|
||||
RIOI3_TBYTETERM.RIOI_ILOGIC0_D.RIOI_I0 always
|
||||
RIOI3_TBYTETERM.RIOI_ILOGIC0_DDLY.RIOI_IDELAY0_DATAOUT always
|
||||
RIOI3_TBYTETERM.RIOI_ILOGIC0_OFB.RIOI_OLOGIC0_OFB always
|
||||
RIOI3_TBYTETERM.RIOI_ILOGIC0_TFB.RIOI_OLOGIC0_TFB_LOCAL always
|
||||
RIOI3_TBYTETERM.RIOI_ILOGIC1_D.RIOI_I1 always
|
||||
RIOI3_TBYTETERM.RIOI_ILOGIC1_DDLY.RIOI_IDELAY1_DATAOUT always
|
||||
RIOI3_TBYTETERM.RIOI_ILOGIC1_OFB.RIOI_OLOGIC1_OFB always
|
||||
RIOI3_TBYTETERM.RIOI_ILOGIC1_TFB.RIOI_OLOGIC1_TFB_LOCAL always
|
||||
RIOI3_TBYTETERM.RIOI_ISIN11.RIOI_ISOUT10 always
|
||||
RIOI3_TBYTETERM.RIOI_ISIN21.RIOI_ISOUT20 always
|
||||
RIOI3_TBYTETERM.RIOI_O0.RIOI_OLOGIC0_OQ always
|
||||
RIOI3_TBYTETERM.RIOI_O1.RIOI_OLOGIC1_OQ always
|
||||
RIOI3_TBYTETERM.RIOI_OLOGIC0_OQ.IOI_OLOGIC0_D1 always
|
||||
RIOI3_TBYTETERM.RIOI_OLOGIC0_TFB_LOCAL.RIOI_OLOGIC0_TFB always
|
||||
RIOI3_TBYTETERM.RIOI_OLOGIC0_TQ.IOI_OLOGIC0_T1 always
|
||||
RIOI3_TBYTETERM.RIOI_OLOGIC1_OQ.IOI_OLOGIC1_D1 always
|
||||
RIOI3_TBYTETERM.RIOI_OLOGIC1_TFB_LOCAL.RIOI_OLOGIC1_TFB always
|
||||
RIOI3_TBYTETERM.RIOI_OLOGIC1_TQ.IOI_OLOGIC1_T1 always
|
||||
RIOI3_TBYTETERM.RIOI_OSIN10.RIOI_OSOUT11 always
|
||||
RIOI3_TBYTETERM.RIOI_OSIN20.RIOI_OSOUT21 always
|
||||
RIOI3_TBYTETERM.RIOI_T0.RIOI_OLOGIC0_TQ always
|
||||
RIOI3_TBYTETERM.RIOI_T1.RIOI_OLOGIC1_TQ always
|
||||
RIOI3_TBYTETERM.RIOI3_IDELAY0_IFDLY0.IOI_FAN4_1 always
|
||||
RIOI3_TBYTETERM.RIOI3_IDELAY0_IFDLY1.IOI_FAN5_1 always
|
||||
RIOI3_TBYTETERM.RIOI3_IDELAY0_IFDLY2.IOI_BYP7_1 always
|
||||
RIOI3_TBYTETERM.RIOI3_IDELAY1_IFDLY0.IOI_FAN4_0 always
|
||||
RIOI3_TBYTETERM.RIOI3_IDELAY1_IFDLY1.IOI_FAN5_0 always
|
||||
RIOI3_TBYTETERM.RIOI3_IDELAY1_IFDLY2.IOI_BYP7_0 always
|
||||
|
|
@ -158,3 +158,179 @@ CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y15.ZINV_CE1 27_251
|
|||
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y15.ZINV_S0 27_243
|
||||
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y15.ZINV_S1 26_251
|
||||
CLK_BUFG_BOT_R.BUFGCTRL.BUFGCTRL_X0Y15.ZPRESELECT_I0 26_242
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK0.CLK_BUFG_BUFGCTRL0_O 27_14
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK1.CLK_BUFG_BUFGCTRL1_O 27_30
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK2.CLK_BUFG_BUFGCTRL2_O 27_46
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK3.CLK_BUFG_BUFGCTRL3_O 27_62
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK4.CLK_BUFG_BUFGCTRL4_O 27_78
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK5.CLK_BUFG_BUFGCTRL5_O 27_94
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK6.CLK_BUFG_BUFGCTRL6_O 27_110
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK7.CLK_BUFG_BUFGCTRL7_O 27_126
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK8.CLK_BUFG_BUFGCTRL8_O 27_142
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK9.CLK_BUFG_BUFGCTRL9_O 27_158
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK10.CLK_BUFG_BUFGCTRL10_O 27_174
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK11.CLK_BUFG_BUFGCTRL11_O 27_190
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK12.CLK_BUFG_BUFGCTRL12_O 27_206
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK13.CLK_BUFG_BUFGCTRL13_O 27_222
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK14.CLK_BUFG_BUFGCTRL14_O 27_238
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_CK_GCLK15.CLK_BUFG_BUFGCTRL15_O 27_254
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL0_I0.CLK_BUFG_BOT_R_CK_MUXED0 !26_07 26_08 !27_06
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL0_I0.CLK_BUFG_R_FBG_OUT1 26_07 !26_08 27_06
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL0_I0.CLK_BUFG_R_FBG_OUT15 26_07 !26_08 !27_06
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL0_I0.CLK_BUFG_IMUX24_0 !26_07 !26_08 27_06
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL0_I0.CLK_BUFG_IMUX28_0 !26_07 !26_08 !27_06
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL0_I1.CLK_BUFG_BOT_R_CK_MUXED1 26_04 !26_05 !27_05
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL0_I1.CLK_BUFG_R_FBG_OUT1 !26_04 26_05 27_05
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL0_I1.CLK_BUFG_R_FBG_OUT15 !26_04 !26_05 27_05
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL0_I1.CLK_BUFG_IMUX24_0 !26_04 26_05 !27_05
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL0_I1.CLK_BUFG_IMUX28_0 !26_04 !26_05 !27_05
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL1_I0.CLK_BUFG_BOT_R_CK_MUXED2 !26_23 26_24 !27_22
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL1_I0.CLK_BUFG_R_FBG_OUT0 26_23 !26_24 !27_22
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL1_I0.CLK_BUFG_R_FBG_OUT2 26_23 !26_24 27_22
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL1_I0.CLK_BUFG_IMUX25_0 !26_23 !26_24 27_22
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL1_I0.CLK_BUFG_IMUX29_0 !26_23 !26_24 !27_22
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL1_I1.CLK_BUFG_BOT_R_CK_MUXED3 26_20 !26_21 !27_21
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL1_I1.CLK_BUFG_R_FBG_OUT0 !26_20 !26_21 27_21
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL1_I1.CLK_BUFG_R_FBG_OUT2 !26_20 26_21 27_21
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL1_I1.CLK_BUFG_IMUX25_0 !26_20 26_21 !27_21
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL1_I1.CLK_BUFG_IMUX29_0 !26_20 !26_21 !27_21
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL2_I0.CLK_BUFG_BOT_R_CK_MUXED4 !26_39 26_40 !27_38
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL2_I0.CLK_BUFG_R_FBG_OUT1 26_39 !26_40 !27_38
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL2_I0.CLK_BUFG_R_FBG_OUT3 26_39 !26_40 27_38
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL2_I0.CLK_BUFG_IMUX26_0 !26_39 !26_40 27_38
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL2_I0.CLK_BUFG_IMUX30_0 !26_39 !26_40 !27_38
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL2_I1.CLK_BUFG_BOT_R_CK_MUXED5 26_36 !26_37 !27_37
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL2_I1.CLK_BUFG_R_FBG_OUT1 !26_36 !26_37 27_37
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL2_I1.CLK_BUFG_R_FBG_OUT3 !26_36 26_37 27_37
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL2_I1.CLK_BUFG_IMUX26_0 !26_36 26_37 !27_37
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL2_I1.CLK_BUFG_IMUX30_0 !26_36 !26_37 !27_37
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL3_I0.CLK_BUFG_BOT_R_CK_MUXED6 !26_55 26_56 !27_54
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL3_I0.CLK_BUFG_R_FBG_OUT2 26_55 !26_56 !27_54
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL3_I0.CLK_BUFG_R_FBG_OUT4 26_55 !26_56 27_54
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL3_I0.CLK_BUFG_IMUX27_0 !26_55 !26_56 27_54
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL3_I0.CLK_BUFG_IMUX31_0 !26_55 !26_56 !27_54
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL3_I1.CLK_BUFG_BOT_R_CK_MUXED7 26_52 !26_53 !27_53
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL3_I1.CLK_BUFG_R_FBG_OUT2 !26_52 !26_53 27_53
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL3_I1.CLK_BUFG_R_FBG_OUT4 !26_52 26_53 27_53
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL3_I1.CLK_BUFG_IMUX27_0 !26_52 26_53 !27_53
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL3_I1.CLK_BUFG_IMUX31_0 !26_52 !26_53 !27_53
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL4_I0.CLK_BUFG_BOT_R_CK_MUXED8 !26_71 26_72 !27_70
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL4_I0.CLK_BUFG_R_FBG_OUT3 26_71 !26_72 !27_70
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL4_I0.CLK_BUFG_R_FBG_OUT5 26_71 !26_72 27_70
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL4_I0.CLK_BUFG_IMUX24_1 !26_71 !26_72 27_70
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL4_I0.CLK_BUFG_IMUX28_1 !26_71 !26_72 !27_70
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL4_I1.CLK_BUFG_BOT_R_CK_MUXED9 26_68 !26_69 !27_69
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL4_I1.CLK_BUFG_R_FBG_OUT3 !26_68 !26_69 27_69
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL4_I1.CLK_BUFG_R_FBG_OUT5 !26_68 26_69 27_69
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL4_I1.CLK_BUFG_IMUX24_1 !26_68 26_69 !27_69
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL4_I1.CLK_BUFG_IMUX28_1 !26_68 !26_69 !27_69
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL5_I0.CLK_BUFG_BOT_R_CK_MUXED10 !26_87 26_88 !27_86
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL5_I0.CLK_BUFG_R_FBG_OUT4 26_87 !26_88 !27_86
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL5_I0.CLK_BUFG_R_FBG_OUT6 26_87 !26_88 27_86
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL5_I0.CLK_BUFG_IMUX25_1 !26_87 !26_88 27_86
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL5_I0.CLK_BUFG_IMUX29_1 !26_87 !26_88 !27_86
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL5_I1.CLK_BUFG_BOT_R_CK_MUXED11 26_84 !26_85 !27_85
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL5_I1.CLK_BUFG_R_FBG_OUT4 !26_84 !26_85 27_85
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL5_I1.CLK_BUFG_R_FBG_OUT6 !26_84 26_85 27_85
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL5_I1.CLK_BUFG_IMUX25_1 !26_84 26_85 !27_85
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL5_I1.CLK_BUFG_IMUX29_1 !26_84 !26_85 !27_85
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL6_I0.CLK_BUFG_BOT_R_CK_MUXED12 !26_103 26_104 !27_102
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL6_I0.CLK_BUFG_R_FBG_OUT5 26_103 !26_104 !27_102
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL6_I0.CLK_BUFG_R_FBG_OUT7 26_103 !26_104 27_102
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL6_I0.CLK_BUFG_IMUX26_1 !26_103 !26_104 27_102
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL6_I0.CLK_BUFG_IMUX30_1 !26_103 !26_104 !27_102
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL6_I1.CLK_BUFG_BOT_R_CK_MUXED13 26_100 !26_101 !27_101
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL6_I1.CLK_BUFG_R_FBG_OUT5 !26_100 !26_101 27_101
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL6_I1.CLK_BUFG_R_FBG_OUT7 !26_100 26_101 27_101
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL6_I1.CLK_BUFG_IMUX26_1 !26_100 26_101 !27_101
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL6_I1.CLK_BUFG_IMUX30_1 !26_100 !26_101 !27_101
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL7_I0.CLK_BUFG_BOT_R_CK_MUXED14 !26_119 26_120 !27_118
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL7_I0.CLK_BUFG_R_FBG_OUT6 26_119 !26_120 !27_118
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL7_I0.CLK_BUFG_R_FBG_OUT8 26_119 !26_120 27_118
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL7_I0.CLK_BUFG_IMUX27_1 !26_119 !26_120 27_118
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL7_I0.CLK_BUFG_IMUX31_1 !26_119 !26_120 !27_118
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL7_I1.CLK_BUFG_BOT_R_CK_MUXED15 26_116 !26_117 !27_117
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL7_I1.CLK_BUFG_R_FBG_OUT6 !26_116 !26_117 27_117
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL7_I1.CLK_BUFG_R_FBG_OUT8 !26_116 26_117 27_117
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL7_I1.CLK_BUFG_IMUX27_1 !26_116 26_117 !27_117
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL7_I1.CLK_BUFG_IMUX31_1 !26_116 !26_117 !27_117
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL8_I0.CLK_BUFG_BOT_R_CK_MUXED16 !26_135 26_136 !27_134
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL8_I0.CLK_BUFG_R_FBG_OUT7 26_135 !26_136 !27_134
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL8_I0.CLK_BUFG_R_FBG_OUT9 26_135 !26_136 27_134
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL8_I0.CLK_BUFG_IMUX24_2 !26_135 !26_136 27_134
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL8_I0.CLK_BUFG_IMUX28_2 !26_135 !26_136 !27_134
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL8_I1.CLK_BUFG_BOT_R_CK_MUXED17 26_132 !26_133 !27_133
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL8_I1.CLK_BUFG_R_FBG_OUT7 !26_132 !26_133 27_133
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL8_I1.CLK_BUFG_R_FBG_OUT9 !26_132 26_133 27_133
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL8_I1.CLK_BUFG_IMUX24_2 !26_132 26_133 !27_133
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL8_I1.CLK_BUFG_IMUX28_2 !26_132 !26_133 !27_133
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL9_I0.CLK_BUFG_BOT_R_CK_MUXED18 !26_151 26_152 !27_150
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL9_I0.CLK_BUFG_R_FBG_OUT8 26_151 !26_152 !27_150
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL9_I0.CLK_BUFG_R_FBG_OUT10 26_151 !26_152 27_150
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL9_I0.CLK_BUFG_IMUX25_2 !26_151 !26_152 27_150
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL9_I0.CLK_BUFG_IMUX29_2 !26_151 !26_152 !27_150
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL9_I1.CLK_BUFG_BOT_R_CK_MUXED19 26_148 !26_149 !27_149
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL9_I1.CLK_BUFG_R_FBG_OUT8 !26_148 !26_149 27_149
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL9_I1.CLK_BUFG_R_FBG_OUT10 !26_148 26_149 27_149
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL9_I1.CLK_BUFG_IMUX25_2 !26_148 26_149 !27_149
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL9_I1.CLK_BUFG_IMUX29_2 !26_148 !26_149 !27_149
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_BOT_R_CK_MUXED20 !26_167 26_168 !27_166
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_R_FBG_OUT9 26_167 !26_168 !27_166
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_R_FBG_OUT11 26_167 !26_168 27_166
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_IMUX26_2 !26_167 !26_168 27_166
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_IMUX30_2 !26_167 !26_168 !27_166
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_BOT_R_CK_MUXED21 26_164 !26_165 !27_165
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_R_FBG_OUT9 !26_164 !26_165 27_165
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_R_FBG_OUT11 !26_164 26_165 27_165
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_IMUX26_2 !26_164 26_165 !27_165
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_IMUX30_2 !26_164 !26_165 !27_165
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_BOT_R_CK_MUXED22 !26_183 26_184 !27_182
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_R_FBG_OUT10 26_183 !26_184 !27_182
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_R_FBG_OUT12 26_183 !26_184 27_182
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_IMUX27_2 !26_183 !26_184 27_182
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_IMUX31_2 !26_183 !26_184 !27_182
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_BOT_R_CK_MUXED23 26_180 !26_181 !27_181
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_R_FBG_OUT10 !26_180 !26_181 27_181
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_R_FBG_OUT12 !26_180 26_181 27_181
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_IMUX27_2 !26_180 26_181 !27_181
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_IMUX31_2 !26_180 !26_181 !27_181
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_BOT_R_CK_MUXED24 !26_199 26_200 !27_198
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_R_FBG_OUT11 26_199 !26_200 !27_198
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_R_FBG_OUT13 26_199 !26_200 27_198
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_IMUX24_3 !26_199 !26_200 27_198
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_IMUX28_3 !26_199 !26_200 !27_198
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_BOT_R_CK_MUXED25 26_196 !26_197 !27_197
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_R_FBG_OUT11 !26_196 !26_197 27_197
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_R_FBG_OUT13 !26_196 26_197 27_197
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_IMUX24_3 !26_196 26_197 !27_197
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_IMUX28_3 !26_196 !26_197 !27_197
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_BOT_R_CK_MUXED26 !26_215 26_216 !27_214
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_R_FBG_OUT12 26_215 !26_216 !27_214
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_R_FBG_OUT14 26_215 !26_216 27_214
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_IMUX25_3 !26_215 !26_216 27_214
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_IMUX29_3 !26_215 !26_216 !27_214
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_BOT_R_CK_MUXED27 26_212 !26_213 !27_213
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_R_FBG_OUT12 !26_212 !26_213 27_213
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_R_FBG_OUT14 !26_212 26_213 27_213
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_IMUX25_3 !26_212 26_213 !27_213
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_IMUX29_3 !26_212 !26_213 !27_213
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_BOT_R_CK_MUXED28 !26_231 26_232 !27_230
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_R_FBG_OUT13 26_231 !26_232 !27_230
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_R_FBG_OUT15 26_231 !26_232 27_230
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_IMUX26_3 !26_231 !26_232 27_230
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_IMUX30_3 !26_231 !26_232 !27_230
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_BOT_R_CK_MUXED29 26_228 !26_229 !27_229
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_R_FBG_OUT13 !26_228 !26_229 27_229
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_R_FBG_OUT15 !26_228 26_229 27_229
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_IMUX26_3 !26_228 26_229 !27_229
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_IMUX30_3 !26_228 !26_229 !27_229
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_BOT_R_CK_MUXED30 !26_247 26_248 !27_246
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_R_FBG_OUT0 26_247 !26_248 27_246
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_R_FBG_OUT14 26_247 !26_248 !27_246
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_IMUX27_3 !26_247 !26_248 27_246
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_IMUX31_3 !26_247 !26_248 !27_246
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_BOT_R_CK_MUXED31 26_244 !26_245 !27_245
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_R_FBG_OUT0 !26_244 26_245 27_245
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_R_FBG_OUT14 !26_244 !26_245 27_245
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_IMUX27_3 !26_244 26_245 !27_245
|
||||
CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_IMUX31_3 !26_244 !26_245 !27_245
|
||||
|
|
|
|||
|
|
@ -1,4 +1,5 @@
|
|||
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK0_BOT.CLK_BUFG_REBUF_R_CK_GCLK0_TOP 27_15
|
||||
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK0_TOP.CLK_BUFG_REBUF_R_CK_GCLK0_BOT 27_13
|
||||
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK1_BOT.CLK_BUFG_REBUF_R_CK_GCLK1_TOP 27_31
|
||||
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK1_TOP.CLK_BUFG_REBUF_R_CK_GCLK1_BOT 27_29
|
||||
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK2_BOT.CLK_BUFG_REBUF_R_CK_GCLK2_TOP 27_47
|
||||
|
|
@ -30,13 +31,16 @@ CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK14_TOP.CLK_BUFG_REBUF_R_CK_GCLK14_BOT 26_
|
|||
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK15_BOT.CLK_BUFG_REBUF_R_CK_GCLK15_TOP 26_127
|
||||
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK15_TOP.CLK_BUFG_REBUF_R_CK_GCLK15_BOT 26_125
|
||||
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK16_BOT.CLK_BUFG_REBUF_R_CK_GCLK16_TOP 27_14
|
||||
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK16_TOP.CLK_BUFG_REBUF_R_CK_GCLK16_BOT 27_12
|
||||
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK17_BOT.CLK_BUFG_REBUF_R_CK_GCLK17_TOP 27_30
|
||||
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK17_TOP.CLK_BUFG_REBUF_R_CK_GCLK17_BOT 27_28
|
||||
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK18_BOT.CLK_BUFG_REBUF_R_CK_GCLK18_TOP 27_46
|
||||
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK18_TOP.CLK_BUFG_REBUF_R_CK_GCLK18_BOT 27_44
|
||||
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK19_BOT.CLK_BUFG_REBUF_R_CK_GCLK19_TOP 27_62
|
||||
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK19_TOP.CLK_BUFG_REBUF_R_CK_GCLK19_BOT 27_60
|
||||
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK20_BOT.CLK_BUFG_REBUF_R_CK_GCLK20_TOP 27_78
|
||||
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK20_TOP.CLK_BUFG_REBUF_R_CK_GCLK20_BOT 27_76
|
||||
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK21_BOT.CLK_BUFG_REBUF_R_CK_GCLK21_TOP 27_94
|
||||
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK21_TOP.CLK_BUFG_REBUF_R_CK_GCLK21_BOT 27_92
|
||||
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK22_BOT.CLK_BUFG_REBUF_R_CK_GCLK22_TOP 27_110
|
||||
CLK_BUFG_REBUF.CLK_BUFG_REBUF_R_CK_GCLK22_TOP.CLK_BUFG_REBUF_R_CK_GCLK22_BOT 27_108
|
||||
|
|
|
|||
|
|
@ -158,3 +158,179 @@ CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y15.ZINV_CE1 27_251
|
|||
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y15.ZINV_S0 27_243
|
||||
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y15.ZINV_S1 26_251
|
||||
CLK_BUFG_TOP_R.BUFGCTRL.BUFGCTRL_X0Y15.ZPRESELECT_I0 26_242
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_CK_GCLK16.CLK_BUFG_BUFGCTRL0_O 27_14
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_CK_GCLK17.CLK_BUFG_BUFGCTRL1_O 27_30
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_CK_GCLK18.CLK_BUFG_BUFGCTRL2_O 27_46
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_CK_GCLK19.CLK_BUFG_BUFGCTRL3_O 27_62
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_CK_GCLK20.CLK_BUFG_BUFGCTRL4_O 27_78
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_CK_GCLK21.CLK_BUFG_BUFGCTRL5_O 27_94
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_CK_GCLK22.CLK_BUFG_BUFGCTRL6_O 27_110
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_CK_GCLK23.CLK_BUFG_BUFGCTRL7_O 27_126
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_CK_GCLK24.CLK_BUFG_BUFGCTRL8_O 27_142
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_CK_GCLK25.CLK_BUFG_BUFGCTRL9_O 27_158
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_CK_GCLK26.CLK_BUFG_BUFGCTRL10_O 27_174
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_CK_GCLK27.CLK_BUFG_BUFGCTRL11_O 27_190
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_CK_GCLK28.CLK_BUFG_BUFGCTRL12_O 27_206
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_CK_GCLK29.CLK_BUFG_BUFGCTRL13_O 27_222
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_CK_GCLK30.CLK_BUFG_BUFGCTRL14_O 27_238
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_CK_GCLK31.CLK_BUFG_BUFGCTRL15_O 27_254
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL0_I0.CLK_BUFG_R_FBG_OUT1 26_07 !26_08 27_06
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL0_I0.CLK_BUFG_R_FBG_OUT15 26_07 !26_08 !27_06
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL0_I0.CLK_BUFG_TOP_R_CK_MUXED0 !26_07 26_08 !27_06
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL0_I0.CLK_BUFG_IMUX24_0 !26_07 !26_08 27_06
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL0_I0.CLK_BUFG_IMUX28_0 !26_07 !26_08 !27_06
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL0_I1.CLK_BUFG_R_FBG_OUT1 !26_04 26_05 27_05
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL0_I1.CLK_BUFG_R_FBG_OUT15 !26_04 !26_05 27_05
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL0_I1.CLK_BUFG_TOP_R_CK_MUXED1 26_04 !26_05 !27_05
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL0_I1.CLK_BUFG_IMUX24_0 !26_04 26_05 !27_05
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL0_I1.CLK_BUFG_IMUX28_0 !26_04 !26_05 !27_05
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL1_I0.CLK_BUFG_R_FBG_OUT0 26_23 !26_24 !27_22
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL1_I0.CLK_BUFG_R_FBG_OUT2 26_23 !26_24 27_22
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL1_I0.CLK_BUFG_TOP_R_CK_MUXED2 !26_23 26_24 !27_22
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL1_I0.CLK_BUFG_IMUX25_0 !26_23 !26_24 27_22
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL1_I0.CLK_BUFG_IMUX29_0 !26_23 !26_24 !27_22
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL1_I1.CLK_BUFG_R_FBG_OUT0 !26_20 !26_21 27_21
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL1_I1.CLK_BUFG_R_FBG_OUT2 !26_20 26_21 27_21
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL1_I1.CLK_BUFG_TOP_R_CK_MUXED3 26_20 !26_21 !27_21
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL1_I1.CLK_BUFG_IMUX25_0 !26_20 26_21 !27_21
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL1_I1.CLK_BUFG_IMUX29_0 !26_20 !26_21 !27_21
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL2_I0.CLK_BUFG_R_FBG_OUT1 26_39 !26_40 !27_38
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL2_I0.CLK_BUFG_R_FBG_OUT3 26_39 !26_40 27_38
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL2_I0.CLK_BUFG_TOP_R_CK_MUXED4 !26_39 26_40 !27_38
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL2_I0.CLK_BUFG_IMUX26_0 !26_39 !26_40 27_38
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL2_I0.CLK_BUFG_IMUX30_0 !26_39 !26_40 !27_38
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL2_I1.CLK_BUFG_R_FBG_OUT1 !26_36 !26_37 27_37
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL2_I1.CLK_BUFG_R_FBG_OUT3 !26_36 26_37 27_37
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL2_I1.CLK_BUFG_TOP_R_CK_MUXED5 26_36 !26_37 !27_37
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL2_I1.CLK_BUFG_IMUX26_0 !26_36 26_37 !27_37
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL2_I1.CLK_BUFG_IMUX30_0 !26_36 !26_37 !27_37
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL3_I0.CLK_BUFG_R_FBG_OUT2 26_55 !26_56 !27_54
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL3_I0.CLK_BUFG_R_FBG_OUT4 26_55 !26_56 27_54
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL3_I0.CLK_BUFG_TOP_R_CK_MUXED6 !26_55 26_56 !27_54
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL3_I0.CLK_BUFG_IMUX27_0 !26_55 !26_56 27_54
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL3_I0.CLK_BUFG_IMUX31_0 !26_55 !26_56 !27_54
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL3_I1.CLK_BUFG_R_FBG_OUT2 !26_52 !26_53 27_53
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL3_I1.CLK_BUFG_R_FBG_OUT4 !26_52 26_53 27_53
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL3_I1.CLK_BUFG_TOP_R_CK_MUXED7 26_52 !26_53 !27_53
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL3_I1.CLK_BUFG_IMUX27_0 !26_52 26_53 !27_53
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL3_I1.CLK_BUFG_IMUX31_0 !26_52 !26_53 !27_53
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL4_I0.CLK_BUFG_R_FBG_OUT3 26_71 !26_72 !27_70
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL4_I0.CLK_BUFG_R_FBG_OUT5 26_71 !26_72 27_70
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL4_I0.CLK_BUFG_TOP_R_CK_MUXED8 !26_71 26_72 !27_70
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL4_I0.CLK_BUFG_IMUX24_1 !26_71 !26_72 27_70
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL4_I0.CLK_BUFG_IMUX28_1 !26_71 !26_72 !27_70
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL4_I1.CLK_BUFG_R_FBG_OUT3 !26_68 !26_69 27_69
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL4_I1.CLK_BUFG_R_FBG_OUT5 !26_68 26_69 27_69
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL4_I1.CLK_BUFG_TOP_R_CK_MUXED9 26_68 !26_69 !27_69
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL4_I1.CLK_BUFG_IMUX24_1 !26_68 26_69 !27_69
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL4_I1.CLK_BUFG_IMUX28_1 !26_68 !26_69 !27_69
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL5_I0.CLK_BUFG_R_FBG_OUT4 26_87 !26_88 !27_86
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL5_I0.CLK_BUFG_R_FBG_OUT6 26_87 !26_88 27_86
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL5_I0.CLK_BUFG_TOP_R_CK_MUXED10 !26_87 26_88 !27_86
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL5_I0.CLK_BUFG_IMUX25_1 !26_87 !26_88 27_86
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL5_I0.CLK_BUFG_IMUX29_1 !26_87 !26_88 !27_86
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL5_I1.CLK_BUFG_R_FBG_OUT4 !26_84 !26_85 27_85
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL5_I1.CLK_BUFG_R_FBG_OUT6 !26_84 26_85 27_85
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL5_I1.CLK_BUFG_TOP_R_CK_MUXED11 26_84 !26_85 !27_85
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL5_I1.CLK_BUFG_IMUX25_1 !26_84 26_85 !27_85
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL5_I1.CLK_BUFG_IMUX29_1 !26_84 !26_85 !27_85
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL6_I0.CLK_BUFG_R_FBG_OUT5 26_103 !26_104 !27_102
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL6_I0.CLK_BUFG_R_FBG_OUT7 26_103 !26_104 27_102
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL6_I0.CLK_BUFG_TOP_R_CK_MUXED12 !26_103 26_104 !27_102
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL6_I0.CLK_BUFG_IMUX26_1 !26_103 !26_104 27_102
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL6_I0.CLK_BUFG_IMUX30_1 !26_103 !26_104 !27_102
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL6_I1.CLK_BUFG_R_FBG_OUT5 !26_100 !26_101 27_101
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL6_I1.CLK_BUFG_R_FBG_OUT7 !26_100 26_101 27_101
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL6_I1.CLK_BUFG_TOP_R_CK_MUXED13 26_100 !26_101 !27_101
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL6_I1.CLK_BUFG_IMUX26_1 !26_100 26_101 !27_101
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL6_I1.CLK_BUFG_IMUX30_1 !26_100 !26_101 !27_101
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL7_I0.CLK_BUFG_R_FBG_OUT6 26_119 !26_120 !27_118
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL7_I0.CLK_BUFG_R_FBG_OUT8 26_119 !26_120 27_118
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL7_I0.CLK_BUFG_TOP_R_CK_MUXED14 !26_119 26_120 !27_118
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL7_I0.CLK_BUFG_IMUX27_1 !26_119 !26_120 27_118
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL7_I0.CLK_BUFG_IMUX31_1 !26_119 !26_120 !27_118
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL7_I1.CLK_BUFG_R_FBG_OUT6 !26_116 !26_117 27_117
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL7_I1.CLK_BUFG_R_FBG_OUT8 !26_116 26_117 27_117
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL7_I1.CLK_BUFG_TOP_R_CK_MUXED15 26_116 !26_117 !27_117
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL7_I1.CLK_BUFG_IMUX27_1 !26_116 26_117 !27_117
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL7_I1.CLK_BUFG_IMUX31_1 !26_116 !26_117 !27_117
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL8_I0.CLK_BUFG_R_FBG_OUT7 26_135 !26_136 !27_134
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL8_I0.CLK_BUFG_R_FBG_OUT9 26_135 !26_136 27_134
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL8_I0.CLK_BUFG_TOP_R_CK_MUXED16 !26_135 26_136 !27_134
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL8_I0.CLK_BUFG_IMUX24_2 !26_135 !26_136 27_134
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL8_I0.CLK_BUFG_IMUX28_2 !26_135 !26_136 !27_134
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL8_I1.CLK_BUFG_R_FBG_OUT7 !26_132 !26_133 27_133
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL8_I1.CLK_BUFG_R_FBG_OUT9 !26_132 26_133 27_133
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL8_I1.CLK_BUFG_TOP_R_CK_MUXED17 26_132 !26_133 !27_133
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL8_I1.CLK_BUFG_IMUX24_2 !26_132 26_133 !27_133
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL8_I1.CLK_BUFG_IMUX28_2 !26_132 !26_133 !27_133
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL9_I0.CLK_BUFG_R_FBG_OUT8 26_151 !26_152 !27_150
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL9_I0.CLK_BUFG_R_FBG_OUT10 26_151 !26_152 27_150
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL9_I0.CLK_BUFG_TOP_R_CK_MUXED18 !26_151 26_152 !27_150
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL9_I0.CLK_BUFG_IMUX25_2 !26_151 !26_152 27_150
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL9_I0.CLK_BUFG_IMUX29_2 !26_151 !26_152 !27_150
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL9_I1.CLK_BUFG_R_FBG_OUT8 !26_148 !26_149 27_149
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL9_I1.CLK_BUFG_R_FBG_OUT10 !26_148 26_149 27_149
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL9_I1.CLK_BUFG_TOP_R_CK_MUXED19 26_148 !26_149 !27_149
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL9_I1.CLK_BUFG_IMUX25_2 !26_148 26_149 !27_149
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL9_I1.CLK_BUFG_IMUX29_2 !26_148 !26_149 !27_149
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_R_FBG_OUT9 26_167 !26_168 !27_166
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_R_FBG_OUT11 26_167 !26_168 27_166
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_TOP_R_CK_MUXED20 !26_167 26_168 !27_166
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_IMUX26_2 !26_167 !26_168 27_166
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL10_I0.CLK_BUFG_IMUX30_2 !26_167 !26_168 !27_166
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_R_FBG_OUT9 !26_164 !26_165 27_165
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_R_FBG_OUT11 !26_164 26_165 27_165
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_TOP_R_CK_MUXED21 26_164 !26_165 !27_165
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_IMUX26_2 !26_164 26_165 !27_165
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL10_I1.CLK_BUFG_IMUX30_2 !26_164 !26_165 !27_165
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_R_FBG_OUT10 26_183 !26_184 !27_182
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_R_FBG_OUT12 26_183 !26_184 27_182
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_TOP_R_CK_MUXED22 !26_183 26_184 !27_182
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_IMUX27_2 !26_183 !26_184 27_182
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL11_I0.CLK_BUFG_IMUX31_2 !26_183 !26_184 !27_182
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_R_FBG_OUT10 !26_180 !26_181 27_181
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_R_FBG_OUT12 !26_180 26_181 27_181
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_TOP_R_CK_MUXED23 26_180 !26_181 !27_181
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_IMUX27_2 !26_180 26_181 !27_181
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL11_I1.CLK_BUFG_IMUX31_2 !26_180 !26_181 !27_181
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_R_FBG_OUT11 26_199 !26_200 !27_198
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_R_FBG_OUT13 26_199 !26_200 27_198
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_TOP_R_CK_MUXED24 !26_199 26_200 !27_198
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_IMUX24_3 !26_199 !26_200 27_198
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL12_I0.CLK_BUFG_IMUX28_3 !26_199 !26_200 !27_198
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_R_FBG_OUT11 !26_196 !26_197 27_197
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_R_FBG_OUT13 !26_196 26_197 27_197
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_TOP_R_CK_MUXED25 26_196 !26_197 !27_197
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_IMUX24_3 !26_196 26_197 !27_197
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL12_I1.CLK_BUFG_IMUX28_3 !26_196 !26_197 !27_197
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_R_FBG_OUT12 26_215 !26_216 !27_214
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_R_FBG_OUT14 26_215 !26_216 27_214
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_TOP_R_CK_MUXED26 !26_215 26_216 !27_214
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_IMUX25_3 !26_215 !26_216 27_214
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL13_I0.CLK_BUFG_IMUX29_3 !26_215 !26_216 !27_214
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_R_FBG_OUT12 !26_212 !26_213 27_213
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_R_FBG_OUT14 !26_212 26_213 27_213
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_TOP_R_CK_MUXED27 26_212 !26_213 !27_213
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_IMUX25_3 !26_212 26_213 !27_213
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL13_I1.CLK_BUFG_IMUX29_3 !26_212 !26_213 !27_213
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_R_FBG_OUT13 26_231 !26_232 !27_230
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_R_FBG_OUT15 26_231 !26_232 27_230
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_TOP_R_CK_MUXED28 !26_231 26_232 !27_230
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_IMUX26_3 !26_231 !26_232 27_230
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL14_I0.CLK_BUFG_IMUX30_3 !26_231 !26_232 !27_230
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_R_FBG_OUT13 !26_228 !26_229 27_229
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_R_FBG_OUT15 !26_228 26_229 27_229
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_TOP_R_CK_MUXED29 26_228 !26_229 !27_229
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_IMUX26_3 !26_228 26_229 !27_229
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL14_I1.CLK_BUFG_IMUX30_3 !26_228 !26_229 !27_229
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_R_FBG_OUT0 26_247 !26_248 27_246
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_R_FBG_OUT14 26_247 !26_248 !27_246
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_TOP_R_CK_MUXED30 !26_247 26_248 !27_246
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_IMUX27_3 !26_247 !26_248 27_246
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL15_I0.CLK_BUFG_IMUX31_3 !26_247 !26_248 !27_246
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_R_FBG_OUT0 !26_244 26_245 27_245
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_R_FBG_OUT14 !26_244 !26_245 27_245
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_TOP_R_CK_MUXED31 26_244 !26_245 !27_245
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_IMUX27_3 !26_244 26_245 !27_245
|
||||
CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL15_I1.CLK_BUFG_IMUX31_3 !26_244 !26_245 !27_245
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,644 @@
|
|||
HCLK_CMT_L.HCLK_CMT_CK_BUFHCLK0_ACTIVE 27_185
|
||||
HCLK_CMT_L.HCLK_CMT_CK_BUFHCLK1_ACTIVE 26_185
|
||||
HCLK_CMT_L.HCLK_CMT_CK_BUFHCLK2_ACTIVE 27_184
|
||||
HCLK_CMT_L.HCLK_CMT_CK_BUFHCLK3_ACTIVE 26_184
|
||||
HCLK_CMT_L.HCLK_CMT_CK_BUFHCLK4_ACTIVE 27_183
|
||||
HCLK_CMT_L.HCLK_CMT_CK_BUFHCLK5_ACTIVE 26_183
|
||||
HCLK_CMT_L.HCLK_CMT_CK_BUFHCLK6_ACTIVE 27_182
|
||||
HCLK_CMT_L.HCLK_CMT_CK_BUFHCLK7_ACTIVE 26_182
|
||||
HCLK_CMT_L.HCLK_CMT_CK_BUFHCLK8_ACTIVE 27_181
|
||||
HCLK_CMT_L.HCLK_CMT_CK_BUFHCLK9_ACTIVE 26_181
|
||||
HCLK_CMT_L.HCLK_CMT_CK_BUFHCLK10_ACTIVE 28_186
|
||||
HCLK_CMT_L.HCLK_CMT_CK_BUFHCLK11_ACTIVE 29_186
|
||||
HCLK_CMT_L.HCLK_CMT_CK_BUFRCLK0_ACTIVE 28_174
|
||||
HCLK_CMT_L.HCLK_CMT_CK_BUFRCLK1_ACTIVE 29_174
|
||||
HCLK_CMT_L.HCLK_CMT_CK_BUFRCLK2_ACTIVE 28_175
|
||||
HCLK_CMT_L.HCLK_CMT_CK_BUFRCLK3_ACTIVE 29_175
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CK_BUFHCLK0 27_150 27_155
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CK_BUFHCLK1 26_155 27_150
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CK_BUFHCLK2 27_150 27_154
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CK_BUFHCLK3 26_154 27_150
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CK_BUFHCLK4 27_150 27_153
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CK_BUFHCLK5 26_153 27_150
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CK_BUFHCLK6 26_151 27_155
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CK_BUFHCLK7 26_151 26_155
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CK_BUFHCLK8 26_151 27_154
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CK_BUFHCLK9 26_151 26_154
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CK_BUFHCLK10 26_151 27_153
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CK_BUFHCLK11 26_151 26_153
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_MMCM0 27_149 27_154
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_MMCM1 26_154 27_149
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_MMCM2 27_149 27_153
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_MMCM3 26_153 27_149
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_MMCM4 26_150 27_155
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_MMCM5 26_150 26_155
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_MMCM6 26_150 27_154
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_MMCM7 26_150 26_154
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_MMCM8 26_150 27_153
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_MMCM9 26_150 26_153
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_MMCM10 27_151 27_155
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_MMCM11 26_155 27_151
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_MMCM12 27_151 27_154
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_PLL0 26_149 27_155
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_PLL1 26_149 26_155
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_PLL2 26_149 27_154
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_PLL3 26_149 26_154
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_PLL4 26_149 27_153
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_PLL5 26_149 26_153
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_MUX_CLK_PLL6 27_149 27_155
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CCIO0 27_151 27_153
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CCIO1 26_153 27_151
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CCIO2 26_152 27_153
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN0.HCLK_CMT_CCIO3 26_152 26_153
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CK_BUFHCLK0 29_150 29_155
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CK_BUFHCLK1 28_155 29_150
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CK_BUFHCLK2 29_150 29_154
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CK_BUFHCLK3 28_154 29_150
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CK_BUFHCLK4 29_150 29_153
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CK_BUFHCLK5 28_153 29_150
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CK_BUFHCLK6 28_151 29_155
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CK_BUFHCLK7 28_151 28_155
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CK_BUFHCLK8 28_151 29_154
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CK_BUFHCLK9 28_151 28_154
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CK_BUFHCLK10 28_151 29_153
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CK_BUFHCLK11 28_151 28_153
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_MMCM0 29_149 29_154
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_MMCM1 28_154 29_149
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_MMCM2 29_149 29_153
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_MMCM3 28_153 29_149
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_MMCM4 28_150 29_155
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_MMCM5 28_150 28_155
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_MMCM6 28_150 29_154
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_MMCM7 28_150 28_154
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_MMCM8 28_150 29_153
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_MMCM9 28_150 28_153
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_MMCM10 29_151 29_155
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_MMCM11 28_155 29_151
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_MMCM12 29_151 29_154
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_PLL0 28_149 29_155
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_PLL1 28_149 28_155
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_PLL2 28_149 29_154
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_PLL3 28_149 28_154
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_PLL4 28_149 29_153
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_PLL5 28_149 28_153
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_MUX_CLK_PLL6 29_149 29_155
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CCIO0 29_151 29_153
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CCIO1 28_153 29_151
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CCIO2 28_152 29_153
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN1.HCLK_CMT_CCIO3 28_152 28_153
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CK_BUFHCLK0 27_143 27_148
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CK_BUFHCLK1 26_148 27_143
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CK_BUFHCLK2 27_143 27_147
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CK_BUFHCLK3 26_147 27_143
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CK_BUFHCLK4 27_143 27_146
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CK_BUFHCLK5 26_146 27_143
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CK_BUFHCLK6 26_144 27_148
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CK_BUFHCLK7 26_144 26_148
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CK_BUFHCLK8 26_144 27_147
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CK_BUFHCLK9 26_144 26_147
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CK_BUFHCLK10 26_144 27_146
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CK_BUFHCLK11 26_144 26_146
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_MMCM0 27_142 27_147
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_MMCM1 26_147 27_142
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_MMCM2 27_142 27_146
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_MMCM3 26_146 27_142
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_MMCM4 26_143 27_148
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_MMCM5 26_143 26_148
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_MMCM6 26_143 27_147
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_MMCM7 26_143 26_147
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_MMCM8 26_143 27_146
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_MMCM9 26_143 26_146
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_MMCM10 27_144 27_148
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_MMCM11 26_148 27_144
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_MMCM12 27_144 27_147
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_PLL0 26_142 27_148
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_PLL1 26_142 26_148
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_PLL2 26_142 27_147
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_PLL3 26_142 26_147
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_PLL4 26_142 27_146
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_PLL5 26_142 26_146
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_MUX_CLK_PLL6 27_142 27_148
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CCIO0 27_144 27_146
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CCIO1 26_146 27_144
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CCIO2 26_145 27_146
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN2.HCLK_CMT_CCIO3 26_145 26_146
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CK_BUFHCLK0 29_143 29_148
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CK_BUFHCLK1 28_148 29_143
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CK_BUFHCLK2 29_143 29_147
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CK_BUFHCLK3 28_147 29_143
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CK_BUFHCLK4 29_143 29_146
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CK_BUFHCLK5 28_146 29_143
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CK_BUFHCLK6 28_144 29_148
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CK_BUFHCLK7 28_144 28_148
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CK_BUFHCLK8 28_144 29_147
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CK_BUFHCLK9 28_144 28_147
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CK_BUFHCLK10 28_144 29_146
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CK_BUFHCLK11 28_144 28_146
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_MMCM0 29_142 29_147
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_MMCM1 28_147 29_142
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_MMCM2 29_142 29_146
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_MMCM3 28_146 29_142
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_MMCM4 28_143 29_148
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_MMCM5 28_143 28_148
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_MMCM6 28_143 29_147
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_MMCM7 28_143 28_147
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_MMCM8 28_143 29_146
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_MMCM9 28_143 28_146
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_MMCM10 29_144 29_148
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_MMCM11 28_148 29_144
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_MMCM12 29_144 29_147
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_PLL0 28_142 29_148
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_PLL1 28_142 28_148
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_PLL2 28_142 29_147
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_PLL3 28_142 28_147
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_PLL4 28_142 29_146
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_PLL5 28_142 28_146
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_MUX_CLK_PLL6 29_142 29_148
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CCIO0 29_144 29_146
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CCIO1 28_146 29_144
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CCIO2 28_145 29_146
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN3.HCLK_CMT_CCIO3 28_145 28_146
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CK_BUFHCLK0 27_136 27_141
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CK_BUFHCLK1 26_141 27_136
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CK_BUFHCLK2 27_136 27_140
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CK_BUFHCLK3 26_140 27_136
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CK_BUFHCLK4 27_136 27_139
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CK_BUFHCLK5 26_139 27_136
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CK_BUFHCLK6 26_137 27_141
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CK_BUFHCLK7 26_137 26_141
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CK_BUFHCLK8 26_137 27_140
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CK_BUFHCLK9 26_137 26_140
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CK_BUFHCLK10 26_137 27_139
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CK_BUFHCLK11 26_137 26_139
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_MMCM0 27_135 27_140
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_MMCM1 26_140 27_135
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_MMCM2 27_135 27_139
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_MMCM3 26_139 27_135
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_MMCM4 26_136 27_141
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_MMCM5 26_136 26_141
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_MMCM6 26_136 27_140
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_MMCM7 26_136 26_140
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_MMCM8 26_136 27_139
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_MMCM9 26_136 26_139
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_MMCM10 27_137 27_141
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_MMCM11 26_141 27_137
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_MMCM12 27_137 27_140
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_PLL0 26_135 27_141
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_PLL1 26_135 26_141
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_PLL2 26_135 27_140
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_PLL3 26_135 26_140
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_PLL4 26_135 27_139
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_PLL5 26_135 26_139
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_MUX_CLK_PLL6 27_135 27_141
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CCIO0 27_137 27_139
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CCIO1 26_139 27_137
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CCIO2 26_138 27_139
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN4.HCLK_CMT_CCIO3 26_138 26_139
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CK_BUFHCLK0 29_136 29_141
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CK_BUFHCLK1 28_141 29_136
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CK_BUFHCLK2 29_136 29_140
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CK_BUFHCLK3 28_140 29_136
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CK_BUFHCLK4 29_136 29_139
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CK_BUFHCLK5 28_139 29_136
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CK_BUFHCLK6 28_137 29_141
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CK_BUFHCLK7 28_137 28_141
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CK_BUFHCLK8 28_137 29_140
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CK_BUFHCLK9 28_137 28_140
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CK_BUFHCLK10 28_137 29_139
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CK_BUFHCLK11 28_137 28_139
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_MMCM0 29_135 29_140
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_MMCM1 28_140 29_135
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_MMCM2 29_135 29_139
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_MMCM3 28_139 29_135
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_MMCM4 28_136 29_141
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_MMCM5 28_136 28_141
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_MMCM6 28_136 29_140
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_MMCM7 28_136 28_140
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_MMCM8 28_136 29_139
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_MMCM9 28_136 28_139
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_MMCM10 29_137 29_141
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_MMCM11 28_141 29_137
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_MMCM12 29_137 29_140
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_PLL0 28_135 29_141
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_PLL1 28_135 28_141
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_PLL2 28_135 29_140
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_PLL3 28_135 28_140
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_PLL4 28_135 29_139
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_PLL5 28_135 28_139
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_MUX_CLK_PLL6 29_135 29_141
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CCIO0 29_137 29_139
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CCIO1 28_139 29_137
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CCIO2 28_138 29_139
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN5.HCLK_CMT_CCIO3 28_138 28_139
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CK_BUFHCLK0 27_129 27_134
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CK_BUFHCLK1 26_134 27_129
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CK_BUFHCLK2 27_129 27_133
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CK_BUFHCLK3 26_133 27_129
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CK_BUFHCLK4 27_129 27_132
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CK_BUFHCLK5 26_132 27_129
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CK_BUFHCLK6 26_130 27_134
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CK_BUFHCLK7 26_130 26_134
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CK_BUFHCLK8 26_130 27_133
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CK_BUFHCLK9 26_130 26_133
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CK_BUFHCLK10 26_130 27_132
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CK_BUFHCLK11 26_130 26_132
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_MMCM0 27_128 27_133
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_MMCM1 26_133 27_128
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_MMCM2 27_128 27_132
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_MMCM3 26_132 27_128
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_MMCM4 26_129 27_134
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_MMCM5 26_129 26_134
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_MMCM6 26_129 27_133
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_MMCM7 26_129 26_133
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_MMCM8 26_129 27_132
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_MMCM9 26_129 26_132
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_MMCM10 27_130 27_134
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_MMCM11 26_134 27_130
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_MMCM12 27_130 27_133
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_PLL0 26_128 27_134
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_PLL1 26_128 26_134
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_PLL2 26_128 27_133
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_PLL3 26_128 26_133
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_PLL4 26_128 27_132
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_PLL5 26_128 26_132
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_MUX_CLK_PLL6 27_128 27_134
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CCIO0 27_130 27_132
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CCIO1 26_132 27_130
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CCIO2 26_131 27_132
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN6.HCLK_CMT_CCIO3 26_131 26_132
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CK_BUFHCLK0 26_196 26_201
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CK_BUFHCLK1 26_201 27_196
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CK_BUFHCLK2 26_197 26_201
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CK_BUFHCLK3 26_201 27_197
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CK_BUFHCLK4 26_198 26_201
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CK_BUFHCLK5 26_201 27_198
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CK_BUFHCLK6 26_196 27_200
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CK_BUFHCLK7 27_196 27_200
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CK_BUFHCLK8 26_197 27_200
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CK_BUFHCLK9 27_197 27_200
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CK_BUFHCLK10 26_198 27_200
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CK_BUFHCLK11 27_198 27_200
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_MMCM0 26_197 26_202
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_MMCM1 26_202 27_197
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_MMCM2 26_198 26_202
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_MMCM3 26_202 27_198
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_MMCM4 26_196 27_201
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_MMCM5 27_196 27_201
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_MMCM6 26_197 27_201
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_MMCM7 27_197 27_201
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_MMCM8 26_198 27_201
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_MMCM9 27_198 27_201
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_MMCM10 26_196 26_200
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_MMCM11 26_200 27_196
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_MMCM12 26_197 26_200
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_PLL0 26_196 27_202
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_PLL1 27_196 27_202
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_PLL2 26_197 27_202
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_PLL3 27_197 27_202
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_PLL4 26_198 27_202
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_PLL5 27_198 27_202
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_MUX_CLK_PLL6 26_196 26_202
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CCIO0 26_198 26_200
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CCIO1 26_200 27_198
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CCIO2 26_198 27_199
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN7.HCLK_CMT_CCIO3 27_198 27_199
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CK_BUFHCLK0 28_196 28_201
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CK_BUFHCLK1 28_201 29_196
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CK_BUFHCLK2 28_197 28_201
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CK_BUFHCLK3 28_201 29_197
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CK_BUFHCLK4 28_198 28_201
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CK_BUFHCLK5 28_201 29_198
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CK_BUFHCLK6 28_196 29_200
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CK_BUFHCLK7 29_196 29_200
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CK_BUFHCLK8 28_197 29_200
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CK_BUFHCLK9 29_197 29_200
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CK_BUFHCLK10 28_198 29_200
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CK_BUFHCLK11 29_198 29_200
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_MMCM0 28_197 28_202
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_MMCM1 28_202 29_197
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_MMCM2 28_198 28_202
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_MMCM3 28_202 29_198
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_MMCM4 28_196 29_201
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_MMCM5 29_196 29_201
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_MMCM6 28_197 29_201
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_MMCM7 29_197 29_201
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_MMCM8 28_198 29_201
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_MMCM9 29_198 29_201
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_MMCM10 28_196 28_200
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_MMCM11 28_200 29_196
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_MMCM12 28_197 28_200
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_PLL0 28_196 29_202
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_PLL1 29_196 29_202
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_PLL2 28_197 29_202
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_PLL3 29_197 29_202
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_PLL4 28_198 29_202
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_PLL5 29_198 29_202
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_MUX_CLK_PLL6 28_196 28_202
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CCIO0 28_198 28_200
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CCIO1 28_200 29_198
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CCIO2 28_198 29_199
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN8.HCLK_CMT_CCIO3 29_198 29_199
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CK_BUFHCLK0 26_203 26_208
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CK_BUFHCLK1 26_208 27_203
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CK_BUFHCLK2 26_204 26_208
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CK_BUFHCLK3 26_208 27_204
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CK_BUFHCLK4 26_205 26_208
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CK_BUFHCLK5 26_208 27_205
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CK_BUFHCLK6 26_203 27_207
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CK_BUFHCLK7 27_203 27_207
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CK_BUFHCLK8 26_204 27_207
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CK_BUFHCLK9 27_204 27_207
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CK_BUFHCLK10 26_205 27_207
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CK_BUFHCLK11 27_205 27_207
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_MMCM0 26_204 26_209
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_MMCM1 26_209 27_204
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_MMCM2 26_205 26_209
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_MMCM3 26_209 27_205
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_MMCM4 26_203 27_208
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_MMCM5 27_203 27_208
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_MMCM6 26_204 27_208
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_MMCM7 27_204 27_208
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_MMCM8 26_205 27_208
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_MMCM9 27_205 27_208
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_MMCM10 26_203 26_207
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_MMCM11 26_207 27_203
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_MMCM12 26_204 26_207
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_PLL0 26_203 27_209
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_PLL1 27_203 27_209
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_PLL2 26_204 27_209
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_PLL3 27_204 27_209
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_PLL4 26_205 27_209
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_PLL5 27_205 27_209
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_MUX_CLK_PLL6 26_203 26_209
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CCIO0 26_205 26_207
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CCIO1 26_207 27_205
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CCIO2 26_205 27_206
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN9.HCLK_CMT_CCIO3 27_205 27_206
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK0 28_203 28_208
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK1 28_208 29_203
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK2 28_204 28_208
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK3 28_208 29_204
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK4 28_205 28_208
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK5 28_208 29_205
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK6 28_203 29_207
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK7 29_203 29_207
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK8 28_204 29_207
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK9 29_204 29_207
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK10 28_205 29_207
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CK_BUFHCLK11 29_205 29_207
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM0 28_204 28_209
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM1 28_209 29_204
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM2 28_205 28_209
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM3 28_209 29_205
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM4 28_203 29_208
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM5 29_203 29_208
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM6 28_204 29_208
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM7 29_204 29_208
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM8 28_205 29_208
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM9 29_205 29_208
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM10 28_203 28_207
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM11 28_207 29_203
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_MMCM12 28_204 28_207
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_PLL0 28_203 29_209
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_PLL1 29_203 29_209
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_PLL2 28_204 29_209
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_PLL3 29_204 29_209
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_PLL4 28_205 29_209
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_PLL5 29_205 29_209
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_MUX_CLK_PLL6 28_203 28_209
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CCIO0 28_205 28_207
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CCIO1 28_207 29_205
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CCIO2 28_205 29_206
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN10.HCLK_CMT_CCIO3 29_205 29_206
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK0 26_210 26_215
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK1 26_215 27_210
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK2 26_211 26_215
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK3 26_215 27_211
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK4 26_212 26_215
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK5 26_215 27_212
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK6 26_210 27_214
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK7 27_210 27_214
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK8 26_211 27_214
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK9 27_211 27_214
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK10 26_212 27_214
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CK_BUFHCLK11 27_212 27_214
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM0 26_211 26_216
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM1 26_216 27_211
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM2 26_212 26_216
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM3 26_216 27_212
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM4 26_210 27_215
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM5 27_210 27_215
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM6 26_211 27_215
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM7 27_211 27_215
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM8 26_212 27_215
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM9 27_212 27_215
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM10 26_210 26_214
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM11 26_214 27_210
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_MMCM12 26_211 26_214
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_PLL0 26_210 27_216
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_PLL1 27_210 27_216
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_PLL2 26_211 27_216
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_PLL3 27_211 27_216
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_PLL4 26_212 27_216
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_PLL5 27_212 27_216
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_MUX_CLK_PLL6 26_210 26_216
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CCIO0 26_212 26_214
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CCIO1 26_214 27_212
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CCIO2 26_212 27_213
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN11.HCLK_CMT_CCIO3 27_212 27_213
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK0 28_210 28_215
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK1 28_215 29_210
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK2 28_211 28_215
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK3 28_215 29_211
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK4 28_212 28_215
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK5 28_215 29_212
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK6 28_210 29_214
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK7 29_210 29_214
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK8 28_211 29_214
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK9 29_211 29_214
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK10 28_212 29_214
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CK_BUFHCLK11 29_212 29_214
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM0 28_211 28_216
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM1 28_216 29_211
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM2 28_212 28_216
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM3 28_216 29_212
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM4 28_210 29_215
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM5 29_210 29_215
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM6 28_211 29_215
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM7 29_211 29_215
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM8 28_212 29_215
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM9 29_212 29_215
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM10 28_210 28_214
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM11 28_214 29_210
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_MMCM12 28_211 28_214
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_PLL0 28_210 29_216
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_PLL1 29_210 29_216
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_PLL2 28_211 29_216
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_PLL3 29_211 29_216
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_PLL4 28_212 29_216
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_PLL5 29_212 29_216
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_MUX_CLK_PLL6 28_210 28_216
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CCIO0 28_212 28_214
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CCIO1 28_214 29_212
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CCIO2 28_212 29_213
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN12.HCLK_CMT_CCIO3 29_212 29_213
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK0 26_217 26_222
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK1 26_222 27_217
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK2 26_218 26_222
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK3 26_222 27_218
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK4 26_219 26_222
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK5 26_222 27_219
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK6 26_217 27_221
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK7 27_217 27_221
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK8 26_218 27_221
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK9 27_218 27_221
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK10 26_219 27_221
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CK_BUFHCLK11 27_219 27_221
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM0 26_218 26_223
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM1 26_223 27_218
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM2 26_219 26_223
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM3 26_223 27_219
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM4 26_217 27_222
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM5 27_217 27_222
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM6 26_218 27_222
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM7 27_218 27_222
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM8 26_219 27_222
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM9 27_219 27_222
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM10 26_217 26_221
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM11 26_221 27_217
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_MMCM12 26_218 26_221
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_PLL0 26_217 27_223
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_PLL1 27_217 27_223
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_PLL2 26_218 27_223
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_PLL3 27_218 27_223
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_PLL4 26_219 27_223
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_PLL5 27_219 27_223
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_MUX_CLK_PLL6 26_217 26_223
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO0 26_219 26_221
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO1 26_221 27_219
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO2 26_219 27_220
|
||||
HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO3 27_219 27_220
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK0 27_122 27_127
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK1 26_127 27_122
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK2 27_122 27_126
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK3 26_126 27_122
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK4 27_122 27_125
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK5 26_125 27_122
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK6 26_123 27_127
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK7 26_123 26_127
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK8 26_123 27_126
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK9 26_123 26_126
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK10 26_123 27_125
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK11 26_123 26_125
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFRCLK0 27_123 27_127
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFRCLK1 26_127 27_123
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFRCLK2 27_123 27_126
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFRCLK3 26_126 27_123
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CCIO0 27_123 27_125
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CCIO1 26_125 27_123
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CCIO2 26_124 27_125
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CCIO3 26_124 26_125
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK0 28_117 28_122
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK1 28_117 29_121
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK2 28_117 28_121
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK3 28_117 29_120
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK4 28_117 28_120
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK5 28_117 29_119
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK6 28_122 29_117
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK7 29_117 29_121
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK8 28_121 29_117
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK9 29_117 29_120
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK10 28_120 29_117
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFHCLK11 29_117 29_119
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFRCLK0 28_118 28_122
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFRCLK1 28_118 29_121
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFRCLK2 28_118 28_121
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CK_BUFRCLK3 28_118 29_120
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CCIO0 28_118 28_120
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CCIO1 28_118 29_119
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CCIO2 28_120 29_118
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN1.HCLK_CMT_CCIO3 29_118 29_119
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK0 26_117 26_122
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK1 26_117 27_121
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK2 26_117 26_121
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK3 26_117 27_120
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK4 26_117 26_120
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK5 26_117 27_119
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK6 26_122 27_117
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK7 27_117 27_121
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK8 26_121 27_117
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK9 27_117 27_120
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK10 26_120 27_117
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFHCLK11 27_117 27_119
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFRCLK0 26_118 26_122
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFRCLK1 26_118 27_121
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFRCLK2 26_118 26_121
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CK_BUFRCLK3 26_118 27_120
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO0 26_118 26_120
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO1 26_118 27_119
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO2 26_120 27_118
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO3 27_118 27_119
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK0 26_224 26_229
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK1 26_229 27_224
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK2 26_225 26_229
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK3 26_229 27_225
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK4 26_226 26_229
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK5 26_229 27_226
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK6 26_224 27_228
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK7 27_224 27_228
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK8 26_225 27_228
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK9 27_225 27_228
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK10 26_226 27_228
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK11 27_226 27_228
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFRCLK0 26_224 26_228
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFRCLK1 26_228 27_224
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFRCLK2 26_225 26_228
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFRCLK3 26_228 27_225
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CCIO0 26_226 26_228
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CCIO1 26_228 27_226
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CCIO2 26_226 27_227
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CCIO3 27_226 27_227
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK0 29_229 29_234
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK1 28_230 29_234
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK2 29_230 29_234
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK3 28_231 29_234
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK4 29_231 29_234
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK5 28_232 29_234
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK6 28_234 29_229
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK7 28_230 28_234
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK8 28_234 29_230
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK9 28_231 28_234
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK10 28_234 29_231
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFHCLK11 28_232 28_234
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFRCLK0 29_229 29_233
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFRCLK1 28_230 29_233
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFRCLK2 29_230 29_233
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CK_BUFRCLK3 28_231 29_233
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CCIO0 29_231 29_233
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CCIO1 28_232 29_233
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CCIO2 28_233 29_231
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN1.HCLK_CMT_CCIO3 28_232 28_233
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK0 27_229 27_234
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK1 26_230 27_234
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK2 27_230 27_234
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK3 26_231 27_234
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK4 27_231 27_234
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK5 26_232 27_234
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK6 26_234 27_229
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK7 26_230 26_234
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK8 26_234 27_230
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK9 26_231 26_234
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK10 26_234 27_231
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFHCLK11 26_232 26_234
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFRCLK0 27_229 27_233
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFRCLK1 26_230 27_233
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFRCLK2 27_230 27_233
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CK_BUFRCLK3 26_231 27_233
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CCIO0 27_231 27_233
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CCIO1 26_232 27_233
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CCIO2 26_233 27_231
|
||||
HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKIN2.HCLK_CMT_CCIO3 26_232 26_233
|
||||
HCLK_CMT_L.HCLK_CMT_CCIO0_ACTIVE 27_157 27_159
|
||||
HCLK_CMT_L.HCLK_CMT_CCIO1_ACTIVE 26_156 26_159
|
||||
HCLK_CMT_L.HCLK_CMT_CCIO2_ACTIVE 27_158 28_217
|
||||
HCLK_CMT_L.HCLK_CMT_CCIO3_ACTIVE 26_158 29_218
|
||||
|
|
@ -10,7 +10,7 @@ INT_L.BYP_ALT0.WW2END_N0_3 17_07 !22_07 !23_07 24_07 !25_07
|
|||
INT_L.BYP_ALT0.EE2END0 18_06 !22_07 !23_07 24_07 !25_07
|
||||
INT_L.BYP_ALT0.EL1END0 16_07 22_07 !23_07 24_07 25_07
|
||||
INT_L.BYP_ALT0.ER1END0 17_07 !22_07 23_07 24_07 25_07
|
||||
INT_L.BYP_ALT0.GFAN0 !00_10 !00_11 !01_09 !01_10 01_14 20_07 !22_07 !23_07 24_07 !25_07
|
||||
INT_L.BYP_ALT0.GFAN0 20_07 !22_07 !23_07 24_07 !25_07
|
||||
INT_L.BYP_ALT0.NE2END0 19_06 !22_07 !23_07 !24_07 25_07
|
||||
INT_L.BYP_ALT0.NL1END0 18_06 22_07 !23_07 24_07 25_07
|
||||
INT_L.BYP_ALT0.NN2END0 19_06 !22_07 !23_07 24_07 !25_07
|
||||
|
|
@ -33,7 +33,7 @@ INT_L.BYP_ALT1.SR1BEG_S0 18_14 !22_15 23_15 24_15 25_15
|
|||
INT_L.BYP_ALT1.EE2END0 17_15 !22_15 !23_15 24_15 !25_15
|
||||
INT_L.BYP_ALT1.EL1END1 17_15 22_15 !23_15 24_15 25_15
|
||||
INT_L.BYP_ALT1.ER1END0 16_15 !22_15 23_15 24_15 25_15
|
||||
INT_L.BYP_ALT1.GFAN0 !00_10 !00_11 !01_09 01_10 01_14 20_15 !22_15 !23_15 24_15 !25_15
|
||||
INT_L.BYP_ALT1.GFAN0 20_15 !22_15 !23_15 24_15 !25_15
|
||||
INT_L.BYP_ALT1.NE2END1 16_15 !22_15 !23_15 !24_15 25_15
|
||||
INT_L.BYP_ALT1.NL1END1 18_14 22_15 !23_15 24_15 25_15
|
||||
INT_L.BYP_ALT1.NN2END1 16_15 !22_15 !23_15 24_15 !25_15
|
||||
|
|
@ -81,7 +81,7 @@ INT_L.BYP_ALT3.NL1BEG_N3 18_46 22_47 !23_47 24_47 25_47
|
|||
INT_L.BYP_ALT3.EE2END2 17_47 !22_47 !23_47 24_47 !25_47
|
||||
INT_L.BYP_ALT3.EL1END3 17_47 22_47 !23_47 24_47 25_47
|
||||
INT_L.BYP_ALT3.ER1END2 16_47 !22_47 23_47 24_47 25_47
|
||||
INT_L.BYP_ALT3.GFAN1 !00_14 00_17 !00_18 !00_19 !01_13 20_47 !22_47 !23_47 24_47 !25_47
|
||||
INT_L.BYP_ALT3.GFAN1 20_47 !22_47 !23_47 24_47 !25_47
|
||||
INT_L.BYP_ALT3.NE2END3 16_47 !22_47 !23_47 !24_47 25_47
|
||||
INT_L.BYP_ALT3.NN2END3 16_47 !22_47 !23_47 24_47 !25_47
|
||||
INT_L.BYP_ALT3.NR1END2 19_46 !22_47 23_47 24_47 25_47
|
||||
|
|
@ -1638,24 +1638,18 @@ INT_L.IMUX_L47.SS2END3 17_62 !22_62 !23_62 !24_62 25_62
|
|||
INT_L.IMUX_L47.SW2END3 17_62 !22_62 !23_62 24_62 !25_62
|
||||
INT_L.IMUX_L47.WL1END3 18_63 !22_62 23_62 24_62 25_62
|
||||
INT_L.IMUX_L47.WW2END3 16_62 !22_62 !23_62 !24_62 25_62
|
||||
INT_L.LV_L0.LV_L18 00_09 01_06
|
||||
INT_L.LV_L0.SR1BEG_S0 00_05 01_05
|
||||
INT_L.LV_L0.ER1END0 01_04 01_05
|
||||
INT_L.LV_L0.LH0 00_02 01_06
|
||||
INT_L.LV_L0.LH6 01_04 01_06
|
||||
INT_L.LV_L0.LH12 00_05 01_06
|
||||
INT_L.LV_L0.NN6END0 00_07 00_09
|
||||
INT_L.LV_L0.NR1END0 00_02 01_05
|
||||
INT_L.LV_L0.NW6END0 00_07 01_04
|
||||
INT_L.LV_L0.SW6END0 00_09 01_05
|
||||
INT_L.LV_L0.WR1END0 00_02 00_07
|
||||
INT_L.LV_L0.WW4END0 00_05 00_07
|
||||
INT_L.LV_L18.LV_L0 01_00 01_01
|
||||
INT_L.LV_L18.SR1BEG_S0 00_03 01_08
|
||||
INT_L.LV_L18.ER1END0 00_03 00_06
|
||||
INT_L.LV_L18.LH0 00_01 01_02
|
||||
INT_L.LV_L18.LH6 00_06 01_02
|
||||
INT_L.LV_L18.LH12 01_02 01_08
|
||||
INT_L.LV_L18.NN6END0 00_03 01_00
|
||||
INT_L.LV_L18.NR1END0 00_01 00_03
|
||||
INT_L.LV_L18.NW6END0 00_06 01_01
|
||||
|
|
@ -1664,7 +1658,6 @@ INT_L.LV_L18.WR1END0 00_01 01_01
|
|||
INT_L.LV_L18.WW4END0 01_01 01_08
|
||||
INT_L.LVB_L0.LV_L0 00_47 01_52
|
||||
INT_L.LVB_L0.LV_L18 01_42 01_52
|
||||
INT_L.LVB_L0.LVB_L12 00_51 00_54
|
||||
INT_L.LVB_L0.LH0 00_43 00_51
|
||||
INT_L.LVB_L0.LH6 00_51 00_53
|
||||
INT_L.LVB_L0.LH12 00_50 00_51
|
||||
|
|
@ -1682,7 +1675,6 @@ INT_L.LVB_L0.WR1END3 01_42 01_50
|
|||
INT_L.LVB_L0.WW4END3 00_53 01_50
|
||||
INT_L.LVB_L12.LV_L0 00_45 01_44
|
||||
INT_L.LVB_L12.LV_L18 00_45 01_48
|
||||
INT_L.LVB_L12.LVB_L0 00_45 01_45
|
||||
INT_L.LVB_L12.LH0 00_46 00_49
|
||||
INT_L.LVB_L12.LH6 00_46 01_49
|
||||
INT_L.LVB_L12.LH12 00_46 01_53
|
||||
|
|
@ -2090,24 +2082,18 @@ INT_L.GFAN1.GCLK_L_B11_WEST !00_14 !00_18 !00_19 01_13 01_17
|
|||
INT_L.GFAN1.GND_WIRE !00_14 00_17 !00_18 !00_19 01_13
|
||||
INT_L.GFAN1.NR1END1 00_14 00_17 !00_18 00_19 01_13
|
||||
INT_L.GFAN1.WW4END1 00_14 00_17 !00_18 !00_19 !01_13
|
||||
INT_L.LH0.LV_L0 01_56 01_58
|
||||
INT_L.LH0.LV_L9 00_59 01_56
|
||||
INT_L.LH0.LV_L18 01_56 01_61
|
||||
INT_L.LH0.EE4END3 00_58 01_61
|
||||
INT_L.LH0.ER1END3 00_57 01_54
|
||||
INT_L.LH0.LH12 01_54 01_56
|
||||
INT_L.LH0.NE2END3 00_58 00_59
|
||||
INT_L.LH0.NE6END3 00_58 01_58
|
||||
INT_L.LH0.NW2END3 00_58 01_54
|
||||
INT_L.LH0.SR1END3 00_57 00_59
|
||||
INT_L.LH0.SS6END3 00_57 01_58
|
||||
INT_L.LH0.SW6END3 00_57 01_61
|
||||
INT_L.LH12.LV_L0 00_55 00_62
|
||||
INT_L.LH12.LV_L9 00_62 01_57
|
||||
INT_L.LH12.LV_L18 00_62 01_62
|
||||
INT_L.LH12.EE4END3 01_60 01_62
|
||||
INT_L.LH12.ER1END3 00_63 01_60
|
||||
INT_L.LH12.LH0 00_61 00_63
|
||||
INT_L.LH12.NE2END3 01_57 01_60
|
||||
INT_L.LH12.NE6END3 00_55 01_60
|
||||
INT_L.LH12.NW2END3 00_62 00_63
|
||||
|
|
|
|||
|
|
@ -33,7 +33,7 @@ INT_R.BYP_ALT1.SR1BEG_S0 18_14 !22_15 23_15 24_15 25_15
|
|||
INT_R.BYP_ALT1.EE2END0 17_15 !22_15 !23_15 24_15 !25_15
|
||||
INT_R.BYP_ALT1.EL1END1 17_15 22_15 !23_15 24_15 25_15
|
||||
INT_R.BYP_ALT1.ER1END0 16_15 !22_15 23_15 24_15 25_15
|
||||
INT_R.BYP_ALT1.GFAN0 !00_10 !00_11 !01_09 01_10 01_14 20_15 !22_15 !23_15 24_15 !25_15
|
||||
INT_R.BYP_ALT1.GFAN0 20_15 !22_15 !23_15 24_15 !25_15
|
||||
INT_R.BYP_ALT1.NE2END1 16_15 !22_15 !23_15 !24_15 25_15
|
||||
INT_R.BYP_ALT1.NL1END1 18_14 22_15 !23_15 24_15 25_15
|
||||
INT_R.BYP_ALT1.NN2END1 16_15 !22_15 !23_15 24_15 !25_15
|
||||
|
|
@ -2032,10 +2032,7 @@ INT_R.IMUX47.WL1END3 18_63 !22_62 23_62 24_62 25_62
|
|||
INT_R.IMUX47.WW2END3 16_62 !22_62 !23_62 !24_62 25_62
|
||||
INT_R.LH0.EE4END3 00_58 01_61
|
||||
INT_R.LH0.ER1END3 00_57 01_54
|
||||
INT_R.LH0.LH12 01_54 01_56
|
||||
INT_R.LH0.LV0 01_56 01_58
|
||||
INT_R.LH0.LV9 00_59 01_56
|
||||
INT_R.LH0.LV18 01_56 01_61
|
||||
INT_R.LH0.NE2END3 00_58 00_59
|
||||
INT_R.LH0.NE6END3 00_58 01_58
|
||||
INT_R.LH0.NW2END3 00_58 01_54
|
||||
|
|
@ -2044,10 +2041,7 @@ INT_R.LH0.SS6END3 00_57 01_58
|
|||
INT_R.LH0.SW6END3 00_57 01_61
|
||||
INT_R.LH12.EE4END3 01_60 01_62
|
||||
INT_R.LH12.ER1END3 00_63 01_60
|
||||
INT_R.LH12.LH0 00_61 00_63
|
||||
INT_R.LH12.LV0 00_55 00_62
|
||||
INT_R.LH12.LV9 00_62 01_57
|
||||
INT_R.LH12.LV18 00_62 01_62
|
||||
INT_R.LH12.NE2END3 01_57 01_60
|
||||
INT_R.LH12.NE6END3 00_55 01_60
|
||||
INT_R.LH12.NW2END3 00_62 00_63
|
||||
|
|
@ -2056,10 +2050,7 @@ INT_R.LH12.SS6END3 00_55 00_61
|
|||
INT_R.LH12.SW6END3 00_61 01_62
|
||||
INT_R.LV0.SR1BEG_S0 00_05 01_05
|
||||
INT_R.LV0.ER1END0 01_04 01_05
|
||||
INT_R.LV0.LH0 00_02 01_06
|
||||
INT_R.LV0.LH6 01_04 01_06
|
||||
INT_R.LV0.LH12 00_05 01_06
|
||||
INT_R.LV0.LV18 00_09 01_06
|
||||
INT_R.LV0.NN6END0 00_07 00_09
|
||||
INT_R.LV0.NR1END0 00_02 01_05
|
||||
INT_R.LV0.NW6END0 00_07 01_04
|
||||
|
|
@ -2068,10 +2059,7 @@ INT_R.LV0.WR1END0 00_02 00_07
|
|||
INT_R.LV0.WW4END0 00_05 00_07
|
||||
INT_R.LV18.SR1BEG_S0 00_03 01_08
|
||||
INT_R.LV18.ER1END0 00_03 00_06
|
||||
INT_R.LV18.LH0 00_01 01_02
|
||||
INT_R.LV18.LH6 00_06 01_02
|
||||
INT_R.LV18.LH12 01_02 01_08
|
||||
INT_R.LV18.LV0 01_00 01_01
|
||||
INT_R.LV18.NN6END0 00_03 01_00
|
||||
INT_R.LV18.NR1END0 00_01 00_03
|
||||
INT_R.LV18.NW6END0 00_06 01_01
|
||||
|
|
@ -2083,7 +2071,6 @@ INT_R.LVB0.LH6 00_51 00_53
|
|||
INT_R.LVB0.LH12 00_50 00_51
|
||||
INT_R.LVB0.LV0 00_47 01_52
|
||||
INT_R.LVB0.LV18 01_42 01_52
|
||||
INT_R.LVB0.LVB12 00_51 00_54
|
||||
INT_R.LVB0.NE2END2 00_53 01_52
|
||||
INT_R.LVB0.NN6END3 00_50 01_50
|
||||
INT_R.LVB0.NR1END3 00_47 01_50
|
||||
|
|
@ -2101,7 +2088,6 @@ INT_R.LVB12.LH6 00_46 01_49
|
|||
INT_R.LVB12.LH12 00_46 01_53
|
||||
INT_R.LVB12.LV0 00_45 01_44
|
||||
INT_R.LVB12.LV18 00_45 01_48
|
||||
INT_R.LVB12.LVB0 00_45 01_45
|
||||
INT_R.LVB12.NE2END2 00_45 01_49
|
||||
INT_R.LVB12.NN6END3 01_46 01_53
|
||||
INT_R.LVB12.NR1END3 01_44 01_46
|
||||
|
|
|
|||
|
|
@ -1,4 +1,3 @@
|
|||
LIOB33.IOB_Y0.IBUFDISABLE.I 38_82
|
||||
LIOB33.IOB_Y0.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE 27_98
|
||||
LIOB33.IOB_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE 26_99
|
||||
LIOB33.IOB_Y0.IFF.SRTYPE.SYNC 29_67
|
||||
|
|
@ -12,12 +11,9 @@ LIOB33.IOB_Y0.IFF.ZSRVAL_Q1 29_71
|
|||
LIOB33.IOB_Y0.IFF.ZSRVAL_Q2 29_75
|
||||
LIOB33.IOB_Y0.IFF.ZSRVAL_Q3 29_85
|
||||
LIOB33.IOB_Y0.IFF.ZSRVAL_Q4 29_93
|
||||
LIOB33.IOB_Y0.INOUT 30_67
|
||||
LIOB33.IOB_Y0.INTERMDISABLE.I 39_89
|
||||
LIOB33.IOB_Y0.ISERDES.DATA_RATE.SDR 27_108
|
||||
LIOB33.IOB_Y0.ISERDES.INTERFACE_TYPE.MEMORY_DDR3 26_117
|
||||
LIOB33.IOB_Y0.ISERDES.INTERFACE_TYPE.OVERSAMPLE 26_115
|
||||
LIOB33.IOB_Y0.LVTTL.DRIVE.I24 31_86 32_66 33_111 38_64 !38_112 !38_118 38_126 39_65 !39_95 39_117 39_119 !39_125 !39_127
|
||||
LIOB33.IOB_Y0.ODDR.DDR_CLK_EDGE.OPPOSITE_EDGE !31_92
|
||||
LIOB33.IOB_Y0.ODDR.DDR_CLK_EDGE.SAME_EDGE 31_92
|
||||
LIOB33.IOB_Y0.OFF.ZINIT_Q 33_97
|
||||
|
|
@ -31,35 +27,10 @@ LIOB33.IOB_Y0.OSERDESE.DATA_WIDTH.5 30_121
|
|||
LIOB33.IOB_Y0.OSERDESE.DATA_WIDTH.6 31_120
|
||||
LIOB33.IOB_Y0.OSERDESE.DATA_WIDTH.7 30_123
|
||||
LIOB33.IOB_Y0.OSERDESE.DATA_WIDTH.8 31_116
|
||||
LIOB33.IOB_Y0.PULLTYPE.KEEPER 38_92 38_94 !39_93
|
||||
LIOB33.IOB_Y0.PULLTYPE.NONE !38_92 38_94 !39_93
|
||||
LIOB33.IOB_Y0.PULLTYPE.PULLDOWN !38_92 !38_94 !39_93
|
||||
LIOB33.IOB_Y0.PULLTYPE.PULLUP !38_92 38_94 39_93
|
||||
LIOB33.IOB_Y0.SLEW.FAST !38_106 !38_110 !39_105 !39_109
|
||||
LIOB33.IOB_Y0.SLEW.SLOW 38_106 38_110 39_105 39_109
|
||||
LIOB33.IOB_Y0.TFF.ZINIT_Q 30_75
|
||||
LIOB33.IOB_Y0.ZINV_D 29_109
|
||||
LIOB33.IOB_Y0.IDELMUXE3.0 29_101
|
||||
LIOB33.IOB_Y0.IFFDELMUXE3.0 28_116
|
||||
LIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 31_86 32_66 33_111 38_64 38_112 38_118 38_126 39_65 39_95 !39_117 !39_119 39_125 !39_127
|
||||
LIOB33.IOB_Y0.LVCMOS12.DRIVE.I8 31_86 32_66 33_111 38_64 38_112 !38_118 !38_126 39_65 39_95 !39_117 39_119 !39_125 !39_127
|
||||
LIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 31_86 32_66 33_111 38_64 38_112 !38_118 38_126 39_65 39_95 !39_117 !39_119 !39_125 39_127
|
||||
LIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 31_86 32_66 33_111 38_64 38_112 !38_118 38_126 39_65 39_95 !39_117 39_119 39_125 39_127
|
||||
LIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 31_86 32_66 33_111 38_64 38_112 !38_118 !38_126 39_65 39_95 !39_117 !39_119 !39_125 39_127
|
||||
LIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 31_86 32_66 33_111 38_64 38_112 38_118 38_126 39_65 39_95 39_117 !39_119 !39_125 39_127
|
||||
LIOB33.IOB_Y0.LVCMOS15_LVCMOS18.DRIVE.I4 31_86 32_66 33_111 38_64 38_112 38_118 !38_126 39_65 39_95 !39_117 !39_119 39_125 39_127
|
||||
LIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 31_86 32_66 33_111 38_64 38_112 !38_118 38_126 39_65 39_95 !39_117 39_119 39_125 !39_127
|
||||
LIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 31_86 32_66 33_111 38_64 38_112 !38_118 38_126 39_65 39_95 !39_117 !39_119 39_125 39_127
|
||||
LIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 31_86 32_66 33_111 38_64 38_112 !38_118 38_126 39_65 39_95 39_117 39_119 !39_125 !39_127
|
||||
LIOB33.IOB_Y0.LVCMOS25.DRIVE.I4 31_86 32_66 33_111 38_64 38_112 38_118 !38_126 39_65 !39_95 !39_117 !39_119 39_125 39_127
|
||||
LIOB33.IOB_Y0.LVCMOS25.DRIVE.I8 31_86 32_66 33_111 38_64 38_112 !38_118 !38_126 39_65 !39_95 !39_117 39_119 !39_125 !39_127
|
||||
LIOB33.IOB_Y0.LVCMOS25.DRIVE.I12 31_86 32_66 33_111 38_64 38_112 !38_118 !38_126 39_65 !39_95 !39_117 !39_119 !39_125 !39_127
|
||||
LIOB33.IOB_Y0.LVCMOS25.DRIVE.I16 31_86 32_66 33_111 38_64 38_112 38_118 38_126 39_65 !39_95 39_117 !39_119 !39_125 !39_127
|
||||
LIOB33.IOB_Y0.LVCMOS33.DRIVE.I16 31_86 32_66 33_111 38_64 !38_112 38_118 !38_126 39_65 !39_95 39_117 !39_119 !39_125 39_127
|
||||
LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I4 31_86 32_66 33_111 38_64 !38_112 38_118 !38_126 39_65 !39_95 !39_117 !39_119 39_125 39_127
|
||||
LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I8 31_86 32_66 33_111 38_64 !38_112 !38_118 38_126 39_65 !39_95 !39_117 39_119 39_125 !39_127
|
||||
LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16 31_86 32_66 33_111 38_64 !38_112 !38_118 38_126 39_65 !39_95 !39_117 !39_119 39_125 39_127
|
||||
LIOB33.IOB_Y1.IBUFDISABLE.I 39_45
|
||||
LIOB33.IOB_Y1.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE 26_29
|
||||
LIOB33.IOB_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE 27_28
|
||||
LIOB33.IOB_Y1.IFF.SRTYPE.SYNC 28_60
|
||||
|
|
@ -73,13 +44,9 @@ LIOB33.IOB_Y1.IFF.ZSRVAL_Q1 28_56
|
|||
LIOB33.IOB_Y1.IFF.ZSRVAL_Q2 28_52
|
||||
LIOB33.IOB_Y1.IFF.ZSRVAL_Q3 28_42
|
||||
LIOB33.IOB_Y1.IFF.ZSRVAL_Q4 28_34
|
||||
LIOB33.IOB_Y1.IN_ONLY 38_02 38_08 39_09
|
||||
LIOB33.IOB_Y1.INOUT 31_60
|
||||
LIOB33.IOB_Y1.INTERMDISABLE.I 38_38
|
||||
LIOB33.IOB_Y1.ISERDES.DATA_RATE.SDR 26_19
|
||||
LIOB33.IOB_Y1.ISERDES.INTERFACE_TYPE.MEMORY_DDR3 27_10
|
||||
LIOB33.IOB_Y1.ISERDES.INTERFACE_TYPE.OVERSAMPLE 27_12
|
||||
LIOB33.IOB_Y1.LVTTL.DRIVE.I24 30_41 32_16 33_61 !38_00 !38_02 38_08 38_10 !38_14 !38_32 38_62 39_01 !39_09 !39_15 39_63
|
||||
LIOB33.IOB_Y1.ODDR.DDR_CLK_EDGE.OPPOSITE_EDGE !30_35
|
||||
LIOB33.IOB_Y1.ODDR.DDR_CLK_EDGE.SAME_EDGE 30_35
|
||||
LIOB33.IOB_Y1.OFF.ZINIT_Q 32_30
|
||||
|
|
@ -93,33 +60,7 @@ LIOB33.IOB_Y1.OSERDESE.DATA_WIDTH.5 31_06
|
|||
LIOB33.IOB_Y1.OSERDESE.DATA_WIDTH.6 30_07
|
||||
LIOB33.IOB_Y1.OSERDESE.DATA_WIDTH.7 31_04
|
||||
LIOB33.IOB_Y1.OSERDESE.DATA_WIDTH.8 30_11
|
||||
LIOB33.IOB_Y1.PULLTYPE.KEEPER !38_34 39_33 39_35
|
||||
LIOB33.IOB_Y1.PULLTYPE.NONE !38_34 39_33 !39_35
|
||||
LIOB33.IOB_Y1.PULLTYPE.PULLDOWN !38_34 !39_33 !39_35
|
||||
LIOB33.IOB_Y1.PULLTYPE.PULLUP 38_34 39_33 !39_35
|
||||
LIOB33.IOB_Y1.SLEW.FAST !38_18 !38_22 !39_17 !39_21
|
||||
LIOB33.IOB_Y1.SLEW.SLOW 38_18 38_22 39_17 39_21
|
||||
LIOB33.IOB_Y1.TFF.ZINIT_Q 31_52
|
||||
LIOB33.IOB_Y1.ZINV_D 28_18
|
||||
LIOB33.IOB_Y1.IDELMUXE3.0 28_26
|
||||
LIOB33.IOB_Y1.IFFDELMUXE3.0 29_11
|
||||
LIOB33.IOB_Y1.LVCMOS12.DRIVE.I4 30_41 32_16 33_61 !38_00 38_02 !38_08 !38_10 38_14 38_32 38_62 39_01 39_09 39_15 39_63
|
||||
LIOB33.IOB_Y1.LVCMOS12.DRIVE.I8 30_41 32_16 33_61 !38_00 !38_02 38_08 !38_10 38_14 38_32 38_62 !39_01 !39_09 39_15 39_63
|
||||
LIOB33.IOB_Y1.LVCMOS12.DRIVE.I12 30_41 32_16 33_61 38_00 !38_02 !38_08 !38_10 38_14 38_32 38_62 39_01 !39_09 39_15 39_63
|
||||
LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18.IN 38_14 !38_40 38_42 39_41
|
||||
LIOB33.IOB_Y1.LVCMOS15.DRIVE.I8 30_41 32_16 33_61 38_00 38_02 38_08 !38_10 38_14 38_32 38_62 39_01 !39_09 39_15 39_63
|
||||
LIOB33.IOB_Y1.LVCMOS15.DRIVE.I12 30_41 32_16 33_61 38_00 !38_02 !38_08 !38_10 38_14 38_32 38_62 !39_01 !39_09 39_15 39_63
|
||||
LIOB33.IOB_Y1.LVCMOS15.DRIVE.I16 30_41 32_16 33_61 38_00 !38_02 !38_08 38_10 38_14 38_32 38_62 39_01 39_09 39_15 39_63
|
||||
LIOB33.IOB_Y1.LVCMOS15_LVCMOS18.DRIVE.I4 30_41 32_16 33_61 38_00 38_02 !38_08 !38_10 38_14 38_32 38_62 !39_01 39_09 39_15 39_63
|
||||
LIOB33.IOB_Y1.LVCMOS18.DRIVE.I12_I8 30_41 32_16 33_61 !38_00 38_02 38_08 !38_10 38_14 38_32 38_62 39_01 !39_09 39_15 39_63
|
||||
LIOB33.IOB_Y1.LVCMOS18.DRIVE.I16 30_41 32_16 33_61 38_00 38_02 !38_08 !38_10 38_14 38_32 38_62 39_01 !39_09 39_15 39_63
|
||||
LIOB33.IOB_Y1.LVCMOS18.DRIVE.I24 30_41 32_16 33_61 !38_00 !38_02 38_08 38_10 38_14 38_32 38_62 39_01 !39_09 39_15 39_63
|
||||
LIOB33.IOB_Y1.LVCMOS25.DRIVE.I4 30_41 32_16 33_61 38_00 38_02 !38_08 !38_10 38_14 !38_32 38_62 !39_01 39_09 39_15 39_63
|
||||
LIOB33.IOB_Y1.LVCMOS25.DRIVE.I8 30_41 32_16 33_61 !38_00 !38_02 38_08 !38_10 38_14 !38_32 38_62 !39_01 !39_09 39_15 39_63
|
||||
LIOB33.IOB_Y1.LVCMOS25.DRIVE.I12 30_41 32_16 33_61 !38_00 !38_02 !38_08 !38_10 38_14 !38_32 38_62 !39_01 !39_09 39_15 39_63
|
||||
LIOB33.IOB_Y1.LVCMOS25.DRIVE.I16 30_41 32_16 33_61 !38_00 !38_02 !38_08 38_10 38_14 !38_32 38_62 39_01 39_09 39_15 39_63
|
||||
LIOB33.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN 38_14 38_40 38_42 39_41
|
||||
LIOB33.IOB_Y1.LVCMOS33.DRIVE.I16 30_41 32_16 33_61 38_00 !38_02 !38_08 38_10 !38_14 !38_32 38_62 !39_01 39_09 !39_15 39_63
|
||||
LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I4 30_41 32_16 33_61 38_00 38_02 !38_08 !38_10 !38_14 !38_32 38_62 !39_01 39_09 !39_15 39_63
|
||||
LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I8 30_41 32_16 33_61 !38_00 38_02 38_08 !38_10 !38_14 !38_32 38_62 39_01 !39_09 !39_15 39_63
|
||||
LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16 30_41 32_16 33_61 38_00 38_02 !38_08 !38_10 !38_14 !38_32 38_62 39_01 !39_09 !39_15 39_63
|
||||
|
|
|
|||
|
|
@ -12,12 +12,13 @@ RIOB33.IOB_Y0.IFF.ZSRVAL_Q1 29_71
|
|||
RIOB33.IOB_Y0.IFF.ZSRVAL_Q2 29_75
|
||||
RIOB33.IOB_Y0.IFF.ZSRVAL_Q3 29_85
|
||||
RIOB33.IOB_Y0.IFF.ZSRVAL_Q4 29_93
|
||||
RIOB33.IOB_Y0.IN_ONLY 38_118 39_119 39_125
|
||||
RIOB33.IOB_Y0.INOUT 30_67
|
||||
RIOB33.IOB_Y0.INTERMDISABLE.I 39_89
|
||||
RIOB33.IOB_Y0.ISERDES.DATA_RATE.SDR 27_108
|
||||
RIOB33.IOB_Y0.ISERDES.INTERFACE_TYPE.MEMORY_DDR3 26_117
|
||||
RIOB33.IOB_Y0.ISERDES.INTERFACE_TYPE.OVERSAMPLE 26_115
|
||||
RIOB33.IOB_Y0.LVTTL.DRIVE.I24 31_86 32_66 33_111 38_64 !38_112 !38_118 38_126 39_65 !39_95 39_117 39_119 !39_125 !39_127
|
||||
RIOB33.IOB_Y0.LVTTL.DRIVE.I24 31_86 32_66 33_111 38_64 !38_112 !38_118 38_126 39_65 !39_95 !39_113 39_117 39_119 !39_125 !39_127
|
||||
RIOB33.IOB_Y0.ODDR.DDR_CLK_EDGE.OPPOSITE_EDGE !31_92
|
||||
RIOB33.IOB_Y0.ODDR.DDR_CLK_EDGE.SAME_EDGE 31_92
|
||||
RIOB33.IOB_Y0.OFF.ZINIT_Q 33_97
|
||||
|
|
@ -41,24 +42,26 @@ RIOB33.IOB_Y0.TFF.ZINIT_Q 30_75
|
|||
RIOB33.IOB_Y0.ZINV_D 29_109
|
||||
RIOB33.IOB_Y0.IDELMUXE3.0 29_101
|
||||
RIOB33.IOB_Y0.IFFDELMUXE3.0 28_116
|
||||
RIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 31_86 32_66 33_111 38_64 38_112 38_118 38_126 39_65 39_95 !39_117 !39_119 39_125 !39_127
|
||||
RIOB33.IOB_Y0.LVCMOS12.DRIVE.I8 31_86 32_66 33_111 38_64 38_112 !38_118 !38_126 39_65 39_95 !39_117 39_119 !39_125 !39_127
|
||||
RIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 31_86 32_66 33_111 38_64 38_112 !38_118 38_126 39_65 39_95 !39_117 !39_119 !39_125 39_127
|
||||
RIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 31_86 32_66 33_111 38_64 38_112 !38_118 38_126 39_65 39_95 !39_117 39_119 39_125 39_127
|
||||
RIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 31_86 32_66 33_111 38_64 38_112 !38_118 !38_126 39_65 39_95 !39_117 !39_119 !39_125 39_127
|
||||
RIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 31_86 32_66 33_111 38_64 38_112 38_118 38_126 39_65 39_95 39_117 !39_119 !39_125 39_127
|
||||
RIOB33.IOB_Y0.LVCMOS15_LVCMOS18.DRIVE.I4 31_86 32_66 33_111 38_64 38_112 38_118 !38_126 39_65 39_95 !39_117 !39_119 39_125 39_127
|
||||
RIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 31_86 32_66 33_111 38_64 38_112 !38_118 38_126 39_65 39_95 !39_117 39_119 39_125 !39_127
|
||||
RIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 31_86 32_66 33_111 38_64 38_112 !38_118 38_126 39_65 39_95 !39_117 !39_119 39_125 39_127
|
||||
RIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 31_86 32_66 33_111 38_64 38_112 !38_118 38_126 39_65 39_95 39_117 39_119 !39_125 !39_127
|
||||
RIOB33.IOB_Y0.LVCMOS25.DRIVE.I4 31_86 32_66 33_111 38_64 38_112 38_118 !38_126 39_65 !39_95 !39_117 !39_119 39_125 39_127
|
||||
RIOB33.IOB_Y0.LVCMOS25.DRIVE.I8 31_86 32_66 33_111 38_64 38_112 !38_118 !38_126 39_65 !39_95 !39_117 39_119 !39_125 !39_127
|
||||
RIOB33.IOB_Y0.LVCMOS25.DRIVE.I12 31_86 32_66 33_111 38_64 38_112 !38_118 !38_126 39_65 !39_95 !39_117 !39_119 !39_125 !39_127
|
||||
RIOB33.IOB_Y0.LVCMOS25.DRIVE.I16 31_86 32_66 33_111 38_64 38_112 38_118 38_126 39_65 !39_95 39_117 !39_119 !39_125 !39_127
|
||||
RIOB33.IOB_Y0.LVCMOS33.DRIVE.I16 31_86 32_66 33_111 38_64 !38_112 38_118 !38_126 39_65 !39_95 39_117 !39_119 !39_125 39_127
|
||||
RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I4 31_86 32_66 33_111 38_64 !38_112 38_118 !38_126 39_65 !39_95 !39_117 !39_119 39_125 39_127
|
||||
RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I8 31_86 32_66 33_111 38_64 !38_112 !38_118 38_126 39_65 !39_95 !39_117 39_119 39_125 !39_127
|
||||
RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16 31_86 32_66 33_111 38_64 !38_112 !38_118 38_126 39_65 !39_95 !39_117 !39_119 39_125 39_127
|
||||
RIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 31_86 32_66 33_111 38_64 38_112 38_118 38_126 39_65 39_95 39_113 !39_117 !39_119 39_125 !39_127
|
||||
RIOB33.IOB_Y0.LVCMOS12.DRIVE.I8 31_86 32_66 33_111 38_64 38_112 !38_118 !38_126 39_65 39_95 39_113 !39_117 39_119 !39_125 !39_127
|
||||
RIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 31_86 32_66 33_111 38_64 38_112 !38_118 38_126 39_65 39_95 39_113 !39_117 !39_119 !39_125 39_127
|
||||
RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18.IN 38_86 39_85 !39_87 39_113
|
||||
RIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 31_86 32_66 33_111 38_64 38_112 !38_118 38_126 39_65 39_95 39_113 !39_117 39_119 39_125 39_127
|
||||
RIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 31_86 32_66 33_111 38_64 38_112 !38_118 !38_126 39_65 39_95 39_113 !39_117 !39_119 !39_125 39_127
|
||||
RIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 31_86 32_66 33_111 38_64 38_112 38_118 38_126 39_65 39_95 39_113 39_117 !39_119 !39_125 39_127
|
||||
RIOB33.IOB_Y0.LVCMOS15_LVCMOS18.DRIVE.I4 31_86 32_66 33_111 38_64 38_112 38_118 !38_126 39_65 39_95 39_113 !39_117 !39_119 39_125 39_127
|
||||
RIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 31_86 32_66 33_111 38_64 38_112 !38_118 38_126 39_65 39_95 39_113 !39_117 39_119 39_125 !39_127
|
||||
RIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 31_86 32_66 33_111 38_64 38_112 !38_118 38_126 39_65 39_95 39_113 !39_117 !39_119 39_125 39_127
|
||||
RIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 31_86 32_66 33_111 38_64 38_112 !38_118 38_126 39_65 39_95 39_113 39_117 39_119 !39_125 !39_127
|
||||
RIOB33.IOB_Y0.LVCMOS25.DRIVE.I4 31_86 32_66 33_111 38_64 38_112 38_118 !38_126 39_65 !39_95 39_113 !39_117 !39_119 39_125 39_127
|
||||
RIOB33.IOB_Y0.LVCMOS25.DRIVE.I8 31_86 32_66 33_111 38_64 38_112 !38_118 !38_126 39_65 !39_95 39_113 !39_117 39_119 !39_125 !39_127
|
||||
RIOB33.IOB_Y0.LVCMOS25.DRIVE.I12 31_86 32_66 33_111 38_64 38_112 !38_118 !38_126 39_65 !39_95 39_113 !39_117 !39_119 !39_125 !39_127
|
||||
RIOB33.IOB_Y0.LVCMOS25.DRIVE.I16 31_86 32_66 33_111 38_64 38_112 38_118 38_126 39_65 !39_95 39_113 39_117 !39_119 !39_125 !39_127
|
||||
RIOB33.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN 38_86 39_85 39_87 39_113
|
||||
RIOB33.IOB_Y0.LVCMOS33.DRIVE.I16 31_86 32_66 33_111 38_64 !38_112 38_118 !38_126 39_65 !39_95 !39_113 39_117 !39_119 !39_125 39_127
|
||||
RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I4 31_86 32_66 33_111 38_64 !38_112 38_118 !38_126 39_65 !39_95 !39_113 !39_117 !39_119 39_125 39_127
|
||||
RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I8 31_86 32_66 33_111 38_64 !38_112 !38_118 38_126 39_65 !39_95 !39_113 !39_117 39_119 39_125 !39_127
|
||||
RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16 31_86 32_66 33_111 38_64 !38_112 !38_118 38_126 39_65 !39_95 !39_113 !39_117 !39_119 39_125 39_127
|
||||
RIOB33.IOB_Y1.IBUFDISABLE.I 39_45
|
||||
RIOB33.IOB_Y1.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE 26_29
|
||||
RIOB33.IOB_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE 27_28
|
||||
|
|
|
|||
|
|
@ -42484,8 +42484,8 @@
|
|||
"CLB_IO_CLK": {
|
||||
"baseaddr": "0x00401380",
|
||||
"frames": 30,
|
||||
"offset": 47,
|
||||
"words": 7
|
||||
"offset": 42,
|
||||
"words": 18
|
||||
}
|
||||
},
|
||||
"grid_x": 82,
|
||||
|
|
@ -42523,8 +42523,8 @@
|
|||
"CLB_IO_CLK": {
|
||||
"baseaddr": "0x00001380",
|
||||
"frames": 30,
|
||||
"offset": 47,
|
||||
"words": 7
|
||||
"offset": 42,
|
||||
"words": 18
|
||||
}
|
||||
},
|
||||
"grid_x": 82,
|
||||
|
|
@ -43889,7 +43889,14 @@
|
|||
"type": "HCLK_CLB"
|
||||
},
|
||||
"HCLK_CMT_L_X119Y26": {
|
||||
"bits": {},
|
||||
"bits": {
|
||||
"CLB_IO_CLK": {
|
||||
"baseaddr": "0x00401B00",
|
||||
"frames": 30,
|
||||
"offset": 45,
|
||||
"words": 10
|
||||
}
|
||||
},
|
||||
"grid_x": 119,
|
||||
"grid_y": 78,
|
||||
"sites": {
|
||||
|
|
@ -43899,7 +43906,14 @@
|
|||
"type": "HCLK_CMT_L"
|
||||
},
|
||||
"HCLK_CMT_L_X119Y78": {
|
||||
"bits": {},
|
||||
"bits": {
|
||||
"CLB_IO_CLK": {
|
||||
"baseaddr": "0x00001B00",
|
||||
"frames": 30,
|
||||
"offset": 45,
|
||||
"words": 10
|
||||
}
|
||||
},
|
||||
"grid_x": 119,
|
||||
"grid_y": 26,
|
||||
"sites": {
|
||||
|
|
|
|||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,32 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
(CELL
|
||||
(CELLTYPE "CAPTURE")
|
||||
(INSTANCE CAPTURE)
|
||||
(TIMINGCHECK
|
||||
(HOLD CAP (posedge CLK) (0.000::0.000))
|
||||
(SETUP CAP (posedge CLK) (3.725::4.285))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "ICAP")
|
||||
(INSTANCE ICAP)
|
||||
(TIMINGCHECK
|
||||
(HOLD CLK (posedge CLK) (0.000::0.000))
|
||||
(SETUP CLK (posedge CLK) (3.390::3.900))
|
||||
(HOLD CLK (posedge CLK) (0.000::0.000))
|
||||
(SETUP CLK (posedge CLK) (5.587::6.427))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "ICAP_I")
|
||||
(INSTANCE ICAP)
|
||||
(TIMINGCHECK
|
||||
(HOLD CLK (posedge CLK) (0.000::0.000))
|
||||
(SETUP CLK (posedge CLK) (2.237::2.574))
|
||||
)
|
||||
)
|
||||
)
|
||||
|
|
@ -0,0 +1,23 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
(CELL
|
||||
(CELLTYPE "DNA_PORT_DNA_PORTDNA_PORT")
|
||||
(INSTANCE DNA_PORT)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLK DOUT (1.862::2.142)(2.793::3.214))
|
||||
)
|
||||
)
|
||||
(TIMINGCHECK
|
||||
(HOLD CLK (posedge CLK) (0.000::0.000))
|
||||
(SETUP CLK (posedge CLK) (2.793::3.214))
|
||||
(HOLD READ (posedge CLK) (0.000::0.000))
|
||||
(SETUP READ (posedge CLK) (4.656::5.356))
|
||||
(HOLD SHIFT (posedge CLK) (0.000::0.000))
|
||||
(SETUP SHIFT (posedge CLK) (4.656::5.356))
|
||||
)
|
||||
)
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,468 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
(CELL
|
||||
(CELLTYPE "CARRY4")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CIN CO0 (0.076::0.100)(0.206::0.271))
|
||||
(IOPATH CIN CO1 (0.045::0.056)(0.127::0.157))
|
||||
(IOPATH CIN CO2 (0.065::0.081)(0.184::0.228))
|
||||
(IOPATH CIN CO3 (0.039::0.049)(0.092::0.114))
|
||||
(IOPATH CIN O0 (0.054::0.080)(0.150::0.222))
|
||||
(IOPATH CIN O1 (0.091::0.113)(0.269::0.334))
|
||||
(IOPATH CIN O2 (0.065::0.081)(0.192::0.239))
|
||||
(IOPATH CIN O3 (0.090::0.112)(0.252::0.313))
|
||||
(IOPATH CYINIT CO0 (0.165::0.206)(0.432::0.536))
|
||||
(IOPATH CYINIT CO1 (0.144::0.180)(0.398::0.494))
|
||||
(IOPATH CYINIT CO2 (0.169::0.210)(0.477::0.592))
|
||||
(IOPATH CYINIT CO3 (0.173::0.215)(0.467::0.580))
|
||||
(IOPATH CYINIT O0 (0.147::0.183)(0.388::0.482))
|
||||
(IOPATH CYINIT O1 (0.176::0.219)(0.482::0.598))
|
||||
(IOPATH CYINIT O2 (0.167::0.208)(0.471::0.584))
|
||||
(IOPATH CYINIT O3 (0.190::0.236)(0.518::0.642))
|
||||
(IOPATH S0 CO0 (0.089::0.118)(0.258::0.340))
|
||||
(IOPATH S0 CO1 (0.118::0.156)(0.329::0.433))
|
||||
(IOPATH S0 CO2 (0.144::0.190)(0.389::0.512))
|
||||
(IOPATH S0 CO3 (0.142::0.187)(0.386::0.508))
|
||||
(IOPATH S0 O0 (0.060::0.079)(0.170::0.223))
|
||||
(IOPATH S0 O1 (0.096::0.127)(0.304::0.400))
|
||||
(IOPATH S0 O2 (0.136::0.180)(0.398::0.523))
|
||||
(IOPATH S0 O3 (0.156::0.206)(0.442::0.582))
|
||||
(IOPATH S1 CO1 (0.126::0.166)(0.356::0.469))
|
||||
(IOPATH S1 CO2 (0.153::0.202)(0.417::0.548))
|
||||
(IOPATH S1 CO3 (0.146::0.192)(0.401::0.528))
|
||||
(IOPATH S1 O1 (0.056::0.074)(0.156::0.205))
|
||||
(IOPATH S1 O2 (0.143::0.189)(0.424::0.558))
|
||||
(IOPATH S1 O3 (0.163::0.215)(0.470::0.618))
|
||||
(IOPATH S2 CO2 (0.072::0.095)(0.222::0.292))
|
||||
(IOPATH S2 CO3 (0.106::0.140)(0.286::0.376))
|
||||
(IOPATH S2 O2 (0.057::0.075)(0.171::0.226))
|
||||
(IOPATH S2 O3 (0.090::0.119)(0.251::0.330))
|
||||
(IOPATH S3 CO3 (0.106::0.140)(0.289::0.380))
|
||||
(IOPATH S3 O3 (0.054::0.071)(0.172::0.227))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "CARRY4_AX")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH DI0 CO0 (0.112::0.139)(0.306::0.379))
|
||||
(IOPATH DI0 CO1 (0.134::0.166)(0.375::0.465))
|
||||
(IOPATH DI0 CO2 (0.160::0.199)(0.435::0.540))
|
||||
(IOPATH DI0 CO3 (0.161::0.201)(0.424::0.526))
|
||||
(IOPATH DI0 O1 (0.124::0.155)(0.328::0.407))
|
||||
(IOPATH DI0 O2 (0.157::0.196)(0.448::0.556))
|
||||
(IOPATH DI0 O3 (0.178::0.222)(0.496::0.615))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "CARRY4_AX_LBOTH")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH DI0 CO0 (0.123::0.153)(0.343::0.425))
|
||||
(IOPATH DI0 CO1 (0.142::0.177)(0.393::0.487))
|
||||
(IOPATH DI0 CO2 (0.170::0.211)(0.456::0.566))
|
||||
(IOPATH DI0 O1 (0.131::0.163)(0.338::0.420))
|
||||
(IOPATH DI0 O2 (0.160::0.200)(0.462::0.573))
|
||||
(IOPATH DI0 O3 (0.182::0.227)(0.511::0.633))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "CARRY4_AX_LFF")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH DI0 CO0 (0.113::0.140)(0.301::0.374))
|
||||
(IOPATH DI0 CO1 (0.134::0.166)(0.373::0.462))
|
||||
(IOPATH DI0 CO2 (0.158::0.197)(0.432::0.536))
|
||||
(IOPATH DI0 O1 (0.124::0.154)(0.328::0.407))
|
||||
(IOPATH DI0 O2 (0.157::0.196)(0.448::0.556))
|
||||
(IOPATH DI0 O3 (0.177::0.220)(0.496::0.615))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "CARRY4_BX")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH DI1 CO1 (0.124::0.154)(0.359::0.445))
|
||||
(IOPATH DI1 CO2 (0.150::0.186)(0.419::0.520))
|
||||
(IOPATH DI1 CO3 (0.147::0.183)(0.409::0.507))
|
||||
(IOPATH DI1 O2 (0.146::0.182)(0.433::0.537))
|
||||
(IOPATH DI1 O3 (0.167::0.208)(0.481::0.596))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "CARRY4_BX_LBOTH")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH DI1 CO1 (0.132::0.164)(0.376::0.467))
|
||||
(IOPATH DI1 CO2 (0.160::0.199)(0.441::0.547))
|
||||
(IOPATH DI1 O2 (0.150::0.186)(0.446::0.554))
|
||||
(IOPATH DI1 O3 (0.169::0.210)(0.495::0.614))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "CARRY4_BX_LFF")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH DI1 CO1 (0.123::0.153)(0.355::0.440))
|
||||
(IOPATH DI1 CO2 (0.148::0.184)(0.417::0.517))
|
||||
(IOPATH DI1 O2 (0.146::0.182)(0.431::0.535))
|
||||
(IOPATH DI1 O3 (0.167::0.208)(0.481::0.596))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "CARRY4_CX")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH DI2 CO2 (0.099::0.124)(0.287::0.356))
|
||||
(IOPATH DI2 CO3 (0.117::0.146)(0.321::0.398))
|
||||
(IOPATH DI2 O3 (0.127::0.158)(0.353::0.438))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "CARRY4_CX_LBOTH")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH DI2 CO2 (0.105::0.131)(0.308::0.383))
|
||||
(IOPATH DI2 O3 (0.129::0.160)(0.366::0.455))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "CARRY4_CX_LFF")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH DI2 CO2 (0.099::0.124)(0.286::0.354))
|
||||
(IOPATH DI2 O3 (0.127::0.158)(0.354::0.439))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "CARRY4_DX")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH DI3 CO3 (0.113::0.140)(0.310::0.385))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "CARRY4_LBOTH")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CIN CO0 (0.086::0.113)(0.223::0.293))
|
||||
(IOPATH CIN CO1 (0.052::0.064)(0.143::0.178))
|
||||
(IOPATH CIN CO2 (0.075::0.094)(0.201::0.250))
|
||||
(IOPATH CIN O0 (0.057::0.085)(0.159::0.235))
|
||||
(IOPATH CIN O1 (0.098::0.122)(0.280::0.348))
|
||||
(IOPATH CIN O2 (0.070::0.087)(0.206::0.256))
|
||||
(IOPATH CIN O3 (0.092::0.114)(0.265::0.329))
|
||||
(IOPATH CYINIT CO0 (0.177::0.220)(0.466::0.578))
|
||||
(IOPATH CYINIT CO1 (0.152::0.189)(0.426::0.529))
|
||||
(IOPATH CYINIT CO2 (0.180::0.224)(0.497::0.617))
|
||||
(IOPATH CYINIT O0 (0.152::0.189)(0.395::0.491))
|
||||
(IOPATH CYINIT O1 (0.183::0.228)(0.494::0.613))
|
||||
(IOPATH CYINIT O2 (0.172::0.214)(0.483::0.600))
|
||||
(IOPATH CYINIT O3 (0.194::0.241)(0.530::0.657))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "CARRY4_LFF")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CIN CO0 (0.076::0.100)(0.204::0.268))
|
||||
(IOPATH CIN CO1 (0.044::0.055)(0.125::0.155))
|
||||
(IOPATH CIN CO2 (0.064::0.080)(0.183::0.227))
|
||||
(IOPATH CIN O0 (0.055::0.081)(0.151::0.223))
|
||||
(IOPATH CIN O1 (0.090::0.112)(0.269::0.334))
|
||||
(IOPATH CIN O2 (0.065::0.081)(0.192::0.239))
|
||||
(IOPATH CIN O3 (0.090::0.112)(0.250::0.311))
|
||||
(IOPATH CYINIT CO0 (0.165::0.206)(0.429::0.532))
|
||||
(IOPATH CYINIT CO1 (0.144::0.180)(0.395::0.491))
|
||||
(IOPATH CYINIT CO2 (0.168::0.209)(0.474::0.589))
|
||||
(IOPATH CYINIT O0 (0.148::0.184)(0.385::0.477))
|
||||
(IOPATH CYINIT O1 (0.175::0.218)(0.482::0.598))
|
||||
(IOPATH CYINIT O2 (0.167::0.208)(0.468::0.581))
|
||||
(IOPATH CYINIT O3 (0.189::0.235)(0.516::0.640))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "CARRY4_O5")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH DI0 CO0 (0.085::0.112)(0.250::0.329))
|
||||
(IOPATH DI0 CO1 (0.103::0.136)(0.301::0.396))
|
||||
(IOPATH DI0 CO2 (0.129::0.171)(0.360::0.474))
|
||||
(IOPATH DI0 CO3 (0.129::0.171)(0.346::0.456))
|
||||
(IOPATH DI0 O1 (0.094::0.124)(0.256::0.337))
|
||||
(IOPATH DI0 O2 (0.122::0.161)(0.369::0.486))
|
||||
(IOPATH DI0 O3 (0.143::0.189)(0.414::0.545))
|
||||
(IOPATH DI1 CO1 (0.092::0.122)(0.286::0.376))
|
||||
(IOPATH DI1 CO2 (0.118::0.156)(0.349::0.459))
|
||||
(IOPATH DI1 CO3 (0.115::0.152)(0.336::0.443))
|
||||
(IOPATH DI1 O2 (0.110::0.146)(0.358::0.471))
|
||||
(IOPATH DI1 O3 (0.131::0.174)(0.404::0.532))
|
||||
(IOPATH DI2 CO2 (0.071::0.094)(0.219::0.289))
|
||||
(IOPATH DI2 CO3 (0.088::0.116)(0.246::0.324))
|
||||
(IOPATH DI2 O3 (0.098::0.129)(0.282::0.372))
|
||||
(IOPATH DI3 CO3 (0.088::0.116)(0.248::0.327))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "FF_INIT")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLK Q (0.099::0.124)(0.244::0.303))
|
||||
)
|
||||
)
|
||||
(TIMINGCHECK
|
||||
(HOLD CE (posedge CLK) (-0.011::-0.009))
|
||||
(SETUP CE (posedge CLK) (0.088::0.109))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "FF_INIT_QH")
|
||||
(INSTANCE SLICEL)
|
||||
(TIMINGCHECK
|
||||
(RECOVERY SR (posedge CLK) (0.288::0.358))
|
||||
(REMOVAL SR (posedge CLK) (-0.305::-0.248))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "FF_INIT_QL")
|
||||
(INSTANCE SLICEL)
|
||||
(TIMINGCHECK
|
||||
(RECOVERY SR (posedge CLK) (0.326::0.404))
|
||||
(REMOVAL SR (posedge CLK) (-0.305::-0.248))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "REG_INIT_FF")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLK Q (0.112::0.139)(0.274::0.340))
|
||||
)
|
||||
)
|
||||
(TIMINGCHECK
|
||||
(HOLD CE (posedge CLK) (-0.011::-0.009))
|
||||
(SETUP CE (posedge CLK) (0.088::0.109))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "REG_INIT_FF_QH")
|
||||
(INSTANCE SLICEL)
|
||||
(TIMINGCHECK
|
||||
(RECOVERY SR (posedge CLK) (0.288::0.358))
|
||||
(REMOVAL SR (posedge CLK) (-0.305::-0.248))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "REG_INIT_FF_QL")
|
||||
(INSTANCE SLICEL)
|
||||
(TIMINGCHECK
|
||||
(RECOVERY SR (posedge CLK) (0.326::0.404))
|
||||
(REMOVAL SR (posedge CLK) (-0.305::-0.248))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "REG_INIT_LAT")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CE Q (0.130::0.162)(0.409::0.507))
|
||||
(IOPATH CLK Q (0.129::0.160)(0.357::0.443))
|
||||
(IOPATH D Q (0.073::0.092)(0.213::0.264))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "REG_INIT_LAT_LOGIC_AND")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH D Q (0.073::0.092)(0.213::0.264))
|
||||
(IOPATH SR Q (0.164::0.204)(0.638::0.791))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "REG_INIT_LAT_LOGIC_OR")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH D Q (0.073::0.092)(0.213::0.264))
|
||||
(IOPATH SR Q (0.164::0.204)(0.638::0.791))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "LUT5")
|
||||
(INSTANCE SLICEL/A5LUT)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH A1 O5 (0.044::0.055)(0.122::0.152))
|
||||
(IOPATH A2 O5 (0.044::0.055)(0.122::0.152))
|
||||
(IOPATH A3 O5 (0.042::0.052)(0.121::0.150))
|
||||
(IOPATH A4 O5 (0.046::0.057)(0.121::0.150))
|
||||
(IOPATH A5 O5 (0.048::0.060)(0.095::0.118))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "LUT6")
|
||||
(INSTANCE SLICEL/A6LUT)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH A1 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A2 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A3 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A4 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A5 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A6 O6 (0.045::0.056)(0.100::0.124))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "LUT5")
|
||||
(INSTANCE SLICEL/B5LUT)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH A1 O5 (0.045::0.056)(0.122::0.152))
|
||||
(IOPATH A2 O5 (0.043::0.054)(0.122::0.152))
|
||||
(IOPATH A3 O5 (0.043::0.053)(0.122::0.152))
|
||||
(IOPATH A4 O5 (0.045::0.056)(0.121::0.150))
|
||||
(IOPATH A5 O5 (0.049::0.061)(0.096::0.119))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "LUT6")
|
||||
(INSTANCE SLICEL/B6LUT)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH A1 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A2 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A3 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A4 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A5 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A6 O6 (0.045::0.056)(0.100::0.124))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "LUT5")
|
||||
(INSTANCE SLICEL/C5LUT)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH A1 O5 (0.044::0.055)(0.124::0.154))
|
||||
(IOPATH A2 O5 (0.043::0.053)(0.124::0.154))
|
||||
(IOPATH A3 O5 (0.042::0.052)(0.123::0.153))
|
||||
(IOPATH A4 O5 (0.045::0.056)(0.123::0.153))
|
||||
(IOPATH A5 O5 (0.051::0.063)(0.097::0.120))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "LUT6")
|
||||
(INSTANCE SLICEL/C6LUT)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH A1 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A2 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A3 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A4 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A5 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A6 O6 (0.045::0.056)(0.100::0.124))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "LUT5")
|
||||
(INSTANCE SLICEL/D5LUT)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH A1 O5 (0.044::0.055)(0.120::0.149))
|
||||
(IOPATH A2 O5 (0.043::0.054)(0.121::0.150))
|
||||
(IOPATH A3 O5 (0.042::0.052)(0.120::0.149))
|
||||
(IOPATH A4 O5 (0.044::0.055)(0.120::0.149))
|
||||
(IOPATH A5 O5 (0.049::0.061)(0.094::0.117))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "LUT6")
|
||||
(INSTANCE SLICEL/D6LUT)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH A1 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A2 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A3 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A4 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A5 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A6 O6 (0.045::0.056)(0.100::0.124))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "SELMUX2_1")
|
||||
(INSTANCE SLICEL/F7AMUX)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH 0 OUT (0.053::0.067)(0.153::0.190))
|
||||
(IOPATH 1 OUT (0.055::0.069)(0.156::0.193))
|
||||
(IOPATH S0 OUT (0.085::0.106)(0.222::0.276))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "SELMUX2_1")
|
||||
(INSTANCE SLICEL/F7BMUX)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH 0 OUT (0.062::0.077)(0.175::0.217))
|
||||
(IOPATH 1 OUT (0.065::0.081)(0.180::0.223))
|
||||
(IOPATH S0 OUT (0.093::0.115)(0.239::0.296))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "SELMUX2_1")
|
||||
(INSTANCE SLICEL/F8MUX)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH 0 OUT (0.023::0.028)(0.083::0.104))
|
||||
(IOPATH 1 OUT (0.019::0.024)(0.076::0.094))
|
||||
(IOPATH S0 OUT (0.080::0.100)(0.220::0.273))
|
||||
)
|
||||
)
|
||||
)
|
||||
)
|
||||
|
|
@ -0,0 +1,468 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
(CELL
|
||||
(CELLTYPE "CARRY4")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CIN CO0 (0.076::0.100)(0.206::0.271))
|
||||
(IOPATH CIN CO1 (0.045::0.056)(0.127::0.157))
|
||||
(IOPATH CIN CO2 (0.065::0.081)(0.184::0.228))
|
||||
(IOPATH CIN CO3 (0.039::0.049)(0.092::0.114))
|
||||
(IOPATH CIN O0 (0.054::0.080)(0.150::0.222))
|
||||
(IOPATH CIN O1 (0.091::0.113)(0.269::0.334))
|
||||
(IOPATH CIN O2 (0.065::0.081)(0.192::0.239))
|
||||
(IOPATH CIN O3 (0.090::0.112)(0.252::0.313))
|
||||
(IOPATH CYINIT CO0 (0.165::0.206)(0.432::0.536))
|
||||
(IOPATH CYINIT CO1 (0.144::0.180)(0.398::0.494))
|
||||
(IOPATH CYINIT CO2 (0.169::0.210)(0.477::0.592))
|
||||
(IOPATH CYINIT CO3 (0.173::0.215)(0.467::0.580))
|
||||
(IOPATH CYINIT O0 (0.147::0.183)(0.388::0.482))
|
||||
(IOPATH CYINIT O1 (0.176::0.219)(0.482::0.598))
|
||||
(IOPATH CYINIT O2 (0.167::0.208)(0.471::0.584))
|
||||
(IOPATH CYINIT O3 (0.190::0.236)(0.518::0.642))
|
||||
(IOPATH S0 CO0 (0.089::0.118)(0.258::0.340))
|
||||
(IOPATH S0 CO1 (0.118::0.156)(0.329::0.433))
|
||||
(IOPATH S0 CO2 (0.144::0.190)(0.389::0.512))
|
||||
(IOPATH S0 CO3 (0.142::0.187)(0.386::0.508))
|
||||
(IOPATH S0 O0 (0.060::0.079)(0.170::0.223))
|
||||
(IOPATH S0 O1 (0.096::0.127)(0.304::0.400))
|
||||
(IOPATH S0 O2 (0.136::0.180)(0.398::0.523))
|
||||
(IOPATH S0 O3 (0.156::0.206)(0.442::0.582))
|
||||
(IOPATH S1 CO1 (0.126::0.166)(0.356::0.469))
|
||||
(IOPATH S1 CO2 (0.153::0.202)(0.417::0.548))
|
||||
(IOPATH S1 CO3 (0.146::0.192)(0.401::0.528))
|
||||
(IOPATH S1 O1 (0.056::0.074)(0.156::0.205))
|
||||
(IOPATH S1 O2 (0.143::0.189)(0.424::0.558))
|
||||
(IOPATH S1 O3 (0.163::0.215)(0.470::0.618))
|
||||
(IOPATH S2 CO2 (0.072::0.095)(0.222::0.292))
|
||||
(IOPATH S2 CO3 (0.106::0.140)(0.286::0.376))
|
||||
(IOPATH S2 O2 (0.057::0.075)(0.171::0.226))
|
||||
(IOPATH S2 O3 (0.090::0.119)(0.251::0.330))
|
||||
(IOPATH S3 CO3 (0.106::0.140)(0.289::0.380))
|
||||
(IOPATH S3 O3 (0.054::0.071)(0.172::0.227))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "CARRY4_AX")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH DI0 CO0 (0.112::0.139)(0.306::0.379))
|
||||
(IOPATH DI0 CO1 (0.134::0.166)(0.375::0.465))
|
||||
(IOPATH DI0 CO2 (0.160::0.199)(0.435::0.540))
|
||||
(IOPATH DI0 CO3 (0.161::0.201)(0.424::0.526))
|
||||
(IOPATH DI0 O1 (0.124::0.155)(0.328::0.407))
|
||||
(IOPATH DI0 O2 (0.157::0.196)(0.448::0.556))
|
||||
(IOPATH DI0 O3 (0.178::0.222)(0.496::0.615))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "CARRY4_AX_LBOTH")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH DI0 CO0 (0.123::0.153)(0.343::0.425))
|
||||
(IOPATH DI0 CO1 (0.142::0.177)(0.393::0.487))
|
||||
(IOPATH DI0 CO2 (0.170::0.211)(0.456::0.566))
|
||||
(IOPATH DI0 O1 (0.131::0.163)(0.338::0.420))
|
||||
(IOPATH DI0 O2 (0.160::0.200)(0.462::0.573))
|
||||
(IOPATH DI0 O3 (0.182::0.227)(0.511::0.633))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "CARRY4_AX_LFF")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH DI0 CO0 (0.113::0.140)(0.301::0.374))
|
||||
(IOPATH DI0 CO1 (0.134::0.166)(0.373::0.462))
|
||||
(IOPATH DI0 CO2 (0.158::0.197)(0.432::0.536))
|
||||
(IOPATH DI0 O1 (0.124::0.154)(0.328::0.407))
|
||||
(IOPATH DI0 O2 (0.157::0.196)(0.448::0.556))
|
||||
(IOPATH DI0 O3 (0.177::0.220)(0.496::0.615))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "CARRY4_BX")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH DI1 CO1 (0.124::0.154)(0.359::0.445))
|
||||
(IOPATH DI1 CO2 (0.150::0.186)(0.419::0.520))
|
||||
(IOPATH DI1 CO3 (0.147::0.183)(0.409::0.507))
|
||||
(IOPATH DI1 O2 (0.146::0.182)(0.433::0.537))
|
||||
(IOPATH DI1 O3 (0.167::0.208)(0.481::0.596))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "CARRY4_BX_LBOTH")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH DI1 CO1 (0.132::0.164)(0.376::0.467))
|
||||
(IOPATH DI1 CO2 (0.160::0.199)(0.441::0.547))
|
||||
(IOPATH DI1 O2 (0.150::0.186)(0.446::0.554))
|
||||
(IOPATH DI1 O3 (0.169::0.210)(0.495::0.614))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "CARRY4_BX_LFF")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH DI1 CO1 (0.123::0.153)(0.355::0.440))
|
||||
(IOPATH DI1 CO2 (0.148::0.184)(0.417::0.517))
|
||||
(IOPATH DI1 O2 (0.146::0.182)(0.431::0.535))
|
||||
(IOPATH DI1 O3 (0.167::0.208)(0.481::0.596))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "CARRY4_CX")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH DI2 CO2 (0.099::0.124)(0.287::0.356))
|
||||
(IOPATH DI2 CO3 (0.117::0.146)(0.321::0.398))
|
||||
(IOPATH DI2 O3 (0.127::0.158)(0.353::0.438))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "CARRY4_CX_LBOTH")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH DI2 CO2 (0.105::0.131)(0.308::0.383))
|
||||
(IOPATH DI2 O3 (0.129::0.160)(0.366::0.455))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "CARRY4_CX_LFF")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH DI2 CO2 (0.099::0.124)(0.286::0.354))
|
||||
(IOPATH DI2 O3 (0.127::0.158)(0.354::0.439))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "CARRY4_DX")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH DI3 CO3 (0.113::0.140)(0.310::0.385))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "CARRY4_LBOTH")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CIN CO0 (0.086::0.113)(0.223::0.293))
|
||||
(IOPATH CIN CO1 (0.052::0.064)(0.143::0.178))
|
||||
(IOPATH CIN CO2 (0.075::0.094)(0.201::0.250))
|
||||
(IOPATH CIN O0 (0.057::0.085)(0.159::0.235))
|
||||
(IOPATH CIN O1 (0.098::0.122)(0.280::0.348))
|
||||
(IOPATH CIN O2 (0.070::0.087)(0.206::0.256))
|
||||
(IOPATH CIN O3 (0.092::0.114)(0.265::0.329))
|
||||
(IOPATH CYINIT CO0 (0.177::0.220)(0.466::0.578))
|
||||
(IOPATH CYINIT CO1 (0.152::0.189)(0.426::0.529))
|
||||
(IOPATH CYINIT CO2 (0.180::0.224)(0.497::0.617))
|
||||
(IOPATH CYINIT O0 (0.152::0.189)(0.395::0.491))
|
||||
(IOPATH CYINIT O1 (0.183::0.228)(0.494::0.613))
|
||||
(IOPATH CYINIT O2 (0.172::0.214)(0.483::0.600))
|
||||
(IOPATH CYINIT O3 (0.194::0.241)(0.530::0.657))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "CARRY4_LFF")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CIN CO0 (0.076::0.100)(0.204::0.268))
|
||||
(IOPATH CIN CO1 (0.044::0.055)(0.125::0.155))
|
||||
(IOPATH CIN CO2 (0.064::0.080)(0.183::0.227))
|
||||
(IOPATH CIN O0 (0.055::0.081)(0.151::0.223))
|
||||
(IOPATH CIN O1 (0.090::0.112)(0.269::0.334))
|
||||
(IOPATH CIN O2 (0.065::0.081)(0.192::0.239))
|
||||
(IOPATH CIN O3 (0.090::0.112)(0.250::0.311))
|
||||
(IOPATH CYINIT CO0 (0.165::0.206)(0.429::0.532))
|
||||
(IOPATH CYINIT CO1 (0.144::0.180)(0.395::0.491))
|
||||
(IOPATH CYINIT CO2 (0.168::0.209)(0.474::0.589))
|
||||
(IOPATH CYINIT O0 (0.148::0.184)(0.385::0.477))
|
||||
(IOPATH CYINIT O1 (0.175::0.218)(0.482::0.598))
|
||||
(IOPATH CYINIT O2 (0.167::0.208)(0.468::0.581))
|
||||
(IOPATH CYINIT O3 (0.189::0.235)(0.516::0.640))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "CARRY4_O5")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH DI0 CO0 (0.085::0.112)(0.250::0.329))
|
||||
(IOPATH DI0 CO1 (0.103::0.136)(0.301::0.396))
|
||||
(IOPATH DI0 CO2 (0.129::0.171)(0.360::0.474))
|
||||
(IOPATH DI0 CO3 (0.129::0.171)(0.346::0.456))
|
||||
(IOPATH DI0 O1 (0.094::0.124)(0.256::0.337))
|
||||
(IOPATH DI0 O2 (0.122::0.161)(0.369::0.486))
|
||||
(IOPATH DI0 O3 (0.143::0.189)(0.414::0.545))
|
||||
(IOPATH DI1 CO1 (0.092::0.122)(0.286::0.376))
|
||||
(IOPATH DI1 CO2 (0.118::0.156)(0.349::0.459))
|
||||
(IOPATH DI1 CO3 (0.115::0.152)(0.336::0.443))
|
||||
(IOPATH DI1 O2 (0.110::0.146)(0.358::0.471))
|
||||
(IOPATH DI1 O3 (0.131::0.174)(0.404::0.532))
|
||||
(IOPATH DI2 CO2 (0.071::0.094)(0.219::0.289))
|
||||
(IOPATH DI2 CO3 (0.088::0.116)(0.246::0.324))
|
||||
(IOPATH DI2 O3 (0.098::0.129)(0.282::0.372))
|
||||
(IOPATH DI3 CO3 (0.088::0.116)(0.248::0.327))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "FF_INIT")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLK Q (0.099::0.124)(0.244::0.303))
|
||||
)
|
||||
)
|
||||
(TIMINGCHECK
|
||||
(HOLD CE (posedge CLK) (-0.011::-0.009))
|
||||
(SETUP CE (posedge CLK) (0.088::0.109))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "FF_INIT_QH")
|
||||
(INSTANCE SLICEL)
|
||||
(TIMINGCHECK
|
||||
(RECOVERY SR (posedge CLK) (0.288::0.358))
|
||||
(REMOVAL SR (posedge CLK) (-0.305::-0.248))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "FF_INIT_QL")
|
||||
(INSTANCE SLICEL)
|
||||
(TIMINGCHECK
|
||||
(RECOVERY SR (posedge CLK) (0.326::0.404))
|
||||
(REMOVAL SR (posedge CLK) (-0.305::-0.248))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "REG_INIT_FF")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLK Q (0.112::0.139)(0.274::0.340))
|
||||
)
|
||||
)
|
||||
(TIMINGCHECK
|
||||
(HOLD CE (posedge CLK) (-0.011::-0.009))
|
||||
(SETUP CE (posedge CLK) (0.088::0.109))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "REG_INIT_FF_QH")
|
||||
(INSTANCE SLICEL)
|
||||
(TIMINGCHECK
|
||||
(RECOVERY SR (posedge CLK) (0.288::0.358))
|
||||
(REMOVAL SR (posedge CLK) (-0.305::-0.248))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "REG_INIT_FF_QL")
|
||||
(INSTANCE SLICEL)
|
||||
(TIMINGCHECK
|
||||
(RECOVERY SR (posedge CLK) (0.326::0.404))
|
||||
(REMOVAL SR (posedge CLK) (-0.305::-0.248))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "REG_INIT_LAT")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CE Q (0.130::0.162)(0.409::0.507))
|
||||
(IOPATH CLK Q (0.129::0.160)(0.357::0.443))
|
||||
(IOPATH D Q (0.073::0.092)(0.213::0.264))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "REG_INIT_LAT_LOGIC_AND")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH D Q (0.073::0.092)(0.213::0.264))
|
||||
(IOPATH SR Q (0.164::0.204)(0.638::0.791))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "REG_INIT_LAT_LOGIC_OR")
|
||||
(INSTANCE SLICEL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH D Q (0.073::0.092)(0.213::0.264))
|
||||
(IOPATH SR Q (0.164::0.204)(0.638::0.791))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "LUT5")
|
||||
(INSTANCE SLICEL/A5LUT)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH A1 O5 (0.044::0.055)(0.122::0.152))
|
||||
(IOPATH A2 O5 (0.044::0.055)(0.122::0.152))
|
||||
(IOPATH A3 O5 (0.042::0.052)(0.121::0.150))
|
||||
(IOPATH A4 O5 (0.046::0.057)(0.121::0.150))
|
||||
(IOPATH A5 O5 (0.048::0.060)(0.095::0.118))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "LUT6")
|
||||
(INSTANCE SLICEL/A6LUT)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH A1 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A2 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A3 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A4 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A5 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A6 O6 (0.045::0.056)(0.100::0.124))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "LUT5")
|
||||
(INSTANCE SLICEL/B5LUT)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH A1 O5 (0.045::0.056)(0.122::0.152))
|
||||
(IOPATH A2 O5 (0.043::0.054)(0.122::0.152))
|
||||
(IOPATH A3 O5 (0.043::0.053)(0.122::0.152))
|
||||
(IOPATH A4 O5 (0.045::0.056)(0.121::0.150))
|
||||
(IOPATH A5 O5 (0.049::0.061)(0.096::0.119))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "LUT6")
|
||||
(INSTANCE SLICEL/B6LUT)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH A1 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A2 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A3 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A4 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A5 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A6 O6 (0.045::0.056)(0.100::0.124))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "LUT5")
|
||||
(INSTANCE SLICEL/C5LUT)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH A1 O5 (0.044::0.055)(0.124::0.154))
|
||||
(IOPATH A2 O5 (0.043::0.053)(0.124::0.154))
|
||||
(IOPATH A3 O5 (0.042::0.052)(0.123::0.153))
|
||||
(IOPATH A4 O5 (0.045::0.056)(0.123::0.153))
|
||||
(IOPATH A5 O5 (0.051::0.063)(0.097::0.120))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "LUT6")
|
||||
(INSTANCE SLICEL/C6LUT)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH A1 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A2 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A3 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A4 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A5 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A6 O6 (0.045::0.056)(0.100::0.124))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "LUT5")
|
||||
(INSTANCE SLICEL/D5LUT)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH A1 O5 (0.044::0.055)(0.120::0.149))
|
||||
(IOPATH A2 O5 (0.043::0.054)(0.121::0.150))
|
||||
(IOPATH A3 O5 (0.042::0.052)(0.120::0.149))
|
||||
(IOPATH A4 O5 (0.044::0.055)(0.120::0.149))
|
||||
(IOPATH A5 O5 (0.049::0.061)(0.094::0.117))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "LUT6")
|
||||
(INSTANCE SLICEL/D6LUT)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH A1 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A2 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A3 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A4 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A5 O6 (0.045::0.056)(0.100::0.124))
|
||||
(IOPATH A6 O6 (0.045::0.056)(0.100::0.124))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "SELMUX2_1")
|
||||
(INSTANCE SLICEL/F7AMUX)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH 0 OUT (0.053::0.067)(0.153::0.190))
|
||||
(IOPATH 1 OUT (0.055::0.069)(0.156::0.193))
|
||||
(IOPATH S0 OUT (0.085::0.106)(0.222::0.276))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "SELMUX2_1")
|
||||
(INSTANCE SLICEL/F7BMUX)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH 0 OUT (0.062::0.077)(0.175::0.217))
|
||||
(IOPATH 1 OUT (0.065::0.081)(0.180::0.223))
|
||||
(IOPATH S0 OUT (0.093::0.115)(0.239::0.296))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "SELMUX2_1")
|
||||
(INSTANCE SLICEL/F8MUX)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH 0 OUT (0.023::0.028)(0.083::0.104))
|
||||
(IOPATH 1 OUT (0.019::0.024)(0.076::0.094))
|
||||
(IOPATH S0 OUT (0.080::0.100)(0.220::0.273))
|
||||
)
|
||||
)
|
||||
)
|
||||
)
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,40 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
(CELL
|
||||
(CELLTYPE "BUFHCE")
|
||||
(INSTANCE BUFHCE)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH I O (0.020::0.043)(0.081::0.132))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "BUFHCE_CE_TYPE_ASYNC")
|
||||
(INSTANCE BUFHCE)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CE O (0.069::0.076)(0.249::0.274))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "BUFHCE_CE_TYPE_SYNC_INIT_OUT_0")
|
||||
(INSTANCE BUFHCE)
|
||||
(TIMINGCHECK
|
||||
(HOLD CE (posedge I) (0.174::0.210))
|
||||
(SETUP CE (posedge I) (0.238::0.290))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "BUFHCE_CE_TYPE_SYNC_INIT_OUT_1")
|
||||
(INSTANCE BUFHCE)
|
||||
(TIMINGCHECK
|
||||
(HOLD CE (posedge I) (0.174::0.210))
|
||||
(SETUP CE (posedge I) (0.238::0.290))
|
||||
)
|
||||
)
|
||||
)
|
||||
|
|
@ -0,0 +1,40 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
(CELL
|
||||
(CELLTYPE "BUFHCE")
|
||||
(INSTANCE BUFHCE)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH I O (0.020::0.043)(0.081::0.132))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "BUFHCE_CE_TYPE_ASYNC")
|
||||
(INSTANCE BUFHCE)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CE O (0.069::0.076)(0.249::0.274))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "BUFHCE_CE_TYPE_SYNC_INIT_OUT_0")
|
||||
(INSTANCE BUFHCE)
|
||||
(TIMINGCHECK
|
||||
(HOLD CE (posedge I) (0.174::0.210))
|
||||
(SETUP CE (posedge I) (0.238::0.290))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "BUFHCE_CE_TYPE_SYNC_INIT_OUT_1")
|
||||
(INSTANCE BUFHCE)
|
||||
(TIMINGCHECK
|
||||
(HOLD CE (posedge I) (0.174::0.210))
|
||||
(SETUP CE (posedge I) (0.238::0.290))
|
||||
)
|
||||
)
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,230 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
(CELL
|
||||
(CELLTYPE "IN_FIFO_IN_FIFOIN_FIFO")
|
||||
(INSTANCE IN_FIFO)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH RDCLK ALMOSTEMPTY (0.196::0.226)(0.462::0.531))
|
||||
(IOPATH RDCLK EMPTY (0.193::0.222)(0.536::0.617))
|
||||
(IOPATH WRCLK ALMOSTFULL (0.153::0.176)(0.462::0.531))
|
||||
(IOPATH WRCLK FULL (0.152::0.175)(0.665::0.765))
|
||||
)
|
||||
)
|
||||
(TIMINGCHECK
|
||||
(HOLD RDCLK (posedge RDCLK) (0.015::0.018))
|
||||
(SETUP RDCLK (posedge RDCLK) (0.509::0.586))
|
||||
(HOLD SCANENB (posedge RDCLK) (0.537::0.618))
|
||||
(SETUP SCANENB (posedge RDCLK) (0.976::1.123))
|
||||
(HOLD SCANENB (posedge WRCLK) (0.537::0.618))
|
||||
(SETUP SCANENB (posedge WRCLK) (0.976::1.123))
|
||||
(HOLD WREN (posedge WRCLK) (-0.019::-0.016))
|
||||
(SETUP WREN (posedge WRCLK) (0.461::0.530))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "IN_FIFO_IN_FIFOIN_FIFO_D0")
|
||||
(INSTANCE IN_FIFO)
|
||||
(TIMINGCHECK
|
||||
(HOLD WRCLK (posedge WRCLK) (-0.080::-0.070))
|
||||
(SETUP WRCLK (posedge WRCLK) (0.473::0.544))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "IN_FIFO_IN_FIFOIN_FIFO_D1")
|
||||
(INSTANCE IN_FIFO)
|
||||
(TIMINGCHECK
|
||||
(HOLD WRCLK (posedge WRCLK) (-0.069::-0.060))
|
||||
(SETUP WRCLK (posedge WRCLK) (0.496::0.571))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "IN_FIFO_IN_FIFOIN_FIFO_D2")
|
||||
(INSTANCE IN_FIFO)
|
||||
(TIMINGCHECK
|
||||
(HOLD WRCLK (posedge WRCLK) (-0.073::-0.063))
|
||||
(SETUP WRCLK (posedge WRCLK) (0.456::0.524))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "IN_FIFO_IN_FIFOIN_FIFO_D3")
|
||||
(INSTANCE IN_FIFO)
|
||||
(TIMINGCHECK
|
||||
(HOLD WRCLK (posedge WRCLK) (-0.050::-0.043))
|
||||
(SETUP WRCLK (posedge WRCLK) (0.453::0.521))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "IN_FIFO_IN_FIFOIN_FIFO_D4")
|
||||
(INSTANCE IN_FIFO)
|
||||
(TIMINGCHECK
|
||||
(HOLD WRCLK (posedge WRCLK) (-0.032::-0.028))
|
||||
(SETUP WRCLK (posedge WRCLK) (0.413::0.475))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "IN_FIFO_IN_FIFOIN_FIFO_D5")
|
||||
(INSTANCE IN_FIFO)
|
||||
(TIMINGCHECK
|
||||
(HOLD WRCLK (posedge WRCLK) (-0.026::-0.023))
|
||||
(SETUP WRCLK (posedge WRCLK) (0.404::0.465))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "IN_FIFO_IN_FIFOIN_FIFO_D6")
|
||||
(INSTANCE IN_FIFO)
|
||||
(TIMINGCHECK
|
||||
(HOLD WRCLK (posedge WRCLK) (-0.019::-0.016))
|
||||
(SETUP WRCLK (posedge WRCLK) (0.414::0.476))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "IN_FIFO_IN_FIFOIN_FIFO_D7")
|
||||
(INSTANCE IN_FIFO)
|
||||
(TIMINGCHECK
|
||||
(HOLD WRCLK (posedge WRCLK) (-0.032::-0.028))
|
||||
(SETUP WRCLK (posedge WRCLK) (0.414::0.476))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "IN_FIFO_IN_FIFOIN_FIFO_D8")
|
||||
(INSTANCE IN_FIFO)
|
||||
(TIMINGCHECK
|
||||
(HOLD WRCLK (posedge WRCLK) (-0.043::-0.037))
|
||||
(SETUP WRCLK (posedge WRCLK) (0.429::0.494))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "IN_FIFO_IN_FIFOIN_FIFO_D9")
|
||||
(INSTANCE IN_FIFO)
|
||||
(TIMINGCHECK
|
||||
(HOLD WRCLK (posedge WRCLK) (-0.040::-0.035))
|
||||
(SETUP WRCLK (posedge WRCLK) (0.454::0.522))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "IN_FIFO_IN_FIFOIN_FIFO_SCANIN")
|
||||
(INSTANCE IN_FIFO)
|
||||
(TIMINGCHECK
|
||||
(HOLD RDCLK (posedge RDCLK) (0.537::0.618))
|
||||
(SETUP RDCLK (posedge RDCLK) (0.976::1.123))
|
||||
(HOLD WRCLK (posedge WRCLK) (0.537::0.618))
|
||||
(SETUP WRCLK (posedge WRCLK) (0.976::1.123))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "OUT_FIFO_OUT_FIFOOUT_FIFO")
|
||||
(INSTANCE OUT_FIFO)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH RDCLK ALMOSTEMPTY (0.131::0.151)(0.282::0.324))
|
||||
(IOPATH RDCLK EMPTY (0.137::0.157)(0.414::0.476))
|
||||
(IOPATH WRCLK ALMOSTFULL (0.138::0.159)(0.300::0.345))
|
||||
(IOPATH WRCLK FULL (0.137::0.157)(0.296::0.340))
|
||||
)
|
||||
)
|
||||
(TIMINGCHECK
|
||||
(HOLD RDCLK (posedge RDCLK) (-0.013::-0.012))
|
||||
(SETUP RDCLK (posedge RDCLK) (0.566::0.651))
|
||||
(HOLD SCANENB (posedge RDCLK) (0.537::0.618))
|
||||
(SETUP SCANENB (posedge RDCLK) (0.976::1.123))
|
||||
(HOLD SCANENB (posedge WRCLK) (0.537::0.618))
|
||||
(SETUP SCANENB (posedge WRCLK) (0.976::1.123))
|
||||
(HOLD WREN (posedge WRCLK) (-0.030::-0.026))
|
||||
(SETUP WREN (posedge WRCLK) (0.373::0.430))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "OUT_FIFO_OUT_FIFOOUT_FIFO_D0")
|
||||
(INSTANCE OUT_FIFO)
|
||||
(TIMINGCHECK
|
||||
(HOLD WRCLK (posedge WRCLK) (-0.022::-0.019))
|
||||
(SETUP WRCLK (posedge WRCLK) (0.381::0.438))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "OUT_FIFO_OUT_FIFOOUT_FIFO_D1")
|
||||
(INSTANCE OUT_FIFO)
|
||||
(TIMINGCHECK
|
||||
(HOLD WRCLK (posedge WRCLK) (-0.022::-0.019))
|
||||
(SETUP WRCLK (posedge WRCLK) (0.381::0.438))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "OUT_FIFO_OUT_FIFOOUT_FIFO_D2")
|
||||
(INSTANCE OUT_FIFO)
|
||||
(TIMINGCHECK
|
||||
(HOLD WRCLK (posedge WRCLK) (-0.019::-0.016))
|
||||
(SETUP WRCLK (posedge WRCLK) (0.367::0.422))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "OUT_FIFO_OUT_FIFOOUT_FIFO_D3")
|
||||
(INSTANCE OUT_FIFO)
|
||||
(TIMINGCHECK
|
||||
(HOLD WRCLK (posedge WRCLK) (-0.012::-0.011))
|
||||
(SETUP WRCLK (posedge WRCLK) (0.354::0.408))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "OUT_FIFO_OUT_FIFOOUT_FIFO_D4")
|
||||
(INSTANCE OUT_FIFO)
|
||||
(TIMINGCHECK
|
||||
(HOLD WRCLK (posedge WRCLK) (-0.012::-0.011))
|
||||
(SETUP WRCLK (posedge WRCLK) (0.344::0.395))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "OUT_FIFO_OUT_FIFOOUT_FIFO_D5")
|
||||
(INSTANCE OUT_FIFO)
|
||||
(TIMINGCHECK
|
||||
(HOLD WRCLK (posedge WRCLK) (-0.011::-0.010))
|
||||
(SETUP WRCLK (posedge WRCLK) (0.354::0.408))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "OUT_FIFO_OUT_FIFOOUT_FIFO_D6")
|
||||
(INSTANCE OUT_FIFO)
|
||||
(TIMINGCHECK
|
||||
(HOLD WRCLK (posedge WRCLK) (-0.013::-0.012))
|
||||
(SETUP WRCLK (posedge WRCLK) (0.344::0.395))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "OUT_FIFO_OUT_FIFOOUT_FIFO_D7")
|
||||
(INSTANCE OUT_FIFO)
|
||||
(TIMINGCHECK
|
||||
(HOLD WRCLK (posedge WRCLK) (-0.013::-0.012))
|
||||
(SETUP WRCLK (posedge WRCLK) (0.344::0.395))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "OUT_FIFO_OUT_FIFOOUT_FIFO_D8")
|
||||
(INSTANCE OUT_FIFO)
|
||||
(TIMINGCHECK
|
||||
(HOLD WRCLK (posedge WRCLK) (-0.013::-0.012))
|
||||
(SETUP WRCLK (posedge WRCLK) (0.344::0.395))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "OUT_FIFO_OUT_FIFOOUT_FIFO_D9")
|
||||
(INSTANCE OUT_FIFO)
|
||||
(TIMINGCHECK
|
||||
(HOLD WRCLK (posedge WRCLK) (-0.013::-0.012))
|
||||
(SETUP WRCLK (posedge WRCLK) (0.344::0.395))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "OUT_FIFO_OUT_FIFOOUT_FIFO_SCANIN")
|
||||
(INSTANCE OUT_FIFO)
|
||||
(TIMINGCHECK
|
||||
(HOLD RDCLK (posedge RDCLK) (0.537::0.618))
|
||||
(SETUP RDCLK (posedge RDCLK) (0.976::1.123))
|
||||
(HOLD WRCLK (posedge WRCLK) (0.537::0.618))
|
||||
(SETUP WRCLK (posedge WRCLK) (0.976::1.123))
|
||||
)
|
||||
)
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,272 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
(CELL
|
||||
(CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV")
|
||||
(INSTANCE MMCME2_ADV)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH DCLK DRDY (0.286::0.304)(0.927::0.984))
|
||||
(IOPATH PSCLK PSDONE (0.318::0.338)(0.758::0.805))
|
||||
(IOPATH RST CLKFBSTOPPED (0.348::0.370)(0.549::0.583))
|
||||
(IOPATH RST CLKINSTOPPED (0.348::0.370)(0.549::0.583))
|
||||
(IOPATH RST LOCKED (3.000::3.000)(3.000::3.000))
|
||||
)
|
||||
)
|
||||
(TIMINGCHECK
|
||||
(HOLD DEN (posedge DCLK) (0.000::0.000))
|
||||
(SETUP DEN (posedge DCLK) (2.156::2.290))
|
||||
(HOLD DWE (posedge DCLK) (0.141::0.150))
|
||||
(SETUP DWE (posedge DCLK) (1.527::1.622))
|
||||
(HOLD PSCLK (posedge PSCLK) (0.000::0.000))
|
||||
(SETUP PSCLK (posedge PSCLK) (0.979::1.040))
|
||||
(HOLD PSCLK (posedge PSCLK) (0.000::0.000))
|
||||
(SETUP PSCLK (posedge PSCLK) (0.979::1.040))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_CLKOUT4_CASCADE_FALSE_COMPENSATION_BUF_IN")
|
||||
(INSTANCE MMCME2_ADV)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLKIN1 CLKOUT4 (0.255::-0.260)(0.433::-0.240))
|
||||
(IOPATH CLKIN2 CLKOUT4 (0.255::-0.260)(0.433::-0.240))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_CLKOUT4_CASCADE_FALSE_COMPENSATION_EXTERNAL")
|
||||
(INSTANCE MMCME2_ADV)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLKIN1 CLKOUT4 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT4 (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_CLKOUT4_CASCADE_FALSE_COMPENSATION_INTERNAL")
|
||||
(INSTANCE MMCME2_ADV)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLKIN1 CLKOUT4 (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN2 CLKOUT4 (0.050::0.053)(0.083::0.088))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_CLKOUT4_CASCADE_FALSE_COMPENSATION_ZHOLD")
|
||||
(INSTANCE MMCME2_ADV)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLKIN1 CLKOUT4 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT4 (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_CLKOUT4_CASCADE_TRUE_COMPENSATION_BUF_IN")
|
||||
(INSTANCE MMCME2_ADV)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLKIN1 CLKOUT4 (0.255::-0.260)(0.433::-0.240))
|
||||
(IOPATH CLKIN2 CLKOUT4 (0.255::-0.260)(0.433::-0.240))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_CLKOUT4_CASCADE_TRUE_COMPENSATION_EXTERNAL")
|
||||
(INSTANCE MMCME2_ADV)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLKIN1 CLKOUT4 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT4 (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_CLKOUT4_CASCADE_TRUE_COMPENSATION_INTERNAL")
|
||||
(INSTANCE MMCME2_ADV)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLKIN1 CLKOUT4 (0.263::0.279)(0.492::0.522))
|
||||
(IOPATH CLKIN2 CLKOUT4 (0.263::0.279)(0.492::0.522))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_CLKOUT4_CASCADE_TRUE_COMPENSATION_ZHOLD")
|
||||
(INSTANCE MMCME2_ADV)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLKIN1 CLKOUT4 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT4 (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_COMPENSATION_BUF_IN")
|
||||
(INSTANCE MMCME2_ADV)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLKIN1 CLKFBOUT (0.255::-0.260)(0.433::-0.240))
|
||||
(IOPATH CLKIN1 CLKFBOUTB (0.255::-0.260)(0.433::-0.240))
|
||||
(IOPATH CLKIN1 CLKOUT0 (0.255::-0.260)(0.433::-0.240))
|
||||
(IOPATH CLKIN1 CLKOUT0B (0.255::-0.260)(0.433::-0.240))
|
||||
(IOPATH CLKIN1 CLKOUT1 (0.255::-0.260)(0.433::-0.240))
|
||||
(IOPATH CLKIN1 CLKOUT1B (0.255::-0.260)(0.433::-0.240))
|
||||
(IOPATH CLKIN1 CLKOUT2 (0.255::-0.260)(0.433::-0.240))
|
||||
(IOPATH CLKIN1 CLKOUT2B (0.255::-0.260)(0.433::-0.240))
|
||||
(IOPATH CLKIN1 CLKOUT3 (0.255::-0.260)(0.433::-0.240))
|
||||
(IOPATH CLKIN1 CLKOUT3B (0.255::-0.260)(0.433::-0.240))
|
||||
(IOPATH CLKIN1 CLKOUT5 (0.255::-0.260)(0.433::-0.240))
|
||||
(IOPATH CLKIN1 CLKOUT6 (0.255::-0.260)(0.433::-0.240))
|
||||
(IOPATH CLKIN2 CLKFBOUT (0.255::-0.260)(0.433::-0.240))
|
||||
(IOPATH CLKIN2 CLKFBOUTB (0.255::-0.260)(0.433::-0.240))
|
||||
(IOPATH CLKIN2 CLKOUT0 (0.255::-0.260)(0.433::-0.240))
|
||||
(IOPATH CLKIN2 CLKOUT0B (0.255::-0.260)(0.433::-0.240))
|
||||
(IOPATH CLKIN2 CLKOUT1 (0.255::-0.260)(0.433::-0.240))
|
||||
(IOPATH CLKIN2 CLKOUT1B (0.255::-0.260)(0.433::-0.240))
|
||||
(IOPATH CLKIN2 CLKOUT2 (0.255::-0.260)(0.433::-0.240))
|
||||
(IOPATH CLKIN2 CLKOUT2B (0.255::-0.260)(0.433::-0.240))
|
||||
(IOPATH CLKIN2 CLKOUT3 (0.255::-0.260)(0.433::-0.240))
|
||||
(IOPATH CLKIN2 CLKOUT3B (0.255::-0.260)(0.433::-0.240))
|
||||
(IOPATH CLKIN2 CLKOUT5 (0.255::-0.260)(0.433::-0.240))
|
||||
(IOPATH CLKIN2 CLKOUT6 (0.255::-0.260)(0.433::-0.240))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_COMPENSATION_EXTERNAL")
|
||||
(INSTANCE MMCME2_ADV)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLKIN1 CLKFBOUT (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN1 CLKFBOUTB (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN1 CLKOUT0 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN1 CLKOUT0B (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN1 CLKOUT1 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN1 CLKOUT1B (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN1 CLKOUT2 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN1 CLKOUT2B (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN1 CLKOUT3 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN1 CLKOUT3B (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN1 CLKOUT5 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN1 CLKOUT6 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKFBOUT (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKFBOUTB (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT0 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT0B (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT1 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT1B (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT2 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT2B (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT3 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT3B (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT5 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT6 (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_COMPENSATION_INTERNAL")
|
||||
(INSTANCE MMCME2_ADV)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLKIN1 CLKFBOUT (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN1 CLKFBOUTB (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN1 CLKOUT0 (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN1 CLKOUT0B (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN1 CLKOUT1 (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN1 CLKOUT1B (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN1 CLKOUT2 (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN1 CLKOUT2B (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN1 CLKOUT3 (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN1 CLKOUT3B (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN1 CLKOUT5 (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN1 CLKOUT6 (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN2 CLKFBOUT (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN2 CLKFBOUTB (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN2 CLKOUT0 (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN2 CLKOUT0B (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN2 CLKOUT1 (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN2 CLKOUT1B (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN2 CLKOUT2 (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN2 CLKOUT2B (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN2 CLKOUT3 (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN2 CLKOUT3B (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN2 CLKOUT5 (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN2 CLKOUT6 (0.050::0.053)(0.083::0.088))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_COMPENSATION_ZHOLD")
|
||||
(INSTANCE MMCME2_ADV)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLKIN1 CLKFBOUT (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN1 CLKFBOUTB (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN1 CLKOUT0 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN1 CLKOUT0B (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN1 CLKOUT1 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN1 CLKOUT1B (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN1 CLKOUT2 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN1 CLKOUT2B (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN1 CLKOUT3 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN1 CLKOUT3B (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN1 CLKOUT5 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN1 CLKOUT6 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKFBOUT (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKFBOUTB (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT0 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT0B (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT1 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT1B (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT2 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT2B (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT3 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT3B (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT5 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT6 (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_DADDR")
|
||||
(INSTANCE MMCME2_ADV)
|
||||
(TIMINGCHECK
|
||||
(HOLD DCLK (posedge DCLK) (0.141::0.150))
|
||||
(SETUP DCLK (posedge DCLK) (1.527::1.622))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_DI")
|
||||
(INSTANCE MMCME2_ADV)
|
||||
(TIMINGCHECK
|
||||
(HOLD DCLK (posedge DCLK) (0.141::0.150))
|
||||
(SETUP DCLK (posedge DCLK) (1.527::1.622))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_TMUX_MUX_SEL_00")
|
||||
(INSTANCE MMCME2_ADV)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLKIN1 TMUXOUT (0.527::0.560)(0.979::1.040))
|
||||
(IOPATH CLKIN2 TMUXOUT (0.527::0.560)(0.979::1.040))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "MMCME2_ADV_MMCME2_ADVMMCME2_ADV_TMUX_MUX_SEL_01")
|
||||
(INSTANCE MMCME2_ADV)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLKFBIN TMUXOUT (0.527::0.560)(0.979::1.040))
|
||||
)
|
||||
)
|
||||
)
|
||||
)
|
||||
|
|
@ -0,0 +1,531 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_IN_PHY_PHASER_IN_PHYPHASER_IN_OUTPUT_CLK_SRC_DELAYED_MEM_REF")
|
||||
(INSTANCE PHASER_IN_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK ICLKDIV (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_IN_PHY_PHASER_IN_PHYPHASER_IN_OUTPUT_CLK_SRC_DELAYED_PHASE_REF")
|
||||
(INSTANCE PHASER_IN_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK ICLKDIV (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_IN_PHY_PHASER_IN_PHYPHASER_IN_OUTPUT_CLK_SRC_DELAYED_REF")
|
||||
(INSTANCE PHASER_IN_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH FREQREFCLK ICLKDIV (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_IN_PHY_PHASER_IN_PHYPHASER_IN_OUTPUT_CLK_SRC_FREQ_REF")
|
||||
(INSTANCE PHASER_IN_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH FREQREFCLK ICLKDIV (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_IN_PHY_PHASER_IN_PHYPHASER_IN_OUTPUT_CLK_SRC_MEM_REF")
|
||||
(INSTANCE PHASER_IN_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK ICLKDIV (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_IN_PHY_PHASER_IN_PHYPHASER_IN_OUTPUT_CLK_SRC_PHASE_REF")
|
||||
(INSTANCE PHASER_IN_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK ICLKDIV (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_IN_PHY_PHASER_IN_PHYPHASER_IN_PHY")
|
||||
(INSTANCE PHASER_IN_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK DQSFOUND (0.204::0.217)(0.379::0.402))
|
||||
(IOPATH RST DQSOUTOFRANGE (0.094::0.100)(0.186::0.198))
|
||||
(IOPATH RST PHASELOCKED (0.094::0.100)(0.186::0.198))
|
||||
(IOPATH SCANCLK SCANOUT (0.094::0.100)(0.186::0.198))
|
||||
(IOPATH SYSCLK FINEOVERFLOW (0.344::0.365)(0.667::0.708))
|
||||
(IOPATH SYSCLK STG1OVERFLOW (0.230::0.244)(0.431::0.458))
|
||||
)
|
||||
)
|
||||
(TIMINGCHECK
|
||||
(HOLD BURSTPENDING (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP BURSTPENDING (posedge SYSCLK) (0.040::0.042))
|
||||
(HOLD COUNTERLOADEN (posedge SYSCLK) (0.050::0.053))
|
||||
(SETUP COUNTERLOADEN (posedge SYSCLK) (0.099::0.105))
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.050::0.053))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.095::0.101))
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.091::0.097))
|
||||
(HOLD EDGEADV (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP EDGEADV (posedge SYSCLK) (0.028::0.030))
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.170::0.180))
|
||||
(HOLD ENSTG1ADJUSTB (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP ENSTG1ADJUSTB (posedge SYSCLK) (0.227::0.241))
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.050::0.053))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.072::0.076))
|
||||
(HOLD FINEINC (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP FINEINC (posedge SYSCLK) (0.057::0.061))
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.156::0.166))
|
||||
(HOLD SCANCLK (posedge SCANCLK) (0.000::0.000))
|
||||
(SETUP SCANCLK (posedge SCANCLK) (0.212::0.225))
|
||||
(HOLD SCANCLK (posedge SCANCLK) (0.000::0.000))
|
||||
(SETUP SCANCLK (posedge SCANCLK) (0.030::0.032))
|
||||
(HOLD SCANCLK (posedge SCANCLK) (0.000::0.000))
|
||||
(SETUP SCANCLK (posedge SCANCLK) (0.526::0.559))
|
||||
(HOLD SELCALORSTG1 (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP SELCALORSTG1 (posedge SYSCLK) (0.046::0.049))
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.227::0.241))
|
||||
(HOLD STG1LOAD (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP STG1LOAD (posedge SYSCLK) (0.218::0.232))
|
||||
(HOLD STG1READ (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP STG1READ (posedge SYSCLK) (0.154::0.164))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_IN_PHY_PHASER_IN_PHYPHASER_IN_PHY_COUNTERLOADVAL")
|
||||
(INSTANCE PHASER_IN_PHY)
|
||||
(TIMINGCHECK
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.067::0.071))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_IN_PHY_PHASER_IN_PHYPHASER_IN_PHY_ENCALIB")
|
||||
(INSTANCE PHASER_IN_PHY)
|
||||
(TIMINGCHECK
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.217::0.230))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_IN_PHY_PHASER_IN_PHYPHASER_IN_PHY_OUTPUT_CLK_SRC_DELAYED_MEM_REF")
|
||||
(INSTANCE PHASER_IN_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK ICLK (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH MEMREFCLK ICLKDIV (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH MEMREFCLK ISERDESRST (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH MEMREFCLK RCLK (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH MEMREFCLK WRENABLE (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_IN_PHY_PHASER_IN_PHYPHASER_IN_PHY_OUTPUT_CLK_SRC_DELAYED_PHASE_REF")
|
||||
(INSTANCE PHASER_IN_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK ICLK (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH PHASEREFCLK ICLKDIV (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH PHASEREFCLK ISERDESRST (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH PHASEREFCLK RCLK (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH PHASEREFCLK WRENABLE (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_IN_PHY_PHASER_IN_PHYPHASER_IN_PHY_OUTPUT_CLK_SRC_DELAYED_REF")
|
||||
(INSTANCE PHASER_IN_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH FREQREFCLK ICLK (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH FREQREFCLK ICLKDIV (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH FREQREFCLK ISERDESRST (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH FREQREFCLK RCLK (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH FREQREFCLK WRENABLE (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_IN_PHY_PHASER_IN_PHYPHASER_IN_PHY_OUTPUT_CLK_SRC_FREQ_REF")
|
||||
(INSTANCE PHASER_IN_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH FREQREFCLK ICLK (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH FREQREFCLK ICLKDIV (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH FREQREFCLK RCLK (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_IN_PHY_PHASER_IN_PHYPHASER_IN_PHY_OUTPUT_CLK_SRC_MEM_REF")
|
||||
(INSTANCE PHASER_IN_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK ICLK (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH MEMREFCLK ICLKDIV (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH MEMREFCLK RCLK (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_IN_PHY_PHASER_IN_PHYPHASER_IN_PHY_OUTPUT_CLK_SRC_PHASE_REF")
|
||||
(INSTANCE PHASER_IN_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK ICLK (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH PHASEREFCLK ICLKDIV (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH PHASEREFCLK RCLK (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_IN_PHY_PHASER_IN_PHYPHASER_IN_PHY_RANKSEL")
|
||||
(INSTANCE PHASER_IN_PHY)
|
||||
(TIMINGCHECK
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.228::0.242))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_IN_PHY_PHASER_IN_PHYPHASER_IN_PHY_STG1REGL")
|
||||
(INSTANCE PHASER_IN_PHY)
|
||||
(TIMINGCHECK
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.218::0.231))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_COARSE_BYPASS_FALSE_OCLKDELAY_INV_FALSE_OUTPUT_CLK_SRC_DELAYED_PHASE_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK OCLKDELAYED (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_COARSE_BYPASS_FALSE_OCLKDELAY_INV_FALSE_OUTPUT_CLK_SRC_DELAYED_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK OCLKDELAYED (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_COARSE_BYPASS_FALSE_OCLKDELAY_INV_TRUE_OUTPUT_CLK_SRC_DELAYED_PHASE_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK OCLKDELAYED (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_COARSE_BYPASS_FALSE_OCLKDELAY_INV_TRUE_OUTPUT_CLK_SRC_DELAYED_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK OCLKDELAYED (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_COARSE_BYPASS_FALSE_OUTPUT_CLK_SRC_DELAYED_PHASE_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK OCLKDIV (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_COARSE_BYPASS_FALSE_OUTPUT_CLK_SRC_DELAYED_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK OCLKDIV (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_COARSE_BYPASS_TRUE_OCLKDELAY_INV_FALSE_OUTPUT_CLK_SRC_DELAYED_PHASE_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK OCLKDELAYED (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_COARSE_BYPASS_TRUE_OCLKDELAY_INV_FALSE_OUTPUT_CLK_SRC_DELAYED_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK OCLKDELAYED (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_COARSE_BYPASS_TRUE_OCLKDELAY_INV_TRUE_OUTPUT_CLK_SRC_DELAYED_PHASE_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK OCLKDELAYED (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_COARSE_BYPASS_TRUE_OCLKDELAY_INV_TRUE_OUTPUT_CLK_SRC_DELAYED_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK OCLKDELAYED (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_COARSE_BYPASS_TRUE_OUTPUT_CLK_SRC_DELAYED_PHASE_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK OCLKDIV (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_COARSE_BYPASS_TRUE_OUTPUT_CLK_SRC_DELAYED_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK OCLKDIV (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_OUTPUT_CLK_SRC_FREQ_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK OCLKDIV (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_OUTPUT_CLK_SRC_PHASE_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK OCLKDIV (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_PHY")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH SCANCLK SCANOUT (0.094::0.100)(0.186::0.198))
|
||||
(IOPATH SYSCLK COARSEOVERFLOW (0.143::0.152)(0.274::0.291))
|
||||
(IOPATH SYSCLK FINEOVERFLOW (0.182::0.193)(0.337::0.358))
|
||||
)
|
||||
)
|
||||
(TIMINGCHECK
|
||||
(HOLD BURSTPENDING (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP BURSTPENDING (posedge SYSCLK) (0.126::0.134))
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.050::0.053))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.114::0.121))
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.133::0.141))
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.050::0.053))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.099::0.105))
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.050::0.053))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.073::0.077))
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.027::0.029))
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.050::0.053))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.169::0.179))
|
||||
(HOLD FINEINC (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP FINEINC (posedge SYSCLK) (0.050::0.053))
|
||||
(HOLD SCANCLK (posedge SCANCLK) (0.000::0.000))
|
||||
(SETUP SCANCLK (posedge SCANCLK) (0.488::0.518))
|
||||
(HOLD SCANCLK (posedge SCANCLK) (0.000::0.000))
|
||||
(SETUP SCANCLK (posedge SCANCLK) (0.194::0.206))
|
||||
(HOLD SCANCLK (posedge SCANCLK) (0.000::0.000))
|
||||
(SETUP SCANCLK (posedge SCANCLK) (0.966::1.026))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_PHY_COARSE_BYPASS_FALSE_OCLKDELAY_INV_FALSE_OUTPUT_CLK_SRC_DELAYED_PHASE_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK OCLKDELAYED (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_PHY_COARSE_BYPASS_FALSE_OCLKDELAY_INV_FALSE_OUTPUT_CLK_SRC_DELAYED_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK OCLKDELAYED (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_PHY_COARSE_BYPASS_FALSE_OCLKDELAY_INV_TRUE_OUTPUT_CLK_SRC_DELAYED_PHASE_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK OCLKDELAYED (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_PHY_COARSE_BYPASS_FALSE_OCLKDELAY_INV_TRUE_OUTPUT_CLK_SRC_DELAYED_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK OCLKDELAYED (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_PHY_COARSE_BYPASS_FALSE_OUTPUT_CLK_SRC_DELAYED_PHASE_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK OCLK (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH PHASEREFCLK OCLKDIV (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH PHASEREFCLK OSERDESRST (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH PHASEREFCLK RDENABLE (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_PHY_COARSE_BYPASS_FALSE_OUTPUT_CLK_SRC_DELAYED_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK OCLK (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH MEMREFCLK OCLKDIV (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH MEMREFCLK OSERDESRST (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH MEMREFCLK RDENABLE (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_PHY_COARSE_BYPASS_TRUE_OCLKDELAY_INV_FALSE_OUTPUT_CLK_SRC_DELAYED_PHASE_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK OCLKDELAYED (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_PHY_COARSE_BYPASS_TRUE_OCLKDELAY_INV_FALSE_OUTPUT_CLK_SRC_DELAYED_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK OCLKDELAYED (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_PHY_COARSE_BYPASS_TRUE_OCLKDELAY_INV_TRUE_OUTPUT_CLK_SRC_DELAYED_PHASE_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK OCLKDELAYED (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_PHY_COARSE_BYPASS_TRUE_OCLKDELAY_INV_TRUE_OUTPUT_CLK_SRC_DELAYED_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK OCLKDELAYED (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_PHY_COARSE_BYPASS_TRUE_OUTPUT_CLK_SRC_DELAYED_PHASE_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK OCLK (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH PHASEREFCLK OCLKDIV (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH PHASEREFCLK OSERDESRST (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH PHASEREFCLK RDENABLE (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_PHY_COARSE_BYPASS_TRUE_OUTPUT_CLK_SRC_DELAYED_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK OCLK (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH MEMREFCLK OCLKDIV (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH MEMREFCLK OSERDESRST (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH MEMREFCLK RDENABLE (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_PHY_COUNTERLOADVAL")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(TIMINGCHECK
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.168::0.178))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_PHY_ENCALIB")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(TIMINGCHECK
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.176::0.187))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_PHY_OUTPUT_CLK_SRC_FREQ_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK OCLK (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH MEMREFCLK OCLKDIV (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_PHY_OUTPUT_CLK_SRC_PHASE_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK OCLK (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH PHASEREFCLK OCLKDIV (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
)
|
||||
|
|
@ -0,0 +1,575 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_IN_PHY_PHASER_IN_PHYPHASER_IN_OUTPUT_CLK_SRC_DELAYED_MEM_REF")
|
||||
(INSTANCE PHASER_IN_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK ICLKDIV (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_IN_PHY_PHASER_IN_PHYPHASER_IN_OUTPUT_CLK_SRC_DELAYED_PHASE_REF")
|
||||
(INSTANCE PHASER_IN_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK ICLKDIV (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_IN_PHY_PHASER_IN_PHYPHASER_IN_OUTPUT_CLK_SRC_DELAYED_REF")
|
||||
(INSTANCE PHASER_IN_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH FREQREFCLK ICLKDIV (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_IN_PHY_PHASER_IN_PHYPHASER_IN_OUTPUT_CLK_SRC_FREQ_REF")
|
||||
(INSTANCE PHASER_IN_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH FREQREFCLK ICLKDIV (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_IN_PHY_PHASER_IN_PHYPHASER_IN_OUTPUT_CLK_SRC_MEM_REF")
|
||||
(INSTANCE PHASER_IN_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK ICLKDIV (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_IN_PHY_PHASER_IN_PHYPHASER_IN_OUTPUT_CLK_SRC_PHASE_REF")
|
||||
(INSTANCE PHASER_IN_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK ICLKDIV (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_IN_PHY_PHASER_IN_PHYPHASER_IN_PHY")
|
||||
(INSTANCE PHASER_IN_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK DQSFOUND (0.204::0.217)(0.379::0.402))
|
||||
(IOPATH RST DQSOUTOFRANGE (0.094::0.100)(0.186::0.198))
|
||||
(IOPATH RST PHASELOCKED (0.094::0.100)(0.186::0.198))
|
||||
(IOPATH SCANCLK SCANOUT (0.094::0.100)(0.186::0.198))
|
||||
(IOPATH SYSCLK FINEOVERFLOW (0.344::0.365)(0.667::0.708))
|
||||
(IOPATH SYSCLK STG1OVERFLOW (0.230::0.244)(0.431::0.458))
|
||||
)
|
||||
)
|
||||
(TIMINGCHECK
|
||||
(HOLD BURSTPENDING (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP BURSTPENDING (posedge SYSCLK) (0.040::0.042))
|
||||
(HOLD COUNTERLOADEN (posedge SYSCLK) (0.050::0.053))
|
||||
(SETUP COUNTERLOADEN (posedge SYSCLK) (0.099::0.105))
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.050::0.053))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.095::0.101))
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.091::0.097))
|
||||
(HOLD EDGEADV (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP EDGEADV (posedge SYSCLK) (0.028::0.030))
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.170::0.180))
|
||||
(HOLD ENSTG1ADJUSTB (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP ENSTG1ADJUSTB (posedge SYSCLK) (0.227::0.241))
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.050::0.053))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.072::0.076))
|
||||
(HOLD FINEINC (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP FINEINC (posedge SYSCLK) (0.057::0.061))
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.156::0.166))
|
||||
(HOLD SCANCLK (posedge SCANCLK) (0.000::0.000))
|
||||
(SETUP SCANCLK (posedge SCANCLK) (0.212::0.225))
|
||||
(HOLD SCANCLK (posedge SCANCLK) (0.000::0.000))
|
||||
(SETUP SCANCLK (posedge SCANCLK) (0.030::0.032))
|
||||
(HOLD SCANCLK (posedge SCANCLK) (0.000::0.000))
|
||||
(SETUP SCANCLK (posedge SCANCLK) (0.526::0.559))
|
||||
(HOLD SELCALORSTG1 (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP SELCALORSTG1 (posedge SYSCLK) (0.046::0.049))
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.227::0.241))
|
||||
(HOLD STG1LOAD (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP STG1LOAD (posedge SYSCLK) (0.218::0.232))
|
||||
(HOLD STG1READ (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP STG1READ (posedge SYSCLK) (0.154::0.164))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_IN_PHY_PHASER_IN_PHYPHASER_IN_PHY_COUNTERLOADVAL")
|
||||
(INSTANCE PHASER_IN_PHY)
|
||||
(TIMINGCHECK
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.067::0.071))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_IN_PHY_PHASER_IN_PHYPHASER_IN_PHY_ENCALIB")
|
||||
(INSTANCE PHASER_IN_PHY)
|
||||
(TIMINGCHECK
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.217::0.230))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_IN_PHY_PHASER_IN_PHYPHASER_IN_PHY_OUTPUT_CLK_SRC_DELAYED_MEM_REF")
|
||||
(INSTANCE PHASER_IN_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK ICLK (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH MEMREFCLK ICLKDIV (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH MEMREFCLK ISERDESRST (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH MEMREFCLK RCLK (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH MEMREFCLK WRENABLE (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_IN_PHY_PHASER_IN_PHYPHASER_IN_PHY_OUTPUT_CLK_SRC_DELAYED_PHASE_REF")
|
||||
(INSTANCE PHASER_IN_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK ICLK (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH PHASEREFCLK ICLKDIV (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH PHASEREFCLK ISERDESRST (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH PHASEREFCLK RCLK (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH PHASEREFCLK WRENABLE (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_IN_PHY_PHASER_IN_PHYPHASER_IN_PHY_OUTPUT_CLK_SRC_DELAYED_REF")
|
||||
(INSTANCE PHASER_IN_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH FREQREFCLK ICLK (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH FREQREFCLK ICLKDIV (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH FREQREFCLK ISERDESRST (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH FREQREFCLK RCLK (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH FREQREFCLK WRENABLE (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_IN_PHY_PHASER_IN_PHYPHASER_IN_PHY_OUTPUT_CLK_SRC_FREQ_REF")
|
||||
(INSTANCE PHASER_IN_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH FREQREFCLK ICLK (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH FREQREFCLK ICLKDIV (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH FREQREFCLK RCLK (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_IN_PHY_PHASER_IN_PHYPHASER_IN_PHY_OUTPUT_CLK_SRC_MEM_REF")
|
||||
(INSTANCE PHASER_IN_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK ICLK (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH MEMREFCLK ICLKDIV (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH MEMREFCLK RCLK (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_IN_PHY_PHASER_IN_PHYPHASER_IN_PHY_OUTPUT_CLK_SRC_PHASE_REF")
|
||||
(INSTANCE PHASER_IN_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK ICLK (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH PHASEREFCLK ICLKDIV (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH PHASEREFCLK RCLK (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_IN_PHY_PHASER_IN_PHYPHASER_IN_PHY_RANKSEL")
|
||||
(INSTANCE PHASER_IN_PHY)
|
||||
(TIMINGCHECK
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.228::0.242))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_IN_PHY_PHASER_IN_PHYPHASER_IN_PHY_STG1REGL")
|
||||
(INSTANCE PHASER_IN_PHY)
|
||||
(TIMINGCHECK
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.218::0.231))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_COARSE_BYPASS_FALSE_OCLKDELAY_INV_FALSE_OUTPUT_CLK_SRC_DELAYED_PHASE_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK OCLKDELAYED (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_COARSE_BYPASS_FALSE_OCLKDELAY_INV_FALSE_OUTPUT_CLK_SRC_DELAYED_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK OCLKDELAYED (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_COARSE_BYPASS_FALSE_OCLKDELAY_INV_TRUE_OUTPUT_CLK_SRC_DELAYED_PHASE_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK OCLKDELAYED (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_COARSE_BYPASS_FALSE_OCLKDELAY_INV_TRUE_OUTPUT_CLK_SRC_DELAYED_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK OCLKDELAYED (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_COARSE_BYPASS_FALSE_OUTPUT_CLK_SRC_DELAYED_PHASE_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK OCLKDIV (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_COARSE_BYPASS_FALSE_OUTPUT_CLK_SRC_DELAYED_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK OCLKDIV (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_COARSE_BYPASS_TRUE_OCLKDELAY_INV_FALSE_OUTPUT_CLK_SRC_DELAYED_PHASE_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK OCLKDELAYED (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_COARSE_BYPASS_TRUE_OCLKDELAY_INV_FALSE_OUTPUT_CLK_SRC_DELAYED_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK OCLKDELAYED (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_COARSE_BYPASS_TRUE_OCLKDELAY_INV_TRUE_OUTPUT_CLK_SRC_DELAYED_PHASE_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK OCLKDELAYED (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_COARSE_BYPASS_TRUE_OCLKDELAY_INV_TRUE_OUTPUT_CLK_SRC_DELAYED_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK OCLKDELAYED (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_COARSE_BYPASS_TRUE_OUTPUT_CLK_SRC_DELAYED_PHASE_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK OCLKDIV (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_COARSE_BYPASS_TRUE_OUTPUT_CLK_SRC_DELAYED_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK OCLKDIV (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_OUTPUT_CLK_SRC_FREQ_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK OCLKDIV (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_OUTPUT_CLK_SRC_PHASE_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK OCLKDIV (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_PHY")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH SCANCLK SCANOUT (0.094::0.100)(0.186::0.198))
|
||||
(IOPATH SYSCLK COARSEOVERFLOW (0.143::0.152)(0.274::0.291))
|
||||
(IOPATH SYSCLK FINEOVERFLOW (0.182::0.193)(0.337::0.358))
|
||||
)
|
||||
)
|
||||
(TIMINGCHECK
|
||||
(HOLD BURSTPENDING (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP BURSTPENDING (posedge SYSCLK) (0.126::0.134))
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.050::0.053))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.114::0.121))
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.133::0.141))
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.050::0.053))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.099::0.105))
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.050::0.053))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.073::0.077))
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.027::0.029))
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.050::0.053))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.169::0.179))
|
||||
(HOLD FINEINC (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP FINEINC (posedge SYSCLK) (0.050::0.053))
|
||||
(HOLD SCANCLK (posedge SCANCLK) (0.000::0.000))
|
||||
(SETUP SCANCLK (posedge SCANCLK) (0.488::0.518))
|
||||
(HOLD SCANCLK (posedge SCANCLK) (0.000::0.000))
|
||||
(SETUP SCANCLK (posedge SCANCLK) (0.194::0.206))
|
||||
(HOLD SCANCLK (posedge SCANCLK) (0.000::0.000))
|
||||
(SETUP SCANCLK (posedge SCANCLK) (0.966::1.026))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_PHY_COARSE_BYPASS_FALSE_OCLKDELAY_INV_FALSE_OUTPUT_CLK_SRC_DELAYED_PHASE_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK OCLKDELAYED (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_PHY_COARSE_BYPASS_FALSE_OCLKDELAY_INV_FALSE_OUTPUT_CLK_SRC_DELAYED_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK OCLKDELAYED (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_PHY_COARSE_BYPASS_FALSE_OCLKDELAY_INV_TRUE_OUTPUT_CLK_SRC_DELAYED_PHASE_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK OCLKDELAYED (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_PHY_COARSE_BYPASS_FALSE_OCLKDELAY_INV_TRUE_OUTPUT_CLK_SRC_DELAYED_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK OCLKDELAYED (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_PHY_COARSE_BYPASS_FALSE_OUTPUT_CLK_SRC_DELAYED_PHASE_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK OCLK (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH PHASEREFCLK OCLKDIV (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH PHASEREFCLK OSERDESRST (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH PHASEREFCLK RDENABLE (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_PHY_COARSE_BYPASS_FALSE_OUTPUT_CLK_SRC_DELAYED_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK OCLK (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH MEMREFCLK OCLKDIV (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH MEMREFCLK OSERDESRST (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH MEMREFCLK RDENABLE (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_PHY_COARSE_BYPASS_TRUE_OCLKDELAY_INV_FALSE_OUTPUT_CLK_SRC_DELAYED_PHASE_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK OCLKDELAYED (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_PHY_COARSE_BYPASS_TRUE_OCLKDELAY_INV_FALSE_OUTPUT_CLK_SRC_DELAYED_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK OCLKDELAYED (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_PHY_COARSE_BYPASS_TRUE_OCLKDELAY_INV_TRUE_OUTPUT_CLK_SRC_DELAYED_PHASE_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK OCLKDELAYED (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_PHY_COARSE_BYPASS_TRUE_OCLKDELAY_INV_TRUE_OUTPUT_CLK_SRC_DELAYED_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK OCLKDELAYED (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_PHY_COARSE_BYPASS_TRUE_OUTPUT_CLK_SRC_DELAYED_PHASE_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK OCLK (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH PHASEREFCLK OCLKDIV (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH PHASEREFCLK OSERDESRST (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH PHASEREFCLK RDENABLE (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_PHY_COARSE_BYPASS_TRUE_OUTPUT_CLK_SRC_DELAYED_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK OCLK (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH MEMREFCLK OCLKDIV (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH MEMREFCLK OSERDESRST (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH MEMREFCLK RDENABLE (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_PHY_COUNTERLOADVAL")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(TIMINGCHECK
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.168::0.178))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_PHY_ENCALIB")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(TIMINGCHECK
|
||||
(HOLD SYSCLK (posedge SYSCLK) (0.000::0.000))
|
||||
(SETUP SYSCLK (posedge SYSCLK) (0.176::0.187))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_PHY_OUTPUT_CLK_SRC_FREQ_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK OCLK (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH MEMREFCLK OCLKDIV (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHASER_OUT_PHY_PHASER_OUT_PHYPHASER_OUT_PHY_OUTPUT_CLK_SRC_PHASE_REF")
|
||||
(INSTANCE PHASER_OUT_PHY)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH PHASEREFCLK OCLK (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH PHASEREFCLK OCLKDIV (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHY_CONTROL_PHY_CONTROLPHY_CONTROL")
|
||||
(INSTANCE PHY_CONTROL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH MEMREFCLK PHYCTLEMPTY (0.313::0.360)(0.541::0.622))
|
||||
(IOPATH PHYCLK PHYCTLALMOSTFULL (0.158::0.182)(0.338::0.389))
|
||||
(IOPATH PHYCLK PHYCTLFULL (0.151::0.174)(0.321::0.369))
|
||||
(IOPATH PHYCLK PHYCTLREADY (0.174::0.200)(0.368::0.423))
|
||||
)
|
||||
)
|
||||
(TIMINGCHECK
|
||||
(HOLD MEMREFCLK (posedge MEMREFCLK) (0.203::0.233))
|
||||
(SETUP MEMREFCLK (posedge MEMREFCLK) (0.010::0.011))
|
||||
(HOLD PHYCLK (posedge PHYCLK) (0.049::0.056))
|
||||
(SETUP PHYCLK (posedge PHYCLK) (0.327::0.376))
|
||||
(HOLD MEMREFCLK (posedge MEMREFCLK) (0.151::0.174))
|
||||
(SETUP MEMREFCLK (posedge MEMREFCLK) (0.158::0.182))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHY_CONTROL_PHY_CONTROLPHY_CONTROL_PHYCTLWD")
|
||||
(INSTANCE PHY_CONTROL)
|
||||
(TIMINGCHECK
|
||||
(HOLD PHYCLK (posedge PHYCLK) (0.172::0.198))
|
||||
(SETUP PHYCLK (posedge PHYCLK) (0.215::0.248))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHY_CONTROL_PHY_CONTROLPHY_CONTROL_TESTINPUT")
|
||||
(INSTANCE PHY_CONTROL)
|
||||
(TIMINGCHECK
|
||||
(HOLD MEMREFCLK (posedge MEMREFCLK) (0.049::0.056))
|
||||
(SETUP MEMREFCLK (posedge MEMREFCLK) (0.244::0.281))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PHY_CONTROL_PHY_CONTROLPHY_CONTROL_TESTSELECT")
|
||||
(INSTANCE PHY_CONTROL)
|
||||
(TIMINGCHECK
|
||||
(HOLD MEMREFCLK (posedge MEMREFCLK) (0.049::0.056))
|
||||
(SETUP MEMREFCLK (posedge MEMREFCLK) (0.244::0.281))
|
||||
)
|
||||
)
|
||||
)
|
||||
|
|
@ -0,0 +1,145 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
(CELL
|
||||
(CELLTYPE "PLLE2_ADV_PLLE2_ADVPLLE2_ADV")
|
||||
(INSTANCE PLLE2_ADV)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH DCLK DRDY (0.286::0.304)(0.927::0.984))
|
||||
(IOPATH RST LOCKED (3.000::3.000)(3.000::3.000))
|
||||
)
|
||||
)
|
||||
(TIMINGCHECK
|
||||
(HOLD DEN (posedge DCLK) (0.000::0.000))
|
||||
(SETUP DEN (posedge DCLK) (2.156::2.290))
|
||||
(HOLD DWE (posedge DCLK) (0.141::0.150))
|
||||
(SETUP DWE (posedge DCLK) (1.527::1.622))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PLLE2_ADV_PLLE2_ADVPLLE2_ADV_COMPENSATION_BUF_IN")
|
||||
(INSTANCE PLLE2_ADV)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLKIN1 CLKFBOUT (0.144::-0.210)(0.360::-0.140))
|
||||
(IOPATH CLKIN1 CLKOUT0 (0.144::-0.210)(0.360::-0.140))
|
||||
(IOPATH CLKIN1 CLKOUT1 (0.144::-0.210)(0.360::-0.140))
|
||||
(IOPATH CLKIN1 CLKOUT2 (0.144::-0.210)(0.360::-0.140))
|
||||
(IOPATH CLKIN1 CLKOUT3 (0.144::-0.210)(0.360::-0.140))
|
||||
(IOPATH CLKIN1 CLKOUT4 (0.144::-0.210)(0.360::-0.140))
|
||||
(IOPATH CLKIN1 CLKOUT5 (0.144::-0.210)(0.360::-0.140))
|
||||
(IOPATH CLKIN2 CLKFBOUT (0.144::-0.210)(0.360::-0.140))
|
||||
(IOPATH CLKIN2 CLKOUT0 (0.144::-0.210)(0.360::-0.140))
|
||||
(IOPATH CLKIN2 CLKOUT1 (0.144::-0.210)(0.360::-0.140))
|
||||
(IOPATH CLKIN2 CLKOUT2 (0.144::-0.210)(0.360::-0.140))
|
||||
(IOPATH CLKIN2 CLKOUT3 (0.144::-0.210)(0.360::-0.140))
|
||||
(IOPATH CLKIN2 CLKOUT4 (0.144::-0.210)(0.360::-0.140))
|
||||
(IOPATH CLKIN2 CLKOUT5 (0.144::-0.210)(0.360::-0.140))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PLLE2_ADV_PLLE2_ADVPLLE2_ADV_COMPENSATION_EXTERNAL")
|
||||
(INSTANCE PLLE2_ADV)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLKIN1 CLKFBOUT (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN1 CLKOUT0 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN1 CLKOUT1 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN1 CLKOUT2 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN1 CLKOUT3 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN1 CLKOUT4 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN1 CLKOUT5 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKFBOUT (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT0 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT1 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT2 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT3 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT4 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT5 (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PLLE2_ADV_PLLE2_ADVPLLE2_ADV_COMPENSATION_INTERNAL")
|
||||
(INSTANCE PLLE2_ADV)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLKIN1 CLKFBOUT (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN1 CLKOUT0 (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN1 CLKOUT1 (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN1 CLKOUT2 (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN1 CLKOUT3 (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN1 CLKOUT4 (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN1 CLKOUT5 (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN2 CLKFBOUT (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN2 CLKOUT0 (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN2 CLKOUT1 (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN2 CLKOUT2 (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN2 CLKOUT3 (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN2 CLKOUT4 (0.050::0.053)(0.083::0.088))
|
||||
(IOPATH CLKIN2 CLKOUT5 (0.050::0.053)(0.083::0.088))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PLLE2_ADV_PLLE2_ADVPLLE2_ADV_COMPENSATION_ZHOLD")
|
||||
(INSTANCE PLLE2_ADV)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLKIN1 CLKFBOUT (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN1 CLKOUT0 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN1 CLKOUT1 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN1 CLKOUT2 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN1 CLKOUT3 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN1 CLKOUT4 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN1 CLKOUT5 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKFBOUT (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT0 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT1 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT2 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT3 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT4 (0.000::0.000)(0.000::0.000))
|
||||
(IOPATH CLKIN2 CLKOUT5 (0.000::0.000)(0.000::0.000))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PLLE2_ADV_PLLE2_ADVPLLE2_ADV_DADDR")
|
||||
(INSTANCE PLLE2_ADV)
|
||||
(TIMINGCHECK
|
||||
(HOLD DCLK (posedge DCLK) (0.141::0.150))
|
||||
(SETUP DCLK (posedge DCLK) (1.527::1.622))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PLLE2_ADV_PLLE2_ADVPLLE2_ADV_DI")
|
||||
(INSTANCE PLLE2_ADV)
|
||||
(TIMINGCHECK
|
||||
(HOLD DCLK (posedge DCLK) (0.141::0.150))
|
||||
(SETUP DCLK (posedge DCLK) (1.527::1.622))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PLLE2_ADV_PLLE2_ADVPLLE2_ADV_TMUX_MUX_SEL_00")
|
||||
(INSTANCE PLLE2_ADV)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLKIN1 TMUXOUT (0.527::0.560)(0.979::1.040))
|
||||
(IOPATH CLKIN2 TMUXOUT (0.527::0.560)(0.979::1.040))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "PLLE2_ADV_PLLE2_ADVPLLE2_ADV_TMUX_MUX_SEL_01")
|
||||
(INSTANCE PLLE2_ADV)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLKFBIN TMUXOUT (0.527::0.560)(0.979::1.040))
|
||||
)
|
||||
)
|
||||
)
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,31 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
(CELL
|
||||
(CELLTYPE "BUFMRCE")
|
||||
(INSTANCE BUFMRCE)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH I O (0.033::0.035)(0.097::0.103))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "BUFMRCE_CE_TYPE_SYNC_INIT_OUT_0")
|
||||
(INSTANCE BUFMRCE)
|
||||
(TIMINGCHECK
|
||||
(HOLD CE (posedge I) (0.192::0.229))
|
||||
(SETUP CE (posedge I) (0.167::0.209))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "BUFMRCE_CE_TYPE_SYNC_INIT_OUT_1")
|
||||
(INSTANCE BUFMRCE)
|
||||
(TIMINGCHECK
|
||||
(HOLD CE (posedge I) (0.192::0.229))
|
||||
(SETUP CE (posedge I) (0.167::0.209))
|
||||
)
|
||||
)
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,123 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
(CELL
|
||||
(CELLTYPE "BUFIO_DELAY_BYPASS_FALSE")
|
||||
(INSTANCE BUFIO)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH I O (0.483::0.516)(1.431::1.609))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "BUFIO_DELAY_BYPASS_TRUE")
|
||||
(INSTANCE BUFIO)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH I O (0.032::0.038)(0.294::0.420))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "BUFR_BUFR_DIVIDE_1")
|
||||
(INSTANCE BUFR)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLR O (0.273::0.314)(0.942::1.138))
|
||||
(IOPATH I O (0.270::0.431)(0.918::1.031))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "BUFR_BUFR_DIVIDE_2")
|
||||
(INSTANCE BUFR)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLR O (0.273::0.314)(0.942::1.138))
|
||||
(IOPATH I O (0.270::0.431)(0.918::1.031))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "BUFR_BUFR_DIVIDE_3")
|
||||
(INSTANCE BUFR)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLR O (0.273::0.314)(0.942::1.138))
|
||||
(IOPATH I O (0.270::0.431)(0.918::1.031))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "BUFR_BUFR_DIVIDE_4")
|
||||
(INSTANCE BUFR)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLR O (0.273::0.314)(0.942::1.138))
|
||||
(IOPATH I O (0.270::0.431)(0.918::1.031))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "BUFR_BUFR_DIVIDE_5")
|
||||
(INSTANCE BUFR)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLR O (0.273::0.314)(0.942::1.138))
|
||||
(IOPATH I O (0.270::0.431)(0.918::1.031))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "BUFR_BUFR_DIVIDE_6")
|
||||
(INSTANCE BUFR)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLR O (0.273::0.314)(0.942::1.138))
|
||||
(IOPATH I O (0.270::0.431)(0.918::1.031))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "BUFR_BUFR_DIVIDE_7")
|
||||
(INSTANCE BUFR)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLR O (0.273::0.314)(0.942::1.138))
|
||||
(IOPATH I O (0.270::0.431)(0.918::1.031))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "BUFR_BUFR_DIVIDE_8")
|
||||
(INSTANCE BUFR)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLR O (0.273::0.314)(0.942::1.138))
|
||||
(IOPATH I O (0.270::0.431)(0.918::1.031))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "BUFR_BUFR_DIVIDE_BYPASS")
|
||||
(INSTANCE BUFR)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLR O (0.273::0.314)(0.942::1.138))
|
||||
(IOPATH I O (0.092::0.254)(0.486::0.537))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "IDELAYCTRL")
|
||||
(INSTANCE IDELAYCTRL)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH RST RDY (2569.982::2956.512)(3184.543::3663.504))
|
||||
)
|
||||
)
|
||||
)
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,44 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
(CELL
|
||||
(CELLTYPE "XADC")
|
||||
(INSTANCE XADC)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH DCLK BUSY (0.301::0.319)(1.218::1.294))
|
||||
(IOPATH DCLK DRDY (0.256::0.272)(1.132::1.204))
|
||||
(IOPATH DCLK EOC (0.379::0.403)(1.437::1.527))
|
||||
(IOPATH DCLK EOS (0.288::0.306)(1.231::1.309))
|
||||
(IOPATH DCLK JTAGBUSY (0.334::0.354)(1.331::1.415))
|
||||
(IOPATH DCLK JTAGLOCKED (0.276::0.294)(1.190::1.264))
|
||||
(IOPATH DCLK JTAGMODIFIED (0.273::0.289)(1.177::1.251))
|
||||
(IOPATH DCLK OT (0.301::0.319)(1.269::1.349))
|
||||
)
|
||||
)
|
||||
(TIMINGCHECK
|
||||
(HOLD DCLK (posedge DCLK) (-0.025::-0.013))
|
||||
(SETUP DCLK (posedge DCLK) (0.800::0.848))
|
||||
(HOLD DWE (posedge DCLK) (-0.022::-0.005))
|
||||
(SETUP DWE (posedge DCLK) (0.531::0.565))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "XADC_DADDR")
|
||||
(INSTANCE XADC)
|
||||
(TIMINGCHECK
|
||||
(HOLD DCLK (posedge DCLK) (-0.002::0.017))
|
||||
(SETUP DCLK (posedge DCLK) (0.659::0.699))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "XADC_DI")
|
||||
(INSTANCE XADC)
|
||||
(TIMINGCHECK
|
||||
(HOLD DCLK (posedge DCLK) (-0.009::0.010))
|
||||
(SETUP DCLK (posedge DCLK) (0.610::0.648))
|
||||
)
|
||||
)
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,24 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
(CELL
|
||||
(CELLTYPE "IOB33_INBUF_ENIOB33_IOB_INBUF_EN")
|
||||
(INSTANCE IOB33M)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH IBUFDISABLE OUT (0.339::0.390)(1.027::1.182))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "IOB33_INBUF_ENIOB33_IOB_INBUF_EN")
|
||||
(INSTANCE IOB33S)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH IBUFDISABLE OUT (0.339::0.390)(1.027::1.182))
|
||||
)
|
||||
)
|
||||
)
|
||||
)
|
||||
|
|
@ -0,0 +1,15 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
(CELL
|
||||
(CELLTYPE "IOB33_INBUF_ENIOB33_IOB_INBUF_EN")
|
||||
(INSTANCE IOB33)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH IBUFDISABLE OUT (0.339::0.390)(1.027::1.182))
|
||||
)
|
||||
)
|
||||
)
|
||||
)
|
||||
|
|
@ -0,0 +1,390 @@
|
|||
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(TIMESCALE 1ps)
|
||||
|
||||
(CELL
|
||||
(CELLTYPE "IDELAYE2_CNTVALUEIN_IDELAY_TYPE_VAR_LOAD")
|
||||
(INSTANCE IDELAYE2)
|
||||
(TIMINGCHECK
|
||||
(HOLD C (posedge C) (0.128::0.138))
|
||||
(SETUP C (posedge C) (0.094::0.102))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "IDELAYE2_CNTVALUEIN_IDELAY_TYPE_VAR_LOAD_PIPE")
|
||||
(INSTANCE IDELAYE2)
|
||||
(TIMINGCHECK
|
||||
(HOLD C (posedge C) (0.258::0.280))
|
||||
(SETUP C (posedge C) (-0.081::-0.075))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "IDELAYE2_DELAY_SRC_DATAIN")
|
||||
(INSTANCE IDELAYE2)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH DATAIN DATAOUT (0.278::0.392)(0.899::1.012))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "IDELAYE2_DELAY_SRC_IDATAIN")
|
||||
(INSTANCE IDELAYE2)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH IDATAIN DATAOUT (0.243::0.305)(0.755::0.815))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "IDELAYE2_IDELAY_TYPE_VAR_LOAD")
|
||||
(INSTANCE IDELAYE2)
|
||||
(TIMINGCHECK
|
||||
(HOLD CE (posedge C) (0.143::0.155))
|
||||
(SETUP CE (posedge C) (0.187::0.203))
|
||||
(HOLD C (posedge C) (0.203::0.219))
|
||||
(SETUP C (posedge C) (0.140::0.152))
|
||||
(HOLD LD (posedge C) (0.131::0.141))
|
||||
(SETUP LD (posedge C) (0.089::0.097))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "IDELAYE2_IDELAY_TYPE_VAR_LOAD_PIPE")
|
||||
(INSTANCE IDELAYE2)
|
||||
(TIMINGCHECK
|
||||
(HOLD C (posedge C) (0.203::0.219))
|
||||
(SETUP C (posedge C) (0.140::0.152))
|
||||
(HOLD LDPIPEEN (posedge C) (0.108::0.116))
|
||||
(SETUP LDPIPEEN (posedge C) (0.031::0.033))
|
||||
(HOLD REGRST (posedge C) (0.122::0.132))
|
||||
(SETUP REGRST (posedge C) (0.158::0.172))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "IDELAYE2_IDELAY_TYPE_VARIABLE")
|
||||
(INSTANCE IDELAYE2)
|
||||
(TIMINGCHECK
|
||||
(HOLD CE (posedge C) (0.143::0.155))
|
||||
(SETUP CE (posedge C) (0.187::0.203))
|
||||
(HOLD C (posedge C) (0.203::0.219))
|
||||
(SETUP C (posedge C) (0.140::0.152))
|
||||
(HOLD LD (posedge C) (0.131::0.141))
|
||||
(SETUP LD (posedge C) (0.089::0.097))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "ILOGICE3_IFF")
|
||||
(INSTANCE ILOGICE3)
|
||||
(TIMINGCHECK
|
||||
(HOLD CE (posedge CK) (-0.076::-0.066))
|
||||
(SETUP CE (posedge CK) (0.430::0.726))
|
||||
(HOLD CK (posedge CK) (-0.077::-0.066))
|
||||
(SETUP CK (posedge CK) (0.764::0.922))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "ILOGICE3_IFF_DDR")
|
||||
(INSTANCE ILOGICE3)
|
||||
(TIMINGCHECK
|
||||
(HOLD CE (posedge CKB) (-0.076::-0.066))
|
||||
(SETUP CE (posedge CKB) (0.430::0.726))
|
||||
(HOLD CK (posedge CK) (0.022::0.026))
|
||||
(SETUP CK (posedge CK) (0.091::0.105))
|
||||
(HOLD D (posedge CKB) (0.022::0.026))
|
||||
(SETUP D (posedge CKB) (0.091::0.105))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "ILOGICE3_IFF_FF")
|
||||
(INSTANCE ILOGICE3)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CK Q1 (0.060::0.069)(0.153::0.176))
|
||||
(IOPATH SR Q1 (0.200::0.230)(0.665::0.765))
|
||||
)
|
||||
)
|
||||
(TIMINGCHECK
|
||||
(HOLD CK (posedge CK) (0.022::0.026))
|
||||
(SETUP CK (posedge CK) (0.091::0.105))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "ILOGICE3_IFF_HOLD")
|
||||
(INSTANCE ILOGICE3)
|
||||
(TIMINGCHECK
|
||||
(REMOVAL CK (posedge CK) (-0.409::-0.357))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "ILOGICE3_IFF_LAT")
|
||||
(INSTANCE ILOGICE3)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CK Q1 (0.087::0.100)(0.225::0.259))
|
||||
(IOPATH D Q1 (0.080::0.092)(0.215::0.247))
|
||||
(IOPATH SR Q1 (0.200::0.230)(0.656::0.755))
|
||||
)
|
||||
)
|
||||
(TIMINGCHECK
|
||||
(HOLD CK (posedge CK) (0.140::0.161))
|
||||
(SETUP CK (posedge CK) (0.035::0.041))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "ILOGICE3_IFF_OPPEDGE")
|
||||
(INSTANCE ILOGICE3)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CK Q1 (0.060::0.069)(0.153::0.176))
|
||||
(IOPATH CKB Q2 (0.059::0.067)(0.145::0.167))
|
||||
(IOPATH SR Q1 (0.200::0.230)(0.665::0.765))
|
||||
(IOPATH SR Q2 (0.200::0.230)(0.665::0.765))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "ILOGICE3_IFF_PIPELINED")
|
||||
(INSTANCE ILOGICE3)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CK Q1 (0.060::0.069)(0.153::0.176))
|
||||
(IOPATH CK Q2 (0.059::0.067)(0.145::0.167))
|
||||
(IOPATH SR Q1 (0.200::0.230)(0.665::0.765))
|
||||
(IOPATH SR Q2 (0.200::0.230)(0.665::0.765))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "ILOGICE3_IFF_SAMEEDGE")
|
||||
(INSTANCE ILOGICE3)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CK Q1 (0.060::0.069)(0.153::0.176))
|
||||
(IOPATH CK Q2 (0.059::0.067)(0.145::0.167))
|
||||
(IOPATH SR Q1 (0.200::0.230)(0.665::0.765))
|
||||
(IOPATH SR Q2 (0.200::0.230)(0.665::0.765))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "ILOGICE3_IFF_SETUP")
|
||||
(INSTANCE ILOGICE3)
|
||||
(TIMINGCHECK
|
||||
(RECOVERY CK (posedge CK) (0.518::0.596))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "SELMUX2_1")
|
||||
(INSTANCE ILOGICE3)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH 0 OUT (0.064::0.080)(0.177::0.219))
|
||||
(IOPATH 1 OUT (0.066::0.082)(0.181::0.225))
|
||||
(IOPATH S0 OUT (0.096::0.120)(0.253::0.314))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "OLOGICE3_OUTFF")
|
||||
(INSTANCE OLOGICE3)
|
||||
(TIMINGCHECK
|
||||
(HOLD CK (posedge CK) (-0.142::-0.124))
|
||||
(RECOVERY CK (posedge CK) (0.261::0.300))
|
||||
(REMOVAL CK (posedge CK) (0.000::0.000))
|
||||
(SETUP CK (posedge CK) (0.651::0.798))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "OLOGICE3_OUTFF_DDR")
|
||||
(INSTANCE OLOGICE3)
|
||||
(TIMINGCHECK
|
||||
(HOLD D1 (posedge CK) (-0.164::-0.143))
|
||||
(SETUP D1 (posedge CK) (0.689::0.834))
|
||||
(HOLD CK (posedge CK) (-0.164::-0.143))
|
||||
(SETUP CK (posedge CK) (0.689::0.834))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "OLOGICE3_OUTFF_DDR_NEG")
|
||||
(INSTANCE OLOGICE3)
|
||||
(TIMINGCHECK
|
||||
(HOLD CK (posedge CK) (-0.164::-0.143))
|
||||
(SETUP CK (posedge CK) (0.689::0.834))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "OLOGICE3_OUTFF_FF")
|
||||
(INSTANCE OLOGICE3)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLK Q (0.177::0.204)(0.449::0.472))
|
||||
(IOPATH SR Q (0.301::0.346)(0.821::0.945))
|
||||
)
|
||||
)
|
||||
(TIMINGCHECK
|
||||
(HOLD D1 (posedge CK) (-0.164::-0.143))
|
||||
(SETUP D1 (posedge CK) (0.689::0.834))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "OLOGICE3_OUTFF_LAT")
|
||||
(INSTANCE OLOGICE3)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLK Q (0.177::0.204)(0.411::0.472))
|
||||
(IOPATH D1 Q (0.488::0.561)(0.904::1.040))
|
||||
(IOPATH SR Q (0.301::0.346)(0.821::0.945))
|
||||
)
|
||||
)
|
||||
(TIMINGCHECK
|
||||
(HOLD D1 (posedge CK) (-0.164::-0.143))
|
||||
(SETUP D1 (posedge CK) (0.351::0.404))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "OLOGICE3_OUTFF_OCE")
|
||||
(INSTANCE OLOGICE3)
|
||||
(TIMINGCHECK
|
||||
(HOLD CK (posedge CK) (-0.059::-0.051))
|
||||
(SETUP CK (posedge CK) (0.380::0.504))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "OLOGICE3_OUTFF_OCE_DDR_NEG")
|
||||
(INSTANCE OLOGICE3)
|
||||
(TIMINGCHECK
|
||||
(HOLD CK (posedge CK) (-0.124::-0.108))
|
||||
(SETUP CK (posedge CK) (0.380::0.482))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "OLOGICE3_OUTFF_OCE_DDR_SAMEEDGE")
|
||||
(INSTANCE OLOGICE3)
|
||||
(TIMINGCHECK
|
||||
(HOLD CK (posedge CK) (-0.124::-0.108))
|
||||
(SETUP CK (posedge CK) (0.380::0.482))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "OLOGICE3_OUTFF_OPPEDGE")
|
||||
(INSTANCE OLOGICE3)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLK Q (0.177::0.204)(0.411::0.472))
|
||||
(IOPATH SR Q (0.301::0.346)(0.821::0.945))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "OLOGICE3_OUTFF_SAMEEDGE")
|
||||
(INSTANCE OLOGICE3)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLK Q (0.177::0.204)(0.411::0.472))
|
||||
(IOPATH SR Q (0.301::0.346)(0.821::0.945))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "OLOGICE3_TFF")
|
||||
(INSTANCE OLOGICE3)
|
||||
(TIMINGCHECK
|
||||
(HOLD CK (posedge CK) (-0.318::-0.277))
|
||||
(RECOVERY CK (posedge CK) (0.249::0.286))
|
||||
(REMOVAL CK (posedge CK) (0.000::0.000))
|
||||
(SETUP CK (posedge CK) (0.471::0.591))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "OLOGICE3_TFF_DDR")
|
||||
(INSTANCE OLOGICE3)
|
||||
(TIMINGCHECK
|
||||
(HOLD D1 (posedge CK) (-0.302::-0.264))
|
||||
(SETUP D1 (posedge CK) (0.707::0.885))
|
||||
(HOLD CK (posedge CK) (-0.302::-0.264))
|
||||
(SETUP CK (posedge CK) (0.622::0.788))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "OLOGICE3_TFF_DDR_NEG")
|
||||
(INSTANCE OLOGICE3)
|
||||
(TIMINGCHECK
|
||||
(HOLD CK (posedge CK) (-0.302::-0.264))
|
||||
(SETUP CK (posedge CK) (0.622::0.788))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "OLOGICE3_TFF_FF")
|
||||
(INSTANCE OLOGICE3)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLK Q (0.192::0.221)(0.480::0.552))
|
||||
(IOPATH SR Q (0.328::0.377)(0.916::1.054))
|
||||
)
|
||||
)
|
||||
(TIMINGCHECK
|
||||
(HOLD D1 (posedge CK) (-0.302::-0.264))
|
||||
(SETUP D1 (posedge CK) (0.697::0.873))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "OLOGICE3_TFF_LAT")
|
||||
(INSTANCE OLOGICE3)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLK Q (0.192::0.221)(0.480::0.552))
|
||||
(IOPATH D1 Q (0.513::0.590)(0.989::1.138))
|
||||
(IOPATH SR Q (0.328::0.377)(0.916::1.054))
|
||||
)
|
||||
)
|
||||
(TIMINGCHECK
|
||||
(HOLD D1 (posedge CK) (-0.302::-0.264))
|
||||
(SETUP D1 (posedge CK) (0.352::0.405))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "OLOGICE3_TFF_OPPEDGE")
|
||||
(INSTANCE OLOGICE3)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLK Q (0.192::0.221)(0.480::0.552))
|
||||
(IOPATH SR Q (0.328::0.377)(0.916::1.054))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "OLOGICE3_TFF_SAMEEDGE")
|
||||
(INSTANCE OLOGICE3)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH CLK Q (0.192::0.221)(0.480::0.552))
|
||||
(IOPATH SR Q (0.328::0.377)(0.916::1.054))
|
||||
)
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "OLOGICE3_TFF_TCE")
|
||||
(INSTANCE OLOGICE3)
|
||||
(TIMINGCHECK
|
||||
(HOLD CK (posedge CK) (-0.068::-0.060))
|
||||
(SETUP CK (posedge CK) (0.389::0.505))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "OLOGICE3_TFF_TCE_DDR_NEG")
|
||||
(INSTANCE OLOGICE3)
|
||||
(TIMINGCHECK
|
||||
(HOLD CK (posedge CK) (-0.068::-0.060))
|
||||
(SETUP CK (posedge CK) (0.389::0.505))
|
||||
)
|
||||
)
|
||||
(CELL
|
||||
(CELLTYPE "OLOGICE3_TFF_TCE_DDR_SAMEEDGE")
|
||||
(INSTANCE OLOGICE3)
|
||||
(TIMINGCHECK
|
||||
(HOLD CK (posedge CK) (-0.068::-0.060))
|
||||
(SETUP CK (posedge CK) (0.389::0.505))
|
||||
)
|
||||
)
|
||||
)
|
||||
Some files were not shown because too many files have changed in this diff Show More
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Reference in New Issue