Updating artix7 based on "Merge pull request #858 from litghost/timing_fuzzer".
See [Info File](Info.md) for details. Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
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Info.md
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Info.md
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@ -37,20 +37,20 @@ These files are released under the very permissive [CC0 1.0 Universal](COPYING).
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# Details
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Last updated on Thu May 30 19:10:04 UTC 2019 (2019-05-30T19:10:04+00:00).
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Last updated on Sun Jun 2 16:14:50 UTC 2019 (2019-06-02T16:14:50+00:00).
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Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [e8299f6](https://github.com/SymbiFlow/prjxray/commit/e8299f64042c2ce52d358d8c7cf57e467bf7293b).
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Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [0bddcaf9](https://github.com/SymbiFlow/prjxray/commit/0bddcaf90872d961f6aaf21848cb97c3777ff307).
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Latest commit was;
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```
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commit e8299f64042c2ce52d358d8c7cf57e467bf7293b
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Merge: ff4c807 cb22f2f
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commit 0bddcaf90872d961f6aaf21848cb97c3777ff307
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Merge: 84e168c9 0dc13173
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Author: litghost <537074+litghost@users.noreply.github.com>
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Date: Tue May 28 09:57:08 2019 -0700
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Date: Thu May 30 18:20:43 2019 -0700
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Merge pull request #842 from antmicro/bits_origin
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Merge pull request #858 from litghost/timing_fuzzer
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Generate db files with fuzzer name of origin
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Add wire, pip, and site pin timing information.
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```
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@ -59,7 +59,7 @@ Date: Tue May 28 09:57:08 2019 -0700
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### Settings
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Created using following [settings/artix7.sh (sha256: 26e1ff93657132928a3b583c95347267d7afeb18a7b7036f0d7a6ea3367ae803)](https://github.com/SymbiFlow/prjxray/blob/e8299f64042c2ce52d358d8c7cf57e467bf7293b/settings/artix7.sh)
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Created using following [settings/artix7.sh (sha256: 26e1ff93657132928a3b583c95347267d7afeb18a7b7036f0d7a6ea3367ae803)](https://github.com/SymbiFlow/prjxray/blob/0bddcaf90872d961f6aaf21848cb97c3777ff307/settings/artix7.sh)
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```shell
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export XRAY_DATABASE="artix7"
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export XRAY_PART="xc7a50tfgg484-1"
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@ -254,118 +254,118 @@ Results have checksums;
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* [`8e5baf846e629316cefb781c26c09b6a39ca509d03dd381967c3e92f429dbda3 ./artix7/site_type_TIEOFF.json`](./artix7/site_type_TIEOFF.json)
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* [`4a52214be0712e1f5e3746c304d3299fd2bfa9e578956df1d6fcd6128614da12 ./artix7/site_type_USR_ACCESS.json`](./artix7/site_type_USR_ACCESS.json)
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* [`f711f285e16aa11d4827ce8504e9413c8ccf87f9f86d108740738ae6cbb4f388 ./artix7/site_type_XADC.json`](./artix7/site_type_XADC.json)
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* [`0bfdad62f04128ca4d469aa18b179cbd3bf78e40c6af50450c9ca85bfffd746f ./artix7/tile_type_BRAM_INT_INTERFACE_L.json`](./artix7/tile_type_BRAM_INT_INTERFACE_L.json)
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* [`fd0b3b31118249e66193fa06633a58aa5d86820bed16d3f85497b886d2282845 ./artix7/tile_type_BRAM_INT_INTERFACE_R.json`](./artix7/tile_type_BRAM_INT_INTERFACE_R.json)
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* [`23af85ab67092eb90d6b05c3bff539499494eaecb07b5063baa2aa494063a1ec ./artix7/tile_type_BRAM_L.json`](./artix7/tile_type_BRAM_L.json)
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* [`3f080d03ca1d85aa81c2bae209cb401b8dcddd6e115ea8d16d735f2b4e6fc892 ./artix7/tile_type_BRAM_R.json`](./artix7/tile_type_BRAM_R.json)
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* [`29e4879a736ff9d43178ba3887ba47b8f1190464dabf4eef7c8fe8d8d23647c2 ./artix7/tile_type_BRKH_BRAM.json`](./artix7/tile_type_BRKH_BRAM.json)
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* [`fccd1abee620b9dc48534d82af9c84d7e4fb9f2fbeaa0d8bbef1ddab5d2d91c5 ./artix7/tile_type_BRKH_B_TERM_INT.json`](./artix7/tile_type_BRKH_B_TERM_INT.json)
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* [`1adbede824487b01b77eed4443ff5434c9473a067dae3c620df3ccca800951ac ./artix7/tile_type_BRKH_CLB.json`](./artix7/tile_type_BRKH_CLB.json)
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* [`d036cb35cb1bb3237b76f2e755fd3e5902e4588b03e565e4c01ecaa6429457fa ./artix7/tile_type_BRKH_CLK.json`](./artix7/tile_type_BRKH_CLK.json)
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* [`ec60392fdf039d697e2de0b6c856d118a52ac7fb5bc50da206802f98a8967ea6 ./artix7/tile_type_BRKH_CMT.json`](./artix7/tile_type_BRKH_CMT.json)
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* [`721f0a9fab25908b7ae0da9b94903a8ca1cb63d42dc5119d7b143309d27156fd ./artix7/tile_type_BRKH_DSP_L.json`](./artix7/tile_type_BRKH_DSP_L.json)
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* [`db175274054c15c1cf7093a5117628fb30f27ddd50a29eabcc894e39236f95d8 ./artix7/tile_type_BRKH_DSP_R.json`](./artix7/tile_type_BRKH_DSP_R.json)
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* [`47d42da782610f63cf7d094ca01bdd72d632b2f7f145a942cf2ceba1dfacdc53 ./artix7/tile_type_BRKH_GTX.json`](./artix7/tile_type_BRKH_GTX.json)
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* [`68c36646e682266cb3aecade1627160b22112d72b5859f4aae3cd32df488422a ./artix7/tile_type_BRKH_INT.json`](./artix7/tile_type_BRKH_INT.json)
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* [`0c29262ad6e32786f23197bd603491be251278fc1a0806527e8c164a4aa269aa ./artix7/tile_type_BRKH_TERM_INT.json`](./artix7/tile_type_BRKH_TERM_INT.json)
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* [`b3700d8432a5ea4375fab4419bba143bc79dfd137a7110117ea085d79a2dd766 ./artix7/tile_type_B_TERM_INT.json`](./artix7/tile_type_B_TERM_INT.json)
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* [`606581f9ab6d5c8ded71371ea6806e741b0739e5e32e69c503e4ebddc9544ec9 ./artix7/tile_type_CFG_CENTER_BOT.json`](./artix7/tile_type_CFG_CENTER_BOT.json)
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* [`820a133d2cdab23ca7c64570daa391e3329826759fa82b2d12914878676274ce ./artix7/tile_type_CFG_CENTER_MID.json`](./artix7/tile_type_CFG_CENTER_MID.json)
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* [`cc6b420c4804236a1b2928e5c86cfa6f6143b93843e40081d14c2bfd5d5e76a8 ./artix7/tile_type_CFG_CENTER_TOP.json`](./artix7/tile_type_CFG_CENTER_TOP.json)
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* [`0cf36c0ab629c583c01ae9efa04093e0644da71b7b0dfbc175dfcf9ed56650d5 ./artix7/tile_type_CLBLL_L.json`](./artix7/tile_type_CLBLL_L.json)
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* [`3607f851807c3b420d21b4fe0c0b26b91db19d1384ba39d45f4c771f7251544e ./artix7/tile_type_CLBLL_R.json`](./artix7/tile_type_CLBLL_R.json)
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* [`8f91f81d6f549d0f728dbab89baca64bae44491b1b0df30ae6ca4193b6eed951 ./artix7/tile_type_CLBLM_L.json`](./artix7/tile_type_CLBLM_L.json)
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* [`50812dbe755a110f8e33285728a9b565d46d1e71e76e63085fc6d1dea4f4dee7 ./artix7/tile_type_CLBLM_R.json`](./artix7/tile_type_CLBLM_R.json)
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* [`3ab28fa68486317ac22e260c8d0ac81bcccc0b214cff21b66cda2cf0974d62bb ./artix7/tile_type_CLK_BUFG_BOT_R.json`](./artix7/tile_type_CLK_BUFG_BOT_R.json)
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* [`7e7b949435c6724c886ab674148e7a241d7761b63d8b700fbeb2b3f4105329bb ./artix7/tile_type_CLK_BUFG_REBUF.json`](./artix7/tile_type_CLK_BUFG_REBUF.json)
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* [`b1fdae383da0691975b3836a0a66fa566165de094e4bd416d664dc32f2d010c8 ./artix7/tile_type_CLK_BUFG_TOP_R.json`](./artix7/tile_type_CLK_BUFG_TOP_R.json)
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* [`9900c1d7c03b75bb765c57b00b20fbefd09efeccb325afba72901b941d5db0de ./artix7/tile_type_CLK_FEED.json`](./artix7/tile_type_CLK_FEED.json)
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* [`fa0923a2169819ecc93697c7255aef24e9dbee2a3c5d8c1df3f86956e0bc8b08 ./artix7/tile_type_CLK_HROW_BOT_R.json`](./artix7/tile_type_CLK_HROW_BOT_R.json)
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* [`71f60f081cb9718ca95f3c004034dde427a1323ae4f71f94c68f3ecb961f1d2f ./artix7/tile_type_CLK_HROW_TOP_R.json`](./artix7/tile_type_CLK_HROW_TOP_R.json)
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* [`3d200f97f5d0608d4577dcaf9ae59c34be18f4d1406aa71815d56327fc2a3564 ./artix7/tile_type_CLK_MTBF2.json`](./artix7/tile_type_CLK_MTBF2.json)
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* [`0163ab8305f14d439e303fc072bf980549efd65c42494e468bc2b2e0bd3ff0a6 ./artix7/tile_type_CLK_PMV.json`](./artix7/tile_type_CLK_PMV.json)
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* [`1e08a2d1f2c7e0ec12b0eec202c3759fbfc82fab01b9d0b5d1658299d8ac5506 ./artix7/tile_type_CLK_PMV2.json`](./artix7/tile_type_CLK_PMV2.json)
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* [`bf52b93861ca5856dab593dde196a21ab8a9522b4eb58f13fe206beaba8c78f2 ./artix7/tile_type_CLK_PMV2_SVT.json`](./artix7/tile_type_CLK_PMV2_SVT.json)
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* [`e7123b7dbeba2ebbf4a6ae04fb87bd114548befc9bb812d7bf4bee3401aa44fa ./artix7/tile_type_CLK_PMVIOB.json`](./artix7/tile_type_CLK_PMVIOB.json)
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* [`42236b4ea5a40883822299aef2c5eb6ef2adb30c715145a9c36c5dd9e84e102e ./artix7/tile_type_CLK_TERM.json`](./artix7/tile_type_CLK_TERM.json)
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* [`f985c5c1c1186eb314e1bd727b4195b88f69739fcb991efbafee963310b880f9 ./artix7/tile_type_CMT_FIFO_L.json`](./artix7/tile_type_CMT_FIFO_L.json)
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* [`2209bb569563a8f748c4f54f28a5d870d9f873d1403cefc3c433174bb68d74f2 ./artix7/tile_type_CMT_FIFO_R.json`](./artix7/tile_type_CMT_FIFO_R.json)
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* [`a3cce946e4fc43015cc0e0d5ed2305bbf1da982807029d4a72a5f3f76cb6e756 ./artix7/tile_type_CMT_PMV.json`](./artix7/tile_type_CMT_PMV.json)
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* [`9207ebd19f94b6a3a9d8ea08f1fe78dcf592d3b5b5f541694a23d5dc1a9163e3 ./artix7/tile_type_CMT_PMV_L.json`](./artix7/tile_type_CMT_PMV_L.json)
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* [`63d8187207a325d174e8d509014200531f3e11236e5064c2675871ca42fbbffa ./artix7/tile_type_CMT_TOP_L_LOWER_B.json`](./artix7/tile_type_CMT_TOP_L_LOWER_B.json)
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* [`129c5c28dee6d7cc79263d280a391c07b5db326124ad1e973582643d9eadff3a ./artix7/tile_type_CMT_TOP_L_LOWER_T.json`](./artix7/tile_type_CMT_TOP_L_LOWER_T.json)
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* [`3c645c7e32529af66b278c8c06734bb052d1be00ff801772d28147b1e62da2ff ./artix7/tile_type_CMT_TOP_L_UPPER_B.json`](./artix7/tile_type_CMT_TOP_L_UPPER_B.json)
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* [`e008d249e1f1dafa57e4ac276826c60e24b7fd29ec4e5acafd078c0604631afc ./artix7/tile_type_CMT_TOP_L_UPPER_T.json`](./artix7/tile_type_CMT_TOP_L_UPPER_T.json)
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* [`5b45ef7b0d9a366440da629a02330f51b6210652842fe723369e88f31df5d732 ./artix7/tile_type_CMT_TOP_R_LOWER_B.json`](./artix7/tile_type_CMT_TOP_R_LOWER_B.json)
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* [`6260182cedf2857372997d8b9a9b3d28504931d1c7ff5176d718dd44935354f0 ./artix7/tile_type_CMT_TOP_R_LOWER_T.json`](./artix7/tile_type_CMT_TOP_R_LOWER_T.json)
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* [`526212df7cbe1dbc56b70ac0dc0e93823cb238fcbf0c223dd82e88fac47e329f ./artix7/tile_type_CMT_TOP_R_UPPER_B.json`](./artix7/tile_type_CMT_TOP_R_UPPER_B.json)
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* [`816d810709c3f54a33774c6a9acefe472cac1e5748d306e692524007b699ee35 ./artix7/tile_type_CMT_TOP_R_UPPER_T.json`](./artix7/tile_type_CMT_TOP_R_UPPER_T.json)
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* [`4ddd2c3e96995a4acf4320877f3ab6ade22d9b475eb8b2e46cb64c325b92e386 ./artix7/tile_type_DSP_L.json`](./artix7/tile_type_DSP_L.json)
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* [`b7f2ec5fcaf13becd7a73baa9271370dd80ccc24a1dc52bbe4ec2a450aabd7ad ./artix7/tile_type_DSP_R.json`](./artix7/tile_type_DSP_R.json)
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* [`55706ad2e75bf24cfe41cf426c67466acce2b2497172a568425a4773c06a6ac9 ./artix7/tile_type_GTP_CHANNEL_0.json`](./artix7/tile_type_GTP_CHANNEL_0.json)
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* [`6c202a87a8fa97d8112e4fe615cac588caa2dee1e618b8e4dab24ce7b200a01c ./artix7/tile_type_GTP_CHANNEL_1.json`](./artix7/tile_type_GTP_CHANNEL_1.json)
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* [`c5232105dc223b5e37c1a9e4659ef7152ec231ac789d88eee5d289c97e058082 ./artix7/tile_type_GTP_CHANNEL_2.json`](./artix7/tile_type_GTP_CHANNEL_2.json)
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* [`d1dc3bfea0f1e0479a689d9faf6bde331fdb8f26a767eb8be1e294cb7097fcd9 ./artix7/tile_type_GTP_CHANNEL_3.json`](./artix7/tile_type_GTP_CHANNEL_3.json)
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* [`344448cb7390b6762f4d8ded53c1505ba74fede86e001d6afcd49bd96ab206b0 ./artix7/tile_type_GTP_COMMON.json`](./artix7/tile_type_GTP_COMMON.json)
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* [`a76c8162ac133ae09ea8ad8dae00ca8d55452bb619416bc6684e56c990c3ce17 ./artix7/tile_type_GTP_INT_INTERFACE.json`](./artix7/tile_type_GTP_INT_INTERFACE.json)
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* [`05eb17dc54b29fac95e4b2ac067139b528c1bc7f5cb78b672e6941a2966ec7bb ./artix7/tile_type_HCLK_BRAM.json`](./artix7/tile_type_HCLK_BRAM.json)
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* [`307db3c561c03036e0460d24af8d435631bbacef7f81c0385f6179673d818d50 ./artix7/tile_type_HCLK_CLB.json`](./artix7/tile_type_HCLK_CLB.json)
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* [`318c1785d2059191307e3e12efc326475b060106d048550bfd2a7a48381257d0 ./artix7/tile_type_HCLK_CMT.json`](./artix7/tile_type_HCLK_CMT.json)
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* [`4af6db5c406dd683670c77fe2dbfcfd64b0d079e59e3082cfc4e578789cddf45 ./artix7/tile_type_HCLK_CMT_L.json`](./artix7/tile_type_HCLK_CMT_L.json)
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* [`cbcd13d3b6a78888a73e22e1e33e56c80b5fcb23c4d1baf938b4b6daa02173f7 ./artix7/tile_type_HCLK_DSP_L.json`](./artix7/tile_type_HCLK_DSP_L.json)
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* [`dacc707f9e2db1d6752f833cf0559536423baf915a848b3ff641373f4762793f ./artix7/tile_type_HCLK_DSP_R.json`](./artix7/tile_type_HCLK_DSP_R.json)
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* [`c1d33fee3af7b2ba311bad50d6f8b771303ebd8241e617ec638b1fcb8d2c4ee0 ./artix7/tile_type_HCLK_FEEDTHRU_1.json`](./artix7/tile_type_HCLK_FEEDTHRU_1.json)
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* [`0e991e5fc85e54835a7de8da8456ee1300d97d798fb12d16c521a9163500a20c ./artix7/tile_type_HCLK_FEEDTHRU_2.json`](./artix7/tile_type_HCLK_FEEDTHRU_2.json)
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* [`1631fbdf6e3158d6e372508b55e32e3e638b270e0ca606359b4ad060f6337cea ./artix7/tile_type_HCLK_FIFO_L.json`](./artix7/tile_type_HCLK_FIFO_L.json)
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* [`7897a72ad8df7a9561af0cd339d07b78fda2d8978771ca314edb158eb6bf21d5 ./artix7/tile_type_HCLK_GTX.json`](./artix7/tile_type_HCLK_GTX.json)
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* [`6a66fa18fdad81ae738e61f650066415a2adc7d15b15ab87b5080faff3edb9e1 ./artix7/tile_type_HCLK_INT_INTERFACE.json`](./artix7/tile_type_HCLK_INT_INTERFACE.json)
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* [`51fbaa9613664a08814f372c5791189ceb855720997334f55e52872cc6d4c46f ./artix7/tile_type_HCLK_IOB.json`](./artix7/tile_type_HCLK_IOB.json)
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* [`5e15b63a15fd7864d838d448599718e5f82e8caafa8fd316eb19374e20c0d89c ./artix7/tile_type_HCLK_IOI3.json`](./artix7/tile_type_HCLK_IOI3.json)
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* [`2c39172c06f58c30f92d140c6c7c060777b1b3f397a23b9cf82a41a656da82ef ./artix7/tile_type_HCLK_L.json`](./artix7/tile_type_HCLK_L.json)
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* [`4270980b733f54a17a34b5259579fd2e42d38efeeb42518967362c599def37c2 ./artix7/tile_type_HCLK_L_BOT_UTURN.json`](./artix7/tile_type_HCLK_L_BOT_UTURN.json)
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* [`782d62d7a78ca8282570a945739057b1801795271764120ff4f20696a36e9354 ./artix7/tile_type_HCLK_R.json`](./artix7/tile_type_HCLK_R.json)
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* [`0bc6c1727558cc3dfe8ee21ec2f2b03e6f0f362d3948b2afed0217e1fd1b2d32 ./artix7/tile_type_HCLK_R_BOT_UTURN.json`](./artix7/tile_type_HCLK_R_BOT_UTURN.json)
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* [`5b459ee856bd5417b0c61831120d27cebb7f5c6ae4952470bdc6dc6bad6c5b49 ./artix7/tile_type_HCLK_TERM.json`](./artix7/tile_type_HCLK_TERM.json)
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* [`ccc33563773bbe6157c016214acd36162575086bfa661e8fa53885a58dd2d43d ./artix7/tile_type_HCLK_TERM_GTX.json`](./artix7/tile_type_HCLK_TERM_GTX.json)
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* [`e706c7cf142b8e806283d3cf030f89e30149bad7b2f156e739e2f41247922792 ./artix7/tile_type_HCLK_VBRK.json`](./artix7/tile_type_HCLK_VBRK.json)
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* [`acabe2c19ef9286451b67f889608af10b57c4149be795c7b9e96c700e673741a ./artix7/tile_type_HCLK_VFRAME.json`](./artix7/tile_type_HCLK_VFRAME.json)
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* [`fe9a6b9109c94abc0860142566f1d6c292b5313f2ebe641dbd3f4d41671d05a2 ./artix7/tile_type_INT_FEEDTHRU_1.json`](./artix7/tile_type_INT_FEEDTHRU_1.json)
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* [`1ff618718c404f469eed1fc7499db1a7bcfa90bf152b317b07511d1e070d7622 ./artix7/tile_type_INT_FEEDTHRU_2.json`](./artix7/tile_type_INT_FEEDTHRU_2.json)
|
||||
* [`08db2bc2bc634b16af1988b445a896ffdbe75e2275647657dd44dbc9e436ec9f ./artix7/tile_type_INT_INTERFACE_L.json`](./artix7/tile_type_INT_INTERFACE_L.json)
|
||||
* [`3f04e660e8a477ae99b5349c70d4bb420ed61c823ead17915a2900cc2210ad46 ./artix7/tile_type_INT_INTERFACE_R.json`](./artix7/tile_type_INT_INTERFACE_R.json)
|
||||
* [`cc47a410209b8beb6140d0216de2b298547116a90f4cd7cf9674785e838f4c36 ./artix7/tile_type_INT_L.json`](./artix7/tile_type_INT_L.json)
|
||||
* [`784502f54f667eb147924b061bc62829588d0e43673f32fd9d45113b6f740457 ./artix7/tile_type_INT_R.json`](./artix7/tile_type_INT_R.json)
|
||||
* [`ffedd570b50dfb9fdd8d1e5065da17d53319cda7e849848ec88d352c767e2d59 ./artix7/tile_type_IO_INT_INTERFACE_L.json`](./artix7/tile_type_IO_INT_INTERFACE_L.json)
|
||||
* [`cf049a6c528634761c6067610f50110102caadc782a33b855f4059df8ed064d9 ./artix7/tile_type_IO_INT_INTERFACE_R.json`](./artix7/tile_type_IO_INT_INTERFACE_R.json)
|
||||
* [`cef7db2efcd92f19a0775c1833e0dd23b3dcb4d016fa8516b7e69c4a658ac630 ./artix7/tile_type_LIOB33.json`](./artix7/tile_type_LIOB33.json)
|
||||
* [`49276f934ed32b1ec0b2eac19b67178119fbc5674d022eec1de5be08b07c4e72 ./artix7/tile_type_LIOB33_SING.json`](./artix7/tile_type_LIOB33_SING.json)
|
||||
* [`801140f147650d8b443e46fa51793181c264bc8d92c8767bb875ae838ae4a062 ./artix7/tile_type_LIOI3.json`](./artix7/tile_type_LIOI3.json)
|
||||
* [`c2932bc581e8b38a7373f5a9a555263ce7aa9d96ad9c4e5675c599b11d86b67b ./artix7/tile_type_LIOI3_SING.json`](./artix7/tile_type_LIOI3_SING.json)
|
||||
* [`b69c2ea84f06bfed085b2f50e1f4dd43033dd5f34ca19e67da42d6c80317cd23 ./artix7/tile_type_LIOI3_TBYTESRC.json`](./artix7/tile_type_LIOI3_TBYTESRC.json)
|
||||
* [`44cf5e287a63932e7b6809f4fc3245ff380ae8ad24ed9b53b8cee45b719517b6 ./artix7/tile_type_LIOI3_TBYTETERM.json`](./artix7/tile_type_LIOI3_TBYTETERM.json)
|
||||
* [`5c6ddebe6aef58fa126d2f1121f2c415737d513b90169c393dfcbe2655251716 ./artix7/tile_type_L_TERM_INT.json`](./artix7/tile_type_L_TERM_INT.json)
|
||||
* [`c5d8bb0e44590428962e16d5083ce84e0d86d7e44e41670227b3e65ef5e65ecb ./artix7/tile_type_MONITOR_BOT.json`](./artix7/tile_type_MONITOR_BOT.json)
|
||||
* [`238155141a620716bff1310b0cc61564b22764b06b87b1de89a018ddbebe41a3 ./artix7/tile_type_MONITOR_MID.json`](./artix7/tile_type_MONITOR_MID.json)
|
||||
* [`1b1d6fc6914a51b801b8a1ea24adb9a8093b2a8b070dbfab0be5966a043489a9 ./artix7/tile_type_MONITOR_TOP.json`](./artix7/tile_type_MONITOR_TOP.json)
|
||||
* [`880cdcd99af7ea01e4ee142860e0900c6c3503da3b3582837fedba1a2cafa852 ./artix7/tile_type_NULL.json`](./artix7/tile_type_NULL.json)
|
||||
* [`a1553083f3d3f703f6fdc25b2e1b5b62e2a68d4371c4edcf3cb3aa8d8e99ec87 ./artix7/tile_type_PCIE_BOT.json`](./artix7/tile_type_PCIE_BOT.json)
|
||||
* [`3e075fbce2e39f99504b7e799de6aa1146aafe32d545b0c7ba791d93751ac58b ./artix7/tile_type_PCIE_INT_INTERFACE_L.json`](./artix7/tile_type_PCIE_INT_INTERFACE_L.json)
|
||||
* [`7640289b2a0635eba0172f8e37e452a53912620fe00572cf57fe4ac4ae0db2be ./artix7/tile_type_PCIE_INT_INTERFACE_R.json`](./artix7/tile_type_PCIE_INT_INTERFACE_R.json)
|
||||
* [`944d9c69913b23cac150f0c80c14284d57fab43f69202a6cc63afaddce23221b ./artix7/tile_type_PCIE_NULL.json`](./artix7/tile_type_PCIE_NULL.json)
|
||||
* [`dc29a2768d5aafea58e032f3d303e34e5e7dae896979ef2fc2fe70165b42cf3e ./artix7/tile_type_PCIE_TOP.json`](./artix7/tile_type_PCIE_TOP.json)
|
||||
* [`a01a9bfa1d6ac7762d56b57487ab1f4efa8f53e77c6fa452adfa3aff120811fb ./artix7/tile_type_RIOB33.json`](./artix7/tile_type_RIOB33.json)
|
||||
* [`66ea3a8940b40915699e7e2fa37b3d65403e7f5d51afe0daf14537e662da9385 ./artix7/tile_type_RIOB33_SING.json`](./artix7/tile_type_RIOB33_SING.json)
|
||||
* [`96029c4d8a29149b3aa063bbcd3a64bbbf28f987e8e491d2630f7e78d47354b2 ./artix7/tile_type_RIOI3.json`](./artix7/tile_type_RIOI3.json)
|
||||
* [`6c8c8745a8bcd8ebcf6396dfda55fd7b958b2de19ac1a926e412716b7d8dd2b2 ./artix7/tile_type_RIOI3_SING.json`](./artix7/tile_type_RIOI3_SING.json)
|
||||
* [`89b4d83a435609119ca878a4cdbfc3fc31c8c30d66459bf3d84b4c8c012c1139 ./artix7/tile_type_RIOI3_TBYTESRC.json`](./artix7/tile_type_RIOI3_TBYTESRC.json)
|
||||
* [`e188cfd52a8cd3edb869bd29a02e95e8cfc06688727982f9c364c54b5d20c409 ./artix7/tile_type_RIOI3_TBYTETERM.json`](./artix7/tile_type_RIOI3_TBYTETERM.json)
|
||||
* [`16627ffc9c74acf89474ad03993367d2210f40d4ab07a8c71c98d9ad652f2ca8 ./artix7/tile_type_R_TERM_INT.json`](./artix7/tile_type_R_TERM_INT.json)
|
||||
* [`fd664b568212b0479342de300f8efc07e8b521960fbb4b9abacb71336fca773b ./artix7/tile_type_R_TERM_INT_GTX.json`](./artix7/tile_type_R_TERM_INT_GTX.json)
|
||||
* [`19503481fb531f7ddc5f92fdc7c97a817ce1cf550e128604041c771f2234b7fa ./artix7/tile_type_TERM_CMT.json`](./artix7/tile_type_TERM_CMT.json)
|
||||
* [`f5ebbeee5575e5fbc1fb5d532f021e4ee8647de21b3874caac655d8c849a9ff3 ./artix7/tile_type_T_TERM_INT.json`](./artix7/tile_type_T_TERM_INT.json)
|
||||
* [`dee783006fa5b5964d20457323cad59171a60397d730e9fe0840389587695727 ./artix7/tile_type_VBRK.json`](./artix7/tile_type_VBRK.json)
|
||||
* [`04409fb1eb974ee5af7e8115bf16aacfd4bda61094c7c4644cc020762a45f6c8 ./artix7/tile_type_VBRK_EXT.json`](./artix7/tile_type_VBRK_EXT.json)
|
||||
* [`004efcd7f9e172780ca7b8c379ec329bcfc52f86beaa1d997f41dbef7ac4a242 ./artix7/tile_type_VFRAME.json`](./artix7/tile_type_VFRAME.json)
|
||||
* [`f24ee0973df88b1dd73e1937a350b09e1dac35d72e57f3f246c267d2426d63b6 ./artix7/tile_type_BRAM_INT_INTERFACE_L.json`](./artix7/tile_type_BRAM_INT_INTERFACE_L.json)
|
||||
* [`c95ac9e2d604c8cc8783732fd378f5aee563db5161265ee56ba2ae8410e9bdbb ./artix7/tile_type_BRAM_INT_INTERFACE_R.json`](./artix7/tile_type_BRAM_INT_INTERFACE_R.json)
|
||||
* [`73ea54de75eaff030c2ee02aa6791bba283c0a91bf6c37fbdd878fdf3b76f88b ./artix7/tile_type_BRAM_L.json`](./artix7/tile_type_BRAM_L.json)
|
||||
* [`85c92e649e0bb187a1fda5861f5b596a5023db1743824b19f7a2f6d326ba8b06 ./artix7/tile_type_BRAM_R.json`](./artix7/tile_type_BRAM_R.json)
|
||||
* [`5fed21fa51d7da12161c39f1f348bdf80b08df28c01d106959e9125c2bbc2ea6 ./artix7/tile_type_BRKH_BRAM.json`](./artix7/tile_type_BRKH_BRAM.json)
|
||||
* [`80a168dd7caa6ab7c91694aca60b15a6bdacf88cf66cdbea5fcc15483c52a448 ./artix7/tile_type_BRKH_B_TERM_INT.json`](./artix7/tile_type_BRKH_B_TERM_INT.json)
|
||||
* [`f3c6f6f895b114fce5aa917dad371892926a80f34cac8e7a084561ad2fe22579 ./artix7/tile_type_BRKH_CLB.json`](./artix7/tile_type_BRKH_CLB.json)
|
||||
* [`f4a1d3eac4ed9046f4b4df9d925b62080d70ac295cd492c008bdd543b5714a7f ./artix7/tile_type_BRKH_CLK.json`](./artix7/tile_type_BRKH_CLK.json)
|
||||
* [`1a81bf9fbc72eb95ba686a6f0ebdcf5afd305ebc4c45a22d38857e83933ce3c1 ./artix7/tile_type_BRKH_CMT.json`](./artix7/tile_type_BRKH_CMT.json)
|
||||
* [`7865b3f082f74329f8d795eda8497ab16f35436dec393ec60fb827127e6858e7 ./artix7/tile_type_BRKH_DSP_L.json`](./artix7/tile_type_BRKH_DSP_L.json)
|
||||
* [`7b3184855f2fcaf13bc7a835b14fd35bc11c72841f2240e51703434ead3e2da3 ./artix7/tile_type_BRKH_DSP_R.json`](./artix7/tile_type_BRKH_DSP_R.json)
|
||||
* [`d0368330d5b3fc313adaa13ee71bfd8488fd8278d19a0b8bc822ac555b314e2e ./artix7/tile_type_BRKH_GTX.json`](./artix7/tile_type_BRKH_GTX.json)
|
||||
* [`6ca4696204303eb6a546a453513c87241480b9a273e99cf2c5512dd7abcca82c ./artix7/tile_type_BRKH_INT.json`](./artix7/tile_type_BRKH_INT.json)
|
||||
* [`8e367e3559ad9e001e3539707711c3931086344d265fddd7f9edff7d65496229 ./artix7/tile_type_BRKH_TERM_INT.json`](./artix7/tile_type_BRKH_TERM_INT.json)
|
||||
* [`569bab17633b363bedb66f1e55da4e36edac937a6653933863ee0a95832c4ccf ./artix7/tile_type_B_TERM_INT.json`](./artix7/tile_type_B_TERM_INT.json)
|
||||
* [`ef7ff05b9b709a8d4cd368e264e796b1fcdd774065e247e584f42a746eb48576 ./artix7/tile_type_CFG_CENTER_BOT.json`](./artix7/tile_type_CFG_CENTER_BOT.json)
|
||||
* [`375a0d6b8c33de1436c8efaa580c611874c10ab6b1dc575bad879d3a9bd3700e ./artix7/tile_type_CFG_CENTER_MID.json`](./artix7/tile_type_CFG_CENTER_MID.json)
|
||||
* [`e4aafa355a8534302dd7ba06fd8ece448b09b7c85b148c6374ee555c8174550c ./artix7/tile_type_CFG_CENTER_TOP.json`](./artix7/tile_type_CFG_CENTER_TOP.json)
|
||||
* [`4abb229d18ed0c58cefd8d2d8955f083e047f92e6367829c0b394ade6ce01f1a ./artix7/tile_type_CLBLL_L.json`](./artix7/tile_type_CLBLL_L.json)
|
||||
* [`88f100fbac0edb7bcbbdbef5daddcc6c4e217826311b395c6d386ff42054f7c4 ./artix7/tile_type_CLBLL_R.json`](./artix7/tile_type_CLBLL_R.json)
|
||||
* [`98ec1f4221138e2d443de313e460541c69dc1ff3708dbaa60b5afcb4b113d94a ./artix7/tile_type_CLBLM_L.json`](./artix7/tile_type_CLBLM_L.json)
|
||||
* [`b0d76a7bd251d5053988f836dc9a3d0bf6aa6b0b88a5ac5da7978884f8568323 ./artix7/tile_type_CLBLM_R.json`](./artix7/tile_type_CLBLM_R.json)
|
||||
* [`b23f24dd36964f7b0fdb46117c58a486a27829f66e4ded74ea56ca4a1439e233 ./artix7/tile_type_CLK_BUFG_BOT_R.json`](./artix7/tile_type_CLK_BUFG_BOT_R.json)
|
||||
* [`a2670c56315bfa6d2c7b264a00bd9f94fc57707070fafa016723052c2ea6c7c7 ./artix7/tile_type_CLK_BUFG_REBUF.json`](./artix7/tile_type_CLK_BUFG_REBUF.json)
|
||||
* [`d4ac8c67a87a05aa8aff48d39e76cb6c58aea0f022ea39c9903d87b14f7be857 ./artix7/tile_type_CLK_BUFG_TOP_R.json`](./artix7/tile_type_CLK_BUFG_TOP_R.json)
|
||||
* [`4511dcbf42306a70f8413845560367a11c4ebef76732738cfe339cc7cbf7a332 ./artix7/tile_type_CLK_FEED.json`](./artix7/tile_type_CLK_FEED.json)
|
||||
* [`ec93b1969c9790afdf8513edf24ccaf28a11fed04128edf7ef8445bd67023f2e ./artix7/tile_type_CLK_HROW_BOT_R.json`](./artix7/tile_type_CLK_HROW_BOT_R.json)
|
||||
* [`7c8961af91160194165e9462e17b6ba88329ffff2b0a4c64726b04920a47eb6d ./artix7/tile_type_CLK_HROW_TOP_R.json`](./artix7/tile_type_CLK_HROW_TOP_R.json)
|
||||
* [`0ab174146714c57d124b00d710e4b61451fd7616330659df7854542a9266cd3f ./artix7/tile_type_CLK_MTBF2.json`](./artix7/tile_type_CLK_MTBF2.json)
|
||||
* [`7465e9e40a7564598e859620faf75bc9c230b5d41a6141c0fc58f1ea7fce7bf2 ./artix7/tile_type_CLK_PMV.json`](./artix7/tile_type_CLK_PMV.json)
|
||||
* [`c7fa3a115807b7a7e26648bfd754df16098aeb40d835cf03355d8ff361f25872 ./artix7/tile_type_CLK_PMV2.json`](./artix7/tile_type_CLK_PMV2.json)
|
||||
* [`b41f19caae976764c738da165f14ee36df6d6c99296fcb829e359b4dce884367 ./artix7/tile_type_CLK_PMV2_SVT.json`](./artix7/tile_type_CLK_PMV2_SVT.json)
|
||||
* [`fbe2edf0894ee5fe23f5aec0e34dce567a2cdaa22805ac6ac1f834b52259522b ./artix7/tile_type_CLK_PMVIOB.json`](./artix7/tile_type_CLK_PMVIOB.json)
|
||||
* [`1dfd3414cd2cd1225ae057f91a904dbac0d868e8a674066e1a0c180743524b9c ./artix7/tile_type_CLK_TERM.json`](./artix7/tile_type_CLK_TERM.json)
|
||||
* [`61eb6b1524330329616ab023459f9e006da8da1d25b64cbbfd48b0b78f6ba4e0 ./artix7/tile_type_CMT_FIFO_L.json`](./artix7/tile_type_CMT_FIFO_L.json)
|
||||
* [`222bf489ac019201cd7bc254cd15057516d404f733f55d1f87605ceeac580f6c ./artix7/tile_type_CMT_FIFO_R.json`](./artix7/tile_type_CMT_FIFO_R.json)
|
||||
* [`07d558eb3839aca7c039bfa1e5f35bf13baa5e2d56593257efbab1a3b62feca7 ./artix7/tile_type_CMT_PMV.json`](./artix7/tile_type_CMT_PMV.json)
|
||||
* [`1591ab4ac65220fbd23662787457ece5aa0705bc829a6bdf61b44884809ba811 ./artix7/tile_type_CMT_PMV_L.json`](./artix7/tile_type_CMT_PMV_L.json)
|
||||
* [`57769617a81131e5a316896a769c232cc2086b52889d47de23b2246bc5fe995d ./artix7/tile_type_CMT_TOP_L_LOWER_B.json`](./artix7/tile_type_CMT_TOP_L_LOWER_B.json)
|
||||
* [`8a6c368c3e963565a2b292f9335b30b112a641c555db9368d9c8883ae4c7ec71 ./artix7/tile_type_CMT_TOP_L_LOWER_T.json`](./artix7/tile_type_CMT_TOP_L_LOWER_T.json)
|
||||
* [`06a1fb26996d3bead018416603299a11736e83dc962ce39e951547c2c12f84c3 ./artix7/tile_type_CMT_TOP_L_UPPER_B.json`](./artix7/tile_type_CMT_TOP_L_UPPER_B.json)
|
||||
* [`a9538db2a74afdca41fcd4de9206421affc07215bbc598cf5bc81f7d7592ce4d ./artix7/tile_type_CMT_TOP_L_UPPER_T.json`](./artix7/tile_type_CMT_TOP_L_UPPER_T.json)
|
||||
* [`a532fc3a6b344e42fd8902b9ea60c923ff0fba293f971b291d67b804cd6ad1b4 ./artix7/tile_type_CMT_TOP_R_LOWER_B.json`](./artix7/tile_type_CMT_TOP_R_LOWER_B.json)
|
||||
* [`fa13788c6f345c68b5ff5e825afbd5c9da434a645da94dd741d5a92a11a45497 ./artix7/tile_type_CMT_TOP_R_LOWER_T.json`](./artix7/tile_type_CMT_TOP_R_LOWER_T.json)
|
||||
* [`c59c2e5523e2cc741f6b4c391c78b44e8d7a9c8cadf4fdc0ecc23839c5f42356 ./artix7/tile_type_CMT_TOP_R_UPPER_B.json`](./artix7/tile_type_CMT_TOP_R_UPPER_B.json)
|
||||
* [`0bb1986d7413f716be083aae57c9ed358e54d78ef484db0166274b95a718b635 ./artix7/tile_type_CMT_TOP_R_UPPER_T.json`](./artix7/tile_type_CMT_TOP_R_UPPER_T.json)
|
||||
* [`059ef3a432f033abc56178ce73ffbf2c03e6ca623a3db200674f84a11bd9b5e4 ./artix7/tile_type_DSP_L.json`](./artix7/tile_type_DSP_L.json)
|
||||
* [`2aa2188d24628bde1cb14094a0ad8d7bde2c8f09194dccdaa798b83854faac69 ./artix7/tile_type_DSP_R.json`](./artix7/tile_type_DSP_R.json)
|
||||
* [`50c6bf591a6546d5c7f969288be2eaf3459daf26be271dfa112747aac03aa36c ./artix7/tile_type_GTP_CHANNEL_0.json`](./artix7/tile_type_GTP_CHANNEL_0.json)
|
||||
* [`985a3d0c63e32d19845d92cb7618f1680b4a4729514b951f8164107f1f657d92 ./artix7/tile_type_GTP_CHANNEL_1.json`](./artix7/tile_type_GTP_CHANNEL_1.json)
|
||||
* [`5f1910a589aa4b6e0d8cceed08b8067ae869c6d172741289ebed5a5c4e1c15e5 ./artix7/tile_type_GTP_CHANNEL_2.json`](./artix7/tile_type_GTP_CHANNEL_2.json)
|
||||
* [`e7f6a6be5d6bfedac6da5eeea6264f270b5d34b8e9e9a7f3bbf61ae50ce6efc5 ./artix7/tile_type_GTP_CHANNEL_3.json`](./artix7/tile_type_GTP_CHANNEL_3.json)
|
||||
* [`b1f7838a6ec1797487dfcb6470641e0296b266aa261a085bafe45454062053d6 ./artix7/tile_type_GTP_COMMON.json`](./artix7/tile_type_GTP_COMMON.json)
|
||||
* [`2814afa5f89acec274909de32a4bd77303210b08a0af97e9b96172dcb923f0e6 ./artix7/tile_type_GTP_INT_INTERFACE.json`](./artix7/tile_type_GTP_INT_INTERFACE.json)
|
||||
* [`fe27db14b76b461aa9b21f596df89860456b63da3d040bc1491cc5ebcd9e21c6 ./artix7/tile_type_HCLK_BRAM.json`](./artix7/tile_type_HCLK_BRAM.json)
|
||||
* [`6a207032a32081ca4119b306e1144b4e0e9bfc890413aac65c558ba14c3fb5ca ./artix7/tile_type_HCLK_CLB.json`](./artix7/tile_type_HCLK_CLB.json)
|
||||
* [`126c398b7ccb8d8790b3e99880bbe0a5a2f5b8577fa072899c49168cb411c97f ./artix7/tile_type_HCLK_CMT.json`](./artix7/tile_type_HCLK_CMT.json)
|
||||
* [`a6c14740eaef31e8a9c846b0ba77745aabc5db83cdae4a1a38b5991321effebc ./artix7/tile_type_HCLK_CMT_L.json`](./artix7/tile_type_HCLK_CMT_L.json)
|
||||
* [`1ee8f9b2ca6f84824725705c135db8e8f21ee0a0c66c034123c2dae5c7b392ba ./artix7/tile_type_HCLK_DSP_L.json`](./artix7/tile_type_HCLK_DSP_L.json)
|
||||
* [`2a121fb98cb89927421fd60fde2d893ff22d32003b6f79279724fa1230459185 ./artix7/tile_type_HCLK_DSP_R.json`](./artix7/tile_type_HCLK_DSP_R.json)
|
||||
* [`7756e9585aa1e0eb50790b1efa4984474fe16fe01d2a2d243f42d7f36123c0ac ./artix7/tile_type_HCLK_FEEDTHRU_1.json`](./artix7/tile_type_HCLK_FEEDTHRU_1.json)
|
||||
* [`bce1ef5bdc632645054a57fa0bc022a3f3c85717a80c1daba3eb9f777836333d ./artix7/tile_type_HCLK_FEEDTHRU_2.json`](./artix7/tile_type_HCLK_FEEDTHRU_2.json)
|
||||
* [`20ffd03177494bd2a2c4565268c345b76802bfbdf711cf863626c104778991ba ./artix7/tile_type_HCLK_FIFO_L.json`](./artix7/tile_type_HCLK_FIFO_L.json)
|
||||
* [`e99855672b287d989067b6a930d4fec25abb30f56bf1fcd2e8d27c25a81c57be ./artix7/tile_type_HCLK_GTX.json`](./artix7/tile_type_HCLK_GTX.json)
|
||||
* [`979fb1ba45151227f96a4b15cc647fcfe3384e36a334cfadb0c60773b09eca78 ./artix7/tile_type_HCLK_INT_INTERFACE.json`](./artix7/tile_type_HCLK_INT_INTERFACE.json)
|
||||
* [`b168549e91632121e51d99b9e681d975bf1aecf04b38600ee834ad318053e3a6 ./artix7/tile_type_HCLK_IOB.json`](./artix7/tile_type_HCLK_IOB.json)
|
||||
* [`3dc8ec8229fd10592c995d43171fe78e8ee2c10b7aeeab055324ec172c0ca2a0 ./artix7/tile_type_HCLK_IOI3.json`](./artix7/tile_type_HCLK_IOI3.json)
|
||||
* [`6025a2c09f21c52b05c9c7e73af7b86e742dd7ca542834fc7d242e7a17fb8ac8 ./artix7/tile_type_HCLK_L.json`](./artix7/tile_type_HCLK_L.json)
|
||||
* [`996f3072b46de1b2fbafa299f43a0775504e9d53b87870d6950b312365b7ff31 ./artix7/tile_type_HCLK_L_BOT_UTURN.json`](./artix7/tile_type_HCLK_L_BOT_UTURN.json)
|
||||
* [`1af49f83d7b2e46a77a0b7f5c2601a68584d85810524c395a35b1eb83b234184 ./artix7/tile_type_HCLK_R.json`](./artix7/tile_type_HCLK_R.json)
|
||||
* [`c826a775653af1ecca24bf696bd7173d0d4713f1e165becdaf95121a7ff736cb ./artix7/tile_type_HCLK_R_BOT_UTURN.json`](./artix7/tile_type_HCLK_R_BOT_UTURN.json)
|
||||
* [`2df032665e26af5c97a814575440731c0d7b2bac733e1b0dcfe42d3870d9d1d7 ./artix7/tile_type_HCLK_TERM.json`](./artix7/tile_type_HCLK_TERM.json)
|
||||
* [`4a8b6af1f3442ca519706c68ccd202e1d4d76704b24ab51fe9da12017ddfa1e8 ./artix7/tile_type_HCLK_TERM_GTX.json`](./artix7/tile_type_HCLK_TERM_GTX.json)
|
||||
* [`4b43030e650607a9c5473a03827fdfbf990d241aa48f4093c71572ff86bf0183 ./artix7/tile_type_HCLK_VBRK.json`](./artix7/tile_type_HCLK_VBRK.json)
|
||||
* [`8f70b2cefb458f2d3ff09123e58a891bd7ece80ae7cab637d738659799709318 ./artix7/tile_type_HCLK_VFRAME.json`](./artix7/tile_type_HCLK_VFRAME.json)
|
||||
* [`432c6ad451ebf276da839671059c761584a6092cac75a4e14ff8f8de71bc923c ./artix7/tile_type_INT_FEEDTHRU_1.json`](./artix7/tile_type_INT_FEEDTHRU_1.json)
|
||||
* [`938be9bbb0126fef543f27913c463e26edd5a8031067ff1a0e961e06823ae7f5 ./artix7/tile_type_INT_FEEDTHRU_2.json`](./artix7/tile_type_INT_FEEDTHRU_2.json)
|
||||
* [`312ea0c10c73169aedd6e53a9465c2a597e922067d0c32a7c0f06a341f044f45 ./artix7/tile_type_INT_INTERFACE_L.json`](./artix7/tile_type_INT_INTERFACE_L.json)
|
||||
* [`20258948fa358760722361c879658b898a6739c2ba9c9bd83bf7eb776a15792c ./artix7/tile_type_INT_INTERFACE_R.json`](./artix7/tile_type_INT_INTERFACE_R.json)
|
||||
* [`bd1bd64243d040c0414b7f17007dcde384dfedfd59fa60b795bc8971d04f881c ./artix7/tile_type_INT_L.json`](./artix7/tile_type_INT_L.json)
|
||||
* [`dc8af3f4e2e58cf2f43e234e599c8efaf7a89a7814d2421e60c416ad74bb7e43 ./artix7/tile_type_INT_R.json`](./artix7/tile_type_INT_R.json)
|
||||
* [`38201dd56bf01cd6e1092bca36673b253e7150e78491218f173cda5c5c22fd3c ./artix7/tile_type_IO_INT_INTERFACE_L.json`](./artix7/tile_type_IO_INT_INTERFACE_L.json)
|
||||
* [`eee676d3887fb0d19ba1054ed73fe691745d524b3852053d0a5544f907e240c8 ./artix7/tile_type_IO_INT_INTERFACE_R.json`](./artix7/tile_type_IO_INT_INTERFACE_R.json)
|
||||
* [`2c340ecefcfd3593590bbc643f942aa61aecb064c20e07b7c053f8385bb77140 ./artix7/tile_type_LIOB33.json`](./artix7/tile_type_LIOB33.json)
|
||||
* [`56ec8306be201e68eb7e9afd92676fa20e1c79060752747c8c7b46e0e4288272 ./artix7/tile_type_LIOB33_SING.json`](./artix7/tile_type_LIOB33_SING.json)
|
||||
* [`740ceb1909ebde6ce30d4fc5f998756d8161679460e6c1600dea9f6186e876de ./artix7/tile_type_LIOI3.json`](./artix7/tile_type_LIOI3.json)
|
||||
* [`cd6a9a8088d56c5cb58ca65c2af7fa21ec698a5085c67c2bee5356c7dfe7e2d9 ./artix7/tile_type_LIOI3_SING.json`](./artix7/tile_type_LIOI3_SING.json)
|
||||
* [`38abc8d080045362e8e3ac3bbf6a78524d5144e47b9535af121dd09e8879feea ./artix7/tile_type_LIOI3_TBYTESRC.json`](./artix7/tile_type_LIOI3_TBYTESRC.json)
|
||||
* [`6d3eef91c2a006068cc82dc27de5b4a69d2cb0b933cdf3d25d7ba468463b8191 ./artix7/tile_type_LIOI3_TBYTETERM.json`](./artix7/tile_type_LIOI3_TBYTETERM.json)
|
||||
* [`003b6a50e4270b7f8f42ca73e70e7eab1213776224e4b61eed1493a722c4e2ba ./artix7/tile_type_L_TERM_INT.json`](./artix7/tile_type_L_TERM_INT.json)
|
||||
* [`50649b6b366d6d92c81059ce256f32d7a971914afcebe10bbcffc01f36214344 ./artix7/tile_type_MONITOR_BOT.json`](./artix7/tile_type_MONITOR_BOT.json)
|
||||
* [`1d22cd2e3d332a1fd59838d5fd29bf2ede3ae6245e0dd9bf5dddc74b48ff8e43 ./artix7/tile_type_MONITOR_MID.json`](./artix7/tile_type_MONITOR_MID.json)
|
||||
* [`b29e9a03c9a8de7ded59c340aaa8cb7c0dd3ad7f0ab71ab6df47926689af1646 ./artix7/tile_type_MONITOR_TOP.json`](./artix7/tile_type_MONITOR_TOP.json)
|
||||
* [`d430688c70e289f09318774410f2f55e53639c3544fca8a3c98d420f714b0c2f ./artix7/tile_type_NULL.json`](./artix7/tile_type_NULL.json)
|
||||
* [`6c20286e433b192a4e9f3ce5294c41e0db0e6a8a7d1a5a059c79740184944bab ./artix7/tile_type_PCIE_BOT.json`](./artix7/tile_type_PCIE_BOT.json)
|
||||
* [`c979c92a3ffb104dcce156b33058704ce9621f9017c7103ffe4a31f557801153 ./artix7/tile_type_PCIE_INT_INTERFACE_L.json`](./artix7/tile_type_PCIE_INT_INTERFACE_L.json)
|
||||
* [`b6cb64602b7b1d78c15c1cdaa91694349ad910df2933b3587e027959b029d050 ./artix7/tile_type_PCIE_INT_INTERFACE_R.json`](./artix7/tile_type_PCIE_INT_INTERFACE_R.json)
|
||||
* [`a246242840607ca7b8e3b45d44d7cf7fcc145fad4c973536575742c8b9bc9a42 ./artix7/tile_type_PCIE_NULL.json`](./artix7/tile_type_PCIE_NULL.json)
|
||||
* [`d9f5211e458842b50665da09b02f4110bbc6483b726a15e5565d3ace2f89ef61 ./artix7/tile_type_PCIE_TOP.json`](./artix7/tile_type_PCIE_TOP.json)
|
||||
* [`7469d05ba321c92ed72125d2894f717b5741ce7444a8265ae51cc6a2c547a491 ./artix7/tile_type_RIOB33.json`](./artix7/tile_type_RIOB33.json)
|
||||
* [`73eb4020bd019345fcab4dec38d9a2347699435966caa4bd63cecf87a7b8a637 ./artix7/tile_type_RIOB33_SING.json`](./artix7/tile_type_RIOB33_SING.json)
|
||||
* [`28fc261c4a72fdd55dfae4767ad45e5d9012c076176630081b37dc3e398a5733 ./artix7/tile_type_RIOI3.json`](./artix7/tile_type_RIOI3.json)
|
||||
* [`0764e356af2b42ce068f350a5abab46c4021e9d4656c47d001838eabedccedcf ./artix7/tile_type_RIOI3_SING.json`](./artix7/tile_type_RIOI3_SING.json)
|
||||
* [`923f6464d46c448d8dd8accac4cca89e5cbca93c0c936a7d821831cc03e83f1b ./artix7/tile_type_RIOI3_TBYTESRC.json`](./artix7/tile_type_RIOI3_TBYTESRC.json)
|
||||
* [`34b98b494b3dc9a3ba1cca9a9de12f34de70d2f26ea62234516576fa8037cd80 ./artix7/tile_type_RIOI3_TBYTETERM.json`](./artix7/tile_type_RIOI3_TBYTETERM.json)
|
||||
* [`f8636b98f24c07c250ea284be61826439e4557a3d75c8571cc3c00bc47d61f8c ./artix7/tile_type_R_TERM_INT.json`](./artix7/tile_type_R_TERM_INT.json)
|
||||
* [`18e900373fe56da5f2ea19585effeee554c38f63437e6a5c26b00491a3952d99 ./artix7/tile_type_R_TERM_INT_GTX.json`](./artix7/tile_type_R_TERM_INT_GTX.json)
|
||||
* [`fc909565278739a6beeb94d5bcb0780a6ec3dfa2d0f83389699974abc3d0427a ./artix7/tile_type_TERM_CMT.json`](./artix7/tile_type_TERM_CMT.json)
|
||||
* [`372e4b47e58b79d8d6d587ee1459a576edbd7eebad7e8a49eba3e2c71cf3a536 ./artix7/tile_type_T_TERM_INT.json`](./artix7/tile_type_T_TERM_INT.json)
|
||||
* [`9d6388021982de6d4a676c2c2fe6543029a2f44db45d290f4e827d35b91a2a6b ./artix7/tile_type_VBRK.json`](./artix7/tile_type_VBRK.json)
|
||||
* [`5fb8795e142a7bc6955e6c50089540c890aeb3b3a6c326e6e24a6e4983d91f62 ./artix7/tile_type_VBRK_EXT.json`](./artix7/tile_type_VBRK_EXT.json)
|
||||
* [`63851d7ed48855486ee7e04a6332935799e8d2f3524ec6d627ea6e5d2e7cbfa4 ./artix7/tile_type_VFRAME.json`](./artix7/tile_type_VFRAME.json)
|
||||
* [`1604d48580815e26069c2b4909fcc50e8e8f974ad0beb349ced2329c302bb06b ./artix7/tileconn.json`](./artix7/tileconn.json)
|
||||
* [`08912d58cee8057f7557c307700162b1d3437766adeb95a79980bf3602a7a779 ./artix7/tilegrid.json`](./artix7/tilegrid.json)
|
||||
* [`81327800f346931997047359f13f351a0ee95301d3f7ccf894c3335b9b5341a4 ./artix7/timings/BRAM_INT_INTERFACE_L.sdf`](./artix7/timings/BRAM_INT_INTERFACE_L.sdf)
|
||||
|
|
@ -406,18 +406,18 @@ Results have checksums;
|
|||
* [`366802adb3810a1cecf1674f01fe1a97f1338a7455d7a6e4796aa004311b9c8a ./artix7/timings/CMT_FIFO_R.sdf`](./artix7/timings/CMT_FIFO_R.sdf)
|
||||
* [`81327800f346931997047359f13f351a0ee95301d3f7ccf894c3335b9b5341a4 ./artix7/timings/CMT_PMV.sdf`](./artix7/timings/CMT_PMV.sdf)
|
||||
* [`81327800f346931997047359f13f351a0ee95301d3f7ccf894c3335b9b5341a4 ./artix7/timings/CMT_PMV_L.sdf`](./artix7/timings/CMT_PMV_L.sdf)
|
||||
* [`8c641a845fdd56842eec7c5fe72ddbd26654593313516137b88dcb5ea83a1920 ./artix7/timings/CMT_TOP_L_LOWER_B.sdf`](./artix7/timings/CMT_TOP_L_LOWER_B.sdf)
|
||||
* [`c2e66425da5018d6e7aa2b0aec721bcecfdba26bfa26016598cd28e3112fffc4 ./artix7/timings/CMT_TOP_L_LOWER_B.sdf`](./artix7/timings/CMT_TOP_L_LOWER_B.sdf)
|
||||
* [`35863307207f2f40fdbf61f5a5065b0112305594d5375a758491ee52e2a848a8 ./artix7/timings/CMT_TOP_L_LOWER_T.sdf`](./artix7/timings/CMT_TOP_L_LOWER_T.sdf)
|
||||
* [`e8fdd4747aa8be4e39fe2ae27f51c8442c754485c8506fc5b021150f08289e95 ./artix7/timings/CMT_TOP_L_UPPER_B.sdf`](./artix7/timings/CMT_TOP_L_UPPER_B.sdf)
|
||||
* [`5a70eb78c2a91cef8d2322645ac12acef53241d264ce548017620963e396a8a9 ./artix7/timings/CMT_TOP_L_UPPER_T.sdf`](./artix7/timings/CMT_TOP_L_UPPER_T.sdf)
|
||||
* [`8c641a845fdd56842eec7c5fe72ddbd26654593313516137b88dcb5ea83a1920 ./artix7/timings/CMT_TOP_R_LOWER_B.sdf`](./artix7/timings/CMT_TOP_R_LOWER_B.sdf)
|
||||
* [`c2e66425da5018d6e7aa2b0aec721bcecfdba26bfa26016598cd28e3112fffc4 ./artix7/timings/CMT_TOP_R_LOWER_B.sdf`](./artix7/timings/CMT_TOP_R_LOWER_B.sdf)
|
||||
* [`35863307207f2f40fdbf61f5a5065b0112305594d5375a758491ee52e2a848a8 ./artix7/timings/CMT_TOP_R_LOWER_T.sdf`](./artix7/timings/CMT_TOP_R_LOWER_T.sdf)
|
||||
* [`e8fdd4747aa8be4e39fe2ae27f51c8442c754485c8506fc5b021150f08289e95 ./artix7/timings/CMT_TOP_R_UPPER_B.sdf`](./artix7/timings/CMT_TOP_R_UPPER_B.sdf)
|
||||
* [`5a70eb78c2a91cef8d2322645ac12acef53241d264ce548017620963e396a8a9 ./artix7/timings/CMT_TOP_R_UPPER_T.sdf`](./artix7/timings/CMT_TOP_R_UPPER_T.sdf)
|
||||
* [`6e723a9ad0acfa2a322e4fb2fed8b94c9f188d72bdf4e370e0e79860f1cbba92 ./artix7/timings/GTP_CHANNEL_0.sdf`](./artix7/timings/GTP_CHANNEL_0.sdf)
|
||||
* [`6e723a9ad0acfa2a322e4fb2fed8b94c9f188d72bdf4e370e0e79860f1cbba92 ./artix7/timings/GTP_CHANNEL_1.sdf`](./artix7/timings/GTP_CHANNEL_1.sdf)
|
||||
* [`6e723a9ad0acfa2a322e4fb2fed8b94c9f188d72bdf4e370e0e79860f1cbba92 ./artix7/timings/GTP_CHANNEL_2.sdf`](./artix7/timings/GTP_CHANNEL_2.sdf)
|
||||
* [`6e723a9ad0acfa2a322e4fb2fed8b94c9f188d72bdf4e370e0e79860f1cbba92 ./artix7/timings/GTP_CHANNEL_3.sdf`](./artix7/timings/GTP_CHANNEL_3.sdf)
|
||||
* [`b370f0075dfa4e4355433f9e06daf50f53b174cbd4d4e1a3e7a031db644b5af7 ./artix7/timings/GTP_CHANNEL_0.sdf`](./artix7/timings/GTP_CHANNEL_0.sdf)
|
||||
* [`b370f0075dfa4e4355433f9e06daf50f53b174cbd4d4e1a3e7a031db644b5af7 ./artix7/timings/GTP_CHANNEL_1.sdf`](./artix7/timings/GTP_CHANNEL_1.sdf)
|
||||
* [`b370f0075dfa4e4355433f9e06daf50f53b174cbd4d4e1a3e7a031db644b5af7 ./artix7/timings/GTP_CHANNEL_2.sdf`](./artix7/timings/GTP_CHANNEL_2.sdf)
|
||||
* [`b370f0075dfa4e4355433f9e06daf50f53b174cbd4d4e1a3e7a031db644b5af7 ./artix7/timings/GTP_CHANNEL_3.sdf`](./artix7/timings/GTP_CHANNEL_3.sdf)
|
||||
* [`aa79f422942e6767be523045374d542a4a51262eb7af8a5bd6c64312ff1b2927 ./artix7/timings/GTP_COMMON.sdf`](./artix7/timings/GTP_COMMON.sdf)
|
||||
* [`81327800f346931997047359f13f351a0ee95301d3f7ccf894c3335b9b5341a4 ./artix7/timings/GTP_INT_INTERFACE.sdf`](./artix7/timings/GTP_INT_INTERFACE.sdf)
|
||||
* [`81327800f346931997047359f13f351a0ee95301d3f7ccf894c3335b9b5341a4 ./artix7/timings/HCLK_BRAM.sdf`](./artix7/timings/HCLK_BRAM.sdf)
|
||||
|
|
@ -451,10 +451,10 @@ Results have checksums;
|
|||
* [`81327800f346931997047359f13f351a0ee95301d3f7ccf894c3335b9b5341a4 ./artix7/timings/IO_INT_INTERFACE_R.sdf`](./artix7/timings/IO_INT_INTERFACE_R.sdf)
|
||||
* [`9313a012de7cbb7120baf15fe30bf8d44b238cad6226ece1a9776746e2857863 ./artix7/timings/LIOB33.sdf`](./artix7/timings/LIOB33.sdf)
|
||||
* [`0fdaf6a593346b5cac8899eebf4f62d1732d6d6fb0a17c9f4b6a4e54e03c3523 ./artix7/timings/LIOB33_SING.sdf`](./artix7/timings/LIOB33_SING.sdf)
|
||||
* [`02c0fd3d714b5b7f4ba97d3575ae517360cb6a010f0a2a562a3be824b7d0b401 ./artix7/timings/LIOI3.sdf`](./artix7/timings/LIOI3.sdf)
|
||||
* [`02c0fd3d714b5b7f4ba97d3575ae517360cb6a010f0a2a562a3be824b7d0b401 ./artix7/timings/LIOI3_SING.sdf`](./artix7/timings/LIOI3_SING.sdf)
|
||||
* [`02c0fd3d714b5b7f4ba97d3575ae517360cb6a010f0a2a562a3be824b7d0b401 ./artix7/timings/LIOI3_TBYTESRC.sdf`](./artix7/timings/LIOI3_TBYTESRC.sdf)
|
||||
* [`02c0fd3d714b5b7f4ba97d3575ae517360cb6a010f0a2a562a3be824b7d0b401 ./artix7/timings/LIOI3_TBYTETERM.sdf`](./artix7/timings/LIOI3_TBYTETERM.sdf)
|
||||
* [`fcde8675e577127516c2362f39a19ae75e6674eb53662a31b42ffddefdd8e8e4 ./artix7/timings/LIOI3.sdf`](./artix7/timings/LIOI3.sdf)
|
||||
* [`fcde8675e577127516c2362f39a19ae75e6674eb53662a31b42ffddefdd8e8e4 ./artix7/timings/LIOI3_SING.sdf`](./artix7/timings/LIOI3_SING.sdf)
|
||||
* [`fcde8675e577127516c2362f39a19ae75e6674eb53662a31b42ffddefdd8e8e4 ./artix7/timings/LIOI3_TBYTESRC.sdf`](./artix7/timings/LIOI3_TBYTESRC.sdf)
|
||||
* [`fcde8675e577127516c2362f39a19ae75e6674eb53662a31b42ffddefdd8e8e4 ./artix7/timings/LIOI3_TBYTETERM.sdf`](./artix7/timings/LIOI3_TBYTETERM.sdf)
|
||||
* [`81327800f346931997047359f13f351a0ee95301d3f7ccf894c3335b9b5341a4 ./artix7/timings/L_TERM_INT.sdf`](./artix7/timings/L_TERM_INT.sdf)
|
||||
* [`2af03d31603e237767ecaef977f8b6050c71d32a7632330ac8f42909dc22befc ./artix7/timings/MONITOR_BOT.sdf`](./artix7/timings/MONITOR_BOT.sdf)
|
||||
* [`81327800f346931997047359f13f351a0ee95301d3f7ccf894c3335b9b5341a4 ./artix7/timings/MONITOR_MID.sdf`](./artix7/timings/MONITOR_MID.sdf)
|
||||
|
|
@ -466,10 +466,10 @@ Results have checksums;
|
|||
* [`81327800f346931997047359f13f351a0ee95301d3f7ccf894c3335b9b5341a4 ./artix7/timings/PCIE_TOP.sdf`](./artix7/timings/PCIE_TOP.sdf)
|
||||
* [`9313a012de7cbb7120baf15fe30bf8d44b238cad6226ece1a9776746e2857863 ./artix7/timings/RIOB33.sdf`](./artix7/timings/RIOB33.sdf)
|
||||
* [`0fdaf6a593346b5cac8899eebf4f62d1732d6d6fb0a17c9f4b6a4e54e03c3523 ./artix7/timings/RIOB33_SING.sdf`](./artix7/timings/RIOB33_SING.sdf)
|
||||
* [`02c0fd3d714b5b7f4ba97d3575ae517360cb6a010f0a2a562a3be824b7d0b401 ./artix7/timings/RIOI3.sdf`](./artix7/timings/RIOI3.sdf)
|
||||
* [`02c0fd3d714b5b7f4ba97d3575ae517360cb6a010f0a2a562a3be824b7d0b401 ./artix7/timings/RIOI3_SING.sdf`](./artix7/timings/RIOI3_SING.sdf)
|
||||
* [`02c0fd3d714b5b7f4ba97d3575ae517360cb6a010f0a2a562a3be824b7d0b401 ./artix7/timings/RIOI3_TBYTESRC.sdf`](./artix7/timings/RIOI3_TBYTESRC.sdf)
|
||||
* [`02c0fd3d714b5b7f4ba97d3575ae517360cb6a010f0a2a562a3be824b7d0b401 ./artix7/timings/RIOI3_TBYTETERM.sdf`](./artix7/timings/RIOI3_TBYTETERM.sdf)
|
||||
* [`fcde8675e577127516c2362f39a19ae75e6674eb53662a31b42ffddefdd8e8e4 ./artix7/timings/RIOI3.sdf`](./artix7/timings/RIOI3.sdf)
|
||||
* [`fcde8675e577127516c2362f39a19ae75e6674eb53662a31b42ffddefdd8e8e4 ./artix7/timings/RIOI3_SING.sdf`](./artix7/timings/RIOI3_SING.sdf)
|
||||
* [`fcde8675e577127516c2362f39a19ae75e6674eb53662a31b42ffddefdd8e8e4 ./artix7/timings/RIOI3_TBYTESRC.sdf`](./artix7/timings/RIOI3_TBYTESRC.sdf)
|
||||
* [`fcde8675e577127516c2362f39a19ae75e6674eb53662a31b42ffddefdd8e8e4 ./artix7/timings/RIOI3_TBYTETERM.sdf`](./artix7/timings/RIOI3_TBYTETERM.sdf)
|
||||
* [`81327800f346931997047359f13f351a0ee95301d3f7ccf894c3335b9b5341a4 ./artix7/timings/R_TERM_INT.sdf`](./artix7/timings/R_TERM_INT.sdf)
|
||||
* [`81327800f346931997047359f13f351a0ee95301d3f7ccf894c3335b9b5341a4 ./artix7/timings/R_TERM_INT_GTX.sdf`](./artix7/timings/R_TERM_INT_GTX.sdf)
|
||||
* [`81327800f346931997047359f13f351a0ee95301d3f7ccf894c3335b9b5341a4 ./artix7/timings/TERM_CMT.sdf`](./artix7/timings/TERM_CMT.sdf)
|
||||
|
|
@ -494,7 +494,7 @@ Results have checksums;
|
|||
|
||||
### Settings
|
||||
|
||||
Created using following [settings/kintex7.sh (sha256: 794538b550d399255cbafeeb1b5ff183dc66ebc6cd8dc0f725e3f6a3977f757d)](https://github.com/SymbiFlow/prjxray/blob/e8299f64042c2ce52d358d8c7cf57e467bf7293b/settings/kintex7.sh)
|
||||
Created using following [settings/kintex7.sh (sha256: 794538b550d399255cbafeeb1b5ff183dc66ebc6cd8dc0f725e3f6a3977f757d)](https://github.com/SymbiFlow/prjxray/blob/0bddcaf90872d961f6aaf21848cb97c3777ff307/settings/kintex7.sh)
|
||||
```shell
|
||||
export XRAY_DATABASE="kintex7"
|
||||
export XRAY_PART="xc7k70tfbg676-2"
|
||||
|
|
@ -798,7 +798,7 @@ Results have checksums;
|
|||
|
||||
### Settings
|
||||
|
||||
Created using following [settings/zynq7.sh (sha256: 61298e89dcc873eadba47f5c2f9f72a38fa022583b2c7ff89246b2e051585ad8)](https://github.com/SymbiFlow/prjxray/blob/e8299f64042c2ce52d358d8c7cf57e467bf7293b/settings/zynq7.sh)
|
||||
Created using following [settings/zynq7.sh (sha256: 61298e89dcc873eadba47f5c2f9f72a38fa022583b2c7ff89246b2e051585ad8)](https://github.com/SymbiFlow/prjxray/blob/0bddcaf90872d961f6aaf21848cb97c3777ff307/settings/zynq7.sh)
|
||||
```shell
|
||||
export XRAY_DATABASE="zynq7"
|
||||
export XRAY_PART="xc7z010clg400-1"
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -2,70 +2,70 @@
|
|||
"pips": {},
|
||||
"sites": [],
|
||||
"tile_type": "BRKH_BRAM",
|
||||
"wires": [
|
||||
"BRKH_BRAM_CASCADEA_L",
|
||||
"BRKH_BRAM_CASCADEA_R",
|
||||
"BRKH_BRAM_CASCADEB_L",
|
||||
"BRKH_BRAM_CASCADEB_R",
|
||||
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU0",
|
||||
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU1",
|
||||
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU10",
|
||||
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU11",
|
||||
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU12",
|
||||
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU13",
|
||||
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU14",
|
||||
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU2",
|
||||
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU3",
|
||||
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU4",
|
||||
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU5",
|
||||
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU6",
|
||||
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU7",
|
||||
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU8",
|
||||
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU9",
|
||||
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU0",
|
||||
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU1",
|
||||
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU10",
|
||||
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU11",
|
||||
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU12",
|
||||
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU13",
|
||||
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU14",
|
||||
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU2",
|
||||
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU3",
|
||||
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU4",
|
||||
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU5",
|
||||
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU6",
|
||||
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU7",
|
||||
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU8",
|
||||
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU9",
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU0",
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU1",
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU10",
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU11",
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU12",
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU13",
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU14",
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU2",
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU3",
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU4",
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU5",
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU6",
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU7",
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU8",
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU9",
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU0",
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU1",
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU10",
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU11",
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU12",
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU13",
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU14",
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU2",
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU3",
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU4",
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU5",
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU6",
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU7",
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU8",
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU9"
|
||||
]
|
||||
"wires": {
|
||||
"BRKH_BRAM_CASCADEA_L": null,
|
||||
"BRKH_BRAM_CASCADEA_R": null,
|
||||
"BRKH_BRAM_CASCADEB_L": null,
|
||||
"BRKH_BRAM_CASCADEB_R": null,
|
||||
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU0": null,
|
||||
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU1": null,
|
||||
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU10": null,
|
||||
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU11": null,
|
||||
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU12": null,
|
||||
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU13": null,
|
||||
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU14": null,
|
||||
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU2": null,
|
||||
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU3": null,
|
||||
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU4": null,
|
||||
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU5": null,
|
||||
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU6": null,
|
||||
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU7": null,
|
||||
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU8": null,
|
||||
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU9": null,
|
||||
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU0": null,
|
||||
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU1": null,
|
||||
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU10": null,
|
||||
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU11": null,
|
||||
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU12": null,
|
||||
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU13": null,
|
||||
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU14": null,
|
||||
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU2": null,
|
||||
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU3": null,
|
||||
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU4": null,
|
||||
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU5": null,
|
||||
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU6": null,
|
||||
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU7": null,
|
||||
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU8": null,
|
||||
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU9": null,
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU0": null,
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU1": null,
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU10": null,
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU11": null,
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU12": null,
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU13": null,
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU14": null,
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU2": null,
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU3": null,
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU4": null,
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU5": null,
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU6": null,
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU7": null,
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU8": null,
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU9": null,
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU0": null,
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU1": null,
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU10": null,
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU11": null,
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU12": null,
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU13": null,
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU14": null,
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU2": null,
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU3": null,
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU4": null,
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU5": null,
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU6": null,
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU7": null,
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU8": null,
|
||||
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU9": null
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,124 +2,214 @@
|
|||
"pips": {},
|
||||
"sites": [],
|
||||
"tile_type": "BRKH_B_TERM_INT",
|
||||
"wires": [
|
||||
"B_TERM_UTURN_INT_ER1BEG0",
|
||||
"B_TERM_UTURN_INT_ER1END_N3_3",
|
||||
"B_TERM_UTURN_INT_FAN_BOUNCE0",
|
||||
"B_TERM_UTURN_INT_FAN_BOUNCE2",
|
||||
"B_TERM_UTURN_INT_FAN_BOUNCE4",
|
||||
"B_TERM_UTURN_INT_FAN_BOUNCE6",
|
||||
"B_TERM_UTURN_INT_LV18",
|
||||
"B_TERM_UTURN_INT_LV2",
|
||||
"B_TERM_UTURN_INT_LV3",
|
||||
"B_TERM_UTURN_INT_LV4",
|
||||
"B_TERM_UTURN_INT_LV5",
|
||||
"B_TERM_UTURN_INT_LV6",
|
||||
"B_TERM_UTURN_INT_LV7",
|
||||
"B_TERM_UTURN_INT_LV8",
|
||||
"B_TERM_UTURN_INT_LV9",
|
||||
"B_TERM_UTURN_INT_LVB0",
|
||||
"B_TERM_UTURN_INT_LVB1",
|
||||
"B_TERM_UTURN_INT_LVB2",
|
||||
"B_TERM_UTURN_INT_LVB3",
|
||||
"B_TERM_UTURN_INT_LVB4",
|
||||
"B_TERM_UTURN_INT_LVB5",
|
||||
"B_TERM_UTURN_INT_LVB_L0",
|
||||
"B_TERM_UTURN_INT_LVB_L1",
|
||||
"B_TERM_UTURN_INT_LVB_L2",
|
||||
"B_TERM_UTURN_INT_LVB_L3",
|
||||
"B_TERM_UTURN_INT_LVB_L4",
|
||||
"B_TERM_UTURN_INT_LVB_L5",
|
||||
"B_TERM_UTURN_INT_LV_L18",
|
||||
"B_TERM_UTURN_INT_LV_L2",
|
||||
"B_TERM_UTURN_INT_LV_L3",
|
||||
"B_TERM_UTURN_INT_LV_L4",
|
||||
"B_TERM_UTURN_INT_LV_L5",
|
||||
"B_TERM_UTURN_INT_LV_L6",
|
||||
"B_TERM_UTURN_INT_LV_L7",
|
||||
"B_TERM_UTURN_INT_LV_L8",
|
||||
"B_TERM_UTURN_INT_LV_L9",
|
||||
"B_TERM_UTURN_INT_SE2BEG0",
|
||||
"B_TERM_UTURN_INT_SE2BEG1",
|
||||
"B_TERM_UTURN_INT_SE2BEG2",
|
||||
"B_TERM_UTURN_INT_SE2BEG3",
|
||||
"B_TERM_UTURN_INT_SE6A0",
|
||||
"B_TERM_UTURN_INT_SE6A1",
|
||||
"B_TERM_UTURN_INT_SE6A2",
|
||||
"B_TERM_UTURN_INT_SE6A3",
|
||||
"B_TERM_UTURN_INT_SE6B0",
|
||||
"B_TERM_UTURN_INT_SE6B1",
|
||||
"B_TERM_UTURN_INT_SE6B2",
|
||||
"B_TERM_UTURN_INT_SE6B3",
|
||||
"B_TERM_UTURN_INT_SE6C0",
|
||||
"B_TERM_UTURN_INT_SE6C1",
|
||||
"B_TERM_UTURN_INT_SE6C2",
|
||||
"B_TERM_UTURN_INT_SE6C3",
|
||||
"B_TERM_UTURN_INT_SE6D0",
|
||||
"B_TERM_UTURN_INT_SE6D1",
|
||||
"B_TERM_UTURN_INT_SE6D2",
|
||||
"B_TERM_UTURN_INT_SE6D3",
|
||||
"B_TERM_UTURN_INT_SL1BEG0",
|
||||
"B_TERM_UTURN_INT_SL1BEG1",
|
||||
"B_TERM_UTURN_INT_SL1BEG2",
|
||||
"B_TERM_UTURN_INT_SL1BEG3",
|
||||
"B_TERM_UTURN_INT_SR1BEG1",
|
||||
"B_TERM_UTURN_INT_SR1BEG2",
|
||||
"B_TERM_UTURN_INT_SR1BEG3",
|
||||
"B_TERM_UTURN_INT_SS2A0",
|
||||
"B_TERM_UTURN_INT_SS2A1",
|
||||
"B_TERM_UTURN_INT_SS2A2",
|
||||
"B_TERM_UTURN_INT_SS2A3",
|
||||
"B_TERM_UTURN_INT_SS2BEG0",
|
||||
"B_TERM_UTURN_INT_SS2BEG1",
|
||||
"B_TERM_UTURN_INT_SS2BEG2",
|
||||
"B_TERM_UTURN_INT_SS2BEG3",
|
||||
"B_TERM_UTURN_INT_SS6A0",
|
||||
"B_TERM_UTURN_INT_SS6A1",
|
||||
"B_TERM_UTURN_INT_SS6A2",
|
||||
"B_TERM_UTURN_INT_SS6A3",
|
||||
"B_TERM_UTURN_INT_SS6B0",
|
||||
"B_TERM_UTURN_INT_SS6B1",
|
||||
"B_TERM_UTURN_INT_SS6B2",
|
||||
"B_TERM_UTURN_INT_SS6B3",
|
||||
"B_TERM_UTURN_INT_SS6BEG0",
|
||||
"B_TERM_UTURN_INT_SS6BEG1",
|
||||
"B_TERM_UTURN_INT_SS6BEG2",
|
||||
"B_TERM_UTURN_INT_SS6BEG3",
|
||||
"B_TERM_UTURN_INT_SS6C0",
|
||||
"B_TERM_UTURN_INT_SS6C1",
|
||||
"B_TERM_UTURN_INT_SS6C2",
|
||||
"B_TERM_UTURN_INT_SS6C3",
|
||||
"B_TERM_UTURN_INT_SS6D0",
|
||||
"B_TERM_UTURN_INT_SS6D1",
|
||||
"B_TERM_UTURN_INT_SS6D2",
|
||||
"B_TERM_UTURN_INT_SS6D3",
|
||||
"B_TERM_UTURN_INT_SS6E0",
|
||||
"B_TERM_UTURN_INT_SS6E1",
|
||||
"B_TERM_UTURN_INT_SS6E2",
|
||||
"B_TERM_UTURN_INT_SS6E3",
|
||||
"B_TERM_UTURN_INT_SW2BEG0",
|
||||
"B_TERM_UTURN_INT_SW2BEG1",
|
||||
"B_TERM_UTURN_INT_SW2BEG2",
|
||||
"B_TERM_UTURN_INT_SW2BEG3",
|
||||
"B_TERM_UTURN_INT_SW6A0",
|
||||
"B_TERM_UTURN_INT_SW6A1",
|
||||
"B_TERM_UTURN_INT_SW6A2",
|
||||
"B_TERM_UTURN_INT_SW6A3",
|
||||
"B_TERM_UTURN_INT_SW6B0",
|
||||
"B_TERM_UTURN_INT_SW6B1",
|
||||
"B_TERM_UTURN_INT_SW6B2",
|
||||
"B_TERM_UTURN_INT_SW6B3",
|
||||
"B_TERM_UTURN_INT_SW6C0",
|
||||
"B_TERM_UTURN_INT_SW6C1",
|
||||
"B_TERM_UTURN_INT_SW6C2",
|
||||
"B_TERM_UTURN_INT_SW6C3",
|
||||
"B_TERM_UTURN_INT_SW6D0",
|
||||
"B_TERM_UTURN_INT_SW6D1",
|
||||
"B_TERM_UTURN_INT_SW6D2",
|
||||
"B_TERM_UTURN_INT_SW6D3",
|
||||
"B_TERM_UTURN_INT_SW6END_N0_3",
|
||||
"B_TERM_UTURN_INT_WR1BEG0",
|
||||
"B_TERM_UTURN_INT_WR1END0"
|
||||
]
|
||||
"wires": {
|
||||
"B_TERM_UTURN_INT_ER1BEG0": null,
|
||||
"B_TERM_UTURN_INT_ER1END_N3_3": null,
|
||||
"B_TERM_UTURN_INT_FAN_BOUNCE0": null,
|
||||
"B_TERM_UTURN_INT_FAN_BOUNCE2": null,
|
||||
"B_TERM_UTURN_INT_FAN_BOUNCE4": null,
|
||||
"B_TERM_UTURN_INT_FAN_BOUNCE6": null,
|
||||
"B_TERM_UTURN_INT_LV18": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LV2": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LV3": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LV4": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LV5": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LV6": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LV7": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LV8": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LV9": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LVB0": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LVB1": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LVB2": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LVB3": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LVB4": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LVB5": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LVB_L0": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LVB_L1": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LVB_L2": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LVB_L3": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LVB_L4": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LVB_L5": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LV_L18": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LV_L2": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LV_L3": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LV_L4": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LV_L5": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LV_L6": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LV_L7": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LV_L8": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LV_L9": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_SE2BEG0": null,
|
||||
"B_TERM_UTURN_INT_SE2BEG1": null,
|
||||
"B_TERM_UTURN_INT_SE2BEG2": null,
|
||||
"B_TERM_UTURN_INT_SE2BEG3": null,
|
||||
"B_TERM_UTURN_INT_SE6A0": null,
|
||||
"B_TERM_UTURN_INT_SE6A1": null,
|
||||
"B_TERM_UTURN_INT_SE6A2": null,
|
||||
"B_TERM_UTURN_INT_SE6A3": null,
|
||||
"B_TERM_UTURN_INT_SE6B0": null,
|
||||
"B_TERM_UTURN_INT_SE6B1": null,
|
||||
"B_TERM_UTURN_INT_SE6B2": null,
|
||||
"B_TERM_UTURN_INT_SE6B3": null,
|
||||
"B_TERM_UTURN_INT_SE6C0": null,
|
||||
"B_TERM_UTURN_INT_SE6C1": null,
|
||||
"B_TERM_UTURN_INT_SE6C2": null,
|
||||
"B_TERM_UTURN_INT_SE6C3": null,
|
||||
"B_TERM_UTURN_INT_SE6D0": null,
|
||||
"B_TERM_UTURN_INT_SE6D1": null,
|
||||
"B_TERM_UTURN_INT_SE6D2": null,
|
||||
"B_TERM_UTURN_INT_SE6D3": null,
|
||||
"B_TERM_UTURN_INT_SL1BEG0": null,
|
||||
"B_TERM_UTURN_INT_SL1BEG1": null,
|
||||
"B_TERM_UTURN_INT_SL1BEG2": null,
|
||||
"B_TERM_UTURN_INT_SL1BEG3": null,
|
||||
"B_TERM_UTURN_INT_SR1BEG1": null,
|
||||
"B_TERM_UTURN_INT_SR1BEG2": null,
|
||||
"B_TERM_UTURN_INT_SR1BEG3": null,
|
||||
"B_TERM_UTURN_INT_SS2A0": null,
|
||||
"B_TERM_UTURN_INT_SS2A1": null,
|
||||
"B_TERM_UTURN_INT_SS2A2": null,
|
||||
"B_TERM_UTURN_INT_SS2A3": null,
|
||||
"B_TERM_UTURN_INT_SS2BEG0": null,
|
||||
"B_TERM_UTURN_INT_SS2BEG1": null,
|
||||
"B_TERM_UTURN_INT_SS2BEG2": null,
|
||||
"B_TERM_UTURN_INT_SS2BEG3": null,
|
||||
"B_TERM_UTURN_INT_SS6A0": null,
|
||||
"B_TERM_UTURN_INT_SS6A1": null,
|
||||
"B_TERM_UTURN_INT_SS6A2": null,
|
||||
"B_TERM_UTURN_INT_SS6A3": null,
|
||||
"B_TERM_UTURN_INT_SS6B0": null,
|
||||
"B_TERM_UTURN_INT_SS6B1": null,
|
||||
"B_TERM_UTURN_INT_SS6B2": null,
|
||||
"B_TERM_UTURN_INT_SS6B3": null,
|
||||
"B_TERM_UTURN_INT_SS6BEG0": null,
|
||||
"B_TERM_UTURN_INT_SS6BEG1": null,
|
||||
"B_TERM_UTURN_INT_SS6BEG2": null,
|
||||
"B_TERM_UTURN_INT_SS6BEG3": null,
|
||||
"B_TERM_UTURN_INT_SS6C0": null,
|
||||
"B_TERM_UTURN_INT_SS6C1": null,
|
||||
"B_TERM_UTURN_INT_SS6C2": null,
|
||||
"B_TERM_UTURN_INT_SS6C3": null,
|
||||
"B_TERM_UTURN_INT_SS6D0": null,
|
||||
"B_TERM_UTURN_INT_SS6D1": null,
|
||||
"B_TERM_UTURN_INT_SS6D2": null,
|
||||
"B_TERM_UTURN_INT_SS6D3": null,
|
||||
"B_TERM_UTURN_INT_SS6E0": null,
|
||||
"B_TERM_UTURN_INT_SS6E1": null,
|
||||
"B_TERM_UTURN_INT_SS6E2": null,
|
||||
"B_TERM_UTURN_INT_SS6E3": null,
|
||||
"B_TERM_UTURN_INT_SW2BEG0": null,
|
||||
"B_TERM_UTURN_INT_SW2BEG1": null,
|
||||
"B_TERM_UTURN_INT_SW2BEG2": null,
|
||||
"B_TERM_UTURN_INT_SW2BEG3": null,
|
||||
"B_TERM_UTURN_INT_SW6A0": null,
|
||||
"B_TERM_UTURN_INT_SW6A1": null,
|
||||
"B_TERM_UTURN_INT_SW6A2": null,
|
||||
"B_TERM_UTURN_INT_SW6A3": null,
|
||||
"B_TERM_UTURN_INT_SW6B0": null,
|
||||
"B_TERM_UTURN_INT_SW6B1": null,
|
||||
"B_TERM_UTURN_INT_SW6B2": null,
|
||||
"B_TERM_UTURN_INT_SW6B3": null,
|
||||
"B_TERM_UTURN_INT_SW6C0": null,
|
||||
"B_TERM_UTURN_INT_SW6C1": null,
|
||||
"B_TERM_UTURN_INT_SW6C2": null,
|
||||
"B_TERM_UTURN_INT_SW6C3": null,
|
||||
"B_TERM_UTURN_INT_SW6D0": null,
|
||||
"B_TERM_UTURN_INT_SW6D1": null,
|
||||
"B_TERM_UTURN_INT_SW6D2": null,
|
||||
"B_TERM_UTURN_INT_SW6D3": null,
|
||||
"B_TERM_UTURN_INT_SW6END_N0_3": null,
|
||||
"B_TERM_UTURN_INT_WR1BEG0": null,
|
||||
"B_TERM_UTURN_INT_WR1END0": null
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,10 +2,22 @@
|
|||
"pips": {},
|
||||
"sites": [],
|
||||
"tile_type": "BRKH_CLB",
|
||||
"wires": [
|
||||
"BRKH_CLB_COUT0_L",
|
||||
"BRKH_CLB_COUT0_R",
|
||||
"BRKH_CLB_COUT1_L",
|
||||
"BRKH_CLB_COUT1_R"
|
||||
]
|
||||
"wires": {
|
||||
"BRKH_CLB_COUT0_L": {
|
||||
"cap": "1.000",
|
||||
"res": "0.000"
|
||||
},
|
||||
"BRKH_CLB_COUT0_R": {
|
||||
"cap": "1.000",
|
||||
"res": "0.000"
|
||||
},
|
||||
"BRKH_CLB_COUT1_L": {
|
||||
"cap": "1.000",
|
||||
"res": "0.000"
|
||||
},
|
||||
"BRKH_CLB_COUT1_R": {
|
||||
"cap": "1.000",
|
||||
"res": "0.000"
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,134 +2,134 @@
|
|||
"pips": {},
|
||||
"sites": [],
|
||||
"tile_type": "BRKH_CLK",
|
||||
"wires": [
|
||||
"BRKH_CLK_CK_BUFG_CASC0",
|
||||
"BRKH_CLK_CK_BUFG_CASC1",
|
||||
"BRKH_CLK_CK_BUFG_CASC10",
|
||||
"BRKH_CLK_CK_BUFG_CASC11",
|
||||
"BRKH_CLK_CK_BUFG_CASC12",
|
||||
"BRKH_CLK_CK_BUFG_CASC13",
|
||||
"BRKH_CLK_CK_BUFG_CASC14",
|
||||
"BRKH_CLK_CK_BUFG_CASC15",
|
||||
"BRKH_CLK_CK_BUFG_CASC16",
|
||||
"BRKH_CLK_CK_BUFG_CASC17",
|
||||
"BRKH_CLK_CK_BUFG_CASC18",
|
||||
"BRKH_CLK_CK_BUFG_CASC19",
|
||||
"BRKH_CLK_CK_BUFG_CASC2",
|
||||
"BRKH_CLK_CK_BUFG_CASC20",
|
||||
"BRKH_CLK_CK_BUFG_CASC21",
|
||||
"BRKH_CLK_CK_BUFG_CASC22",
|
||||
"BRKH_CLK_CK_BUFG_CASC23",
|
||||
"BRKH_CLK_CK_BUFG_CASC24",
|
||||
"BRKH_CLK_CK_BUFG_CASC25",
|
||||
"BRKH_CLK_CK_BUFG_CASC26",
|
||||
"BRKH_CLK_CK_BUFG_CASC27",
|
||||
"BRKH_CLK_CK_BUFG_CASC28",
|
||||
"BRKH_CLK_CK_BUFG_CASC29",
|
||||
"BRKH_CLK_CK_BUFG_CASC3",
|
||||
"BRKH_CLK_CK_BUFG_CASC30",
|
||||
"BRKH_CLK_CK_BUFG_CASC31",
|
||||
"BRKH_CLK_CK_BUFG_CASC4",
|
||||
"BRKH_CLK_CK_BUFG_CASC5",
|
||||
"BRKH_CLK_CK_BUFG_CASC6",
|
||||
"BRKH_CLK_CK_BUFG_CASC7",
|
||||
"BRKH_CLK_CK_BUFG_CASC8",
|
||||
"BRKH_CLK_CK_BUFG_CASC9",
|
||||
"BRKH_CLK_CK_GCLK0",
|
||||
"BRKH_CLK_CK_GCLK1",
|
||||
"BRKH_CLK_CK_GCLK10",
|
||||
"BRKH_CLK_CK_GCLK11",
|
||||
"BRKH_CLK_CK_GCLK12",
|
||||
"BRKH_CLK_CK_GCLK13",
|
||||
"BRKH_CLK_CK_GCLK14",
|
||||
"BRKH_CLK_CK_GCLK15",
|
||||
"BRKH_CLK_CK_GCLK16",
|
||||
"BRKH_CLK_CK_GCLK17",
|
||||
"BRKH_CLK_CK_GCLK18",
|
||||
"BRKH_CLK_CK_GCLK19",
|
||||
"BRKH_CLK_CK_GCLK2",
|
||||
"BRKH_CLK_CK_GCLK20",
|
||||
"BRKH_CLK_CK_GCLK21",
|
||||
"BRKH_CLK_CK_GCLK22",
|
||||
"BRKH_CLK_CK_GCLK23",
|
||||
"BRKH_CLK_CK_GCLK24",
|
||||
"BRKH_CLK_CK_GCLK25",
|
||||
"BRKH_CLK_CK_GCLK26",
|
||||
"BRKH_CLK_CK_GCLK27",
|
||||
"BRKH_CLK_CK_GCLK28",
|
||||
"BRKH_CLK_CK_GCLK29",
|
||||
"BRKH_CLK_CK_GCLK3",
|
||||
"BRKH_CLK_CK_GCLK30",
|
||||
"BRKH_CLK_CK_GCLK31",
|
||||
"BRKH_CLK_CK_GCLK4",
|
||||
"BRKH_CLK_CK_GCLK5",
|
||||
"BRKH_CLK_CK_GCLK6",
|
||||
"BRKH_CLK_CK_GCLK7",
|
||||
"BRKH_CLK_CK_GCLK8",
|
||||
"BRKH_CLK_CK_GCLK9",
|
||||
"BRKH_CLK_R_CK_BUFG_CASC0",
|
||||
"BRKH_CLK_R_CK_BUFG_CASC1",
|
||||
"BRKH_CLK_R_CK_BUFG_CASC10",
|
||||
"BRKH_CLK_R_CK_BUFG_CASC11",
|
||||
"BRKH_CLK_R_CK_BUFG_CASC12",
|
||||
"BRKH_CLK_R_CK_BUFG_CASC13",
|
||||
"BRKH_CLK_R_CK_BUFG_CASC14",
|
||||
"BRKH_CLK_R_CK_BUFG_CASC15",
|
||||
"BRKH_CLK_R_CK_BUFG_CASC16",
|
||||
"BRKH_CLK_R_CK_BUFG_CASC17",
|
||||
"BRKH_CLK_R_CK_BUFG_CASC18",
|
||||
"BRKH_CLK_R_CK_BUFG_CASC19",
|
||||
"BRKH_CLK_R_CK_BUFG_CASC2",
|
||||
"BRKH_CLK_R_CK_BUFG_CASC20",
|
||||
"BRKH_CLK_R_CK_BUFG_CASC21",
|
||||
"BRKH_CLK_R_CK_BUFG_CASC22",
|
||||
"BRKH_CLK_R_CK_BUFG_CASC23",
|
||||
"BRKH_CLK_R_CK_BUFG_CASC24",
|
||||
"BRKH_CLK_R_CK_BUFG_CASC25",
|
||||
"BRKH_CLK_R_CK_BUFG_CASC26",
|
||||
"BRKH_CLK_R_CK_BUFG_CASC27",
|
||||
"BRKH_CLK_R_CK_BUFG_CASC28",
|
||||
"BRKH_CLK_R_CK_BUFG_CASC29",
|
||||
"BRKH_CLK_R_CK_BUFG_CASC3",
|
||||
"BRKH_CLK_R_CK_BUFG_CASC30",
|
||||
"BRKH_CLK_R_CK_BUFG_CASC31",
|
||||
"BRKH_CLK_R_CK_BUFG_CASC4",
|
||||
"BRKH_CLK_R_CK_BUFG_CASC5",
|
||||
"BRKH_CLK_R_CK_BUFG_CASC6",
|
||||
"BRKH_CLK_R_CK_BUFG_CASC7",
|
||||
"BRKH_CLK_R_CK_BUFG_CASC8",
|
||||
"BRKH_CLK_R_CK_BUFG_CASC9",
|
||||
"BRKH_CLK_R_CK_GCLK0",
|
||||
"BRKH_CLK_R_CK_GCLK1",
|
||||
"BRKH_CLK_R_CK_GCLK10",
|
||||
"BRKH_CLK_R_CK_GCLK11",
|
||||
"BRKH_CLK_R_CK_GCLK12",
|
||||
"BRKH_CLK_R_CK_GCLK13",
|
||||
"BRKH_CLK_R_CK_GCLK14",
|
||||
"BRKH_CLK_R_CK_GCLK15",
|
||||
"BRKH_CLK_R_CK_GCLK16",
|
||||
"BRKH_CLK_R_CK_GCLK17",
|
||||
"BRKH_CLK_R_CK_GCLK18",
|
||||
"BRKH_CLK_R_CK_GCLK19",
|
||||
"BRKH_CLK_R_CK_GCLK2",
|
||||
"BRKH_CLK_R_CK_GCLK20",
|
||||
"BRKH_CLK_R_CK_GCLK21",
|
||||
"BRKH_CLK_R_CK_GCLK22",
|
||||
"BRKH_CLK_R_CK_GCLK23",
|
||||
"BRKH_CLK_R_CK_GCLK24",
|
||||
"BRKH_CLK_R_CK_GCLK25",
|
||||
"BRKH_CLK_R_CK_GCLK26",
|
||||
"BRKH_CLK_R_CK_GCLK27",
|
||||
"BRKH_CLK_R_CK_GCLK28",
|
||||
"BRKH_CLK_R_CK_GCLK29",
|
||||
"BRKH_CLK_R_CK_GCLK3",
|
||||
"BRKH_CLK_R_CK_GCLK30",
|
||||
"BRKH_CLK_R_CK_GCLK31",
|
||||
"BRKH_CLK_R_CK_GCLK4",
|
||||
"BRKH_CLK_R_CK_GCLK5",
|
||||
"BRKH_CLK_R_CK_GCLK6",
|
||||
"BRKH_CLK_R_CK_GCLK7",
|
||||
"BRKH_CLK_R_CK_GCLK8",
|
||||
"BRKH_CLK_R_CK_GCLK9"
|
||||
]
|
||||
"wires": {
|
||||
"BRKH_CLK_CK_BUFG_CASC0": null,
|
||||
"BRKH_CLK_CK_BUFG_CASC1": null,
|
||||
"BRKH_CLK_CK_BUFG_CASC10": null,
|
||||
"BRKH_CLK_CK_BUFG_CASC11": null,
|
||||
"BRKH_CLK_CK_BUFG_CASC12": null,
|
||||
"BRKH_CLK_CK_BUFG_CASC13": null,
|
||||
"BRKH_CLK_CK_BUFG_CASC14": null,
|
||||
"BRKH_CLK_CK_BUFG_CASC15": null,
|
||||
"BRKH_CLK_CK_BUFG_CASC16": null,
|
||||
"BRKH_CLK_CK_BUFG_CASC17": null,
|
||||
"BRKH_CLK_CK_BUFG_CASC18": null,
|
||||
"BRKH_CLK_CK_BUFG_CASC19": null,
|
||||
"BRKH_CLK_CK_BUFG_CASC2": null,
|
||||
"BRKH_CLK_CK_BUFG_CASC20": null,
|
||||
"BRKH_CLK_CK_BUFG_CASC21": null,
|
||||
"BRKH_CLK_CK_BUFG_CASC22": null,
|
||||
"BRKH_CLK_CK_BUFG_CASC23": null,
|
||||
"BRKH_CLK_CK_BUFG_CASC24": null,
|
||||
"BRKH_CLK_CK_BUFG_CASC25": null,
|
||||
"BRKH_CLK_CK_BUFG_CASC26": null,
|
||||
"BRKH_CLK_CK_BUFG_CASC27": null,
|
||||
"BRKH_CLK_CK_BUFG_CASC28": null,
|
||||
"BRKH_CLK_CK_BUFG_CASC29": null,
|
||||
"BRKH_CLK_CK_BUFG_CASC3": null,
|
||||
"BRKH_CLK_CK_BUFG_CASC30": null,
|
||||
"BRKH_CLK_CK_BUFG_CASC31": null,
|
||||
"BRKH_CLK_CK_BUFG_CASC4": null,
|
||||
"BRKH_CLK_CK_BUFG_CASC5": null,
|
||||
"BRKH_CLK_CK_BUFG_CASC6": null,
|
||||
"BRKH_CLK_CK_BUFG_CASC7": null,
|
||||
"BRKH_CLK_CK_BUFG_CASC8": null,
|
||||
"BRKH_CLK_CK_BUFG_CASC9": null,
|
||||
"BRKH_CLK_CK_GCLK0": null,
|
||||
"BRKH_CLK_CK_GCLK1": null,
|
||||
"BRKH_CLK_CK_GCLK10": null,
|
||||
"BRKH_CLK_CK_GCLK11": null,
|
||||
"BRKH_CLK_CK_GCLK12": null,
|
||||
"BRKH_CLK_CK_GCLK13": null,
|
||||
"BRKH_CLK_CK_GCLK14": null,
|
||||
"BRKH_CLK_CK_GCLK15": null,
|
||||
"BRKH_CLK_CK_GCLK16": null,
|
||||
"BRKH_CLK_CK_GCLK17": null,
|
||||
"BRKH_CLK_CK_GCLK18": null,
|
||||
"BRKH_CLK_CK_GCLK19": null,
|
||||
"BRKH_CLK_CK_GCLK2": null,
|
||||
"BRKH_CLK_CK_GCLK20": null,
|
||||
"BRKH_CLK_CK_GCLK21": null,
|
||||
"BRKH_CLK_CK_GCLK22": null,
|
||||
"BRKH_CLK_CK_GCLK23": null,
|
||||
"BRKH_CLK_CK_GCLK24": null,
|
||||
"BRKH_CLK_CK_GCLK25": null,
|
||||
"BRKH_CLK_CK_GCLK26": null,
|
||||
"BRKH_CLK_CK_GCLK27": null,
|
||||
"BRKH_CLK_CK_GCLK28": null,
|
||||
"BRKH_CLK_CK_GCLK29": null,
|
||||
"BRKH_CLK_CK_GCLK3": null,
|
||||
"BRKH_CLK_CK_GCLK30": null,
|
||||
"BRKH_CLK_CK_GCLK31": null,
|
||||
"BRKH_CLK_CK_GCLK4": null,
|
||||
"BRKH_CLK_CK_GCLK5": null,
|
||||
"BRKH_CLK_CK_GCLK6": null,
|
||||
"BRKH_CLK_CK_GCLK7": null,
|
||||
"BRKH_CLK_CK_GCLK8": null,
|
||||
"BRKH_CLK_CK_GCLK9": null,
|
||||
"BRKH_CLK_R_CK_BUFG_CASC0": null,
|
||||
"BRKH_CLK_R_CK_BUFG_CASC1": null,
|
||||
"BRKH_CLK_R_CK_BUFG_CASC10": null,
|
||||
"BRKH_CLK_R_CK_BUFG_CASC11": null,
|
||||
"BRKH_CLK_R_CK_BUFG_CASC12": null,
|
||||
"BRKH_CLK_R_CK_BUFG_CASC13": null,
|
||||
"BRKH_CLK_R_CK_BUFG_CASC14": null,
|
||||
"BRKH_CLK_R_CK_BUFG_CASC15": null,
|
||||
"BRKH_CLK_R_CK_BUFG_CASC16": null,
|
||||
"BRKH_CLK_R_CK_BUFG_CASC17": null,
|
||||
"BRKH_CLK_R_CK_BUFG_CASC18": null,
|
||||
"BRKH_CLK_R_CK_BUFG_CASC19": null,
|
||||
"BRKH_CLK_R_CK_BUFG_CASC2": null,
|
||||
"BRKH_CLK_R_CK_BUFG_CASC20": null,
|
||||
"BRKH_CLK_R_CK_BUFG_CASC21": null,
|
||||
"BRKH_CLK_R_CK_BUFG_CASC22": null,
|
||||
"BRKH_CLK_R_CK_BUFG_CASC23": null,
|
||||
"BRKH_CLK_R_CK_BUFG_CASC24": null,
|
||||
"BRKH_CLK_R_CK_BUFG_CASC25": null,
|
||||
"BRKH_CLK_R_CK_BUFG_CASC26": null,
|
||||
"BRKH_CLK_R_CK_BUFG_CASC27": null,
|
||||
"BRKH_CLK_R_CK_BUFG_CASC28": null,
|
||||
"BRKH_CLK_R_CK_BUFG_CASC29": null,
|
||||
"BRKH_CLK_R_CK_BUFG_CASC3": null,
|
||||
"BRKH_CLK_R_CK_BUFG_CASC30": null,
|
||||
"BRKH_CLK_R_CK_BUFG_CASC31": null,
|
||||
"BRKH_CLK_R_CK_BUFG_CASC4": null,
|
||||
"BRKH_CLK_R_CK_BUFG_CASC5": null,
|
||||
"BRKH_CLK_R_CK_BUFG_CASC6": null,
|
||||
"BRKH_CLK_R_CK_BUFG_CASC7": null,
|
||||
"BRKH_CLK_R_CK_BUFG_CASC8": null,
|
||||
"BRKH_CLK_R_CK_BUFG_CASC9": null,
|
||||
"BRKH_CLK_R_CK_GCLK0": null,
|
||||
"BRKH_CLK_R_CK_GCLK1": null,
|
||||
"BRKH_CLK_R_CK_GCLK10": null,
|
||||
"BRKH_CLK_R_CK_GCLK11": null,
|
||||
"BRKH_CLK_R_CK_GCLK12": null,
|
||||
"BRKH_CLK_R_CK_GCLK13": null,
|
||||
"BRKH_CLK_R_CK_GCLK14": null,
|
||||
"BRKH_CLK_R_CK_GCLK15": null,
|
||||
"BRKH_CLK_R_CK_GCLK16": null,
|
||||
"BRKH_CLK_R_CK_GCLK17": null,
|
||||
"BRKH_CLK_R_CK_GCLK18": null,
|
||||
"BRKH_CLK_R_CK_GCLK19": null,
|
||||
"BRKH_CLK_R_CK_GCLK2": null,
|
||||
"BRKH_CLK_R_CK_GCLK20": null,
|
||||
"BRKH_CLK_R_CK_GCLK21": null,
|
||||
"BRKH_CLK_R_CK_GCLK22": null,
|
||||
"BRKH_CLK_R_CK_GCLK23": null,
|
||||
"BRKH_CLK_R_CK_GCLK24": null,
|
||||
"BRKH_CLK_R_CK_GCLK25": null,
|
||||
"BRKH_CLK_R_CK_GCLK26": null,
|
||||
"BRKH_CLK_R_CK_GCLK27": null,
|
||||
"BRKH_CLK_R_CK_GCLK28": null,
|
||||
"BRKH_CLK_R_CK_GCLK29": null,
|
||||
"BRKH_CLK_R_CK_GCLK3": null,
|
||||
"BRKH_CLK_R_CK_GCLK30": null,
|
||||
"BRKH_CLK_R_CK_GCLK31": null,
|
||||
"BRKH_CLK_R_CK_GCLK4": null,
|
||||
"BRKH_CLK_R_CK_GCLK5": null,
|
||||
"BRKH_CLK_R_CK_GCLK6": null,
|
||||
"BRKH_CLK_R_CK_GCLK7": null,
|
||||
"BRKH_CLK_R_CK_GCLK8": null,
|
||||
"BRKH_CLK_R_CK_GCLK9": null
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,15 +2,15 @@
|
|||
"pips": {},
|
||||
"sites": [],
|
||||
"tile_type": "BRKH_CMT",
|
||||
"wires": [
|
||||
"BRKH_CMT_FREQ_REF_NS0",
|
||||
"BRKH_CMT_FREQ_REF_NS1",
|
||||
"BRKH_CMT_FREQ_REF_NS2",
|
||||
"BRKH_CMT_FREQ_REF_NS3",
|
||||
"BRKH_CMT_PHASEREF0",
|
||||
"BRKH_CMT_PHASEREF1",
|
||||
"BRKH_CMT_PHASEREF_BELOW0",
|
||||
"BRKH_CMT_PHASEREF_BELOW1",
|
||||
"BRKH_CMT_PHYCTRL_SYNC_BB"
|
||||
]
|
||||
"wires": {
|
||||
"BRKH_CMT_FREQ_REF_NS0": null,
|
||||
"BRKH_CMT_FREQ_REF_NS1": null,
|
||||
"BRKH_CMT_FREQ_REF_NS2": null,
|
||||
"BRKH_CMT_FREQ_REF_NS3": null,
|
||||
"BRKH_CMT_PHASEREF0": null,
|
||||
"BRKH_CMT_PHASEREF1": null,
|
||||
"BRKH_CMT_PHASEREF_BELOW0": null,
|
||||
"BRKH_CMT_PHASEREF_BELOW1": null,
|
||||
"BRKH_CMT_PHYCTRL_SYNC_BB": null
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,104 +2,104 @@
|
|||
"pips": {},
|
||||
"sites": [],
|
||||
"tile_type": "BRKH_DSP_L",
|
||||
"wires": [
|
||||
"BRKH_DSP_ACIN0",
|
||||
"BRKH_DSP_ACIN1",
|
||||
"BRKH_DSP_ACIN10",
|
||||
"BRKH_DSP_ACIN11",
|
||||
"BRKH_DSP_ACIN12",
|
||||
"BRKH_DSP_ACIN13",
|
||||
"BRKH_DSP_ACIN14",
|
||||
"BRKH_DSP_ACIN15",
|
||||
"BRKH_DSP_ACIN16",
|
||||
"BRKH_DSP_ACIN17",
|
||||
"BRKH_DSP_ACIN18",
|
||||
"BRKH_DSP_ACIN19",
|
||||
"BRKH_DSP_ACIN2",
|
||||
"BRKH_DSP_ACIN20",
|
||||
"BRKH_DSP_ACIN21",
|
||||
"BRKH_DSP_ACIN22",
|
||||
"BRKH_DSP_ACIN23",
|
||||
"BRKH_DSP_ACIN24",
|
||||
"BRKH_DSP_ACIN25",
|
||||
"BRKH_DSP_ACIN26",
|
||||
"BRKH_DSP_ACIN27",
|
||||
"BRKH_DSP_ACIN28",
|
||||
"BRKH_DSP_ACIN29",
|
||||
"BRKH_DSP_ACIN3",
|
||||
"BRKH_DSP_ACIN4",
|
||||
"BRKH_DSP_ACIN5",
|
||||
"BRKH_DSP_ACIN6",
|
||||
"BRKH_DSP_ACIN7",
|
||||
"BRKH_DSP_ACIN8",
|
||||
"BRKH_DSP_ACIN9",
|
||||
"BRKH_DSP_BCIN0",
|
||||
"BRKH_DSP_BCIN1",
|
||||
"BRKH_DSP_BCIN10",
|
||||
"BRKH_DSP_BCIN11",
|
||||
"BRKH_DSP_BCIN12",
|
||||
"BRKH_DSP_BCIN13",
|
||||
"BRKH_DSP_BCIN14",
|
||||
"BRKH_DSP_BCIN15",
|
||||
"BRKH_DSP_BCIN16",
|
||||
"BRKH_DSP_BCIN17",
|
||||
"BRKH_DSP_BCIN2",
|
||||
"BRKH_DSP_BCIN3",
|
||||
"BRKH_DSP_BCIN4",
|
||||
"BRKH_DSP_BCIN5",
|
||||
"BRKH_DSP_BCIN6",
|
||||
"BRKH_DSP_BCIN7",
|
||||
"BRKH_DSP_BCIN8",
|
||||
"BRKH_DSP_BCIN9",
|
||||
"BRKH_DSP_CARRYCASCIN",
|
||||
"BRKH_DSP_MULTSIGNIN",
|
||||
"BRKH_DSP_PCIN0",
|
||||
"BRKH_DSP_PCIN1",
|
||||
"BRKH_DSP_PCIN10",
|
||||
"BRKH_DSP_PCIN11",
|
||||
"BRKH_DSP_PCIN12",
|
||||
"BRKH_DSP_PCIN13",
|
||||
"BRKH_DSP_PCIN14",
|
||||
"BRKH_DSP_PCIN15",
|
||||
"BRKH_DSP_PCIN16",
|
||||
"BRKH_DSP_PCIN17",
|
||||
"BRKH_DSP_PCIN18",
|
||||
"BRKH_DSP_PCIN19",
|
||||
"BRKH_DSP_PCIN2",
|
||||
"BRKH_DSP_PCIN20",
|
||||
"BRKH_DSP_PCIN21",
|
||||
"BRKH_DSP_PCIN22",
|
||||
"BRKH_DSP_PCIN23",
|
||||
"BRKH_DSP_PCIN24",
|
||||
"BRKH_DSP_PCIN25",
|
||||
"BRKH_DSP_PCIN26",
|
||||
"BRKH_DSP_PCIN27",
|
||||
"BRKH_DSP_PCIN28",
|
||||
"BRKH_DSP_PCIN29",
|
||||
"BRKH_DSP_PCIN3",
|
||||
"BRKH_DSP_PCIN30",
|
||||
"BRKH_DSP_PCIN31",
|
||||
"BRKH_DSP_PCIN32",
|
||||
"BRKH_DSP_PCIN33",
|
||||
"BRKH_DSP_PCIN34",
|
||||
"BRKH_DSP_PCIN35",
|
||||
"BRKH_DSP_PCIN36",
|
||||
"BRKH_DSP_PCIN37",
|
||||
"BRKH_DSP_PCIN38",
|
||||
"BRKH_DSP_PCIN39",
|
||||
"BRKH_DSP_PCIN4",
|
||||
"BRKH_DSP_PCIN40",
|
||||
"BRKH_DSP_PCIN41",
|
||||
"BRKH_DSP_PCIN42",
|
||||
"BRKH_DSP_PCIN43",
|
||||
"BRKH_DSP_PCIN44",
|
||||
"BRKH_DSP_PCIN45",
|
||||
"BRKH_DSP_PCIN46",
|
||||
"BRKH_DSP_PCIN47",
|
||||
"BRKH_DSP_PCIN5",
|
||||
"BRKH_DSP_PCIN6",
|
||||
"BRKH_DSP_PCIN7",
|
||||
"BRKH_DSP_PCIN8",
|
||||
"BRKH_DSP_PCIN9"
|
||||
]
|
||||
"wires": {
|
||||
"BRKH_DSP_ACIN0": null,
|
||||
"BRKH_DSP_ACIN1": null,
|
||||
"BRKH_DSP_ACIN10": null,
|
||||
"BRKH_DSP_ACIN11": null,
|
||||
"BRKH_DSP_ACIN12": null,
|
||||
"BRKH_DSP_ACIN13": null,
|
||||
"BRKH_DSP_ACIN14": null,
|
||||
"BRKH_DSP_ACIN15": null,
|
||||
"BRKH_DSP_ACIN16": null,
|
||||
"BRKH_DSP_ACIN17": null,
|
||||
"BRKH_DSP_ACIN18": null,
|
||||
"BRKH_DSP_ACIN19": null,
|
||||
"BRKH_DSP_ACIN2": null,
|
||||
"BRKH_DSP_ACIN20": null,
|
||||
"BRKH_DSP_ACIN21": null,
|
||||
"BRKH_DSP_ACIN22": null,
|
||||
"BRKH_DSP_ACIN23": null,
|
||||
"BRKH_DSP_ACIN24": null,
|
||||
"BRKH_DSP_ACIN25": null,
|
||||
"BRKH_DSP_ACIN26": null,
|
||||
"BRKH_DSP_ACIN27": null,
|
||||
"BRKH_DSP_ACIN28": null,
|
||||
"BRKH_DSP_ACIN29": null,
|
||||
"BRKH_DSP_ACIN3": null,
|
||||
"BRKH_DSP_ACIN4": null,
|
||||
"BRKH_DSP_ACIN5": null,
|
||||
"BRKH_DSP_ACIN6": null,
|
||||
"BRKH_DSP_ACIN7": null,
|
||||
"BRKH_DSP_ACIN8": null,
|
||||
"BRKH_DSP_ACIN9": null,
|
||||
"BRKH_DSP_BCIN0": null,
|
||||
"BRKH_DSP_BCIN1": null,
|
||||
"BRKH_DSP_BCIN10": null,
|
||||
"BRKH_DSP_BCIN11": null,
|
||||
"BRKH_DSP_BCIN12": null,
|
||||
"BRKH_DSP_BCIN13": null,
|
||||
"BRKH_DSP_BCIN14": null,
|
||||
"BRKH_DSP_BCIN15": null,
|
||||
"BRKH_DSP_BCIN16": null,
|
||||
"BRKH_DSP_BCIN17": null,
|
||||
"BRKH_DSP_BCIN2": null,
|
||||
"BRKH_DSP_BCIN3": null,
|
||||
"BRKH_DSP_BCIN4": null,
|
||||
"BRKH_DSP_BCIN5": null,
|
||||
"BRKH_DSP_BCIN6": null,
|
||||
"BRKH_DSP_BCIN7": null,
|
||||
"BRKH_DSP_BCIN8": null,
|
||||
"BRKH_DSP_BCIN9": null,
|
||||
"BRKH_DSP_CARRYCASCIN": null,
|
||||
"BRKH_DSP_MULTSIGNIN": null,
|
||||
"BRKH_DSP_PCIN0": null,
|
||||
"BRKH_DSP_PCIN1": null,
|
||||
"BRKH_DSP_PCIN10": null,
|
||||
"BRKH_DSP_PCIN11": null,
|
||||
"BRKH_DSP_PCIN12": null,
|
||||
"BRKH_DSP_PCIN13": null,
|
||||
"BRKH_DSP_PCIN14": null,
|
||||
"BRKH_DSP_PCIN15": null,
|
||||
"BRKH_DSP_PCIN16": null,
|
||||
"BRKH_DSP_PCIN17": null,
|
||||
"BRKH_DSP_PCIN18": null,
|
||||
"BRKH_DSP_PCIN19": null,
|
||||
"BRKH_DSP_PCIN2": null,
|
||||
"BRKH_DSP_PCIN20": null,
|
||||
"BRKH_DSP_PCIN21": null,
|
||||
"BRKH_DSP_PCIN22": null,
|
||||
"BRKH_DSP_PCIN23": null,
|
||||
"BRKH_DSP_PCIN24": null,
|
||||
"BRKH_DSP_PCIN25": null,
|
||||
"BRKH_DSP_PCIN26": null,
|
||||
"BRKH_DSP_PCIN27": null,
|
||||
"BRKH_DSP_PCIN28": null,
|
||||
"BRKH_DSP_PCIN29": null,
|
||||
"BRKH_DSP_PCIN3": null,
|
||||
"BRKH_DSP_PCIN30": null,
|
||||
"BRKH_DSP_PCIN31": null,
|
||||
"BRKH_DSP_PCIN32": null,
|
||||
"BRKH_DSP_PCIN33": null,
|
||||
"BRKH_DSP_PCIN34": null,
|
||||
"BRKH_DSP_PCIN35": null,
|
||||
"BRKH_DSP_PCIN36": null,
|
||||
"BRKH_DSP_PCIN37": null,
|
||||
"BRKH_DSP_PCIN38": null,
|
||||
"BRKH_DSP_PCIN39": null,
|
||||
"BRKH_DSP_PCIN4": null,
|
||||
"BRKH_DSP_PCIN40": null,
|
||||
"BRKH_DSP_PCIN41": null,
|
||||
"BRKH_DSP_PCIN42": null,
|
||||
"BRKH_DSP_PCIN43": null,
|
||||
"BRKH_DSP_PCIN44": null,
|
||||
"BRKH_DSP_PCIN45": null,
|
||||
"BRKH_DSP_PCIN46": null,
|
||||
"BRKH_DSP_PCIN47": null,
|
||||
"BRKH_DSP_PCIN5": null,
|
||||
"BRKH_DSP_PCIN6": null,
|
||||
"BRKH_DSP_PCIN7": null,
|
||||
"BRKH_DSP_PCIN8": null,
|
||||
"BRKH_DSP_PCIN9": null
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,104 +2,104 @@
|
|||
"pips": {},
|
||||
"sites": [],
|
||||
"tile_type": "BRKH_DSP_R",
|
||||
"wires": [
|
||||
"BRKH_DSP_ACIN0",
|
||||
"BRKH_DSP_ACIN1",
|
||||
"BRKH_DSP_ACIN10",
|
||||
"BRKH_DSP_ACIN11",
|
||||
"BRKH_DSP_ACIN12",
|
||||
"BRKH_DSP_ACIN13",
|
||||
"BRKH_DSP_ACIN14",
|
||||
"BRKH_DSP_ACIN15",
|
||||
"BRKH_DSP_ACIN16",
|
||||
"BRKH_DSP_ACIN17",
|
||||
"BRKH_DSP_ACIN18",
|
||||
"BRKH_DSP_ACIN19",
|
||||
"BRKH_DSP_ACIN2",
|
||||
"BRKH_DSP_ACIN20",
|
||||
"BRKH_DSP_ACIN21",
|
||||
"BRKH_DSP_ACIN22",
|
||||
"BRKH_DSP_ACIN23",
|
||||
"BRKH_DSP_ACIN24",
|
||||
"BRKH_DSP_ACIN25",
|
||||
"BRKH_DSP_ACIN26",
|
||||
"BRKH_DSP_ACIN27",
|
||||
"BRKH_DSP_ACIN28",
|
||||
"BRKH_DSP_ACIN29",
|
||||
"BRKH_DSP_ACIN3",
|
||||
"BRKH_DSP_ACIN4",
|
||||
"BRKH_DSP_ACIN5",
|
||||
"BRKH_DSP_ACIN6",
|
||||
"BRKH_DSP_ACIN7",
|
||||
"BRKH_DSP_ACIN8",
|
||||
"BRKH_DSP_ACIN9",
|
||||
"BRKH_DSP_BCIN0",
|
||||
"BRKH_DSP_BCIN1",
|
||||
"BRKH_DSP_BCIN10",
|
||||
"BRKH_DSP_BCIN11",
|
||||
"BRKH_DSP_BCIN12",
|
||||
"BRKH_DSP_BCIN13",
|
||||
"BRKH_DSP_BCIN14",
|
||||
"BRKH_DSP_BCIN15",
|
||||
"BRKH_DSP_BCIN16",
|
||||
"BRKH_DSP_BCIN17",
|
||||
"BRKH_DSP_BCIN2",
|
||||
"BRKH_DSP_BCIN3",
|
||||
"BRKH_DSP_BCIN4",
|
||||
"BRKH_DSP_BCIN5",
|
||||
"BRKH_DSP_BCIN6",
|
||||
"BRKH_DSP_BCIN7",
|
||||
"BRKH_DSP_BCIN8",
|
||||
"BRKH_DSP_BCIN9",
|
||||
"BRKH_DSP_CARRYCASCIN",
|
||||
"BRKH_DSP_MULTSIGNIN",
|
||||
"BRKH_DSP_PCIN0",
|
||||
"BRKH_DSP_PCIN1",
|
||||
"BRKH_DSP_PCIN10",
|
||||
"BRKH_DSP_PCIN11",
|
||||
"BRKH_DSP_PCIN12",
|
||||
"BRKH_DSP_PCIN13",
|
||||
"BRKH_DSP_PCIN14",
|
||||
"BRKH_DSP_PCIN15",
|
||||
"BRKH_DSP_PCIN16",
|
||||
"BRKH_DSP_PCIN17",
|
||||
"BRKH_DSP_PCIN18",
|
||||
"BRKH_DSP_PCIN19",
|
||||
"BRKH_DSP_PCIN2",
|
||||
"BRKH_DSP_PCIN20",
|
||||
"BRKH_DSP_PCIN21",
|
||||
"BRKH_DSP_PCIN22",
|
||||
"BRKH_DSP_PCIN23",
|
||||
"BRKH_DSP_PCIN24",
|
||||
"BRKH_DSP_PCIN25",
|
||||
"BRKH_DSP_PCIN26",
|
||||
"BRKH_DSP_PCIN27",
|
||||
"BRKH_DSP_PCIN28",
|
||||
"BRKH_DSP_PCIN29",
|
||||
"BRKH_DSP_PCIN3",
|
||||
"BRKH_DSP_PCIN30",
|
||||
"BRKH_DSP_PCIN31",
|
||||
"BRKH_DSP_PCIN32",
|
||||
"BRKH_DSP_PCIN33",
|
||||
"BRKH_DSP_PCIN34",
|
||||
"BRKH_DSP_PCIN35",
|
||||
"BRKH_DSP_PCIN36",
|
||||
"BRKH_DSP_PCIN37",
|
||||
"BRKH_DSP_PCIN38",
|
||||
"BRKH_DSP_PCIN39",
|
||||
"BRKH_DSP_PCIN4",
|
||||
"BRKH_DSP_PCIN40",
|
||||
"BRKH_DSP_PCIN41",
|
||||
"BRKH_DSP_PCIN42",
|
||||
"BRKH_DSP_PCIN43",
|
||||
"BRKH_DSP_PCIN44",
|
||||
"BRKH_DSP_PCIN45",
|
||||
"BRKH_DSP_PCIN46",
|
||||
"BRKH_DSP_PCIN47",
|
||||
"BRKH_DSP_PCIN5",
|
||||
"BRKH_DSP_PCIN6",
|
||||
"BRKH_DSP_PCIN7",
|
||||
"BRKH_DSP_PCIN8",
|
||||
"BRKH_DSP_PCIN9"
|
||||
]
|
||||
"wires": {
|
||||
"BRKH_DSP_ACIN0": null,
|
||||
"BRKH_DSP_ACIN1": null,
|
||||
"BRKH_DSP_ACIN10": null,
|
||||
"BRKH_DSP_ACIN11": null,
|
||||
"BRKH_DSP_ACIN12": null,
|
||||
"BRKH_DSP_ACIN13": null,
|
||||
"BRKH_DSP_ACIN14": null,
|
||||
"BRKH_DSP_ACIN15": null,
|
||||
"BRKH_DSP_ACIN16": null,
|
||||
"BRKH_DSP_ACIN17": null,
|
||||
"BRKH_DSP_ACIN18": null,
|
||||
"BRKH_DSP_ACIN19": null,
|
||||
"BRKH_DSP_ACIN2": null,
|
||||
"BRKH_DSP_ACIN20": null,
|
||||
"BRKH_DSP_ACIN21": null,
|
||||
"BRKH_DSP_ACIN22": null,
|
||||
"BRKH_DSP_ACIN23": null,
|
||||
"BRKH_DSP_ACIN24": null,
|
||||
"BRKH_DSP_ACIN25": null,
|
||||
"BRKH_DSP_ACIN26": null,
|
||||
"BRKH_DSP_ACIN27": null,
|
||||
"BRKH_DSP_ACIN28": null,
|
||||
"BRKH_DSP_ACIN29": null,
|
||||
"BRKH_DSP_ACIN3": null,
|
||||
"BRKH_DSP_ACIN4": null,
|
||||
"BRKH_DSP_ACIN5": null,
|
||||
"BRKH_DSP_ACIN6": null,
|
||||
"BRKH_DSP_ACIN7": null,
|
||||
"BRKH_DSP_ACIN8": null,
|
||||
"BRKH_DSP_ACIN9": null,
|
||||
"BRKH_DSP_BCIN0": null,
|
||||
"BRKH_DSP_BCIN1": null,
|
||||
"BRKH_DSP_BCIN10": null,
|
||||
"BRKH_DSP_BCIN11": null,
|
||||
"BRKH_DSP_BCIN12": null,
|
||||
"BRKH_DSP_BCIN13": null,
|
||||
"BRKH_DSP_BCIN14": null,
|
||||
"BRKH_DSP_BCIN15": null,
|
||||
"BRKH_DSP_BCIN16": null,
|
||||
"BRKH_DSP_BCIN17": null,
|
||||
"BRKH_DSP_BCIN2": null,
|
||||
"BRKH_DSP_BCIN3": null,
|
||||
"BRKH_DSP_BCIN4": null,
|
||||
"BRKH_DSP_BCIN5": null,
|
||||
"BRKH_DSP_BCIN6": null,
|
||||
"BRKH_DSP_BCIN7": null,
|
||||
"BRKH_DSP_BCIN8": null,
|
||||
"BRKH_DSP_BCIN9": null,
|
||||
"BRKH_DSP_CARRYCASCIN": null,
|
||||
"BRKH_DSP_MULTSIGNIN": null,
|
||||
"BRKH_DSP_PCIN0": null,
|
||||
"BRKH_DSP_PCIN1": null,
|
||||
"BRKH_DSP_PCIN10": null,
|
||||
"BRKH_DSP_PCIN11": null,
|
||||
"BRKH_DSP_PCIN12": null,
|
||||
"BRKH_DSP_PCIN13": null,
|
||||
"BRKH_DSP_PCIN14": null,
|
||||
"BRKH_DSP_PCIN15": null,
|
||||
"BRKH_DSP_PCIN16": null,
|
||||
"BRKH_DSP_PCIN17": null,
|
||||
"BRKH_DSP_PCIN18": null,
|
||||
"BRKH_DSP_PCIN19": null,
|
||||
"BRKH_DSP_PCIN2": null,
|
||||
"BRKH_DSP_PCIN20": null,
|
||||
"BRKH_DSP_PCIN21": null,
|
||||
"BRKH_DSP_PCIN22": null,
|
||||
"BRKH_DSP_PCIN23": null,
|
||||
"BRKH_DSP_PCIN24": null,
|
||||
"BRKH_DSP_PCIN25": null,
|
||||
"BRKH_DSP_PCIN26": null,
|
||||
"BRKH_DSP_PCIN27": null,
|
||||
"BRKH_DSP_PCIN28": null,
|
||||
"BRKH_DSP_PCIN29": null,
|
||||
"BRKH_DSP_PCIN3": null,
|
||||
"BRKH_DSP_PCIN30": null,
|
||||
"BRKH_DSP_PCIN31": null,
|
||||
"BRKH_DSP_PCIN32": null,
|
||||
"BRKH_DSP_PCIN33": null,
|
||||
"BRKH_DSP_PCIN34": null,
|
||||
"BRKH_DSP_PCIN35": null,
|
||||
"BRKH_DSP_PCIN36": null,
|
||||
"BRKH_DSP_PCIN37": null,
|
||||
"BRKH_DSP_PCIN38": null,
|
||||
"BRKH_DSP_PCIN39": null,
|
||||
"BRKH_DSP_PCIN4": null,
|
||||
"BRKH_DSP_PCIN40": null,
|
||||
"BRKH_DSP_PCIN41": null,
|
||||
"BRKH_DSP_PCIN42": null,
|
||||
"BRKH_DSP_PCIN43": null,
|
||||
"BRKH_DSP_PCIN44": null,
|
||||
"BRKH_DSP_PCIN45": null,
|
||||
"BRKH_DSP_PCIN46": null,
|
||||
"BRKH_DSP_PCIN47": null,
|
||||
"BRKH_DSP_PCIN5": null,
|
||||
"BRKH_DSP_PCIN6": null,
|
||||
"BRKH_DSP_PCIN7": null,
|
||||
"BRKH_DSP_PCIN8": null,
|
||||
"BRKH_DSP_PCIN9": null
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,103 +2,235 @@
|
|||
"pips": {
|
||||
"BRKH_GTX.BRKH_GTX_NORTHREFCLK0_LOWER->BRKH_GTX_NORTHREFCLK0_UPPER": {
|
||||
"can_invert": "0",
|
||||
"dst_to_src": {
|
||||
"delay": null,
|
||||
"in_cap": null,
|
||||
"res": "0.000"
|
||||
},
|
||||
"dst_wire": "BRKH_GTX_NORTHREFCLK0_UPPER",
|
||||
"is_directional": "1",
|
||||
"is_pass_transistor": 1,
|
||||
"is_pseudo": "0",
|
||||
"src_to_dst": {
|
||||
"delay": null,
|
||||
"in_cap": null,
|
||||
"res": "0.000"
|
||||
},
|
||||
"src_wire": "BRKH_GTX_NORTHREFCLK0_LOWER"
|
||||
},
|
||||
"BRKH_GTX.BRKH_GTX_NORTHREFCLK1_LOWER->BRKH_GTX_NORTHREFCLK1_UPPER": {
|
||||
"can_invert": "0",
|
||||
"dst_to_src": {
|
||||
"delay": null,
|
||||
"in_cap": null,
|
||||
"res": "0.000"
|
||||
},
|
||||
"dst_wire": "BRKH_GTX_NORTHREFCLK1_UPPER",
|
||||
"is_directional": "1",
|
||||
"is_pass_transistor": 1,
|
||||
"is_pseudo": "0",
|
||||
"src_to_dst": {
|
||||
"delay": null,
|
||||
"in_cap": null,
|
||||
"res": "0.000"
|
||||
},
|
||||
"src_wire": "BRKH_GTX_NORTHREFCLK1_LOWER"
|
||||
},
|
||||
"BRKH_GTX.BRKH_GTX_REFCLK0_LOWER->BRKH_GTX_NORTHREFCLK0_UPPER": {
|
||||
"can_invert": "0",
|
||||
"dst_to_src": {
|
||||
"delay": null,
|
||||
"in_cap": null,
|
||||
"res": "0.000"
|
||||
},
|
||||
"dst_wire": "BRKH_GTX_NORTHREFCLK0_UPPER",
|
||||
"is_directional": "1",
|
||||
"is_pass_transistor": 1,
|
||||
"is_pseudo": "0",
|
||||
"src_to_dst": {
|
||||
"delay": null,
|
||||
"in_cap": null,
|
||||
"res": "0.000"
|
||||
},
|
||||
"src_wire": "BRKH_GTX_REFCLK0_LOWER"
|
||||
},
|
||||
"BRKH_GTX.BRKH_GTX_REFCLK0_LOWER->BRKH_GTX_NORTHREFCLK1_UPPER": {
|
||||
"can_invert": "0",
|
||||
"dst_to_src": {
|
||||
"delay": null,
|
||||
"in_cap": null,
|
||||
"res": "0.000"
|
||||
},
|
||||
"dst_wire": "BRKH_GTX_NORTHREFCLK1_UPPER",
|
||||
"is_directional": "1",
|
||||
"is_pass_transistor": 1,
|
||||
"is_pseudo": "0",
|
||||
"src_to_dst": {
|
||||
"delay": null,
|
||||
"in_cap": null,
|
||||
"res": "0.000"
|
||||
},
|
||||
"src_wire": "BRKH_GTX_REFCLK0_LOWER"
|
||||
},
|
||||
"BRKH_GTX.BRKH_GTX_REFCLK0_UPPER->BRKH_GTX_SOUTHREFCLK0_LOWER": {
|
||||
"can_invert": "0",
|
||||
"dst_to_src": {
|
||||
"delay": null,
|
||||
"in_cap": null,
|
||||
"res": "0.000"
|
||||
},
|
||||
"dst_wire": "BRKH_GTX_SOUTHREFCLK0_LOWER",
|
||||
"is_directional": "1",
|
||||
"is_pass_transistor": 1,
|
||||
"is_pseudo": "0",
|
||||
"src_to_dst": {
|
||||
"delay": null,
|
||||
"in_cap": null,
|
||||
"res": "0.000"
|
||||
},
|
||||
"src_wire": "BRKH_GTX_REFCLK0_UPPER"
|
||||
},
|
||||
"BRKH_GTX.BRKH_GTX_REFCLK0_UPPER->BRKH_GTX_SOUTHREFCLK1_LOWER": {
|
||||
"can_invert": "0",
|
||||
"dst_to_src": {
|
||||
"delay": null,
|
||||
"in_cap": null,
|
||||
"res": "0.000"
|
||||
},
|
||||
"dst_wire": "BRKH_GTX_SOUTHREFCLK1_LOWER",
|
||||
"is_directional": "1",
|
||||
"is_pass_transistor": 1,
|
||||
"is_pseudo": "0",
|
||||
"src_to_dst": {
|
||||
"delay": null,
|
||||
"in_cap": null,
|
||||
"res": "0.000"
|
||||
},
|
||||
"src_wire": "BRKH_GTX_REFCLK0_UPPER"
|
||||
},
|
||||
"BRKH_GTX.BRKH_GTX_REFCLK1_LOWER->BRKH_GTX_NORTHREFCLK0_UPPER": {
|
||||
"can_invert": "0",
|
||||
"dst_to_src": {
|
||||
"delay": null,
|
||||
"in_cap": null,
|
||||
"res": "0.000"
|
||||
},
|
||||
"dst_wire": "BRKH_GTX_NORTHREFCLK0_UPPER",
|
||||
"is_directional": "1",
|
||||
"is_pass_transistor": 1,
|
||||
"is_pseudo": "0",
|
||||
"src_to_dst": {
|
||||
"delay": null,
|
||||
"in_cap": null,
|
||||
"res": "0.000"
|
||||
},
|
||||
"src_wire": "BRKH_GTX_REFCLK1_LOWER"
|
||||
},
|
||||
"BRKH_GTX.BRKH_GTX_REFCLK1_LOWER->BRKH_GTX_NORTHREFCLK1_UPPER": {
|
||||
"can_invert": "0",
|
||||
"dst_to_src": {
|
||||
"delay": null,
|
||||
"in_cap": null,
|
||||
"res": "0.000"
|
||||
},
|
||||
"dst_wire": "BRKH_GTX_NORTHREFCLK1_UPPER",
|
||||
"is_directional": "1",
|
||||
"is_pass_transistor": 1,
|
||||
"is_pseudo": "0",
|
||||
"src_to_dst": {
|
||||
"delay": null,
|
||||
"in_cap": null,
|
||||
"res": "0.000"
|
||||
},
|
||||
"src_wire": "BRKH_GTX_REFCLK1_LOWER"
|
||||
},
|
||||
"BRKH_GTX.BRKH_GTX_REFCLK1_UPPER->BRKH_GTX_SOUTHREFCLK0_LOWER": {
|
||||
"can_invert": "0",
|
||||
"dst_to_src": {
|
||||
"delay": null,
|
||||
"in_cap": null,
|
||||
"res": "0.000"
|
||||
},
|
||||
"dst_wire": "BRKH_GTX_SOUTHREFCLK0_LOWER",
|
||||
"is_directional": "1",
|
||||
"is_pass_transistor": 1,
|
||||
"is_pseudo": "0",
|
||||
"src_to_dst": {
|
||||
"delay": null,
|
||||
"in_cap": null,
|
||||
"res": "0.000"
|
||||
},
|
||||
"src_wire": "BRKH_GTX_REFCLK1_UPPER"
|
||||
},
|
||||
"BRKH_GTX.BRKH_GTX_REFCLK1_UPPER->BRKH_GTX_SOUTHREFCLK1_LOWER": {
|
||||
"can_invert": "0",
|
||||
"dst_to_src": {
|
||||
"delay": null,
|
||||
"in_cap": null,
|
||||
"res": "0.000"
|
||||
},
|
||||
"dst_wire": "BRKH_GTX_SOUTHREFCLK1_LOWER",
|
||||
"is_directional": "1",
|
||||
"is_pass_transistor": 1,
|
||||
"is_pseudo": "0",
|
||||
"src_to_dst": {
|
||||
"delay": null,
|
||||
"in_cap": null,
|
||||
"res": "0.000"
|
||||
},
|
||||
"src_wire": "BRKH_GTX_REFCLK1_UPPER"
|
||||
},
|
||||
"BRKH_GTX.BRKH_GTX_SOUTHREFCLK0_UPPER->BRKH_GTX_SOUTHREFCLK0_LOWER": {
|
||||
"can_invert": "0",
|
||||
"dst_to_src": {
|
||||
"delay": null,
|
||||
"in_cap": null,
|
||||
"res": "0.000"
|
||||
},
|
||||
"dst_wire": "BRKH_GTX_SOUTHREFCLK0_LOWER",
|
||||
"is_directional": "1",
|
||||
"is_pass_transistor": 1,
|
||||
"is_pseudo": "0",
|
||||
"src_to_dst": {
|
||||
"delay": null,
|
||||
"in_cap": null,
|
||||
"res": "0.000"
|
||||
},
|
||||
"src_wire": "BRKH_GTX_SOUTHREFCLK0_UPPER"
|
||||
},
|
||||
"BRKH_GTX.BRKH_GTX_SOUTHREFCLK1_UPPER->BRKH_GTX_SOUTHREFCLK1_LOWER": {
|
||||
"can_invert": "0",
|
||||
"dst_to_src": {
|
||||
"delay": null,
|
||||
"in_cap": null,
|
||||
"res": "0.000"
|
||||
},
|
||||
"dst_wire": "BRKH_GTX_SOUTHREFCLK1_LOWER",
|
||||
"is_directional": "1",
|
||||
"is_pass_transistor": 1,
|
||||
"is_pseudo": "0",
|
||||
"src_to_dst": {
|
||||
"delay": null,
|
||||
"in_cap": null,
|
||||
"res": "0.000"
|
||||
},
|
||||
"src_wire": "BRKH_GTX_SOUTHREFCLK1_UPPER"
|
||||
}
|
||||
},
|
||||
"sites": [],
|
||||
"tile_type": "BRKH_GTX",
|
||||
"wires": [
|
||||
"BRKH_GTX_NORTHREFCLK0_LOWER",
|
||||
"BRKH_GTX_NORTHREFCLK0_UPPER",
|
||||
"BRKH_GTX_NORTHREFCLK1_LOWER",
|
||||
"BRKH_GTX_NORTHREFCLK1_UPPER",
|
||||
"BRKH_GTX_REFCLK0_LOWER",
|
||||
"BRKH_GTX_REFCLK0_UPPER",
|
||||
"BRKH_GTX_REFCLK1_LOWER",
|
||||
"BRKH_GTX_REFCLK1_UPPER",
|
||||
"BRKH_GTX_SOUTHREFCLK0_LOWER",
|
||||
"BRKH_GTX_SOUTHREFCLK0_UPPER",
|
||||
"BRKH_GTX_SOUTHREFCLK1_LOWER",
|
||||
"BRKH_GTX_SOUTHREFCLK1_UPPER"
|
||||
]
|
||||
"wires": {
|
||||
"BRKH_GTX_NORTHREFCLK0_LOWER": null,
|
||||
"BRKH_GTX_NORTHREFCLK0_UPPER": null,
|
||||
"BRKH_GTX_NORTHREFCLK1_LOWER": null,
|
||||
"BRKH_GTX_NORTHREFCLK1_UPPER": null,
|
||||
"BRKH_GTX_REFCLK0_LOWER": null,
|
||||
"BRKH_GTX_REFCLK0_UPPER": null,
|
||||
"BRKH_GTX_REFCLK1_LOWER": null,
|
||||
"BRKH_GTX_REFCLK1_UPPER": null,
|
||||
"BRKH_GTX_SOUTHREFCLK0_LOWER": null,
|
||||
"BRKH_GTX_SOUTHREFCLK0_UPPER": null,
|
||||
"BRKH_GTX_SOUTHREFCLK1_LOWER": null,
|
||||
"BRKH_GTX_SOUTHREFCLK1_UPPER": null
|
||||
}
|
||||
}
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -2,123 +2,213 @@
|
|||
"pips": {},
|
||||
"sites": [],
|
||||
"tile_type": "BRKH_TERM_INT",
|
||||
"wires": [
|
||||
"T_TERM_INT_UTURN_LV_R16",
|
||||
"T_TERM_INT_UTURN_LV_R17",
|
||||
"T_TERM_INT_UTURN_LV_R2",
|
||||
"T_TERM_INT_UTURN_LV_R3",
|
||||
"T_TERM_INT_UTURN_LV_R4",
|
||||
"T_TERM_INT_UTURN_LV_R5",
|
||||
"T_TERM_INT_UTURN_LV_R6",
|
||||
"T_TERM_INT_UTURN_LV_R7",
|
||||
"T_TERM_INT_UTURN_LV_R9",
|
||||
"T_TERM_UTURN_INT_ER1BEG_S0",
|
||||
"T_TERM_UTURN_INT_ER1END3",
|
||||
"T_TERM_UTURN_INT_FAN_BOUNCE_S3_0",
|
||||
"T_TERM_UTURN_INT_FAN_BOUNCE_S3_2",
|
||||
"T_TERM_UTURN_INT_FAN_BOUNCE_S3_4",
|
||||
"T_TERM_UTURN_INT_FAN_BOUNCE_S3_6",
|
||||
"T_TERM_UTURN_INT_LVB0",
|
||||
"T_TERM_UTURN_INT_LVB1",
|
||||
"T_TERM_UTURN_INT_LVB2",
|
||||
"T_TERM_UTURN_INT_LVB3",
|
||||
"T_TERM_UTURN_INT_LVB4",
|
||||
"T_TERM_UTURN_INT_LVB5",
|
||||
"T_TERM_UTURN_INT_LVB_L0",
|
||||
"T_TERM_UTURN_INT_LVB_L1",
|
||||
"T_TERM_UTURN_INT_LVB_L2",
|
||||
"T_TERM_UTURN_INT_LVB_L3",
|
||||
"T_TERM_UTURN_INT_LVB_L4",
|
||||
"T_TERM_UTURN_INT_LVB_L5",
|
||||
"T_TERM_UTURN_INT_LV_L16",
|
||||
"T_TERM_UTURN_INT_LV_L17",
|
||||
"T_TERM_UTURN_INT_LV_L2",
|
||||
"T_TERM_UTURN_INT_LV_L3",
|
||||
"T_TERM_UTURN_INT_LV_L4",
|
||||
"T_TERM_UTURN_INT_LV_L5",
|
||||
"T_TERM_UTURN_INT_LV_L6",
|
||||
"T_TERM_UTURN_INT_LV_L7",
|
||||
"T_TERM_UTURN_INT_LV_L9",
|
||||
"T_TERM_UTURN_INT_SE2A0",
|
||||
"T_TERM_UTURN_INT_SE2A1",
|
||||
"T_TERM_UTURN_INT_SE2A2",
|
||||
"T_TERM_UTURN_INT_SE2A3",
|
||||
"T_TERM_UTURN_INT_SE6B0",
|
||||
"T_TERM_UTURN_INT_SE6B1",
|
||||
"T_TERM_UTURN_INT_SE6B2",
|
||||
"T_TERM_UTURN_INT_SE6B3",
|
||||
"T_TERM_UTURN_INT_SE6C0",
|
||||
"T_TERM_UTURN_INT_SE6C1",
|
||||
"T_TERM_UTURN_INT_SE6C2",
|
||||
"T_TERM_UTURN_INT_SE6C3",
|
||||
"T_TERM_UTURN_INT_SE6D0",
|
||||
"T_TERM_UTURN_INT_SE6D1",
|
||||
"T_TERM_UTURN_INT_SE6D2",
|
||||
"T_TERM_UTURN_INT_SE6D3",
|
||||
"T_TERM_UTURN_INT_SE6E0",
|
||||
"T_TERM_UTURN_INT_SE6E1",
|
||||
"T_TERM_UTURN_INT_SE6E2",
|
||||
"T_TERM_UTURN_INT_SE6E3",
|
||||
"T_TERM_UTURN_INT_SL1END0_SLOW",
|
||||
"T_TERM_UTURN_INT_SL1END1_SLOW",
|
||||
"T_TERM_UTURN_INT_SL1END2_SLOW",
|
||||
"T_TERM_UTURN_INT_SL1END3_SLOW",
|
||||
"T_TERM_UTURN_INT_SR1END1_SLOW",
|
||||
"T_TERM_UTURN_INT_SR1END2_SLOW",
|
||||
"T_TERM_UTURN_INT_SR1END3_SLOW",
|
||||
"T_TERM_UTURN_INT_SS2A0",
|
||||
"T_TERM_UTURN_INT_SS2A1",
|
||||
"T_TERM_UTURN_INT_SS2A2",
|
||||
"T_TERM_UTURN_INT_SS2A3",
|
||||
"T_TERM_UTURN_INT_SS2END0",
|
||||
"T_TERM_UTURN_INT_SS2END1",
|
||||
"T_TERM_UTURN_INT_SS2END2",
|
||||
"T_TERM_UTURN_INT_SS2END3",
|
||||
"T_TERM_UTURN_INT_SS6A0",
|
||||
"T_TERM_UTURN_INT_SS6A1",
|
||||
"T_TERM_UTURN_INT_SS6A2",
|
||||
"T_TERM_UTURN_INT_SS6A3",
|
||||
"T_TERM_UTURN_INT_SS6B0",
|
||||
"T_TERM_UTURN_INT_SS6B1",
|
||||
"T_TERM_UTURN_INT_SS6B2",
|
||||
"T_TERM_UTURN_INT_SS6B3",
|
||||
"T_TERM_UTURN_INT_SS6C0",
|
||||
"T_TERM_UTURN_INT_SS6C1",
|
||||
"T_TERM_UTURN_INT_SS6C2",
|
||||
"T_TERM_UTURN_INT_SS6C3",
|
||||
"T_TERM_UTURN_INT_SS6D0",
|
||||
"T_TERM_UTURN_INT_SS6D1",
|
||||
"T_TERM_UTURN_INT_SS6D2",
|
||||
"T_TERM_UTURN_INT_SS6D3",
|
||||
"T_TERM_UTURN_INT_SS6E0",
|
||||
"T_TERM_UTURN_INT_SS6E1",
|
||||
"T_TERM_UTURN_INT_SS6E2",
|
||||
"T_TERM_UTURN_INT_SS6E3",
|
||||
"T_TERM_UTURN_INT_SS6END0",
|
||||
"T_TERM_UTURN_INT_SS6END1",
|
||||
"T_TERM_UTURN_INT_SS6END2",
|
||||
"T_TERM_UTURN_INT_SS6END3",
|
||||
"T_TERM_UTURN_INT_SW2A0",
|
||||
"T_TERM_UTURN_INT_SW2A1",
|
||||
"T_TERM_UTURN_INT_SW2A2",
|
||||
"T_TERM_UTURN_INT_SW2A3",
|
||||
"T_TERM_UTURN_INT_SW6B0",
|
||||
"T_TERM_UTURN_INT_SW6B1",
|
||||
"T_TERM_UTURN_INT_SW6B2",
|
||||
"T_TERM_UTURN_INT_SW6B3",
|
||||
"T_TERM_UTURN_INT_SW6C0",
|
||||
"T_TERM_UTURN_INT_SW6C1",
|
||||
"T_TERM_UTURN_INT_SW6C2",
|
||||
"T_TERM_UTURN_INT_SW6C3",
|
||||
"T_TERM_UTURN_INT_SW6D0",
|
||||
"T_TERM_UTURN_INT_SW6D1",
|
||||
"T_TERM_UTURN_INT_SW6D2",
|
||||
"T_TERM_UTURN_INT_SW6D3",
|
||||
"T_TERM_UTURN_INT_SW6E0",
|
||||
"T_TERM_UTURN_INT_SW6E1",
|
||||
"T_TERM_UTURN_INT_SW6E2",
|
||||
"T_TERM_UTURN_INT_SW6E3",
|
||||
"T_TERM_UTURN_INT_WR1BEG_S0",
|
||||
"T_TERM_UTURN_INT_WR1END_S1_0"
|
||||
]
|
||||
"wires": {
|
||||
"T_TERM_INT_UTURN_LV_R16": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"T_TERM_INT_UTURN_LV_R17": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"T_TERM_INT_UTURN_LV_R2": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"T_TERM_INT_UTURN_LV_R3": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"T_TERM_INT_UTURN_LV_R4": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"T_TERM_INT_UTURN_LV_R5": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"T_TERM_INT_UTURN_LV_R6": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"T_TERM_INT_UTURN_LV_R7": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"T_TERM_INT_UTURN_LV_R9": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"T_TERM_UTURN_INT_ER1BEG_S0": null,
|
||||
"T_TERM_UTURN_INT_ER1END3": null,
|
||||
"T_TERM_UTURN_INT_FAN_BOUNCE_S3_0": null,
|
||||
"T_TERM_UTURN_INT_FAN_BOUNCE_S3_2": null,
|
||||
"T_TERM_UTURN_INT_FAN_BOUNCE_S3_4": null,
|
||||
"T_TERM_UTURN_INT_FAN_BOUNCE_S3_6": null,
|
||||
"T_TERM_UTURN_INT_LVB0": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"T_TERM_UTURN_INT_LVB1": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"T_TERM_UTURN_INT_LVB2": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"T_TERM_UTURN_INT_LVB3": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"T_TERM_UTURN_INT_LVB4": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"T_TERM_UTURN_INT_LVB5": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"T_TERM_UTURN_INT_LVB_L0": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"T_TERM_UTURN_INT_LVB_L1": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"T_TERM_UTURN_INT_LVB_L2": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"T_TERM_UTURN_INT_LVB_L3": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"T_TERM_UTURN_INT_LVB_L4": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"T_TERM_UTURN_INT_LVB_L5": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"T_TERM_UTURN_INT_LV_L16": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"T_TERM_UTURN_INT_LV_L17": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"T_TERM_UTURN_INT_LV_L2": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"T_TERM_UTURN_INT_LV_L3": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"T_TERM_UTURN_INT_LV_L4": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"T_TERM_UTURN_INT_LV_L5": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"T_TERM_UTURN_INT_LV_L6": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"T_TERM_UTURN_INT_LV_L7": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"T_TERM_UTURN_INT_LV_L9": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"T_TERM_UTURN_INT_SE2A0": null,
|
||||
"T_TERM_UTURN_INT_SE2A1": null,
|
||||
"T_TERM_UTURN_INT_SE2A2": null,
|
||||
"T_TERM_UTURN_INT_SE2A3": null,
|
||||
"T_TERM_UTURN_INT_SE6B0": null,
|
||||
"T_TERM_UTURN_INT_SE6B1": null,
|
||||
"T_TERM_UTURN_INT_SE6B2": null,
|
||||
"T_TERM_UTURN_INT_SE6B3": null,
|
||||
"T_TERM_UTURN_INT_SE6C0": null,
|
||||
"T_TERM_UTURN_INT_SE6C1": null,
|
||||
"T_TERM_UTURN_INT_SE6C2": null,
|
||||
"T_TERM_UTURN_INT_SE6C3": null,
|
||||
"T_TERM_UTURN_INT_SE6D0": null,
|
||||
"T_TERM_UTURN_INT_SE6D1": null,
|
||||
"T_TERM_UTURN_INT_SE6D2": null,
|
||||
"T_TERM_UTURN_INT_SE6D3": null,
|
||||
"T_TERM_UTURN_INT_SE6E0": null,
|
||||
"T_TERM_UTURN_INT_SE6E1": null,
|
||||
"T_TERM_UTURN_INT_SE6E2": null,
|
||||
"T_TERM_UTURN_INT_SE6E3": null,
|
||||
"T_TERM_UTURN_INT_SL1END0_SLOW": null,
|
||||
"T_TERM_UTURN_INT_SL1END1_SLOW": null,
|
||||
"T_TERM_UTURN_INT_SL1END2_SLOW": null,
|
||||
"T_TERM_UTURN_INT_SL1END3_SLOW": null,
|
||||
"T_TERM_UTURN_INT_SR1END1_SLOW": null,
|
||||
"T_TERM_UTURN_INT_SR1END2_SLOW": null,
|
||||
"T_TERM_UTURN_INT_SR1END3_SLOW": null,
|
||||
"T_TERM_UTURN_INT_SS2A0": null,
|
||||
"T_TERM_UTURN_INT_SS2A1": null,
|
||||
"T_TERM_UTURN_INT_SS2A2": null,
|
||||
"T_TERM_UTURN_INT_SS2A3": null,
|
||||
"T_TERM_UTURN_INT_SS2END0": null,
|
||||
"T_TERM_UTURN_INT_SS2END1": null,
|
||||
"T_TERM_UTURN_INT_SS2END2": null,
|
||||
"T_TERM_UTURN_INT_SS2END3": null,
|
||||
"T_TERM_UTURN_INT_SS6A0": null,
|
||||
"T_TERM_UTURN_INT_SS6A1": null,
|
||||
"T_TERM_UTURN_INT_SS6A2": null,
|
||||
"T_TERM_UTURN_INT_SS6A3": null,
|
||||
"T_TERM_UTURN_INT_SS6B0": null,
|
||||
"T_TERM_UTURN_INT_SS6B1": null,
|
||||
"T_TERM_UTURN_INT_SS6B2": null,
|
||||
"T_TERM_UTURN_INT_SS6B3": null,
|
||||
"T_TERM_UTURN_INT_SS6C0": null,
|
||||
"T_TERM_UTURN_INT_SS6C1": null,
|
||||
"T_TERM_UTURN_INT_SS6C2": null,
|
||||
"T_TERM_UTURN_INT_SS6C3": null,
|
||||
"T_TERM_UTURN_INT_SS6D0": null,
|
||||
"T_TERM_UTURN_INT_SS6D1": null,
|
||||
"T_TERM_UTURN_INT_SS6D2": null,
|
||||
"T_TERM_UTURN_INT_SS6D3": null,
|
||||
"T_TERM_UTURN_INT_SS6E0": null,
|
||||
"T_TERM_UTURN_INT_SS6E1": null,
|
||||
"T_TERM_UTURN_INT_SS6E2": null,
|
||||
"T_TERM_UTURN_INT_SS6E3": null,
|
||||
"T_TERM_UTURN_INT_SS6END0": null,
|
||||
"T_TERM_UTURN_INT_SS6END1": null,
|
||||
"T_TERM_UTURN_INT_SS6END2": null,
|
||||
"T_TERM_UTURN_INT_SS6END3": null,
|
||||
"T_TERM_UTURN_INT_SW2A0": null,
|
||||
"T_TERM_UTURN_INT_SW2A1": null,
|
||||
"T_TERM_UTURN_INT_SW2A2": null,
|
||||
"T_TERM_UTURN_INT_SW2A3": null,
|
||||
"T_TERM_UTURN_INT_SW6B0": null,
|
||||
"T_TERM_UTURN_INT_SW6B1": null,
|
||||
"T_TERM_UTURN_INT_SW6B2": null,
|
||||
"T_TERM_UTURN_INT_SW6B3": null,
|
||||
"T_TERM_UTURN_INT_SW6C0": null,
|
||||
"T_TERM_UTURN_INT_SW6C1": null,
|
||||
"T_TERM_UTURN_INT_SW6C2": null,
|
||||
"T_TERM_UTURN_INT_SW6C3": null,
|
||||
"T_TERM_UTURN_INT_SW6D0": null,
|
||||
"T_TERM_UTURN_INT_SW6D1": null,
|
||||
"T_TERM_UTURN_INT_SW6D2": null,
|
||||
"T_TERM_UTURN_INT_SW6D3": null,
|
||||
"T_TERM_UTURN_INT_SW6E0": null,
|
||||
"T_TERM_UTURN_INT_SW6E1": null,
|
||||
"T_TERM_UTURN_INT_SW6E2": null,
|
||||
"T_TERM_UTURN_INT_SW6E3": null,
|
||||
"T_TERM_UTURN_INT_WR1BEG_S0": null,
|
||||
"T_TERM_UTURN_INT_WR1END_S1_0": null
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,124 +2,214 @@
|
|||
"pips": {},
|
||||
"sites": [],
|
||||
"tile_type": "B_TERM_INT",
|
||||
"wires": [
|
||||
"B_TERM_UTURN_INT_ER1BEG0",
|
||||
"B_TERM_UTURN_INT_ER1END_N3_3",
|
||||
"B_TERM_UTURN_INT_FAN_BOUNCE0",
|
||||
"B_TERM_UTURN_INT_FAN_BOUNCE2",
|
||||
"B_TERM_UTURN_INT_FAN_BOUNCE4",
|
||||
"B_TERM_UTURN_INT_FAN_BOUNCE6",
|
||||
"B_TERM_UTURN_INT_LV18",
|
||||
"B_TERM_UTURN_INT_LV2",
|
||||
"B_TERM_UTURN_INT_LV3",
|
||||
"B_TERM_UTURN_INT_LV4",
|
||||
"B_TERM_UTURN_INT_LV5",
|
||||
"B_TERM_UTURN_INT_LV6",
|
||||
"B_TERM_UTURN_INT_LV7",
|
||||
"B_TERM_UTURN_INT_LV8",
|
||||
"B_TERM_UTURN_INT_LV9",
|
||||
"B_TERM_UTURN_INT_LVB0",
|
||||
"B_TERM_UTURN_INT_LVB1",
|
||||
"B_TERM_UTURN_INT_LVB2",
|
||||
"B_TERM_UTURN_INT_LVB3",
|
||||
"B_TERM_UTURN_INT_LVB4",
|
||||
"B_TERM_UTURN_INT_LVB5",
|
||||
"B_TERM_UTURN_INT_LVB_L0",
|
||||
"B_TERM_UTURN_INT_LVB_L1",
|
||||
"B_TERM_UTURN_INT_LVB_L2",
|
||||
"B_TERM_UTURN_INT_LVB_L3",
|
||||
"B_TERM_UTURN_INT_LVB_L4",
|
||||
"B_TERM_UTURN_INT_LVB_L5",
|
||||
"B_TERM_UTURN_INT_LV_L18",
|
||||
"B_TERM_UTURN_INT_LV_L2",
|
||||
"B_TERM_UTURN_INT_LV_L3",
|
||||
"B_TERM_UTURN_INT_LV_L4",
|
||||
"B_TERM_UTURN_INT_LV_L5",
|
||||
"B_TERM_UTURN_INT_LV_L6",
|
||||
"B_TERM_UTURN_INT_LV_L7",
|
||||
"B_TERM_UTURN_INT_LV_L8",
|
||||
"B_TERM_UTURN_INT_LV_L9",
|
||||
"B_TERM_UTURN_INT_SE2BEG0",
|
||||
"B_TERM_UTURN_INT_SE2BEG1",
|
||||
"B_TERM_UTURN_INT_SE2BEG2",
|
||||
"B_TERM_UTURN_INT_SE2BEG3",
|
||||
"B_TERM_UTURN_INT_SE6A0",
|
||||
"B_TERM_UTURN_INT_SE6A1",
|
||||
"B_TERM_UTURN_INT_SE6A2",
|
||||
"B_TERM_UTURN_INT_SE6A3",
|
||||
"B_TERM_UTURN_INT_SE6B0",
|
||||
"B_TERM_UTURN_INT_SE6B1",
|
||||
"B_TERM_UTURN_INT_SE6B2",
|
||||
"B_TERM_UTURN_INT_SE6B3",
|
||||
"B_TERM_UTURN_INT_SE6C0",
|
||||
"B_TERM_UTURN_INT_SE6C1",
|
||||
"B_TERM_UTURN_INT_SE6C2",
|
||||
"B_TERM_UTURN_INT_SE6C3",
|
||||
"B_TERM_UTURN_INT_SE6D0",
|
||||
"B_TERM_UTURN_INT_SE6D1",
|
||||
"B_TERM_UTURN_INT_SE6D2",
|
||||
"B_TERM_UTURN_INT_SE6D3",
|
||||
"B_TERM_UTURN_INT_SL1BEG0",
|
||||
"B_TERM_UTURN_INT_SL1BEG1",
|
||||
"B_TERM_UTURN_INT_SL1BEG2",
|
||||
"B_TERM_UTURN_INT_SL1BEG3",
|
||||
"B_TERM_UTURN_INT_SR1BEG1",
|
||||
"B_TERM_UTURN_INT_SR1BEG2",
|
||||
"B_TERM_UTURN_INT_SR1BEG3",
|
||||
"B_TERM_UTURN_INT_SS2A0",
|
||||
"B_TERM_UTURN_INT_SS2A1",
|
||||
"B_TERM_UTURN_INT_SS2A2",
|
||||
"B_TERM_UTURN_INT_SS2A3",
|
||||
"B_TERM_UTURN_INT_SS2BEG0",
|
||||
"B_TERM_UTURN_INT_SS2BEG1",
|
||||
"B_TERM_UTURN_INT_SS2BEG2",
|
||||
"B_TERM_UTURN_INT_SS2BEG3",
|
||||
"B_TERM_UTURN_INT_SS6A0",
|
||||
"B_TERM_UTURN_INT_SS6A1",
|
||||
"B_TERM_UTURN_INT_SS6A2",
|
||||
"B_TERM_UTURN_INT_SS6A3",
|
||||
"B_TERM_UTURN_INT_SS6B0",
|
||||
"B_TERM_UTURN_INT_SS6B1",
|
||||
"B_TERM_UTURN_INT_SS6B2",
|
||||
"B_TERM_UTURN_INT_SS6B3",
|
||||
"B_TERM_UTURN_INT_SS6BEG0",
|
||||
"B_TERM_UTURN_INT_SS6BEG1",
|
||||
"B_TERM_UTURN_INT_SS6BEG2",
|
||||
"B_TERM_UTURN_INT_SS6BEG3",
|
||||
"B_TERM_UTURN_INT_SS6C0",
|
||||
"B_TERM_UTURN_INT_SS6C1",
|
||||
"B_TERM_UTURN_INT_SS6C2",
|
||||
"B_TERM_UTURN_INT_SS6C3",
|
||||
"B_TERM_UTURN_INT_SS6D0",
|
||||
"B_TERM_UTURN_INT_SS6D1",
|
||||
"B_TERM_UTURN_INT_SS6D2",
|
||||
"B_TERM_UTURN_INT_SS6D3",
|
||||
"B_TERM_UTURN_INT_SS6E0",
|
||||
"B_TERM_UTURN_INT_SS6E1",
|
||||
"B_TERM_UTURN_INT_SS6E2",
|
||||
"B_TERM_UTURN_INT_SS6E3",
|
||||
"B_TERM_UTURN_INT_SW2BEG0",
|
||||
"B_TERM_UTURN_INT_SW2BEG1",
|
||||
"B_TERM_UTURN_INT_SW2BEG2",
|
||||
"B_TERM_UTURN_INT_SW2BEG3",
|
||||
"B_TERM_UTURN_INT_SW6A0",
|
||||
"B_TERM_UTURN_INT_SW6A1",
|
||||
"B_TERM_UTURN_INT_SW6A2",
|
||||
"B_TERM_UTURN_INT_SW6A3",
|
||||
"B_TERM_UTURN_INT_SW6B0",
|
||||
"B_TERM_UTURN_INT_SW6B1",
|
||||
"B_TERM_UTURN_INT_SW6B2",
|
||||
"B_TERM_UTURN_INT_SW6B3",
|
||||
"B_TERM_UTURN_INT_SW6C0",
|
||||
"B_TERM_UTURN_INT_SW6C1",
|
||||
"B_TERM_UTURN_INT_SW6C2",
|
||||
"B_TERM_UTURN_INT_SW6C3",
|
||||
"B_TERM_UTURN_INT_SW6D0",
|
||||
"B_TERM_UTURN_INT_SW6D1",
|
||||
"B_TERM_UTURN_INT_SW6D2",
|
||||
"B_TERM_UTURN_INT_SW6D3",
|
||||
"B_TERM_UTURN_INT_SW6END_N0_3",
|
||||
"B_TERM_UTURN_INT_WR1BEG0",
|
||||
"B_TERM_UTURN_INT_WR1END0"
|
||||
]
|
||||
"wires": {
|
||||
"B_TERM_UTURN_INT_ER1BEG0": null,
|
||||
"B_TERM_UTURN_INT_ER1END_N3_3": null,
|
||||
"B_TERM_UTURN_INT_FAN_BOUNCE0": null,
|
||||
"B_TERM_UTURN_INT_FAN_BOUNCE2": null,
|
||||
"B_TERM_UTURN_INT_FAN_BOUNCE4": null,
|
||||
"B_TERM_UTURN_INT_FAN_BOUNCE6": null,
|
||||
"B_TERM_UTURN_INT_LV18": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LV2": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LV3": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LV4": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LV5": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LV6": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LV7": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LV8": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LV9": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LVB0": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LVB1": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LVB2": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LVB3": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LVB4": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LVB5": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LVB_L0": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LVB_L1": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LVB_L2": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LVB_L3": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LVB_L4": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LVB_L5": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LV_L18": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LV_L2": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LV_L3": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LV_L4": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LV_L5": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LV_L6": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LV_L7": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LV_L8": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_LV_L9": {
|
||||
"cap": "13.000",
|
||||
"res": "2.800"
|
||||
},
|
||||
"B_TERM_UTURN_INT_SE2BEG0": null,
|
||||
"B_TERM_UTURN_INT_SE2BEG1": null,
|
||||
"B_TERM_UTURN_INT_SE2BEG2": null,
|
||||
"B_TERM_UTURN_INT_SE2BEG3": null,
|
||||
"B_TERM_UTURN_INT_SE6A0": null,
|
||||
"B_TERM_UTURN_INT_SE6A1": null,
|
||||
"B_TERM_UTURN_INT_SE6A2": null,
|
||||
"B_TERM_UTURN_INT_SE6A3": null,
|
||||
"B_TERM_UTURN_INT_SE6B0": null,
|
||||
"B_TERM_UTURN_INT_SE6B1": null,
|
||||
"B_TERM_UTURN_INT_SE6B2": null,
|
||||
"B_TERM_UTURN_INT_SE6B3": null,
|
||||
"B_TERM_UTURN_INT_SE6C0": null,
|
||||
"B_TERM_UTURN_INT_SE6C1": null,
|
||||
"B_TERM_UTURN_INT_SE6C2": null,
|
||||
"B_TERM_UTURN_INT_SE6C3": null,
|
||||
"B_TERM_UTURN_INT_SE6D0": null,
|
||||
"B_TERM_UTURN_INT_SE6D1": null,
|
||||
"B_TERM_UTURN_INT_SE6D2": null,
|
||||
"B_TERM_UTURN_INT_SE6D3": null,
|
||||
"B_TERM_UTURN_INT_SL1BEG0": null,
|
||||
"B_TERM_UTURN_INT_SL1BEG1": null,
|
||||
"B_TERM_UTURN_INT_SL1BEG2": null,
|
||||
"B_TERM_UTURN_INT_SL1BEG3": null,
|
||||
"B_TERM_UTURN_INT_SR1BEG1": null,
|
||||
"B_TERM_UTURN_INT_SR1BEG2": null,
|
||||
"B_TERM_UTURN_INT_SR1BEG3": null,
|
||||
"B_TERM_UTURN_INT_SS2A0": null,
|
||||
"B_TERM_UTURN_INT_SS2A1": null,
|
||||
"B_TERM_UTURN_INT_SS2A2": null,
|
||||
"B_TERM_UTURN_INT_SS2A3": null,
|
||||
"B_TERM_UTURN_INT_SS2BEG0": null,
|
||||
"B_TERM_UTURN_INT_SS2BEG1": null,
|
||||
"B_TERM_UTURN_INT_SS2BEG2": null,
|
||||
"B_TERM_UTURN_INT_SS2BEG3": null,
|
||||
"B_TERM_UTURN_INT_SS6A0": null,
|
||||
"B_TERM_UTURN_INT_SS6A1": null,
|
||||
"B_TERM_UTURN_INT_SS6A2": null,
|
||||
"B_TERM_UTURN_INT_SS6A3": null,
|
||||
"B_TERM_UTURN_INT_SS6B0": null,
|
||||
"B_TERM_UTURN_INT_SS6B1": null,
|
||||
"B_TERM_UTURN_INT_SS6B2": null,
|
||||
"B_TERM_UTURN_INT_SS6B3": null,
|
||||
"B_TERM_UTURN_INT_SS6BEG0": null,
|
||||
"B_TERM_UTURN_INT_SS6BEG1": null,
|
||||
"B_TERM_UTURN_INT_SS6BEG2": null,
|
||||
"B_TERM_UTURN_INT_SS6BEG3": null,
|
||||
"B_TERM_UTURN_INT_SS6C0": null,
|
||||
"B_TERM_UTURN_INT_SS6C1": null,
|
||||
"B_TERM_UTURN_INT_SS6C2": null,
|
||||
"B_TERM_UTURN_INT_SS6C3": null,
|
||||
"B_TERM_UTURN_INT_SS6D0": null,
|
||||
"B_TERM_UTURN_INT_SS6D1": null,
|
||||
"B_TERM_UTURN_INT_SS6D2": null,
|
||||
"B_TERM_UTURN_INT_SS6D3": null,
|
||||
"B_TERM_UTURN_INT_SS6E0": null,
|
||||
"B_TERM_UTURN_INT_SS6E1": null,
|
||||
"B_TERM_UTURN_INT_SS6E2": null,
|
||||
"B_TERM_UTURN_INT_SS6E3": null,
|
||||
"B_TERM_UTURN_INT_SW2BEG0": null,
|
||||
"B_TERM_UTURN_INT_SW2BEG1": null,
|
||||
"B_TERM_UTURN_INT_SW2BEG2": null,
|
||||
"B_TERM_UTURN_INT_SW2BEG3": null,
|
||||
"B_TERM_UTURN_INT_SW6A0": null,
|
||||
"B_TERM_UTURN_INT_SW6A1": null,
|
||||
"B_TERM_UTURN_INT_SW6A2": null,
|
||||
"B_TERM_UTURN_INT_SW6A3": null,
|
||||
"B_TERM_UTURN_INT_SW6B0": null,
|
||||
"B_TERM_UTURN_INT_SW6B1": null,
|
||||
"B_TERM_UTURN_INT_SW6B2": null,
|
||||
"B_TERM_UTURN_INT_SW6B3": null,
|
||||
"B_TERM_UTURN_INT_SW6C0": null,
|
||||
"B_TERM_UTURN_INT_SW6C1": null,
|
||||
"B_TERM_UTURN_INT_SW6C2": null,
|
||||
"B_TERM_UTURN_INT_SW6C3": null,
|
||||
"B_TERM_UTURN_INT_SW6D0": null,
|
||||
"B_TERM_UTURN_INT_SW6D1": null,
|
||||
"B_TERM_UTURN_INT_SW6D2": null,
|
||||
"B_TERM_UTURN_INT_SW6D3": null,
|
||||
"B_TERM_UTURN_INT_SW6END_N0_3": null,
|
||||
"B_TERM_UTURN_INT_WR1BEG0": null,
|
||||
"B_TERM_UTURN_INT_WR1END0": null
|
||||
}
|
||||
}
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -2,260 +2,260 @@
|
|||
"pips": {},
|
||||
"sites": [],
|
||||
"tile_type": "CLK_FEED",
|
||||
"wires": [
|
||||
"CLK_FEED_CK_BUFG_CASC0",
|
||||
"CLK_FEED_CK_BUFG_CASC1",
|
||||
"CLK_FEED_CK_BUFG_CASC10",
|
||||
"CLK_FEED_CK_BUFG_CASC11",
|
||||
"CLK_FEED_CK_BUFG_CASC12",
|
||||
"CLK_FEED_CK_BUFG_CASC13",
|
||||
"CLK_FEED_CK_BUFG_CASC14",
|
||||
"CLK_FEED_CK_BUFG_CASC15",
|
||||
"CLK_FEED_CK_BUFG_CASC16",
|
||||
"CLK_FEED_CK_BUFG_CASC17",
|
||||
"CLK_FEED_CK_BUFG_CASC18",
|
||||
"CLK_FEED_CK_BUFG_CASC19",
|
||||
"CLK_FEED_CK_BUFG_CASC2",
|
||||
"CLK_FEED_CK_BUFG_CASC20",
|
||||
"CLK_FEED_CK_BUFG_CASC21",
|
||||
"CLK_FEED_CK_BUFG_CASC22",
|
||||
"CLK_FEED_CK_BUFG_CASC23",
|
||||
"CLK_FEED_CK_BUFG_CASC24",
|
||||
"CLK_FEED_CK_BUFG_CASC25",
|
||||
"CLK_FEED_CK_BUFG_CASC26",
|
||||
"CLK_FEED_CK_BUFG_CASC27",
|
||||
"CLK_FEED_CK_BUFG_CASC28",
|
||||
"CLK_FEED_CK_BUFG_CASC29",
|
||||
"CLK_FEED_CK_BUFG_CASC3",
|
||||
"CLK_FEED_CK_BUFG_CASC30",
|
||||
"CLK_FEED_CK_BUFG_CASC31",
|
||||
"CLK_FEED_CK_BUFG_CASC4",
|
||||
"CLK_FEED_CK_BUFG_CASC5",
|
||||
"CLK_FEED_CK_BUFG_CASC6",
|
||||
"CLK_FEED_CK_BUFG_CASC7",
|
||||
"CLK_FEED_CK_BUFG_CASC8",
|
||||
"CLK_FEED_CK_BUFG_CASC9",
|
||||
"CLK_FEED_CK_GCLK0",
|
||||
"CLK_FEED_CK_GCLK1",
|
||||
"CLK_FEED_CK_GCLK10",
|
||||
"CLK_FEED_CK_GCLK11",
|
||||
"CLK_FEED_CK_GCLK12",
|
||||
"CLK_FEED_CK_GCLK13",
|
||||
"CLK_FEED_CK_GCLK14",
|
||||
"CLK_FEED_CK_GCLK15",
|
||||
"CLK_FEED_CK_GCLK16",
|
||||
"CLK_FEED_CK_GCLK17",
|
||||
"CLK_FEED_CK_GCLK18",
|
||||
"CLK_FEED_CK_GCLK19",
|
||||
"CLK_FEED_CK_GCLK2",
|
||||
"CLK_FEED_CK_GCLK20",
|
||||
"CLK_FEED_CK_GCLK21",
|
||||
"CLK_FEED_CK_GCLK22",
|
||||
"CLK_FEED_CK_GCLK23",
|
||||
"CLK_FEED_CK_GCLK24",
|
||||
"CLK_FEED_CK_GCLK25",
|
||||
"CLK_FEED_CK_GCLK26",
|
||||
"CLK_FEED_CK_GCLK27",
|
||||
"CLK_FEED_CK_GCLK28",
|
||||
"CLK_FEED_CK_GCLK29",
|
||||
"CLK_FEED_CK_GCLK3",
|
||||
"CLK_FEED_CK_GCLK30",
|
||||
"CLK_FEED_CK_GCLK31",
|
||||
"CLK_FEED_CK_GCLK4",
|
||||
"CLK_FEED_CK_GCLK5",
|
||||
"CLK_FEED_CK_GCLK6",
|
||||
"CLK_FEED_CK_GCLK7",
|
||||
"CLK_FEED_CK_GCLK8",
|
||||
"CLK_FEED_CK_GCLK9",
|
||||
"CLK_FEED_EE2A0",
|
||||
"CLK_FEED_EE2A1",
|
||||
"CLK_FEED_EE2A2",
|
||||
"CLK_FEED_EE2A3",
|
||||
"CLK_FEED_EE2BEG0",
|
||||
"CLK_FEED_EE2BEG1",
|
||||
"CLK_FEED_EE2BEG2",
|
||||
"CLK_FEED_EE2BEG3",
|
||||
"CLK_FEED_EE4A0",
|
||||
"CLK_FEED_EE4A1",
|
||||
"CLK_FEED_EE4A2",
|
||||
"CLK_FEED_EE4A3",
|
||||
"CLK_FEED_EE4B0",
|
||||
"CLK_FEED_EE4B1",
|
||||
"CLK_FEED_EE4B2",
|
||||
"CLK_FEED_EE4B3",
|
||||
"CLK_FEED_EE4BEG0",
|
||||
"CLK_FEED_EE4BEG1",
|
||||
"CLK_FEED_EE4BEG2",
|
||||
"CLK_FEED_EE4BEG3",
|
||||
"CLK_FEED_EE4C0",
|
||||
"CLK_FEED_EE4C1",
|
||||
"CLK_FEED_EE4C2",
|
||||
"CLK_FEED_EE4C3",
|
||||
"CLK_FEED_EL1BEG0",
|
||||
"CLK_FEED_EL1BEG1",
|
||||
"CLK_FEED_EL1BEG2",
|
||||
"CLK_FEED_EL1BEG3",
|
||||
"CLK_FEED_ER1BEG0",
|
||||
"CLK_FEED_ER1BEG1",
|
||||
"CLK_FEED_ER1BEG2",
|
||||
"CLK_FEED_ER1BEG3",
|
||||
"CLK_FEED_LH1",
|
||||
"CLK_FEED_LH10",
|
||||
"CLK_FEED_LH11",
|
||||
"CLK_FEED_LH12",
|
||||
"CLK_FEED_LH2",
|
||||
"CLK_FEED_LH3",
|
||||
"CLK_FEED_LH4",
|
||||
"CLK_FEED_LH5",
|
||||
"CLK_FEED_LH6",
|
||||
"CLK_FEED_LH7",
|
||||
"CLK_FEED_LH8",
|
||||
"CLK_FEED_LH9",
|
||||
"CLK_FEED_MONITOR_N",
|
||||
"CLK_FEED_MONITOR_P",
|
||||
"CLK_FEED_NE2A0",
|
||||
"CLK_FEED_NE2A1",
|
||||
"CLK_FEED_NE2A2",
|
||||
"CLK_FEED_NE2A3",
|
||||
"CLK_FEED_NE4BEG0",
|
||||
"CLK_FEED_NE4BEG1",
|
||||
"CLK_FEED_NE4BEG2",
|
||||
"CLK_FEED_NE4BEG3",
|
||||
"CLK_FEED_NE4C0",
|
||||
"CLK_FEED_NE4C1",
|
||||
"CLK_FEED_NE4C2",
|
||||
"CLK_FEED_NE4C3",
|
||||
"CLK_FEED_NW2A0",
|
||||
"CLK_FEED_NW2A1",
|
||||
"CLK_FEED_NW2A2",
|
||||
"CLK_FEED_NW2A3",
|
||||
"CLK_FEED_NW4A0",
|
||||
"CLK_FEED_NW4A1",
|
||||
"CLK_FEED_NW4A2",
|
||||
"CLK_FEED_NW4A3",
|
||||
"CLK_FEED_NW4END0",
|
||||
"CLK_FEED_NW4END1",
|
||||
"CLK_FEED_NW4END2",
|
||||
"CLK_FEED_NW4END3",
|
||||
"CLK_FEED_R_CK_BUFG_CASC0",
|
||||
"CLK_FEED_R_CK_BUFG_CASC1",
|
||||
"CLK_FEED_R_CK_BUFG_CASC10",
|
||||
"CLK_FEED_R_CK_BUFG_CASC11",
|
||||
"CLK_FEED_R_CK_BUFG_CASC12",
|
||||
"CLK_FEED_R_CK_BUFG_CASC13",
|
||||
"CLK_FEED_R_CK_BUFG_CASC14",
|
||||
"CLK_FEED_R_CK_BUFG_CASC15",
|
||||
"CLK_FEED_R_CK_BUFG_CASC16",
|
||||
"CLK_FEED_R_CK_BUFG_CASC17",
|
||||
"CLK_FEED_R_CK_BUFG_CASC18",
|
||||
"CLK_FEED_R_CK_BUFG_CASC19",
|
||||
"CLK_FEED_R_CK_BUFG_CASC2",
|
||||
"CLK_FEED_R_CK_BUFG_CASC20",
|
||||
"CLK_FEED_R_CK_BUFG_CASC21",
|
||||
"CLK_FEED_R_CK_BUFG_CASC22",
|
||||
"CLK_FEED_R_CK_BUFG_CASC23",
|
||||
"CLK_FEED_R_CK_BUFG_CASC24",
|
||||
"CLK_FEED_R_CK_BUFG_CASC25",
|
||||
"CLK_FEED_R_CK_BUFG_CASC26",
|
||||
"CLK_FEED_R_CK_BUFG_CASC27",
|
||||
"CLK_FEED_R_CK_BUFG_CASC28",
|
||||
"CLK_FEED_R_CK_BUFG_CASC29",
|
||||
"CLK_FEED_R_CK_BUFG_CASC3",
|
||||
"CLK_FEED_R_CK_BUFG_CASC30",
|
||||
"CLK_FEED_R_CK_BUFG_CASC31",
|
||||
"CLK_FEED_R_CK_BUFG_CASC4",
|
||||
"CLK_FEED_R_CK_BUFG_CASC5",
|
||||
"CLK_FEED_R_CK_BUFG_CASC6",
|
||||
"CLK_FEED_R_CK_BUFG_CASC7",
|
||||
"CLK_FEED_R_CK_BUFG_CASC8",
|
||||
"CLK_FEED_R_CK_BUFG_CASC9",
|
||||
"CLK_FEED_R_CK_GCLK0",
|
||||
"CLK_FEED_R_CK_GCLK1",
|
||||
"CLK_FEED_R_CK_GCLK10",
|
||||
"CLK_FEED_R_CK_GCLK11",
|
||||
"CLK_FEED_R_CK_GCLK12",
|
||||
"CLK_FEED_R_CK_GCLK13",
|
||||
"CLK_FEED_R_CK_GCLK14",
|
||||
"CLK_FEED_R_CK_GCLK15",
|
||||
"CLK_FEED_R_CK_GCLK16",
|
||||
"CLK_FEED_R_CK_GCLK17",
|
||||
"CLK_FEED_R_CK_GCLK18",
|
||||
"CLK_FEED_R_CK_GCLK19",
|
||||
"CLK_FEED_R_CK_GCLK2",
|
||||
"CLK_FEED_R_CK_GCLK20",
|
||||
"CLK_FEED_R_CK_GCLK21",
|
||||
"CLK_FEED_R_CK_GCLK22",
|
||||
"CLK_FEED_R_CK_GCLK23",
|
||||
"CLK_FEED_R_CK_GCLK24",
|
||||
"CLK_FEED_R_CK_GCLK25",
|
||||
"CLK_FEED_R_CK_GCLK26",
|
||||
"CLK_FEED_R_CK_GCLK27",
|
||||
"CLK_FEED_R_CK_GCLK28",
|
||||
"CLK_FEED_R_CK_GCLK29",
|
||||
"CLK_FEED_R_CK_GCLK3",
|
||||
"CLK_FEED_R_CK_GCLK30",
|
||||
"CLK_FEED_R_CK_GCLK31",
|
||||
"CLK_FEED_R_CK_GCLK4",
|
||||
"CLK_FEED_R_CK_GCLK5",
|
||||
"CLK_FEED_R_CK_GCLK6",
|
||||
"CLK_FEED_R_CK_GCLK7",
|
||||
"CLK_FEED_R_CK_GCLK8",
|
||||
"CLK_FEED_R_CK_GCLK9",
|
||||
"CLK_FEED_SE2A0",
|
||||
"CLK_FEED_SE2A1",
|
||||
"CLK_FEED_SE2A2",
|
||||
"CLK_FEED_SE2A3",
|
||||
"CLK_FEED_SE4BEG0",
|
||||
"CLK_FEED_SE4BEG1",
|
||||
"CLK_FEED_SE4BEG2",
|
||||
"CLK_FEED_SE4BEG3",
|
||||
"CLK_FEED_SE4C0",
|
||||
"CLK_FEED_SE4C1",
|
||||
"CLK_FEED_SE4C2",
|
||||
"CLK_FEED_SE4C3",
|
||||
"CLK_FEED_SW2A0",
|
||||
"CLK_FEED_SW2A1",
|
||||
"CLK_FEED_SW2A2",
|
||||
"CLK_FEED_SW2A3",
|
||||
"CLK_FEED_SW4A0",
|
||||
"CLK_FEED_SW4A1",
|
||||
"CLK_FEED_SW4A2",
|
||||
"CLK_FEED_SW4A3",
|
||||
"CLK_FEED_SW4END0",
|
||||
"CLK_FEED_SW4END1",
|
||||
"CLK_FEED_SW4END2",
|
||||
"CLK_FEED_SW4END3",
|
||||
"CLK_FEED_WL1END0",
|
||||
"CLK_FEED_WL1END1",
|
||||
"CLK_FEED_WL1END2",
|
||||
"CLK_FEED_WL1END3",
|
||||
"CLK_FEED_WR1END0",
|
||||
"CLK_FEED_WR1END1",
|
||||
"CLK_FEED_WR1END2",
|
||||
"CLK_FEED_WR1END3",
|
||||
"CLK_FEED_WW2A0",
|
||||
"CLK_FEED_WW2A1",
|
||||
"CLK_FEED_WW2A2",
|
||||
"CLK_FEED_WW2A3",
|
||||
"CLK_FEED_WW2END0",
|
||||
"CLK_FEED_WW2END1",
|
||||
"CLK_FEED_WW2END2",
|
||||
"CLK_FEED_WW2END3",
|
||||
"CLK_FEED_WW4A0",
|
||||
"CLK_FEED_WW4A1",
|
||||
"CLK_FEED_WW4A2",
|
||||
"CLK_FEED_WW4A3",
|
||||
"CLK_FEED_WW4B0",
|
||||
"CLK_FEED_WW4B1",
|
||||
"CLK_FEED_WW4B2",
|
||||
"CLK_FEED_WW4B3",
|
||||
"CLK_FEED_WW4C0",
|
||||
"CLK_FEED_WW4C1",
|
||||
"CLK_FEED_WW4C2",
|
||||
"CLK_FEED_WW4C3",
|
||||
"CLK_FEED_WW4END0",
|
||||
"CLK_FEED_WW4END1",
|
||||
"CLK_FEED_WW4END2",
|
||||
"CLK_FEED_WW4END3"
|
||||
]
|
||||
"wires": {
|
||||
"CLK_FEED_CK_BUFG_CASC0": null,
|
||||
"CLK_FEED_CK_BUFG_CASC1": null,
|
||||
"CLK_FEED_CK_BUFG_CASC10": null,
|
||||
"CLK_FEED_CK_BUFG_CASC11": null,
|
||||
"CLK_FEED_CK_BUFG_CASC12": null,
|
||||
"CLK_FEED_CK_BUFG_CASC13": null,
|
||||
"CLK_FEED_CK_BUFG_CASC14": null,
|
||||
"CLK_FEED_CK_BUFG_CASC15": null,
|
||||
"CLK_FEED_CK_BUFG_CASC16": null,
|
||||
"CLK_FEED_CK_BUFG_CASC17": null,
|
||||
"CLK_FEED_CK_BUFG_CASC18": null,
|
||||
"CLK_FEED_CK_BUFG_CASC19": null,
|
||||
"CLK_FEED_CK_BUFG_CASC2": null,
|
||||
"CLK_FEED_CK_BUFG_CASC20": null,
|
||||
"CLK_FEED_CK_BUFG_CASC21": null,
|
||||
"CLK_FEED_CK_BUFG_CASC22": null,
|
||||
"CLK_FEED_CK_BUFG_CASC23": null,
|
||||
"CLK_FEED_CK_BUFG_CASC24": null,
|
||||
"CLK_FEED_CK_BUFG_CASC25": null,
|
||||
"CLK_FEED_CK_BUFG_CASC26": null,
|
||||
"CLK_FEED_CK_BUFG_CASC27": null,
|
||||
"CLK_FEED_CK_BUFG_CASC28": null,
|
||||
"CLK_FEED_CK_BUFG_CASC29": null,
|
||||
"CLK_FEED_CK_BUFG_CASC3": null,
|
||||
"CLK_FEED_CK_BUFG_CASC30": null,
|
||||
"CLK_FEED_CK_BUFG_CASC31": null,
|
||||
"CLK_FEED_CK_BUFG_CASC4": null,
|
||||
"CLK_FEED_CK_BUFG_CASC5": null,
|
||||
"CLK_FEED_CK_BUFG_CASC6": null,
|
||||
"CLK_FEED_CK_BUFG_CASC7": null,
|
||||
"CLK_FEED_CK_BUFG_CASC8": null,
|
||||
"CLK_FEED_CK_BUFG_CASC9": null,
|
||||
"CLK_FEED_CK_GCLK0": null,
|
||||
"CLK_FEED_CK_GCLK1": null,
|
||||
"CLK_FEED_CK_GCLK10": null,
|
||||
"CLK_FEED_CK_GCLK11": null,
|
||||
"CLK_FEED_CK_GCLK12": null,
|
||||
"CLK_FEED_CK_GCLK13": null,
|
||||
"CLK_FEED_CK_GCLK14": null,
|
||||
"CLK_FEED_CK_GCLK15": null,
|
||||
"CLK_FEED_CK_GCLK16": null,
|
||||
"CLK_FEED_CK_GCLK17": null,
|
||||
"CLK_FEED_CK_GCLK18": null,
|
||||
"CLK_FEED_CK_GCLK19": null,
|
||||
"CLK_FEED_CK_GCLK2": null,
|
||||
"CLK_FEED_CK_GCLK20": null,
|
||||
"CLK_FEED_CK_GCLK21": null,
|
||||
"CLK_FEED_CK_GCLK22": null,
|
||||
"CLK_FEED_CK_GCLK23": null,
|
||||
"CLK_FEED_CK_GCLK24": null,
|
||||
"CLK_FEED_CK_GCLK25": null,
|
||||
"CLK_FEED_CK_GCLK26": null,
|
||||
"CLK_FEED_CK_GCLK27": null,
|
||||
"CLK_FEED_CK_GCLK28": null,
|
||||
"CLK_FEED_CK_GCLK29": null,
|
||||
"CLK_FEED_CK_GCLK3": null,
|
||||
"CLK_FEED_CK_GCLK30": null,
|
||||
"CLK_FEED_CK_GCLK31": null,
|
||||
"CLK_FEED_CK_GCLK4": null,
|
||||
"CLK_FEED_CK_GCLK5": null,
|
||||
"CLK_FEED_CK_GCLK6": null,
|
||||
"CLK_FEED_CK_GCLK7": null,
|
||||
"CLK_FEED_CK_GCLK8": null,
|
||||
"CLK_FEED_CK_GCLK9": null,
|
||||
"CLK_FEED_EE2A0": null,
|
||||
"CLK_FEED_EE2A1": null,
|
||||
"CLK_FEED_EE2A2": null,
|
||||
"CLK_FEED_EE2A3": null,
|
||||
"CLK_FEED_EE2BEG0": null,
|
||||
"CLK_FEED_EE2BEG1": null,
|
||||
"CLK_FEED_EE2BEG2": null,
|
||||
"CLK_FEED_EE2BEG3": null,
|
||||
"CLK_FEED_EE4A0": null,
|
||||
"CLK_FEED_EE4A1": null,
|
||||
"CLK_FEED_EE4A2": null,
|
||||
"CLK_FEED_EE4A3": null,
|
||||
"CLK_FEED_EE4B0": null,
|
||||
"CLK_FEED_EE4B1": null,
|
||||
"CLK_FEED_EE4B2": null,
|
||||
"CLK_FEED_EE4B3": null,
|
||||
"CLK_FEED_EE4BEG0": null,
|
||||
"CLK_FEED_EE4BEG1": null,
|
||||
"CLK_FEED_EE4BEG2": null,
|
||||
"CLK_FEED_EE4BEG3": null,
|
||||
"CLK_FEED_EE4C0": null,
|
||||
"CLK_FEED_EE4C1": null,
|
||||
"CLK_FEED_EE4C2": null,
|
||||
"CLK_FEED_EE4C3": null,
|
||||
"CLK_FEED_EL1BEG0": null,
|
||||
"CLK_FEED_EL1BEG1": null,
|
||||
"CLK_FEED_EL1BEG2": null,
|
||||
"CLK_FEED_EL1BEG3": null,
|
||||
"CLK_FEED_ER1BEG0": null,
|
||||
"CLK_FEED_ER1BEG1": null,
|
||||
"CLK_FEED_ER1BEG2": null,
|
||||
"CLK_FEED_ER1BEG3": null,
|
||||
"CLK_FEED_LH1": null,
|
||||
"CLK_FEED_LH10": null,
|
||||
"CLK_FEED_LH11": null,
|
||||
"CLK_FEED_LH12": null,
|
||||
"CLK_FEED_LH2": null,
|
||||
"CLK_FEED_LH3": null,
|
||||
"CLK_FEED_LH4": null,
|
||||
"CLK_FEED_LH5": null,
|
||||
"CLK_FEED_LH6": null,
|
||||
"CLK_FEED_LH7": null,
|
||||
"CLK_FEED_LH8": null,
|
||||
"CLK_FEED_LH9": null,
|
||||
"CLK_FEED_MONITOR_N": null,
|
||||
"CLK_FEED_MONITOR_P": null,
|
||||
"CLK_FEED_NE2A0": null,
|
||||
"CLK_FEED_NE2A1": null,
|
||||
"CLK_FEED_NE2A2": null,
|
||||
"CLK_FEED_NE2A3": null,
|
||||
"CLK_FEED_NE4BEG0": null,
|
||||
"CLK_FEED_NE4BEG1": null,
|
||||
"CLK_FEED_NE4BEG2": null,
|
||||
"CLK_FEED_NE4BEG3": null,
|
||||
"CLK_FEED_NE4C0": null,
|
||||
"CLK_FEED_NE4C1": null,
|
||||
"CLK_FEED_NE4C2": null,
|
||||
"CLK_FEED_NE4C3": null,
|
||||
"CLK_FEED_NW2A0": null,
|
||||
"CLK_FEED_NW2A1": null,
|
||||
"CLK_FEED_NW2A2": null,
|
||||
"CLK_FEED_NW2A3": null,
|
||||
"CLK_FEED_NW4A0": null,
|
||||
"CLK_FEED_NW4A1": null,
|
||||
"CLK_FEED_NW4A2": null,
|
||||
"CLK_FEED_NW4A3": null,
|
||||
"CLK_FEED_NW4END0": null,
|
||||
"CLK_FEED_NW4END1": null,
|
||||
"CLK_FEED_NW4END2": null,
|
||||
"CLK_FEED_NW4END3": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC0": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC1": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC10": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC11": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC12": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC13": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC14": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC15": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC16": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC17": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC18": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC19": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC2": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC20": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC21": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC22": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC23": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC24": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC25": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC26": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC27": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC28": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC29": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC3": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC30": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC31": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC4": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC5": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC6": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC7": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC8": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC9": null,
|
||||
"CLK_FEED_R_CK_GCLK0": null,
|
||||
"CLK_FEED_R_CK_GCLK1": null,
|
||||
"CLK_FEED_R_CK_GCLK10": null,
|
||||
"CLK_FEED_R_CK_GCLK11": null,
|
||||
"CLK_FEED_R_CK_GCLK12": null,
|
||||
"CLK_FEED_R_CK_GCLK13": null,
|
||||
"CLK_FEED_R_CK_GCLK14": null,
|
||||
"CLK_FEED_R_CK_GCLK15": null,
|
||||
"CLK_FEED_R_CK_GCLK16": null,
|
||||
"CLK_FEED_R_CK_GCLK17": null,
|
||||
"CLK_FEED_R_CK_GCLK18": null,
|
||||
"CLK_FEED_R_CK_GCLK19": null,
|
||||
"CLK_FEED_R_CK_GCLK2": null,
|
||||
"CLK_FEED_R_CK_GCLK20": null,
|
||||
"CLK_FEED_R_CK_GCLK21": null,
|
||||
"CLK_FEED_R_CK_GCLK22": null,
|
||||
"CLK_FEED_R_CK_GCLK23": null,
|
||||
"CLK_FEED_R_CK_GCLK24": null,
|
||||
"CLK_FEED_R_CK_GCLK25": null,
|
||||
"CLK_FEED_R_CK_GCLK26": null,
|
||||
"CLK_FEED_R_CK_GCLK27": null,
|
||||
"CLK_FEED_R_CK_GCLK28": null,
|
||||
"CLK_FEED_R_CK_GCLK29": null,
|
||||
"CLK_FEED_R_CK_GCLK3": null,
|
||||
"CLK_FEED_R_CK_GCLK30": null,
|
||||
"CLK_FEED_R_CK_GCLK31": null,
|
||||
"CLK_FEED_R_CK_GCLK4": null,
|
||||
"CLK_FEED_R_CK_GCLK5": null,
|
||||
"CLK_FEED_R_CK_GCLK6": null,
|
||||
"CLK_FEED_R_CK_GCLK7": null,
|
||||
"CLK_FEED_R_CK_GCLK8": null,
|
||||
"CLK_FEED_R_CK_GCLK9": null,
|
||||
"CLK_FEED_SE2A0": null,
|
||||
"CLK_FEED_SE2A1": null,
|
||||
"CLK_FEED_SE2A2": null,
|
||||
"CLK_FEED_SE2A3": null,
|
||||
"CLK_FEED_SE4BEG0": null,
|
||||
"CLK_FEED_SE4BEG1": null,
|
||||
"CLK_FEED_SE4BEG2": null,
|
||||
"CLK_FEED_SE4BEG3": null,
|
||||
"CLK_FEED_SE4C0": null,
|
||||
"CLK_FEED_SE4C1": null,
|
||||
"CLK_FEED_SE4C2": null,
|
||||
"CLK_FEED_SE4C3": null,
|
||||
"CLK_FEED_SW2A0": null,
|
||||
"CLK_FEED_SW2A1": null,
|
||||
"CLK_FEED_SW2A2": null,
|
||||
"CLK_FEED_SW2A3": null,
|
||||
"CLK_FEED_SW4A0": null,
|
||||
"CLK_FEED_SW4A1": null,
|
||||
"CLK_FEED_SW4A2": null,
|
||||
"CLK_FEED_SW4A3": null,
|
||||
"CLK_FEED_SW4END0": null,
|
||||
"CLK_FEED_SW4END1": null,
|
||||
"CLK_FEED_SW4END2": null,
|
||||
"CLK_FEED_SW4END3": null,
|
||||
"CLK_FEED_WL1END0": null,
|
||||
"CLK_FEED_WL1END1": null,
|
||||
"CLK_FEED_WL1END2": null,
|
||||
"CLK_FEED_WL1END3": null,
|
||||
"CLK_FEED_WR1END0": null,
|
||||
"CLK_FEED_WR1END1": null,
|
||||
"CLK_FEED_WR1END2": null,
|
||||
"CLK_FEED_WR1END3": null,
|
||||
"CLK_FEED_WW2A0": null,
|
||||
"CLK_FEED_WW2A1": null,
|
||||
"CLK_FEED_WW2A2": null,
|
||||
"CLK_FEED_WW2A3": null,
|
||||
"CLK_FEED_WW2END0": null,
|
||||
"CLK_FEED_WW2END1": null,
|
||||
"CLK_FEED_WW2END2": null,
|
||||
"CLK_FEED_WW2END3": null,
|
||||
"CLK_FEED_WW4A0": null,
|
||||
"CLK_FEED_WW4A1": null,
|
||||
"CLK_FEED_WW4A2": null,
|
||||
"CLK_FEED_WW4A3": null,
|
||||
"CLK_FEED_WW4B0": null,
|
||||
"CLK_FEED_WW4B1": null,
|
||||
"CLK_FEED_WW4B2": null,
|
||||
"CLK_FEED_WW4B3": null,
|
||||
"CLK_FEED_WW4C0": null,
|
||||
"CLK_FEED_WW4C1": null,
|
||||
"CLK_FEED_WW4C2": null,
|
||||
"CLK_FEED_WW4C3": null,
|
||||
"CLK_FEED_WW4END0": null,
|
||||
"CLK_FEED_WW4END1": null,
|
||||
"CLK_FEED_WW4END2": null,
|
||||
"CLK_FEED_WW4END3": null
|
||||
}
|
||||
}
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -2,364 +2,364 @@
|
|||
"pips": {},
|
||||
"sites": [],
|
||||
"tile_type": "CLK_MTBF2",
|
||||
"wires": [
|
||||
"CLK_FEED_CK_BUFG_CASC0",
|
||||
"CLK_FEED_CK_BUFG_CASC1",
|
||||
"CLK_FEED_CK_BUFG_CASC10",
|
||||
"CLK_FEED_CK_BUFG_CASC11",
|
||||
"CLK_FEED_CK_BUFG_CASC12",
|
||||
"CLK_FEED_CK_BUFG_CASC13",
|
||||
"CLK_FEED_CK_BUFG_CASC14",
|
||||
"CLK_FEED_CK_BUFG_CASC15",
|
||||
"CLK_FEED_CK_BUFG_CASC16",
|
||||
"CLK_FEED_CK_BUFG_CASC17",
|
||||
"CLK_FEED_CK_BUFG_CASC18",
|
||||
"CLK_FEED_CK_BUFG_CASC19",
|
||||
"CLK_FEED_CK_BUFG_CASC2",
|
||||
"CLK_FEED_CK_BUFG_CASC20",
|
||||
"CLK_FEED_CK_BUFG_CASC21",
|
||||
"CLK_FEED_CK_BUFG_CASC22",
|
||||
"CLK_FEED_CK_BUFG_CASC23",
|
||||
"CLK_FEED_CK_BUFG_CASC24",
|
||||
"CLK_FEED_CK_BUFG_CASC25",
|
||||
"CLK_FEED_CK_BUFG_CASC26",
|
||||
"CLK_FEED_CK_BUFG_CASC27",
|
||||
"CLK_FEED_CK_BUFG_CASC28",
|
||||
"CLK_FEED_CK_BUFG_CASC29",
|
||||
"CLK_FEED_CK_BUFG_CASC3",
|
||||
"CLK_FEED_CK_BUFG_CASC30",
|
||||
"CLK_FEED_CK_BUFG_CASC31",
|
||||
"CLK_FEED_CK_BUFG_CASC4",
|
||||
"CLK_FEED_CK_BUFG_CASC5",
|
||||
"CLK_FEED_CK_BUFG_CASC6",
|
||||
"CLK_FEED_CK_BUFG_CASC7",
|
||||
"CLK_FEED_CK_BUFG_CASC8",
|
||||
"CLK_FEED_CK_BUFG_CASC9",
|
||||
"CLK_FEED_CK_GCLK0",
|
||||
"CLK_FEED_CK_GCLK1",
|
||||
"CLK_FEED_CK_GCLK10",
|
||||
"CLK_FEED_CK_GCLK11",
|
||||
"CLK_FEED_CK_GCLK12",
|
||||
"CLK_FEED_CK_GCLK13",
|
||||
"CLK_FEED_CK_GCLK14",
|
||||
"CLK_FEED_CK_GCLK15",
|
||||
"CLK_FEED_CK_GCLK16",
|
||||
"CLK_FEED_CK_GCLK17",
|
||||
"CLK_FEED_CK_GCLK18",
|
||||
"CLK_FEED_CK_GCLK19",
|
||||
"CLK_FEED_CK_GCLK2",
|
||||
"CLK_FEED_CK_GCLK20",
|
||||
"CLK_FEED_CK_GCLK21",
|
||||
"CLK_FEED_CK_GCLK22",
|
||||
"CLK_FEED_CK_GCLK23",
|
||||
"CLK_FEED_CK_GCLK24",
|
||||
"CLK_FEED_CK_GCLK25",
|
||||
"CLK_FEED_CK_GCLK26",
|
||||
"CLK_FEED_CK_GCLK27",
|
||||
"CLK_FEED_CK_GCLK28",
|
||||
"CLK_FEED_CK_GCLK29",
|
||||
"CLK_FEED_CK_GCLK3",
|
||||
"CLK_FEED_CK_GCLK30",
|
||||
"CLK_FEED_CK_GCLK31",
|
||||
"CLK_FEED_CK_GCLK4",
|
||||
"CLK_FEED_CK_GCLK5",
|
||||
"CLK_FEED_CK_GCLK6",
|
||||
"CLK_FEED_CK_GCLK7",
|
||||
"CLK_FEED_CK_GCLK8",
|
||||
"CLK_FEED_CK_GCLK9",
|
||||
"CLK_FEED_EE2A0",
|
||||
"CLK_FEED_EE2A1",
|
||||
"CLK_FEED_EE2A2",
|
||||
"CLK_FEED_EE2A3",
|
||||
"CLK_FEED_EE2BEG0",
|
||||
"CLK_FEED_EE2BEG1",
|
||||
"CLK_FEED_EE2BEG2",
|
||||
"CLK_FEED_EE2BEG3",
|
||||
"CLK_FEED_EE4A0",
|
||||
"CLK_FEED_EE4A1",
|
||||
"CLK_FEED_EE4A2",
|
||||
"CLK_FEED_EE4A3",
|
||||
"CLK_FEED_EE4B0",
|
||||
"CLK_FEED_EE4B1",
|
||||
"CLK_FEED_EE4B2",
|
||||
"CLK_FEED_EE4B3",
|
||||
"CLK_FEED_EE4BEG0",
|
||||
"CLK_FEED_EE4BEG1",
|
||||
"CLK_FEED_EE4BEG2",
|
||||
"CLK_FEED_EE4BEG3",
|
||||
"CLK_FEED_EE4C0",
|
||||
"CLK_FEED_EE4C1",
|
||||
"CLK_FEED_EE4C2",
|
||||
"CLK_FEED_EE4C3",
|
||||
"CLK_FEED_EL1BEG0",
|
||||
"CLK_FEED_EL1BEG1",
|
||||
"CLK_FEED_EL1BEG2",
|
||||
"CLK_FEED_EL1BEG3",
|
||||
"CLK_FEED_ER1BEG0",
|
||||
"CLK_FEED_ER1BEG1",
|
||||
"CLK_FEED_ER1BEG2",
|
||||
"CLK_FEED_ER1BEG3",
|
||||
"CLK_FEED_LH1",
|
||||
"CLK_FEED_LH10",
|
||||
"CLK_FEED_LH11",
|
||||
"CLK_FEED_LH12",
|
||||
"CLK_FEED_LH2",
|
||||
"CLK_FEED_LH3",
|
||||
"CLK_FEED_LH4",
|
||||
"CLK_FEED_LH5",
|
||||
"CLK_FEED_LH6",
|
||||
"CLK_FEED_LH7",
|
||||
"CLK_FEED_LH8",
|
||||
"CLK_FEED_LH9",
|
||||
"CLK_FEED_MONITOR_N",
|
||||
"CLK_FEED_MONITOR_P",
|
||||
"CLK_FEED_NE2A0",
|
||||
"CLK_FEED_NE2A1",
|
||||
"CLK_FEED_NE2A2",
|
||||
"CLK_FEED_NE2A3",
|
||||
"CLK_FEED_NE4BEG0",
|
||||
"CLK_FEED_NE4BEG1",
|
||||
"CLK_FEED_NE4BEG2",
|
||||
"CLK_FEED_NE4BEG3",
|
||||
"CLK_FEED_NE4C0",
|
||||
"CLK_FEED_NE4C1",
|
||||
"CLK_FEED_NE4C2",
|
||||
"CLK_FEED_NE4C3",
|
||||
"CLK_FEED_NW2A0",
|
||||
"CLK_FEED_NW2A1",
|
||||
"CLK_FEED_NW2A2",
|
||||
"CLK_FEED_NW2A3",
|
||||
"CLK_FEED_NW4A0",
|
||||
"CLK_FEED_NW4A1",
|
||||
"CLK_FEED_NW4A2",
|
||||
"CLK_FEED_NW4A3",
|
||||
"CLK_FEED_NW4END0",
|
||||
"CLK_FEED_NW4END1",
|
||||
"CLK_FEED_NW4END2",
|
||||
"CLK_FEED_NW4END3",
|
||||
"CLK_FEED_R_CK_BUFG_CASC0",
|
||||
"CLK_FEED_R_CK_BUFG_CASC1",
|
||||
"CLK_FEED_R_CK_BUFG_CASC10",
|
||||
"CLK_FEED_R_CK_BUFG_CASC11",
|
||||
"CLK_FEED_R_CK_BUFG_CASC12",
|
||||
"CLK_FEED_R_CK_BUFG_CASC13",
|
||||
"CLK_FEED_R_CK_BUFG_CASC14",
|
||||
"CLK_FEED_R_CK_BUFG_CASC15",
|
||||
"CLK_FEED_R_CK_BUFG_CASC16",
|
||||
"CLK_FEED_R_CK_BUFG_CASC17",
|
||||
"CLK_FEED_R_CK_BUFG_CASC18",
|
||||
"CLK_FEED_R_CK_BUFG_CASC19",
|
||||
"CLK_FEED_R_CK_BUFG_CASC2",
|
||||
"CLK_FEED_R_CK_BUFG_CASC20",
|
||||
"CLK_FEED_R_CK_BUFG_CASC21",
|
||||
"CLK_FEED_R_CK_BUFG_CASC22",
|
||||
"CLK_FEED_R_CK_BUFG_CASC23",
|
||||
"CLK_FEED_R_CK_BUFG_CASC24",
|
||||
"CLK_FEED_R_CK_BUFG_CASC25",
|
||||
"CLK_FEED_R_CK_BUFG_CASC26",
|
||||
"CLK_FEED_R_CK_BUFG_CASC27",
|
||||
"CLK_FEED_R_CK_BUFG_CASC28",
|
||||
"CLK_FEED_R_CK_BUFG_CASC29",
|
||||
"CLK_FEED_R_CK_BUFG_CASC3",
|
||||
"CLK_FEED_R_CK_BUFG_CASC30",
|
||||
"CLK_FEED_R_CK_BUFG_CASC31",
|
||||
"CLK_FEED_R_CK_BUFG_CASC4",
|
||||
"CLK_FEED_R_CK_BUFG_CASC5",
|
||||
"CLK_FEED_R_CK_BUFG_CASC6",
|
||||
"CLK_FEED_R_CK_BUFG_CASC7",
|
||||
"CLK_FEED_R_CK_BUFG_CASC8",
|
||||
"CLK_FEED_R_CK_BUFG_CASC9",
|
||||
"CLK_FEED_R_CK_GCLK0",
|
||||
"CLK_FEED_R_CK_GCLK1",
|
||||
"CLK_FEED_R_CK_GCLK10",
|
||||
"CLK_FEED_R_CK_GCLK11",
|
||||
"CLK_FEED_R_CK_GCLK12",
|
||||
"CLK_FEED_R_CK_GCLK13",
|
||||
"CLK_FEED_R_CK_GCLK14",
|
||||
"CLK_FEED_R_CK_GCLK15",
|
||||
"CLK_FEED_R_CK_GCLK16",
|
||||
"CLK_FEED_R_CK_GCLK17",
|
||||
"CLK_FEED_R_CK_GCLK18",
|
||||
"CLK_FEED_R_CK_GCLK19",
|
||||
"CLK_FEED_R_CK_GCLK2",
|
||||
"CLK_FEED_R_CK_GCLK20",
|
||||
"CLK_FEED_R_CK_GCLK21",
|
||||
"CLK_FEED_R_CK_GCLK22",
|
||||
"CLK_FEED_R_CK_GCLK23",
|
||||
"CLK_FEED_R_CK_GCLK24",
|
||||
"CLK_FEED_R_CK_GCLK25",
|
||||
"CLK_FEED_R_CK_GCLK26",
|
||||
"CLK_FEED_R_CK_GCLK27",
|
||||
"CLK_FEED_R_CK_GCLK28",
|
||||
"CLK_FEED_R_CK_GCLK29",
|
||||
"CLK_FEED_R_CK_GCLK3",
|
||||
"CLK_FEED_R_CK_GCLK30",
|
||||
"CLK_FEED_R_CK_GCLK31",
|
||||
"CLK_FEED_R_CK_GCLK4",
|
||||
"CLK_FEED_R_CK_GCLK5",
|
||||
"CLK_FEED_R_CK_GCLK6",
|
||||
"CLK_FEED_R_CK_GCLK7",
|
||||
"CLK_FEED_R_CK_GCLK8",
|
||||
"CLK_FEED_R_CK_GCLK9",
|
||||
"CLK_FEED_SE2A0",
|
||||
"CLK_FEED_SE2A1",
|
||||
"CLK_FEED_SE2A2",
|
||||
"CLK_FEED_SE2A3",
|
||||
"CLK_FEED_SE4BEG0",
|
||||
"CLK_FEED_SE4BEG1",
|
||||
"CLK_FEED_SE4BEG2",
|
||||
"CLK_FEED_SE4BEG3",
|
||||
"CLK_FEED_SE4C0",
|
||||
"CLK_FEED_SE4C1",
|
||||
"CLK_FEED_SE4C2",
|
||||
"CLK_FEED_SE4C3",
|
||||
"CLK_FEED_SW2A0",
|
||||
"CLK_FEED_SW2A1",
|
||||
"CLK_FEED_SW2A2",
|
||||
"CLK_FEED_SW2A3",
|
||||
"CLK_FEED_SW4A0",
|
||||
"CLK_FEED_SW4A1",
|
||||
"CLK_FEED_SW4A2",
|
||||
"CLK_FEED_SW4A3",
|
||||
"CLK_FEED_SW4END0",
|
||||
"CLK_FEED_SW4END1",
|
||||
"CLK_FEED_SW4END2",
|
||||
"CLK_FEED_SW4END3",
|
||||
"CLK_FEED_WL1END0",
|
||||
"CLK_FEED_WL1END1",
|
||||
"CLK_FEED_WL1END2",
|
||||
"CLK_FEED_WL1END3",
|
||||
"CLK_FEED_WR1END0",
|
||||
"CLK_FEED_WR1END1",
|
||||
"CLK_FEED_WR1END2",
|
||||
"CLK_FEED_WR1END3",
|
||||
"CLK_FEED_WW2A0",
|
||||
"CLK_FEED_WW2A1",
|
||||
"CLK_FEED_WW2A2",
|
||||
"CLK_FEED_WW2A3",
|
||||
"CLK_FEED_WW2END0",
|
||||
"CLK_FEED_WW2END1",
|
||||
"CLK_FEED_WW2END2",
|
||||
"CLK_FEED_WW2END3",
|
||||
"CLK_FEED_WW4A0",
|
||||
"CLK_FEED_WW4A1",
|
||||
"CLK_FEED_WW4A2",
|
||||
"CLK_FEED_WW4A3",
|
||||
"CLK_FEED_WW4B0",
|
||||
"CLK_FEED_WW4B1",
|
||||
"CLK_FEED_WW4B2",
|
||||
"CLK_FEED_WW4B3",
|
||||
"CLK_FEED_WW4C0",
|
||||
"CLK_FEED_WW4C1",
|
||||
"CLK_FEED_WW4C2",
|
||||
"CLK_FEED_WW4C3",
|
||||
"CLK_FEED_WW4END0",
|
||||
"CLK_FEED_WW4END1",
|
||||
"CLK_FEED_WW4END2",
|
||||
"CLK_FEED_WW4END3",
|
||||
"CLK_MTBF2_CLK",
|
||||
"CLK_MTBF2_DIN",
|
||||
"CLK_MTBF2_EN",
|
||||
"CLK_MTBF2_Q0B",
|
||||
"CLK_MTBF2_Q1B",
|
||||
"CLK_MTBF2_Q2B",
|
||||
"CLK_MTBF2_Q3B",
|
||||
"CLK_MTBF2_Q4B",
|
||||
"CLK_MTBF2_Q5B",
|
||||
"CLK_MTBF2_Q6B",
|
||||
"CLK_MTBF2_Q7B",
|
||||
"CLK_MTBF2_RESET",
|
||||
"CLK_PMV_BYP0_0",
|
||||
"CLK_PMV_BYP1_0",
|
||||
"CLK_PMV_BYP2_0",
|
||||
"CLK_PMV_BYP3_0",
|
||||
"CLK_PMV_BYP4_0",
|
||||
"CLK_PMV_BYP5_0",
|
||||
"CLK_PMV_BYP6_0",
|
||||
"CLK_PMV_BYP7_0",
|
||||
"CLK_PMV_CLK0_0",
|
||||
"CLK_PMV_CLK1_0",
|
||||
"CLK_PMV_CTRL0_0",
|
||||
"CLK_PMV_CTRL1_0",
|
||||
"CLK_PMV_FAN0_0",
|
||||
"CLK_PMV_FAN1_0",
|
||||
"CLK_PMV_FAN2_0",
|
||||
"CLK_PMV_FAN3_0",
|
||||
"CLK_PMV_FAN4_0",
|
||||
"CLK_PMV_FAN5_0",
|
||||
"CLK_PMV_FAN6_0",
|
||||
"CLK_PMV_FAN7_0",
|
||||
"CLK_PMV_IMUX0_0",
|
||||
"CLK_PMV_IMUX10_0",
|
||||
"CLK_PMV_IMUX11_0",
|
||||
"CLK_PMV_IMUX12_0",
|
||||
"CLK_PMV_IMUX13_0",
|
||||
"CLK_PMV_IMUX14_0",
|
||||
"CLK_PMV_IMUX15_0",
|
||||
"CLK_PMV_IMUX16_0",
|
||||
"CLK_PMV_IMUX17_0",
|
||||
"CLK_PMV_IMUX18_0",
|
||||
"CLK_PMV_IMUX19_0",
|
||||
"CLK_PMV_IMUX1_0",
|
||||
"CLK_PMV_IMUX20_0",
|
||||
"CLK_PMV_IMUX21_0",
|
||||
"CLK_PMV_IMUX22_0",
|
||||
"CLK_PMV_IMUX23_0",
|
||||
"CLK_PMV_IMUX24_0",
|
||||
"CLK_PMV_IMUX25_0",
|
||||
"CLK_PMV_IMUX26_0",
|
||||
"CLK_PMV_IMUX27_0",
|
||||
"CLK_PMV_IMUX28_0",
|
||||
"CLK_PMV_IMUX29_0",
|
||||
"CLK_PMV_IMUX2_0",
|
||||
"CLK_PMV_IMUX30_0",
|
||||
"CLK_PMV_IMUX31_0",
|
||||
"CLK_PMV_IMUX32_0",
|
||||
"CLK_PMV_IMUX33_0",
|
||||
"CLK_PMV_IMUX34_0",
|
||||
"CLK_PMV_IMUX35_0",
|
||||
"CLK_PMV_IMUX36_0",
|
||||
"CLK_PMV_IMUX37_0",
|
||||
"CLK_PMV_IMUX38_0",
|
||||
"CLK_PMV_IMUX39_0",
|
||||
"CLK_PMV_IMUX3_0",
|
||||
"CLK_PMV_IMUX40_0",
|
||||
"CLK_PMV_IMUX41_0",
|
||||
"CLK_PMV_IMUX42_0",
|
||||
"CLK_PMV_IMUX43_0",
|
||||
"CLK_PMV_IMUX44_0",
|
||||
"CLK_PMV_IMUX45_0",
|
||||
"CLK_PMV_IMUX46_0",
|
||||
"CLK_PMV_IMUX47_0",
|
||||
"CLK_PMV_IMUX4_0",
|
||||
"CLK_PMV_IMUX5_0",
|
||||
"CLK_PMV_IMUX6_0",
|
||||
"CLK_PMV_IMUX7_0",
|
||||
"CLK_PMV_IMUX8_0",
|
||||
"CLK_PMV_IMUX9_0",
|
||||
"CLK_PMV_LOGIC_OUTS0_0",
|
||||
"CLK_PMV_LOGIC_OUTS10_0",
|
||||
"CLK_PMV_LOGIC_OUTS11_0",
|
||||
"CLK_PMV_LOGIC_OUTS12_0",
|
||||
"CLK_PMV_LOGIC_OUTS13_0",
|
||||
"CLK_PMV_LOGIC_OUTS14_0",
|
||||
"CLK_PMV_LOGIC_OUTS15_0",
|
||||
"CLK_PMV_LOGIC_OUTS16_0",
|
||||
"CLK_PMV_LOGIC_OUTS17_0",
|
||||
"CLK_PMV_LOGIC_OUTS18_0",
|
||||
"CLK_PMV_LOGIC_OUTS19_0",
|
||||
"CLK_PMV_LOGIC_OUTS1_0",
|
||||
"CLK_PMV_LOGIC_OUTS20_0",
|
||||
"CLK_PMV_LOGIC_OUTS21_0",
|
||||
"CLK_PMV_LOGIC_OUTS22_0",
|
||||
"CLK_PMV_LOGIC_OUTS23_0",
|
||||
"CLK_PMV_LOGIC_OUTS2_0",
|
||||
"CLK_PMV_LOGIC_OUTS3_0",
|
||||
"CLK_PMV_LOGIC_OUTS4_0",
|
||||
"CLK_PMV_LOGIC_OUTS5_0",
|
||||
"CLK_PMV_LOGIC_OUTS6_0",
|
||||
"CLK_PMV_LOGIC_OUTS7_0",
|
||||
"CLK_PMV_LOGIC_OUTS8_0",
|
||||
"CLK_PMV_LOGIC_OUTS9_0"
|
||||
]
|
||||
"wires": {
|
||||
"CLK_FEED_CK_BUFG_CASC0": null,
|
||||
"CLK_FEED_CK_BUFG_CASC1": null,
|
||||
"CLK_FEED_CK_BUFG_CASC10": null,
|
||||
"CLK_FEED_CK_BUFG_CASC11": null,
|
||||
"CLK_FEED_CK_BUFG_CASC12": null,
|
||||
"CLK_FEED_CK_BUFG_CASC13": null,
|
||||
"CLK_FEED_CK_BUFG_CASC14": null,
|
||||
"CLK_FEED_CK_BUFG_CASC15": null,
|
||||
"CLK_FEED_CK_BUFG_CASC16": null,
|
||||
"CLK_FEED_CK_BUFG_CASC17": null,
|
||||
"CLK_FEED_CK_BUFG_CASC18": null,
|
||||
"CLK_FEED_CK_BUFG_CASC19": null,
|
||||
"CLK_FEED_CK_BUFG_CASC2": null,
|
||||
"CLK_FEED_CK_BUFG_CASC20": null,
|
||||
"CLK_FEED_CK_BUFG_CASC21": null,
|
||||
"CLK_FEED_CK_BUFG_CASC22": null,
|
||||
"CLK_FEED_CK_BUFG_CASC23": null,
|
||||
"CLK_FEED_CK_BUFG_CASC24": null,
|
||||
"CLK_FEED_CK_BUFG_CASC25": null,
|
||||
"CLK_FEED_CK_BUFG_CASC26": null,
|
||||
"CLK_FEED_CK_BUFG_CASC27": null,
|
||||
"CLK_FEED_CK_BUFG_CASC28": null,
|
||||
"CLK_FEED_CK_BUFG_CASC29": null,
|
||||
"CLK_FEED_CK_BUFG_CASC3": null,
|
||||
"CLK_FEED_CK_BUFG_CASC30": null,
|
||||
"CLK_FEED_CK_BUFG_CASC31": null,
|
||||
"CLK_FEED_CK_BUFG_CASC4": null,
|
||||
"CLK_FEED_CK_BUFG_CASC5": null,
|
||||
"CLK_FEED_CK_BUFG_CASC6": null,
|
||||
"CLK_FEED_CK_BUFG_CASC7": null,
|
||||
"CLK_FEED_CK_BUFG_CASC8": null,
|
||||
"CLK_FEED_CK_BUFG_CASC9": null,
|
||||
"CLK_FEED_CK_GCLK0": null,
|
||||
"CLK_FEED_CK_GCLK1": null,
|
||||
"CLK_FEED_CK_GCLK10": null,
|
||||
"CLK_FEED_CK_GCLK11": null,
|
||||
"CLK_FEED_CK_GCLK12": null,
|
||||
"CLK_FEED_CK_GCLK13": null,
|
||||
"CLK_FEED_CK_GCLK14": null,
|
||||
"CLK_FEED_CK_GCLK15": null,
|
||||
"CLK_FEED_CK_GCLK16": null,
|
||||
"CLK_FEED_CK_GCLK17": null,
|
||||
"CLK_FEED_CK_GCLK18": null,
|
||||
"CLK_FEED_CK_GCLK19": null,
|
||||
"CLK_FEED_CK_GCLK2": null,
|
||||
"CLK_FEED_CK_GCLK20": null,
|
||||
"CLK_FEED_CK_GCLK21": null,
|
||||
"CLK_FEED_CK_GCLK22": null,
|
||||
"CLK_FEED_CK_GCLK23": null,
|
||||
"CLK_FEED_CK_GCLK24": null,
|
||||
"CLK_FEED_CK_GCLK25": null,
|
||||
"CLK_FEED_CK_GCLK26": null,
|
||||
"CLK_FEED_CK_GCLK27": null,
|
||||
"CLK_FEED_CK_GCLK28": null,
|
||||
"CLK_FEED_CK_GCLK29": null,
|
||||
"CLK_FEED_CK_GCLK3": null,
|
||||
"CLK_FEED_CK_GCLK30": null,
|
||||
"CLK_FEED_CK_GCLK31": null,
|
||||
"CLK_FEED_CK_GCLK4": null,
|
||||
"CLK_FEED_CK_GCLK5": null,
|
||||
"CLK_FEED_CK_GCLK6": null,
|
||||
"CLK_FEED_CK_GCLK7": null,
|
||||
"CLK_FEED_CK_GCLK8": null,
|
||||
"CLK_FEED_CK_GCLK9": null,
|
||||
"CLK_FEED_EE2A0": null,
|
||||
"CLK_FEED_EE2A1": null,
|
||||
"CLK_FEED_EE2A2": null,
|
||||
"CLK_FEED_EE2A3": null,
|
||||
"CLK_FEED_EE2BEG0": null,
|
||||
"CLK_FEED_EE2BEG1": null,
|
||||
"CLK_FEED_EE2BEG2": null,
|
||||
"CLK_FEED_EE2BEG3": null,
|
||||
"CLK_FEED_EE4A0": null,
|
||||
"CLK_FEED_EE4A1": null,
|
||||
"CLK_FEED_EE4A2": null,
|
||||
"CLK_FEED_EE4A3": null,
|
||||
"CLK_FEED_EE4B0": null,
|
||||
"CLK_FEED_EE4B1": null,
|
||||
"CLK_FEED_EE4B2": null,
|
||||
"CLK_FEED_EE4B3": null,
|
||||
"CLK_FEED_EE4BEG0": null,
|
||||
"CLK_FEED_EE4BEG1": null,
|
||||
"CLK_FEED_EE4BEG2": null,
|
||||
"CLK_FEED_EE4BEG3": null,
|
||||
"CLK_FEED_EE4C0": null,
|
||||
"CLK_FEED_EE4C1": null,
|
||||
"CLK_FEED_EE4C2": null,
|
||||
"CLK_FEED_EE4C3": null,
|
||||
"CLK_FEED_EL1BEG0": null,
|
||||
"CLK_FEED_EL1BEG1": null,
|
||||
"CLK_FEED_EL1BEG2": null,
|
||||
"CLK_FEED_EL1BEG3": null,
|
||||
"CLK_FEED_ER1BEG0": null,
|
||||
"CLK_FEED_ER1BEG1": null,
|
||||
"CLK_FEED_ER1BEG2": null,
|
||||
"CLK_FEED_ER1BEG3": null,
|
||||
"CLK_FEED_LH1": null,
|
||||
"CLK_FEED_LH10": null,
|
||||
"CLK_FEED_LH11": null,
|
||||
"CLK_FEED_LH12": null,
|
||||
"CLK_FEED_LH2": null,
|
||||
"CLK_FEED_LH3": null,
|
||||
"CLK_FEED_LH4": null,
|
||||
"CLK_FEED_LH5": null,
|
||||
"CLK_FEED_LH6": null,
|
||||
"CLK_FEED_LH7": null,
|
||||
"CLK_FEED_LH8": null,
|
||||
"CLK_FEED_LH9": null,
|
||||
"CLK_FEED_MONITOR_N": null,
|
||||
"CLK_FEED_MONITOR_P": null,
|
||||
"CLK_FEED_NE2A0": null,
|
||||
"CLK_FEED_NE2A1": null,
|
||||
"CLK_FEED_NE2A2": null,
|
||||
"CLK_FEED_NE2A3": null,
|
||||
"CLK_FEED_NE4BEG0": null,
|
||||
"CLK_FEED_NE4BEG1": null,
|
||||
"CLK_FEED_NE4BEG2": null,
|
||||
"CLK_FEED_NE4BEG3": null,
|
||||
"CLK_FEED_NE4C0": null,
|
||||
"CLK_FEED_NE4C1": null,
|
||||
"CLK_FEED_NE4C2": null,
|
||||
"CLK_FEED_NE4C3": null,
|
||||
"CLK_FEED_NW2A0": null,
|
||||
"CLK_FEED_NW2A1": null,
|
||||
"CLK_FEED_NW2A2": null,
|
||||
"CLK_FEED_NW2A3": null,
|
||||
"CLK_FEED_NW4A0": null,
|
||||
"CLK_FEED_NW4A1": null,
|
||||
"CLK_FEED_NW4A2": null,
|
||||
"CLK_FEED_NW4A3": null,
|
||||
"CLK_FEED_NW4END0": null,
|
||||
"CLK_FEED_NW4END1": null,
|
||||
"CLK_FEED_NW4END2": null,
|
||||
"CLK_FEED_NW4END3": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC0": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC1": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC10": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC11": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC12": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC13": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC14": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC15": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC16": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC17": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC18": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC19": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC2": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC20": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC21": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC22": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC23": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC24": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC25": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC26": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC27": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC28": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC29": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC3": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC30": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC31": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC4": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC5": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC6": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC7": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC8": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC9": null,
|
||||
"CLK_FEED_R_CK_GCLK0": null,
|
||||
"CLK_FEED_R_CK_GCLK1": null,
|
||||
"CLK_FEED_R_CK_GCLK10": null,
|
||||
"CLK_FEED_R_CK_GCLK11": null,
|
||||
"CLK_FEED_R_CK_GCLK12": null,
|
||||
"CLK_FEED_R_CK_GCLK13": null,
|
||||
"CLK_FEED_R_CK_GCLK14": null,
|
||||
"CLK_FEED_R_CK_GCLK15": null,
|
||||
"CLK_FEED_R_CK_GCLK16": null,
|
||||
"CLK_FEED_R_CK_GCLK17": null,
|
||||
"CLK_FEED_R_CK_GCLK18": null,
|
||||
"CLK_FEED_R_CK_GCLK19": null,
|
||||
"CLK_FEED_R_CK_GCLK2": null,
|
||||
"CLK_FEED_R_CK_GCLK20": null,
|
||||
"CLK_FEED_R_CK_GCLK21": null,
|
||||
"CLK_FEED_R_CK_GCLK22": null,
|
||||
"CLK_FEED_R_CK_GCLK23": null,
|
||||
"CLK_FEED_R_CK_GCLK24": null,
|
||||
"CLK_FEED_R_CK_GCLK25": null,
|
||||
"CLK_FEED_R_CK_GCLK26": null,
|
||||
"CLK_FEED_R_CK_GCLK27": null,
|
||||
"CLK_FEED_R_CK_GCLK28": null,
|
||||
"CLK_FEED_R_CK_GCLK29": null,
|
||||
"CLK_FEED_R_CK_GCLK3": null,
|
||||
"CLK_FEED_R_CK_GCLK30": null,
|
||||
"CLK_FEED_R_CK_GCLK31": null,
|
||||
"CLK_FEED_R_CK_GCLK4": null,
|
||||
"CLK_FEED_R_CK_GCLK5": null,
|
||||
"CLK_FEED_R_CK_GCLK6": null,
|
||||
"CLK_FEED_R_CK_GCLK7": null,
|
||||
"CLK_FEED_R_CK_GCLK8": null,
|
||||
"CLK_FEED_R_CK_GCLK9": null,
|
||||
"CLK_FEED_SE2A0": null,
|
||||
"CLK_FEED_SE2A1": null,
|
||||
"CLK_FEED_SE2A2": null,
|
||||
"CLK_FEED_SE2A3": null,
|
||||
"CLK_FEED_SE4BEG0": null,
|
||||
"CLK_FEED_SE4BEG1": null,
|
||||
"CLK_FEED_SE4BEG2": null,
|
||||
"CLK_FEED_SE4BEG3": null,
|
||||
"CLK_FEED_SE4C0": null,
|
||||
"CLK_FEED_SE4C1": null,
|
||||
"CLK_FEED_SE4C2": null,
|
||||
"CLK_FEED_SE4C3": null,
|
||||
"CLK_FEED_SW2A0": null,
|
||||
"CLK_FEED_SW2A1": null,
|
||||
"CLK_FEED_SW2A2": null,
|
||||
"CLK_FEED_SW2A3": null,
|
||||
"CLK_FEED_SW4A0": null,
|
||||
"CLK_FEED_SW4A1": null,
|
||||
"CLK_FEED_SW4A2": null,
|
||||
"CLK_FEED_SW4A3": null,
|
||||
"CLK_FEED_SW4END0": null,
|
||||
"CLK_FEED_SW4END1": null,
|
||||
"CLK_FEED_SW4END2": null,
|
||||
"CLK_FEED_SW4END3": null,
|
||||
"CLK_FEED_WL1END0": null,
|
||||
"CLK_FEED_WL1END1": null,
|
||||
"CLK_FEED_WL1END2": null,
|
||||
"CLK_FEED_WL1END3": null,
|
||||
"CLK_FEED_WR1END0": null,
|
||||
"CLK_FEED_WR1END1": null,
|
||||
"CLK_FEED_WR1END2": null,
|
||||
"CLK_FEED_WR1END3": null,
|
||||
"CLK_FEED_WW2A0": null,
|
||||
"CLK_FEED_WW2A1": null,
|
||||
"CLK_FEED_WW2A2": null,
|
||||
"CLK_FEED_WW2A3": null,
|
||||
"CLK_FEED_WW2END0": null,
|
||||
"CLK_FEED_WW2END1": null,
|
||||
"CLK_FEED_WW2END2": null,
|
||||
"CLK_FEED_WW2END3": null,
|
||||
"CLK_FEED_WW4A0": null,
|
||||
"CLK_FEED_WW4A1": null,
|
||||
"CLK_FEED_WW4A2": null,
|
||||
"CLK_FEED_WW4A3": null,
|
||||
"CLK_FEED_WW4B0": null,
|
||||
"CLK_FEED_WW4B1": null,
|
||||
"CLK_FEED_WW4B2": null,
|
||||
"CLK_FEED_WW4B3": null,
|
||||
"CLK_FEED_WW4C0": null,
|
||||
"CLK_FEED_WW4C1": null,
|
||||
"CLK_FEED_WW4C2": null,
|
||||
"CLK_FEED_WW4C3": null,
|
||||
"CLK_FEED_WW4END0": null,
|
||||
"CLK_FEED_WW4END1": null,
|
||||
"CLK_FEED_WW4END2": null,
|
||||
"CLK_FEED_WW4END3": null,
|
||||
"CLK_MTBF2_CLK": null,
|
||||
"CLK_MTBF2_DIN": null,
|
||||
"CLK_MTBF2_EN": null,
|
||||
"CLK_MTBF2_Q0B": null,
|
||||
"CLK_MTBF2_Q1B": null,
|
||||
"CLK_MTBF2_Q2B": null,
|
||||
"CLK_MTBF2_Q3B": null,
|
||||
"CLK_MTBF2_Q4B": null,
|
||||
"CLK_MTBF2_Q5B": null,
|
||||
"CLK_MTBF2_Q6B": null,
|
||||
"CLK_MTBF2_Q7B": null,
|
||||
"CLK_MTBF2_RESET": null,
|
||||
"CLK_PMV_BYP0_0": null,
|
||||
"CLK_PMV_BYP1_0": null,
|
||||
"CLK_PMV_BYP2_0": null,
|
||||
"CLK_PMV_BYP3_0": null,
|
||||
"CLK_PMV_BYP4_0": null,
|
||||
"CLK_PMV_BYP5_0": null,
|
||||
"CLK_PMV_BYP6_0": null,
|
||||
"CLK_PMV_BYP7_0": null,
|
||||
"CLK_PMV_CLK0_0": null,
|
||||
"CLK_PMV_CLK1_0": null,
|
||||
"CLK_PMV_CTRL0_0": null,
|
||||
"CLK_PMV_CTRL1_0": null,
|
||||
"CLK_PMV_FAN0_0": null,
|
||||
"CLK_PMV_FAN1_0": null,
|
||||
"CLK_PMV_FAN2_0": null,
|
||||
"CLK_PMV_FAN3_0": null,
|
||||
"CLK_PMV_FAN4_0": null,
|
||||
"CLK_PMV_FAN5_0": null,
|
||||
"CLK_PMV_FAN6_0": null,
|
||||
"CLK_PMV_FAN7_0": null,
|
||||
"CLK_PMV_IMUX0_0": null,
|
||||
"CLK_PMV_IMUX10_0": null,
|
||||
"CLK_PMV_IMUX11_0": null,
|
||||
"CLK_PMV_IMUX12_0": null,
|
||||
"CLK_PMV_IMUX13_0": null,
|
||||
"CLK_PMV_IMUX14_0": null,
|
||||
"CLK_PMV_IMUX15_0": null,
|
||||
"CLK_PMV_IMUX16_0": null,
|
||||
"CLK_PMV_IMUX17_0": null,
|
||||
"CLK_PMV_IMUX18_0": null,
|
||||
"CLK_PMV_IMUX19_0": null,
|
||||
"CLK_PMV_IMUX1_0": null,
|
||||
"CLK_PMV_IMUX20_0": null,
|
||||
"CLK_PMV_IMUX21_0": null,
|
||||
"CLK_PMV_IMUX22_0": null,
|
||||
"CLK_PMV_IMUX23_0": null,
|
||||
"CLK_PMV_IMUX24_0": null,
|
||||
"CLK_PMV_IMUX25_0": null,
|
||||
"CLK_PMV_IMUX26_0": null,
|
||||
"CLK_PMV_IMUX27_0": null,
|
||||
"CLK_PMV_IMUX28_0": null,
|
||||
"CLK_PMV_IMUX29_0": null,
|
||||
"CLK_PMV_IMUX2_0": null,
|
||||
"CLK_PMV_IMUX30_0": null,
|
||||
"CLK_PMV_IMUX31_0": null,
|
||||
"CLK_PMV_IMUX32_0": null,
|
||||
"CLK_PMV_IMUX33_0": null,
|
||||
"CLK_PMV_IMUX34_0": null,
|
||||
"CLK_PMV_IMUX35_0": null,
|
||||
"CLK_PMV_IMUX36_0": null,
|
||||
"CLK_PMV_IMUX37_0": null,
|
||||
"CLK_PMV_IMUX38_0": null,
|
||||
"CLK_PMV_IMUX39_0": null,
|
||||
"CLK_PMV_IMUX3_0": null,
|
||||
"CLK_PMV_IMUX40_0": null,
|
||||
"CLK_PMV_IMUX41_0": null,
|
||||
"CLK_PMV_IMUX42_0": null,
|
||||
"CLK_PMV_IMUX43_0": null,
|
||||
"CLK_PMV_IMUX44_0": null,
|
||||
"CLK_PMV_IMUX45_0": null,
|
||||
"CLK_PMV_IMUX46_0": null,
|
||||
"CLK_PMV_IMUX47_0": null,
|
||||
"CLK_PMV_IMUX4_0": null,
|
||||
"CLK_PMV_IMUX5_0": null,
|
||||
"CLK_PMV_IMUX6_0": null,
|
||||
"CLK_PMV_IMUX7_0": null,
|
||||
"CLK_PMV_IMUX8_0": null,
|
||||
"CLK_PMV_IMUX9_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS0_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS10_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS11_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS12_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS13_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS14_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS15_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS16_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS17_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS18_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS19_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS1_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS20_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS21_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS22_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS23_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS2_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS3_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS4_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS5_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS6_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS7_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS8_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS9_0": null
|
||||
}
|
||||
}
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -5,13 +5,76 @@
|
|||
"name": "X0Y0",
|
||||
"prefix": "PMV",
|
||||
"site_pins": {
|
||||
"A0": "CLK_PMV2_A0",
|
||||
"A1": "CLK_PMV2_A1",
|
||||
"A2": "CLK_PMV2_A2",
|
||||
"EN": "CLK_PMV2_EN",
|
||||
"O": "CLK_PMV2_O",
|
||||
"ODIV2": "CLK_PMV2_ODIV2",
|
||||
"ODIV4": "CLK_PMV2_ODIV4"
|
||||
"A0": {
|
||||
"cap": "0.000",
|
||||
"delay": [
|
||||
"0.000",
|
||||
"0.000",
|
||||
"0.000",
|
||||
"0.000"
|
||||
],
|
||||
"wire": "CLK_PMV2_A0"
|
||||
},
|
||||
"A1": {
|
||||
"cap": "0.000",
|
||||
"delay": [
|
||||
"0.000",
|
||||
"0.000",
|
||||
"0.000",
|
||||
"0.000"
|
||||
],
|
||||
"wire": "CLK_PMV2_A1"
|
||||
},
|
||||
"A2": {
|
||||
"cap": "0.000",
|
||||
"delay": [
|
||||
"0.000",
|
||||
"0.000",
|
||||
"0.000",
|
||||
"0.000"
|
||||
],
|
||||
"wire": "CLK_PMV2_A2"
|
||||
},
|
||||
"EN": {
|
||||
"cap": "0.000",
|
||||
"delay": [
|
||||
"0.000",
|
||||
"0.000",
|
||||
"0.000",
|
||||
"0.000"
|
||||
],
|
||||
"wire": "CLK_PMV2_EN"
|
||||
},
|
||||
"O": {
|
||||
"delay": [
|
||||
"0.000",
|
||||
"0.000",
|
||||
"0.000",
|
||||
"0.000"
|
||||
],
|
||||
"res": "0.0",
|
||||
"wire": "CLK_PMV2_O"
|
||||
},
|
||||
"ODIV2": {
|
||||
"delay": [
|
||||
"0.000",
|
||||
"0.000",
|
||||
"0.000",
|
||||
"0.000"
|
||||
],
|
||||
"res": "0.0",
|
||||
"wire": "CLK_PMV2_ODIV2"
|
||||
},
|
||||
"ODIV4": {
|
||||
"delay": [
|
||||
"0.000",
|
||||
"0.000",
|
||||
"0.000",
|
||||
"0.000"
|
||||
],
|
||||
"res": "0.0",
|
||||
"wire": "CLK_PMV2_ODIV4"
|
||||
}
|
||||
},
|
||||
"type": "PMV2",
|
||||
"x_coord": 0,
|
||||
|
|
@ -19,359 +82,359 @@
|
|||
}
|
||||
],
|
||||
"tile_type": "CLK_PMV2",
|
||||
"wires": [
|
||||
"CLK_FEED_CK_BUFG_CASC0",
|
||||
"CLK_FEED_CK_BUFG_CASC1",
|
||||
"CLK_FEED_CK_BUFG_CASC10",
|
||||
"CLK_FEED_CK_BUFG_CASC11",
|
||||
"CLK_FEED_CK_BUFG_CASC12",
|
||||
"CLK_FEED_CK_BUFG_CASC13",
|
||||
"CLK_FEED_CK_BUFG_CASC14",
|
||||
"CLK_FEED_CK_BUFG_CASC15",
|
||||
"CLK_FEED_CK_BUFG_CASC16",
|
||||
"CLK_FEED_CK_BUFG_CASC17",
|
||||
"CLK_FEED_CK_BUFG_CASC18",
|
||||
"CLK_FEED_CK_BUFG_CASC19",
|
||||
"CLK_FEED_CK_BUFG_CASC2",
|
||||
"CLK_FEED_CK_BUFG_CASC20",
|
||||
"CLK_FEED_CK_BUFG_CASC21",
|
||||
"CLK_FEED_CK_BUFG_CASC22",
|
||||
"CLK_FEED_CK_BUFG_CASC23",
|
||||
"CLK_FEED_CK_BUFG_CASC24",
|
||||
"CLK_FEED_CK_BUFG_CASC25",
|
||||
"CLK_FEED_CK_BUFG_CASC26",
|
||||
"CLK_FEED_CK_BUFG_CASC27",
|
||||
"CLK_FEED_CK_BUFG_CASC28",
|
||||
"CLK_FEED_CK_BUFG_CASC29",
|
||||
"CLK_FEED_CK_BUFG_CASC3",
|
||||
"CLK_FEED_CK_BUFG_CASC30",
|
||||
"CLK_FEED_CK_BUFG_CASC31",
|
||||
"CLK_FEED_CK_BUFG_CASC4",
|
||||
"CLK_FEED_CK_BUFG_CASC5",
|
||||
"CLK_FEED_CK_BUFG_CASC6",
|
||||
"CLK_FEED_CK_BUFG_CASC7",
|
||||
"CLK_FEED_CK_BUFG_CASC8",
|
||||
"CLK_FEED_CK_BUFG_CASC9",
|
||||
"CLK_FEED_CK_GCLK0",
|
||||
"CLK_FEED_CK_GCLK1",
|
||||
"CLK_FEED_CK_GCLK10",
|
||||
"CLK_FEED_CK_GCLK11",
|
||||
"CLK_FEED_CK_GCLK12",
|
||||
"CLK_FEED_CK_GCLK13",
|
||||
"CLK_FEED_CK_GCLK14",
|
||||
"CLK_FEED_CK_GCLK15",
|
||||
"CLK_FEED_CK_GCLK16",
|
||||
"CLK_FEED_CK_GCLK17",
|
||||
"CLK_FEED_CK_GCLK18",
|
||||
"CLK_FEED_CK_GCLK19",
|
||||
"CLK_FEED_CK_GCLK2",
|
||||
"CLK_FEED_CK_GCLK20",
|
||||
"CLK_FEED_CK_GCLK21",
|
||||
"CLK_FEED_CK_GCLK22",
|
||||
"CLK_FEED_CK_GCLK23",
|
||||
"CLK_FEED_CK_GCLK24",
|
||||
"CLK_FEED_CK_GCLK25",
|
||||
"CLK_FEED_CK_GCLK26",
|
||||
"CLK_FEED_CK_GCLK27",
|
||||
"CLK_FEED_CK_GCLK28",
|
||||
"CLK_FEED_CK_GCLK29",
|
||||
"CLK_FEED_CK_GCLK3",
|
||||
"CLK_FEED_CK_GCLK30",
|
||||
"CLK_FEED_CK_GCLK31",
|
||||
"CLK_FEED_CK_GCLK4",
|
||||
"CLK_FEED_CK_GCLK5",
|
||||
"CLK_FEED_CK_GCLK6",
|
||||
"CLK_FEED_CK_GCLK7",
|
||||
"CLK_FEED_CK_GCLK8",
|
||||
"CLK_FEED_CK_GCLK9",
|
||||
"CLK_FEED_EE2A0",
|
||||
"CLK_FEED_EE2A1",
|
||||
"CLK_FEED_EE2A2",
|
||||
"CLK_FEED_EE2A3",
|
||||
"CLK_FEED_EE2BEG0",
|
||||
"CLK_FEED_EE2BEG1",
|
||||
"CLK_FEED_EE2BEG2",
|
||||
"CLK_FEED_EE2BEG3",
|
||||
"CLK_FEED_EE4A0",
|
||||
"CLK_FEED_EE4A1",
|
||||
"CLK_FEED_EE4A2",
|
||||
"CLK_FEED_EE4A3",
|
||||
"CLK_FEED_EE4B0",
|
||||
"CLK_FEED_EE4B1",
|
||||
"CLK_FEED_EE4B2",
|
||||
"CLK_FEED_EE4B3",
|
||||
"CLK_FEED_EE4BEG0",
|
||||
"CLK_FEED_EE4BEG1",
|
||||
"CLK_FEED_EE4BEG2",
|
||||
"CLK_FEED_EE4BEG3",
|
||||
"CLK_FEED_EE4C0",
|
||||
"CLK_FEED_EE4C1",
|
||||
"CLK_FEED_EE4C2",
|
||||
"CLK_FEED_EE4C3",
|
||||
"CLK_FEED_EL1BEG0",
|
||||
"CLK_FEED_EL1BEG1",
|
||||
"CLK_FEED_EL1BEG2",
|
||||
"CLK_FEED_EL1BEG3",
|
||||
"CLK_FEED_ER1BEG0",
|
||||
"CLK_FEED_ER1BEG1",
|
||||
"CLK_FEED_ER1BEG2",
|
||||
"CLK_FEED_ER1BEG3",
|
||||
"CLK_FEED_LH1",
|
||||
"CLK_FEED_LH10",
|
||||
"CLK_FEED_LH11",
|
||||
"CLK_FEED_LH12",
|
||||
"CLK_FEED_LH2",
|
||||
"CLK_FEED_LH3",
|
||||
"CLK_FEED_LH4",
|
||||
"CLK_FEED_LH5",
|
||||
"CLK_FEED_LH6",
|
||||
"CLK_FEED_LH7",
|
||||
"CLK_FEED_LH8",
|
||||
"CLK_FEED_LH9",
|
||||
"CLK_FEED_MONITOR_N",
|
||||
"CLK_FEED_MONITOR_P",
|
||||
"CLK_FEED_NE2A0",
|
||||
"CLK_FEED_NE2A1",
|
||||
"CLK_FEED_NE2A2",
|
||||
"CLK_FEED_NE2A3",
|
||||
"CLK_FEED_NE4BEG0",
|
||||
"CLK_FEED_NE4BEG1",
|
||||
"CLK_FEED_NE4BEG2",
|
||||
"CLK_FEED_NE4BEG3",
|
||||
"CLK_FEED_NE4C0",
|
||||
"CLK_FEED_NE4C1",
|
||||
"CLK_FEED_NE4C2",
|
||||
"CLK_FEED_NE4C3",
|
||||
"CLK_FEED_NW2A0",
|
||||
"CLK_FEED_NW2A1",
|
||||
"CLK_FEED_NW2A2",
|
||||
"CLK_FEED_NW2A3",
|
||||
"CLK_FEED_NW4A0",
|
||||
"CLK_FEED_NW4A1",
|
||||
"CLK_FEED_NW4A2",
|
||||
"CLK_FEED_NW4A3",
|
||||
"CLK_FEED_NW4END0",
|
||||
"CLK_FEED_NW4END1",
|
||||
"CLK_FEED_NW4END2",
|
||||
"CLK_FEED_NW4END3",
|
||||
"CLK_FEED_R_CK_BUFG_CASC0",
|
||||
"CLK_FEED_R_CK_BUFG_CASC1",
|
||||
"CLK_FEED_R_CK_BUFG_CASC10",
|
||||
"CLK_FEED_R_CK_BUFG_CASC11",
|
||||
"CLK_FEED_R_CK_BUFG_CASC12",
|
||||
"CLK_FEED_R_CK_BUFG_CASC13",
|
||||
"CLK_FEED_R_CK_BUFG_CASC14",
|
||||
"CLK_FEED_R_CK_BUFG_CASC15",
|
||||
"CLK_FEED_R_CK_BUFG_CASC16",
|
||||
"CLK_FEED_R_CK_BUFG_CASC17",
|
||||
"CLK_FEED_R_CK_BUFG_CASC18",
|
||||
"CLK_FEED_R_CK_BUFG_CASC19",
|
||||
"CLK_FEED_R_CK_BUFG_CASC2",
|
||||
"CLK_FEED_R_CK_BUFG_CASC20",
|
||||
"CLK_FEED_R_CK_BUFG_CASC21",
|
||||
"CLK_FEED_R_CK_BUFG_CASC22",
|
||||
"CLK_FEED_R_CK_BUFG_CASC23",
|
||||
"CLK_FEED_R_CK_BUFG_CASC24",
|
||||
"CLK_FEED_R_CK_BUFG_CASC25",
|
||||
"CLK_FEED_R_CK_BUFG_CASC26",
|
||||
"CLK_FEED_R_CK_BUFG_CASC27",
|
||||
"CLK_FEED_R_CK_BUFG_CASC28",
|
||||
"CLK_FEED_R_CK_BUFG_CASC29",
|
||||
"CLK_FEED_R_CK_BUFG_CASC3",
|
||||
"CLK_FEED_R_CK_BUFG_CASC30",
|
||||
"CLK_FEED_R_CK_BUFG_CASC31",
|
||||
"CLK_FEED_R_CK_BUFG_CASC4",
|
||||
"CLK_FEED_R_CK_BUFG_CASC5",
|
||||
"CLK_FEED_R_CK_BUFG_CASC6",
|
||||
"CLK_FEED_R_CK_BUFG_CASC7",
|
||||
"CLK_FEED_R_CK_BUFG_CASC8",
|
||||
"CLK_FEED_R_CK_BUFG_CASC9",
|
||||
"CLK_FEED_R_CK_GCLK0",
|
||||
"CLK_FEED_R_CK_GCLK1",
|
||||
"CLK_FEED_R_CK_GCLK10",
|
||||
"CLK_FEED_R_CK_GCLK11",
|
||||
"CLK_FEED_R_CK_GCLK12",
|
||||
"CLK_FEED_R_CK_GCLK13",
|
||||
"CLK_FEED_R_CK_GCLK14",
|
||||
"CLK_FEED_R_CK_GCLK15",
|
||||
"CLK_FEED_R_CK_GCLK16",
|
||||
"CLK_FEED_R_CK_GCLK17",
|
||||
"CLK_FEED_R_CK_GCLK18",
|
||||
"CLK_FEED_R_CK_GCLK19",
|
||||
"CLK_FEED_R_CK_GCLK2",
|
||||
"CLK_FEED_R_CK_GCLK20",
|
||||
"CLK_FEED_R_CK_GCLK21",
|
||||
"CLK_FEED_R_CK_GCLK22",
|
||||
"CLK_FEED_R_CK_GCLK23",
|
||||
"CLK_FEED_R_CK_GCLK24",
|
||||
"CLK_FEED_R_CK_GCLK25",
|
||||
"CLK_FEED_R_CK_GCLK26",
|
||||
"CLK_FEED_R_CK_GCLK27",
|
||||
"CLK_FEED_R_CK_GCLK28",
|
||||
"CLK_FEED_R_CK_GCLK29",
|
||||
"CLK_FEED_R_CK_GCLK3",
|
||||
"CLK_FEED_R_CK_GCLK30",
|
||||
"CLK_FEED_R_CK_GCLK31",
|
||||
"CLK_FEED_R_CK_GCLK4",
|
||||
"CLK_FEED_R_CK_GCLK5",
|
||||
"CLK_FEED_R_CK_GCLK6",
|
||||
"CLK_FEED_R_CK_GCLK7",
|
||||
"CLK_FEED_R_CK_GCLK8",
|
||||
"CLK_FEED_R_CK_GCLK9",
|
||||
"CLK_FEED_SE2A0",
|
||||
"CLK_FEED_SE2A1",
|
||||
"CLK_FEED_SE2A2",
|
||||
"CLK_FEED_SE2A3",
|
||||
"CLK_FEED_SE4BEG0",
|
||||
"CLK_FEED_SE4BEG1",
|
||||
"CLK_FEED_SE4BEG2",
|
||||
"CLK_FEED_SE4BEG3",
|
||||
"CLK_FEED_SE4C0",
|
||||
"CLK_FEED_SE4C1",
|
||||
"CLK_FEED_SE4C2",
|
||||
"CLK_FEED_SE4C3",
|
||||
"CLK_FEED_SW2A0",
|
||||
"CLK_FEED_SW2A1",
|
||||
"CLK_FEED_SW2A2",
|
||||
"CLK_FEED_SW2A3",
|
||||
"CLK_FEED_SW4A0",
|
||||
"CLK_FEED_SW4A1",
|
||||
"CLK_FEED_SW4A2",
|
||||
"CLK_FEED_SW4A3",
|
||||
"CLK_FEED_SW4END0",
|
||||
"CLK_FEED_SW4END1",
|
||||
"CLK_FEED_SW4END2",
|
||||
"CLK_FEED_SW4END3",
|
||||
"CLK_FEED_WL1END0",
|
||||
"CLK_FEED_WL1END1",
|
||||
"CLK_FEED_WL1END2",
|
||||
"CLK_FEED_WL1END3",
|
||||
"CLK_FEED_WR1END0",
|
||||
"CLK_FEED_WR1END1",
|
||||
"CLK_FEED_WR1END2",
|
||||
"CLK_FEED_WR1END3",
|
||||
"CLK_FEED_WW2A0",
|
||||
"CLK_FEED_WW2A1",
|
||||
"CLK_FEED_WW2A2",
|
||||
"CLK_FEED_WW2A3",
|
||||
"CLK_FEED_WW2END0",
|
||||
"CLK_FEED_WW2END1",
|
||||
"CLK_FEED_WW2END2",
|
||||
"CLK_FEED_WW2END3",
|
||||
"CLK_FEED_WW4A0",
|
||||
"CLK_FEED_WW4A1",
|
||||
"CLK_FEED_WW4A2",
|
||||
"CLK_FEED_WW4A3",
|
||||
"CLK_FEED_WW4B0",
|
||||
"CLK_FEED_WW4B1",
|
||||
"CLK_FEED_WW4B2",
|
||||
"CLK_FEED_WW4B3",
|
||||
"CLK_FEED_WW4C0",
|
||||
"CLK_FEED_WW4C1",
|
||||
"CLK_FEED_WW4C2",
|
||||
"CLK_FEED_WW4C3",
|
||||
"CLK_FEED_WW4END0",
|
||||
"CLK_FEED_WW4END1",
|
||||
"CLK_FEED_WW4END2",
|
||||
"CLK_FEED_WW4END3",
|
||||
"CLK_PMV2_A0",
|
||||
"CLK_PMV2_A1",
|
||||
"CLK_PMV2_A2",
|
||||
"CLK_PMV2_EN",
|
||||
"CLK_PMV2_O",
|
||||
"CLK_PMV2_ODIV2",
|
||||
"CLK_PMV2_ODIV4",
|
||||
"CLK_PMV_BYP0_0",
|
||||
"CLK_PMV_BYP1_0",
|
||||
"CLK_PMV_BYP2_0",
|
||||
"CLK_PMV_BYP3_0",
|
||||
"CLK_PMV_BYP4_0",
|
||||
"CLK_PMV_BYP5_0",
|
||||
"CLK_PMV_BYP6_0",
|
||||
"CLK_PMV_BYP7_0",
|
||||
"CLK_PMV_CLK0_0",
|
||||
"CLK_PMV_CLK1_0",
|
||||
"CLK_PMV_CTRL0_0",
|
||||
"CLK_PMV_CTRL1_0",
|
||||
"CLK_PMV_FAN0_0",
|
||||
"CLK_PMV_FAN1_0",
|
||||
"CLK_PMV_FAN2_0",
|
||||
"CLK_PMV_FAN3_0",
|
||||
"CLK_PMV_FAN4_0",
|
||||
"CLK_PMV_FAN5_0",
|
||||
"CLK_PMV_FAN6_0",
|
||||
"CLK_PMV_FAN7_0",
|
||||
"CLK_PMV_IMUX0_0",
|
||||
"CLK_PMV_IMUX10_0",
|
||||
"CLK_PMV_IMUX11_0",
|
||||
"CLK_PMV_IMUX12_0",
|
||||
"CLK_PMV_IMUX13_0",
|
||||
"CLK_PMV_IMUX14_0",
|
||||
"CLK_PMV_IMUX15_0",
|
||||
"CLK_PMV_IMUX16_0",
|
||||
"CLK_PMV_IMUX17_0",
|
||||
"CLK_PMV_IMUX18_0",
|
||||
"CLK_PMV_IMUX19_0",
|
||||
"CLK_PMV_IMUX1_0",
|
||||
"CLK_PMV_IMUX20_0",
|
||||
"CLK_PMV_IMUX21_0",
|
||||
"CLK_PMV_IMUX22_0",
|
||||
"CLK_PMV_IMUX23_0",
|
||||
"CLK_PMV_IMUX24_0",
|
||||
"CLK_PMV_IMUX25_0",
|
||||
"CLK_PMV_IMUX26_0",
|
||||
"CLK_PMV_IMUX27_0",
|
||||
"CLK_PMV_IMUX28_0",
|
||||
"CLK_PMV_IMUX29_0",
|
||||
"CLK_PMV_IMUX2_0",
|
||||
"CLK_PMV_IMUX30_0",
|
||||
"CLK_PMV_IMUX31_0",
|
||||
"CLK_PMV_IMUX32_0",
|
||||
"CLK_PMV_IMUX33_0",
|
||||
"CLK_PMV_IMUX34_0",
|
||||
"CLK_PMV_IMUX35_0",
|
||||
"CLK_PMV_IMUX36_0",
|
||||
"CLK_PMV_IMUX37_0",
|
||||
"CLK_PMV_IMUX38_0",
|
||||
"CLK_PMV_IMUX39_0",
|
||||
"CLK_PMV_IMUX3_0",
|
||||
"CLK_PMV_IMUX40_0",
|
||||
"CLK_PMV_IMUX41_0",
|
||||
"CLK_PMV_IMUX42_0",
|
||||
"CLK_PMV_IMUX43_0",
|
||||
"CLK_PMV_IMUX44_0",
|
||||
"CLK_PMV_IMUX45_0",
|
||||
"CLK_PMV_IMUX46_0",
|
||||
"CLK_PMV_IMUX47_0",
|
||||
"CLK_PMV_IMUX4_0",
|
||||
"CLK_PMV_IMUX5_0",
|
||||
"CLK_PMV_IMUX6_0",
|
||||
"CLK_PMV_IMUX7_0",
|
||||
"CLK_PMV_IMUX8_0",
|
||||
"CLK_PMV_IMUX9_0",
|
||||
"CLK_PMV_LOGIC_OUTS0_0",
|
||||
"CLK_PMV_LOGIC_OUTS10_0",
|
||||
"CLK_PMV_LOGIC_OUTS11_0",
|
||||
"CLK_PMV_LOGIC_OUTS12_0",
|
||||
"CLK_PMV_LOGIC_OUTS13_0",
|
||||
"CLK_PMV_LOGIC_OUTS14_0",
|
||||
"CLK_PMV_LOGIC_OUTS15_0",
|
||||
"CLK_PMV_LOGIC_OUTS16_0",
|
||||
"CLK_PMV_LOGIC_OUTS17_0",
|
||||
"CLK_PMV_LOGIC_OUTS18_0",
|
||||
"CLK_PMV_LOGIC_OUTS19_0",
|
||||
"CLK_PMV_LOGIC_OUTS1_0",
|
||||
"CLK_PMV_LOGIC_OUTS20_0",
|
||||
"CLK_PMV_LOGIC_OUTS21_0",
|
||||
"CLK_PMV_LOGIC_OUTS22_0",
|
||||
"CLK_PMV_LOGIC_OUTS23_0",
|
||||
"CLK_PMV_LOGIC_OUTS2_0",
|
||||
"CLK_PMV_LOGIC_OUTS3_0",
|
||||
"CLK_PMV_LOGIC_OUTS4_0",
|
||||
"CLK_PMV_LOGIC_OUTS5_0",
|
||||
"CLK_PMV_LOGIC_OUTS6_0",
|
||||
"CLK_PMV_LOGIC_OUTS7_0",
|
||||
"CLK_PMV_LOGIC_OUTS8_0",
|
||||
"CLK_PMV_LOGIC_OUTS9_0"
|
||||
]
|
||||
"wires": {
|
||||
"CLK_FEED_CK_BUFG_CASC0": null,
|
||||
"CLK_FEED_CK_BUFG_CASC1": null,
|
||||
"CLK_FEED_CK_BUFG_CASC10": null,
|
||||
"CLK_FEED_CK_BUFG_CASC11": null,
|
||||
"CLK_FEED_CK_BUFG_CASC12": null,
|
||||
"CLK_FEED_CK_BUFG_CASC13": null,
|
||||
"CLK_FEED_CK_BUFG_CASC14": null,
|
||||
"CLK_FEED_CK_BUFG_CASC15": null,
|
||||
"CLK_FEED_CK_BUFG_CASC16": null,
|
||||
"CLK_FEED_CK_BUFG_CASC17": null,
|
||||
"CLK_FEED_CK_BUFG_CASC18": null,
|
||||
"CLK_FEED_CK_BUFG_CASC19": null,
|
||||
"CLK_FEED_CK_BUFG_CASC2": null,
|
||||
"CLK_FEED_CK_BUFG_CASC20": null,
|
||||
"CLK_FEED_CK_BUFG_CASC21": null,
|
||||
"CLK_FEED_CK_BUFG_CASC22": null,
|
||||
"CLK_FEED_CK_BUFG_CASC23": null,
|
||||
"CLK_FEED_CK_BUFG_CASC24": null,
|
||||
"CLK_FEED_CK_BUFG_CASC25": null,
|
||||
"CLK_FEED_CK_BUFG_CASC26": null,
|
||||
"CLK_FEED_CK_BUFG_CASC27": null,
|
||||
"CLK_FEED_CK_BUFG_CASC28": null,
|
||||
"CLK_FEED_CK_BUFG_CASC29": null,
|
||||
"CLK_FEED_CK_BUFG_CASC3": null,
|
||||
"CLK_FEED_CK_BUFG_CASC30": null,
|
||||
"CLK_FEED_CK_BUFG_CASC31": null,
|
||||
"CLK_FEED_CK_BUFG_CASC4": null,
|
||||
"CLK_FEED_CK_BUFG_CASC5": null,
|
||||
"CLK_FEED_CK_BUFG_CASC6": null,
|
||||
"CLK_FEED_CK_BUFG_CASC7": null,
|
||||
"CLK_FEED_CK_BUFG_CASC8": null,
|
||||
"CLK_FEED_CK_BUFG_CASC9": null,
|
||||
"CLK_FEED_CK_GCLK0": null,
|
||||
"CLK_FEED_CK_GCLK1": null,
|
||||
"CLK_FEED_CK_GCLK10": null,
|
||||
"CLK_FEED_CK_GCLK11": null,
|
||||
"CLK_FEED_CK_GCLK12": null,
|
||||
"CLK_FEED_CK_GCLK13": null,
|
||||
"CLK_FEED_CK_GCLK14": null,
|
||||
"CLK_FEED_CK_GCLK15": null,
|
||||
"CLK_FEED_CK_GCLK16": null,
|
||||
"CLK_FEED_CK_GCLK17": null,
|
||||
"CLK_FEED_CK_GCLK18": null,
|
||||
"CLK_FEED_CK_GCLK19": null,
|
||||
"CLK_FEED_CK_GCLK2": null,
|
||||
"CLK_FEED_CK_GCLK20": null,
|
||||
"CLK_FEED_CK_GCLK21": null,
|
||||
"CLK_FEED_CK_GCLK22": null,
|
||||
"CLK_FEED_CK_GCLK23": null,
|
||||
"CLK_FEED_CK_GCLK24": null,
|
||||
"CLK_FEED_CK_GCLK25": null,
|
||||
"CLK_FEED_CK_GCLK26": null,
|
||||
"CLK_FEED_CK_GCLK27": null,
|
||||
"CLK_FEED_CK_GCLK28": null,
|
||||
"CLK_FEED_CK_GCLK29": null,
|
||||
"CLK_FEED_CK_GCLK3": null,
|
||||
"CLK_FEED_CK_GCLK30": null,
|
||||
"CLK_FEED_CK_GCLK31": null,
|
||||
"CLK_FEED_CK_GCLK4": null,
|
||||
"CLK_FEED_CK_GCLK5": null,
|
||||
"CLK_FEED_CK_GCLK6": null,
|
||||
"CLK_FEED_CK_GCLK7": null,
|
||||
"CLK_FEED_CK_GCLK8": null,
|
||||
"CLK_FEED_CK_GCLK9": null,
|
||||
"CLK_FEED_EE2A0": null,
|
||||
"CLK_FEED_EE2A1": null,
|
||||
"CLK_FEED_EE2A2": null,
|
||||
"CLK_FEED_EE2A3": null,
|
||||
"CLK_FEED_EE2BEG0": null,
|
||||
"CLK_FEED_EE2BEG1": null,
|
||||
"CLK_FEED_EE2BEG2": null,
|
||||
"CLK_FEED_EE2BEG3": null,
|
||||
"CLK_FEED_EE4A0": null,
|
||||
"CLK_FEED_EE4A1": null,
|
||||
"CLK_FEED_EE4A2": null,
|
||||
"CLK_FEED_EE4A3": null,
|
||||
"CLK_FEED_EE4B0": null,
|
||||
"CLK_FEED_EE4B1": null,
|
||||
"CLK_FEED_EE4B2": null,
|
||||
"CLK_FEED_EE4B3": null,
|
||||
"CLK_FEED_EE4BEG0": null,
|
||||
"CLK_FEED_EE4BEG1": null,
|
||||
"CLK_FEED_EE4BEG2": null,
|
||||
"CLK_FEED_EE4BEG3": null,
|
||||
"CLK_FEED_EE4C0": null,
|
||||
"CLK_FEED_EE4C1": null,
|
||||
"CLK_FEED_EE4C2": null,
|
||||
"CLK_FEED_EE4C3": null,
|
||||
"CLK_FEED_EL1BEG0": null,
|
||||
"CLK_FEED_EL1BEG1": null,
|
||||
"CLK_FEED_EL1BEG2": null,
|
||||
"CLK_FEED_EL1BEG3": null,
|
||||
"CLK_FEED_ER1BEG0": null,
|
||||
"CLK_FEED_ER1BEG1": null,
|
||||
"CLK_FEED_ER1BEG2": null,
|
||||
"CLK_FEED_ER1BEG3": null,
|
||||
"CLK_FEED_LH1": null,
|
||||
"CLK_FEED_LH10": null,
|
||||
"CLK_FEED_LH11": null,
|
||||
"CLK_FEED_LH12": null,
|
||||
"CLK_FEED_LH2": null,
|
||||
"CLK_FEED_LH3": null,
|
||||
"CLK_FEED_LH4": null,
|
||||
"CLK_FEED_LH5": null,
|
||||
"CLK_FEED_LH6": null,
|
||||
"CLK_FEED_LH7": null,
|
||||
"CLK_FEED_LH8": null,
|
||||
"CLK_FEED_LH9": null,
|
||||
"CLK_FEED_MONITOR_N": null,
|
||||
"CLK_FEED_MONITOR_P": null,
|
||||
"CLK_FEED_NE2A0": null,
|
||||
"CLK_FEED_NE2A1": null,
|
||||
"CLK_FEED_NE2A2": null,
|
||||
"CLK_FEED_NE2A3": null,
|
||||
"CLK_FEED_NE4BEG0": null,
|
||||
"CLK_FEED_NE4BEG1": null,
|
||||
"CLK_FEED_NE4BEG2": null,
|
||||
"CLK_FEED_NE4BEG3": null,
|
||||
"CLK_FEED_NE4C0": null,
|
||||
"CLK_FEED_NE4C1": null,
|
||||
"CLK_FEED_NE4C2": null,
|
||||
"CLK_FEED_NE4C3": null,
|
||||
"CLK_FEED_NW2A0": null,
|
||||
"CLK_FEED_NW2A1": null,
|
||||
"CLK_FEED_NW2A2": null,
|
||||
"CLK_FEED_NW2A3": null,
|
||||
"CLK_FEED_NW4A0": null,
|
||||
"CLK_FEED_NW4A1": null,
|
||||
"CLK_FEED_NW4A2": null,
|
||||
"CLK_FEED_NW4A3": null,
|
||||
"CLK_FEED_NW4END0": null,
|
||||
"CLK_FEED_NW4END1": null,
|
||||
"CLK_FEED_NW4END2": null,
|
||||
"CLK_FEED_NW4END3": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC0": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC1": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC10": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC11": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC12": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC13": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC14": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC15": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC16": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC17": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC18": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC19": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC2": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC20": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC21": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC22": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC23": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC24": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC25": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC26": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC27": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC28": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC29": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC3": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC30": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC31": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC4": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC5": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC6": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC7": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC8": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC9": null,
|
||||
"CLK_FEED_R_CK_GCLK0": null,
|
||||
"CLK_FEED_R_CK_GCLK1": null,
|
||||
"CLK_FEED_R_CK_GCLK10": null,
|
||||
"CLK_FEED_R_CK_GCLK11": null,
|
||||
"CLK_FEED_R_CK_GCLK12": null,
|
||||
"CLK_FEED_R_CK_GCLK13": null,
|
||||
"CLK_FEED_R_CK_GCLK14": null,
|
||||
"CLK_FEED_R_CK_GCLK15": null,
|
||||
"CLK_FEED_R_CK_GCLK16": null,
|
||||
"CLK_FEED_R_CK_GCLK17": null,
|
||||
"CLK_FEED_R_CK_GCLK18": null,
|
||||
"CLK_FEED_R_CK_GCLK19": null,
|
||||
"CLK_FEED_R_CK_GCLK2": null,
|
||||
"CLK_FEED_R_CK_GCLK20": null,
|
||||
"CLK_FEED_R_CK_GCLK21": null,
|
||||
"CLK_FEED_R_CK_GCLK22": null,
|
||||
"CLK_FEED_R_CK_GCLK23": null,
|
||||
"CLK_FEED_R_CK_GCLK24": null,
|
||||
"CLK_FEED_R_CK_GCLK25": null,
|
||||
"CLK_FEED_R_CK_GCLK26": null,
|
||||
"CLK_FEED_R_CK_GCLK27": null,
|
||||
"CLK_FEED_R_CK_GCLK28": null,
|
||||
"CLK_FEED_R_CK_GCLK29": null,
|
||||
"CLK_FEED_R_CK_GCLK3": null,
|
||||
"CLK_FEED_R_CK_GCLK30": null,
|
||||
"CLK_FEED_R_CK_GCLK31": null,
|
||||
"CLK_FEED_R_CK_GCLK4": null,
|
||||
"CLK_FEED_R_CK_GCLK5": null,
|
||||
"CLK_FEED_R_CK_GCLK6": null,
|
||||
"CLK_FEED_R_CK_GCLK7": null,
|
||||
"CLK_FEED_R_CK_GCLK8": null,
|
||||
"CLK_FEED_R_CK_GCLK9": null,
|
||||
"CLK_FEED_SE2A0": null,
|
||||
"CLK_FEED_SE2A1": null,
|
||||
"CLK_FEED_SE2A2": null,
|
||||
"CLK_FEED_SE2A3": null,
|
||||
"CLK_FEED_SE4BEG0": null,
|
||||
"CLK_FEED_SE4BEG1": null,
|
||||
"CLK_FEED_SE4BEG2": null,
|
||||
"CLK_FEED_SE4BEG3": null,
|
||||
"CLK_FEED_SE4C0": null,
|
||||
"CLK_FEED_SE4C1": null,
|
||||
"CLK_FEED_SE4C2": null,
|
||||
"CLK_FEED_SE4C3": null,
|
||||
"CLK_FEED_SW2A0": null,
|
||||
"CLK_FEED_SW2A1": null,
|
||||
"CLK_FEED_SW2A2": null,
|
||||
"CLK_FEED_SW2A3": null,
|
||||
"CLK_FEED_SW4A0": null,
|
||||
"CLK_FEED_SW4A1": null,
|
||||
"CLK_FEED_SW4A2": null,
|
||||
"CLK_FEED_SW4A3": null,
|
||||
"CLK_FEED_SW4END0": null,
|
||||
"CLK_FEED_SW4END1": null,
|
||||
"CLK_FEED_SW4END2": null,
|
||||
"CLK_FEED_SW4END3": null,
|
||||
"CLK_FEED_WL1END0": null,
|
||||
"CLK_FEED_WL1END1": null,
|
||||
"CLK_FEED_WL1END2": null,
|
||||
"CLK_FEED_WL1END3": null,
|
||||
"CLK_FEED_WR1END0": null,
|
||||
"CLK_FEED_WR1END1": null,
|
||||
"CLK_FEED_WR1END2": null,
|
||||
"CLK_FEED_WR1END3": null,
|
||||
"CLK_FEED_WW2A0": null,
|
||||
"CLK_FEED_WW2A1": null,
|
||||
"CLK_FEED_WW2A2": null,
|
||||
"CLK_FEED_WW2A3": null,
|
||||
"CLK_FEED_WW2END0": null,
|
||||
"CLK_FEED_WW2END1": null,
|
||||
"CLK_FEED_WW2END2": null,
|
||||
"CLK_FEED_WW2END3": null,
|
||||
"CLK_FEED_WW4A0": null,
|
||||
"CLK_FEED_WW4A1": null,
|
||||
"CLK_FEED_WW4A2": null,
|
||||
"CLK_FEED_WW4A3": null,
|
||||
"CLK_FEED_WW4B0": null,
|
||||
"CLK_FEED_WW4B1": null,
|
||||
"CLK_FEED_WW4B2": null,
|
||||
"CLK_FEED_WW4B3": null,
|
||||
"CLK_FEED_WW4C0": null,
|
||||
"CLK_FEED_WW4C1": null,
|
||||
"CLK_FEED_WW4C2": null,
|
||||
"CLK_FEED_WW4C3": null,
|
||||
"CLK_FEED_WW4END0": null,
|
||||
"CLK_FEED_WW4END1": null,
|
||||
"CLK_FEED_WW4END2": null,
|
||||
"CLK_FEED_WW4END3": null,
|
||||
"CLK_PMV2_A0": null,
|
||||
"CLK_PMV2_A1": null,
|
||||
"CLK_PMV2_A2": null,
|
||||
"CLK_PMV2_EN": null,
|
||||
"CLK_PMV2_O": null,
|
||||
"CLK_PMV2_ODIV2": null,
|
||||
"CLK_PMV2_ODIV4": null,
|
||||
"CLK_PMV_BYP0_0": null,
|
||||
"CLK_PMV_BYP1_0": null,
|
||||
"CLK_PMV_BYP2_0": null,
|
||||
"CLK_PMV_BYP3_0": null,
|
||||
"CLK_PMV_BYP4_0": null,
|
||||
"CLK_PMV_BYP5_0": null,
|
||||
"CLK_PMV_BYP6_0": null,
|
||||
"CLK_PMV_BYP7_0": null,
|
||||
"CLK_PMV_CLK0_0": null,
|
||||
"CLK_PMV_CLK1_0": null,
|
||||
"CLK_PMV_CTRL0_0": null,
|
||||
"CLK_PMV_CTRL1_0": null,
|
||||
"CLK_PMV_FAN0_0": null,
|
||||
"CLK_PMV_FAN1_0": null,
|
||||
"CLK_PMV_FAN2_0": null,
|
||||
"CLK_PMV_FAN3_0": null,
|
||||
"CLK_PMV_FAN4_0": null,
|
||||
"CLK_PMV_FAN5_0": null,
|
||||
"CLK_PMV_FAN6_0": null,
|
||||
"CLK_PMV_FAN7_0": null,
|
||||
"CLK_PMV_IMUX0_0": null,
|
||||
"CLK_PMV_IMUX10_0": null,
|
||||
"CLK_PMV_IMUX11_0": null,
|
||||
"CLK_PMV_IMUX12_0": null,
|
||||
"CLK_PMV_IMUX13_0": null,
|
||||
"CLK_PMV_IMUX14_0": null,
|
||||
"CLK_PMV_IMUX15_0": null,
|
||||
"CLK_PMV_IMUX16_0": null,
|
||||
"CLK_PMV_IMUX17_0": null,
|
||||
"CLK_PMV_IMUX18_0": null,
|
||||
"CLK_PMV_IMUX19_0": null,
|
||||
"CLK_PMV_IMUX1_0": null,
|
||||
"CLK_PMV_IMUX20_0": null,
|
||||
"CLK_PMV_IMUX21_0": null,
|
||||
"CLK_PMV_IMUX22_0": null,
|
||||
"CLK_PMV_IMUX23_0": null,
|
||||
"CLK_PMV_IMUX24_0": null,
|
||||
"CLK_PMV_IMUX25_0": null,
|
||||
"CLK_PMV_IMUX26_0": null,
|
||||
"CLK_PMV_IMUX27_0": null,
|
||||
"CLK_PMV_IMUX28_0": null,
|
||||
"CLK_PMV_IMUX29_0": null,
|
||||
"CLK_PMV_IMUX2_0": null,
|
||||
"CLK_PMV_IMUX30_0": null,
|
||||
"CLK_PMV_IMUX31_0": null,
|
||||
"CLK_PMV_IMUX32_0": null,
|
||||
"CLK_PMV_IMUX33_0": null,
|
||||
"CLK_PMV_IMUX34_0": null,
|
||||
"CLK_PMV_IMUX35_0": null,
|
||||
"CLK_PMV_IMUX36_0": null,
|
||||
"CLK_PMV_IMUX37_0": null,
|
||||
"CLK_PMV_IMUX38_0": null,
|
||||
"CLK_PMV_IMUX39_0": null,
|
||||
"CLK_PMV_IMUX3_0": null,
|
||||
"CLK_PMV_IMUX40_0": null,
|
||||
"CLK_PMV_IMUX41_0": null,
|
||||
"CLK_PMV_IMUX42_0": null,
|
||||
"CLK_PMV_IMUX43_0": null,
|
||||
"CLK_PMV_IMUX44_0": null,
|
||||
"CLK_PMV_IMUX45_0": null,
|
||||
"CLK_PMV_IMUX46_0": null,
|
||||
"CLK_PMV_IMUX47_0": null,
|
||||
"CLK_PMV_IMUX4_0": null,
|
||||
"CLK_PMV_IMUX5_0": null,
|
||||
"CLK_PMV_IMUX6_0": null,
|
||||
"CLK_PMV_IMUX7_0": null,
|
||||
"CLK_PMV_IMUX8_0": null,
|
||||
"CLK_PMV_IMUX9_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS0_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS10_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS11_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS12_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS13_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS14_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS15_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS16_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS17_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS18_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS19_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS1_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS20_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS21_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS22_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS23_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS2_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS3_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS4_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS5_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS6_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS7_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS8_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS9_0": null
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,359 +2,359 @@
|
|||
"pips": {},
|
||||
"sites": [],
|
||||
"tile_type": "CLK_PMV2_SVT",
|
||||
"wires": [
|
||||
"CLK_FEED_CK_BUFG_CASC0",
|
||||
"CLK_FEED_CK_BUFG_CASC1",
|
||||
"CLK_FEED_CK_BUFG_CASC10",
|
||||
"CLK_FEED_CK_BUFG_CASC11",
|
||||
"CLK_FEED_CK_BUFG_CASC12",
|
||||
"CLK_FEED_CK_BUFG_CASC13",
|
||||
"CLK_FEED_CK_BUFG_CASC14",
|
||||
"CLK_FEED_CK_BUFG_CASC15",
|
||||
"CLK_FEED_CK_BUFG_CASC16",
|
||||
"CLK_FEED_CK_BUFG_CASC17",
|
||||
"CLK_FEED_CK_BUFG_CASC18",
|
||||
"CLK_FEED_CK_BUFG_CASC19",
|
||||
"CLK_FEED_CK_BUFG_CASC2",
|
||||
"CLK_FEED_CK_BUFG_CASC20",
|
||||
"CLK_FEED_CK_BUFG_CASC21",
|
||||
"CLK_FEED_CK_BUFG_CASC22",
|
||||
"CLK_FEED_CK_BUFG_CASC23",
|
||||
"CLK_FEED_CK_BUFG_CASC24",
|
||||
"CLK_FEED_CK_BUFG_CASC25",
|
||||
"CLK_FEED_CK_BUFG_CASC26",
|
||||
"CLK_FEED_CK_BUFG_CASC27",
|
||||
"CLK_FEED_CK_BUFG_CASC28",
|
||||
"CLK_FEED_CK_BUFG_CASC29",
|
||||
"CLK_FEED_CK_BUFG_CASC3",
|
||||
"CLK_FEED_CK_BUFG_CASC30",
|
||||
"CLK_FEED_CK_BUFG_CASC31",
|
||||
"CLK_FEED_CK_BUFG_CASC4",
|
||||
"CLK_FEED_CK_BUFG_CASC5",
|
||||
"CLK_FEED_CK_BUFG_CASC6",
|
||||
"CLK_FEED_CK_BUFG_CASC7",
|
||||
"CLK_FEED_CK_BUFG_CASC8",
|
||||
"CLK_FEED_CK_BUFG_CASC9",
|
||||
"CLK_FEED_CK_GCLK0",
|
||||
"CLK_FEED_CK_GCLK1",
|
||||
"CLK_FEED_CK_GCLK10",
|
||||
"CLK_FEED_CK_GCLK11",
|
||||
"CLK_FEED_CK_GCLK12",
|
||||
"CLK_FEED_CK_GCLK13",
|
||||
"CLK_FEED_CK_GCLK14",
|
||||
"CLK_FEED_CK_GCLK15",
|
||||
"CLK_FEED_CK_GCLK16",
|
||||
"CLK_FEED_CK_GCLK17",
|
||||
"CLK_FEED_CK_GCLK18",
|
||||
"CLK_FEED_CK_GCLK19",
|
||||
"CLK_FEED_CK_GCLK2",
|
||||
"CLK_FEED_CK_GCLK20",
|
||||
"CLK_FEED_CK_GCLK21",
|
||||
"CLK_FEED_CK_GCLK22",
|
||||
"CLK_FEED_CK_GCLK23",
|
||||
"CLK_FEED_CK_GCLK24",
|
||||
"CLK_FEED_CK_GCLK25",
|
||||
"CLK_FEED_CK_GCLK26",
|
||||
"CLK_FEED_CK_GCLK27",
|
||||
"CLK_FEED_CK_GCLK28",
|
||||
"CLK_FEED_CK_GCLK29",
|
||||
"CLK_FEED_CK_GCLK3",
|
||||
"CLK_FEED_CK_GCLK30",
|
||||
"CLK_FEED_CK_GCLK31",
|
||||
"CLK_FEED_CK_GCLK4",
|
||||
"CLK_FEED_CK_GCLK5",
|
||||
"CLK_FEED_CK_GCLK6",
|
||||
"CLK_FEED_CK_GCLK7",
|
||||
"CLK_FEED_CK_GCLK8",
|
||||
"CLK_FEED_CK_GCLK9",
|
||||
"CLK_FEED_EE2A0",
|
||||
"CLK_FEED_EE2A1",
|
||||
"CLK_FEED_EE2A2",
|
||||
"CLK_FEED_EE2A3",
|
||||
"CLK_FEED_EE2BEG0",
|
||||
"CLK_FEED_EE2BEG1",
|
||||
"CLK_FEED_EE2BEG2",
|
||||
"CLK_FEED_EE2BEG3",
|
||||
"CLK_FEED_EE4A0",
|
||||
"CLK_FEED_EE4A1",
|
||||
"CLK_FEED_EE4A2",
|
||||
"CLK_FEED_EE4A3",
|
||||
"CLK_FEED_EE4B0",
|
||||
"CLK_FEED_EE4B1",
|
||||
"CLK_FEED_EE4B2",
|
||||
"CLK_FEED_EE4B3",
|
||||
"CLK_FEED_EE4BEG0",
|
||||
"CLK_FEED_EE4BEG1",
|
||||
"CLK_FEED_EE4BEG2",
|
||||
"CLK_FEED_EE4BEG3",
|
||||
"CLK_FEED_EE4C0",
|
||||
"CLK_FEED_EE4C1",
|
||||
"CLK_FEED_EE4C2",
|
||||
"CLK_FEED_EE4C3",
|
||||
"CLK_FEED_EL1BEG0",
|
||||
"CLK_FEED_EL1BEG1",
|
||||
"CLK_FEED_EL1BEG2",
|
||||
"CLK_FEED_EL1BEG3",
|
||||
"CLK_FEED_ER1BEG0",
|
||||
"CLK_FEED_ER1BEG1",
|
||||
"CLK_FEED_ER1BEG2",
|
||||
"CLK_FEED_ER1BEG3",
|
||||
"CLK_FEED_LH1",
|
||||
"CLK_FEED_LH10",
|
||||
"CLK_FEED_LH11",
|
||||
"CLK_FEED_LH12",
|
||||
"CLK_FEED_LH2",
|
||||
"CLK_FEED_LH3",
|
||||
"CLK_FEED_LH4",
|
||||
"CLK_FEED_LH5",
|
||||
"CLK_FEED_LH6",
|
||||
"CLK_FEED_LH7",
|
||||
"CLK_FEED_LH8",
|
||||
"CLK_FEED_LH9",
|
||||
"CLK_FEED_MONITOR_N",
|
||||
"CLK_FEED_MONITOR_P",
|
||||
"CLK_FEED_NE2A0",
|
||||
"CLK_FEED_NE2A1",
|
||||
"CLK_FEED_NE2A2",
|
||||
"CLK_FEED_NE2A3",
|
||||
"CLK_FEED_NE4BEG0",
|
||||
"CLK_FEED_NE4BEG1",
|
||||
"CLK_FEED_NE4BEG2",
|
||||
"CLK_FEED_NE4BEG3",
|
||||
"CLK_FEED_NE4C0",
|
||||
"CLK_FEED_NE4C1",
|
||||
"CLK_FEED_NE4C2",
|
||||
"CLK_FEED_NE4C3",
|
||||
"CLK_FEED_NW2A0",
|
||||
"CLK_FEED_NW2A1",
|
||||
"CLK_FEED_NW2A2",
|
||||
"CLK_FEED_NW2A3",
|
||||
"CLK_FEED_NW4A0",
|
||||
"CLK_FEED_NW4A1",
|
||||
"CLK_FEED_NW4A2",
|
||||
"CLK_FEED_NW4A3",
|
||||
"CLK_FEED_NW4END0",
|
||||
"CLK_FEED_NW4END1",
|
||||
"CLK_FEED_NW4END2",
|
||||
"CLK_FEED_NW4END3",
|
||||
"CLK_FEED_R_CK_BUFG_CASC0",
|
||||
"CLK_FEED_R_CK_BUFG_CASC1",
|
||||
"CLK_FEED_R_CK_BUFG_CASC10",
|
||||
"CLK_FEED_R_CK_BUFG_CASC11",
|
||||
"CLK_FEED_R_CK_BUFG_CASC12",
|
||||
"CLK_FEED_R_CK_BUFG_CASC13",
|
||||
"CLK_FEED_R_CK_BUFG_CASC14",
|
||||
"CLK_FEED_R_CK_BUFG_CASC15",
|
||||
"CLK_FEED_R_CK_BUFG_CASC16",
|
||||
"CLK_FEED_R_CK_BUFG_CASC17",
|
||||
"CLK_FEED_R_CK_BUFG_CASC18",
|
||||
"CLK_FEED_R_CK_BUFG_CASC19",
|
||||
"CLK_FEED_R_CK_BUFG_CASC2",
|
||||
"CLK_FEED_R_CK_BUFG_CASC20",
|
||||
"CLK_FEED_R_CK_BUFG_CASC21",
|
||||
"CLK_FEED_R_CK_BUFG_CASC22",
|
||||
"CLK_FEED_R_CK_BUFG_CASC23",
|
||||
"CLK_FEED_R_CK_BUFG_CASC24",
|
||||
"CLK_FEED_R_CK_BUFG_CASC25",
|
||||
"CLK_FEED_R_CK_BUFG_CASC26",
|
||||
"CLK_FEED_R_CK_BUFG_CASC27",
|
||||
"CLK_FEED_R_CK_BUFG_CASC28",
|
||||
"CLK_FEED_R_CK_BUFG_CASC29",
|
||||
"CLK_FEED_R_CK_BUFG_CASC3",
|
||||
"CLK_FEED_R_CK_BUFG_CASC30",
|
||||
"CLK_FEED_R_CK_BUFG_CASC31",
|
||||
"CLK_FEED_R_CK_BUFG_CASC4",
|
||||
"CLK_FEED_R_CK_BUFG_CASC5",
|
||||
"CLK_FEED_R_CK_BUFG_CASC6",
|
||||
"CLK_FEED_R_CK_BUFG_CASC7",
|
||||
"CLK_FEED_R_CK_BUFG_CASC8",
|
||||
"CLK_FEED_R_CK_BUFG_CASC9",
|
||||
"CLK_FEED_R_CK_GCLK0",
|
||||
"CLK_FEED_R_CK_GCLK1",
|
||||
"CLK_FEED_R_CK_GCLK10",
|
||||
"CLK_FEED_R_CK_GCLK11",
|
||||
"CLK_FEED_R_CK_GCLK12",
|
||||
"CLK_FEED_R_CK_GCLK13",
|
||||
"CLK_FEED_R_CK_GCLK14",
|
||||
"CLK_FEED_R_CK_GCLK15",
|
||||
"CLK_FEED_R_CK_GCLK16",
|
||||
"CLK_FEED_R_CK_GCLK17",
|
||||
"CLK_FEED_R_CK_GCLK18",
|
||||
"CLK_FEED_R_CK_GCLK19",
|
||||
"CLK_FEED_R_CK_GCLK2",
|
||||
"CLK_FEED_R_CK_GCLK20",
|
||||
"CLK_FEED_R_CK_GCLK21",
|
||||
"CLK_FEED_R_CK_GCLK22",
|
||||
"CLK_FEED_R_CK_GCLK23",
|
||||
"CLK_FEED_R_CK_GCLK24",
|
||||
"CLK_FEED_R_CK_GCLK25",
|
||||
"CLK_FEED_R_CK_GCLK26",
|
||||
"CLK_FEED_R_CK_GCLK27",
|
||||
"CLK_FEED_R_CK_GCLK28",
|
||||
"CLK_FEED_R_CK_GCLK29",
|
||||
"CLK_FEED_R_CK_GCLK3",
|
||||
"CLK_FEED_R_CK_GCLK30",
|
||||
"CLK_FEED_R_CK_GCLK31",
|
||||
"CLK_FEED_R_CK_GCLK4",
|
||||
"CLK_FEED_R_CK_GCLK5",
|
||||
"CLK_FEED_R_CK_GCLK6",
|
||||
"CLK_FEED_R_CK_GCLK7",
|
||||
"CLK_FEED_R_CK_GCLK8",
|
||||
"CLK_FEED_R_CK_GCLK9",
|
||||
"CLK_FEED_SE2A0",
|
||||
"CLK_FEED_SE2A1",
|
||||
"CLK_FEED_SE2A2",
|
||||
"CLK_FEED_SE2A3",
|
||||
"CLK_FEED_SE4BEG0",
|
||||
"CLK_FEED_SE4BEG1",
|
||||
"CLK_FEED_SE4BEG2",
|
||||
"CLK_FEED_SE4BEG3",
|
||||
"CLK_FEED_SE4C0",
|
||||
"CLK_FEED_SE4C1",
|
||||
"CLK_FEED_SE4C2",
|
||||
"CLK_FEED_SE4C3",
|
||||
"CLK_FEED_SW2A0",
|
||||
"CLK_FEED_SW2A1",
|
||||
"CLK_FEED_SW2A2",
|
||||
"CLK_FEED_SW2A3",
|
||||
"CLK_FEED_SW4A0",
|
||||
"CLK_FEED_SW4A1",
|
||||
"CLK_FEED_SW4A2",
|
||||
"CLK_FEED_SW4A3",
|
||||
"CLK_FEED_SW4END0",
|
||||
"CLK_FEED_SW4END1",
|
||||
"CLK_FEED_SW4END2",
|
||||
"CLK_FEED_SW4END3",
|
||||
"CLK_FEED_WL1END0",
|
||||
"CLK_FEED_WL1END1",
|
||||
"CLK_FEED_WL1END2",
|
||||
"CLK_FEED_WL1END3",
|
||||
"CLK_FEED_WR1END0",
|
||||
"CLK_FEED_WR1END1",
|
||||
"CLK_FEED_WR1END2",
|
||||
"CLK_FEED_WR1END3",
|
||||
"CLK_FEED_WW2A0",
|
||||
"CLK_FEED_WW2A1",
|
||||
"CLK_FEED_WW2A2",
|
||||
"CLK_FEED_WW2A3",
|
||||
"CLK_FEED_WW2END0",
|
||||
"CLK_FEED_WW2END1",
|
||||
"CLK_FEED_WW2END2",
|
||||
"CLK_FEED_WW2END3",
|
||||
"CLK_FEED_WW4A0",
|
||||
"CLK_FEED_WW4A1",
|
||||
"CLK_FEED_WW4A2",
|
||||
"CLK_FEED_WW4A3",
|
||||
"CLK_FEED_WW4B0",
|
||||
"CLK_FEED_WW4B1",
|
||||
"CLK_FEED_WW4B2",
|
||||
"CLK_FEED_WW4B3",
|
||||
"CLK_FEED_WW4C0",
|
||||
"CLK_FEED_WW4C1",
|
||||
"CLK_FEED_WW4C2",
|
||||
"CLK_FEED_WW4C3",
|
||||
"CLK_FEED_WW4END0",
|
||||
"CLK_FEED_WW4END1",
|
||||
"CLK_FEED_WW4END2",
|
||||
"CLK_FEED_WW4END3",
|
||||
"CLK_PMV2_A0",
|
||||
"CLK_PMV2_A1",
|
||||
"CLK_PMV2_A2",
|
||||
"CLK_PMV2_EN",
|
||||
"CLK_PMV2_O",
|
||||
"CLK_PMV2_ODIV2",
|
||||
"CLK_PMV2_ODIV4",
|
||||
"CLK_PMV_BYP0_0",
|
||||
"CLK_PMV_BYP1_0",
|
||||
"CLK_PMV_BYP2_0",
|
||||
"CLK_PMV_BYP3_0",
|
||||
"CLK_PMV_BYP4_0",
|
||||
"CLK_PMV_BYP5_0",
|
||||
"CLK_PMV_BYP6_0",
|
||||
"CLK_PMV_BYP7_0",
|
||||
"CLK_PMV_CLK0_0",
|
||||
"CLK_PMV_CLK1_0",
|
||||
"CLK_PMV_CTRL0_0",
|
||||
"CLK_PMV_CTRL1_0",
|
||||
"CLK_PMV_FAN0_0",
|
||||
"CLK_PMV_FAN1_0",
|
||||
"CLK_PMV_FAN2_0",
|
||||
"CLK_PMV_FAN3_0",
|
||||
"CLK_PMV_FAN4_0",
|
||||
"CLK_PMV_FAN5_0",
|
||||
"CLK_PMV_FAN6_0",
|
||||
"CLK_PMV_FAN7_0",
|
||||
"CLK_PMV_IMUX0_0",
|
||||
"CLK_PMV_IMUX10_0",
|
||||
"CLK_PMV_IMUX11_0",
|
||||
"CLK_PMV_IMUX12_0",
|
||||
"CLK_PMV_IMUX13_0",
|
||||
"CLK_PMV_IMUX14_0",
|
||||
"CLK_PMV_IMUX15_0",
|
||||
"CLK_PMV_IMUX16_0",
|
||||
"CLK_PMV_IMUX17_0",
|
||||
"CLK_PMV_IMUX18_0",
|
||||
"CLK_PMV_IMUX19_0",
|
||||
"CLK_PMV_IMUX1_0",
|
||||
"CLK_PMV_IMUX20_0",
|
||||
"CLK_PMV_IMUX21_0",
|
||||
"CLK_PMV_IMUX22_0",
|
||||
"CLK_PMV_IMUX23_0",
|
||||
"CLK_PMV_IMUX24_0",
|
||||
"CLK_PMV_IMUX25_0",
|
||||
"CLK_PMV_IMUX26_0",
|
||||
"CLK_PMV_IMUX27_0",
|
||||
"CLK_PMV_IMUX28_0",
|
||||
"CLK_PMV_IMUX29_0",
|
||||
"CLK_PMV_IMUX2_0",
|
||||
"CLK_PMV_IMUX30_0",
|
||||
"CLK_PMV_IMUX31_0",
|
||||
"CLK_PMV_IMUX32_0",
|
||||
"CLK_PMV_IMUX33_0",
|
||||
"CLK_PMV_IMUX34_0",
|
||||
"CLK_PMV_IMUX35_0",
|
||||
"CLK_PMV_IMUX36_0",
|
||||
"CLK_PMV_IMUX37_0",
|
||||
"CLK_PMV_IMUX38_0",
|
||||
"CLK_PMV_IMUX39_0",
|
||||
"CLK_PMV_IMUX3_0",
|
||||
"CLK_PMV_IMUX40_0",
|
||||
"CLK_PMV_IMUX41_0",
|
||||
"CLK_PMV_IMUX42_0",
|
||||
"CLK_PMV_IMUX43_0",
|
||||
"CLK_PMV_IMUX44_0",
|
||||
"CLK_PMV_IMUX45_0",
|
||||
"CLK_PMV_IMUX46_0",
|
||||
"CLK_PMV_IMUX47_0",
|
||||
"CLK_PMV_IMUX4_0",
|
||||
"CLK_PMV_IMUX5_0",
|
||||
"CLK_PMV_IMUX6_0",
|
||||
"CLK_PMV_IMUX7_0",
|
||||
"CLK_PMV_IMUX8_0",
|
||||
"CLK_PMV_IMUX9_0",
|
||||
"CLK_PMV_LOGIC_OUTS0_0",
|
||||
"CLK_PMV_LOGIC_OUTS10_0",
|
||||
"CLK_PMV_LOGIC_OUTS11_0",
|
||||
"CLK_PMV_LOGIC_OUTS12_0",
|
||||
"CLK_PMV_LOGIC_OUTS13_0",
|
||||
"CLK_PMV_LOGIC_OUTS14_0",
|
||||
"CLK_PMV_LOGIC_OUTS15_0",
|
||||
"CLK_PMV_LOGIC_OUTS16_0",
|
||||
"CLK_PMV_LOGIC_OUTS17_0",
|
||||
"CLK_PMV_LOGIC_OUTS18_0",
|
||||
"CLK_PMV_LOGIC_OUTS19_0",
|
||||
"CLK_PMV_LOGIC_OUTS1_0",
|
||||
"CLK_PMV_LOGIC_OUTS20_0",
|
||||
"CLK_PMV_LOGIC_OUTS21_0",
|
||||
"CLK_PMV_LOGIC_OUTS22_0",
|
||||
"CLK_PMV_LOGIC_OUTS23_0",
|
||||
"CLK_PMV_LOGIC_OUTS2_0",
|
||||
"CLK_PMV_LOGIC_OUTS3_0",
|
||||
"CLK_PMV_LOGIC_OUTS4_0",
|
||||
"CLK_PMV_LOGIC_OUTS5_0",
|
||||
"CLK_PMV_LOGIC_OUTS6_0",
|
||||
"CLK_PMV_LOGIC_OUTS7_0",
|
||||
"CLK_PMV_LOGIC_OUTS8_0",
|
||||
"CLK_PMV_LOGIC_OUTS9_0"
|
||||
]
|
||||
"wires": {
|
||||
"CLK_FEED_CK_BUFG_CASC0": null,
|
||||
"CLK_FEED_CK_BUFG_CASC1": null,
|
||||
"CLK_FEED_CK_BUFG_CASC10": null,
|
||||
"CLK_FEED_CK_BUFG_CASC11": null,
|
||||
"CLK_FEED_CK_BUFG_CASC12": null,
|
||||
"CLK_FEED_CK_BUFG_CASC13": null,
|
||||
"CLK_FEED_CK_BUFG_CASC14": null,
|
||||
"CLK_FEED_CK_BUFG_CASC15": null,
|
||||
"CLK_FEED_CK_BUFG_CASC16": null,
|
||||
"CLK_FEED_CK_BUFG_CASC17": null,
|
||||
"CLK_FEED_CK_BUFG_CASC18": null,
|
||||
"CLK_FEED_CK_BUFG_CASC19": null,
|
||||
"CLK_FEED_CK_BUFG_CASC2": null,
|
||||
"CLK_FEED_CK_BUFG_CASC20": null,
|
||||
"CLK_FEED_CK_BUFG_CASC21": null,
|
||||
"CLK_FEED_CK_BUFG_CASC22": null,
|
||||
"CLK_FEED_CK_BUFG_CASC23": null,
|
||||
"CLK_FEED_CK_BUFG_CASC24": null,
|
||||
"CLK_FEED_CK_BUFG_CASC25": null,
|
||||
"CLK_FEED_CK_BUFG_CASC26": null,
|
||||
"CLK_FEED_CK_BUFG_CASC27": null,
|
||||
"CLK_FEED_CK_BUFG_CASC28": null,
|
||||
"CLK_FEED_CK_BUFG_CASC29": null,
|
||||
"CLK_FEED_CK_BUFG_CASC3": null,
|
||||
"CLK_FEED_CK_BUFG_CASC30": null,
|
||||
"CLK_FEED_CK_BUFG_CASC31": null,
|
||||
"CLK_FEED_CK_BUFG_CASC4": null,
|
||||
"CLK_FEED_CK_BUFG_CASC5": null,
|
||||
"CLK_FEED_CK_BUFG_CASC6": null,
|
||||
"CLK_FEED_CK_BUFG_CASC7": null,
|
||||
"CLK_FEED_CK_BUFG_CASC8": null,
|
||||
"CLK_FEED_CK_BUFG_CASC9": null,
|
||||
"CLK_FEED_CK_GCLK0": null,
|
||||
"CLK_FEED_CK_GCLK1": null,
|
||||
"CLK_FEED_CK_GCLK10": null,
|
||||
"CLK_FEED_CK_GCLK11": null,
|
||||
"CLK_FEED_CK_GCLK12": null,
|
||||
"CLK_FEED_CK_GCLK13": null,
|
||||
"CLK_FEED_CK_GCLK14": null,
|
||||
"CLK_FEED_CK_GCLK15": null,
|
||||
"CLK_FEED_CK_GCLK16": null,
|
||||
"CLK_FEED_CK_GCLK17": null,
|
||||
"CLK_FEED_CK_GCLK18": null,
|
||||
"CLK_FEED_CK_GCLK19": null,
|
||||
"CLK_FEED_CK_GCLK2": null,
|
||||
"CLK_FEED_CK_GCLK20": null,
|
||||
"CLK_FEED_CK_GCLK21": null,
|
||||
"CLK_FEED_CK_GCLK22": null,
|
||||
"CLK_FEED_CK_GCLK23": null,
|
||||
"CLK_FEED_CK_GCLK24": null,
|
||||
"CLK_FEED_CK_GCLK25": null,
|
||||
"CLK_FEED_CK_GCLK26": null,
|
||||
"CLK_FEED_CK_GCLK27": null,
|
||||
"CLK_FEED_CK_GCLK28": null,
|
||||
"CLK_FEED_CK_GCLK29": null,
|
||||
"CLK_FEED_CK_GCLK3": null,
|
||||
"CLK_FEED_CK_GCLK30": null,
|
||||
"CLK_FEED_CK_GCLK31": null,
|
||||
"CLK_FEED_CK_GCLK4": null,
|
||||
"CLK_FEED_CK_GCLK5": null,
|
||||
"CLK_FEED_CK_GCLK6": null,
|
||||
"CLK_FEED_CK_GCLK7": null,
|
||||
"CLK_FEED_CK_GCLK8": null,
|
||||
"CLK_FEED_CK_GCLK9": null,
|
||||
"CLK_FEED_EE2A0": null,
|
||||
"CLK_FEED_EE2A1": null,
|
||||
"CLK_FEED_EE2A2": null,
|
||||
"CLK_FEED_EE2A3": null,
|
||||
"CLK_FEED_EE2BEG0": null,
|
||||
"CLK_FEED_EE2BEG1": null,
|
||||
"CLK_FEED_EE2BEG2": null,
|
||||
"CLK_FEED_EE2BEG3": null,
|
||||
"CLK_FEED_EE4A0": null,
|
||||
"CLK_FEED_EE4A1": null,
|
||||
"CLK_FEED_EE4A2": null,
|
||||
"CLK_FEED_EE4A3": null,
|
||||
"CLK_FEED_EE4B0": null,
|
||||
"CLK_FEED_EE4B1": null,
|
||||
"CLK_FEED_EE4B2": null,
|
||||
"CLK_FEED_EE4B3": null,
|
||||
"CLK_FEED_EE4BEG0": null,
|
||||
"CLK_FEED_EE4BEG1": null,
|
||||
"CLK_FEED_EE4BEG2": null,
|
||||
"CLK_FEED_EE4BEG3": null,
|
||||
"CLK_FEED_EE4C0": null,
|
||||
"CLK_FEED_EE4C1": null,
|
||||
"CLK_FEED_EE4C2": null,
|
||||
"CLK_FEED_EE4C3": null,
|
||||
"CLK_FEED_EL1BEG0": null,
|
||||
"CLK_FEED_EL1BEG1": null,
|
||||
"CLK_FEED_EL1BEG2": null,
|
||||
"CLK_FEED_EL1BEG3": null,
|
||||
"CLK_FEED_ER1BEG0": null,
|
||||
"CLK_FEED_ER1BEG1": null,
|
||||
"CLK_FEED_ER1BEG2": null,
|
||||
"CLK_FEED_ER1BEG3": null,
|
||||
"CLK_FEED_LH1": null,
|
||||
"CLK_FEED_LH10": null,
|
||||
"CLK_FEED_LH11": null,
|
||||
"CLK_FEED_LH12": null,
|
||||
"CLK_FEED_LH2": null,
|
||||
"CLK_FEED_LH3": null,
|
||||
"CLK_FEED_LH4": null,
|
||||
"CLK_FEED_LH5": null,
|
||||
"CLK_FEED_LH6": null,
|
||||
"CLK_FEED_LH7": null,
|
||||
"CLK_FEED_LH8": null,
|
||||
"CLK_FEED_LH9": null,
|
||||
"CLK_FEED_MONITOR_N": null,
|
||||
"CLK_FEED_MONITOR_P": null,
|
||||
"CLK_FEED_NE2A0": null,
|
||||
"CLK_FEED_NE2A1": null,
|
||||
"CLK_FEED_NE2A2": null,
|
||||
"CLK_FEED_NE2A3": null,
|
||||
"CLK_FEED_NE4BEG0": null,
|
||||
"CLK_FEED_NE4BEG1": null,
|
||||
"CLK_FEED_NE4BEG2": null,
|
||||
"CLK_FEED_NE4BEG3": null,
|
||||
"CLK_FEED_NE4C0": null,
|
||||
"CLK_FEED_NE4C1": null,
|
||||
"CLK_FEED_NE4C2": null,
|
||||
"CLK_FEED_NE4C3": null,
|
||||
"CLK_FEED_NW2A0": null,
|
||||
"CLK_FEED_NW2A1": null,
|
||||
"CLK_FEED_NW2A2": null,
|
||||
"CLK_FEED_NW2A3": null,
|
||||
"CLK_FEED_NW4A0": null,
|
||||
"CLK_FEED_NW4A1": null,
|
||||
"CLK_FEED_NW4A2": null,
|
||||
"CLK_FEED_NW4A3": null,
|
||||
"CLK_FEED_NW4END0": null,
|
||||
"CLK_FEED_NW4END1": null,
|
||||
"CLK_FEED_NW4END2": null,
|
||||
"CLK_FEED_NW4END3": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC0": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC1": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC10": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC11": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC12": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC13": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC14": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC15": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC16": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC17": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC18": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC19": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC2": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC20": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC21": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC22": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC23": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC24": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC25": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC26": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC27": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC28": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC29": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC3": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC30": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC31": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC4": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC5": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC6": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC7": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC8": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC9": null,
|
||||
"CLK_FEED_R_CK_GCLK0": null,
|
||||
"CLK_FEED_R_CK_GCLK1": null,
|
||||
"CLK_FEED_R_CK_GCLK10": null,
|
||||
"CLK_FEED_R_CK_GCLK11": null,
|
||||
"CLK_FEED_R_CK_GCLK12": null,
|
||||
"CLK_FEED_R_CK_GCLK13": null,
|
||||
"CLK_FEED_R_CK_GCLK14": null,
|
||||
"CLK_FEED_R_CK_GCLK15": null,
|
||||
"CLK_FEED_R_CK_GCLK16": null,
|
||||
"CLK_FEED_R_CK_GCLK17": null,
|
||||
"CLK_FEED_R_CK_GCLK18": null,
|
||||
"CLK_FEED_R_CK_GCLK19": null,
|
||||
"CLK_FEED_R_CK_GCLK2": null,
|
||||
"CLK_FEED_R_CK_GCLK20": null,
|
||||
"CLK_FEED_R_CK_GCLK21": null,
|
||||
"CLK_FEED_R_CK_GCLK22": null,
|
||||
"CLK_FEED_R_CK_GCLK23": null,
|
||||
"CLK_FEED_R_CK_GCLK24": null,
|
||||
"CLK_FEED_R_CK_GCLK25": null,
|
||||
"CLK_FEED_R_CK_GCLK26": null,
|
||||
"CLK_FEED_R_CK_GCLK27": null,
|
||||
"CLK_FEED_R_CK_GCLK28": null,
|
||||
"CLK_FEED_R_CK_GCLK29": null,
|
||||
"CLK_FEED_R_CK_GCLK3": null,
|
||||
"CLK_FEED_R_CK_GCLK30": null,
|
||||
"CLK_FEED_R_CK_GCLK31": null,
|
||||
"CLK_FEED_R_CK_GCLK4": null,
|
||||
"CLK_FEED_R_CK_GCLK5": null,
|
||||
"CLK_FEED_R_CK_GCLK6": null,
|
||||
"CLK_FEED_R_CK_GCLK7": null,
|
||||
"CLK_FEED_R_CK_GCLK8": null,
|
||||
"CLK_FEED_R_CK_GCLK9": null,
|
||||
"CLK_FEED_SE2A0": null,
|
||||
"CLK_FEED_SE2A1": null,
|
||||
"CLK_FEED_SE2A2": null,
|
||||
"CLK_FEED_SE2A3": null,
|
||||
"CLK_FEED_SE4BEG0": null,
|
||||
"CLK_FEED_SE4BEG1": null,
|
||||
"CLK_FEED_SE4BEG2": null,
|
||||
"CLK_FEED_SE4BEG3": null,
|
||||
"CLK_FEED_SE4C0": null,
|
||||
"CLK_FEED_SE4C1": null,
|
||||
"CLK_FEED_SE4C2": null,
|
||||
"CLK_FEED_SE4C3": null,
|
||||
"CLK_FEED_SW2A0": null,
|
||||
"CLK_FEED_SW2A1": null,
|
||||
"CLK_FEED_SW2A2": null,
|
||||
"CLK_FEED_SW2A3": null,
|
||||
"CLK_FEED_SW4A0": null,
|
||||
"CLK_FEED_SW4A1": null,
|
||||
"CLK_FEED_SW4A2": null,
|
||||
"CLK_FEED_SW4A3": null,
|
||||
"CLK_FEED_SW4END0": null,
|
||||
"CLK_FEED_SW4END1": null,
|
||||
"CLK_FEED_SW4END2": null,
|
||||
"CLK_FEED_SW4END3": null,
|
||||
"CLK_FEED_WL1END0": null,
|
||||
"CLK_FEED_WL1END1": null,
|
||||
"CLK_FEED_WL1END2": null,
|
||||
"CLK_FEED_WL1END3": null,
|
||||
"CLK_FEED_WR1END0": null,
|
||||
"CLK_FEED_WR1END1": null,
|
||||
"CLK_FEED_WR1END2": null,
|
||||
"CLK_FEED_WR1END3": null,
|
||||
"CLK_FEED_WW2A0": null,
|
||||
"CLK_FEED_WW2A1": null,
|
||||
"CLK_FEED_WW2A2": null,
|
||||
"CLK_FEED_WW2A3": null,
|
||||
"CLK_FEED_WW2END0": null,
|
||||
"CLK_FEED_WW2END1": null,
|
||||
"CLK_FEED_WW2END2": null,
|
||||
"CLK_FEED_WW2END3": null,
|
||||
"CLK_FEED_WW4A0": null,
|
||||
"CLK_FEED_WW4A1": null,
|
||||
"CLK_FEED_WW4A2": null,
|
||||
"CLK_FEED_WW4A3": null,
|
||||
"CLK_FEED_WW4B0": null,
|
||||
"CLK_FEED_WW4B1": null,
|
||||
"CLK_FEED_WW4B2": null,
|
||||
"CLK_FEED_WW4B3": null,
|
||||
"CLK_FEED_WW4C0": null,
|
||||
"CLK_FEED_WW4C1": null,
|
||||
"CLK_FEED_WW4C2": null,
|
||||
"CLK_FEED_WW4C3": null,
|
||||
"CLK_FEED_WW4END0": null,
|
||||
"CLK_FEED_WW4END1": null,
|
||||
"CLK_FEED_WW4END2": null,
|
||||
"CLK_FEED_WW4END3": null,
|
||||
"CLK_PMV2_A0": null,
|
||||
"CLK_PMV2_A1": null,
|
||||
"CLK_PMV2_A2": null,
|
||||
"CLK_PMV2_EN": null,
|
||||
"CLK_PMV2_O": null,
|
||||
"CLK_PMV2_ODIV2": null,
|
||||
"CLK_PMV2_ODIV4": null,
|
||||
"CLK_PMV_BYP0_0": null,
|
||||
"CLK_PMV_BYP1_0": null,
|
||||
"CLK_PMV_BYP2_0": null,
|
||||
"CLK_PMV_BYP3_0": null,
|
||||
"CLK_PMV_BYP4_0": null,
|
||||
"CLK_PMV_BYP5_0": null,
|
||||
"CLK_PMV_BYP6_0": null,
|
||||
"CLK_PMV_BYP7_0": null,
|
||||
"CLK_PMV_CLK0_0": null,
|
||||
"CLK_PMV_CLK1_0": null,
|
||||
"CLK_PMV_CTRL0_0": null,
|
||||
"CLK_PMV_CTRL1_0": null,
|
||||
"CLK_PMV_FAN0_0": null,
|
||||
"CLK_PMV_FAN1_0": null,
|
||||
"CLK_PMV_FAN2_0": null,
|
||||
"CLK_PMV_FAN3_0": null,
|
||||
"CLK_PMV_FAN4_0": null,
|
||||
"CLK_PMV_FAN5_0": null,
|
||||
"CLK_PMV_FAN6_0": null,
|
||||
"CLK_PMV_FAN7_0": null,
|
||||
"CLK_PMV_IMUX0_0": null,
|
||||
"CLK_PMV_IMUX10_0": null,
|
||||
"CLK_PMV_IMUX11_0": null,
|
||||
"CLK_PMV_IMUX12_0": null,
|
||||
"CLK_PMV_IMUX13_0": null,
|
||||
"CLK_PMV_IMUX14_0": null,
|
||||
"CLK_PMV_IMUX15_0": null,
|
||||
"CLK_PMV_IMUX16_0": null,
|
||||
"CLK_PMV_IMUX17_0": null,
|
||||
"CLK_PMV_IMUX18_0": null,
|
||||
"CLK_PMV_IMUX19_0": null,
|
||||
"CLK_PMV_IMUX1_0": null,
|
||||
"CLK_PMV_IMUX20_0": null,
|
||||
"CLK_PMV_IMUX21_0": null,
|
||||
"CLK_PMV_IMUX22_0": null,
|
||||
"CLK_PMV_IMUX23_0": null,
|
||||
"CLK_PMV_IMUX24_0": null,
|
||||
"CLK_PMV_IMUX25_0": null,
|
||||
"CLK_PMV_IMUX26_0": null,
|
||||
"CLK_PMV_IMUX27_0": null,
|
||||
"CLK_PMV_IMUX28_0": null,
|
||||
"CLK_PMV_IMUX29_0": null,
|
||||
"CLK_PMV_IMUX2_0": null,
|
||||
"CLK_PMV_IMUX30_0": null,
|
||||
"CLK_PMV_IMUX31_0": null,
|
||||
"CLK_PMV_IMUX32_0": null,
|
||||
"CLK_PMV_IMUX33_0": null,
|
||||
"CLK_PMV_IMUX34_0": null,
|
||||
"CLK_PMV_IMUX35_0": null,
|
||||
"CLK_PMV_IMUX36_0": null,
|
||||
"CLK_PMV_IMUX37_0": null,
|
||||
"CLK_PMV_IMUX38_0": null,
|
||||
"CLK_PMV_IMUX39_0": null,
|
||||
"CLK_PMV_IMUX3_0": null,
|
||||
"CLK_PMV_IMUX40_0": null,
|
||||
"CLK_PMV_IMUX41_0": null,
|
||||
"CLK_PMV_IMUX42_0": null,
|
||||
"CLK_PMV_IMUX43_0": null,
|
||||
"CLK_PMV_IMUX44_0": null,
|
||||
"CLK_PMV_IMUX45_0": null,
|
||||
"CLK_PMV_IMUX46_0": null,
|
||||
"CLK_PMV_IMUX47_0": null,
|
||||
"CLK_PMV_IMUX4_0": null,
|
||||
"CLK_PMV_IMUX5_0": null,
|
||||
"CLK_PMV_IMUX6_0": null,
|
||||
"CLK_PMV_IMUX7_0": null,
|
||||
"CLK_PMV_IMUX8_0": null,
|
||||
"CLK_PMV_IMUX9_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS0_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS10_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS11_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS12_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS13_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS14_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS15_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS16_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS17_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS18_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS19_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS1_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS20_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS21_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS22_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS23_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS2_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS3_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS4_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS5_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS6_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS7_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS8_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS9_0": null
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,358 +2,358 @@
|
|||
"pips": {},
|
||||
"sites": [],
|
||||
"tile_type": "CLK_PMVIOB",
|
||||
"wires": [
|
||||
"CLK_FEED_CK_BUFG_CASC0",
|
||||
"CLK_FEED_CK_BUFG_CASC1",
|
||||
"CLK_FEED_CK_BUFG_CASC10",
|
||||
"CLK_FEED_CK_BUFG_CASC11",
|
||||
"CLK_FEED_CK_BUFG_CASC12",
|
||||
"CLK_FEED_CK_BUFG_CASC13",
|
||||
"CLK_FEED_CK_BUFG_CASC14",
|
||||
"CLK_FEED_CK_BUFG_CASC15",
|
||||
"CLK_FEED_CK_BUFG_CASC16",
|
||||
"CLK_FEED_CK_BUFG_CASC17",
|
||||
"CLK_FEED_CK_BUFG_CASC18",
|
||||
"CLK_FEED_CK_BUFG_CASC19",
|
||||
"CLK_FEED_CK_BUFG_CASC2",
|
||||
"CLK_FEED_CK_BUFG_CASC20",
|
||||
"CLK_FEED_CK_BUFG_CASC21",
|
||||
"CLK_FEED_CK_BUFG_CASC22",
|
||||
"CLK_FEED_CK_BUFG_CASC23",
|
||||
"CLK_FEED_CK_BUFG_CASC24",
|
||||
"CLK_FEED_CK_BUFG_CASC25",
|
||||
"CLK_FEED_CK_BUFG_CASC26",
|
||||
"CLK_FEED_CK_BUFG_CASC27",
|
||||
"CLK_FEED_CK_BUFG_CASC28",
|
||||
"CLK_FEED_CK_BUFG_CASC29",
|
||||
"CLK_FEED_CK_BUFG_CASC3",
|
||||
"CLK_FEED_CK_BUFG_CASC30",
|
||||
"CLK_FEED_CK_BUFG_CASC31",
|
||||
"CLK_FEED_CK_BUFG_CASC4",
|
||||
"CLK_FEED_CK_BUFG_CASC5",
|
||||
"CLK_FEED_CK_BUFG_CASC6",
|
||||
"CLK_FEED_CK_BUFG_CASC7",
|
||||
"CLK_FEED_CK_BUFG_CASC8",
|
||||
"CLK_FEED_CK_BUFG_CASC9",
|
||||
"CLK_FEED_CK_GCLK0",
|
||||
"CLK_FEED_CK_GCLK1",
|
||||
"CLK_FEED_CK_GCLK10",
|
||||
"CLK_FEED_CK_GCLK11",
|
||||
"CLK_FEED_CK_GCLK12",
|
||||
"CLK_FEED_CK_GCLK13",
|
||||
"CLK_FEED_CK_GCLK14",
|
||||
"CLK_FEED_CK_GCLK15",
|
||||
"CLK_FEED_CK_GCLK16",
|
||||
"CLK_FEED_CK_GCLK17",
|
||||
"CLK_FEED_CK_GCLK18",
|
||||
"CLK_FEED_CK_GCLK19",
|
||||
"CLK_FEED_CK_GCLK2",
|
||||
"CLK_FEED_CK_GCLK20",
|
||||
"CLK_FEED_CK_GCLK21",
|
||||
"CLK_FEED_CK_GCLK22",
|
||||
"CLK_FEED_CK_GCLK23",
|
||||
"CLK_FEED_CK_GCLK24",
|
||||
"CLK_FEED_CK_GCLK25",
|
||||
"CLK_FEED_CK_GCLK26",
|
||||
"CLK_FEED_CK_GCLK27",
|
||||
"CLK_FEED_CK_GCLK28",
|
||||
"CLK_FEED_CK_GCLK29",
|
||||
"CLK_FEED_CK_GCLK3",
|
||||
"CLK_FEED_CK_GCLK30",
|
||||
"CLK_FEED_CK_GCLK31",
|
||||
"CLK_FEED_CK_GCLK4",
|
||||
"CLK_FEED_CK_GCLK5",
|
||||
"CLK_FEED_CK_GCLK6",
|
||||
"CLK_FEED_CK_GCLK7",
|
||||
"CLK_FEED_CK_GCLK8",
|
||||
"CLK_FEED_CK_GCLK9",
|
||||
"CLK_FEED_EE2A0",
|
||||
"CLK_FEED_EE2A1",
|
||||
"CLK_FEED_EE2A2",
|
||||
"CLK_FEED_EE2A3",
|
||||
"CLK_FEED_EE2BEG0",
|
||||
"CLK_FEED_EE2BEG1",
|
||||
"CLK_FEED_EE2BEG2",
|
||||
"CLK_FEED_EE2BEG3",
|
||||
"CLK_FEED_EE4A0",
|
||||
"CLK_FEED_EE4A1",
|
||||
"CLK_FEED_EE4A2",
|
||||
"CLK_FEED_EE4A3",
|
||||
"CLK_FEED_EE4B0",
|
||||
"CLK_FEED_EE4B1",
|
||||
"CLK_FEED_EE4B2",
|
||||
"CLK_FEED_EE4B3",
|
||||
"CLK_FEED_EE4BEG0",
|
||||
"CLK_FEED_EE4BEG1",
|
||||
"CLK_FEED_EE4BEG2",
|
||||
"CLK_FEED_EE4BEG3",
|
||||
"CLK_FEED_EE4C0",
|
||||
"CLK_FEED_EE4C1",
|
||||
"CLK_FEED_EE4C2",
|
||||
"CLK_FEED_EE4C3",
|
||||
"CLK_FEED_EL1BEG0",
|
||||
"CLK_FEED_EL1BEG1",
|
||||
"CLK_FEED_EL1BEG2",
|
||||
"CLK_FEED_EL1BEG3",
|
||||
"CLK_FEED_ER1BEG0",
|
||||
"CLK_FEED_ER1BEG1",
|
||||
"CLK_FEED_ER1BEG2",
|
||||
"CLK_FEED_ER1BEG3",
|
||||
"CLK_FEED_LH1",
|
||||
"CLK_FEED_LH10",
|
||||
"CLK_FEED_LH11",
|
||||
"CLK_FEED_LH12",
|
||||
"CLK_FEED_LH2",
|
||||
"CLK_FEED_LH3",
|
||||
"CLK_FEED_LH4",
|
||||
"CLK_FEED_LH5",
|
||||
"CLK_FEED_LH6",
|
||||
"CLK_FEED_LH7",
|
||||
"CLK_FEED_LH8",
|
||||
"CLK_FEED_LH9",
|
||||
"CLK_FEED_MONITOR_N",
|
||||
"CLK_FEED_MONITOR_P",
|
||||
"CLK_FEED_NE2A0",
|
||||
"CLK_FEED_NE2A1",
|
||||
"CLK_FEED_NE2A2",
|
||||
"CLK_FEED_NE2A3",
|
||||
"CLK_FEED_NE4BEG0",
|
||||
"CLK_FEED_NE4BEG1",
|
||||
"CLK_FEED_NE4BEG2",
|
||||
"CLK_FEED_NE4BEG3",
|
||||
"CLK_FEED_NE4C0",
|
||||
"CLK_FEED_NE4C1",
|
||||
"CLK_FEED_NE4C2",
|
||||
"CLK_FEED_NE4C3",
|
||||
"CLK_FEED_NW2A0",
|
||||
"CLK_FEED_NW2A1",
|
||||
"CLK_FEED_NW2A2",
|
||||
"CLK_FEED_NW2A3",
|
||||
"CLK_FEED_NW4A0",
|
||||
"CLK_FEED_NW4A1",
|
||||
"CLK_FEED_NW4A2",
|
||||
"CLK_FEED_NW4A3",
|
||||
"CLK_FEED_NW4END0",
|
||||
"CLK_FEED_NW4END1",
|
||||
"CLK_FEED_NW4END2",
|
||||
"CLK_FEED_NW4END3",
|
||||
"CLK_FEED_R_CK_BUFG_CASC0",
|
||||
"CLK_FEED_R_CK_BUFG_CASC1",
|
||||
"CLK_FEED_R_CK_BUFG_CASC10",
|
||||
"CLK_FEED_R_CK_BUFG_CASC11",
|
||||
"CLK_FEED_R_CK_BUFG_CASC12",
|
||||
"CLK_FEED_R_CK_BUFG_CASC13",
|
||||
"CLK_FEED_R_CK_BUFG_CASC14",
|
||||
"CLK_FEED_R_CK_BUFG_CASC15",
|
||||
"CLK_FEED_R_CK_BUFG_CASC16",
|
||||
"CLK_FEED_R_CK_BUFG_CASC17",
|
||||
"CLK_FEED_R_CK_BUFG_CASC18",
|
||||
"CLK_FEED_R_CK_BUFG_CASC19",
|
||||
"CLK_FEED_R_CK_BUFG_CASC2",
|
||||
"CLK_FEED_R_CK_BUFG_CASC20",
|
||||
"CLK_FEED_R_CK_BUFG_CASC21",
|
||||
"CLK_FEED_R_CK_BUFG_CASC22",
|
||||
"CLK_FEED_R_CK_BUFG_CASC23",
|
||||
"CLK_FEED_R_CK_BUFG_CASC24",
|
||||
"CLK_FEED_R_CK_BUFG_CASC25",
|
||||
"CLK_FEED_R_CK_BUFG_CASC26",
|
||||
"CLK_FEED_R_CK_BUFG_CASC27",
|
||||
"CLK_FEED_R_CK_BUFG_CASC28",
|
||||
"CLK_FEED_R_CK_BUFG_CASC29",
|
||||
"CLK_FEED_R_CK_BUFG_CASC3",
|
||||
"CLK_FEED_R_CK_BUFG_CASC30",
|
||||
"CLK_FEED_R_CK_BUFG_CASC31",
|
||||
"CLK_FEED_R_CK_BUFG_CASC4",
|
||||
"CLK_FEED_R_CK_BUFG_CASC5",
|
||||
"CLK_FEED_R_CK_BUFG_CASC6",
|
||||
"CLK_FEED_R_CK_BUFG_CASC7",
|
||||
"CLK_FEED_R_CK_BUFG_CASC8",
|
||||
"CLK_FEED_R_CK_BUFG_CASC9",
|
||||
"CLK_FEED_R_CK_GCLK0",
|
||||
"CLK_FEED_R_CK_GCLK1",
|
||||
"CLK_FEED_R_CK_GCLK10",
|
||||
"CLK_FEED_R_CK_GCLK11",
|
||||
"CLK_FEED_R_CK_GCLK12",
|
||||
"CLK_FEED_R_CK_GCLK13",
|
||||
"CLK_FEED_R_CK_GCLK14",
|
||||
"CLK_FEED_R_CK_GCLK15",
|
||||
"CLK_FEED_R_CK_GCLK16",
|
||||
"CLK_FEED_R_CK_GCLK17",
|
||||
"CLK_FEED_R_CK_GCLK18",
|
||||
"CLK_FEED_R_CK_GCLK19",
|
||||
"CLK_FEED_R_CK_GCLK2",
|
||||
"CLK_FEED_R_CK_GCLK20",
|
||||
"CLK_FEED_R_CK_GCLK21",
|
||||
"CLK_FEED_R_CK_GCLK22",
|
||||
"CLK_FEED_R_CK_GCLK23",
|
||||
"CLK_FEED_R_CK_GCLK24",
|
||||
"CLK_FEED_R_CK_GCLK25",
|
||||
"CLK_FEED_R_CK_GCLK26",
|
||||
"CLK_FEED_R_CK_GCLK27",
|
||||
"CLK_FEED_R_CK_GCLK28",
|
||||
"CLK_FEED_R_CK_GCLK29",
|
||||
"CLK_FEED_R_CK_GCLK3",
|
||||
"CLK_FEED_R_CK_GCLK30",
|
||||
"CLK_FEED_R_CK_GCLK31",
|
||||
"CLK_FEED_R_CK_GCLK4",
|
||||
"CLK_FEED_R_CK_GCLK5",
|
||||
"CLK_FEED_R_CK_GCLK6",
|
||||
"CLK_FEED_R_CK_GCLK7",
|
||||
"CLK_FEED_R_CK_GCLK8",
|
||||
"CLK_FEED_R_CK_GCLK9",
|
||||
"CLK_FEED_SE2A0",
|
||||
"CLK_FEED_SE2A1",
|
||||
"CLK_FEED_SE2A2",
|
||||
"CLK_FEED_SE2A3",
|
||||
"CLK_FEED_SE4BEG0",
|
||||
"CLK_FEED_SE4BEG1",
|
||||
"CLK_FEED_SE4BEG2",
|
||||
"CLK_FEED_SE4BEG3",
|
||||
"CLK_FEED_SE4C0",
|
||||
"CLK_FEED_SE4C1",
|
||||
"CLK_FEED_SE4C2",
|
||||
"CLK_FEED_SE4C3",
|
||||
"CLK_FEED_SW2A0",
|
||||
"CLK_FEED_SW2A1",
|
||||
"CLK_FEED_SW2A2",
|
||||
"CLK_FEED_SW2A3",
|
||||
"CLK_FEED_SW4A0",
|
||||
"CLK_FEED_SW4A1",
|
||||
"CLK_FEED_SW4A2",
|
||||
"CLK_FEED_SW4A3",
|
||||
"CLK_FEED_SW4END0",
|
||||
"CLK_FEED_SW4END1",
|
||||
"CLK_FEED_SW4END2",
|
||||
"CLK_FEED_SW4END3",
|
||||
"CLK_FEED_WL1END0",
|
||||
"CLK_FEED_WL1END1",
|
||||
"CLK_FEED_WL1END2",
|
||||
"CLK_FEED_WL1END3",
|
||||
"CLK_FEED_WR1END0",
|
||||
"CLK_FEED_WR1END1",
|
||||
"CLK_FEED_WR1END2",
|
||||
"CLK_FEED_WR1END3",
|
||||
"CLK_FEED_WW2A0",
|
||||
"CLK_FEED_WW2A1",
|
||||
"CLK_FEED_WW2A2",
|
||||
"CLK_FEED_WW2A3",
|
||||
"CLK_FEED_WW2END0",
|
||||
"CLK_FEED_WW2END1",
|
||||
"CLK_FEED_WW2END2",
|
||||
"CLK_FEED_WW2END3",
|
||||
"CLK_FEED_WW4A0",
|
||||
"CLK_FEED_WW4A1",
|
||||
"CLK_FEED_WW4A2",
|
||||
"CLK_FEED_WW4A3",
|
||||
"CLK_FEED_WW4B0",
|
||||
"CLK_FEED_WW4B1",
|
||||
"CLK_FEED_WW4B2",
|
||||
"CLK_FEED_WW4B3",
|
||||
"CLK_FEED_WW4C0",
|
||||
"CLK_FEED_WW4C1",
|
||||
"CLK_FEED_WW4C2",
|
||||
"CLK_FEED_WW4C3",
|
||||
"CLK_FEED_WW4END0",
|
||||
"CLK_FEED_WW4END1",
|
||||
"CLK_FEED_WW4END2",
|
||||
"CLK_FEED_WW4END3",
|
||||
"CLK_PMVIOB_A0",
|
||||
"CLK_PMVIOB_A1",
|
||||
"CLK_PMVIOB_EN",
|
||||
"CLK_PMVIOB_O",
|
||||
"CLK_PMVIOB_ODIV2",
|
||||
"CLK_PMVIOB_ODIV4",
|
||||
"CLK_PMV_BYP0_0",
|
||||
"CLK_PMV_BYP1_0",
|
||||
"CLK_PMV_BYP2_0",
|
||||
"CLK_PMV_BYP3_0",
|
||||
"CLK_PMV_BYP4_0",
|
||||
"CLK_PMV_BYP5_0",
|
||||
"CLK_PMV_BYP6_0",
|
||||
"CLK_PMV_BYP7_0",
|
||||
"CLK_PMV_CLK0_0",
|
||||
"CLK_PMV_CLK1_0",
|
||||
"CLK_PMV_CTRL0_0",
|
||||
"CLK_PMV_CTRL1_0",
|
||||
"CLK_PMV_FAN0_0",
|
||||
"CLK_PMV_FAN1_0",
|
||||
"CLK_PMV_FAN2_0",
|
||||
"CLK_PMV_FAN3_0",
|
||||
"CLK_PMV_FAN4_0",
|
||||
"CLK_PMV_FAN5_0",
|
||||
"CLK_PMV_FAN6_0",
|
||||
"CLK_PMV_FAN7_0",
|
||||
"CLK_PMV_IMUX0_0",
|
||||
"CLK_PMV_IMUX10_0",
|
||||
"CLK_PMV_IMUX11_0",
|
||||
"CLK_PMV_IMUX12_0",
|
||||
"CLK_PMV_IMUX13_0",
|
||||
"CLK_PMV_IMUX14_0",
|
||||
"CLK_PMV_IMUX15_0",
|
||||
"CLK_PMV_IMUX16_0",
|
||||
"CLK_PMV_IMUX17_0",
|
||||
"CLK_PMV_IMUX18_0",
|
||||
"CLK_PMV_IMUX19_0",
|
||||
"CLK_PMV_IMUX1_0",
|
||||
"CLK_PMV_IMUX20_0",
|
||||
"CLK_PMV_IMUX21_0",
|
||||
"CLK_PMV_IMUX22_0",
|
||||
"CLK_PMV_IMUX23_0",
|
||||
"CLK_PMV_IMUX24_0",
|
||||
"CLK_PMV_IMUX25_0",
|
||||
"CLK_PMV_IMUX26_0",
|
||||
"CLK_PMV_IMUX27_0",
|
||||
"CLK_PMV_IMUX28_0",
|
||||
"CLK_PMV_IMUX29_0",
|
||||
"CLK_PMV_IMUX2_0",
|
||||
"CLK_PMV_IMUX30_0",
|
||||
"CLK_PMV_IMUX31_0",
|
||||
"CLK_PMV_IMUX32_0",
|
||||
"CLK_PMV_IMUX33_0",
|
||||
"CLK_PMV_IMUX34_0",
|
||||
"CLK_PMV_IMUX35_0",
|
||||
"CLK_PMV_IMUX36_0",
|
||||
"CLK_PMV_IMUX37_0",
|
||||
"CLK_PMV_IMUX38_0",
|
||||
"CLK_PMV_IMUX39_0",
|
||||
"CLK_PMV_IMUX3_0",
|
||||
"CLK_PMV_IMUX40_0",
|
||||
"CLK_PMV_IMUX41_0",
|
||||
"CLK_PMV_IMUX42_0",
|
||||
"CLK_PMV_IMUX43_0",
|
||||
"CLK_PMV_IMUX44_0",
|
||||
"CLK_PMV_IMUX45_0",
|
||||
"CLK_PMV_IMUX46_0",
|
||||
"CLK_PMV_IMUX47_0",
|
||||
"CLK_PMV_IMUX4_0",
|
||||
"CLK_PMV_IMUX5_0",
|
||||
"CLK_PMV_IMUX6_0",
|
||||
"CLK_PMV_IMUX7_0",
|
||||
"CLK_PMV_IMUX8_0",
|
||||
"CLK_PMV_IMUX9_0",
|
||||
"CLK_PMV_LOGIC_OUTS0_0",
|
||||
"CLK_PMV_LOGIC_OUTS10_0",
|
||||
"CLK_PMV_LOGIC_OUTS11_0",
|
||||
"CLK_PMV_LOGIC_OUTS12_0",
|
||||
"CLK_PMV_LOGIC_OUTS13_0",
|
||||
"CLK_PMV_LOGIC_OUTS14_0",
|
||||
"CLK_PMV_LOGIC_OUTS15_0",
|
||||
"CLK_PMV_LOGIC_OUTS16_0",
|
||||
"CLK_PMV_LOGIC_OUTS17_0",
|
||||
"CLK_PMV_LOGIC_OUTS18_0",
|
||||
"CLK_PMV_LOGIC_OUTS19_0",
|
||||
"CLK_PMV_LOGIC_OUTS1_0",
|
||||
"CLK_PMV_LOGIC_OUTS20_0",
|
||||
"CLK_PMV_LOGIC_OUTS21_0",
|
||||
"CLK_PMV_LOGIC_OUTS22_0",
|
||||
"CLK_PMV_LOGIC_OUTS23_0",
|
||||
"CLK_PMV_LOGIC_OUTS2_0",
|
||||
"CLK_PMV_LOGIC_OUTS3_0",
|
||||
"CLK_PMV_LOGIC_OUTS4_0",
|
||||
"CLK_PMV_LOGIC_OUTS5_0",
|
||||
"CLK_PMV_LOGIC_OUTS6_0",
|
||||
"CLK_PMV_LOGIC_OUTS7_0",
|
||||
"CLK_PMV_LOGIC_OUTS8_0",
|
||||
"CLK_PMV_LOGIC_OUTS9_0"
|
||||
]
|
||||
"wires": {
|
||||
"CLK_FEED_CK_BUFG_CASC0": null,
|
||||
"CLK_FEED_CK_BUFG_CASC1": null,
|
||||
"CLK_FEED_CK_BUFG_CASC10": null,
|
||||
"CLK_FEED_CK_BUFG_CASC11": null,
|
||||
"CLK_FEED_CK_BUFG_CASC12": null,
|
||||
"CLK_FEED_CK_BUFG_CASC13": null,
|
||||
"CLK_FEED_CK_BUFG_CASC14": null,
|
||||
"CLK_FEED_CK_BUFG_CASC15": null,
|
||||
"CLK_FEED_CK_BUFG_CASC16": null,
|
||||
"CLK_FEED_CK_BUFG_CASC17": null,
|
||||
"CLK_FEED_CK_BUFG_CASC18": null,
|
||||
"CLK_FEED_CK_BUFG_CASC19": null,
|
||||
"CLK_FEED_CK_BUFG_CASC2": null,
|
||||
"CLK_FEED_CK_BUFG_CASC20": null,
|
||||
"CLK_FEED_CK_BUFG_CASC21": null,
|
||||
"CLK_FEED_CK_BUFG_CASC22": null,
|
||||
"CLK_FEED_CK_BUFG_CASC23": null,
|
||||
"CLK_FEED_CK_BUFG_CASC24": null,
|
||||
"CLK_FEED_CK_BUFG_CASC25": null,
|
||||
"CLK_FEED_CK_BUFG_CASC26": null,
|
||||
"CLK_FEED_CK_BUFG_CASC27": null,
|
||||
"CLK_FEED_CK_BUFG_CASC28": null,
|
||||
"CLK_FEED_CK_BUFG_CASC29": null,
|
||||
"CLK_FEED_CK_BUFG_CASC3": null,
|
||||
"CLK_FEED_CK_BUFG_CASC30": null,
|
||||
"CLK_FEED_CK_BUFG_CASC31": null,
|
||||
"CLK_FEED_CK_BUFG_CASC4": null,
|
||||
"CLK_FEED_CK_BUFG_CASC5": null,
|
||||
"CLK_FEED_CK_BUFG_CASC6": null,
|
||||
"CLK_FEED_CK_BUFG_CASC7": null,
|
||||
"CLK_FEED_CK_BUFG_CASC8": null,
|
||||
"CLK_FEED_CK_BUFG_CASC9": null,
|
||||
"CLK_FEED_CK_GCLK0": null,
|
||||
"CLK_FEED_CK_GCLK1": null,
|
||||
"CLK_FEED_CK_GCLK10": null,
|
||||
"CLK_FEED_CK_GCLK11": null,
|
||||
"CLK_FEED_CK_GCLK12": null,
|
||||
"CLK_FEED_CK_GCLK13": null,
|
||||
"CLK_FEED_CK_GCLK14": null,
|
||||
"CLK_FEED_CK_GCLK15": null,
|
||||
"CLK_FEED_CK_GCLK16": null,
|
||||
"CLK_FEED_CK_GCLK17": null,
|
||||
"CLK_FEED_CK_GCLK18": null,
|
||||
"CLK_FEED_CK_GCLK19": null,
|
||||
"CLK_FEED_CK_GCLK2": null,
|
||||
"CLK_FEED_CK_GCLK20": null,
|
||||
"CLK_FEED_CK_GCLK21": null,
|
||||
"CLK_FEED_CK_GCLK22": null,
|
||||
"CLK_FEED_CK_GCLK23": null,
|
||||
"CLK_FEED_CK_GCLK24": null,
|
||||
"CLK_FEED_CK_GCLK25": null,
|
||||
"CLK_FEED_CK_GCLK26": null,
|
||||
"CLK_FEED_CK_GCLK27": null,
|
||||
"CLK_FEED_CK_GCLK28": null,
|
||||
"CLK_FEED_CK_GCLK29": null,
|
||||
"CLK_FEED_CK_GCLK3": null,
|
||||
"CLK_FEED_CK_GCLK30": null,
|
||||
"CLK_FEED_CK_GCLK31": null,
|
||||
"CLK_FEED_CK_GCLK4": null,
|
||||
"CLK_FEED_CK_GCLK5": null,
|
||||
"CLK_FEED_CK_GCLK6": null,
|
||||
"CLK_FEED_CK_GCLK7": null,
|
||||
"CLK_FEED_CK_GCLK8": null,
|
||||
"CLK_FEED_CK_GCLK9": null,
|
||||
"CLK_FEED_EE2A0": null,
|
||||
"CLK_FEED_EE2A1": null,
|
||||
"CLK_FEED_EE2A2": null,
|
||||
"CLK_FEED_EE2A3": null,
|
||||
"CLK_FEED_EE2BEG0": null,
|
||||
"CLK_FEED_EE2BEG1": null,
|
||||
"CLK_FEED_EE2BEG2": null,
|
||||
"CLK_FEED_EE2BEG3": null,
|
||||
"CLK_FEED_EE4A0": null,
|
||||
"CLK_FEED_EE4A1": null,
|
||||
"CLK_FEED_EE4A2": null,
|
||||
"CLK_FEED_EE4A3": null,
|
||||
"CLK_FEED_EE4B0": null,
|
||||
"CLK_FEED_EE4B1": null,
|
||||
"CLK_FEED_EE4B2": null,
|
||||
"CLK_FEED_EE4B3": null,
|
||||
"CLK_FEED_EE4BEG0": null,
|
||||
"CLK_FEED_EE4BEG1": null,
|
||||
"CLK_FEED_EE4BEG2": null,
|
||||
"CLK_FEED_EE4BEG3": null,
|
||||
"CLK_FEED_EE4C0": null,
|
||||
"CLK_FEED_EE4C1": null,
|
||||
"CLK_FEED_EE4C2": null,
|
||||
"CLK_FEED_EE4C3": null,
|
||||
"CLK_FEED_EL1BEG0": null,
|
||||
"CLK_FEED_EL1BEG1": null,
|
||||
"CLK_FEED_EL1BEG2": null,
|
||||
"CLK_FEED_EL1BEG3": null,
|
||||
"CLK_FEED_ER1BEG0": null,
|
||||
"CLK_FEED_ER1BEG1": null,
|
||||
"CLK_FEED_ER1BEG2": null,
|
||||
"CLK_FEED_ER1BEG3": null,
|
||||
"CLK_FEED_LH1": null,
|
||||
"CLK_FEED_LH10": null,
|
||||
"CLK_FEED_LH11": null,
|
||||
"CLK_FEED_LH12": null,
|
||||
"CLK_FEED_LH2": null,
|
||||
"CLK_FEED_LH3": null,
|
||||
"CLK_FEED_LH4": null,
|
||||
"CLK_FEED_LH5": null,
|
||||
"CLK_FEED_LH6": null,
|
||||
"CLK_FEED_LH7": null,
|
||||
"CLK_FEED_LH8": null,
|
||||
"CLK_FEED_LH9": null,
|
||||
"CLK_FEED_MONITOR_N": null,
|
||||
"CLK_FEED_MONITOR_P": null,
|
||||
"CLK_FEED_NE2A0": null,
|
||||
"CLK_FEED_NE2A1": null,
|
||||
"CLK_FEED_NE2A2": null,
|
||||
"CLK_FEED_NE2A3": null,
|
||||
"CLK_FEED_NE4BEG0": null,
|
||||
"CLK_FEED_NE4BEG1": null,
|
||||
"CLK_FEED_NE4BEG2": null,
|
||||
"CLK_FEED_NE4BEG3": null,
|
||||
"CLK_FEED_NE4C0": null,
|
||||
"CLK_FEED_NE4C1": null,
|
||||
"CLK_FEED_NE4C2": null,
|
||||
"CLK_FEED_NE4C3": null,
|
||||
"CLK_FEED_NW2A0": null,
|
||||
"CLK_FEED_NW2A1": null,
|
||||
"CLK_FEED_NW2A2": null,
|
||||
"CLK_FEED_NW2A3": null,
|
||||
"CLK_FEED_NW4A0": null,
|
||||
"CLK_FEED_NW4A1": null,
|
||||
"CLK_FEED_NW4A2": null,
|
||||
"CLK_FEED_NW4A3": null,
|
||||
"CLK_FEED_NW4END0": null,
|
||||
"CLK_FEED_NW4END1": null,
|
||||
"CLK_FEED_NW4END2": null,
|
||||
"CLK_FEED_NW4END3": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC0": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC1": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC10": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC11": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC12": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC13": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC14": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC15": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC16": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC17": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC18": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC19": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC2": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC20": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC21": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC22": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC23": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC24": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC25": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC26": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC27": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC28": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC29": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC3": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC30": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC31": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC4": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC5": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC6": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC7": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC8": null,
|
||||
"CLK_FEED_R_CK_BUFG_CASC9": null,
|
||||
"CLK_FEED_R_CK_GCLK0": null,
|
||||
"CLK_FEED_R_CK_GCLK1": null,
|
||||
"CLK_FEED_R_CK_GCLK10": null,
|
||||
"CLK_FEED_R_CK_GCLK11": null,
|
||||
"CLK_FEED_R_CK_GCLK12": null,
|
||||
"CLK_FEED_R_CK_GCLK13": null,
|
||||
"CLK_FEED_R_CK_GCLK14": null,
|
||||
"CLK_FEED_R_CK_GCLK15": null,
|
||||
"CLK_FEED_R_CK_GCLK16": null,
|
||||
"CLK_FEED_R_CK_GCLK17": null,
|
||||
"CLK_FEED_R_CK_GCLK18": null,
|
||||
"CLK_FEED_R_CK_GCLK19": null,
|
||||
"CLK_FEED_R_CK_GCLK2": null,
|
||||
"CLK_FEED_R_CK_GCLK20": null,
|
||||
"CLK_FEED_R_CK_GCLK21": null,
|
||||
"CLK_FEED_R_CK_GCLK22": null,
|
||||
"CLK_FEED_R_CK_GCLK23": null,
|
||||
"CLK_FEED_R_CK_GCLK24": null,
|
||||
"CLK_FEED_R_CK_GCLK25": null,
|
||||
"CLK_FEED_R_CK_GCLK26": null,
|
||||
"CLK_FEED_R_CK_GCLK27": null,
|
||||
"CLK_FEED_R_CK_GCLK28": null,
|
||||
"CLK_FEED_R_CK_GCLK29": null,
|
||||
"CLK_FEED_R_CK_GCLK3": null,
|
||||
"CLK_FEED_R_CK_GCLK30": null,
|
||||
"CLK_FEED_R_CK_GCLK31": null,
|
||||
"CLK_FEED_R_CK_GCLK4": null,
|
||||
"CLK_FEED_R_CK_GCLK5": null,
|
||||
"CLK_FEED_R_CK_GCLK6": null,
|
||||
"CLK_FEED_R_CK_GCLK7": null,
|
||||
"CLK_FEED_R_CK_GCLK8": null,
|
||||
"CLK_FEED_R_CK_GCLK9": null,
|
||||
"CLK_FEED_SE2A0": null,
|
||||
"CLK_FEED_SE2A1": null,
|
||||
"CLK_FEED_SE2A2": null,
|
||||
"CLK_FEED_SE2A3": null,
|
||||
"CLK_FEED_SE4BEG0": null,
|
||||
"CLK_FEED_SE4BEG1": null,
|
||||
"CLK_FEED_SE4BEG2": null,
|
||||
"CLK_FEED_SE4BEG3": null,
|
||||
"CLK_FEED_SE4C0": null,
|
||||
"CLK_FEED_SE4C1": null,
|
||||
"CLK_FEED_SE4C2": null,
|
||||
"CLK_FEED_SE4C3": null,
|
||||
"CLK_FEED_SW2A0": null,
|
||||
"CLK_FEED_SW2A1": null,
|
||||
"CLK_FEED_SW2A2": null,
|
||||
"CLK_FEED_SW2A3": null,
|
||||
"CLK_FEED_SW4A0": null,
|
||||
"CLK_FEED_SW4A1": null,
|
||||
"CLK_FEED_SW4A2": null,
|
||||
"CLK_FEED_SW4A3": null,
|
||||
"CLK_FEED_SW4END0": null,
|
||||
"CLK_FEED_SW4END1": null,
|
||||
"CLK_FEED_SW4END2": null,
|
||||
"CLK_FEED_SW4END3": null,
|
||||
"CLK_FEED_WL1END0": null,
|
||||
"CLK_FEED_WL1END1": null,
|
||||
"CLK_FEED_WL1END2": null,
|
||||
"CLK_FEED_WL1END3": null,
|
||||
"CLK_FEED_WR1END0": null,
|
||||
"CLK_FEED_WR1END1": null,
|
||||
"CLK_FEED_WR1END2": null,
|
||||
"CLK_FEED_WR1END3": null,
|
||||
"CLK_FEED_WW2A0": null,
|
||||
"CLK_FEED_WW2A1": null,
|
||||
"CLK_FEED_WW2A2": null,
|
||||
"CLK_FEED_WW2A3": null,
|
||||
"CLK_FEED_WW2END0": null,
|
||||
"CLK_FEED_WW2END1": null,
|
||||
"CLK_FEED_WW2END2": null,
|
||||
"CLK_FEED_WW2END3": null,
|
||||
"CLK_FEED_WW4A0": null,
|
||||
"CLK_FEED_WW4A1": null,
|
||||
"CLK_FEED_WW4A2": null,
|
||||
"CLK_FEED_WW4A3": null,
|
||||
"CLK_FEED_WW4B0": null,
|
||||
"CLK_FEED_WW4B1": null,
|
||||
"CLK_FEED_WW4B2": null,
|
||||
"CLK_FEED_WW4B3": null,
|
||||
"CLK_FEED_WW4C0": null,
|
||||
"CLK_FEED_WW4C1": null,
|
||||
"CLK_FEED_WW4C2": null,
|
||||
"CLK_FEED_WW4C3": null,
|
||||
"CLK_FEED_WW4END0": null,
|
||||
"CLK_FEED_WW4END1": null,
|
||||
"CLK_FEED_WW4END2": null,
|
||||
"CLK_FEED_WW4END3": null,
|
||||
"CLK_PMVIOB_A0": null,
|
||||
"CLK_PMVIOB_A1": null,
|
||||
"CLK_PMVIOB_EN": null,
|
||||
"CLK_PMVIOB_O": null,
|
||||
"CLK_PMVIOB_ODIV2": null,
|
||||
"CLK_PMVIOB_ODIV4": null,
|
||||
"CLK_PMV_BYP0_0": null,
|
||||
"CLK_PMV_BYP1_0": null,
|
||||
"CLK_PMV_BYP2_0": null,
|
||||
"CLK_PMV_BYP3_0": null,
|
||||
"CLK_PMV_BYP4_0": null,
|
||||
"CLK_PMV_BYP5_0": null,
|
||||
"CLK_PMV_BYP6_0": null,
|
||||
"CLK_PMV_BYP7_0": null,
|
||||
"CLK_PMV_CLK0_0": null,
|
||||
"CLK_PMV_CLK1_0": null,
|
||||
"CLK_PMV_CTRL0_0": null,
|
||||
"CLK_PMV_CTRL1_0": null,
|
||||
"CLK_PMV_FAN0_0": null,
|
||||
"CLK_PMV_FAN1_0": null,
|
||||
"CLK_PMV_FAN2_0": null,
|
||||
"CLK_PMV_FAN3_0": null,
|
||||
"CLK_PMV_FAN4_0": null,
|
||||
"CLK_PMV_FAN5_0": null,
|
||||
"CLK_PMV_FAN6_0": null,
|
||||
"CLK_PMV_FAN7_0": null,
|
||||
"CLK_PMV_IMUX0_0": null,
|
||||
"CLK_PMV_IMUX10_0": null,
|
||||
"CLK_PMV_IMUX11_0": null,
|
||||
"CLK_PMV_IMUX12_0": null,
|
||||
"CLK_PMV_IMUX13_0": null,
|
||||
"CLK_PMV_IMUX14_0": null,
|
||||
"CLK_PMV_IMUX15_0": null,
|
||||
"CLK_PMV_IMUX16_0": null,
|
||||
"CLK_PMV_IMUX17_0": null,
|
||||
"CLK_PMV_IMUX18_0": null,
|
||||
"CLK_PMV_IMUX19_0": null,
|
||||
"CLK_PMV_IMUX1_0": null,
|
||||
"CLK_PMV_IMUX20_0": null,
|
||||
"CLK_PMV_IMUX21_0": null,
|
||||
"CLK_PMV_IMUX22_0": null,
|
||||
"CLK_PMV_IMUX23_0": null,
|
||||
"CLK_PMV_IMUX24_0": null,
|
||||
"CLK_PMV_IMUX25_0": null,
|
||||
"CLK_PMV_IMUX26_0": null,
|
||||
"CLK_PMV_IMUX27_0": null,
|
||||
"CLK_PMV_IMUX28_0": null,
|
||||
"CLK_PMV_IMUX29_0": null,
|
||||
"CLK_PMV_IMUX2_0": null,
|
||||
"CLK_PMV_IMUX30_0": null,
|
||||
"CLK_PMV_IMUX31_0": null,
|
||||
"CLK_PMV_IMUX32_0": null,
|
||||
"CLK_PMV_IMUX33_0": null,
|
||||
"CLK_PMV_IMUX34_0": null,
|
||||
"CLK_PMV_IMUX35_0": null,
|
||||
"CLK_PMV_IMUX36_0": null,
|
||||
"CLK_PMV_IMUX37_0": null,
|
||||
"CLK_PMV_IMUX38_0": null,
|
||||
"CLK_PMV_IMUX39_0": null,
|
||||
"CLK_PMV_IMUX3_0": null,
|
||||
"CLK_PMV_IMUX40_0": null,
|
||||
"CLK_PMV_IMUX41_0": null,
|
||||
"CLK_PMV_IMUX42_0": null,
|
||||
"CLK_PMV_IMUX43_0": null,
|
||||
"CLK_PMV_IMUX44_0": null,
|
||||
"CLK_PMV_IMUX45_0": null,
|
||||
"CLK_PMV_IMUX46_0": null,
|
||||
"CLK_PMV_IMUX47_0": null,
|
||||
"CLK_PMV_IMUX4_0": null,
|
||||
"CLK_PMV_IMUX5_0": null,
|
||||
"CLK_PMV_IMUX6_0": null,
|
||||
"CLK_PMV_IMUX7_0": null,
|
||||
"CLK_PMV_IMUX8_0": null,
|
||||
"CLK_PMV_IMUX9_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS0_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS10_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS11_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS12_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS13_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS14_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS15_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS16_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS17_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS18_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS19_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS1_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS20_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS21_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS22_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS23_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS2_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS3_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS4_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS5_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS6_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS7_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS8_0": null,
|
||||
"CLK_PMV_LOGIC_OUTS9_0": null
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,70 +2,70 @@
|
|||
"pips": {},
|
||||
"sites": [],
|
||||
"tile_type": "CLK_TERM",
|
||||
"wires": [
|
||||
"CLK_TERM_GCLK0",
|
||||
"CLK_TERM_GCLK1",
|
||||
"CLK_TERM_GCLK10",
|
||||
"CLK_TERM_GCLK11",
|
||||
"CLK_TERM_GCLK12",
|
||||
"CLK_TERM_GCLK13",
|
||||
"CLK_TERM_GCLK14",
|
||||
"CLK_TERM_GCLK15",
|
||||
"CLK_TERM_GCLK16",
|
||||
"CLK_TERM_GCLK17",
|
||||
"CLK_TERM_GCLK18",
|
||||
"CLK_TERM_GCLK19",
|
||||
"CLK_TERM_GCLK2",
|
||||
"CLK_TERM_GCLK20",
|
||||
"CLK_TERM_GCLK21",
|
||||
"CLK_TERM_GCLK22",
|
||||
"CLK_TERM_GCLK23",
|
||||
"CLK_TERM_GCLK24",
|
||||
"CLK_TERM_GCLK25",
|
||||
"CLK_TERM_GCLK26",
|
||||
"CLK_TERM_GCLK27",
|
||||
"CLK_TERM_GCLK28",
|
||||
"CLK_TERM_GCLK29",
|
||||
"CLK_TERM_GCLK3",
|
||||
"CLK_TERM_GCLK30",
|
||||
"CLK_TERM_GCLK31",
|
||||
"CLK_TERM_GCLK4",
|
||||
"CLK_TERM_GCLK5",
|
||||
"CLK_TERM_GCLK6",
|
||||
"CLK_TERM_GCLK7",
|
||||
"CLK_TERM_GCLK8",
|
||||
"CLK_TERM_GCLK9",
|
||||
"CLK_TERM_R_GCLK0",
|
||||
"CLK_TERM_R_GCLK1",
|
||||
"CLK_TERM_R_GCLK10",
|
||||
"CLK_TERM_R_GCLK11",
|
||||
"CLK_TERM_R_GCLK12",
|
||||
"CLK_TERM_R_GCLK13",
|
||||
"CLK_TERM_R_GCLK14",
|
||||
"CLK_TERM_R_GCLK15",
|
||||
"CLK_TERM_R_GCLK16",
|
||||
"CLK_TERM_R_GCLK17",
|
||||
"CLK_TERM_R_GCLK18",
|
||||
"CLK_TERM_R_GCLK19",
|
||||
"CLK_TERM_R_GCLK2",
|
||||
"CLK_TERM_R_GCLK20",
|
||||
"CLK_TERM_R_GCLK21",
|
||||
"CLK_TERM_R_GCLK22",
|
||||
"CLK_TERM_R_GCLK23",
|
||||
"CLK_TERM_R_GCLK24",
|
||||
"CLK_TERM_R_GCLK25",
|
||||
"CLK_TERM_R_GCLK26",
|
||||
"CLK_TERM_R_GCLK27",
|
||||
"CLK_TERM_R_GCLK28",
|
||||
"CLK_TERM_R_GCLK29",
|
||||
"CLK_TERM_R_GCLK3",
|
||||
"CLK_TERM_R_GCLK30",
|
||||
"CLK_TERM_R_GCLK31",
|
||||
"CLK_TERM_R_GCLK4",
|
||||
"CLK_TERM_R_GCLK5",
|
||||
"CLK_TERM_R_GCLK6",
|
||||
"CLK_TERM_R_GCLK7",
|
||||
"CLK_TERM_R_GCLK8",
|
||||
"CLK_TERM_R_GCLK9"
|
||||
]
|
||||
"wires": {
|
||||
"CLK_TERM_GCLK0": null,
|
||||
"CLK_TERM_GCLK1": null,
|
||||
"CLK_TERM_GCLK10": null,
|
||||
"CLK_TERM_GCLK11": null,
|
||||
"CLK_TERM_GCLK12": null,
|
||||
"CLK_TERM_GCLK13": null,
|
||||
"CLK_TERM_GCLK14": null,
|
||||
"CLK_TERM_GCLK15": null,
|
||||
"CLK_TERM_GCLK16": null,
|
||||
"CLK_TERM_GCLK17": null,
|
||||
"CLK_TERM_GCLK18": null,
|
||||
"CLK_TERM_GCLK19": null,
|
||||
"CLK_TERM_GCLK2": null,
|
||||
"CLK_TERM_GCLK20": null,
|
||||
"CLK_TERM_GCLK21": null,
|
||||
"CLK_TERM_GCLK22": null,
|
||||
"CLK_TERM_GCLK23": null,
|
||||
"CLK_TERM_GCLK24": null,
|
||||
"CLK_TERM_GCLK25": null,
|
||||
"CLK_TERM_GCLK26": null,
|
||||
"CLK_TERM_GCLK27": null,
|
||||
"CLK_TERM_GCLK28": null,
|
||||
"CLK_TERM_GCLK29": null,
|
||||
"CLK_TERM_GCLK3": null,
|
||||
"CLK_TERM_GCLK30": null,
|
||||
"CLK_TERM_GCLK31": null,
|
||||
"CLK_TERM_GCLK4": null,
|
||||
"CLK_TERM_GCLK5": null,
|
||||
"CLK_TERM_GCLK6": null,
|
||||
"CLK_TERM_GCLK7": null,
|
||||
"CLK_TERM_GCLK8": null,
|
||||
"CLK_TERM_GCLK9": null,
|
||||
"CLK_TERM_R_GCLK0": null,
|
||||
"CLK_TERM_R_GCLK1": null,
|
||||
"CLK_TERM_R_GCLK10": null,
|
||||
"CLK_TERM_R_GCLK11": null,
|
||||
"CLK_TERM_R_GCLK12": null,
|
||||
"CLK_TERM_R_GCLK13": null,
|
||||
"CLK_TERM_R_GCLK14": null,
|
||||
"CLK_TERM_R_GCLK15": null,
|
||||
"CLK_TERM_R_GCLK16": null,
|
||||
"CLK_TERM_R_GCLK17": null,
|
||||
"CLK_TERM_R_GCLK18": null,
|
||||
"CLK_TERM_R_GCLK19": null,
|
||||
"CLK_TERM_R_GCLK2": null,
|
||||
"CLK_TERM_R_GCLK20": null,
|
||||
"CLK_TERM_R_GCLK21": null,
|
||||
"CLK_TERM_R_GCLK22": null,
|
||||
"CLK_TERM_R_GCLK23": null,
|
||||
"CLK_TERM_R_GCLK24": null,
|
||||
"CLK_TERM_R_GCLK25": null,
|
||||
"CLK_TERM_R_GCLK26": null,
|
||||
"CLK_TERM_R_GCLK27": null,
|
||||
"CLK_TERM_R_GCLK28": null,
|
||||
"CLK_TERM_R_GCLK29": null,
|
||||
"CLK_TERM_R_GCLK3": null,
|
||||
"CLK_TERM_R_GCLK30": null,
|
||||
"CLK_TERM_R_GCLK31": null,
|
||||
"CLK_TERM_R_GCLK4": null,
|
||||
"CLK_TERM_R_GCLK5": null,
|
||||
"CLK_TERM_R_GCLK6": null,
|
||||
"CLK_TERM_R_GCLK7": null,
|
||||
"CLK_TERM_R_GCLK8": null,
|
||||
"CLK_TERM_R_GCLK9": null
|
||||
}
|
||||
}
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -2,229 +2,601 @@
|
|||
"pips": {},
|
||||
"sites": [],
|
||||
"tile_type": "CMT_PMV",
|
||||
"wires": [
|
||||
"CMT_PMV_BYP0",
|
||||
"CMT_PMV_BYP1",
|
||||
"CMT_PMV_BYP2",
|
||||
"CMT_PMV_BYP3",
|
||||
"CMT_PMV_BYP4",
|
||||
"CMT_PMV_BYP5",
|
||||
"CMT_PMV_BYP6",
|
||||
"CMT_PMV_BYP7",
|
||||
"CMT_PMV_CLK0",
|
||||
"CMT_PMV_CLK1",
|
||||
"CMT_PMV_CTRL0",
|
||||
"CMT_PMV_CTRL1",
|
||||
"CMT_PMV_EE2A0",
|
||||
"CMT_PMV_EE2A1",
|
||||
"CMT_PMV_EE2A2",
|
||||
"CMT_PMV_EE2A3",
|
||||
"CMT_PMV_EE2BEG0",
|
||||
"CMT_PMV_EE2BEG1",
|
||||
"CMT_PMV_EE2BEG2",
|
||||
"CMT_PMV_EE2BEG3",
|
||||
"CMT_PMV_EE4A0",
|
||||
"CMT_PMV_EE4A1",
|
||||
"CMT_PMV_EE4A2",
|
||||
"CMT_PMV_EE4A3",
|
||||
"CMT_PMV_EE4B0",
|
||||
"CMT_PMV_EE4B1",
|
||||
"CMT_PMV_EE4B2",
|
||||
"CMT_PMV_EE4B3",
|
||||
"CMT_PMV_EE4BEG0",
|
||||
"CMT_PMV_EE4BEG1",
|
||||
"CMT_PMV_EE4BEG2",
|
||||
"CMT_PMV_EE4BEG3",
|
||||
"CMT_PMV_EE4C0",
|
||||
"CMT_PMV_EE4C1",
|
||||
"CMT_PMV_EE4C2",
|
||||
"CMT_PMV_EE4C3",
|
||||
"CMT_PMV_EL1BEG0",
|
||||
"CMT_PMV_EL1BEG1",
|
||||
"CMT_PMV_EL1BEG2",
|
||||
"CMT_PMV_EL1BEG3",
|
||||
"CMT_PMV_ER1BEG0",
|
||||
"CMT_PMV_ER1BEG1",
|
||||
"CMT_PMV_ER1BEG2",
|
||||
"CMT_PMV_ER1BEG3",
|
||||
"CMT_PMV_FAN0",
|
||||
"CMT_PMV_FAN1",
|
||||
"CMT_PMV_FAN2",
|
||||
"CMT_PMV_FAN3",
|
||||
"CMT_PMV_FAN4",
|
||||
"CMT_PMV_FAN5",
|
||||
"CMT_PMV_FAN6",
|
||||
"CMT_PMV_FAN7",
|
||||
"CMT_PMV_IMUX0",
|
||||
"CMT_PMV_IMUX1",
|
||||
"CMT_PMV_IMUX10",
|
||||
"CMT_PMV_IMUX11",
|
||||
"CMT_PMV_IMUX12",
|
||||
"CMT_PMV_IMUX13",
|
||||
"CMT_PMV_IMUX14",
|
||||
"CMT_PMV_IMUX15",
|
||||
"CMT_PMV_IMUX16",
|
||||
"CMT_PMV_IMUX17",
|
||||
"CMT_PMV_IMUX18",
|
||||
"CMT_PMV_IMUX19",
|
||||
"CMT_PMV_IMUX2",
|
||||
"CMT_PMV_IMUX20",
|
||||
"CMT_PMV_IMUX21",
|
||||
"CMT_PMV_IMUX22",
|
||||
"CMT_PMV_IMUX23",
|
||||
"CMT_PMV_IMUX24",
|
||||
"CMT_PMV_IMUX25",
|
||||
"CMT_PMV_IMUX26",
|
||||
"CMT_PMV_IMUX27",
|
||||
"CMT_PMV_IMUX28",
|
||||
"CMT_PMV_IMUX29",
|
||||
"CMT_PMV_IMUX3",
|
||||
"CMT_PMV_IMUX30",
|
||||
"CMT_PMV_IMUX31",
|
||||
"CMT_PMV_IMUX32",
|
||||
"CMT_PMV_IMUX33",
|
||||
"CMT_PMV_IMUX34",
|
||||
"CMT_PMV_IMUX35",
|
||||
"CMT_PMV_IMUX36",
|
||||
"CMT_PMV_IMUX37",
|
||||
"CMT_PMV_IMUX38",
|
||||
"CMT_PMV_IMUX39",
|
||||
"CMT_PMV_IMUX4",
|
||||
"CMT_PMV_IMUX40",
|
||||
"CMT_PMV_IMUX41",
|
||||
"CMT_PMV_IMUX42",
|
||||
"CMT_PMV_IMUX43",
|
||||
"CMT_PMV_IMUX44",
|
||||
"CMT_PMV_IMUX45",
|
||||
"CMT_PMV_IMUX46",
|
||||
"CMT_PMV_IMUX47",
|
||||
"CMT_PMV_IMUX5",
|
||||
"CMT_PMV_IMUX6",
|
||||
"CMT_PMV_IMUX7",
|
||||
"CMT_PMV_IMUX8",
|
||||
"CMT_PMV_IMUX9",
|
||||
"CMT_PMV_LH1",
|
||||
"CMT_PMV_LH10",
|
||||
"CMT_PMV_LH11",
|
||||
"CMT_PMV_LH12",
|
||||
"CMT_PMV_LH2",
|
||||
"CMT_PMV_LH3",
|
||||
"CMT_PMV_LH4",
|
||||
"CMT_PMV_LH5",
|
||||
"CMT_PMV_LH6",
|
||||
"CMT_PMV_LH7",
|
||||
"CMT_PMV_LH8",
|
||||
"CMT_PMV_LH9",
|
||||
"CMT_PMV_LOGIC_OUTS0",
|
||||
"CMT_PMV_LOGIC_OUTS1",
|
||||
"CMT_PMV_LOGIC_OUTS10",
|
||||
"CMT_PMV_LOGIC_OUTS11",
|
||||
"CMT_PMV_LOGIC_OUTS12",
|
||||
"CMT_PMV_LOGIC_OUTS13",
|
||||
"CMT_PMV_LOGIC_OUTS14",
|
||||
"CMT_PMV_LOGIC_OUTS15",
|
||||
"CMT_PMV_LOGIC_OUTS16",
|
||||
"CMT_PMV_LOGIC_OUTS17",
|
||||
"CMT_PMV_LOGIC_OUTS18",
|
||||
"CMT_PMV_LOGIC_OUTS19",
|
||||
"CMT_PMV_LOGIC_OUTS2",
|
||||
"CMT_PMV_LOGIC_OUTS20",
|
||||
"CMT_PMV_LOGIC_OUTS21",
|
||||
"CMT_PMV_LOGIC_OUTS22",
|
||||
"CMT_PMV_LOGIC_OUTS23",
|
||||
"CMT_PMV_LOGIC_OUTS3",
|
||||
"CMT_PMV_LOGIC_OUTS4",
|
||||
"CMT_PMV_LOGIC_OUTS5",
|
||||
"CMT_PMV_LOGIC_OUTS6",
|
||||
"CMT_PMV_LOGIC_OUTS7",
|
||||
"CMT_PMV_LOGIC_OUTS8",
|
||||
"CMT_PMV_LOGIC_OUTS9",
|
||||
"CMT_PMV_MONITOR_N",
|
||||
"CMT_PMV_MONITOR_P",
|
||||
"CMT_PMV_NE2A0",
|
||||
"CMT_PMV_NE2A1",
|
||||
"CMT_PMV_NE2A2",
|
||||
"CMT_PMV_NE2A3",
|
||||
"CMT_PMV_NE4BEG0",
|
||||
"CMT_PMV_NE4BEG1",
|
||||
"CMT_PMV_NE4BEG2",
|
||||
"CMT_PMV_NE4BEG3",
|
||||
"CMT_PMV_NE4C0",
|
||||
"CMT_PMV_NE4C1",
|
||||
"CMT_PMV_NE4C2",
|
||||
"CMT_PMV_NE4C3",
|
||||
"CMT_PMV_NW2A0",
|
||||
"CMT_PMV_NW2A1",
|
||||
"CMT_PMV_NW2A2",
|
||||
"CMT_PMV_NW2A3",
|
||||
"CMT_PMV_NW4A0",
|
||||
"CMT_PMV_NW4A1",
|
||||
"CMT_PMV_NW4A2",
|
||||
"CMT_PMV_NW4A3",
|
||||
"CMT_PMV_NW4END0",
|
||||
"CMT_PMV_NW4END1",
|
||||
"CMT_PMV_NW4END2",
|
||||
"CMT_PMV_NW4END3",
|
||||
"CMT_PMV_SE2A0",
|
||||
"CMT_PMV_SE2A1",
|
||||
"CMT_PMV_SE2A2",
|
||||
"CMT_PMV_SE2A3",
|
||||
"CMT_PMV_SE4BEG0",
|
||||
"CMT_PMV_SE4BEG1",
|
||||
"CMT_PMV_SE4BEG2",
|
||||
"CMT_PMV_SE4BEG3",
|
||||
"CMT_PMV_SE4C0",
|
||||
"CMT_PMV_SE4C1",
|
||||
"CMT_PMV_SE4C2",
|
||||
"CMT_PMV_SE4C3",
|
||||
"CMT_PMV_SW2A0",
|
||||
"CMT_PMV_SW2A1",
|
||||
"CMT_PMV_SW2A2",
|
||||
"CMT_PMV_SW2A3",
|
||||
"CMT_PMV_SW4A0",
|
||||
"CMT_PMV_SW4A1",
|
||||
"CMT_PMV_SW4A2",
|
||||
"CMT_PMV_SW4A3",
|
||||
"CMT_PMV_SW4END0",
|
||||
"CMT_PMV_SW4END1",
|
||||
"CMT_PMV_SW4END2",
|
||||
"CMT_PMV_SW4END3",
|
||||
"CMT_PMV_WL1END0",
|
||||
"CMT_PMV_WL1END1",
|
||||
"CMT_PMV_WL1END2",
|
||||
"CMT_PMV_WL1END3",
|
||||
"CMT_PMV_WR1END0",
|
||||
"CMT_PMV_WR1END1",
|
||||
"CMT_PMV_WR1END2",
|
||||
"CMT_PMV_WR1END3",
|
||||
"CMT_PMV_WW2A0",
|
||||
"CMT_PMV_WW2A1",
|
||||
"CMT_PMV_WW2A2",
|
||||
"CMT_PMV_WW2A3",
|
||||
"CMT_PMV_WW2END0",
|
||||
"CMT_PMV_WW2END1",
|
||||
"CMT_PMV_WW2END2",
|
||||
"CMT_PMV_WW2END3",
|
||||
"CMT_PMV_WW4A0",
|
||||
"CMT_PMV_WW4A1",
|
||||
"CMT_PMV_WW4A2",
|
||||
"CMT_PMV_WW4A3",
|
||||
"CMT_PMV_WW4B0",
|
||||
"CMT_PMV_WW4B1",
|
||||
"CMT_PMV_WW4B2",
|
||||
"CMT_PMV_WW4B3",
|
||||
"CMT_PMV_WW4C0",
|
||||
"CMT_PMV_WW4C1",
|
||||
"CMT_PMV_WW4C2",
|
||||
"CMT_PMV_WW4C3",
|
||||
"CMT_PMV_WW4END0",
|
||||
"CMT_PMV_WW4END1",
|
||||
"CMT_PMV_WW4END2",
|
||||
"CMT_PMV_WW4END3",
|
||||
"L_TERM_INT_PHASER_TO_IO_ICLK",
|
||||
"L_TERM_INT_PHASER_TO_IO_ICLKDIV",
|
||||
"L_TERM_INT_PHASER_TO_IO_OCLK",
|
||||
"L_TERM_INT_PHASER_TO_IO_OCLK1X_90",
|
||||
"L_TERM_INT_PHASER_TO_IO_OCLKDIV"
|
||||
]
|
||||
"wires": {
|
||||
"CMT_PMV_BYP0": null,
|
||||
"CMT_PMV_BYP1": null,
|
||||
"CMT_PMV_BYP2": null,
|
||||
"CMT_PMV_BYP3": null,
|
||||
"CMT_PMV_BYP4": null,
|
||||
"CMT_PMV_BYP5": null,
|
||||
"CMT_PMV_BYP6": null,
|
||||
"CMT_PMV_BYP7": null,
|
||||
"CMT_PMV_CLK0": null,
|
||||
"CMT_PMV_CLK1": null,
|
||||
"CMT_PMV_CTRL0": null,
|
||||
"CMT_PMV_CTRL1": null,
|
||||
"CMT_PMV_EE2A0": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE2A1": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE2A2": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE2A3": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE2BEG0": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE2BEG1": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE2BEG2": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE2BEG3": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE4A0": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE4A1": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE4A2": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE4A3": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE4B0": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE4B1": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE4B2": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE4B3": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE4BEG0": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE4BEG1": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE4BEG2": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE4BEG3": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE4C0": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE4C1": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE4C2": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE4C3": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EL1BEG0": {
|
||||
"cap": "25.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EL1BEG1": {
|
||||
"cap": "25.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EL1BEG2": {
|
||||
"cap": "25.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EL1BEG3": {
|
||||
"cap": "25.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_ER1BEG0": {
|
||||
"cap": "25.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_ER1BEG1": {
|
||||
"cap": "25.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_ER1BEG2": {
|
||||
"cap": "25.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_ER1BEG3": {
|
||||
"cap": "25.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_FAN0": null,
|
||||
"CMT_PMV_FAN1": null,
|
||||
"CMT_PMV_FAN2": null,
|
||||
"CMT_PMV_FAN3": null,
|
||||
"CMT_PMV_FAN4": null,
|
||||
"CMT_PMV_FAN5": null,
|
||||
"CMT_PMV_FAN6": null,
|
||||
"CMT_PMV_FAN7": null,
|
||||
"CMT_PMV_IMUX0": null,
|
||||
"CMT_PMV_IMUX1": null,
|
||||
"CMT_PMV_IMUX10": null,
|
||||
"CMT_PMV_IMUX11": null,
|
||||
"CMT_PMV_IMUX12": null,
|
||||
"CMT_PMV_IMUX13": null,
|
||||
"CMT_PMV_IMUX14": null,
|
||||
"CMT_PMV_IMUX15": null,
|
||||
"CMT_PMV_IMUX16": null,
|
||||
"CMT_PMV_IMUX17": null,
|
||||
"CMT_PMV_IMUX18": null,
|
||||
"CMT_PMV_IMUX19": null,
|
||||
"CMT_PMV_IMUX2": null,
|
||||
"CMT_PMV_IMUX20": null,
|
||||
"CMT_PMV_IMUX21": null,
|
||||
"CMT_PMV_IMUX22": null,
|
||||
"CMT_PMV_IMUX23": null,
|
||||
"CMT_PMV_IMUX24": null,
|
||||
"CMT_PMV_IMUX25": null,
|
||||
"CMT_PMV_IMUX26": null,
|
||||
"CMT_PMV_IMUX27": null,
|
||||
"CMT_PMV_IMUX28": null,
|
||||
"CMT_PMV_IMUX29": null,
|
||||
"CMT_PMV_IMUX3": null,
|
||||
"CMT_PMV_IMUX30": null,
|
||||
"CMT_PMV_IMUX31": null,
|
||||
"CMT_PMV_IMUX32": null,
|
||||
"CMT_PMV_IMUX33": null,
|
||||
"CMT_PMV_IMUX34": null,
|
||||
"CMT_PMV_IMUX35": null,
|
||||
"CMT_PMV_IMUX36": null,
|
||||
"CMT_PMV_IMUX37": null,
|
||||
"CMT_PMV_IMUX38": null,
|
||||
"CMT_PMV_IMUX39": null,
|
||||
"CMT_PMV_IMUX4": null,
|
||||
"CMT_PMV_IMUX40": null,
|
||||
"CMT_PMV_IMUX41": null,
|
||||
"CMT_PMV_IMUX42": null,
|
||||
"CMT_PMV_IMUX43": null,
|
||||
"CMT_PMV_IMUX44": null,
|
||||
"CMT_PMV_IMUX45": null,
|
||||
"CMT_PMV_IMUX46": null,
|
||||
"CMT_PMV_IMUX47": null,
|
||||
"CMT_PMV_IMUX5": null,
|
||||
"CMT_PMV_IMUX6": null,
|
||||
"CMT_PMV_IMUX7": null,
|
||||
"CMT_PMV_IMUX8": null,
|
||||
"CMT_PMV_IMUX9": null,
|
||||
"CMT_PMV_LH1": {
|
||||
"cap": "60.260",
|
||||
"res": "15.190"
|
||||
},
|
||||
"CMT_PMV_LH10": {
|
||||
"cap": "60.260",
|
||||
"res": "15.190"
|
||||
},
|
||||
"CMT_PMV_LH11": {
|
||||
"cap": "60.260",
|
||||
"res": "15.190"
|
||||
},
|
||||
"CMT_PMV_LH12": {
|
||||
"cap": "60.260",
|
||||
"res": "15.190"
|
||||
},
|
||||
"CMT_PMV_LH2": {
|
||||
"cap": "60.260",
|
||||
"res": "15.190"
|
||||
},
|
||||
"CMT_PMV_LH3": {
|
||||
"cap": "60.260",
|
||||
"res": "15.190"
|
||||
},
|
||||
"CMT_PMV_LH4": {
|
||||
"cap": "60.260",
|
||||
"res": "15.190"
|
||||
},
|
||||
"CMT_PMV_LH5": {
|
||||
"cap": "60.260",
|
||||
"res": "15.190"
|
||||
},
|
||||
"CMT_PMV_LH6": {
|
||||
"cap": "60.260",
|
||||
"res": "15.190"
|
||||
},
|
||||
"CMT_PMV_LH7": {
|
||||
"cap": "60.260",
|
||||
"res": "15.190"
|
||||
},
|
||||
"CMT_PMV_LH8": {
|
||||
"cap": "60.260",
|
||||
"res": "15.190"
|
||||
},
|
||||
"CMT_PMV_LH9": {
|
||||
"cap": "60.260",
|
||||
"res": "15.190"
|
||||
},
|
||||
"CMT_PMV_LOGIC_OUTS0": null,
|
||||
"CMT_PMV_LOGIC_OUTS1": null,
|
||||
"CMT_PMV_LOGIC_OUTS10": null,
|
||||
"CMT_PMV_LOGIC_OUTS11": null,
|
||||
"CMT_PMV_LOGIC_OUTS12": null,
|
||||
"CMT_PMV_LOGIC_OUTS13": null,
|
||||
"CMT_PMV_LOGIC_OUTS14": null,
|
||||
"CMT_PMV_LOGIC_OUTS15": null,
|
||||
"CMT_PMV_LOGIC_OUTS16": null,
|
||||
"CMT_PMV_LOGIC_OUTS17": null,
|
||||
"CMT_PMV_LOGIC_OUTS18": null,
|
||||
"CMT_PMV_LOGIC_OUTS19": null,
|
||||
"CMT_PMV_LOGIC_OUTS2": null,
|
||||
"CMT_PMV_LOGIC_OUTS20": null,
|
||||
"CMT_PMV_LOGIC_OUTS21": null,
|
||||
"CMT_PMV_LOGIC_OUTS22": null,
|
||||
"CMT_PMV_LOGIC_OUTS23": null,
|
||||
"CMT_PMV_LOGIC_OUTS3": null,
|
||||
"CMT_PMV_LOGIC_OUTS4": null,
|
||||
"CMT_PMV_LOGIC_OUTS5": null,
|
||||
"CMT_PMV_LOGIC_OUTS6": null,
|
||||
"CMT_PMV_LOGIC_OUTS7": null,
|
||||
"CMT_PMV_LOGIC_OUTS8": null,
|
||||
"CMT_PMV_LOGIC_OUTS9": null,
|
||||
"CMT_PMV_MONITOR_N": null,
|
||||
"CMT_PMV_MONITOR_P": null,
|
||||
"CMT_PMV_NE2A0": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NE2A1": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NE2A2": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NE2A3": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NE4BEG0": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NE4BEG1": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NE4BEG2": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NE4BEG3": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NE4C0": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NE4C1": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NE4C2": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NE4C3": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NW2A0": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NW2A1": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NW2A2": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NW2A3": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NW4A0": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NW4A1": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NW4A2": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NW4A3": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NW4END0": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NW4END1": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NW4END2": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NW4END3": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SE2A0": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SE2A1": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SE2A2": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SE2A3": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SE4BEG0": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SE4BEG1": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SE4BEG2": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SE4BEG3": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SE4C0": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SE4C1": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SE4C2": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SE4C3": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SW2A0": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SW2A1": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SW2A2": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SW2A3": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SW4A0": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SW4A1": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SW4A2": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SW4A3": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SW4END0": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SW4END1": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SW4END2": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SW4END3": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WL1END0": {
|
||||
"cap": "25.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WL1END1": {
|
||||
"cap": "25.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WL1END2": {
|
||||
"cap": "25.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WL1END3": {
|
||||
"cap": "25.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WR1END0": {
|
||||
"cap": "25.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WR1END1": {
|
||||
"cap": "25.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WR1END2": {
|
||||
"cap": "25.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WR1END3": {
|
||||
"cap": "25.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW2A0": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW2A1": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW2A2": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW2A3": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW2END0": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW2END1": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW2END2": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW2END3": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW4A0": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW4A1": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW4A2": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW4A3": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW4B0": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW4B1": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW4B2": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW4B3": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW4C0": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW4C1": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW4C2": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW4C3": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW4END0": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW4END1": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW4END2": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW4END3": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"L_TERM_INT_PHASER_TO_IO_ICLK": null,
|
||||
"L_TERM_INT_PHASER_TO_IO_ICLKDIV": null,
|
||||
"L_TERM_INT_PHASER_TO_IO_OCLK": null,
|
||||
"L_TERM_INT_PHASER_TO_IO_OCLK1X_90": null,
|
||||
"L_TERM_INT_PHASER_TO_IO_OCLKDIV": null
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,229 +2,601 @@
|
|||
"pips": {},
|
||||
"sites": [],
|
||||
"tile_type": "CMT_PMV_L",
|
||||
"wires": [
|
||||
"CMT_PMV_BYP0",
|
||||
"CMT_PMV_BYP1",
|
||||
"CMT_PMV_BYP2",
|
||||
"CMT_PMV_BYP3",
|
||||
"CMT_PMV_BYP4",
|
||||
"CMT_PMV_BYP5",
|
||||
"CMT_PMV_BYP6",
|
||||
"CMT_PMV_BYP7",
|
||||
"CMT_PMV_CLK0",
|
||||
"CMT_PMV_CLK1",
|
||||
"CMT_PMV_CTRL0",
|
||||
"CMT_PMV_CTRL1",
|
||||
"CMT_PMV_EE2A0",
|
||||
"CMT_PMV_EE2A1",
|
||||
"CMT_PMV_EE2A2",
|
||||
"CMT_PMV_EE2A3",
|
||||
"CMT_PMV_EE2BEG0",
|
||||
"CMT_PMV_EE2BEG1",
|
||||
"CMT_PMV_EE2BEG2",
|
||||
"CMT_PMV_EE2BEG3",
|
||||
"CMT_PMV_EE4A0",
|
||||
"CMT_PMV_EE4A1",
|
||||
"CMT_PMV_EE4A2",
|
||||
"CMT_PMV_EE4A3",
|
||||
"CMT_PMV_EE4B0",
|
||||
"CMT_PMV_EE4B1",
|
||||
"CMT_PMV_EE4B2",
|
||||
"CMT_PMV_EE4B3",
|
||||
"CMT_PMV_EE4BEG0",
|
||||
"CMT_PMV_EE4BEG1",
|
||||
"CMT_PMV_EE4BEG2",
|
||||
"CMT_PMV_EE4BEG3",
|
||||
"CMT_PMV_EE4C0",
|
||||
"CMT_PMV_EE4C1",
|
||||
"CMT_PMV_EE4C2",
|
||||
"CMT_PMV_EE4C3",
|
||||
"CMT_PMV_EL1BEG0",
|
||||
"CMT_PMV_EL1BEG1",
|
||||
"CMT_PMV_EL1BEG2",
|
||||
"CMT_PMV_EL1BEG3",
|
||||
"CMT_PMV_ER1BEG0",
|
||||
"CMT_PMV_ER1BEG1",
|
||||
"CMT_PMV_ER1BEG2",
|
||||
"CMT_PMV_ER1BEG3",
|
||||
"CMT_PMV_FAN0",
|
||||
"CMT_PMV_FAN1",
|
||||
"CMT_PMV_FAN2",
|
||||
"CMT_PMV_FAN3",
|
||||
"CMT_PMV_FAN4",
|
||||
"CMT_PMV_FAN5",
|
||||
"CMT_PMV_FAN6",
|
||||
"CMT_PMV_FAN7",
|
||||
"CMT_PMV_IMUX0",
|
||||
"CMT_PMV_IMUX1",
|
||||
"CMT_PMV_IMUX10",
|
||||
"CMT_PMV_IMUX11",
|
||||
"CMT_PMV_IMUX12",
|
||||
"CMT_PMV_IMUX13",
|
||||
"CMT_PMV_IMUX14",
|
||||
"CMT_PMV_IMUX15",
|
||||
"CMT_PMV_IMUX16",
|
||||
"CMT_PMV_IMUX17",
|
||||
"CMT_PMV_IMUX18",
|
||||
"CMT_PMV_IMUX19",
|
||||
"CMT_PMV_IMUX2",
|
||||
"CMT_PMV_IMUX20",
|
||||
"CMT_PMV_IMUX21",
|
||||
"CMT_PMV_IMUX22",
|
||||
"CMT_PMV_IMUX23",
|
||||
"CMT_PMV_IMUX24",
|
||||
"CMT_PMV_IMUX25",
|
||||
"CMT_PMV_IMUX26",
|
||||
"CMT_PMV_IMUX27",
|
||||
"CMT_PMV_IMUX28",
|
||||
"CMT_PMV_IMUX29",
|
||||
"CMT_PMV_IMUX3",
|
||||
"CMT_PMV_IMUX30",
|
||||
"CMT_PMV_IMUX31",
|
||||
"CMT_PMV_IMUX32",
|
||||
"CMT_PMV_IMUX33",
|
||||
"CMT_PMV_IMUX34",
|
||||
"CMT_PMV_IMUX35",
|
||||
"CMT_PMV_IMUX36",
|
||||
"CMT_PMV_IMUX37",
|
||||
"CMT_PMV_IMUX38",
|
||||
"CMT_PMV_IMUX39",
|
||||
"CMT_PMV_IMUX4",
|
||||
"CMT_PMV_IMUX40",
|
||||
"CMT_PMV_IMUX41",
|
||||
"CMT_PMV_IMUX42",
|
||||
"CMT_PMV_IMUX43",
|
||||
"CMT_PMV_IMUX44",
|
||||
"CMT_PMV_IMUX45",
|
||||
"CMT_PMV_IMUX46",
|
||||
"CMT_PMV_IMUX47",
|
||||
"CMT_PMV_IMUX5",
|
||||
"CMT_PMV_IMUX6",
|
||||
"CMT_PMV_IMUX7",
|
||||
"CMT_PMV_IMUX8",
|
||||
"CMT_PMV_IMUX9",
|
||||
"CMT_PMV_LH1",
|
||||
"CMT_PMV_LH10",
|
||||
"CMT_PMV_LH11",
|
||||
"CMT_PMV_LH12",
|
||||
"CMT_PMV_LH2",
|
||||
"CMT_PMV_LH3",
|
||||
"CMT_PMV_LH4",
|
||||
"CMT_PMV_LH5",
|
||||
"CMT_PMV_LH6",
|
||||
"CMT_PMV_LH7",
|
||||
"CMT_PMV_LH8",
|
||||
"CMT_PMV_LH9",
|
||||
"CMT_PMV_LOGIC_OUTS0",
|
||||
"CMT_PMV_LOGIC_OUTS1",
|
||||
"CMT_PMV_LOGIC_OUTS10",
|
||||
"CMT_PMV_LOGIC_OUTS11",
|
||||
"CMT_PMV_LOGIC_OUTS12",
|
||||
"CMT_PMV_LOGIC_OUTS13",
|
||||
"CMT_PMV_LOGIC_OUTS14",
|
||||
"CMT_PMV_LOGIC_OUTS15",
|
||||
"CMT_PMV_LOGIC_OUTS16",
|
||||
"CMT_PMV_LOGIC_OUTS17",
|
||||
"CMT_PMV_LOGIC_OUTS18",
|
||||
"CMT_PMV_LOGIC_OUTS19",
|
||||
"CMT_PMV_LOGIC_OUTS2",
|
||||
"CMT_PMV_LOGIC_OUTS20",
|
||||
"CMT_PMV_LOGIC_OUTS21",
|
||||
"CMT_PMV_LOGIC_OUTS22",
|
||||
"CMT_PMV_LOGIC_OUTS23",
|
||||
"CMT_PMV_LOGIC_OUTS3",
|
||||
"CMT_PMV_LOGIC_OUTS4",
|
||||
"CMT_PMV_LOGIC_OUTS5",
|
||||
"CMT_PMV_LOGIC_OUTS6",
|
||||
"CMT_PMV_LOGIC_OUTS7",
|
||||
"CMT_PMV_LOGIC_OUTS8",
|
||||
"CMT_PMV_LOGIC_OUTS9",
|
||||
"CMT_PMV_MONITOR_N",
|
||||
"CMT_PMV_MONITOR_P",
|
||||
"CMT_PMV_NE2A0",
|
||||
"CMT_PMV_NE2A1",
|
||||
"CMT_PMV_NE2A2",
|
||||
"CMT_PMV_NE2A3",
|
||||
"CMT_PMV_NE4BEG0",
|
||||
"CMT_PMV_NE4BEG1",
|
||||
"CMT_PMV_NE4BEG2",
|
||||
"CMT_PMV_NE4BEG3",
|
||||
"CMT_PMV_NE4C0",
|
||||
"CMT_PMV_NE4C1",
|
||||
"CMT_PMV_NE4C2",
|
||||
"CMT_PMV_NE4C3",
|
||||
"CMT_PMV_NW2A0",
|
||||
"CMT_PMV_NW2A1",
|
||||
"CMT_PMV_NW2A2",
|
||||
"CMT_PMV_NW2A3",
|
||||
"CMT_PMV_NW4A0",
|
||||
"CMT_PMV_NW4A1",
|
||||
"CMT_PMV_NW4A2",
|
||||
"CMT_PMV_NW4A3",
|
||||
"CMT_PMV_NW4END0",
|
||||
"CMT_PMV_NW4END1",
|
||||
"CMT_PMV_NW4END2",
|
||||
"CMT_PMV_NW4END3",
|
||||
"CMT_PMV_SE2A0",
|
||||
"CMT_PMV_SE2A1",
|
||||
"CMT_PMV_SE2A2",
|
||||
"CMT_PMV_SE2A3",
|
||||
"CMT_PMV_SE4BEG0",
|
||||
"CMT_PMV_SE4BEG1",
|
||||
"CMT_PMV_SE4BEG2",
|
||||
"CMT_PMV_SE4BEG3",
|
||||
"CMT_PMV_SE4C0",
|
||||
"CMT_PMV_SE4C1",
|
||||
"CMT_PMV_SE4C2",
|
||||
"CMT_PMV_SE4C3",
|
||||
"CMT_PMV_SW2A0",
|
||||
"CMT_PMV_SW2A1",
|
||||
"CMT_PMV_SW2A2",
|
||||
"CMT_PMV_SW2A3",
|
||||
"CMT_PMV_SW4A0",
|
||||
"CMT_PMV_SW4A1",
|
||||
"CMT_PMV_SW4A2",
|
||||
"CMT_PMV_SW4A3",
|
||||
"CMT_PMV_SW4END0",
|
||||
"CMT_PMV_SW4END1",
|
||||
"CMT_PMV_SW4END2",
|
||||
"CMT_PMV_SW4END3",
|
||||
"CMT_PMV_WL1END0",
|
||||
"CMT_PMV_WL1END1",
|
||||
"CMT_PMV_WL1END2",
|
||||
"CMT_PMV_WL1END3",
|
||||
"CMT_PMV_WR1END0",
|
||||
"CMT_PMV_WR1END1",
|
||||
"CMT_PMV_WR1END2",
|
||||
"CMT_PMV_WR1END3",
|
||||
"CMT_PMV_WW2A0",
|
||||
"CMT_PMV_WW2A1",
|
||||
"CMT_PMV_WW2A2",
|
||||
"CMT_PMV_WW2A3",
|
||||
"CMT_PMV_WW2END0",
|
||||
"CMT_PMV_WW2END1",
|
||||
"CMT_PMV_WW2END2",
|
||||
"CMT_PMV_WW2END3",
|
||||
"CMT_PMV_WW4A0",
|
||||
"CMT_PMV_WW4A1",
|
||||
"CMT_PMV_WW4A2",
|
||||
"CMT_PMV_WW4A3",
|
||||
"CMT_PMV_WW4B0",
|
||||
"CMT_PMV_WW4B1",
|
||||
"CMT_PMV_WW4B2",
|
||||
"CMT_PMV_WW4B3",
|
||||
"CMT_PMV_WW4C0",
|
||||
"CMT_PMV_WW4C1",
|
||||
"CMT_PMV_WW4C2",
|
||||
"CMT_PMV_WW4C3",
|
||||
"CMT_PMV_WW4END0",
|
||||
"CMT_PMV_WW4END1",
|
||||
"CMT_PMV_WW4END2",
|
||||
"CMT_PMV_WW4END3",
|
||||
"L_TERM_INT_PHASER_TO_IO_ICLK",
|
||||
"L_TERM_INT_PHASER_TO_IO_ICLKDIV",
|
||||
"L_TERM_INT_PHASER_TO_IO_OCLK",
|
||||
"L_TERM_INT_PHASER_TO_IO_OCLK1X_90",
|
||||
"L_TERM_INT_PHASER_TO_IO_OCLKDIV"
|
||||
]
|
||||
"wires": {
|
||||
"CMT_PMV_BYP0": null,
|
||||
"CMT_PMV_BYP1": null,
|
||||
"CMT_PMV_BYP2": null,
|
||||
"CMT_PMV_BYP3": null,
|
||||
"CMT_PMV_BYP4": null,
|
||||
"CMT_PMV_BYP5": null,
|
||||
"CMT_PMV_BYP6": null,
|
||||
"CMT_PMV_BYP7": null,
|
||||
"CMT_PMV_CLK0": null,
|
||||
"CMT_PMV_CLK1": null,
|
||||
"CMT_PMV_CTRL0": null,
|
||||
"CMT_PMV_CTRL1": null,
|
||||
"CMT_PMV_EE2A0": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE2A1": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE2A2": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE2A3": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE2BEG0": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE2BEG1": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE2BEG2": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE2BEG3": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE4A0": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE4A1": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE4A2": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE4A3": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE4B0": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE4B1": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE4B2": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE4B3": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE4BEG0": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE4BEG1": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE4BEG2": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE4BEG3": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE4C0": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE4C1": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE4C2": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EE4C3": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EL1BEG0": {
|
||||
"cap": "25.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EL1BEG1": {
|
||||
"cap": "25.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EL1BEG2": {
|
||||
"cap": "25.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_EL1BEG3": {
|
||||
"cap": "25.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_ER1BEG0": {
|
||||
"cap": "25.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_ER1BEG1": {
|
||||
"cap": "25.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_ER1BEG2": {
|
||||
"cap": "25.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_ER1BEG3": {
|
||||
"cap": "25.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_FAN0": null,
|
||||
"CMT_PMV_FAN1": null,
|
||||
"CMT_PMV_FAN2": null,
|
||||
"CMT_PMV_FAN3": null,
|
||||
"CMT_PMV_FAN4": null,
|
||||
"CMT_PMV_FAN5": null,
|
||||
"CMT_PMV_FAN6": null,
|
||||
"CMT_PMV_FAN7": null,
|
||||
"CMT_PMV_IMUX0": null,
|
||||
"CMT_PMV_IMUX1": null,
|
||||
"CMT_PMV_IMUX10": null,
|
||||
"CMT_PMV_IMUX11": null,
|
||||
"CMT_PMV_IMUX12": null,
|
||||
"CMT_PMV_IMUX13": null,
|
||||
"CMT_PMV_IMUX14": null,
|
||||
"CMT_PMV_IMUX15": null,
|
||||
"CMT_PMV_IMUX16": null,
|
||||
"CMT_PMV_IMUX17": null,
|
||||
"CMT_PMV_IMUX18": null,
|
||||
"CMT_PMV_IMUX19": null,
|
||||
"CMT_PMV_IMUX2": null,
|
||||
"CMT_PMV_IMUX20": null,
|
||||
"CMT_PMV_IMUX21": null,
|
||||
"CMT_PMV_IMUX22": null,
|
||||
"CMT_PMV_IMUX23": null,
|
||||
"CMT_PMV_IMUX24": null,
|
||||
"CMT_PMV_IMUX25": null,
|
||||
"CMT_PMV_IMUX26": null,
|
||||
"CMT_PMV_IMUX27": null,
|
||||
"CMT_PMV_IMUX28": null,
|
||||
"CMT_PMV_IMUX29": null,
|
||||
"CMT_PMV_IMUX3": null,
|
||||
"CMT_PMV_IMUX30": null,
|
||||
"CMT_PMV_IMUX31": null,
|
||||
"CMT_PMV_IMUX32": null,
|
||||
"CMT_PMV_IMUX33": null,
|
||||
"CMT_PMV_IMUX34": null,
|
||||
"CMT_PMV_IMUX35": null,
|
||||
"CMT_PMV_IMUX36": null,
|
||||
"CMT_PMV_IMUX37": null,
|
||||
"CMT_PMV_IMUX38": null,
|
||||
"CMT_PMV_IMUX39": null,
|
||||
"CMT_PMV_IMUX4": null,
|
||||
"CMT_PMV_IMUX40": null,
|
||||
"CMT_PMV_IMUX41": null,
|
||||
"CMT_PMV_IMUX42": null,
|
||||
"CMT_PMV_IMUX43": null,
|
||||
"CMT_PMV_IMUX44": null,
|
||||
"CMT_PMV_IMUX45": null,
|
||||
"CMT_PMV_IMUX46": null,
|
||||
"CMT_PMV_IMUX47": null,
|
||||
"CMT_PMV_IMUX5": null,
|
||||
"CMT_PMV_IMUX6": null,
|
||||
"CMT_PMV_IMUX7": null,
|
||||
"CMT_PMV_IMUX8": null,
|
||||
"CMT_PMV_IMUX9": null,
|
||||
"CMT_PMV_LH1": {
|
||||
"cap": "60.260",
|
||||
"res": "15.190"
|
||||
},
|
||||
"CMT_PMV_LH10": {
|
||||
"cap": "60.260",
|
||||
"res": "15.190"
|
||||
},
|
||||
"CMT_PMV_LH11": {
|
||||
"cap": "60.260",
|
||||
"res": "15.190"
|
||||
},
|
||||
"CMT_PMV_LH12": {
|
||||
"cap": "60.260",
|
||||
"res": "15.190"
|
||||
},
|
||||
"CMT_PMV_LH2": {
|
||||
"cap": "60.260",
|
||||
"res": "15.190"
|
||||
},
|
||||
"CMT_PMV_LH3": {
|
||||
"cap": "60.260",
|
||||
"res": "15.190"
|
||||
},
|
||||
"CMT_PMV_LH4": {
|
||||
"cap": "60.260",
|
||||
"res": "15.190"
|
||||
},
|
||||
"CMT_PMV_LH5": {
|
||||
"cap": "60.260",
|
||||
"res": "15.190"
|
||||
},
|
||||
"CMT_PMV_LH6": {
|
||||
"cap": "60.260",
|
||||
"res": "15.190"
|
||||
},
|
||||
"CMT_PMV_LH7": {
|
||||
"cap": "60.260",
|
||||
"res": "15.190"
|
||||
},
|
||||
"CMT_PMV_LH8": {
|
||||
"cap": "60.260",
|
||||
"res": "15.190"
|
||||
},
|
||||
"CMT_PMV_LH9": {
|
||||
"cap": "60.260",
|
||||
"res": "15.190"
|
||||
},
|
||||
"CMT_PMV_LOGIC_OUTS0": null,
|
||||
"CMT_PMV_LOGIC_OUTS1": null,
|
||||
"CMT_PMV_LOGIC_OUTS10": null,
|
||||
"CMT_PMV_LOGIC_OUTS11": null,
|
||||
"CMT_PMV_LOGIC_OUTS12": null,
|
||||
"CMT_PMV_LOGIC_OUTS13": null,
|
||||
"CMT_PMV_LOGIC_OUTS14": null,
|
||||
"CMT_PMV_LOGIC_OUTS15": null,
|
||||
"CMT_PMV_LOGIC_OUTS16": null,
|
||||
"CMT_PMV_LOGIC_OUTS17": null,
|
||||
"CMT_PMV_LOGIC_OUTS18": null,
|
||||
"CMT_PMV_LOGIC_OUTS19": null,
|
||||
"CMT_PMV_LOGIC_OUTS2": null,
|
||||
"CMT_PMV_LOGIC_OUTS20": null,
|
||||
"CMT_PMV_LOGIC_OUTS21": null,
|
||||
"CMT_PMV_LOGIC_OUTS22": null,
|
||||
"CMT_PMV_LOGIC_OUTS23": null,
|
||||
"CMT_PMV_LOGIC_OUTS3": null,
|
||||
"CMT_PMV_LOGIC_OUTS4": null,
|
||||
"CMT_PMV_LOGIC_OUTS5": null,
|
||||
"CMT_PMV_LOGIC_OUTS6": null,
|
||||
"CMT_PMV_LOGIC_OUTS7": null,
|
||||
"CMT_PMV_LOGIC_OUTS8": null,
|
||||
"CMT_PMV_LOGIC_OUTS9": null,
|
||||
"CMT_PMV_MONITOR_N": null,
|
||||
"CMT_PMV_MONITOR_P": null,
|
||||
"CMT_PMV_NE2A0": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NE2A1": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NE2A2": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NE2A3": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NE4BEG0": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NE4BEG1": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NE4BEG2": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NE4BEG3": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NE4C0": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NE4C1": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NE4C2": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NE4C3": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NW2A0": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NW2A1": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NW2A2": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NW2A3": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NW4A0": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NW4A1": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NW4A2": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NW4A3": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NW4END0": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NW4END1": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NW4END2": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_NW4END3": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SE2A0": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SE2A1": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SE2A2": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SE2A3": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SE4BEG0": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SE4BEG1": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SE4BEG2": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SE4BEG3": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SE4C0": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SE4C1": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SE4C2": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SE4C3": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SW2A0": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SW2A1": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SW2A2": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SW2A3": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SW4A0": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SW4A1": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SW4A2": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SW4A3": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SW4END0": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SW4END1": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SW4END2": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_SW4END3": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WL1END0": {
|
||||
"cap": "25.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WL1END1": {
|
||||
"cap": "25.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WL1END2": {
|
||||
"cap": "25.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WL1END3": {
|
||||
"cap": "25.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WR1END0": {
|
||||
"cap": "25.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WR1END1": {
|
||||
"cap": "25.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WR1END2": {
|
||||
"cap": "25.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WR1END3": {
|
||||
"cap": "25.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW2A0": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW2A1": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW2A2": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW2A3": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW2END0": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW2END1": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW2END2": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW2END3": {
|
||||
"cap": "22.067",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW4A0": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW4A1": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW4A2": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW4A3": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW4B0": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW4B1": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW4B2": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW4B3": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW4C0": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW4C1": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW4C2": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW4C3": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW4END0": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW4END1": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW4END2": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"CMT_PMV_WW4END3": {
|
||||
"cap": "18.000",
|
||||
"res": "317.510"
|
||||
},
|
||||
"L_TERM_INT_PHASER_TO_IO_ICLK": null,
|
||||
"L_TERM_INT_PHASER_TO_IO_ICLKDIV": null,
|
||||
"L_TERM_INT_PHASER_TO_IO_OCLK": null,
|
||||
"L_TERM_INT_PHASER_TO_IO_OCLK1X_90": null,
|
||||
"L_TERM_INT_PHASER_TO_IO_OCLKDIV": null
|
||||
}
|
||||
}
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -2,107 +2,107 @@
|
|||
"pips": {},
|
||||
"sites": [],
|
||||
"tile_type": "HCLK_BRAM",
|
||||
"wires": [
|
||||
"HCLK_BRAM_CASCADEA_L",
|
||||
"HCLK_BRAM_CASCADEA_R",
|
||||
"HCLK_BRAM_CASCADEB_L",
|
||||
"HCLK_BRAM_CASCADEB_R",
|
||||
"HCLK_BRAM_CASCIN_L_ADDRARDADDRU0",
|
||||
"HCLK_BRAM_CASCIN_L_ADDRARDADDRU1",
|
||||
"HCLK_BRAM_CASCIN_L_ADDRARDADDRU10",
|
||||
"HCLK_BRAM_CASCIN_L_ADDRARDADDRU11",
|
||||
"HCLK_BRAM_CASCIN_L_ADDRARDADDRU12",
|
||||
"HCLK_BRAM_CASCIN_L_ADDRARDADDRU13",
|
||||
"HCLK_BRAM_CASCIN_L_ADDRARDADDRU14",
|
||||
"HCLK_BRAM_CASCIN_L_ADDRARDADDRU2",
|
||||
"HCLK_BRAM_CASCIN_L_ADDRARDADDRU3",
|
||||
"HCLK_BRAM_CASCIN_L_ADDRARDADDRU4",
|
||||
"HCLK_BRAM_CASCIN_L_ADDRARDADDRU5",
|
||||
"HCLK_BRAM_CASCIN_L_ADDRARDADDRU6",
|
||||
"HCLK_BRAM_CASCIN_L_ADDRARDADDRU7",
|
||||
"HCLK_BRAM_CASCIN_L_ADDRARDADDRU8",
|
||||
"HCLK_BRAM_CASCIN_L_ADDRARDADDRU9",
|
||||
"HCLK_BRAM_CASCIN_L_ADDRBWRADDRU0",
|
||||
"HCLK_BRAM_CASCIN_L_ADDRBWRADDRU1",
|
||||
"HCLK_BRAM_CASCIN_L_ADDRBWRADDRU10",
|
||||
"HCLK_BRAM_CASCIN_L_ADDRBWRADDRU11",
|
||||
"HCLK_BRAM_CASCIN_L_ADDRBWRADDRU12",
|
||||
"HCLK_BRAM_CASCIN_L_ADDRBWRADDRU13",
|
||||
"HCLK_BRAM_CASCIN_L_ADDRBWRADDRU14",
|
||||
"HCLK_BRAM_CASCIN_L_ADDRBWRADDRU2",
|
||||
"HCLK_BRAM_CASCIN_L_ADDRBWRADDRU3",
|
||||
"HCLK_BRAM_CASCIN_L_ADDRBWRADDRU4",
|
||||
"HCLK_BRAM_CASCIN_L_ADDRBWRADDRU5",
|
||||
"HCLK_BRAM_CASCIN_L_ADDRBWRADDRU6",
|
||||
"HCLK_BRAM_CASCIN_L_ADDRBWRADDRU7",
|
||||
"HCLK_BRAM_CASCIN_L_ADDRBWRADDRU8",
|
||||
"HCLK_BRAM_CASCIN_L_ADDRBWRADDRU9",
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRARDADDRU0",
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRARDADDRU1",
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRARDADDRU10",
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRARDADDRU11",
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRARDADDRU12",
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRARDADDRU13",
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRARDADDRU14",
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRARDADDRU2",
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRARDADDRU3",
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRARDADDRU4",
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRARDADDRU5",
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRARDADDRU6",
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRARDADDRU7",
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRARDADDRU8",
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRARDADDRU9",
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU0",
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU1",
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU10",
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU11",
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU12",
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU13",
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU14",
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU2",
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU3",
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU4",
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU5",
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU6",
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU7",
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU8",
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU9",
|
||||
"HCLK_BRAM_CK_BUFHCLK0",
|
||||
"HCLK_BRAM_CK_BUFHCLK1",
|
||||
"HCLK_BRAM_CK_BUFHCLK10",
|
||||
"HCLK_BRAM_CK_BUFHCLK11",
|
||||
"HCLK_BRAM_CK_BUFHCLK2",
|
||||
"HCLK_BRAM_CK_BUFHCLK3",
|
||||
"HCLK_BRAM_CK_BUFHCLK4",
|
||||
"HCLK_BRAM_CK_BUFHCLK5",
|
||||
"HCLK_BRAM_CK_BUFHCLK6",
|
||||
"HCLK_BRAM_CK_BUFHCLK7",
|
||||
"HCLK_BRAM_CK_BUFHCLK8",
|
||||
"HCLK_BRAM_CK_BUFHCLK9",
|
||||
"HCLK_BRAM_CK_BUFRCLK0",
|
||||
"HCLK_BRAM_CK_BUFRCLK1",
|
||||
"HCLK_BRAM_CK_BUFRCLK2",
|
||||
"HCLK_BRAM_CK_BUFRCLK3",
|
||||
"HCLK_BRAM_CK_IN0",
|
||||
"HCLK_BRAM_CK_IN1",
|
||||
"HCLK_BRAM_CK_IN10",
|
||||
"HCLK_BRAM_CK_IN11",
|
||||
"HCLK_BRAM_CK_IN12",
|
||||
"HCLK_BRAM_CK_IN13",
|
||||
"HCLK_BRAM_CK_IN2",
|
||||
"HCLK_BRAM_CK_IN3",
|
||||
"HCLK_BRAM_CK_IN4",
|
||||
"HCLK_BRAM_CK_IN5",
|
||||
"HCLK_BRAM_CK_IN6",
|
||||
"HCLK_BRAM_CK_IN7",
|
||||
"HCLK_BRAM_CK_IN8",
|
||||
"HCLK_BRAM_CK_IN9",
|
||||
"HCLK_BRAM_PMVBRAM_O",
|
||||
"HCLK_BRAM_PMVBRAM_ODIV2",
|
||||
"HCLK_BRAM_PMVBRAM_ODIV4",
|
||||
"HCLK_BRAM_PMVBRAM_SELECT1",
|
||||
"HCLK_BRAM_PMVBRAM_SELECT2",
|
||||
"HCLK_BRAM_PMVBRAM_SELECT3",
|
||||
"HCLK_BRAM_PMVBRAM_SELECT4"
|
||||
]
|
||||
"wires": {
|
||||
"HCLK_BRAM_CASCADEA_L": null,
|
||||
"HCLK_BRAM_CASCADEA_R": null,
|
||||
"HCLK_BRAM_CASCADEB_L": null,
|
||||
"HCLK_BRAM_CASCADEB_R": null,
|
||||
"HCLK_BRAM_CASCIN_L_ADDRARDADDRU0": null,
|
||||
"HCLK_BRAM_CASCIN_L_ADDRARDADDRU1": null,
|
||||
"HCLK_BRAM_CASCIN_L_ADDRARDADDRU10": null,
|
||||
"HCLK_BRAM_CASCIN_L_ADDRARDADDRU11": null,
|
||||
"HCLK_BRAM_CASCIN_L_ADDRARDADDRU12": null,
|
||||
"HCLK_BRAM_CASCIN_L_ADDRARDADDRU13": null,
|
||||
"HCLK_BRAM_CASCIN_L_ADDRARDADDRU14": null,
|
||||
"HCLK_BRAM_CASCIN_L_ADDRARDADDRU2": null,
|
||||
"HCLK_BRAM_CASCIN_L_ADDRARDADDRU3": null,
|
||||
"HCLK_BRAM_CASCIN_L_ADDRARDADDRU4": null,
|
||||
"HCLK_BRAM_CASCIN_L_ADDRARDADDRU5": null,
|
||||
"HCLK_BRAM_CASCIN_L_ADDRARDADDRU6": null,
|
||||
"HCLK_BRAM_CASCIN_L_ADDRARDADDRU7": null,
|
||||
"HCLK_BRAM_CASCIN_L_ADDRARDADDRU8": null,
|
||||
"HCLK_BRAM_CASCIN_L_ADDRARDADDRU9": null,
|
||||
"HCLK_BRAM_CASCIN_L_ADDRBWRADDRU0": null,
|
||||
"HCLK_BRAM_CASCIN_L_ADDRBWRADDRU1": null,
|
||||
"HCLK_BRAM_CASCIN_L_ADDRBWRADDRU10": null,
|
||||
"HCLK_BRAM_CASCIN_L_ADDRBWRADDRU11": null,
|
||||
"HCLK_BRAM_CASCIN_L_ADDRBWRADDRU12": null,
|
||||
"HCLK_BRAM_CASCIN_L_ADDRBWRADDRU13": null,
|
||||
"HCLK_BRAM_CASCIN_L_ADDRBWRADDRU14": null,
|
||||
"HCLK_BRAM_CASCIN_L_ADDRBWRADDRU2": null,
|
||||
"HCLK_BRAM_CASCIN_L_ADDRBWRADDRU3": null,
|
||||
"HCLK_BRAM_CASCIN_L_ADDRBWRADDRU4": null,
|
||||
"HCLK_BRAM_CASCIN_L_ADDRBWRADDRU5": null,
|
||||
"HCLK_BRAM_CASCIN_L_ADDRBWRADDRU6": null,
|
||||
"HCLK_BRAM_CASCIN_L_ADDRBWRADDRU7": null,
|
||||
"HCLK_BRAM_CASCIN_L_ADDRBWRADDRU8": null,
|
||||
"HCLK_BRAM_CASCIN_L_ADDRBWRADDRU9": null,
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRARDADDRU0": null,
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRARDADDRU1": null,
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRARDADDRU10": null,
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRARDADDRU11": null,
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRARDADDRU12": null,
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRARDADDRU13": null,
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRARDADDRU14": null,
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRARDADDRU2": null,
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRARDADDRU3": null,
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRARDADDRU4": null,
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRARDADDRU5": null,
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRARDADDRU6": null,
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRARDADDRU7": null,
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRARDADDRU8": null,
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRARDADDRU9": null,
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU0": null,
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU1": null,
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU10": null,
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU11": null,
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU12": null,
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU13": null,
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU14": null,
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU2": null,
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU3": null,
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU4": null,
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU5": null,
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU6": null,
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU7": null,
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU8": null,
|
||||
"HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU9": null,
|
||||
"HCLK_BRAM_CK_BUFHCLK0": null,
|
||||
"HCLK_BRAM_CK_BUFHCLK1": null,
|
||||
"HCLK_BRAM_CK_BUFHCLK10": null,
|
||||
"HCLK_BRAM_CK_BUFHCLK11": null,
|
||||
"HCLK_BRAM_CK_BUFHCLK2": null,
|
||||
"HCLK_BRAM_CK_BUFHCLK3": null,
|
||||
"HCLK_BRAM_CK_BUFHCLK4": null,
|
||||
"HCLK_BRAM_CK_BUFHCLK5": null,
|
||||
"HCLK_BRAM_CK_BUFHCLK6": null,
|
||||
"HCLK_BRAM_CK_BUFHCLK7": null,
|
||||
"HCLK_BRAM_CK_BUFHCLK8": null,
|
||||
"HCLK_BRAM_CK_BUFHCLK9": null,
|
||||
"HCLK_BRAM_CK_BUFRCLK0": null,
|
||||
"HCLK_BRAM_CK_BUFRCLK1": null,
|
||||
"HCLK_BRAM_CK_BUFRCLK2": null,
|
||||
"HCLK_BRAM_CK_BUFRCLK3": null,
|
||||
"HCLK_BRAM_CK_IN0": null,
|
||||
"HCLK_BRAM_CK_IN1": null,
|
||||
"HCLK_BRAM_CK_IN10": null,
|
||||
"HCLK_BRAM_CK_IN11": null,
|
||||
"HCLK_BRAM_CK_IN12": null,
|
||||
"HCLK_BRAM_CK_IN13": null,
|
||||
"HCLK_BRAM_CK_IN2": null,
|
||||
"HCLK_BRAM_CK_IN3": null,
|
||||
"HCLK_BRAM_CK_IN4": null,
|
||||
"HCLK_BRAM_CK_IN5": null,
|
||||
"HCLK_BRAM_CK_IN6": null,
|
||||
"HCLK_BRAM_CK_IN7": null,
|
||||
"HCLK_BRAM_CK_IN8": null,
|
||||
"HCLK_BRAM_CK_IN9": null,
|
||||
"HCLK_BRAM_PMVBRAM_O": null,
|
||||
"HCLK_BRAM_PMVBRAM_ODIV2": null,
|
||||
"HCLK_BRAM_PMVBRAM_ODIV4": null,
|
||||
"HCLK_BRAM_PMVBRAM_SELECT1": null,
|
||||
"HCLK_BRAM_PMVBRAM_SELECT2": null,
|
||||
"HCLK_BRAM_PMVBRAM_SELECT3": null,
|
||||
"HCLK_BRAM_PMVBRAM_SELECT4": null
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,48 +2,60 @@
|
|||
"pips": {},
|
||||
"sites": [],
|
||||
"tile_type": "HCLK_CLB",
|
||||
"wires": [
|
||||
"HCLK_CLB_CK_BUFHCLK0",
|
||||
"HCLK_CLB_CK_BUFHCLK1",
|
||||
"HCLK_CLB_CK_BUFHCLK10",
|
||||
"HCLK_CLB_CK_BUFHCLK11",
|
||||
"HCLK_CLB_CK_BUFHCLK2",
|
||||
"HCLK_CLB_CK_BUFHCLK3",
|
||||
"HCLK_CLB_CK_BUFHCLK4",
|
||||
"HCLK_CLB_CK_BUFHCLK5",
|
||||
"HCLK_CLB_CK_BUFHCLK6",
|
||||
"HCLK_CLB_CK_BUFHCLK7",
|
||||
"HCLK_CLB_CK_BUFHCLK8",
|
||||
"HCLK_CLB_CK_BUFHCLK9",
|
||||
"HCLK_CLB_CK_BUFRCLK0",
|
||||
"HCLK_CLB_CK_BUFRCLK1",
|
||||
"HCLK_CLB_CK_BUFRCLK2",
|
||||
"HCLK_CLB_CK_BUFRCLK3",
|
||||
"HCLK_CLB_CK_IN0",
|
||||
"HCLK_CLB_CK_IN1",
|
||||
"HCLK_CLB_CK_IN10",
|
||||
"HCLK_CLB_CK_IN11",
|
||||
"HCLK_CLB_CK_IN12",
|
||||
"HCLK_CLB_CK_IN13",
|
||||
"HCLK_CLB_CK_IN2",
|
||||
"HCLK_CLB_CK_IN3",
|
||||
"HCLK_CLB_CK_IN4",
|
||||
"HCLK_CLB_CK_IN5",
|
||||
"HCLK_CLB_CK_IN6",
|
||||
"HCLK_CLB_CK_IN7",
|
||||
"HCLK_CLB_CK_IN8",
|
||||
"HCLK_CLB_CK_IN9",
|
||||
"HCLK_CLB_COUT0_L",
|
||||
"HCLK_CLB_COUT0_R",
|
||||
"HCLK_CLB_COUT1_L",
|
||||
"HCLK_CLB_COUT1_R",
|
||||
"HCLK_CLB_PERFCLK0",
|
||||
"HCLK_CLB_PERFCLK1",
|
||||
"HCLK_CLB_PERFCLK2",
|
||||
"HCLK_CLB_PERFCLK3",
|
||||
"HCLK_CLB_REFCK_EASTCLK0",
|
||||
"HCLK_CLB_REFCK_EASTCLK1",
|
||||
"HCLK_CLB_REFCK_WESTCLK0",
|
||||
"HCLK_CLB_REFCK_WESTCLK1"
|
||||
]
|
||||
"wires": {
|
||||
"HCLK_CLB_CK_BUFHCLK0": null,
|
||||
"HCLK_CLB_CK_BUFHCLK1": null,
|
||||
"HCLK_CLB_CK_BUFHCLK10": null,
|
||||
"HCLK_CLB_CK_BUFHCLK11": null,
|
||||
"HCLK_CLB_CK_BUFHCLK2": null,
|
||||
"HCLK_CLB_CK_BUFHCLK3": null,
|
||||
"HCLK_CLB_CK_BUFHCLK4": null,
|
||||
"HCLK_CLB_CK_BUFHCLK5": null,
|
||||
"HCLK_CLB_CK_BUFHCLK6": null,
|
||||
"HCLK_CLB_CK_BUFHCLK7": null,
|
||||
"HCLK_CLB_CK_BUFHCLK8": null,
|
||||
"HCLK_CLB_CK_BUFHCLK9": null,
|
||||
"HCLK_CLB_CK_BUFRCLK0": null,
|
||||
"HCLK_CLB_CK_BUFRCLK1": null,
|
||||
"HCLK_CLB_CK_BUFRCLK2": null,
|
||||
"HCLK_CLB_CK_BUFRCLK3": null,
|
||||
"HCLK_CLB_CK_IN0": null,
|
||||
"HCLK_CLB_CK_IN1": null,
|
||||
"HCLK_CLB_CK_IN10": null,
|
||||
"HCLK_CLB_CK_IN11": null,
|
||||
"HCLK_CLB_CK_IN12": null,
|
||||
"HCLK_CLB_CK_IN13": null,
|
||||
"HCLK_CLB_CK_IN2": null,
|
||||
"HCLK_CLB_CK_IN3": null,
|
||||
"HCLK_CLB_CK_IN4": null,
|
||||
"HCLK_CLB_CK_IN5": null,
|
||||
"HCLK_CLB_CK_IN6": null,
|
||||
"HCLK_CLB_CK_IN7": null,
|
||||
"HCLK_CLB_CK_IN8": null,
|
||||
"HCLK_CLB_CK_IN9": null,
|
||||
"HCLK_CLB_COUT0_L": {
|
||||
"cap": "13.000",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_CLB_COUT0_R": {
|
||||
"cap": "13.000",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_CLB_COUT1_L": {
|
||||
"cap": "13.000",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_CLB_COUT1_R": {
|
||||
"cap": "13.000",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_CLB_PERFCLK0": null,
|
||||
"HCLK_CLB_PERFCLK1": null,
|
||||
"HCLK_CLB_PERFCLK2": null,
|
||||
"HCLK_CLB_PERFCLK3": null,
|
||||
"HCLK_CLB_REFCK_EASTCLK0": null,
|
||||
"HCLK_CLB_REFCK_EASTCLK1": null,
|
||||
"HCLK_CLB_REFCK_WESTCLK0": null,
|
||||
"HCLK_CLB_REFCK_WESTCLK1": null
|
||||
}
|
||||
}
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -2,134 +2,428 @@
|
|||
"pips": {},
|
||||
"sites": [],
|
||||
"tile_type": "HCLK_DSP_L",
|
||||
"wires": [
|
||||
"HCLK_DSP_ACIN0",
|
||||
"HCLK_DSP_ACIN1",
|
||||
"HCLK_DSP_ACIN10",
|
||||
"HCLK_DSP_ACIN11",
|
||||
"HCLK_DSP_ACIN12",
|
||||
"HCLK_DSP_ACIN13",
|
||||
"HCLK_DSP_ACIN14",
|
||||
"HCLK_DSP_ACIN15",
|
||||
"HCLK_DSP_ACIN16",
|
||||
"HCLK_DSP_ACIN17",
|
||||
"HCLK_DSP_ACIN18",
|
||||
"HCLK_DSP_ACIN19",
|
||||
"HCLK_DSP_ACIN2",
|
||||
"HCLK_DSP_ACIN20",
|
||||
"HCLK_DSP_ACIN21",
|
||||
"HCLK_DSP_ACIN22",
|
||||
"HCLK_DSP_ACIN23",
|
||||
"HCLK_DSP_ACIN24",
|
||||
"HCLK_DSP_ACIN25",
|
||||
"HCLK_DSP_ACIN26",
|
||||
"HCLK_DSP_ACIN27",
|
||||
"HCLK_DSP_ACIN28",
|
||||
"HCLK_DSP_ACIN29",
|
||||
"HCLK_DSP_ACIN3",
|
||||
"HCLK_DSP_ACIN4",
|
||||
"HCLK_DSP_ACIN5",
|
||||
"HCLK_DSP_ACIN6",
|
||||
"HCLK_DSP_ACIN7",
|
||||
"HCLK_DSP_ACIN8",
|
||||
"HCLK_DSP_ACIN9",
|
||||
"HCLK_DSP_BCIN0",
|
||||
"HCLK_DSP_BCIN1",
|
||||
"HCLK_DSP_BCIN10",
|
||||
"HCLK_DSP_BCIN11",
|
||||
"HCLK_DSP_BCIN12",
|
||||
"HCLK_DSP_BCIN13",
|
||||
"HCLK_DSP_BCIN14",
|
||||
"HCLK_DSP_BCIN15",
|
||||
"HCLK_DSP_BCIN16",
|
||||
"HCLK_DSP_BCIN17",
|
||||
"HCLK_DSP_BCIN2",
|
||||
"HCLK_DSP_BCIN3",
|
||||
"HCLK_DSP_BCIN4",
|
||||
"HCLK_DSP_BCIN5",
|
||||
"HCLK_DSP_BCIN6",
|
||||
"HCLK_DSP_BCIN7",
|
||||
"HCLK_DSP_BCIN8",
|
||||
"HCLK_DSP_BCIN9",
|
||||
"HCLK_DSP_CARRYCASCIN",
|
||||
"HCLK_DSP_CK_BUFHCLK0",
|
||||
"HCLK_DSP_CK_BUFHCLK1",
|
||||
"HCLK_DSP_CK_BUFHCLK10",
|
||||
"HCLK_DSP_CK_BUFHCLK11",
|
||||
"HCLK_DSP_CK_BUFHCLK2",
|
||||
"HCLK_DSP_CK_BUFHCLK3",
|
||||
"HCLK_DSP_CK_BUFHCLK4",
|
||||
"HCLK_DSP_CK_BUFHCLK5",
|
||||
"HCLK_DSP_CK_BUFHCLK6",
|
||||
"HCLK_DSP_CK_BUFHCLK7",
|
||||
"HCLK_DSP_CK_BUFHCLK8",
|
||||
"HCLK_DSP_CK_BUFHCLK9",
|
||||
"HCLK_DSP_CK_BUFRCLK0",
|
||||
"HCLK_DSP_CK_BUFRCLK1",
|
||||
"HCLK_DSP_CK_BUFRCLK2",
|
||||
"HCLK_DSP_CK_BUFRCLK3",
|
||||
"HCLK_DSP_CK_IN0",
|
||||
"HCLK_DSP_CK_IN1",
|
||||
"HCLK_DSP_CK_IN10",
|
||||
"HCLK_DSP_CK_IN11",
|
||||
"HCLK_DSP_CK_IN12",
|
||||
"HCLK_DSP_CK_IN13",
|
||||
"HCLK_DSP_CK_IN2",
|
||||
"HCLK_DSP_CK_IN3",
|
||||
"HCLK_DSP_CK_IN4",
|
||||
"HCLK_DSP_CK_IN5",
|
||||
"HCLK_DSP_CK_IN6",
|
||||
"HCLK_DSP_CK_IN7",
|
||||
"HCLK_DSP_CK_IN8",
|
||||
"HCLK_DSP_CK_IN9",
|
||||
"HCLK_DSP_MULTSIGNIN",
|
||||
"HCLK_DSP_PCIN0",
|
||||
"HCLK_DSP_PCIN1",
|
||||
"HCLK_DSP_PCIN10",
|
||||
"HCLK_DSP_PCIN11",
|
||||
"HCLK_DSP_PCIN12",
|
||||
"HCLK_DSP_PCIN13",
|
||||
"HCLK_DSP_PCIN14",
|
||||
"HCLK_DSP_PCIN15",
|
||||
"HCLK_DSP_PCIN16",
|
||||
"HCLK_DSP_PCIN17",
|
||||
"HCLK_DSP_PCIN18",
|
||||
"HCLK_DSP_PCIN19",
|
||||
"HCLK_DSP_PCIN2",
|
||||
"HCLK_DSP_PCIN20",
|
||||
"HCLK_DSP_PCIN21",
|
||||
"HCLK_DSP_PCIN22",
|
||||
"HCLK_DSP_PCIN23",
|
||||
"HCLK_DSP_PCIN24",
|
||||
"HCLK_DSP_PCIN25",
|
||||
"HCLK_DSP_PCIN26",
|
||||
"HCLK_DSP_PCIN27",
|
||||
"HCLK_DSP_PCIN28",
|
||||
"HCLK_DSP_PCIN29",
|
||||
"HCLK_DSP_PCIN3",
|
||||
"HCLK_DSP_PCIN30",
|
||||
"HCLK_DSP_PCIN31",
|
||||
"HCLK_DSP_PCIN32",
|
||||
"HCLK_DSP_PCIN33",
|
||||
"HCLK_DSP_PCIN34",
|
||||
"HCLK_DSP_PCIN35",
|
||||
"HCLK_DSP_PCIN36",
|
||||
"HCLK_DSP_PCIN37",
|
||||
"HCLK_DSP_PCIN38",
|
||||
"HCLK_DSP_PCIN39",
|
||||
"HCLK_DSP_PCIN4",
|
||||
"HCLK_DSP_PCIN40",
|
||||
"HCLK_DSP_PCIN41",
|
||||
"HCLK_DSP_PCIN42",
|
||||
"HCLK_DSP_PCIN43",
|
||||
"HCLK_DSP_PCIN44",
|
||||
"HCLK_DSP_PCIN45",
|
||||
"HCLK_DSP_PCIN46",
|
||||
"HCLK_DSP_PCIN47",
|
||||
"HCLK_DSP_PCIN5",
|
||||
"HCLK_DSP_PCIN6",
|
||||
"HCLK_DSP_PCIN7",
|
||||
"HCLK_DSP_PCIN8",
|
||||
"HCLK_DSP_PCIN9"
|
||||
]
|
||||
"wires": {
|
||||
"HCLK_DSP_ACIN0": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN1": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN10": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN11": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN12": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN13": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN14": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN15": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN16": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN17": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN18": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN19": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN2": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN20": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN21": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN22": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN23": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN24": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN25": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN26": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN27": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN28": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN29": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN3": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN4": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN5": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN6": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN7": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN8": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN9": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN0": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN1": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN10": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN11": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN12": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN13": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN14": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN15": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN16": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN17": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN2": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN3": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN4": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN5": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN6": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN7": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN8": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN9": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_CARRYCASCIN": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_CK_BUFHCLK0": null,
|
||||
"HCLK_DSP_CK_BUFHCLK1": null,
|
||||
"HCLK_DSP_CK_BUFHCLK10": null,
|
||||
"HCLK_DSP_CK_BUFHCLK11": null,
|
||||
"HCLK_DSP_CK_BUFHCLK2": null,
|
||||
"HCLK_DSP_CK_BUFHCLK3": null,
|
||||
"HCLK_DSP_CK_BUFHCLK4": null,
|
||||
"HCLK_DSP_CK_BUFHCLK5": null,
|
||||
"HCLK_DSP_CK_BUFHCLK6": null,
|
||||
"HCLK_DSP_CK_BUFHCLK7": null,
|
||||
"HCLK_DSP_CK_BUFHCLK8": null,
|
||||
"HCLK_DSP_CK_BUFHCLK9": null,
|
||||
"HCLK_DSP_CK_BUFRCLK0": null,
|
||||
"HCLK_DSP_CK_BUFRCLK1": null,
|
||||
"HCLK_DSP_CK_BUFRCLK2": null,
|
||||
"HCLK_DSP_CK_BUFRCLK3": null,
|
||||
"HCLK_DSP_CK_IN0": null,
|
||||
"HCLK_DSP_CK_IN1": null,
|
||||
"HCLK_DSP_CK_IN10": null,
|
||||
"HCLK_DSP_CK_IN11": null,
|
||||
"HCLK_DSP_CK_IN12": null,
|
||||
"HCLK_DSP_CK_IN13": null,
|
||||
"HCLK_DSP_CK_IN2": null,
|
||||
"HCLK_DSP_CK_IN3": null,
|
||||
"HCLK_DSP_CK_IN4": null,
|
||||
"HCLK_DSP_CK_IN5": null,
|
||||
"HCLK_DSP_CK_IN6": null,
|
||||
"HCLK_DSP_CK_IN7": null,
|
||||
"HCLK_DSP_CK_IN8": null,
|
||||
"HCLK_DSP_CK_IN9": null,
|
||||
"HCLK_DSP_MULTSIGNIN": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN0": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN1": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN10": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN11": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN12": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN13": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN14": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN15": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN16": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN17": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN18": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN19": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN2": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN20": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN21": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN22": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN23": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN24": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN25": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN26": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN27": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN28": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN29": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN3": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN30": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN31": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN32": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN33": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN34": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN35": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN36": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN37": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN38": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN39": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN4": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN40": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN41": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN42": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN43": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN44": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN45": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN46": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN47": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN5": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN6": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN7": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN8": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN9": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,134 +2,428 @@
|
|||
"pips": {},
|
||||
"sites": [],
|
||||
"tile_type": "HCLK_DSP_R",
|
||||
"wires": [
|
||||
"HCLK_DSP_ACIN0",
|
||||
"HCLK_DSP_ACIN1",
|
||||
"HCLK_DSP_ACIN10",
|
||||
"HCLK_DSP_ACIN11",
|
||||
"HCLK_DSP_ACIN12",
|
||||
"HCLK_DSP_ACIN13",
|
||||
"HCLK_DSP_ACIN14",
|
||||
"HCLK_DSP_ACIN15",
|
||||
"HCLK_DSP_ACIN16",
|
||||
"HCLK_DSP_ACIN17",
|
||||
"HCLK_DSP_ACIN18",
|
||||
"HCLK_DSP_ACIN19",
|
||||
"HCLK_DSP_ACIN2",
|
||||
"HCLK_DSP_ACIN20",
|
||||
"HCLK_DSP_ACIN21",
|
||||
"HCLK_DSP_ACIN22",
|
||||
"HCLK_DSP_ACIN23",
|
||||
"HCLK_DSP_ACIN24",
|
||||
"HCLK_DSP_ACIN25",
|
||||
"HCLK_DSP_ACIN26",
|
||||
"HCLK_DSP_ACIN27",
|
||||
"HCLK_DSP_ACIN28",
|
||||
"HCLK_DSP_ACIN29",
|
||||
"HCLK_DSP_ACIN3",
|
||||
"HCLK_DSP_ACIN4",
|
||||
"HCLK_DSP_ACIN5",
|
||||
"HCLK_DSP_ACIN6",
|
||||
"HCLK_DSP_ACIN7",
|
||||
"HCLK_DSP_ACIN8",
|
||||
"HCLK_DSP_ACIN9",
|
||||
"HCLK_DSP_BCIN0",
|
||||
"HCLK_DSP_BCIN1",
|
||||
"HCLK_DSP_BCIN10",
|
||||
"HCLK_DSP_BCIN11",
|
||||
"HCLK_DSP_BCIN12",
|
||||
"HCLK_DSP_BCIN13",
|
||||
"HCLK_DSP_BCIN14",
|
||||
"HCLK_DSP_BCIN15",
|
||||
"HCLK_DSP_BCIN16",
|
||||
"HCLK_DSP_BCIN17",
|
||||
"HCLK_DSP_BCIN2",
|
||||
"HCLK_DSP_BCIN3",
|
||||
"HCLK_DSP_BCIN4",
|
||||
"HCLK_DSP_BCIN5",
|
||||
"HCLK_DSP_BCIN6",
|
||||
"HCLK_DSP_BCIN7",
|
||||
"HCLK_DSP_BCIN8",
|
||||
"HCLK_DSP_BCIN9",
|
||||
"HCLK_DSP_CARRYCASCIN",
|
||||
"HCLK_DSP_CK_BUFHCLK0",
|
||||
"HCLK_DSP_CK_BUFHCLK1",
|
||||
"HCLK_DSP_CK_BUFHCLK10",
|
||||
"HCLK_DSP_CK_BUFHCLK11",
|
||||
"HCLK_DSP_CK_BUFHCLK2",
|
||||
"HCLK_DSP_CK_BUFHCLK3",
|
||||
"HCLK_DSP_CK_BUFHCLK4",
|
||||
"HCLK_DSP_CK_BUFHCLK5",
|
||||
"HCLK_DSP_CK_BUFHCLK6",
|
||||
"HCLK_DSP_CK_BUFHCLK7",
|
||||
"HCLK_DSP_CK_BUFHCLK8",
|
||||
"HCLK_DSP_CK_BUFHCLK9",
|
||||
"HCLK_DSP_CK_BUFRCLK0",
|
||||
"HCLK_DSP_CK_BUFRCLK1",
|
||||
"HCLK_DSP_CK_BUFRCLK2",
|
||||
"HCLK_DSP_CK_BUFRCLK3",
|
||||
"HCLK_DSP_CK_IN0",
|
||||
"HCLK_DSP_CK_IN1",
|
||||
"HCLK_DSP_CK_IN10",
|
||||
"HCLK_DSP_CK_IN11",
|
||||
"HCLK_DSP_CK_IN12",
|
||||
"HCLK_DSP_CK_IN13",
|
||||
"HCLK_DSP_CK_IN2",
|
||||
"HCLK_DSP_CK_IN3",
|
||||
"HCLK_DSP_CK_IN4",
|
||||
"HCLK_DSP_CK_IN5",
|
||||
"HCLK_DSP_CK_IN6",
|
||||
"HCLK_DSP_CK_IN7",
|
||||
"HCLK_DSP_CK_IN8",
|
||||
"HCLK_DSP_CK_IN9",
|
||||
"HCLK_DSP_MULTSIGNIN",
|
||||
"HCLK_DSP_PCIN0",
|
||||
"HCLK_DSP_PCIN1",
|
||||
"HCLK_DSP_PCIN10",
|
||||
"HCLK_DSP_PCIN11",
|
||||
"HCLK_DSP_PCIN12",
|
||||
"HCLK_DSP_PCIN13",
|
||||
"HCLK_DSP_PCIN14",
|
||||
"HCLK_DSP_PCIN15",
|
||||
"HCLK_DSP_PCIN16",
|
||||
"HCLK_DSP_PCIN17",
|
||||
"HCLK_DSP_PCIN18",
|
||||
"HCLK_DSP_PCIN19",
|
||||
"HCLK_DSP_PCIN2",
|
||||
"HCLK_DSP_PCIN20",
|
||||
"HCLK_DSP_PCIN21",
|
||||
"HCLK_DSP_PCIN22",
|
||||
"HCLK_DSP_PCIN23",
|
||||
"HCLK_DSP_PCIN24",
|
||||
"HCLK_DSP_PCIN25",
|
||||
"HCLK_DSP_PCIN26",
|
||||
"HCLK_DSP_PCIN27",
|
||||
"HCLK_DSP_PCIN28",
|
||||
"HCLK_DSP_PCIN29",
|
||||
"HCLK_DSP_PCIN3",
|
||||
"HCLK_DSP_PCIN30",
|
||||
"HCLK_DSP_PCIN31",
|
||||
"HCLK_DSP_PCIN32",
|
||||
"HCLK_DSP_PCIN33",
|
||||
"HCLK_DSP_PCIN34",
|
||||
"HCLK_DSP_PCIN35",
|
||||
"HCLK_DSP_PCIN36",
|
||||
"HCLK_DSP_PCIN37",
|
||||
"HCLK_DSP_PCIN38",
|
||||
"HCLK_DSP_PCIN39",
|
||||
"HCLK_DSP_PCIN4",
|
||||
"HCLK_DSP_PCIN40",
|
||||
"HCLK_DSP_PCIN41",
|
||||
"HCLK_DSP_PCIN42",
|
||||
"HCLK_DSP_PCIN43",
|
||||
"HCLK_DSP_PCIN44",
|
||||
"HCLK_DSP_PCIN45",
|
||||
"HCLK_DSP_PCIN46",
|
||||
"HCLK_DSP_PCIN47",
|
||||
"HCLK_DSP_PCIN5",
|
||||
"HCLK_DSP_PCIN6",
|
||||
"HCLK_DSP_PCIN7",
|
||||
"HCLK_DSP_PCIN8",
|
||||
"HCLK_DSP_PCIN9"
|
||||
]
|
||||
"wires": {
|
||||
"HCLK_DSP_ACIN0": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN1": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN10": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN11": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN12": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN13": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN14": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN15": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN16": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN17": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN18": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN19": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN2": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN20": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN21": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN22": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN23": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN24": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN25": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN26": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN27": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN28": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN29": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN3": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN4": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN5": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN6": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN7": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN8": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_ACIN9": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN0": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN1": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN10": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN11": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN12": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN13": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN14": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN15": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN16": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN17": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN2": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN3": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN4": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN5": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN6": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN7": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN8": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_BCIN9": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_CARRYCASCIN": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_CK_BUFHCLK0": null,
|
||||
"HCLK_DSP_CK_BUFHCLK1": null,
|
||||
"HCLK_DSP_CK_BUFHCLK10": null,
|
||||
"HCLK_DSP_CK_BUFHCLK11": null,
|
||||
"HCLK_DSP_CK_BUFHCLK2": null,
|
||||
"HCLK_DSP_CK_BUFHCLK3": null,
|
||||
"HCLK_DSP_CK_BUFHCLK4": null,
|
||||
"HCLK_DSP_CK_BUFHCLK5": null,
|
||||
"HCLK_DSP_CK_BUFHCLK6": null,
|
||||
"HCLK_DSP_CK_BUFHCLK7": null,
|
||||
"HCLK_DSP_CK_BUFHCLK8": null,
|
||||
"HCLK_DSP_CK_BUFHCLK9": null,
|
||||
"HCLK_DSP_CK_BUFRCLK0": null,
|
||||
"HCLK_DSP_CK_BUFRCLK1": null,
|
||||
"HCLK_DSP_CK_BUFRCLK2": null,
|
||||
"HCLK_DSP_CK_BUFRCLK3": null,
|
||||
"HCLK_DSP_CK_IN0": null,
|
||||
"HCLK_DSP_CK_IN1": null,
|
||||
"HCLK_DSP_CK_IN10": null,
|
||||
"HCLK_DSP_CK_IN11": null,
|
||||
"HCLK_DSP_CK_IN12": null,
|
||||
"HCLK_DSP_CK_IN13": null,
|
||||
"HCLK_DSP_CK_IN2": null,
|
||||
"HCLK_DSP_CK_IN3": null,
|
||||
"HCLK_DSP_CK_IN4": null,
|
||||
"HCLK_DSP_CK_IN5": null,
|
||||
"HCLK_DSP_CK_IN6": null,
|
||||
"HCLK_DSP_CK_IN7": null,
|
||||
"HCLK_DSP_CK_IN8": null,
|
||||
"HCLK_DSP_CK_IN9": null,
|
||||
"HCLK_DSP_MULTSIGNIN": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN0": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN1": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN10": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN11": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN12": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN13": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN14": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN15": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN16": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN17": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN18": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN19": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN2": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN20": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN21": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN22": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN23": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN24": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN25": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN26": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN27": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN28": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN29": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN3": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN30": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN31": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN32": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN33": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN34": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN35": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN36": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN37": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN38": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN39": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN4": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN40": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN41": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN42": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN43": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN44": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN45": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN46": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN47": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN5": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN6": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN7": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN8": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
},
|
||||
"HCLK_DSP_PCIN9": {
|
||||
"cap": "31.166",
|
||||
"res": "0.000"
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,36 +2,36 @@
|
|||
"pips": {},
|
||||
"sites": [],
|
||||
"tile_type": "HCLK_FEEDTHRU_1",
|
||||
"wires": [
|
||||
"HCLK_FEEDTHRU_1_CK_BUFHCLK0",
|
||||
"HCLK_FEEDTHRU_1_CK_BUFHCLK1",
|
||||
"HCLK_FEEDTHRU_1_CK_BUFHCLK10",
|
||||
"HCLK_FEEDTHRU_1_CK_BUFHCLK11",
|
||||
"HCLK_FEEDTHRU_1_CK_BUFHCLK2",
|
||||
"HCLK_FEEDTHRU_1_CK_BUFHCLK3",
|
||||
"HCLK_FEEDTHRU_1_CK_BUFHCLK4",
|
||||
"HCLK_FEEDTHRU_1_CK_BUFHCLK5",
|
||||
"HCLK_FEEDTHRU_1_CK_BUFHCLK6",
|
||||
"HCLK_FEEDTHRU_1_CK_BUFHCLK7",
|
||||
"HCLK_FEEDTHRU_1_CK_BUFHCLK8",
|
||||
"HCLK_FEEDTHRU_1_CK_BUFHCLK9",
|
||||
"HCLK_FEEDTHRU_1_CK_BUFRCLK0",
|
||||
"HCLK_FEEDTHRU_1_CK_BUFRCLK1",
|
||||
"HCLK_FEEDTHRU_1_CK_BUFRCLK2",
|
||||
"HCLK_FEEDTHRU_1_CK_BUFRCLK3",
|
||||
"HCLK_FEEDTHRU_1_CK_IN0",
|
||||
"HCLK_FEEDTHRU_1_CK_IN1",
|
||||
"HCLK_FEEDTHRU_1_CK_IN10",
|
||||
"HCLK_FEEDTHRU_1_CK_IN11",
|
||||
"HCLK_FEEDTHRU_1_CK_IN12",
|
||||
"HCLK_FEEDTHRU_1_CK_IN13",
|
||||
"HCLK_FEEDTHRU_1_CK_IN2",
|
||||
"HCLK_FEEDTHRU_1_CK_IN3",
|
||||
"HCLK_FEEDTHRU_1_CK_IN4",
|
||||
"HCLK_FEEDTHRU_1_CK_IN5",
|
||||
"HCLK_FEEDTHRU_1_CK_IN6",
|
||||
"HCLK_FEEDTHRU_1_CK_IN7",
|
||||
"HCLK_FEEDTHRU_1_CK_IN8",
|
||||
"HCLK_FEEDTHRU_1_CK_IN9"
|
||||
]
|
||||
"wires": {
|
||||
"HCLK_FEEDTHRU_1_CK_BUFHCLK0": null,
|
||||
"HCLK_FEEDTHRU_1_CK_BUFHCLK1": null,
|
||||
"HCLK_FEEDTHRU_1_CK_BUFHCLK10": null,
|
||||
"HCLK_FEEDTHRU_1_CK_BUFHCLK11": null,
|
||||
"HCLK_FEEDTHRU_1_CK_BUFHCLK2": null,
|
||||
"HCLK_FEEDTHRU_1_CK_BUFHCLK3": null,
|
||||
"HCLK_FEEDTHRU_1_CK_BUFHCLK4": null,
|
||||
"HCLK_FEEDTHRU_1_CK_BUFHCLK5": null,
|
||||
"HCLK_FEEDTHRU_1_CK_BUFHCLK6": null,
|
||||
"HCLK_FEEDTHRU_1_CK_BUFHCLK7": null,
|
||||
"HCLK_FEEDTHRU_1_CK_BUFHCLK8": null,
|
||||
"HCLK_FEEDTHRU_1_CK_BUFHCLK9": null,
|
||||
"HCLK_FEEDTHRU_1_CK_BUFRCLK0": null,
|
||||
"HCLK_FEEDTHRU_1_CK_BUFRCLK1": null,
|
||||
"HCLK_FEEDTHRU_1_CK_BUFRCLK2": null,
|
||||
"HCLK_FEEDTHRU_1_CK_BUFRCLK3": null,
|
||||
"HCLK_FEEDTHRU_1_CK_IN0": null,
|
||||
"HCLK_FEEDTHRU_1_CK_IN1": null,
|
||||
"HCLK_FEEDTHRU_1_CK_IN10": null,
|
||||
"HCLK_FEEDTHRU_1_CK_IN11": null,
|
||||
"HCLK_FEEDTHRU_1_CK_IN12": null,
|
||||
"HCLK_FEEDTHRU_1_CK_IN13": null,
|
||||
"HCLK_FEEDTHRU_1_CK_IN2": null,
|
||||
"HCLK_FEEDTHRU_1_CK_IN3": null,
|
||||
"HCLK_FEEDTHRU_1_CK_IN4": null,
|
||||
"HCLK_FEEDTHRU_1_CK_IN5": null,
|
||||
"HCLK_FEEDTHRU_1_CK_IN6": null,
|
||||
"HCLK_FEEDTHRU_1_CK_IN7": null,
|
||||
"HCLK_FEEDTHRU_1_CK_IN8": null,
|
||||
"HCLK_FEEDTHRU_1_CK_IN9": null
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,36 +2,36 @@
|
|||
"pips": {},
|
||||
"sites": [],
|
||||
"tile_type": "HCLK_FEEDTHRU_2",
|
||||
"wires": [
|
||||
"HCLK_FEEDTHRU_2_CK_BUFHCLK0",
|
||||
"HCLK_FEEDTHRU_2_CK_BUFHCLK1",
|
||||
"HCLK_FEEDTHRU_2_CK_BUFHCLK10",
|
||||
"HCLK_FEEDTHRU_2_CK_BUFHCLK11",
|
||||
"HCLK_FEEDTHRU_2_CK_BUFHCLK2",
|
||||
"HCLK_FEEDTHRU_2_CK_BUFHCLK3",
|
||||
"HCLK_FEEDTHRU_2_CK_BUFHCLK4",
|
||||
"HCLK_FEEDTHRU_2_CK_BUFHCLK5",
|
||||
"HCLK_FEEDTHRU_2_CK_BUFHCLK6",
|
||||
"HCLK_FEEDTHRU_2_CK_BUFHCLK7",
|
||||
"HCLK_FEEDTHRU_2_CK_BUFHCLK8",
|
||||
"HCLK_FEEDTHRU_2_CK_BUFHCLK9",
|
||||
"HCLK_FEEDTHRU_2_CK_BUFRCLK0",
|
||||
"HCLK_FEEDTHRU_2_CK_BUFRCLK1",
|
||||
"HCLK_FEEDTHRU_2_CK_BUFRCLK2",
|
||||
"HCLK_FEEDTHRU_2_CK_BUFRCLK3",
|
||||
"HCLK_FEEDTHRU_2_CK_IN0",
|
||||
"HCLK_FEEDTHRU_2_CK_IN1",
|
||||
"HCLK_FEEDTHRU_2_CK_IN10",
|
||||
"HCLK_FEEDTHRU_2_CK_IN11",
|
||||
"HCLK_FEEDTHRU_2_CK_IN12",
|
||||
"HCLK_FEEDTHRU_2_CK_IN13",
|
||||
"HCLK_FEEDTHRU_2_CK_IN2",
|
||||
"HCLK_FEEDTHRU_2_CK_IN3",
|
||||
"HCLK_FEEDTHRU_2_CK_IN4",
|
||||
"HCLK_FEEDTHRU_2_CK_IN5",
|
||||
"HCLK_FEEDTHRU_2_CK_IN6",
|
||||
"HCLK_FEEDTHRU_2_CK_IN7",
|
||||
"HCLK_FEEDTHRU_2_CK_IN8",
|
||||
"HCLK_FEEDTHRU_2_CK_IN9"
|
||||
]
|
||||
"wires": {
|
||||
"HCLK_FEEDTHRU_2_CK_BUFHCLK0": null,
|
||||
"HCLK_FEEDTHRU_2_CK_BUFHCLK1": null,
|
||||
"HCLK_FEEDTHRU_2_CK_BUFHCLK10": null,
|
||||
"HCLK_FEEDTHRU_2_CK_BUFHCLK11": null,
|
||||
"HCLK_FEEDTHRU_2_CK_BUFHCLK2": null,
|
||||
"HCLK_FEEDTHRU_2_CK_BUFHCLK3": null,
|
||||
"HCLK_FEEDTHRU_2_CK_BUFHCLK4": null,
|
||||
"HCLK_FEEDTHRU_2_CK_BUFHCLK5": null,
|
||||
"HCLK_FEEDTHRU_2_CK_BUFHCLK6": null,
|
||||
"HCLK_FEEDTHRU_2_CK_BUFHCLK7": null,
|
||||
"HCLK_FEEDTHRU_2_CK_BUFHCLK8": null,
|
||||
"HCLK_FEEDTHRU_2_CK_BUFHCLK9": null,
|
||||
"HCLK_FEEDTHRU_2_CK_BUFRCLK0": null,
|
||||
"HCLK_FEEDTHRU_2_CK_BUFRCLK1": null,
|
||||
"HCLK_FEEDTHRU_2_CK_BUFRCLK2": null,
|
||||
"HCLK_FEEDTHRU_2_CK_BUFRCLK3": null,
|
||||
"HCLK_FEEDTHRU_2_CK_IN0": null,
|
||||
"HCLK_FEEDTHRU_2_CK_IN1": null,
|
||||
"HCLK_FEEDTHRU_2_CK_IN10": null,
|
||||
"HCLK_FEEDTHRU_2_CK_IN11": null,
|
||||
"HCLK_FEEDTHRU_2_CK_IN12": null,
|
||||
"HCLK_FEEDTHRU_2_CK_IN13": null,
|
||||
"HCLK_FEEDTHRU_2_CK_IN2": null,
|
||||
"HCLK_FEEDTHRU_2_CK_IN3": null,
|
||||
"HCLK_FEEDTHRU_2_CK_IN4": null,
|
||||
"HCLK_FEEDTHRU_2_CK_IN5": null,
|
||||
"HCLK_FEEDTHRU_2_CK_IN6": null,
|
||||
"HCLK_FEEDTHRU_2_CK_IN7": null,
|
||||
"HCLK_FEEDTHRU_2_CK_IN8": null,
|
||||
"HCLK_FEEDTHRU_2_CK_IN9": null
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,44 +2,44 @@
|
|||
"pips": {},
|
||||
"sites": [],
|
||||
"tile_type": "HCLK_FIFO_L",
|
||||
"wires": [
|
||||
"HCLK_FIFO_CCIO0",
|
||||
"HCLK_FIFO_CCIO1",
|
||||
"HCLK_FIFO_CCIO2",
|
||||
"HCLK_FIFO_CCIO3",
|
||||
"HCLK_FIFO_CK_BUFHCLK0",
|
||||
"HCLK_FIFO_CK_BUFHCLK1",
|
||||
"HCLK_FIFO_CK_BUFHCLK10",
|
||||
"HCLK_FIFO_CK_BUFHCLK11",
|
||||
"HCLK_FIFO_CK_BUFHCLK2",
|
||||
"HCLK_FIFO_CK_BUFHCLK3",
|
||||
"HCLK_FIFO_CK_BUFHCLK4",
|
||||
"HCLK_FIFO_CK_BUFHCLK5",
|
||||
"HCLK_FIFO_CK_BUFHCLK6",
|
||||
"HCLK_FIFO_CK_BUFHCLK7",
|
||||
"HCLK_FIFO_CK_BUFHCLK8",
|
||||
"HCLK_FIFO_CK_BUFHCLK9",
|
||||
"HCLK_FIFO_CK_BUFRCLK0",
|
||||
"HCLK_FIFO_CK_BUFRCLK1",
|
||||
"HCLK_FIFO_CK_BUFRCLK2",
|
||||
"HCLK_FIFO_CK_BUFRCLK3",
|
||||
"HCLK_FIFO_CK_IN0",
|
||||
"HCLK_FIFO_CK_IN1",
|
||||
"HCLK_FIFO_CK_IN10",
|
||||
"HCLK_FIFO_CK_IN11",
|
||||
"HCLK_FIFO_CK_IN12",
|
||||
"HCLK_FIFO_CK_IN13",
|
||||
"HCLK_FIFO_CK_IN2",
|
||||
"HCLK_FIFO_CK_IN3",
|
||||
"HCLK_FIFO_CK_IN4",
|
||||
"HCLK_FIFO_CK_IN5",
|
||||
"HCLK_FIFO_CK_IN6",
|
||||
"HCLK_FIFO_CK_IN7",
|
||||
"HCLK_FIFO_CK_IN8",
|
||||
"HCLK_FIFO_CK_IN9",
|
||||
"HCLK_FIFO_PERFCLK0",
|
||||
"HCLK_FIFO_PERFCLK1",
|
||||
"HCLK_FIFO_PERFCLK2",
|
||||
"HCLK_FIFO_PERFCLK3"
|
||||
]
|
||||
"wires": {
|
||||
"HCLK_FIFO_CCIO0": null,
|
||||
"HCLK_FIFO_CCIO1": null,
|
||||
"HCLK_FIFO_CCIO2": null,
|
||||
"HCLK_FIFO_CCIO3": null,
|
||||
"HCLK_FIFO_CK_BUFHCLK0": null,
|
||||
"HCLK_FIFO_CK_BUFHCLK1": null,
|
||||
"HCLK_FIFO_CK_BUFHCLK10": null,
|
||||
"HCLK_FIFO_CK_BUFHCLK11": null,
|
||||
"HCLK_FIFO_CK_BUFHCLK2": null,
|
||||
"HCLK_FIFO_CK_BUFHCLK3": null,
|
||||
"HCLK_FIFO_CK_BUFHCLK4": null,
|
||||
"HCLK_FIFO_CK_BUFHCLK5": null,
|
||||
"HCLK_FIFO_CK_BUFHCLK6": null,
|
||||
"HCLK_FIFO_CK_BUFHCLK7": null,
|
||||
"HCLK_FIFO_CK_BUFHCLK8": null,
|
||||
"HCLK_FIFO_CK_BUFHCLK9": null,
|
||||
"HCLK_FIFO_CK_BUFRCLK0": null,
|
||||
"HCLK_FIFO_CK_BUFRCLK1": null,
|
||||
"HCLK_FIFO_CK_BUFRCLK2": null,
|
||||
"HCLK_FIFO_CK_BUFRCLK3": null,
|
||||
"HCLK_FIFO_CK_IN0": null,
|
||||
"HCLK_FIFO_CK_IN1": null,
|
||||
"HCLK_FIFO_CK_IN10": null,
|
||||
"HCLK_FIFO_CK_IN11": null,
|
||||
"HCLK_FIFO_CK_IN12": null,
|
||||
"HCLK_FIFO_CK_IN13": null,
|
||||
"HCLK_FIFO_CK_IN2": null,
|
||||
"HCLK_FIFO_CK_IN3": null,
|
||||
"HCLK_FIFO_CK_IN4": null,
|
||||
"HCLK_FIFO_CK_IN5": null,
|
||||
"HCLK_FIFO_CK_IN6": null,
|
||||
"HCLK_FIFO_CK_IN7": null,
|
||||
"HCLK_FIFO_CK_IN8": null,
|
||||
"HCLK_FIFO_CK_IN9": null,
|
||||
"HCLK_FIFO_PERFCLK0": null,
|
||||
"HCLK_FIFO_PERFCLK1": null,
|
||||
"HCLK_FIFO_PERFCLK2": null,
|
||||
"HCLK_FIFO_PERFCLK3": null
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,20 +2,20 @@
|
|||
"pips": {},
|
||||
"sites": [],
|
||||
"tile_type": "HCLK_GTX",
|
||||
"wires": [
|
||||
"HCLK_GTX_CK_IN0",
|
||||
"HCLK_GTX_CK_IN1",
|
||||
"HCLK_GTX_CK_IN10",
|
||||
"HCLK_GTX_CK_IN11",
|
||||
"HCLK_GTX_CK_IN12",
|
||||
"HCLK_GTX_CK_IN13",
|
||||
"HCLK_GTX_CK_IN2",
|
||||
"HCLK_GTX_CK_IN3",
|
||||
"HCLK_GTX_CK_IN4",
|
||||
"HCLK_GTX_CK_IN5",
|
||||
"HCLK_GTX_CK_IN6",
|
||||
"HCLK_GTX_CK_IN7",
|
||||
"HCLK_GTX_CK_IN8",
|
||||
"HCLK_GTX_CK_IN9"
|
||||
]
|
||||
"wires": {
|
||||
"HCLK_GTX_CK_IN0": null,
|
||||
"HCLK_GTX_CK_IN1": null,
|
||||
"HCLK_GTX_CK_IN10": null,
|
||||
"HCLK_GTX_CK_IN11": null,
|
||||
"HCLK_GTX_CK_IN12": null,
|
||||
"HCLK_GTX_CK_IN13": null,
|
||||
"HCLK_GTX_CK_IN2": null,
|
||||
"HCLK_GTX_CK_IN3": null,
|
||||
"HCLK_GTX_CK_IN4": null,
|
||||
"HCLK_GTX_CK_IN5": null,
|
||||
"HCLK_GTX_CK_IN6": null,
|
||||
"HCLK_GTX_CK_IN7": null,
|
||||
"HCLK_GTX_CK_IN8": null,
|
||||
"HCLK_GTX_CK_IN9": null
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,48 +2,48 @@
|
|||
"pips": {},
|
||||
"sites": [],
|
||||
"tile_type": "HCLK_INT_INTERFACE",
|
||||
"wires": [
|
||||
"HCLK_INT_INTERFACE_CCIO0",
|
||||
"HCLK_INT_INTERFACE_CCIO1",
|
||||
"HCLK_INT_INTERFACE_CCIO2",
|
||||
"HCLK_INT_INTERFACE_CCIO3",
|
||||
"HCLK_INT_INTERFACE_CK_BUFHCLK0",
|
||||
"HCLK_INT_INTERFACE_CK_BUFHCLK1",
|
||||
"HCLK_INT_INTERFACE_CK_BUFHCLK10",
|
||||
"HCLK_INT_INTERFACE_CK_BUFHCLK11",
|
||||
"HCLK_INT_INTERFACE_CK_BUFHCLK2",
|
||||
"HCLK_INT_INTERFACE_CK_BUFHCLK3",
|
||||
"HCLK_INT_INTERFACE_CK_BUFHCLK4",
|
||||
"HCLK_INT_INTERFACE_CK_BUFHCLK5",
|
||||
"HCLK_INT_INTERFACE_CK_BUFHCLK6",
|
||||
"HCLK_INT_INTERFACE_CK_BUFHCLK7",
|
||||
"HCLK_INT_INTERFACE_CK_BUFHCLK8",
|
||||
"HCLK_INT_INTERFACE_CK_BUFHCLK9",
|
||||
"HCLK_INT_INTERFACE_CK_BUFRCLK0",
|
||||
"HCLK_INT_INTERFACE_CK_BUFRCLK1",
|
||||
"HCLK_INT_INTERFACE_CK_BUFRCLK2",
|
||||
"HCLK_INT_INTERFACE_CK_BUFRCLK3",
|
||||
"HCLK_INT_INTERFACE_CK_IN0",
|
||||
"HCLK_INT_INTERFACE_CK_IN1",
|
||||
"HCLK_INT_INTERFACE_CK_IN10",
|
||||
"HCLK_INT_INTERFACE_CK_IN11",
|
||||
"HCLK_INT_INTERFACE_CK_IN12",
|
||||
"HCLK_INT_INTERFACE_CK_IN13",
|
||||
"HCLK_INT_INTERFACE_CK_IN2",
|
||||
"HCLK_INT_INTERFACE_CK_IN3",
|
||||
"HCLK_INT_INTERFACE_CK_IN4",
|
||||
"HCLK_INT_INTERFACE_CK_IN5",
|
||||
"HCLK_INT_INTERFACE_CK_IN6",
|
||||
"HCLK_INT_INTERFACE_CK_IN7",
|
||||
"HCLK_INT_INTERFACE_CK_IN8",
|
||||
"HCLK_INT_INTERFACE_CK_IN9",
|
||||
"HCLK_INT_INTERFACE_PERFCLK0",
|
||||
"HCLK_INT_INTERFACE_PERFCLK1",
|
||||
"HCLK_INT_INTERFACE_PERFCLK2",
|
||||
"HCLK_INT_INTERFACE_PERFCLK3",
|
||||
"HCLK_INT_INTERFACE_REFCK_EASTCLK0",
|
||||
"HCLK_INT_INTERFACE_REFCK_EASTCLK1",
|
||||
"HCLK_INT_INTERFACE_REFCK_WESTCLK0",
|
||||
"HCLK_INT_INTERFACE_REFCK_WESTCLK1"
|
||||
]
|
||||
"wires": {
|
||||
"HCLK_INT_INTERFACE_CCIO0": null,
|
||||
"HCLK_INT_INTERFACE_CCIO1": null,
|
||||
"HCLK_INT_INTERFACE_CCIO2": null,
|
||||
"HCLK_INT_INTERFACE_CCIO3": null,
|
||||
"HCLK_INT_INTERFACE_CK_BUFHCLK0": null,
|
||||
"HCLK_INT_INTERFACE_CK_BUFHCLK1": null,
|
||||
"HCLK_INT_INTERFACE_CK_BUFHCLK10": null,
|
||||
"HCLK_INT_INTERFACE_CK_BUFHCLK11": null,
|
||||
"HCLK_INT_INTERFACE_CK_BUFHCLK2": null,
|
||||
"HCLK_INT_INTERFACE_CK_BUFHCLK3": null,
|
||||
"HCLK_INT_INTERFACE_CK_BUFHCLK4": null,
|
||||
"HCLK_INT_INTERFACE_CK_BUFHCLK5": null,
|
||||
"HCLK_INT_INTERFACE_CK_BUFHCLK6": null,
|
||||
"HCLK_INT_INTERFACE_CK_BUFHCLK7": null,
|
||||
"HCLK_INT_INTERFACE_CK_BUFHCLK8": null,
|
||||
"HCLK_INT_INTERFACE_CK_BUFHCLK9": null,
|
||||
"HCLK_INT_INTERFACE_CK_BUFRCLK0": null,
|
||||
"HCLK_INT_INTERFACE_CK_BUFRCLK1": null,
|
||||
"HCLK_INT_INTERFACE_CK_BUFRCLK2": null,
|
||||
"HCLK_INT_INTERFACE_CK_BUFRCLK3": null,
|
||||
"HCLK_INT_INTERFACE_CK_IN0": null,
|
||||
"HCLK_INT_INTERFACE_CK_IN1": null,
|
||||
"HCLK_INT_INTERFACE_CK_IN10": null,
|
||||
"HCLK_INT_INTERFACE_CK_IN11": null,
|
||||
"HCLK_INT_INTERFACE_CK_IN12": null,
|
||||
"HCLK_INT_INTERFACE_CK_IN13": null,
|
||||
"HCLK_INT_INTERFACE_CK_IN2": null,
|
||||
"HCLK_INT_INTERFACE_CK_IN3": null,
|
||||
"HCLK_INT_INTERFACE_CK_IN4": null,
|
||||
"HCLK_INT_INTERFACE_CK_IN5": null,
|
||||
"HCLK_INT_INTERFACE_CK_IN6": null,
|
||||
"HCLK_INT_INTERFACE_CK_IN7": null,
|
||||
"HCLK_INT_INTERFACE_CK_IN8": null,
|
||||
"HCLK_INT_INTERFACE_CK_IN9": null,
|
||||
"HCLK_INT_INTERFACE_PERFCLK0": null,
|
||||
"HCLK_INT_INTERFACE_PERFCLK1": null,
|
||||
"HCLK_INT_INTERFACE_PERFCLK2": null,
|
||||
"HCLK_INT_INTERFACE_PERFCLK3": null,
|
||||
"HCLK_INT_INTERFACE_REFCK_EASTCLK0": null,
|
||||
"HCLK_INT_INTERFACE_REFCK_EASTCLK1": null,
|
||||
"HCLK_INT_INTERFACE_REFCK_WESTCLK0": null,
|
||||
"HCLK_INT_INTERFACE_REFCK_WESTCLK1": null
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,40 +2,82 @@
|
|||
"pips": {},
|
||||
"sites": [],
|
||||
"tile_type": "HCLK_IOB",
|
||||
"wires": [
|
||||
"HCLK_IOB_CK_BUFHCLK0",
|
||||
"HCLK_IOB_CK_BUFHCLK1",
|
||||
"HCLK_IOB_CK_BUFHCLK10",
|
||||
"HCLK_IOB_CK_BUFHCLK11",
|
||||
"HCLK_IOB_CK_BUFHCLK2",
|
||||
"HCLK_IOB_CK_BUFHCLK3",
|
||||
"HCLK_IOB_CK_BUFHCLK4",
|
||||
"HCLK_IOB_CK_BUFHCLK5",
|
||||
"HCLK_IOB_CK_BUFHCLK6",
|
||||
"HCLK_IOB_CK_BUFHCLK7",
|
||||
"HCLK_IOB_CK_BUFHCLK8",
|
||||
"HCLK_IOB_CK_BUFHCLK9",
|
||||
"HCLK_IOB_CK_BUFRCLK0",
|
||||
"HCLK_IOB_CK_BUFRCLK1",
|
||||
"HCLK_IOB_CK_BUFRCLK2",
|
||||
"HCLK_IOB_CK_BUFRCLK3",
|
||||
"HCLK_IOB_CK_IN0",
|
||||
"HCLK_IOB_CK_IN1",
|
||||
"HCLK_IOB_CK_IN10",
|
||||
"HCLK_IOB_CK_IN11",
|
||||
"HCLK_IOB_CK_IN12",
|
||||
"HCLK_IOB_CK_IN13",
|
||||
"HCLK_IOB_CK_IN2",
|
||||
"HCLK_IOB_CK_IN3",
|
||||
"HCLK_IOB_CK_IN4",
|
||||
"HCLK_IOB_CK_IN5",
|
||||
"HCLK_IOB_CK_IN6",
|
||||
"HCLK_IOB_CK_IN7",
|
||||
"HCLK_IOB_CK_IN8",
|
||||
"HCLK_IOB_CK_IN9",
|
||||
"HCLK_IOB_PERFCLK0",
|
||||
"HCLK_IOB_PERFCLK1",
|
||||
"HCLK_IOB_PERFCLK2",
|
||||
"HCLK_IOB_PERFCLK3"
|
||||
]
|
||||
"wires": {
|
||||
"HCLK_IOB_CK_BUFHCLK0": null,
|
||||
"HCLK_IOB_CK_BUFHCLK1": null,
|
||||
"HCLK_IOB_CK_BUFHCLK10": null,
|
||||
"HCLK_IOB_CK_BUFHCLK11": null,
|
||||
"HCLK_IOB_CK_BUFHCLK2": null,
|
||||
"HCLK_IOB_CK_BUFHCLK3": null,
|
||||
"HCLK_IOB_CK_BUFHCLK4": null,
|
||||
"HCLK_IOB_CK_BUFHCLK5": null,
|
||||
"HCLK_IOB_CK_BUFHCLK6": null,
|
||||
"HCLK_IOB_CK_BUFHCLK7": null,
|
||||
"HCLK_IOB_CK_BUFHCLK8": null,
|
||||
"HCLK_IOB_CK_BUFHCLK9": null,
|
||||
"HCLK_IOB_CK_BUFRCLK0": null,
|
||||
"HCLK_IOB_CK_BUFRCLK1": null,
|
||||
"HCLK_IOB_CK_BUFRCLK2": null,
|
||||
"HCLK_IOB_CK_BUFRCLK3": null,
|
||||
"HCLK_IOB_CK_IN0": {
|
||||
"cap": "0.001",
|
||||
"res": "0.001"
|
||||
},
|
||||
"HCLK_IOB_CK_IN1": {
|
||||
"cap": "0.001",
|
||||
"res": "0.001"
|
||||
},
|
||||
"HCLK_IOB_CK_IN10": {
|
||||
"cap": "0.001",
|
||||
"res": "0.001"
|
||||
},
|
||||
"HCLK_IOB_CK_IN11": {
|
||||
"cap": "0.001",
|
||||
"res": "0.001"
|
||||
},
|
||||
"HCLK_IOB_CK_IN12": {
|
||||
"cap": "0.001",
|
||||
"res": "0.001"
|
||||
},
|
||||
"HCLK_IOB_CK_IN13": {
|
||||
"cap": "0.001",
|
||||
"res": "0.001"
|
||||
},
|
||||
"HCLK_IOB_CK_IN2": {
|
||||
"cap": "0.001",
|
||||
"res": "0.001"
|
||||
},
|
||||
"HCLK_IOB_CK_IN3": {
|
||||
"cap": "0.001",
|
||||
"res": "0.001"
|
||||
},
|
||||
"HCLK_IOB_CK_IN4": {
|
||||
"cap": "0.001",
|
||||
"res": "0.001"
|
||||
},
|
||||
"HCLK_IOB_CK_IN5": {
|
||||
"cap": "0.001",
|
||||
"res": "0.001"
|
||||
},
|
||||
"HCLK_IOB_CK_IN6": {
|
||||
"cap": "0.001",
|
||||
"res": "0.001"
|
||||
},
|
||||
"HCLK_IOB_CK_IN7": {
|
||||
"cap": "0.001",
|
||||
"res": "0.001"
|
||||
},
|
||||
"HCLK_IOB_CK_IN8": {
|
||||
"cap": "0.001",
|
||||
"res": "0.001"
|
||||
},
|
||||
"HCLK_IOB_CK_IN9": {
|
||||
"cap": "0.001",
|
||||
"res": "0.001"
|
||||
},
|
||||
"HCLK_IOB_PERFCLK0": null,
|
||||
"HCLK_IOB_PERFCLK1": null,
|
||||
"HCLK_IOB_PERFCLK2": null,
|
||||
"HCLK_IOB_PERFCLK3": null
|
||||
}
|
||||
}
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -2,44 +2,44 @@
|
|||
"pips": {},
|
||||
"sites": [],
|
||||
"tile_type": "HCLK_TERM",
|
||||
"wires": [
|
||||
"HCLK_TERM_CCIO0",
|
||||
"HCLK_TERM_CCIO1",
|
||||
"HCLK_TERM_CCIO2",
|
||||
"HCLK_TERM_CCIO3",
|
||||
"HCLK_TERM_CK_BUFHCLK0",
|
||||
"HCLK_TERM_CK_BUFHCLK1",
|
||||
"HCLK_TERM_CK_BUFHCLK10",
|
||||
"HCLK_TERM_CK_BUFHCLK11",
|
||||
"HCLK_TERM_CK_BUFHCLK2",
|
||||
"HCLK_TERM_CK_BUFHCLK3",
|
||||
"HCLK_TERM_CK_BUFHCLK4",
|
||||
"HCLK_TERM_CK_BUFHCLK5",
|
||||
"HCLK_TERM_CK_BUFHCLK6",
|
||||
"HCLK_TERM_CK_BUFHCLK7",
|
||||
"HCLK_TERM_CK_BUFHCLK8",
|
||||
"HCLK_TERM_CK_BUFHCLK9",
|
||||
"HCLK_TERM_CK_BUFRCLK0",
|
||||
"HCLK_TERM_CK_BUFRCLK1",
|
||||
"HCLK_TERM_CK_BUFRCLK2",
|
||||
"HCLK_TERM_CK_BUFRCLK3",
|
||||
"HCLK_TERM_CK_IN0",
|
||||
"HCLK_TERM_CK_IN1",
|
||||
"HCLK_TERM_CK_IN10",
|
||||
"HCLK_TERM_CK_IN11",
|
||||
"HCLK_TERM_CK_IN12",
|
||||
"HCLK_TERM_CK_IN13",
|
||||
"HCLK_TERM_CK_IN2",
|
||||
"HCLK_TERM_CK_IN3",
|
||||
"HCLK_TERM_CK_IN4",
|
||||
"HCLK_TERM_CK_IN5",
|
||||
"HCLK_TERM_CK_IN6",
|
||||
"HCLK_TERM_CK_IN7",
|
||||
"HCLK_TERM_CK_IN8",
|
||||
"HCLK_TERM_CK_IN9",
|
||||
"HCLK_TERM_PERFCLK0",
|
||||
"HCLK_TERM_PERFCLK1",
|
||||
"HCLK_TERM_PERFCLK2",
|
||||
"HCLK_TERM_PERFCLK3"
|
||||
]
|
||||
"wires": {
|
||||
"HCLK_TERM_CCIO0": null,
|
||||
"HCLK_TERM_CCIO1": null,
|
||||
"HCLK_TERM_CCIO2": null,
|
||||
"HCLK_TERM_CCIO3": null,
|
||||
"HCLK_TERM_CK_BUFHCLK0": null,
|
||||
"HCLK_TERM_CK_BUFHCLK1": null,
|
||||
"HCLK_TERM_CK_BUFHCLK10": null,
|
||||
"HCLK_TERM_CK_BUFHCLK11": null,
|
||||
"HCLK_TERM_CK_BUFHCLK2": null,
|
||||
"HCLK_TERM_CK_BUFHCLK3": null,
|
||||
"HCLK_TERM_CK_BUFHCLK4": null,
|
||||
"HCLK_TERM_CK_BUFHCLK5": null,
|
||||
"HCLK_TERM_CK_BUFHCLK6": null,
|
||||
"HCLK_TERM_CK_BUFHCLK7": null,
|
||||
"HCLK_TERM_CK_BUFHCLK8": null,
|
||||
"HCLK_TERM_CK_BUFHCLK9": null,
|
||||
"HCLK_TERM_CK_BUFRCLK0": null,
|
||||
"HCLK_TERM_CK_BUFRCLK1": null,
|
||||
"HCLK_TERM_CK_BUFRCLK2": null,
|
||||
"HCLK_TERM_CK_BUFRCLK3": null,
|
||||
"HCLK_TERM_CK_IN0": null,
|
||||
"HCLK_TERM_CK_IN1": null,
|
||||
"HCLK_TERM_CK_IN10": null,
|
||||
"HCLK_TERM_CK_IN11": null,
|
||||
"HCLK_TERM_CK_IN12": null,
|
||||
"HCLK_TERM_CK_IN13": null,
|
||||
"HCLK_TERM_CK_IN2": null,
|
||||
"HCLK_TERM_CK_IN3": null,
|
||||
"HCLK_TERM_CK_IN4": null,
|
||||
"HCLK_TERM_CK_IN5": null,
|
||||
"HCLK_TERM_CK_IN6": null,
|
||||
"HCLK_TERM_CK_IN7": null,
|
||||
"HCLK_TERM_CK_IN8": null,
|
||||
"HCLK_TERM_CK_IN9": null,
|
||||
"HCLK_TERM_PERFCLK0": null,
|
||||
"HCLK_TERM_PERFCLK1": null,
|
||||
"HCLK_TERM_PERFCLK2": null,
|
||||
"HCLK_TERM_PERFCLK3": null
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,20 +2,20 @@
|
|||
"pips": {},
|
||||
"sites": [],
|
||||
"tile_type": "HCLK_TERM_GTX",
|
||||
"wires": [
|
||||
"HCLK_TERM_GTX_CK_IN0",
|
||||
"HCLK_TERM_GTX_CK_IN1",
|
||||
"HCLK_TERM_GTX_CK_IN10",
|
||||
"HCLK_TERM_GTX_CK_IN11",
|
||||
"HCLK_TERM_GTX_CK_IN12",
|
||||
"HCLK_TERM_GTX_CK_IN13",
|
||||
"HCLK_TERM_GTX_CK_IN2",
|
||||
"HCLK_TERM_GTX_CK_IN3",
|
||||
"HCLK_TERM_GTX_CK_IN4",
|
||||
"HCLK_TERM_GTX_CK_IN5",
|
||||
"HCLK_TERM_GTX_CK_IN6",
|
||||
"HCLK_TERM_GTX_CK_IN7",
|
||||
"HCLK_TERM_GTX_CK_IN8",
|
||||
"HCLK_TERM_GTX_CK_IN9"
|
||||
]
|
||||
"wires": {
|
||||
"HCLK_TERM_GTX_CK_IN0": null,
|
||||
"HCLK_TERM_GTX_CK_IN1": null,
|
||||
"HCLK_TERM_GTX_CK_IN10": null,
|
||||
"HCLK_TERM_GTX_CK_IN11": null,
|
||||
"HCLK_TERM_GTX_CK_IN12": null,
|
||||
"HCLK_TERM_GTX_CK_IN13": null,
|
||||
"HCLK_TERM_GTX_CK_IN2": null,
|
||||
"HCLK_TERM_GTX_CK_IN3": null,
|
||||
"HCLK_TERM_GTX_CK_IN4": null,
|
||||
"HCLK_TERM_GTX_CK_IN5": null,
|
||||
"HCLK_TERM_GTX_CK_IN6": null,
|
||||
"HCLK_TERM_GTX_CK_IN7": null,
|
||||
"HCLK_TERM_GTX_CK_IN8": null,
|
||||
"HCLK_TERM_GTX_CK_IN9": null
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,44 +2,44 @@
|
|||
"pips": {},
|
||||
"sites": [],
|
||||
"tile_type": "HCLK_VBRK",
|
||||
"wires": [
|
||||
"HCLK_VBRK_CK_BUFHCLK0",
|
||||
"HCLK_VBRK_CK_BUFHCLK1",
|
||||
"HCLK_VBRK_CK_BUFHCLK10",
|
||||
"HCLK_VBRK_CK_BUFHCLK11",
|
||||
"HCLK_VBRK_CK_BUFHCLK2",
|
||||
"HCLK_VBRK_CK_BUFHCLK3",
|
||||
"HCLK_VBRK_CK_BUFHCLK4",
|
||||
"HCLK_VBRK_CK_BUFHCLK5",
|
||||
"HCLK_VBRK_CK_BUFHCLK6",
|
||||
"HCLK_VBRK_CK_BUFHCLK7",
|
||||
"HCLK_VBRK_CK_BUFHCLK8",
|
||||
"HCLK_VBRK_CK_BUFHCLK9",
|
||||
"HCLK_VBRK_CK_BUFRCLK0",
|
||||
"HCLK_VBRK_CK_BUFRCLK1",
|
||||
"HCLK_VBRK_CK_BUFRCLK2",
|
||||
"HCLK_VBRK_CK_BUFRCLK3",
|
||||
"HCLK_VBRK_MUX_CLK0",
|
||||
"HCLK_VBRK_MUX_CLK1",
|
||||
"HCLK_VBRK_MUX_CLK10",
|
||||
"HCLK_VBRK_MUX_CLK11",
|
||||
"HCLK_VBRK_MUX_CLK12",
|
||||
"HCLK_VBRK_MUX_CLK13",
|
||||
"HCLK_VBRK_MUX_CLK2",
|
||||
"HCLK_VBRK_MUX_CLK3",
|
||||
"HCLK_VBRK_MUX_CLK4",
|
||||
"HCLK_VBRK_MUX_CLK5",
|
||||
"HCLK_VBRK_MUX_CLK6",
|
||||
"HCLK_VBRK_MUX_CLK7",
|
||||
"HCLK_VBRK_MUX_CLK8",
|
||||
"HCLK_VBRK_MUX_CLK9",
|
||||
"HCLK_VBRK_PHSR_PERFCLK0",
|
||||
"HCLK_VBRK_PHSR_PERFCLK1",
|
||||
"HCLK_VBRK_PHSR_PERFCLK2",
|
||||
"HCLK_VBRK_PHSR_PERFCLK3",
|
||||
"HCLK_VBRK_REFCK_EASTCLK0",
|
||||
"HCLK_VBRK_REFCK_EASTCLK1",
|
||||
"HCLK_VBRK_REFCK_WESTCLK0",
|
||||
"HCLK_VBRK_REFCK_WESTCLK1"
|
||||
]
|
||||
"wires": {
|
||||
"HCLK_VBRK_CK_BUFHCLK0": null,
|
||||
"HCLK_VBRK_CK_BUFHCLK1": null,
|
||||
"HCLK_VBRK_CK_BUFHCLK10": null,
|
||||
"HCLK_VBRK_CK_BUFHCLK11": null,
|
||||
"HCLK_VBRK_CK_BUFHCLK2": null,
|
||||
"HCLK_VBRK_CK_BUFHCLK3": null,
|
||||
"HCLK_VBRK_CK_BUFHCLK4": null,
|
||||
"HCLK_VBRK_CK_BUFHCLK5": null,
|
||||
"HCLK_VBRK_CK_BUFHCLK6": null,
|
||||
"HCLK_VBRK_CK_BUFHCLK7": null,
|
||||
"HCLK_VBRK_CK_BUFHCLK8": null,
|
||||
"HCLK_VBRK_CK_BUFHCLK9": null,
|
||||
"HCLK_VBRK_CK_BUFRCLK0": null,
|
||||
"HCLK_VBRK_CK_BUFRCLK1": null,
|
||||
"HCLK_VBRK_CK_BUFRCLK2": null,
|
||||
"HCLK_VBRK_CK_BUFRCLK3": null,
|
||||
"HCLK_VBRK_MUX_CLK0": null,
|
||||
"HCLK_VBRK_MUX_CLK1": null,
|
||||
"HCLK_VBRK_MUX_CLK10": null,
|
||||
"HCLK_VBRK_MUX_CLK11": null,
|
||||
"HCLK_VBRK_MUX_CLK12": null,
|
||||
"HCLK_VBRK_MUX_CLK13": null,
|
||||
"HCLK_VBRK_MUX_CLK2": null,
|
||||
"HCLK_VBRK_MUX_CLK3": null,
|
||||
"HCLK_VBRK_MUX_CLK4": null,
|
||||
"HCLK_VBRK_MUX_CLK5": null,
|
||||
"HCLK_VBRK_MUX_CLK6": null,
|
||||
"HCLK_VBRK_MUX_CLK7": null,
|
||||
"HCLK_VBRK_MUX_CLK8": null,
|
||||
"HCLK_VBRK_MUX_CLK9": null,
|
||||
"HCLK_VBRK_PHSR_PERFCLK0": null,
|
||||
"HCLK_VBRK_PHSR_PERFCLK1": null,
|
||||
"HCLK_VBRK_PHSR_PERFCLK2": null,
|
||||
"HCLK_VBRK_PHSR_PERFCLK3": null,
|
||||
"HCLK_VBRK_REFCK_EASTCLK0": null,
|
||||
"HCLK_VBRK_REFCK_EASTCLK1": null,
|
||||
"HCLK_VBRK_REFCK_WESTCLK0": null,
|
||||
"HCLK_VBRK_REFCK_WESTCLK1": null
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,36 +2,36 @@
|
|||
"pips": {},
|
||||
"sites": [],
|
||||
"tile_type": "HCLK_VFRAME",
|
||||
"wires": [
|
||||
"HCLK_VFRAME_CK_BUFHCLK0",
|
||||
"HCLK_VFRAME_CK_BUFHCLK1",
|
||||
"HCLK_VFRAME_CK_BUFHCLK10",
|
||||
"HCLK_VFRAME_CK_BUFHCLK11",
|
||||
"HCLK_VFRAME_CK_BUFHCLK2",
|
||||
"HCLK_VFRAME_CK_BUFHCLK3",
|
||||
"HCLK_VFRAME_CK_BUFHCLK4",
|
||||
"HCLK_VFRAME_CK_BUFHCLK5",
|
||||
"HCLK_VFRAME_CK_BUFHCLK6",
|
||||
"HCLK_VFRAME_CK_BUFHCLK7",
|
||||
"HCLK_VFRAME_CK_BUFHCLK8",
|
||||
"HCLK_VFRAME_CK_BUFHCLK9",
|
||||
"HCLK_VFRAME_CK_BUFRCLK0",
|
||||
"HCLK_VFRAME_CK_BUFRCLK1",
|
||||
"HCLK_VFRAME_CK_BUFRCLK2",
|
||||
"HCLK_VFRAME_CK_BUFRCLK3",
|
||||
"HCLK_VFRAME_CK_IN0",
|
||||
"HCLK_VFRAME_CK_IN1",
|
||||
"HCLK_VFRAME_CK_IN10",
|
||||
"HCLK_VFRAME_CK_IN11",
|
||||
"HCLK_VFRAME_CK_IN12",
|
||||
"HCLK_VFRAME_CK_IN13",
|
||||
"HCLK_VFRAME_CK_IN2",
|
||||
"HCLK_VFRAME_CK_IN3",
|
||||
"HCLK_VFRAME_CK_IN4",
|
||||
"HCLK_VFRAME_CK_IN5",
|
||||
"HCLK_VFRAME_CK_IN6",
|
||||
"HCLK_VFRAME_CK_IN7",
|
||||
"HCLK_VFRAME_CK_IN8",
|
||||
"HCLK_VFRAME_CK_IN9"
|
||||
]
|
||||
"wires": {
|
||||
"HCLK_VFRAME_CK_BUFHCLK0": null,
|
||||
"HCLK_VFRAME_CK_BUFHCLK1": null,
|
||||
"HCLK_VFRAME_CK_BUFHCLK10": null,
|
||||
"HCLK_VFRAME_CK_BUFHCLK11": null,
|
||||
"HCLK_VFRAME_CK_BUFHCLK2": null,
|
||||
"HCLK_VFRAME_CK_BUFHCLK3": null,
|
||||
"HCLK_VFRAME_CK_BUFHCLK4": null,
|
||||
"HCLK_VFRAME_CK_BUFHCLK5": null,
|
||||
"HCLK_VFRAME_CK_BUFHCLK6": null,
|
||||
"HCLK_VFRAME_CK_BUFHCLK7": null,
|
||||
"HCLK_VFRAME_CK_BUFHCLK8": null,
|
||||
"HCLK_VFRAME_CK_BUFHCLK9": null,
|
||||
"HCLK_VFRAME_CK_BUFRCLK0": null,
|
||||
"HCLK_VFRAME_CK_BUFRCLK1": null,
|
||||
"HCLK_VFRAME_CK_BUFRCLK2": null,
|
||||
"HCLK_VFRAME_CK_BUFRCLK3": null,
|
||||
"HCLK_VFRAME_CK_IN0": null,
|
||||
"HCLK_VFRAME_CK_IN1": null,
|
||||
"HCLK_VFRAME_CK_IN10": null,
|
||||
"HCLK_VFRAME_CK_IN11": null,
|
||||
"HCLK_VFRAME_CK_IN12": null,
|
||||
"HCLK_VFRAME_CK_IN13": null,
|
||||
"HCLK_VFRAME_CK_IN2": null,
|
||||
"HCLK_VFRAME_CK_IN3": null,
|
||||
"HCLK_VFRAME_CK_IN4": null,
|
||||
"HCLK_VFRAME_CK_IN5": null,
|
||||
"HCLK_VFRAME_CK_IN6": null,
|
||||
"HCLK_VFRAME_CK_IN7": null,
|
||||
"HCLK_VFRAME_CK_IN8": null,
|
||||
"HCLK_VFRAME_CK_IN9": null
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,132 +2,132 @@
|
|||
"pips": {},
|
||||
"sites": [],
|
||||
"tile_type": "INT_FEEDTHRU_1",
|
||||
"wires": [
|
||||
"INT_FEEDTHRU_1_EE2A0",
|
||||
"INT_FEEDTHRU_1_EE2A1",
|
||||
"INT_FEEDTHRU_1_EE2A2",
|
||||
"INT_FEEDTHRU_1_EE2A3",
|
||||
"INT_FEEDTHRU_1_EE2BEG0",
|
||||
"INT_FEEDTHRU_1_EE2BEG1",
|
||||
"INT_FEEDTHRU_1_EE2BEG2",
|
||||
"INT_FEEDTHRU_1_EE2BEG3",
|
||||
"INT_FEEDTHRU_1_EE4A0",
|
||||
"INT_FEEDTHRU_1_EE4A1",
|
||||
"INT_FEEDTHRU_1_EE4A2",
|
||||
"INT_FEEDTHRU_1_EE4A3",
|
||||
"INT_FEEDTHRU_1_EE4B0",
|
||||
"INT_FEEDTHRU_1_EE4B1",
|
||||
"INT_FEEDTHRU_1_EE4B2",
|
||||
"INT_FEEDTHRU_1_EE4B3",
|
||||
"INT_FEEDTHRU_1_EE4BEG0",
|
||||
"INT_FEEDTHRU_1_EE4BEG1",
|
||||
"INT_FEEDTHRU_1_EE4BEG2",
|
||||
"INT_FEEDTHRU_1_EE4BEG3",
|
||||
"INT_FEEDTHRU_1_EE4C0",
|
||||
"INT_FEEDTHRU_1_EE4C1",
|
||||
"INT_FEEDTHRU_1_EE4C2",
|
||||
"INT_FEEDTHRU_1_EE4C3",
|
||||
"INT_FEEDTHRU_1_EL1BEG0",
|
||||
"INT_FEEDTHRU_1_EL1BEG1",
|
||||
"INT_FEEDTHRU_1_EL1BEG2",
|
||||
"INT_FEEDTHRU_1_EL1BEG3",
|
||||
"INT_FEEDTHRU_1_ER1BEG0",
|
||||
"INT_FEEDTHRU_1_ER1BEG1",
|
||||
"INT_FEEDTHRU_1_ER1BEG2",
|
||||
"INT_FEEDTHRU_1_ER1BEG3",
|
||||
"INT_FEEDTHRU_1_LH1",
|
||||
"INT_FEEDTHRU_1_LH10",
|
||||
"INT_FEEDTHRU_1_LH11",
|
||||
"INT_FEEDTHRU_1_LH12",
|
||||
"INT_FEEDTHRU_1_LH2",
|
||||
"INT_FEEDTHRU_1_LH3",
|
||||
"INT_FEEDTHRU_1_LH4",
|
||||
"INT_FEEDTHRU_1_LH5",
|
||||
"INT_FEEDTHRU_1_LH6",
|
||||
"INT_FEEDTHRU_1_LH7",
|
||||
"INT_FEEDTHRU_1_LH8",
|
||||
"INT_FEEDTHRU_1_LH9",
|
||||
"INT_FEEDTHRU_1_MONITOR_N",
|
||||
"INT_FEEDTHRU_1_MONITOR_P",
|
||||
"INT_FEEDTHRU_1_NE2A0",
|
||||
"INT_FEEDTHRU_1_NE2A1",
|
||||
"INT_FEEDTHRU_1_NE2A2",
|
||||
"INT_FEEDTHRU_1_NE2A3",
|
||||
"INT_FEEDTHRU_1_NE4BEG0",
|
||||
"INT_FEEDTHRU_1_NE4BEG1",
|
||||
"INT_FEEDTHRU_1_NE4BEG2",
|
||||
"INT_FEEDTHRU_1_NE4BEG3",
|
||||
"INT_FEEDTHRU_1_NE4C0",
|
||||
"INT_FEEDTHRU_1_NE4C1",
|
||||
"INT_FEEDTHRU_1_NE4C2",
|
||||
"INT_FEEDTHRU_1_NE4C3",
|
||||
"INT_FEEDTHRU_1_NW2A0",
|
||||
"INT_FEEDTHRU_1_NW2A1",
|
||||
"INT_FEEDTHRU_1_NW2A2",
|
||||
"INT_FEEDTHRU_1_NW2A3",
|
||||
"INT_FEEDTHRU_1_NW4A0",
|
||||
"INT_FEEDTHRU_1_NW4A1",
|
||||
"INT_FEEDTHRU_1_NW4A2",
|
||||
"INT_FEEDTHRU_1_NW4A3",
|
||||
"INT_FEEDTHRU_1_NW4END0",
|
||||
"INT_FEEDTHRU_1_NW4END1",
|
||||
"INT_FEEDTHRU_1_NW4END2",
|
||||
"INT_FEEDTHRU_1_NW4END3",
|
||||
"INT_FEEDTHRU_1_SE2A0",
|
||||
"INT_FEEDTHRU_1_SE2A1",
|
||||
"INT_FEEDTHRU_1_SE2A2",
|
||||
"INT_FEEDTHRU_1_SE2A3",
|
||||
"INT_FEEDTHRU_1_SE4BEG0",
|
||||
"INT_FEEDTHRU_1_SE4BEG1",
|
||||
"INT_FEEDTHRU_1_SE4BEG2",
|
||||
"INT_FEEDTHRU_1_SE4BEG3",
|
||||
"INT_FEEDTHRU_1_SE4C0",
|
||||
"INT_FEEDTHRU_1_SE4C1",
|
||||
"INT_FEEDTHRU_1_SE4C2",
|
||||
"INT_FEEDTHRU_1_SE4C3",
|
||||
"INT_FEEDTHRU_1_SW2A0",
|
||||
"INT_FEEDTHRU_1_SW2A1",
|
||||
"INT_FEEDTHRU_1_SW2A2",
|
||||
"INT_FEEDTHRU_1_SW2A3",
|
||||
"INT_FEEDTHRU_1_SW4A0",
|
||||
"INT_FEEDTHRU_1_SW4A1",
|
||||
"INT_FEEDTHRU_1_SW4A2",
|
||||
"INT_FEEDTHRU_1_SW4A3",
|
||||
"INT_FEEDTHRU_1_SW4END0",
|
||||
"INT_FEEDTHRU_1_SW4END1",
|
||||
"INT_FEEDTHRU_1_SW4END2",
|
||||
"INT_FEEDTHRU_1_SW4END3",
|
||||
"INT_FEEDTHRU_1_WL1END0",
|
||||
"INT_FEEDTHRU_1_WL1END1",
|
||||
"INT_FEEDTHRU_1_WL1END2",
|
||||
"INT_FEEDTHRU_1_WL1END3",
|
||||
"INT_FEEDTHRU_1_WR1END0",
|
||||
"INT_FEEDTHRU_1_WR1END1",
|
||||
"INT_FEEDTHRU_1_WR1END2",
|
||||
"INT_FEEDTHRU_1_WR1END3",
|
||||
"INT_FEEDTHRU_1_WW2A0",
|
||||
"INT_FEEDTHRU_1_WW2A1",
|
||||
"INT_FEEDTHRU_1_WW2A2",
|
||||
"INT_FEEDTHRU_1_WW2A3",
|
||||
"INT_FEEDTHRU_1_WW2END0",
|
||||
"INT_FEEDTHRU_1_WW2END1",
|
||||
"INT_FEEDTHRU_1_WW2END2",
|
||||
"INT_FEEDTHRU_1_WW2END3",
|
||||
"INT_FEEDTHRU_1_WW4A0",
|
||||
"INT_FEEDTHRU_1_WW4A1",
|
||||
"INT_FEEDTHRU_1_WW4A2",
|
||||
"INT_FEEDTHRU_1_WW4A3",
|
||||
"INT_FEEDTHRU_1_WW4B0",
|
||||
"INT_FEEDTHRU_1_WW4B1",
|
||||
"INT_FEEDTHRU_1_WW4B2",
|
||||
"INT_FEEDTHRU_1_WW4B3",
|
||||
"INT_FEEDTHRU_1_WW4C0",
|
||||
"INT_FEEDTHRU_1_WW4C1",
|
||||
"INT_FEEDTHRU_1_WW4C2",
|
||||
"INT_FEEDTHRU_1_WW4C3",
|
||||
"INT_FEEDTHRU_1_WW4END0",
|
||||
"INT_FEEDTHRU_1_WW4END1",
|
||||
"INT_FEEDTHRU_1_WW4END2",
|
||||
"INT_FEEDTHRU_1_WW4END3"
|
||||
]
|
||||
"wires": {
|
||||
"INT_FEEDTHRU_1_EE2A0": null,
|
||||
"INT_FEEDTHRU_1_EE2A1": null,
|
||||
"INT_FEEDTHRU_1_EE2A2": null,
|
||||
"INT_FEEDTHRU_1_EE2A3": null,
|
||||
"INT_FEEDTHRU_1_EE2BEG0": null,
|
||||
"INT_FEEDTHRU_1_EE2BEG1": null,
|
||||
"INT_FEEDTHRU_1_EE2BEG2": null,
|
||||
"INT_FEEDTHRU_1_EE2BEG3": null,
|
||||
"INT_FEEDTHRU_1_EE4A0": null,
|
||||
"INT_FEEDTHRU_1_EE4A1": null,
|
||||
"INT_FEEDTHRU_1_EE4A2": null,
|
||||
"INT_FEEDTHRU_1_EE4A3": null,
|
||||
"INT_FEEDTHRU_1_EE4B0": null,
|
||||
"INT_FEEDTHRU_1_EE4B1": null,
|
||||
"INT_FEEDTHRU_1_EE4B2": null,
|
||||
"INT_FEEDTHRU_1_EE4B3": null,
|
||||
"INT_FEEDTHRU_1_EE4BEG0": null,
|
||||
"INT_FEEDTHRU_1_EE4BEG1": null,
|
||||
"INT_FEEDTHRU_1_EE4BEG2": null,
|
||||
"INT_FEEDTHRU_1_EE4BEG3": null,
|
||||
"INT_FEEDTHRU_1_EE4C0": null,
|
||||
"INT_FEEDTHRU_1_EE4C1": null,
|
||||
"INT_FEEDTHRU_1_EE4C2": null,
|
||||
"INT_FEEDTHRU_1_EE4C3": null,
|
||||
"INT_FEEDTHRU_1_EL1BEG0": null,
|
||||
"INT_FEEDTHRU_1_EL1BEG1": null,
|
||||
"INT_FEEDTHRU_1_EL1BEG2": null,
|
||||
"INT_FEEDTHRU_1_EL1BEG3": null,
|
||||
"INT_FEEDTHRU_1_ER1BEG0": null,
|
||||
"INT_FEEDTHRU_1_ER1BEG1": null,
|
||||
"INT_FEEDTHRU_1_ER1BEG2": null,
|
||||
"INT_FEEDTHRU_1_ER1BEG3": null,
|
||||
"INT_FEEDTHRU_1_LH1": null,
|
||||
"INT_FEEDTHRU_1_LH10": null,
|
||||
"INT_FEEDTHRU_1_LH11": null,
|
||||
"INT_FEEDTHRU_1_LH12": null,
|
||||
"INT_FEEDTHRU_1_LH2": null,
|
||||
"INT_FEEDTHRU_1_LH3": null,
|
||||
"INT_FEEDTHRU_1_LH4": null,
|
||||
"INT_FEEDTHRU_1_LH5": null,
|
||||
"INT_FEEDTHRU_1_LH6": null,
|
||||
"INT_FEEDTHRU_1_LH7": null,
|
||||
"INT_FEEDTHRU_1_LH8": null,
|
||||
"INT_FEEDTHRU_1_LH9": null,
|
||||
"INT_FEEDTHRU_1_MONITOR_N": null,
|
||||
"INT_FEEDTHRU_1_MONITOR_P": null,
|
||||
"INT_FEEDTHRU_1_NE2A0": null,
|
||||
"INT_FEEDTHRU_1_NE2A1": null,
|
||||
"INT_FEEDTHRU_1_NE2A2": null,
|
||||
"INT_FEEDTHRU_1_NE2A3": null,
|
||||
"INT_FEEDTHRU_1_NE4BEG0": null,
|
||||
"INT_FEEDTHRU_1_NE4BEG1": null,
|
||||
"INT_FEEDTHRU_1_NE4BEG2": null,
|
||||
"INT_FEEDTHRU_1_NE4BEG3": null,
|
||||
"INT_FEEDTHRU_1_NE4C0": null,
|
||||
"INT_FEEDTHRU_1_NE4C1": null,
|
||||
"INT_FEEDTHRU_1_NE4C2": null,
|
||||
"INT_FEEDTHRU_1_NE4C3": null,
|
||||
"INT_FEEDTHRU_1_NW2A0": null,
|
||||
"INT_FEEDTHRU_1_NW2A1": null,
|
||||
"INT_FEEDTHRU_1_NW2A2": null,
|
||||
"INT_FEEDTHRU_1_NW2A3": null,
|
||||
"INT_FEEDTHRU_1_NW4A0": null,
|
||||
"INT_FEEDTHRU_1_NW4A1": null,
|
||||
"INT_FEEDTHRU_1_NW4A2": null,
|
||||
"INT_FEEDTHRU_1_NW4A3": null,
|
||||
"INT_FEEDTHRU_1_NW4END0": null,
|
||||
"INT_FEEDTHRU_1_NW4END1": null,
|
||||
"INT_FEEDTHRU_1_NW4END2": null,
|
||||
"INT_FEEDTHRU_1_NW4END3": null,
|
||||
"INT_FEEDTHRU_1_SE2A0": null,
|
||||
"INT_FEEDTHRU_1_SE2A1": null,
|
||||
"INT_FEEDTHRU_1_SE2A2": null,
|
||||
"INT_FEEDTHRU_1_SE2A3": null,
|
||||
"INT_FEEDTHRU_1_SE4BEG0": null,
|
||||
"INT_FEEDTHRU_1_SE4BEG1": null,
|
||||
"INT_FEEDTHRU_1_SE4BEG2": null,
|
||||
"INT_FEEDTHRU_1_SE4BEG3": null,
|
||||
"INT_FEEDTHRU_1_SE4C0": null,
|
||||
"INT_FEEDTHRU_1_SE4C1": null,
|
||||
"INT_FEEDTHRU_1_SE4C2": null,
|
||||
"INT_FEEDTHRU_1_SE4C3": null,
|
||||
"INT_FEEDTHRU_1_SW2A0": null,
|
||||
"INT_FEEDTHRU_1_SW2A1": null,
|
||||
"INT_FEEDTHRU_1_SW2A2": null,
|
||||
"INT_FEEDTHRU_1_SW2A3": null,
|
||||
"INT_FEEDTHRU_1_SW4A0": null,
|
||||
"INT_FEEDTHRU_1_SW4A1": null,
|
||||
"INT_FEEDTHRU_1_SW4A2": null,
|
||||
"INT_FEEDTHRU_1_SW4A3": null,
|
||||
"INT_FEEDTHRU_1_SW4END0": null,
|
||||
"INT_FEEDTHRU_1_SW4END1": null,
|
||||
"INT_FEEDTHRU_1_SW4END2": null,
|
||||
"INT_FEEDTHRU_1_SW4END3": null,
|
||||
"INT_FEEDTHRU_1_WL1END0": null,
|
||||
"INT_FEEDTHRU_1_WL1END1": null,
|
||||
"INT_FEEDTHRU_1_WL1END2": null,
|
||||
"INT_FEEDTHRU_1_WL1END3": null,
|
||||
"INT_FEEDTHRU_1_WR1END0": null,
|
||||
"INT_FEEDTHRU_1_WR1END1": null,
|
||||
"INT_FEEDTHRU_1_WR1END2": null,
|
||||
"INT_FEEDTHRU_1_WR1END3": null,
|
||||
"INT_FEEDTHRU_1_WW2A0": null,
|
||||
"INT_FEEDTHRU_1_WW2A1": null,
|
||||
"INT_FEEDTHRU_1_WW2A2": null,
|
||||
"INT_FEEDTHRU_1_WW2A3": null,
|
||||
"INT_FEEDTHRU_1_WW2END0": null,
|
||||
"INT_FEEDTHRU_1_WW2END1": null,
|
||||
"INT_FEEDTHRU_1_WW2END2": null,
|
||||
"INT_FEEDTHRU_1_WW2END3": null,
|
||||
"INT_FEEDTHRU_1_WW4A0": null,
|
||||
"INT_FEEDTHRU_1_WW4A1": null,
|
||||
"INT_FEEDTHRU_1_WW4A2": null,
|
||||
"INT_FEEDTHRU_1_WW4A3": null,
|
||||
"INT_FEEDTHRU_1_WW4B0": null,
|
||||
"INT_FEEDTHRU_1_WW4B1": null,
|
||||
"INT_FEEDTHRU_1_WW4B2": null,
|
||||
"INT_FEEDTHRU_1_WW4B3": null,
|
||||
"INT_FEEDTHRU_1_WW4C0": null,
|
||||
"INT_FEEDTHRU_1_WW4C1": null,
|
||||
"INT_FEEDTHRU_1_WW4C2": null,
|
||||
"INT_FEEDTHRU_1_WW4C3": null,
|
||||
"INT_FEEDTHRU_1_WW4END0": null,
|
||||
"INT_FEEDTHRU_1_WW4END1": null,
|
||||
"INT_FEEDTHRU_1_WW4END2": null,
|
||||
"INT_FEEDTHRU_1_WW4END3": null
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,132 +2,132 @@
|
|||
"pips": {},
|
||||
"sites": [],
|
||||
"tile_type": "INT_FEEDTHRU_2",
|
||||
"wires": [
|
||||
"INT_FEEDTHRU_2_EE2A0",
|
||||
"INT_FEEDTHRU_2_EE2A1",
|
||||
"INT_FEEDTHRU_2_EE2A2",
|
||||
"INT_FEEDTHRU_2_EE2A3",
|
||||
"INT_FEEDTHRU_2_EE2BEG0",
|
||||
"INT_FEEDTHRU_2_EE2BEG1",
|
||||
"INT_FEEDTHRU_2_EE2BEG2",
|
||||
"INT_FEEDTHRU_2_EE2BEG3",
|
||||
"INT_FEEDTHRU_2_EE4A0",
|
||||
"INT_FEEDTHRU_2_EE4A1",
|
||||
"INT_FEEDTHRU_2_EE4A2",
|
||||
"INT_FEEDTHRU_2_EE4A3",
|
||||
"INT_FEEDTHRU_2_EE4B0",
|
||||
"INT_FEEDTHRU_2_EE4B1",
|
||||
"INT_FEEDTHRU_2_EE4B2",
|
||||
"INT_FEEDTHRU_2_EE4B3",
|
||||
"INT_FEEDTHRU_2_EE4BEG0",
|
||||
"INT_FEEDTHRU_2_EE4BEG1",
|
||||
"INT_FEEDTHRU_2_EE4BEG2",
|
||||
"INT_FEEDTHRU_2_EE4BEG3",
|
||||
"INT_FEEDTHRU_2_EE4C0",
|
||||
"INT_FEEDTHRU_2_EE4C1",
|
||||
"INT_FEEDTHRU_2_EE4C2",
|
||||
"INT_FEEDTHRU_2_EE4C3",
|
||||
"INT_FEEDTHRU_2_EL1BEG0",
|
||||
"INT_FEEDTHRU_2_EL1BEG1",
|
||||
"INT_FEEDTHRU_2_EL1BEG2",
|
||||
"INT_FEEDTHRU_2_EL1BEG3",
|
||||
"INT_FEEDTHRU_2_ER1BEG0",
|
||||
"INT_FEEDTHRU_2_ER1BEG1",
|
||||
"INT_FEEDTHRU_2_ER1BEG2",
|
||||
"INT_FEEDTHRU_2_ER1BEG3",
|
||||
"INT_FEEDTHRU_2_LH1",
|
||||
"INT_FEEDTHRU_2_LH10",
|
||||
"INT_FEEDTHRU_2_LH11",
|
||||
"INT_FEEDTHRU_2_LH12",
|
||||
"INT_FEEDTHRU_2_LH2",
|
||||
"INT_FEEDTHRU_2_LH3",
|
||||
"INT_FEEDTHRU_2_LH4",
|
||||
"INT_FEEDTHRU_2_LH5",
|
||||
"INT_FEEDTHRU_2_LH6",
|
||||
"INT_FEEDTHRU_2_LH7",
|
||||
"INT_FEEDTHRU_2_LH8",
|
||||
"INT_FEEDTHRU_2_LH9",
|
||||
"INT_FEEDTHRU_2_MONITOR_N",
|
||||
"INT_FEEDTHRU_2_MONITOR_P",
|
||||
"INT_FEEDTHRU_2_NE2A0",
|
||||
"INT_FEEDTHRU_2_NE2A1",
|
||||
"INT_FEEDTHRU_2_NE2A2",
|
||||
"INT_FEEDTHRU_2_NE2A3",
|
||||
"INT_FEEDTHRU_2_NE4BEG0",
|
||||
"INT_FEEDTHRU_2_NE4BEG1",
|
||||
"INT_FEEDTHRU_2_NE4BEG2",
|
||||
"INT_FEEDTHRU_2_NE4BEG3",
|
||||
"INT_FEEDTHRU_2_NE4C0",
|
||||
"INT_FEEDTHRU_2_NE4C1",
|
||||
"INT_FEEDTHRU_2_NE4C2",
|
||||
"INT_FEEDTHRU_2_NE4C3",
|
||||
"INT_FEEDTHRU_2_NW2A0",
|
||||
"INT_FEEDTHRU_2_NW2A1",
|
||||
"INT_FEEDTHRU_2_NW2A2",
|
||||
"INT_FEEDTHRU_2_NW2A3",
|
||||
"INT_FEEDTHRU_2_NW4A0",
|
||||
"INT_FEEDTHRU_2_NW4A1",
|
||||
"INT_FEEDTHRU_2_NW4A2",
|
||||
"INT_FEEDTHRU_2_NW4A3",
|
||||
"INT_FEEDTHRU_2_NW4END0",
|
||||
"INT_FEEDTHRU_2_NW4END1",
|
||||
"INT_FEEDTHRU_2_NW4END2",
|
||||
"INT_FEEDTHRU_2_NW4END3",
|
||||
"INT_FEEDTHRU_2_SE2A0",
|
||||
"INT_FEEDTHRU_2_SE2A1",
|
||||
"INT_FEEDTHRU_2_SE2A2",
|
||||
"INT_FEEDTHRU_2_SE2A3",
|
||||
"INT_FEEDTHRU_2_SE4BEG0",
|
||||
"INT_FEEDTHRU_2_SE4BEG1",
|
||||
"INT_FEEDTHRU_2_SE4BEG2",
|
||||
"INT_FEEDTHRU_2_SE4BEG3",
|
||||
"INT_FEEDTHRU_2_SE4C0",
|
||||
"INT_FEEDTHRU_2_SE4C1",
|
||||
"INT_FEEDTHRU_2_SE4C2",
|
||||
"INT_FEEDTHRU_2_SE4C3",
|
||||
"INT_FEEDTHRU_2_SW2A0",
|
||||
"INT_FEEDTHRU_2_SW2A1",
|
||||
"INT_FEEDTHRU_2_SW2A2",
|
||||
"INT_FEEDTHRU_2_SW2A3",
|
||||
"INT_FEEDTHRU_2_SW4A0",
|
||||
"INT_FEEDTHRU_2_SW4A1",
|
||||
"INT_FEEDTHRU_2_SW4A2",
|
||||
"INT_FEEDTHRU_2_SW4A3",
|
||||
"INT_FEEDTHRU_2_SW4END0",
|
||||
"INT_FEEDTHRU_2_SW4END1",
|
||||
"INT_FEEDTHRU_2_SW4END2",
|
||||
"INT_FEEDTHRU_2_SW4END3",
|
||||
"INT_FEEDTHRU_2_WL1END0",
|
||||
"INT_FEEDTHRU_2_WL1END1",
|
||||
"INT_FEEDTHRU_2_WL1END2",
|
||||
"INT_FEEDTHRU_2_WL1END3",
|
||||
"INT_FEEDTHRU_2_WR1END0",
|
||||
"INT_FEEDTHRU_2_WR1END1",
|
||||
"INT_FEEDTHRU_2_WR1END2",
|
||||
"INT_FEEDTHRU_2_WR1END3",
|
||||
"INT_FEEDTHRU_2_WW2A0",
|
||||
"INT_FEEDTHRU_2_WW2A1",
|
||||
"INT_FEEDTHRU_2_WW2A2",
|
||||
"INT_FEEDTHRU_2_WW2A3",
|
||||
"INT_FEEDTHRU_2_WW2END0",
|
||||
"INT_FEEDTHRU_2_WW2END1",
|
||||
"INT_FEEDTHRU_2_WW2END2",
|
||||
"INT_FEEDTHRU_2_WW2END3",
|
||||
"INT_FEEDTHRU_2_WW4A0",
|
||||
"INT_FEEDTHRU_2_WW4A1",
|
||||
"INT_FEEDTHRU_2_WW4A2",
|
||||
"INT_FEEDTHRU_2_WW4A3",
|
||||
"INT_FEEDTHRU_2_WW4B0",
|
||||
"INT_FEEDTHRU_2_WW4B1",
|
||||
"INT_FEEDTHRU_2_WW4B2",
|
||||
"INT_FEEDTHRU_2_WW4B3",
|
||||
"INT_FEEDTHRU_2_WW4C0",
|
||||
"INT_FEEDTHRU_2_WW4C1",
|
||||
"INT_FEEDTHRU_2_WW4C2",
|
||||
"INT_FEEDTHRU_2_WW4C3",
|
||||
"INT_FEEDTHRU_2_WW4END0",
|
||||
"INT_FEEDTHRU_2_WW4END1",
|
||||
"INT_FEEDTHRU_2_WW4END2",
|
||||
"INT_FEEDTHRU_2_WW4END3"
|
||||
]
|
||||
"wires": {
|
||||
"INT_FEEDTHRU_2_EE2A0": null,
|
||||
"INT_FEEDTHRU_2_EE2A1": null,
|
||||
"INT_FEEDTHRU_2_EE2A2": null,
|
||||
"INT_FEEDTHRU_2_EE2A3": null,
|
||||
"INT_FEEDTHRU_2_EE2BEG0": null,
|
||||
"INT_FEEDTHRU_2_EE2BEG1": null,
|
||||
"INT_FEEDTHRU_2_EE2BEG2": null,
|
||||
"INT_FEEDTHRU_2_EE2BEG3": null,
|
||||
"INT_FEEDTHRU_2_EE4A0": null,
|
||||
"INT_FEEDTHRU_2_EE4A1": null,
|
||||
"INT_FEEDTHRU_2_EE4A2": null,
|
||||
"INT_FEEDTHRU_2_EE4A3": null,
|
||||
"INT_FEEDTHRU_2_EE4B0": null,
|
||||
"INT_FEEDTHRU_2_EE4B1": null,
|
||||
"INT_FEEDTHRU_2_EE4B2": null,
|
||||
"INT_FEEDTHRU_2_EE4B3": null,
|
||||
"INT_FEEDTHRU_2_EE4BEG0": null,
|
||||
"INT_FEEDTHRU_2_EE4BEG1": null,
|
||||
"INT_FEEDTHRU_2_EE4BEG2": null,
|
||||
"INT_FEEDTHRU_2_EE4BEG3": null,
|
||||
"INT_FEEDTHRU_2_EE4C0": null,
|
||||
"INT_FEEDTHRU_2_EE4C1": null,
|
||||
"INT_FEEDTHRU_2_EE4C2": null,
|
||||
"INT_FEEDTHRU_2_EE4C3": null,
|
||||
"INT_FEEDTHRU_2_EL1BEG0": null,
|
||||
"INT_FEEDTHRU_2_EL1BEG1": null,
|
||||
"INT_FEEDTHRU_2_EL1BEG2": null,
|
||||
"INT_FEEDTHRU_2_EL1BEG3": null,
|
||||
"INT_FEEDTHRU_2_ER1BEG0": null,
|
||||
"INT_FEEDTHRU_2_ER1BEG1": null,
|
||||
"INT_FEEDTHRU_2_ER1BEG2": null,
|
||||
"INT_FEEDTHRU_2_ER1BEG3": null,
|
||||
"INT_FEEDTHRU_2_LH1": null,
|
||||
"INT_FEEDTHRU_2_LH10": null,
|
||||
"INT_FEEDTHRU_2_LH11": null,
|
||||
"INT_FEEDTHRU_2_LH12": null,
|
||||
"INT_FEEDTHRU_2_LH2": null,
|
||||
"INT_FEEDTHRU_2_LH3": null,
|
||||
"INT_FEEDTHRU_2_LH4": null,
|
||||
"INT_FEEDTHRU_2_LH5": null,
|
||||
"INT_FEEDTHRU_2_LH6": null,
|
||||
"INT_FEEDTHRU_2_LH7": null,
|
||||
"INT_FEEDTHRU_2_LH8": null,
|
||||
"INT_FEEDTHRU_2_LH9": null,
|
||||
"INT_FEEDTHRU_2_MONITOR_N": null,
|
||||
"INT_FEEDTHRU_2_MONITOR_P": null,
|
||||
"INT_FEEDTHRU_2_NE2A0": null,
|
||||
"INT_FEEDTHRU_2_NE2A1": null,
|
||||
"INT_FEEDTHRU_2_NE2A2": null,
|
||||
"INT_FEEDTHRU_2_NE2A3": null,
|
||||
"INT_FEEDTHRU_2_NE4BEG0": null,
|
||||
"INT_FEEDTHRU_2_NE4BEG1": null,
|
||||
"INT_FEEDTHRU_2_NE4BEG2": null,
|
||||
"INT_FEEDTHRU_2_NE4BEG3": null,
|
||||
"INT_FEEDTHRU_2_NE4C0": null,
|
||||
"INT_FEEDTHRU_2_NE4C1": null,
|
||||
"INT_FEEDTHRU_2_NE4C2": null,
|
||||
"INT_FEEDTHRU_2_NE4C3": null,
|
||||
"INT_FEEDTHRU_2_NW2A0": null,
|
||||
"INT_FEEDTHRU_2_NW2A1": null,
|
||||
"INT_FEEDTHRU_2_NW2A2": null,
|
||||
"INT_FEEDTHRU_2_NW2A3": null,
|
||||
"INT_FEEDTHRU_2_NW4A0": null,
|
||||
"INT_FEEDTHRU_2_NW4A1": null,
|
||||
"INT_FEEDTHRU_2_NW4A2": null,
|
||||
"INT_FEEDTHRU_2_NW4A3": null,
|
||||
"INT_FEEDTHRU_2_NW4END0": null,
|
||||
"INT_FEEDTHRU_2_NW4END1": null,
|
||||
"INT_FEEDTHRU_2_NW4END2": null,
|
||||
"INT_FEEDTHRU_2_NW4END3": null,
|
||||
"INT_FEEDTHRU_2_SE2A0": null,
|
||||
"INT_FEEDTHRU_2_SE2A1": null,
|
||||
"INT_FEEDTHRU_2_SE2A2": null,
|
||||
"INT_FEEDTHRU_2_SE2A3": null,
|
||||
"INT_FEEDTHRU_2_SE4BEG0": null,
|
||||
"INT_FEEDTHRU_2_SE4BEG1": null,
|
||||
"INT_FEEDTHRU_2_SE4BEG2": null,
|
||||
"INT_FEEDTHRU_2_SE4BEG3": null,
|
||||
"INT_FEEDTHRU_2_SE4C0": null,
|
||||
"INT_FEEDTHRU_2_SE4C1": null,
|
||||
"INT_FEEDTHRU_2_SE4C2": null,
|
||||
"INT_FEEDTHRU_2_SE4C3": null,
|
||||
"INT_FEEDTHRU_2_SW2A0": null,
|
||||
"INT_FEEDTHRU_2_SW2A1": null,
|
||||
"INT_FEEDTHRU_2_SW2A2": null,
|
||||
"INT_FEEDTHRU_2_SW2A3": null,
|
||||
"INT_FEEDTHRU_2_SW4A0": null,
|
||||
"INT_FEEDTHRU_2_SW4A1": null,
|
||||
"INT_FEEDTHRU_2_SW4A2": null,
|
||||
"INT_FEEDTHRU_2_SW4A3": null,
|
||||
"INT_FEEDTHRU_2_SW4END0": null,
|
||||
"INT_FEEDTHRU_2_SW4END1": null,
|
||||
"INT_FEEDTHRU_2_SW4END2": null,
|
||||
"INT_FEEDTHRU_2_SW4END3": null,
|
||||
"INT_FEEDTHRU_2_WL1END0": null,
|
||||
"INT_FEEDTHRU_2_WL1END1": null,
|
||||
"INT_FEEDTHRU_2_WL1END2": null,
|
||||
"INT_FEEDTHRU_2_WL1END3": null,
|
||||
"INT_FEEDTHRU_2_WR1END0": null,
|
||||
"INT_FEEDTHRU_2_WR1END1": null,
|
||||
"INT_FEEDTHRU_2_WR1END2": null,
|
||||
"INT_FEEDTHRU_2_WR1END3": null,
|
||||
"INT_FEEDTHRU_2_WW2A0": null,
|
||||
"INT_FEEDTHRU_2_WW2A1": null,
|
||||
"INT_FEEDTHRU_2_WW2A2": null,
|
||||
"INT_FEEDTHRU_2_WW2A3": null,
|
||||
"INT_FEEDTHRU_2_WW2END0": null,
|
||||
"INT_FEEDTHRU_2_WW2END1": null,
|
||||
"INT_FEEDTHRU_2_WW2END2": null,
|
||||
"INT_FEEDTHRU_2_WW2END3": null,
|
||||
"INT_FEEDTHRU_2_WW4A0": null,
|
||||
"INT_FEEDTHRU_2_WW4A1": null,
|
||||
"INT_FEEDTHRU_2_WW4A2": null,
|
||||
"INT_FEEDTHRU_2_WW4A3": null,
|
||||
"INT_FEEDTHRU_2_WW4B0": null,
|
||||
"INT_FEEDTHRU_2_WW4B1": null,
|
||||
"INT_FEEDTHRU_2_WW4B2": null,
|
||||
"INT_FEEDTHRU_2_WW4B3": null,
|
||||
"INT_FEEDTHRU_2_WW4C0": null,
|
||||
"INT_FEEDTHRU_2_WW4C1": null,
|
||||
"INT_FEEDTHRU_2_WW4C2": null,
|
||||
"INT_FEEDTHRU_2_WW4C3": null,
|
||||
"INT_FEEDTHRU_2_WW4END0": null,
|
||||
"INT_FEEDTHRU_2_WW4END1": null,
|
||||
"INT_FEEDTHRU_2_WW4END2": null,
|
||||
"INT_FEEDTHRU_2_WW4END3": null
|
||||
}
|
||||
}
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -7,21 +7,129 @@
|
|||
"site_pins": {
|
||||
"DIFFI_IN": null,
|
||||
"DIFFO_IN": null,
|
||||
"DIFFO_OUT": "IOB_DIFFO_OUT0",
|
||||
"DIFFO_OUT": {
|
||||
"delay": [
|
||||
"0.000",
|
||||
"0.000",
|
||||
"0.000",
|
||||
"0.000"
|
||||
],
|
||||
"res": "0.0",
|
||||
"wire": "IOB_DIFFO_OUT0"
|
||||
},
|
||||
"DIFF_TERM_INT_EN": null,
|
||||
"I": "IOB_IBUF0",
|
||||
"IBUFDISABLE": "IOB_IBUF_DISABLE0",
|
||||
"INTERMDISABLE": "LIOB_IN_TERM0",
|
||||
"KEEPER_INT_EN": "IOB_KEEPER_INT_EN_1",
|
||||
"O": "IOB_O0",
|
||||
"I": {
|
||||
"delay": [
|
||||
"0.000",
|
||||
"0.000",
|
||||
"0.000",
|
||||
"0.000"
|
||||
],
|
||||
"res": "0.0",
|
||||
"wire": "IOB_IBUF0"
|
||||
},
|
||||
"IBUFDISABLE": {
|
||||
"cap": "0.000",
|
||||
"delay": [
|
||||
"0.000",
|
||||
"0.000",
|
||||
"0.000",
|
||||
"0.000"
|
||||
],
|
||||
"wire": "IOB_IBUF_DISABLE0"
|
||||
},
|
||||
"INTERMDISABLE": {
|
||||
"cap": "0.000",
|
||||
"delay": [
|
||||
"0.000",
|
||||
"0.000",
|
||||
"0.000",
|
||||
"0.000"
|
||||
],
|
||||
"wire": "LIOB_IN_TERM0"
|
||||
},
|
||||
"KEEPER_INT_EN": {
|
||||
"cap": "0.000",
|
||||
"delay": [
|
||||
"0.000",
|
||||
"0.000",
|
||||
"0.000",
|
||||
"0.000"
|
||||
],
|
||||
"wire": "IOB_KEEPER_INT_EN_1"
|
||||
},
|
||||
"O": {
|
||||
"cap": "0.001",
|
||||
"delay": [
|
||||
"0.001",
|
||||
"0.001",
|
||||
"0.001",
|
||||
"0.001"
|
||||
],
|
||||
"wire": "IOB_O0"
|
||||
},
|
||||
"O_IN": null,
|
||||
"O_OUT": "IOB_O_OUT0",
|
||||
"PADOUT": "IOB_PADOUT0",
|
||||
"PD_INT_EN": "IOB_PD_INT_EN_1",
|
||||
"PU_INT_EN": "IOB_PU_INT_EN_1",
|
||||
"T": "IOB_T0",
|
||||
"O_OUT": {
|
||||
"delay": [
|
||||
"0.000",
|
||||
"0.000",
|
||||
"0.000",
|
||||
"0.000"
|
||||
],
|
||||
"res": "0.0",
|
||||
"wire": "IOB_O_OUT0"
|
||||
},
|
||||
"PADOUT": {
|
||||
"delay": [
|
||||
"0.000",
|
||||
"0.000",
|
||||
"0.000",
|
||||
"0.000"
|
||||
],
|
||||
"res": "0.0",
|
||||
"wire": "IOB_PADOUT0"
|
||||
},
|
||||
"PD_INT_EN": {
|
||||
"cap": "0.000",
|
||||
"delay": [
|
||||
"0.000",
|
||||
"0.000",
|
||||
"0.000",
|
||||
"0.000"
|
||||
],
|
||||
"wire": "IOB_PD_INT_EN_1"
|
||||
},
|
||||
"PU_INT_EN": {
|
||||
"cap": "0.000",
|
||||
"delay": [
|
||||
"0.000",
|
||||
"0.000",
|
||||
"0.000",
|
||||
"0.000"
|
||||
],
|
||||
"wire": "IOB_PU_INT_EN_1"
|
||||
},
|
||||
"T": {
|
||||
"cap": "0.001",
|
||||
"delay": [
|
||||
"0.001",
|
||||
"0.001",
|
||||
"0.001",
|
||||
"0.001"
|
||||
],
|
||||
"wire": "IOB_T0"
|
||||
},
|
||||
"T_IN": null,
|
||||
"T_OUT": "IOB_T_OUT0"
|
||||
"T_OUT": {
|
||||
"delay": [
|
||||
"0.000",
|
||||
"0.000",
|
||||
"0.000",
|
||||
"0.000"
|
||||
],
|
||||
"res": "0.0",
|
||||
"wire": "IOB_T_OUT0"
|
||||
}
|
||||
},
|
||||
"type": "IOB33",
|
||||
"x_coord": 0,
|
||||
|
|
@ -29,147 +137,519 @@
|
|||
}
|
||||
],
|
||||
"tile_type": "LIOB33_SING",
|
||||
"wires": [
|
||||
"IOB_DIFFI_IN0",
|
||||
"IOB_DIFFO_IN0",
|
||||
"IOB_DIFFO_OUT0",
|
||||
"IOB_DIFF_TERM_INT_EN_STUB",
|
||||
"IOB_IBUF0",
|
||||
"IOB_IBUF_DISABLE0",
|
||||
"IOB_KEEPER_INT_EN_1",
|
||||
"IOB_O0",
|
||||
"IOB_O_IN0",
|
||||
"IOB_O_OUT0",
|
||||
"IOB_PADOUT0",
|
||||
"IOB_PD_INT_EN_1",
|
||||
"IOB_PU_INT_EN_1",
|
||||
"IOB_T0",
|
||||
"IOB_T_IN0",
|
||||
"IOB_T_OUT0",
|
||||
"LIOB_EE2A0_0",
|
||||
"LIOB_EE2A1_0",
|
||||
"LIOB_EE2A2_0",
|
||||
"LIOB_EE2A3_0",
|
||||
"LIOB_EE2BEG0_0",
|
||||
"LIOB_EE2BEG1_0",
|
||||
"LIOB_EE2BEG2_0",
|
||||
"LIOB_EE2BEG3_0",
|
||||
"LIOB_EE4A0_0",
|
||||
"LIOB_EE4A1_0",
|
||||
"LIOB_EE4A2_0",
|
||||
"LIOB_EE4A3_0",
|
||||
"LIOB_EE4B0_0",
|
||||
"LIOB_EE4B1_0",
|
||||
"LIOB_EE4B2_0",
|
||||
"LIOB_EE4B3_0",
|
||||
"LIOB_EE4BEG0_0",
|
||||
"LIOB_EE4BEG1_0",
|
||||
"LIOB_EE4BEG2_0",
|
||||
"LIOB_EE4BEG3_0",
|
||||
"LIOB_EE4C0_0",
|
||||
"LIOB_EE4C1_0",
|
||||
"LIOB_EE4C2_0",
|
||||
"LIOB_EE4C3_0",
|
||||
"LIOB_EL1BEG0_0",
|
||||
"LIOB_EL1BEG1_0",
|
||||
"LIOB_EL1BEG2_0",
|
||||
"LIOB_EL1BEG3_0",
|
||||
"LIOB_ER1BEG0_0",
|
||||
"LIOB_ER1BEG1_0",
|
||||
"LIOB_ER1BEG2_0",
|
||||
"LIOB_ER1BEG3_0",
|
||||
"LIOB_IN_TERM0",
|
||||
"LIOB_LH10_0",
|
||||
"LIOB_LH11_0",
|
||||
"LIOB_LH12_0",
|
||||
"LIOB_LH1_0",
|
||||
"LIOB_LH2_0",
|
||||
"LIOB_LH3_0",
|
||||
"LIOB_LH4_0",
|
||||
"LIOB_LH5_0",
|
||||
"LIOB_LH6_0",
|
||||
"LIOB_LH7_0",
|
||||
"LIOB_LH8_0",
|
||||
"LIOB_LH9_0",
|
||||
"LIOB_NE2A0_0",
|
||||
"LIOB_NE2A1_0",
|
||||
"LIOB_NE2A2_0",
|
||||
"LIOB_NE2A3_0",
|
||||
"LIOB_NE4BEG0_0",
|
||||
"LIOB_NE4BEG1_0",
|
||||
"LIOB_NE4BEG2_0",
|
||||
"LIOB_NE4BEG3_0",
|
||||
"LIOB_NE4C0_0",
|
||||
"LIOB_NE4C1_0",
|
||||
"LIOB_NE4C2_0",
|
||||
"LIOB_NE4C3_0",
|
||||
"LIOB_NW2A0_0",
|
||||
"LIOB_NW2A1_0",
|
||||
"LIOB_NW2A2_0",
|
||||
"LIOB_NW2A3_0",
|
||||
"LIOB_NW4A0_0",
|
||||
"LIOB_NW4A1_0",
|
||||
"LIOB_NW4A2_0",
|
||||
"LIOB_NW4A3_0",
|
||||
"LIOB_NW4END0_0",
|
||||
"LIOB_NW4END1_0",
|
||||
"LIOB_NW4END2_0",
|
||||
"LIOB_NW4END3_0",
|
||||
"LIOB_SE2A0_0",
|
||||
"LIOB_SE2A1_0",
|
||||
"LIOB_SE2A2_0",
|
||||
"LIOB_SE2A3_0",
|
||||
"LIOB_SE4BEG0_0",
|
||||
"LIOB_SE4BEG1_0",
|
||||
"LIOB_SE4BEG2_0",
|
||||
"LIOB_SE4BEG3_0",
|
||||
"LIOB_SE4C0_0",
|
||||
"LIOB_SE4C1_0",
|
||||
"LIOB_SE4C2_0",
|
||||
"LIOB_SE4C3_0",
|
||||
"LIOB_SW2A0_0",
|
||||
"LIOB_SW2A1_0",
|
||||
"LIOB_SW2A2_0",
|
||||
"LIOB_SW2A3_0",
|
||||
"LIOB_SW4A0_0",
|
||||
"LIOB_SW4A1_0",
|
||||
"LIOB_SW4A2_0",
|
||||
"LIOB_SW4A3_0",
|
||||
"LIOB_SW4END0_0",
|
||||
"LIOB_SW4END1_0",
|
||||
"LIOB_SW4END2_0",
|
||||
"LIOB_SW4END3_0",
|
||||
"LIOB_WL1END0_0",
|
||||
"LIOB_WL1END1_0",
|
||||
"LIOB_WL1END2_0",
|
||||
"LIOB_WL1END3_0",
|
||||
"LIOB_WR1END0_0",
|
||||
"LIOB_WR1END1_0",
|
||||
"LIOB_WR1END2_0",
|
||||
"LIOB_WR1END3_0",
|
||||
"LIOB_WW2A0_0",
|
||||
"LIOB_WW2A1_0",
|
||||
"LIOB_WW2A2_0",
|
||||
"LIOB_WW2A3_0",
|
||||
"LIOB_WW2END0_0",
|
||||
"LIOB_WW2END1_0",
|
||||
"LIOB_WW2END2_0",
|
||||
"LIOB_WW2END3_0",
|
||||
"LIOB_WW4A0_0",
|
||||
"LIOB_WW4A1_0",
|
||||
"LIOB_WW4A2_0",
|
||||
"LIOB_WW4A3_0",
|
||||
"LIOB_WW4B0_0",
|
||||
"LIOB_WW4B1_0",
|
||||
"LIOB_WW4B2_0",
|
||||
"LIOB_WW4B3_0",
|
||||
"LIOB_WW4C0_0",
|
||||
"LIOB_WW4C1_0",
|
||||
"LIOB_WW4C2_0",
|
||||
"LIOB_WW4C3_0",
|
||||
"LIOB_WW4END0_0",
|
||||
"LIOB_WW4END1_0",
|
||||
"LIOB_WW4END2_0",
|
||||
"LIOB_WW4END3_0"
|
||||
]
|
||||
"wires": {
|
||||
"IOB_DIFFI_IN0": null,
|
||||
"IOB_DIFFO_IN0": null,
|
||||
"IOB_DIFFO_OUT0": null,
|
||||
"IOB_DIFF_TERM_INT_EN_STUB": null,
|
||||
"IOB_IBUF0": null,
|
||||
"IOB_IBUF_DISABLE0": null,
|
||||
"IOB_KEEPER_INT_EN_1": null,
|
||||
"IOB_O0": null,
|
||||
"IOB_O_IN0": null,
|
||||
"IOB_O_OUT0": null,
|
||||
"IOB_PADOUT0": null,
|
||||
"IOB_PD_INT_EN_1": null,
|
||||
"IOB_PU_INT_EN_1": null,
|
||||
"IOB_T0": null,
|
||||
"IOB_T_IN0": null,
|
||||
"IOB_T_OUT0": null,
|
||||
"LIOB_EE2A0_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_EE2A1_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_EE2A2_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_EE2A3_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_EE2BEG0_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_EE2BEG1_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_EE2BEG2_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_EE2BEG3_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_EE4A0_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_EE4A1_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_EE4A2_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_EE4A3_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_EE4B0_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_EE4B1_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_EE4B2_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_EE4B3_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_EE4BEG0_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_EE4BEG1_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_EE4BEG2_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_EE4BEG3_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_EE4C0_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_EE4C1_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_EE4C2_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_EE4C3_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_EL1BEG0_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_EL1BEG1_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_EL1BEG2_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_EL1BEG3_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_ER1BEG0_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_ER1BEG1_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_ER1BEG2_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_ER1BEG3_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_IN_TERM0": null,
|
||||
"LIOB_LH10_0": {
|
||||
"cap": "194.420",
|
||||
"res": "48.990"
|
||||
},
|
||||
"LIOB_LH11_0": {
|
||||
"cap": "194.420",
|
||||
"res": "48.990"
|
||||
},
|
||||
"LIOB_LH12_0": {
|
||||
"cap": "194.420",
|
||||
"res": "48.990"
|
||||
},
|
||||
"LIOB_LH1_0": {
|
||||
"cap": "194.420",
|
||||
"res": "48.990"
|
||||
},
|
||||
"LIOB_LH2_0": {
|
||||
"cap": "194.420",
|
||||
"res": "48.990"
|
||||
},
|
||||
"LIOB_LH3_0": {
|
||||
"cap": "194.420",
|
||||
"res": "48.990"
|
||||
},
|
||||
"LIOB_LH4_0": {
|
||||
"cap": "194.420",
|
||||
"res": "48.990"
|
||||
},
|
||||
"LIOB_LH5_0": {
|
||||
"cap": "194.420",
|
||||
"res": "48.990"
|
||||
},
|
||||
"LIOB_LH6_0": {
|
||||
"cap": "194.420",
|
||||
"res": "48.990"
|
||||
},
|
||||
"LIOB_LH7_0": {
|
||||
"cap": "194.420",
|
||||
"res": "48.990"
|
||||
},
|
||||
"LIOB_LH8_0": {
|
||||
"cap": "194.420",
|
||||
"res": "48.990"
|
||||
},
|
||||
"LIOB_LH9_0": {
|
||||
"cap": "194.420",
|
||||
"res": "48.990"
|
||||
},
|
||||
"LIOB_NE2A0_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_NE2A1_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_NE2A2_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_NE2A3_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_NE4BEG0_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_NE4BEG1_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_NE4BEG2_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_NE4BEG3_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_NE4C0_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_NE4C1_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_NE4C2_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_NE4C3_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_NW2A0_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_NW2A1_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_NW2A2_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_NW2A3_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_NW4A0_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_NW4A1_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_NW4A2_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_NW4A3_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_NW4END0_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_NW4END1_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_NW4END2_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_NW4END3_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_SE2A0_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_SE2A1_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_SE2A2_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_SE2A3_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_SE4BEG0_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_SE4BEG1_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_SE4BEG2_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_SE4BEG3_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_SE4C0_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_SE4C1_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_SE4C2_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_SE4C3_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_SW2A0_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_SW2A1_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_SW2A2_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_SW2A3_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_SW4A0_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_SW4A1_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_SW4A2_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_SW4A3_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_SW4END0_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_SW4END1_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_SW4END2_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_SW4END3_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_WL1END0_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_WL1END1_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_WL1END2_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_WL1END3_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_WR1END0_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_WR1END1_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_WR1END2_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_WR1END3_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_WW2A0_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_WW2A1_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_WW2A2_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_WW2A3_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_WW2END0_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_WW2END1_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_WW2END2_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_WW2END3_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_WW4A0_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_WW4A1_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_WW4A2_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_WW4A3_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_WW4B0_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_WW4B1_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_WW4B2_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_WW4B3_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_WW4C0_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_WW4C1_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_WW4C2_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_WW4C3_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_WW4END0_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_WW4END1_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_WW4END2_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
},
|
||||
"LIOB_WW4END3_0": {
|
||||
"cap": "150.000",
|
||||
"res": "1024.400"
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -2,172 +2,358 @@
|
|||
"pips": {},
|
||||
"sites": [],
|
||||
"tile_type": "L_TERM_INT",
|
||||
"wires": [
|
||||
"L_TERM_INT_DQS_IOTOPHASER",
|
||||
"L_TERM_INT_LH0",
|
||||
"L_TERM_INT_LH1",
|
||||
"L_TERM_INT_LH2",
|
||||
"L_TERM_INT_LH3",
|
||||
"L_TERM_INT_LH4",
|
||||
"L_TERM_INT_LH5",
|
||||
"L_TERM_INT_NW2BEG0",
|
||||
"L_TERM_INT_NW2BEG1",
|
||||
"L_TERM_INT_NW2BEG2",
|
||||
"L_TERM_INT_NW2BEG3",
|
||||
"L_TERM_INT_NW4BEG0",
|
||||
"L_TERM_INT_NW4BEG1",
|
||||
"L_TERM_INT_NW4BEG2",
|
||||
"L_TERM_INT_NW4BEG3",
|
||||
"L_TERM_INT_NW4C0",
|
||||
"L_TERM_INT_NW4C1",
|
||||
"L_TERM_INT_NW4C2",
|
||||
"L_TERM_INT_NW4C3",
|
||||
"L_TERM_INT_PHASER_TO_IO_ICLK",
|
||||
"L_TERM_INT_PHASER_TO_IO_ICLKDIV",
|
||||
"L_TERM_INT_PHASER_TO_IO_OCLK",
|
||||
"L_TERM_INT_PHASER_TO_IO_OCLK1X_90",
|
||||
"L_TERM_INT_PHASER_TO_IO_OCLKDIV",
|
||||
"L_TERM_INT_SW2BEG0",
|
||||
"L_TERM_INT_SW2BEG1",
|
||||
"L_TERM_INT_SW2BEG2",
|
||||
"L_TERM_INT_SW2BEG3",
|
||||
"L_TERM_INT_SW4BEG0",
|
||||
"L_TERM_INT_SW4BEG1",
|
||||
"L_TERM_INT_SW4BEG2",
|
||||
"L_TERM_INT_SW4BEG3",
|
||||
"L_TERM_INT_SW4C0",
|
||||
"L_TERM_INT_SW4C1",
|
||||
"L_TERM_INT_SW4C2",
|
||||
"L_TERM_INT_SW4C3",
|
||||
"L_TERM_INT_WL1BEG0",
|
||||
"L_TERM_INT_WL1BEG1",
|
||||
"L_TERM_INT_WL1BEG2",
|
||||
"L_TERM_INT_WL1BEG3",
|
||||
"L_TERM_INT_WR1BEG0",
|
||||
"L_TERM_INT_WR1BEG1",
|
||||
"L_TERM_INT_WR1BEG2",
|
||||
"L_TERM_INT_WR1BEG3",
|
||||
"L_TERM_INT_WW2A0",
|
||||
"L_TERM_INT_WW2A1",
|
||||
"L_TERM_INT_WW2A2",
|
||||
"L_TERM_INT_WW2A3",
|
||||
"L_TERM_INT_WW2BEG0",
|
||||
"L_TERM_INT_WW2BEG1",
|
||||
"L_TERM_INT_WW2BEG2",
|
||||
"L_TERM_INT_WW2BEG3",
|
||||
"L_TERM_INT_WW4A0",
|
||||
"L_TERM_INT_WW4A1",
|
||||
"L_TERM_INT_WW4A2",
|
||||
"L_TERM_INT_WW4A3",
|
||||
"L_TERM_INT_WW4B0",
|
||||
"L_TERM_INT_WW4B1",
|
||||
"L_TERM_INT_WW4B2",
|
||||
"L_TERM_INT_WW4B3",
|
||||
"L_TERM_INT_WW4BEG0",
|
||||
"L_TERM_INT_WW4BEG1",
|
||||
"L_TERM_INT_WW4BEG2",
|
||||
"L_TERM_INT_WW4BEG3",
|
||||
"L_TERM_INT_WW4C0",
|
||||
"L_TERM_INT_WW4C1",
|
||||
"L_TERM_INT_WW4C2",
|
||||
"L_TERM_INT_WW4C3",
|
||||
"TERM_INT_BLOCK_OUTS_L_B0",
|
||||
"TERM_INT_BLOCK_OUTS_L_B1",
|
||||
"TERM_INT_BLOCK_OUTS_L_B2",
|
||||
"TERM_INT_BLOCK_OUTS_L_B3",
|
||||
"TERM_INT_BYP0",
|
||||
"TERM_INT_BYP1",
|
||||
"TERM_INT_BYP2",
|
||||
"TERM_INT_BYP3",
|
||||
"TERM_INT_BYP4",
|
||||
"TERM_INT_BYP5",
|
||||
"TERM_INT_BYP6",
|
||||
"TERM_INT_BYP7",
|
||||
"TERM_INT_CLK0",
|
||||
"TERM_INT_CLK1",
|
||||
"TERM_INT_CTRL0",
|
||||
"TERM_INT_CTRL1",
|
||||
"TERM_INT_FAN0",
|
||||
"TERM_INT_FAN1",
|
||||
"TERM_INT_FAN2",
|
||||
"TERM_INT_FAN3",
|
||||
"TERM_INT_FAN4",
|
||||
"TERM_INT_FAN5",
|
||||
"TERM_INT_FAN6",
|
||||
"TERM_INT_FAN7",
|
||||
"TERM_INT_IMUX0",
|
||||
"TERM_INT_IMUX1",
|
||||
"TERM_INT_IMUX10",
|
||||
"TERM_INT_IMUX11",
|
||||
"TERM_INT_IMUX12",
|
||||
"TERM_INT_IMUX13",
|
||||
"TERM_INT_IMUX14",
|
||||
"TERM_INT_IMUX15",
|
||||
"TERM_INT_IMUX16",
|
||||
"TERM_INT_IMUX17",
|
||||
"TERM_INT_IMUX18",
|
||||
"TERM_INT_IMUX19",
|
||||
"TERM_INT_IMUX2",
|
||||
"TERM_INT_IMUX20",
|
||||
"TERM_INT_IMUX21",
|
||||
"TERM_INT_IMUX22",
|
||||
"TERM_INT_IMUX23",
|
||||
"TERM_INT_IMUX24",
|
||||
"TERM_INT_IMUX25",
|
||||
"TERM_INT_IMUX26",
|
||||
"TERM_INT_IMUX27",
|
||||
"TERM_INT_IMUX28",
|
||||
"TERM_INT_IMUX29",
|
||||
"TERM_INT_IMUX3",
|
||||
"TERM_INT_IMUX30",
|
||||
"TERM_INT_IMUX31",
|
||||
"TERM_INT_IMUX32",
|
||||
"TERM_INT_IMUX33",
|
||||
"TERM_INT_IMUX34",
|
||||
"TERM_INT_IMUX35",
|
||||
"TERM_INT_IMUX36",
|
||||
"TERM_INT_IMUX37",
|
||||
"TERM_INT_IMUX38",
|
||||
"TERM_INT_IMUX39",
|
||||
"TERM_INT_IMUX4",
|
||||
"TERM_INT_IMUX40",
|
||||
"TERM_INT_IMUX41",
|
||||
"TERM_INT_IMUX42",
|
||||
"TERM_INT_IMUX43",
|
||||
"TERM_INT_IMUX44",
|
||||
"TERM_INT_IMUX45",
|
||||
"TERM_INT_IMUX46",
|
||||
"TERM_INT_IMUX47",
|
||||
"TERM_INT_IMUX5",
|
||||
"TERM_INT_IMUX6",
|
||||
"TERM_INT_IMUX7",
|
||||
"TERM_INT_IMUX8",
|
||||
"TERM_INT_IMUX9",
|
||||
"TERM_INT_LOGIC_OUTS_L_B0",
|
||||
"TERM_INT_LOGIC_OUTS_L_B1",
|
||||
"TERM_INT_LOGIC_OUTS_L_B10",
|
||||
"TERM_INT_LOGIC_OUTS_L_B11",
|
||||
"TERM_INT_LOGIC_OUTS_L_B12",
|
||||
"TERM_INT_LOGIC_OUTS_L_B13",
|
||||
"TERM_INT_LOGIC_OUTS_L_B14",
|
||||
"TERM_INT_LOGIC_OUTS_L_B15",
|
||||
"TERM_INT_LOGIC_OUTS_L_B16",
|
||||
"TERM_INT_LOGIC_OUTS_L_B17",
|
||||
"TERM_INT_LOGIC_OUTS_L_B18",
|
||||
"TERM_INT_LOGIC_OUTS_L_B19",
|
||||
"TERM_INT_LOGIC_OUTS_L_B2",
|
||||
"TERM_INT_LOGIC_OUTS_L_B20",
|
||||
"TERM_INT_LOGIC_OUTS_L_B21",
|
||||
"TERM_INT_LOGIC_OUTS_L_B22",
|
||||
"TERM_INT_LOGIC_OUTS_L_B23",
|
||||
"TERM_INT_LOGIC_OUTS_L_B3",
|
||||
"TERM_INT_LOGIC_OUTS_L_B4",
|
||||
"TERM_INT_LOGIC_OUTS_L_B5",
|
||||
"TERM_INT_LOGIC_OUTS_L_B6",
|
||||
"TERM_INT_LOGIC_OUTS_L_B7",
|
||||
"TERM_INT_LOGIC_OUTS_L_B8",
|
||||
"TERM_INT_LOGIC_OUTS_L_B9",
|
||||
"TERM_INT_MONITOR_N",
|
||||
"TERM_INT_MONITOR_P"
|
||||
]
|
||||
"wires": {
|
||||
"L_TERM_INT_DQS_IOTOPHASER": null,
|
||||
"L_TERM_INT_LH0": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_LH1": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_LH2": {
|
||||
"cap": "13.120",
|
||||
"res": "4.520"
|
||||
},
|
||||
"L_TERM_INT_LH3": {
|
||||
"cap": "13.120",
|
||||
"res": "4.520"
|
||||
},
|
||||
"L_TERM_INT_LH4": {
|
||||
"cap": "13.120",
|
||||
"res": "4.520"
|
||||
},
|
||||
"L_TERM_INT_LH5": {
|
||||
"cap": "13.120",
|
||||
"res": "4.520"
|
||||
},
|
||||
"L_TERM_INT_NW2BEG0": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_NW2BEG1": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_NW2BEG2": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_NW2BEG3": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_NW4BEG0": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_NW4BEG1": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_NW4BEG2": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_NW4BEG3": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_NW4C0": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_NW4C1": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_NW4C2": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_NW4C3": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_PHASER_TO_IO_ICLK": null,
|
||||
"L_TERM_INT_PHASER_TO_IO_ICLKDIV": null,
|
||||
"L_TERM_INT_PHASER_TO_IO_OCLK": null,
|
||||
"L_TERM_INT_PHASER_TO_IO_OCLK1X_90": null,
|
||||
"L_TERM_INT_PHASER_TO_IO_OCLKDIV": null,
|
||||
"L_TERM_INT_SW2BEG0": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_SW2BEG1": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_SW2BEG2": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_SW2BEG3": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_SW4BEG0": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_SW4BEG1": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_SW4BEG2": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_SW4BEG3": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_SW4C0": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_SW4C1": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_SW4C2": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_SW4C3": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_WL1BEG0": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_WL1BEG1": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_WL1BEG2": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_WL1BEG3": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_WR1BEG0": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_WR1BEG1": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_WR1BEG2": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_WR1BEG3": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_WW2A0": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_WW2A1": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_WW2A2": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_WW2A3": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_WW2BEG0": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_WW2BEG1": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_WW2BEG2": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_WW2BEG3": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_WW4A0": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_WW4A1": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_WW4A2": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_WW4A3": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_WW4B0": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_WW4B1": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_WW4B2": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_WW4B3": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_WW4BEG0": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_WW4BEG1": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_WW4BEG2": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_WW4BEG3": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_WW4C0": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_WW4C1": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_WW4C2": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"L_TERM_INT_WW4C3": {
|
||||
"cap": "4.200",
|
||||
"res": "87.290"
|
||||
},
|
||||
"TERM_INT_BLOCK_OUTS_L_B0": null,
|
||||
"TERM_INT_BLOCK_OUTS_L_B1": null,
|
||||
"TERM_INT_BLOCK_OUTS_L_B2": null,
|
||||
"TERM_INT_BLOCK_OUTS_L_B3": null,
|
||||
"TERM_INT_BYP0": null,
|
||||
"TERM_INT_BYP1": null,
|
||||
"TERM_INT_BYP2": null,
|
||||
"TERM_INT_BYP3": null,
|
||||
"TERM_INT_BYP4": null,
|
||||
"TERM_INT_BYP5": null,
|
||||
"TERM_INT_BYP6": null,
|
||||
"TERM_INT_BYP7": null,
|
||||
"TERM_INT_CLK0": null,
|
||||
"TERM_INT_CLK1": null,
|
||||
"TERM_INT_CTRL0": null,
|
||||
"TERM_INT_CTRL1": null,
|
||||
"TERM_INT_FAN0": null,
|
||||
"TERM_INT_FAN1": null,
|
||||
"TERM_INT_FAN2": null,
|
||||
"TERM_INT_FAN3": null,
|
||||
"TERM_INT_FAN4": null,
|
||||
"TERM_INT_FAN5": null,
|
||||
"TERM_INT_FAN6": null,
|
||||
"TERM_INT_FAN7": null,
|
||||
"TERM_INT_IMUX0": null,
|
||||
"TERM_INT_IMUX1": null,
|
||||
"TERM_INT_IMUX10": null,
|
||||
"TERM_INT_IMUX11": null,
|
||||
"TERM_INT_IMUX12": null,
|
||||
"TERM_INT_IMUX13": null,
|
||||
"TERM_INT_IMUX14": null,
|
||||
"TERM_INT_IMUX15": null,
|
||||
"TERM_INT_IMUX16": null,
|
||||
"TERM_INT_IMUX17": null,
|
||||
"TERM_INT_IMUX18": null,
|
||||
"TERM_INT_IMUX19": null,
|
||||
"TERM_INT_IMUX2": null,
|
||||
"TERM_INT_IMUX20": null,
|
||||
"TERM_INT_IMUX21": null,
|
||||
"TERM_INT_IMUX22": null,
|
||||
"TERM_INT_IMUX23": null,
|
||||
"TERM_INT_IMUX24": null,
|
||||
"TERM_INT_IMUX25": null,
|
||||
"TERM_INT_IMUX26": null,
|
||||
"TERM_INT_IMUX27": null,
|
||||
"TERM_INT_IMUX28": null,
|
||||
"TERM_INT_IMUX29": null,
|
||||
"TERM_INT_IMUX3": null,
|
||||
"TERM_INT_IMUX30": null,
|
||||
"TERM_INT_IMUX31": null,
|
||||
"TERM_INT_IMUX32": null,
|
||||
"TERM_INT_IMUX33": null,
|
||||
"TERM_INT_IMUX34": null,
|
||||
"TERM_INT_IMUX35": null,
|
||||
"TERM_INT_IMUX36": null,
|
||||
"TERM_INT_IMUX37": null,
|
||||
"TERM_INT_IMUX38": null,
|
||||
"TERM_INT_IMUX39": null,
|
||||
"TERM_INT_IMUX4": null,
|
||||
"TERM_INT_IMUX40": null,
|
||||
"TERM_INT_IMUX41": null,
|
||||
"TERM_INT_IMUX42": null,
|
||||
"TERM_INT_IMUX43": null,
|
||||
"TERM_INT_IMUX44": null,
|
||||
"TERM_INT_IMUX45": null,
|
||||
"TERM_INT_IMUX46": null,
|
||||
"TERM_INT_IMUX47": null,
|
||||
"TERM_INT_IMUX5": null,
|
||||
"TERM_INT_IMUX6": null,
|
||||
"TERM_INT_IMUX7": null,
|
||||
"TERM_INT_IMUX8": null,
|
||||
"TERM_INT_IMUX9": null,
|
||||
"TERM_INT_LOGIC_OUTS_L_B0": null,
|
||||
"TERM_INT_LOGIC_OUTS_L_B1": null,
|
||||
"TERM_INT_LOGIC_OUTS_L_B10": null,
|
||||
"TERM_INT_LOGIC_OUTS_L_B11": null,
|
||||
"TERM_INT_LOGIC_OUTS_L_B12": null,
|
||||
"TERM_INT_LOGIC_OUTS_L_B13": null,
|
||||
"TERM_INT_LOGIC_OUTS_L_B14": null,
|
||||
"TERM_INT_LOGIC_OUTS_L_B15": null,
|
||||
"TERM_INT_LOGIC_OUTS_L_B16": null,
|
||||
"TERM_INT_LOGIC_OUTS_L_B17": null,
|
||||
"TERM_INT_LOGIC_OUTS_L_B18": null,
|
||||
"TERM_INT_LOGIC_OUTS_L_B19": null,
|
||||
"TERM_INT_LOGIC_OUTS_L_B2": null,
|
||||
"TERM_INT_LOGIC_OUTS_L_B20": null,
|
||||
"TERM_INT_LOGIC_OUTS_L_B21": null,
|
||||
"TERM_INT_LOGIC_OUTS_L_B22": null,
|
||||
"TERM_INT_LOGIC_OUTS_L_B23": null,
|
||||
"TERM_INT_LOGIC_OUTS_L_B3": null,
|
||||
"TERM_INT_LOGIC_OUTS_L_B4": null,
|
||||
"TERM_INT_LOGIC_OUTS_L_B5": null,
|
||||
"TERM_INT_LOGIC_OUTS_L_B6": null,
|
||||
"TERM_INT_LOGIC_OUTS_L_B7": null,
|
||||
"TERM_INT_LOGIC_OUTS_L_B8": null,
|
||||
"TERM_INT_LOGIC_OUTS_L_B9": null,
|
||||
"TERM_INT_MONITOR_N": null,
|
||||
"TERM_INT_MONITOR_P": null
|
||||
}
|
||||
}
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -2,7 +2,7 @@
|
|||
"pips": {},
|
||||
"sites": [],
|
||||
"tile_type": "NULL",
|
||||
"wires": [
|
||||
"DUMMYFOO"
|
||||
]
|
||||
"wires": {
|
||||
"DUMMYFOO": null
|
||||
}
|
||||
}
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -2,7 +2,7 @@
|
|||
"pips": {},
|
||||
"sites": [],
|
||||
"tile_type": "PCIE_NULL",
|
||||
"wires": [
|
||||
"DUMMYFOO"
|
||||
]
|
||||
"wires": {
|
||||
"DUMMYFOO": null
|
||||
}
|
||||
}
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue