Updating all based on "Merge pull request #1591 from antmicro/add-dsp-pips"
See [Info File](Info.md) for details. Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
This commit is contained in:
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Info.md
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Info.md
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@ -37,20 +37,20 @@ These files are released under the very permissive [CC0 1.0 Universal](COPYING).
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# Details
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Last updated on Mon 25 Jan 2021 08:15:39 PM UTC (2021-01-25T20:15:39+00:00).
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Last updated on Thu 18 Feb 2021 04:28:24 PM UTC (2021-02-18T16:28:24+00:00).
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Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [6e3f0537](https://github.com/SymbiFlow/prjxray/commit/6e3f05370102d3b93760120741ca75c14599e7e2).
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Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [f3028e15](https://github.com/SymbiFlow/prjxray/commit/f3028e157e5f554e085af2a58247e2c8c7be0f3b).
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Latest commit was;
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```
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commit 6e3f05370102d3b93760120741ca75c14599e7e2
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Merge: 14d2c2b9 b81df3fe
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commit f3028e157e5f554e085af2a58247e2c8c7be0f3b
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Merge: 2c9571d1 82662476
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Author: litghost <537074+litghost@users.noreply.github.com>
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Date: Fri Jan 22 12:36:55 2021 -0800
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Date: Wed Feb 17 09:26:49 2021 -0800
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Merge pull request #1558 from antmicro/add-gtp-channel-conf
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Merge pull request #1591 from antmicro/add-dsp-pips
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Add GTP_CHANNEL fuzzer
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101-dsp-pips: solve DSP-related PIPs
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```
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@ -59,7 +59,7 @@ Date: Fri Jan 22 12:36:55 2021 -0800
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### Settings
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Created using following [settings/artix7.sh (sha256: 00d45bf1672d3460e8d452cda8e747fa713eed629aa086b219162886452013e4)](https://github.com/SymbiFlow/prjxray/blob/6e3f05370102d3b93760120741ca75c14599e7e2/settings/artix7.sh)
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Created using following [settings/artix7.sh (sha256: 00d45bf1672d3460e8d452cda8e747fa713eed629aa086b219162886452013e4)](https://github.com/SymbiFlow/prjxray/blob/f3028e157e5f554e085af2a58247e2c8c7be0f3b/settings/artix7.sh)
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```shell
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#!/bin/bash
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# Copyright (C) 2017-2020 The Project X-Ray Authors.
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@ -109,26 +109,26 @@ Results have checksums;
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* [`2b18b3806f0e58024469eac1fe11749d04c6b035d2c2eafa7d2f30bf57173fa9 ./artix7/harness/README.md`](./artix7/harness/README.md)
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* [`560f255b569fd4798989f45104d4a511b51380418d4ca6fc53201141b36b20aa ./artix7/harness/arty-a7/pmod/design.bit`](./artix7/harness/arty-a7/pmod/design.bit)
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* [`1d8a121c3aa3bca7893429cfb08a8748206134271432daa52cdc9d3f5593bda0 ./artix7/harness/arty-a7/pmod/design.dcp`](./artix7/harness/arty-a7/pmod/design.dcp)
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* [`fce1ab5cc3e9b1ec365d1ec76ae95e8fcbb3ed9f412faa73c05cc94ab530723b ./artix7/harness/arty-a7/pmod/design.json`](./artix7/harness/arty-a7/pmod/design.json)
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* [`38d9952e3e0a9bee6829dd338fa1965e150fd0d75fea13891d7a6a64fb5e14a5 ./artix7/harness/arty-a7/pmod/design.json`](./artix7/harness/arty-a7/pmod/design.json)
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* [`fb90ad5fe10750f33d5802e1409ebc2406f7b0adab4bf6ef12b53c0e100b43ea ./artix7/harness/arty-a7/pmod/design.txt`](./artix7/harness/arty-a7/pmod/design.txt)
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* [`931c1598b75005a8a8e5b2225cc7454c2c7be451cb907bc4c047cb04db99772d ./artix7/harness/arty-a7/swbut/design.bit`](./artix7/harness/arty-a7/swbut/design.bit)
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* [`5d06132c788097344a9bca7040a08dd0e1632e177ed8def1d7445132020cc768 ./artix7/harness/arty-a7/swbut/design.dcp`](./artix7/harness/arty-a7/swbut/design.dcp)
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* [`05fac731f2df3b4e59a567fe7a2db3e7cbaa370d47ae15d071de98cb8a266340 ./artix7/harness/arty-a7/swbut/design.json`](./artix7/harness/arty-a7/swbut/design.json)
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* [`b1ff8026fb1ae19410884c09075306fe0cbeef8b4116bf7070979d19d1842bfa ./artix7/harness/arty-a7/swbut/design.json`](./artix7/harness/arty-a7/swbut/design.json)
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* [`884af447661ff1cb653cd8280602c2348435366b35bf2627e2221af34899d191 ./artix7/harness/arty-a7/swbut/design.txt`](./artix7/harness/arty-a7/swbut/design.txt)
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* [`128e73ee026cf2238a35c7e993b845e3551919c90fc77b277635bc5098d59741 ./artix7/harness/arty-a7/uart/design.bit`](./artix7/harness/arty-a7/uart/design.bit)
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* [`955daed70c5728c13865eddc9bd7001d93183a50c560559a7b6628aa85b1fbbe ./artix7/harness/arty-a7/uart/design.dcp`](./artix7/harness/arty-a7/uart/design.dcp)
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* [`8232e7aa1e30e0ae5d7d5cecd73ff0b6daa241a7271b16b94229ade213422339 ./artix7/harness/arty-a7/uart/design.json`](./artix7/harness/arty-a7/uart/design.json)
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* [`c9cc30b017bf4345b3f0d6707f76cd50da2e7b6f045877bc99c1404147b1bb1e ./artix7/harness/arty-a7/uart/design.json`](./artix7/harness/arty-a7/uart/design.json)
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* [`0583aa7502ee7a0303510c524f5500d8e1b9598aa26016d3d0e4e9623bf8ab8d ./artix7/harness/arty-a7/uart/design.txt`](./artix7/harness/arty-a7/uart/design.txt)
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* [`d3109010f8fced3be08e720741a157d08b7042359e84d04bbe677f50cbf10a04 ./artix7/harness/basys3/swbut/design.bit`](./artix7/harness/basys3/swbut/design.bit)
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* [`abedfa7f2ee5a4dbc51b582ebae62dd20489f745a4a239e49b18ba3e02be019f ./artix7/harness/basys3/swbut/design.dcp`](./artix7/harness/basys3/swbut/design.dcp)
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* [`1765b8e3bf0a02192069749f810ebf99e5309154464140b0fbceca521bcefc52 ./artix7/harness/basys3/swbut/design.json`](./artix7/harness/basys3/swbut/design.json)
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* [`77aaf986289d5d97ab80a61fe6ef9708e03a95f4de895ec8c9b364c602b98424 ./artix7/harness/basys3/swbut/design.json`](./artix7/harness/basys3/swbut/design.json)
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* [`9df8eac3c11e57d81b4bf4a927ade787f881f0ef46c8ab610ca529f35e887689 ./artix7/harness/basys3/swbut/design.txt`](./artix7/harness/basys3/swbut/design.txt)
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* [`3ad62b024991225f1565e84159f2eb59d08e9fc6cf2577ea1698952b5dc0e4ec ./artix7/harness/basys3/swbut_50/design.bit`](./artix7/harness/basys3/swbut_50/design.bit)
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* [`773fe43b4974ab353bde87e544abb6b541cdcb280de40df76afa96f7fa23db46 ./artix7/harness/basys3/swbut_50/design.dcp`](./artix7/harness/basys3/swbut_50/design.dcp)
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* [`5d08d9434fd6a8340dfe354613455554c037f6c886a35f6cc98055ff955613c1 ./artix7/harness/basys3/swbut_50/design.json`](./artix7/harness/basys3/swbut_50/design.json)
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* [`9df8eac3c11e57d81b4bf4a927ade787f881f0ef46c8ab610ca529f35e887689 ./artix7/harness/basys3/swbut_50/design.txt`](./artix7/harness/basys3/swbut_50/design.txt)
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* [`e5ebd51966bcfddb9b04078203231810df64f5afd3e3a608a5fb8fdc7d3c3304 ./artix7/mapping/devices.yaml`](./artix7/mapping/devices.yaml)
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* [`ee389fc75dd0f56a71852be8b2c1ce1a8c9572a63e4a3e92c239dcab71d7b7f8 ./artix7/mapping/parts.yaml`](./artix7/mapping/parts.yaml)
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* [`9a63d519dcfee4016602553490a53c00a2fbc8cd0355ed201cfa3545650f6ce4 ./artix7/mapping/parts.yaml`](./artix7/mapping/parts.yaml)
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* [`fca753747fb1d583483e22980c4dae3a2de6451a326d46eab3581ea6f50f5b2d ./artix7/mask_bram_l.block_ram.db`](./artix7/mask_bram_l.block_ram.db)
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* [`6d74881ba45dd2b17f442764722e3bb570fc879b973f32a778d0cbd583b513e1 ./artix7/mask_bram_l.db`](./artix7/mask_bram_l.db)
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* [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./artix7/mask_bram_l.origin_info.db`](./artix7/mask_bram_l.origin_info.db)
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|
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@ -152,21 +152,21 @@ Results have checksums;
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* [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./artix7/mask_dsp_l.origin_info.db`](./artix7/mask_dsp_l.origin_info.db)
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* [`0ea9fc3ec271604c27b850f84ec3811fd366c0897dfb8728bdb96d7f170a8a27 ./artix7/mask_dsp_r.db`](./artix7/mask_dsp_r.db)
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* [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./artix7/mask_dsp_r.origin_info.db`](./artix7/mask_dsp_r.origin_info.db)
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* [`2ad5834b0de909d9645f57caa13bbe7a8a2d68ad36adeda8ef8f59ecaa6f92bf ./artix7/mask_gtp_channel_0.db`](./artix7/mask_gtp_channel_0.db)
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* [`2ad5834b0de909d9645f57caa13bbe7a8a2d68ad36adeda8ef8f59ecaa6f92bf ./artix7/mask_gtp_channel_0_mid_left.db`](./artix7/mask_gtp_channel_0_mid_left.db)
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* [`2ad5834b0de909d9645f57caa13bbe7a8a2d68ad36adeda8ef8f59ecaa6f92bf ./artix7/mask_gtp_channel_0_mid_right.db`](./artix7/mask_gtp_channel_0_mid_right.db)
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* [`2ad5834b0de909d9645f57caa13bbe7a8a2d68ad36adeda8ef8f59ecaa6f92bf ./artix7/mask_gtp_channel_1.db`](./artix7/mask_gtp_channel_1.db)
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* [`2ad5834b0de909d9645f57caa13bbe7a8a2d68ad36adeda8ef8f59ecaa6f92bf ./artix7/mask_gtp_channel_1_mid_left.db`](./artix7/mask_gtp_channel_1_mid_left.db)
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* [`2ad5834b0de909d9645f57caa13bbe7a8a2d68ad36adeda8ef8f59ecaa6f92bf ./artix7/mask_gtp_channel_1_mid_right.db`](./artix7/mask_gtp_channel_1_mid_right.db)
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* [`2ad5834b0de909d9645f57caa13bbe7a8a2d68ad36adeda8ef8f59ecaa6f92bf ./artix7/mask_gtp_channel_2.db`](./artix7/mask_gtp_channel_2.db)
|
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* [`2ad5834b0de909d9645f57caa13bbe7a8a2d68ad36adeda8ef8f59ecaa6f92bf ./artix7/mask_gtp_channel_2_mid_left.db`](./artix7/mask_gtp_channel_2_mid_left.db)
|
||||
* [`2ad5834b0de909d9645f57caa13bbe7a8a2d68ad36adeda8ef8f59ecaa6f92bf ./artix7/mask_gtp_channel_2_mid_right.db`](./artix7/mask_gtp_channel_2_mid_right.db)
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* [`2ad5834b0de909d9645f57caa13bbe7a8a2d68ad36adeda8ef8f59ecaa6f92bf ./artix7/mask_gtp_channel_3.db`](./artix7/mask_gtp_channel_3.db)
|
||||
* [`2ad5834b0de909d9645f57caa13bbe7a8a2d68ad36adeda8ef8f59ecaa6f92bf ./artix7/mask_gtp_channel_3_mid_left.db`](./artix7/mask_gtp_channel_3_mid_left.db)
|
||||
* [`2ad5834b0de909d9645f57caa13bbe7a8a2d68ad36adeda8ef8f59ecaa6f92bf ./artix7/mask_gtp_channel_3_mid_right.db`](./artix7/mask_gtp_channel_3_mid_right.db)
|
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* [`5a3a0bab93d2e2df22e1245c38d2e1a62f6d6cb1d6ad358099402d9c89aa13bc ./artix7/mask_gtp_common.db`](./artix7/mask_gtp_common.db)
|
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* [`60e4aed5bb9e864d2cd815281cf2bcf296b462d5e0982eabf9c582a4e2f89afc ./artix7/mask_gtp_common_mid_left.db`](./artix7/mask_gtp_common_mid_left.db)
|
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* [`60e4aed5bb9e864d2cd815281cf2bcf296b462d5e0982eabf9c582a4e2f89afc ./artix7/mask_gtp_common_mid_right.db`](./artix7/mask_gtp_common_mid_right.db)
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* [`9e159b25b2f3eadcc2fa0bcd2f3c25dc3acf2083d3a57368968204d70d5f8ae4 ./artix7/mask_gtp_channel_0.db`](./artix7/mask_gtp_channel_0.db)
|
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* [`d9ee40b7a46372b89ebc17de5800266a25489c6c2f3f9495d29f7916c3c6909c ./artix7/mask_gtp_channel_0_mid_left.db`](./artix7/mask_gtp_channel_0_mid_left.db)
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* [`d9ee40b7a46372b89ebc17de5800266a25489c6c2f3f9495d29f7916c3c6909c ./artix7/mask_gtp_channel_0_mid_right.db`](./artix7/mask_gtp_channel_0_mid_right.db)
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* [`9e159b25b2f3eadcc2fa0bcd2f3c25dc3acf2083d3a57368968204d70d5f8ae4 ./artix7/mask_gtp_channel_1.db`](./artix7/mask_gtp_channel_1.db)
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* [`d9ee40b7a46372b89ebc17de5800266a25489c6c2f3f9495d29f7916c3c6909c ./artix7/mask_gtp_channel_1_mid_left.db`](./artix7/mask_gtp_channel_1_mid_left.db)
|
||||
* [`d9ee40b7a46372b89ebc17de5800266a25489c6c2f3f9495d29f7916c3c6909c ./artix7/mask_gtp_channel_1_mid_right.db`](./artix7/mask_gtp_channel_1_mid_right.db)
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* [`9e159b25b2f3eadcc2fa0bcd2f3c25dc3acf2083d3a57368968204d70d5f8ae4 ./artix7/mask_gtp_channel_2.db`](./artix7/mask_gtp_channel_2.db)
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* [`d9ee40b7a46372b89ebc17de5800266a25489c6c2f3f9495d29f7916c3c6909c ./artix7/mask_gtp_channel_2_mid_left.db`](./artix7/mask_gtp_channel_2_mid_left.db)
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* [`d9ee40b7a46372b89ebc17de5800266a25489c6c2f3f9495d29f7916c3c6909c ./artix7/mask_gtp_channel_2_mid_right.db`](./artix7/mask_gtp_channel_2_mid_right.db)
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* [`9e159b25b2f3eadcc2fa0bcd2f3c25dc3acf2083d3a57368968204d70d5f8ae4 ./artix7/mask_gtp_channel_3.db`](./artix7/mask_gtp_channel_3.db)
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* [`d9ee40b7a46372b89ebc17de5800266a25489c6c2f3f9495d29f7916c3c6909c ./artix7/mask_gtp_channel_3_mid_left.db`](./artix7/mask_gtp_channel_3_mid_left.db)
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* [`d9ee40b7a46372b89ebc17de5800266a25489c6c2f3f9495d29f7916c3c6909c ./artix7/mask_gtp_channel_3_mid_right.db`](./artix7/mask_gtp_channel_3_mid_right.db)
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* [`b9066d709d18d2d284c7728de80437c2785c2ab02edb7220fc93099a64f96232 ./artix7/mask_gtp_common.db`](./artix7/mask_gtp_common.db)
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* [`212f9438c5b4fdb328d28ea3ae6f97f15169faa1d8d0d73476e476018a4521e5 ./artix7/mask_gtp_common_mid_left.db`](./artix7/mask_gtp_common_mid_left.db)
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* [`212f9438c5b4fdb328d28ea3ae6f97f15169faa1d8d0d73476e476018a4521e5 ./artix7/mask_gtp_common_mid_right.db`](./artix7/mask_gtp_common_mid_right.db)
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* [`c714c25d06cc5d3b7947e638f55c5268b01792cb2d86320a5411d00387ada404 ./artix7/mask_hclk_cmt.db`](./artix7/mask_hclk_cmt.db)
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||||
* [`c714c25d06cc5d3b7947e638f55c5268b01792cb2d86320a5411d00387ada404 ./artix7/mask_hclk_cmt_l.db`](./artix7/mask_hclk_cmt_l.db)
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* [`d0914443ac28056e840aee431bd51933a7cdc6504eefb052113d7e33e8b08e83 ./artix7/mask_hclk_ioi.db`](./artix7/mask_hclk_ioi.db)
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|
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@ -175,12 +175,12 @@ Results have checksums;
|
|||
* [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./artix7/mask_hclk_l.origin_info.db`](./artix7/mask_hclk_l.origin_info.db)
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||||
* [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd ./artix7/mask_hclk_r.db`](./artix7/mask_hclk_r.db)
|
||||
* [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./artix7/mask_hclk_r.origin_info.db`](./artix7/mask_hclk_r.origin_info.db)
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||||
* [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6 ./artix7/mask_liob33.db`](./artix7/mask_liob33.db)
|
||||
* [`b1e6417cccea25799f1e5bf4b86b7a42fa1c46cb1351da93e380a519691e9fbd ./artix7/mask_liob33.db`](./artix7/mask_liob33.db)
|
||||
* [`e189322ecc5395aaff1b7100fc3ef5f259b7f1425a05a4464835eacc509a2576 ./artix7/mask_lioi3.db`](./artix7/mask_lioi3.db)
|
||||
* [`e189322ecc5395aaff1b7100fc3ef5f259b7f1425a05a4464835eacc509a2576 ./artix7/mask_lioi3_tbytesrc.db`](./artix7/mask_lioi3_tbytesrc.db)
|
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* [`e189322ecc5395aaff1b7100fc3ef5f259b7f1425a05a4464835eacc509a2576 ./artix7/mask_lioi3_tbyteterm.db`](./artix7/mask_lioi3_tbyteterm.db)
|
||||
* [`454a16b8e9d2e0d38ee8c4af979a7bb1dd0757e5edb90d7b4f9489f094e7b162 ./artix7/mask_pcie_bot.db`](./artix7/mask_pcie_bot.db)
|
||||
* [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6 ./artix7/mask_riob33.db`](./artix7/mask_riob33.db)
|
||||
* [`b1e6417cccea25799f1e5bf4b86b7a42fa1c46cb1351da93e380a519691e9fbd ./artix7/mask_riob33.db`](./artix7/mask_riob33.db)
|
||||
* [`e189322ecc5395aaff1b7100fc3ef5f259b7f1425a05a4464835eacc509a2576 ./artix7/mask_rioi3.db`](./artix7/mask_rioi3.db)
|
||||
* [`e189322ecc5395aaff1b7100fc3ef5f259b7f1425a05a4464835eacc509a2576 ./artix7/mask_rioi3_tbytesrc.db`](./artix7/mask_rioi3_tbytesrc.db)
|
||||
* [`e189322ecc5395aaff1b7100fc3ef5f259b7f1425a05a4464835eacc509a2576 ./artix7/mask_rioi3_tbyteterm.db`](./artix7/mask_rioi3_tbyteterm.db)
|
||||
|
|
@ -275,10 +275,10 @@ Results have checksums;
|
|||
* [`0a36013e20bc01d66d1a73eb2594e67d57898efddeb8de046ebcf65eed259c27 ./artix7/segbits_cmt_top_r_lower_b.origin_info.db`](./artix7/segbits_cmt_top_r_lower_b.origin_info.db)
|
||||
* [`05dd5d01374a8b40883444d33ea467e5e4363fc329e89402ee9618bde4d6752b ./artix7/segbits_cmt_top_r_upper_t.db`](./artix7/segbits_cmt_top_r_upper_t.db)
|
||||
* [`1117a583fc1c9265aa6dcea7d32f363dd2c5ebe0e657f3a242c5fb0ceb8555fc ./artix7/segbits_cmt_top_r_upper_t.origin_info.db`](./artix7/segbits_cmt_top_r_upper_t.origin_info.db)
|
||||
* [`0d9f730a1328a61f471c2f6abd98463a39c7e5e70ff557adc6228e1830560c64 ./artix7/segbits_dsp_l.db`](./artix7/segbits_dsp_l.db)
|
||||
* [`10a6e47f7b26f0d21cf0a011d4a5f2a4266538bb8d028a07fd981323dc1f0da0 ./artix7/segbits_dsp_l.origin_info.db`](./artix7/segbits_dsp_l.origin_info.db)
|
||||
* [`f81459ae1c84e0e73815c4577a7d0b19b497dd7f16029763c3fc4f3b8410dcc2 ./artix7/segbits_dsp_r.db`](./artix7/segbits_dsp_r.db)
|
||||
* [`76965c2e6ba2acab8f809a3d947b100fd322ba5b6d88c358bf816699348b07bf ./artix7/segbits_dsp_r.origin_info.db`](./artix7/segbits_dsp_r.origin_info.db)
|
||||
* [`81e0623ff13a253e3f9303de3d5dfbcf2fc92cf5cba277bd7de69e70c3c527e3 ./artix7/segbits_dsp_l.db`](./artix7/segbits_dsp_l.db)
|
||||
* [`18cfd5dd8f59ca704cabeeddb2365486c755185b16a41714cc18ad08818c4f62 ./artix7/segbits_dsp_l.origin_info.db`](./artix7/segbits_dsp_l.origin_info.db)
|
||||
* [`5297906aaafefd3be356682dc03cc4f8c85d0ec238a7d66bafc8b1b50a6c0c96 ./artix7/segbits_dsp_r.db`](./artix7/segbits_dsp_r.db)
|
||||
* [`1f6d942f652416b24c7cdae7188144cc9a0778fc439d6e9f22ecec5d7833a391 ./artix7/segbits_dsp_r.origin_info.db`](./artix7/segbits_dsp_r.origin_info.db)
|
||||
* [`43e958853f10cd658ae0af26f78469bdac9b2bd1abb5dbee83f4e9dfad40eaeb ./artix7/segbits_gtp_channel_0.db`](./artix7/segbits_gtp_channel_0.db)
|
||||
* [`23f87065aec5f4f22dd0c3c0b5e73a50e13e28b3c494f07becf435f219030b30 ./artix7/segbits_gtp_channel_0.origin_info.db`](./artix7/segbits_gtp_channel_0.origin_info.db)
|
||||
* [`fffd49cbef2952247233e2128b2752bf28f91f05e194495c6b044d125902191e ./artix7/segbits_gtp_channel_0_mid_left.db`](./artix7/segbits_gtp_channel_0_mid_left.db)
|
||||
|
|
@ -303,28 +303,34 @@ Results have checksums;
|
|||
* [`290ca89106b61311978f9b7a9650fddb4dd5fb2b249612f66abdbe5a0a102f75 ./artix7/segbits_gtp_channel_3_mid_left.origin_info.db`](./artix7/segbits_gtp_channel_3_mid_left.origin_info.db)
|
||||
* [`4cda734eeec2bfdcd7eab62628b5577277f820aae7ba01c85fa7dbe2389ada1d ./artix7/segbits_gtp_channel_3_mid_right.db`](./artix7/segbits_gtp_channel_3_mid_right.db)
|
||||
* [`e8357be2f52886f7160aafa6495791ab890808f99a1e396077e17c30e49e6700 ./artix7/segbits_gtp_channel_3_mid_right.origin_info.db`](./artix7/segbits_gtp_channel_3_mid_right.origin_info.db)
|
||||
* [`eca0e9e36b3e9f6e2584ee31e10a4104d5e128aac610da8236c94d49ebd02b3c ./artix7/segbits_gtp_common.db`](./artix7/segbits_gtp_common.db)
|
||||
* [`ddfdf641009197804217c42635638c4d797355684584051939ed9b48558b4494 ./artix7/segbits_gtp_common.origin_info.db`](./artix7/segbits_gtp_common.origin_info.db)
|
||||
* [`0e52cfd32e766dafe42f2d2c7a2ff5c4a9195dce8a1d7cd019f49dd01d0ce818 ./artix7/segbits_gtp_common_mid_left.db`](./artix7/segbits_gtp_common_mid_left.db)
|
||||
* [`225f0089d42a1d565d8335a053998a98a11120535255834c259df5cf2e921c85 ./artix7/segbits_gtp_common_mid_left.origin_info.db`](./artix7/segbits_gtp_common_mid_left.origin_info.db)
|
||||
* [`c4b5b9477acc4e6220cb4e28604eecf205b2864cfd310edd9246f9182c90f451 ./artix7/segbits_gtp_common_mid_right.db`](./artix7/segbits_gtp_common_mid_right.db)
|
||||
* [`1371addf23574533d237282c8651987089d3fa705fb7c7192dc5567ac80db8d6 ./artix7/segbits_gtp_common_mid_right.origin_info.db`](./artix7/segbits_gtp_common_mid_right.origin_info.db)
|
||||
* [`ea2df8227b92dbceb1073077f6453b6eb22eb6add9f330b93490915afd74ac2b ./artix7/segbits_gtp_common.db`](./artix7/segbits_gtp_common.db)
|
||||
* [`1d1399b298c426c6e15ffb7c75ee1fa9887d3de1210e17a046022ffff4d45287 ./artix7/segbits_gtp_common.origin_info.db`](./artix7/segbits_gtp_common.origin_info.db)
|
||||
* [`37afc4aaffef82bc42052353e4a68a483be81cc4b08e0847b4627a395fad6a24 ./artix7/segbits_gtp_common_mid_left.db`](./artix7/segbits_gtp_common_mid_left.db)
|
||||
* [`c792735501a19ea5ffb9808844d8875c21f234e653ed51a33e8fb9c777b4f9ef ./artix7/segbits_gtp_common_mid_left.origin_info.db`](./artix7/segbits_gtp_common_mid_left.origin_info.db)
|
||||
* [`1207c6985578749fe921840fe35187fd9043733059b463616ca9f8c189c6f81b ./artix7/segbits_gtp_common_mid_right.db`](./artix7/segbits_gtp_common_mid_right.db)
|
||||
* [`2f4d78754b65f558fb7ec8c89641312ba45e68d434529885be26696204de066b ./artix7/segbits_gtp_common_mid_right.origin_info.db`](./artix7/segbits_gtp_common_mid_right.origin_info.db)
|
||||
* [`0716b02a4d15baf2ae6ad06fd828e5e5d14bb6ca6ec4ed73da297863b66d9855 ./artix7/segbits_gtp_int_interface.db`](./artix7/segbits_gtp_int_interface.db)
|
||||
* [`78df9b3f2977dddf280f5d0586d708bd635aa539d1e784fbc66cfde597670086 ./artix7/segbits_gtp_int_interface.origin_info.db`](./artix7/segbits_gtp_int_interface.origin_info.db)
|
||||
* [`0cbdfb2e0e68dd296429972a70391d785011b7db5c720b605379d9812a45756c ./artix7/segbits_gtp_int_interface_l.db`](./artix7/segbits_gtp_int_interface_l.db)
|
||||
* [`3077cf7a0f949fb0ea40f725fd595bb721d5c24a9e0b487c988a5c94f68797a6 ./artix7/segbits_gtp_int_interface_l.origin_info.db`](./artix7/segbits_gtp_int_interface_l.origin_info.db)
|
||||
* [`3dad412a515333cf3c4f7e5cc71f1ad1f027fa9f6e5135fc0ef87ebb9576fe91 ./artix7/segbits_gtp_int_interface_r.db`](./artix7/segbits_gtp_int_interface_r.db)
|
||||
* [`3cca0de5223f38c39493c7f6571e32f8a400b7f6cd784d20e49ca8082dde00f8 ./artix7/segbits_gtp_int_interface_r.origin_info.db`](./artix7/segbits_gtp_int_interface_r.origin_info.db)
|
||||
* [`5d9063c8d4a35b5458573358459ec5e273cf242a97e5d7f1f0c1bf351edf2c63 ./artix7/segbits_hclk_cmt.db`](./artix7/segbits_hclk_cmt.db)
|
||||
* [`01b36f7757bee52cd1bdd78ecefed58b8215732678cef9eec629c21e4e89d7c5 ./artix7/segbits_hclk_cmt.origin_info.db`](./artix7/segbits_hclk_cmt.origin_info.db)
|
||||
* [`92eab3f79b39609fcd131300a63ddca51200ff4bd23b7b759d1e9bbf99543862 ./artix7/segbits_hclk_cmt_l.db`](./artix7/segbits_hclk_cmt_l.db)
|
||||
* [`7f83f0eb6b8d95ab391ab9bdc112de25829fc369c7c11d0ae2911131a6b81e50 ./artix7/segbits_hclk_cmt_l.origin_info.db`](./artix7/segbits_hclk_cmt_l.origin_info.db)
|
||||
* [`d1dd602c5c9d1280ed8d65630da5f53a1f95aab18a48adfa26bee7c76311d675 ./artix7/segbits_hclk_ioi3.db`](./artix7/segbits_hclk_ioi3.db)
|
||||
* [`52cf99e3a8d10e7b252907d53f9e1565a3e929fbf778331c17dd81c25a7c00ca ./artix7/segbits_hclk_ioi3.origin_info.db`](./artix7/segbits_hclk_ioi3.origin_info.db)
|
||||
* [`2ed495d6971c191c355614847839adf2590bbce598b5effabde9bac58712b675 ./artix7/segbits_hclk_ioi3.db`](./artix7/segbits_hclk_ioi3.db)
|
||||
* [`371f8a67be25ed72a8edf74b92b9baf0625a51410d08f83e55d3327e75f195b0 ./artix7/segbits_hclk_ioi3.origin_info.db`](./artix7/segbits_hclk_ioi3.origin_info.db)
|
||||
* [`1c2c7229781a4a1d51bbbdeea76238b10497c043aaadf2a76de783041a201878 ./artix7/segbits_hclk_l.db`](./artix7/segbits_hclk_l.db)
|
||||
* [`d51f086d6e887d5709d3c4e0bc00b8467fa6344de9a4c0f6de66aeba66e90287 ./artix7/segbits_hclk_l.origin_info.db`](./artix7/segbits_hclk_l.origin_info.db)
|
||||
* [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9 ./artix7/segbits_hclk_r.db`](./artix7/segbits_hclk_r.db)
|
||||
* [`61d05145f3613042e8f0c1d97d63f6c185cfb66df609b621b44422ebb27c77a0 ./artix7/segbits_hclk_r.origin_info.db`](./artix7/segbits_hclk_r.origin_info.db)
|
||||
* [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520 ./artix7/segbits_int_l.db`](./artix7/segbits_int_l.db)
|
||||
* [`6afcb554d32a59c99417f454c93d1b38b4b7fe17e0c2822f8d04b81fc0c2225f ./artix7/segbits_int_l.origin_info.db`](./artix7/segbits_int_l.origin_info.db)
|
||||
* [`457f32c2e85b71fa23faad709b0675d7cd26a8559d240a896de67d7da3bddb2d ./artix7/segbits_int_l.origin_info.db`](./artix7/segbits_int_l.origin_info.db)
|
||||
* [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556 ./artix7/segbits_int_r.db`](./artix7/segbits_int_r.db)
|
||||
* [`ced6c489ab1bae4823f259b65c90453d753b6b05c1ab8c00b959e2ca86504a8d ./artix7/segbits_int_r.origin_info.db`](./artix7/segbits_int_r.origin_info.db)
|
||||
* [`392e91def4df6eebb3ce5ed15570c01f6090be793a79054e1880549082eb6f23 ./artix7/segbits_liob33.db`](./artix7/segbits_liob33.db)
|
||||
* [`6ffdf37ae2c6625eed093d59458f3319928bab0ac268abfdeed04c92c4673cfb ./artix7/segbits_liob33.origin_info.db`](./artix7/segbits_liob33.origin_info.db)
|
||||
* [`f5efce54cdf0d717cc559fe071620af71389f8ddceb113b6f2fc294bb10049c1 ./artix7/segbits_int_r.origin_info.db`](./artix7/segbits_int_r.origin_info.db)
|
||||
* [`ed2b09c63c7af8dcee883f6d145743aa83d90ace16b6a3613312b6f1ce455617 ./artix7/segbits_liob33.db`](./artix7/segbits_liob33.db)
|
||||
* [`3fc479e800feb07c1acdd9345785a0bd227b4be4e3863ed38aa58186c15b1a26 ./artix7/segbits_liob33.origin_info.db`](./artix7/segbits_liob33.origin_info.db)
|
||||
* [`d369c1e614ef6ab1a464c0ab01d07456f73e88ca5a0c3c0dc524bb3b4f4364ff ./artix7/segbits_lioi3.db`](./artix7/segbits_lioi3.db)
|
||||
* [`4b1dd698dba50fdf44426b05641189c2faaff29a99d387543d1874983fd68a50 ./artix7/segbits_lioi3.origin_info.db`](./artix7/segbits_lioi3.origin_info.db)
|
||||
* [`0fb3e4c3427cb3fe2426445f9e6ebd1a33a3a5900904f28c7aea339a5f71530e ./artix7/segbits_lioi3_tbytesrc.db`](./artix7/segbits_lioi3_tbytesrc.db)
|
||||
|
|
@ -333,8 +339,12 @@ Results have checksums;
|
|||
* [`bf79280a339e566244220050232020c5d3b8dceed7bd80bcf23da7b4a53cb250 ./artix7/segbits_lioi3_tbyteterm.origin_info.db`](./artix7/segbits_lioi3_tbyteterm.origin_info.db)
|
||||
* [`5d3619d34977c6fc9a2e25e0b7db002af348bf35747b99fba89072778c943c5c ./artix7/segbits_pcie_bot.db`](./artix7/segbits_pcie_bot.db)
|
||||
* [`f2a3c7410f318cb6906c49916104864894d0d2daba55a2173dc2033c8037bae7 ./artix7/segbits_pcie_bot.origin_info.db`](./artix7/segbits_pcie_bot.origin_info.db)
|
||||
* [`ded5f7b0cdadb7558470dbca9102d7293e4237ecb563b5f69821e01b41e4aad1 ./artix7/segbits_riob33.db`](./artix7/segbits_riob33.db)
|
||||
* [`49456622ba534f8a616fe6e8bb0e3006c3ca292f2439f190ef07f82743f09613 ./artix7/segbits_riob33.origin_info.db`](./artix7/segbits_riob33.origin_info.db)
|
||||
* [`b3256c5444d1721cd0f3291d381b3276348cf3c9943bb6e8dd2b0ba5f3a63c4b ./artix7/segbits_pcie_int_interface_l.db`](./artix7/segbits_pcie_int_interface_l.db)
|
||||
* [`e4199fa3f738dd20e85250c6032628b275a859378c4a2a8716c6111cbafabdb5 ./artix7/segbits_pcie_int_interface_l.origin_info.db`](./artix7/segbits_pcie_int_interface_l.origin_info.db)
|
||||
* [`0bc32fce572935289e5ac7b10c95fb96b78418270016546d42ab11276285343e ./artix7/segbits_pcie_int_interface_r.db`](./artix7/segbits_pcie_int_interface_r.db)
|
||||
* [`ad36811e5e38c911473f2c3a6b805e7bb1f6186408bb6740c0dd906754762e3b ./artix7/segbits_pcie_int_interface_r.origin_info.db`](./artix7/segbits_pcie_int_interface_r.origin_info.db)
|
||||
* [`10541d81df91208703a5757830c0b89f177b18b097523f76e9f5d8f5d57e519a ./artix7/segbits_riob33.db`](./artix7/segbits_riob33.db)
|
||||
* [`d9185e3cc5aee6614fd8ee0deb7d9d83ef030f4df99186d9868eede4b91b15d2 ./artix7/segbits_riob33.origin_info.db`](./artix7/segbits_riob33.origin_info.db)
|
||||
* [`712cc4b66ff35ea6033cb76e41d8dde1225857836f4b799834925ab5c3e8575a ./artix7/segbits_rioi3.db`](./artix7/segbits_rioi3.db)
|
||||
* [`4d0e9719c7016a0dece266060eabf4db7218b6cc982449cb93b87e7b2d0c755b ./artix7/segbits_rioi3.origin_info.db`](./artix7/segbits_rioi3.origin_info.db)
|
||||
* [`6823106be1cdccae2cf0c1332c7a36ee11a1a86c31376100f16921b6b579ea19 ./artix7/segbits_rioi3_tbytesrc.db`](./artix7/segbits_rioi3_tbytesrc.db)
|
||||
|
|
@ -566,16 +576,19 @@ Results have checksums;
|
|||
* [`3d2da5714d8c81165fa51403fb719b3ddd9e7ea7ab79280ae4e157d11a29172e ./artix7/timings/slicem.sdf`](./artix7/timings/slicem.sdf)
|
||||
* [`9aaa711d29833f53f765caa74f1e43ac288803d9af8030ce1694b3e3137c4078 ./artix7/xc7a100t/node_wires.json`](./artix7/xc7a100t/node_wires.json)
|
||||
* [`9cf701615e6f9ed6e89d86738f10ebb9d5bf1a233f1e3251315b2f9159f73391 ./artix7/xc7a100t/tileconn.json`](./artix7/xc7a100t/tileconn.json)
|
||||
* [`7af806f357beceb592e1ada7f4c582a5bef2e5ac708779e5813fa3f49ffa2a63 ./artix7/xc7a100t/tilegrid.json`](./artix7/xc7a100t/tilegrid.json)
|
||||
* [`40b95df1b59fd6cd9eb9c1be30ea756fc855c6fd960f9ce402485f44d154d782 ./artix7/xc7a100t/tilegrid.json`](./artix7/xc7a100t/tilegrid.json)
|
||||
* [`3f202fefbd0f36761f08eb58737a42754c65c965968174421df0374198e31daa ./artix7/xc7a100tcsg324-1/package_pins.csv`](./artix7/xc7a100tcsg324-1/package_pins.csv)
|
||||
* [`277906907e43846ac8a52115983cd0ece673b2310d8d10c9b2253d6537bf1a02 ./artix7/xc7a100tcsg324-1/part.json`](./artix7/xc7a100tcsg324-1/part.json)
|
||||
* [`4e1f153303270ed3727ca40af3179020f74271ff63c4d771556020b1d3037b92 ./artix7/xc7a100tcsg324-1/part.yaml`](./artix7/xc7a100tcsg324-1/part.yaml)
|
||||
* [`3e1de5edac7fdd8122041afb2b611902653f8c62dc2da1518b94ed6378e36f26 ./artix7/xc7a100tfgg484-2/package_pins.csv`](./artix7/xc7a100tfgg484-2/package_pins.csv)
|
||||
* [`78909bda2084de19e6095258ab1b1ad549c2db376abdd8699235a7bdc3aa19fb ./artix7/xc7a100tfgg484-2/part.json`](./artix7/xc7a100tfgg484-2/part.json)
|
||||
* [`4e1f153303270ed3727ca40af3179020f74271ff63c4d771556020b1d3037b92 ./artix7/xc7a100tfgg484-2/part.yaml`](./artix7/xc7a100tfgg484-2/part.yaml)
|
||||
* [`bf25d62e58330960eb582f0b3b99196bd59df046db0d7de5330634b64cd397ad ./artix7/xc7a100tfgg676-1/package_pins.csv`](./artix7/xc7a100tfgg676-1/package_pins.csv)
|
||||
* [`78909bda2084de19e6095258ab1b1ad549c2db376abdd8699235a7bdc3aa19fb ./artix7/xc7a100tfgg676-1/part.json`](./artix7/xc7a100tfgg676-1/part.json)
|
||||
* [`4e1f153303270ed3727ca40af3179020f74271ff63c4d771556020b1d3037b92 ./artix7/xc7a100tfgg676-1/part.yaml`](./artix7/xc7a100tfgg676-1/part.yaml)
|
||||
* [`f25057c3f5f1273ab0e21bddafcb4499e219d84f7b5a00764b48bcb64dcd4bd2 ./artix7/xc7a200t/node_wires.json`](./artix7/xc7a200t/node_wires.json)
|
||||
* [`bed4bf8553b0faa4a63964100e6b4a8b5f9ac77dbcac474a2d2cbe7240aa4617 ./artix7/xc7a200t/tileconn.json`](./artix7/xc7a200t/tileconn.json)
|
||||
* [`9a88cc6c4a07e1ebed4ffcd1d7683a1f9394a68567b4f90c5c236ad9c670ba03 ./artix7/xc7a200t/tilegrid.json`](./artix7/xc7a200t/tilegrid.json)
|
||||
* [`95c95a4f20601c927854c0e7e56a5fcd9d90ae00df7d4ef9c7a273f65e15c9a2 ./artix7/xc7a200t/tilegrid.json`](./artix7/xc7a200t/tilegrid.json)
|
||||
* [`72dd638f5c8f6c36e74765915c01b2fa28e3c28b2c0afd91871ab7b0490a14f3 ./artix7/xc7a200tffg1156-1/package_pins.csv`](./artix7/xc7a200tffg1156-1/package_pins.csv)
|
||||
* [`fe44ca57c10c7b804357ded2cdea392c008b7b4d5a82ad917fa3148a756e4e42 ./artix7/xc7a200tffg1156-1/part.json`](./artix7/xc7a200tffg1156-1/part.json)
|
||||
* [`a3d493aef436b9978b2ed1c98c4e1364ab9eb096f824e19acd7cce3f7d920e97 ./artix7/xc7a200tffg1156-1/part.yaml`](./artix7/xc7a200tffg1156-1/part.yaml)
|
||||
|
|
@ -593,7 +606,7 @@ Results have checksums;
|
|||
* [`ef0724733da87455426a0f833642d96e9d206d047f4eb97072c3093f80c40d7d ./artix7/xc7a35tftg256-1/part.yaml`](./artix7/xc7a35tftg256-1/part.yaml)
|
||||
* [`b60e01fef4c8c8d47fc646190d2d17fc63210cd0e82613624761e7463a7c35a6 ./artix7/xc7a50t/node_wires.json`](./artix7/xc7a50t/node_wires.json)
|
||||
* [`1604d48580815e26069c2b4909fcc50e8e8f974ad0beb349ced2329c302bb06b ./artix7/xc7a50t/tileconn.json`](./artix7/xc7a50t/tileconn.json)
|
||||
* [`5a3025cb7acf62e401c8b0a29e8f61cf35239574acdb4671157a27716f749fb4 ./artix7/xc7a50t/tilegrid.json`](./artix7/xc7a50t/tilegrid.json)
|
||||
* [`930c3c75e7ecc929c0baaf13249e346092b78a474b54201271d107ed74d5b6ff ./artix7/xc7a50t/tilegrid.json`](./artix7/xc7a50t/tilegrid.json)
|
||||
* [`1b01a06e9bae479981698cdb89fff971c825c75266b3b529cd69cd54815ce805 ./artix7/xc7a50tfgg484-1/package_pins.csv`](./artix7/xc7a50tfgg484-1/package_pins.csv)
|
||||
* [`6f58dc1e7f454bb28592ecfc9b343541283593d596dba555d0088d0bff9ca1ae ./artix7/xc7a50tfgg484-1/part.json`](./artix7/xc7a50tfgg484-1/part.json)
|
||||
* [`41c360b1e2f7e08b9051f1160a34954ce4c05a445a07f226f1f4059caf1fa1d3 ./artix7/xc7a50tfgg484-1/part.yaml`](./artix7/xc7a50tfgg484-1/part.yaml)
|
||||
|
|
@ -603,7 +616,7 @@ Results have checksums;
|
|||
|
||||
### Settings
|
||||
|
||||
Created using following [settings/kintex7.sh (sha256: f04c23dee2bff14bf48a04f60034d3f3d674bb3e40182cc88201265679ac42fb)](https://github.com/SymbiFlow/prjxray/blob/6e3f05370102d3b93760120741ca75c14599e7e2/settings/kintex7.sh)
|
||||
Created using following [settings/kintex7.sh (sha256: f04c23dee2bff14bf48a04f60034d3f3d674bb3e40182cc88201265679ac42fb)](https://github.com/SymbiFlow/prjxray/blob/f3028e157e5f554e085af2a58247e2c8c7be0f3b/settings/kintex7.sh)
|
||||
```shell
|
||||
# Copyright (C) 2017-2020 The Project X-Ray Authors.
|
||||
#
|
||||
|
|
@ -676,11 +689,11 @@ Results have checksums;
|
|||
* [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./kintex7/mask_hclk_l.origin_info.db`](./kintex7/mask_hclk_l.origin_info.db)
|
||||
* [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd ./kintex7/mask_hclk_r.db`](./kintex7/mask_hclk_r.db)
|
||||
* [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./kintex7/mask_hclk_r.origin_info.db`](./kintex7/mask_hclk_r.origin_info.db)
|
||||
* [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6 ./kintex7/mask_liob33.db`](./kintex7/mask_liob33.db)
|
||||
* [`b1e6417cccea25799f1e5bf4b86b7a42fa1c46cb1351da93e380a519691e9fbd ./kintex7/mask_liob33.db`](./kintex7/mask_liob33.db)
|
||||
* [`919dd02f5275750fd8bc8ace4707ecd94f1fad7deb8c67879894c0b7d6a8ae2f ./kintex7/mask_lioi3.db`](./kintex7/mask_lioi3.db)
|
||||
* [`919dd02f5275750fd8bc8ace4707ecd94f1fad7deb8c67879894c0b7d6a8ae2f ./kintex7/mask_lioi3_tbytesrc.db`](./kintex7/mask_lioi3_tbytesrc.db)
|
||||
* [`919dd02f5275750fd8bc8ace4707ecd94f1fad7deb8c67879894c0b7d6a8ae2f ./kintex7/mask_lioi3_tbyteterm.db`](./kintex7/mask_lioi3_tbyteterm.db)
|
||||
* [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6 ./kintex7/mask_riob33.db`](./kintex7/mask_riob33.db)
|
||||
* [`b1e6417cccea25799f1e5bf4b86b7a42fa1c46cb1351da93e380a519691e9fbd ./kintex7/mask_riob33.db`](./kintex7/mask_riob33.db)
|
||||
* [`919dd02f5275750fd8bc8ace4707ecd94f1fad7deb8c67879894c0b7d6a8ae2f ./kintex7/mask_rioi3.db`](./kintex7/mask_rioi3.db)
|
||||
* [`919dd02f5275750fd8bc8ace4707ecd94f1fad7deb8c67879894c0b7d6a8ae2f ./kintex7/mask_rioi3_tbytesrc.db`](./kintex7/mask_rioi3_tbytesrc.db)
|
||||
* [`919dd02f5275750fd8bc8ace4707ecd94f1fad7deb8c67879894c0b7d6a8ae2f ./kintex7/mask_rioi3_tbyteterm.db`](./kintex7/mask_rioi3_tbyteterm.db)
|
||||
|
|
@ -771,34 +784,34 @@ Results have checksums;
|
|||
* [`0a36013e20bc01d66d1a73eb2594e67d57898efddeb8de046ebcf65eed259c27 ./kintex7/segbits_cmt_top_r_lower_b.origin_info.db`](./kintex7/segbits_cmt_top_r_lower_b.origin_info.db)
|
||||
* [`ff3f5ed631016fb97d2e949d02b6a4eda93b5291a14b43cda962a93eeed88894 ./kintex7/segbits_cmt_top_r_upper_t.db`](./kintex7/segbits_cmt_top_r_upper_t.db)
|
||||
* [`a6ea0f1abacda03e873459b43b5fda477a027904533d9bff94c0763bc2e30cef ./kintex7/segbits_cmt_top_r_upper_t.origin_info.db`](./kintex7/segbits_cmt_top_r_upper_t.origin_info.db)
|
||||
* [`0d9f730a1328a61f471c2f6abd98463a39c7e5e70ff557adc6228e1830560c64 ./kintex7/segbits_dsp_l.db`](./kintex7/segbits_dsp_l.db)
|
||||
* [`10a6e47f7b26f0d21cf0a011d4a5f2a4266538bb8d028a07fd981323dc1f0da0 ./kintex7/segbits_dsp_l.origin_info.db`](./kintex7/segbits_dsp_l.origin_info.db)
|
||||
* [`f81459ae1c84e0e73815c4577a7d0b19b497dd7f16029763c3fc4f3b8410dcc2 ./kintex7/segbits_dsp_r.db`](./kintex7/segbits_dsp_r.db)
|
||||
* [`76965c2e6ba2acab8f809a3d947b100fd322ba5b6d88c358bf816699348b07bf ./kintex7/segbits_dsp_r.origin_info.db`](./kintex7/segbits_dsp_r.origin_info.db)
|
||||
* [`81e0623ff13a253e3f9303de3d5dfbcf2fc92cf5cba277bd7de69e70c3c527e3 ./kintex7/segbits_dsp_l.db`](./kintex7/segbits_dsp_l.db)
|
||||
* [`18cfd5dd8f59ca704cabeeddb2365486c755185b16a41714cc18ad08818c4f62 ./kintex7/segbits_dsp_l.origin_info.db`](./kintex7/segbits_dsp_l.origin_info.db)
|
||||
* [`5297906aaafefd3be356682dc03cc4f8c85d0ec238a7d66bafc8b1b50a6c0c96 ./kintex7/segbits_dsp_r.db`](./kintex7/segbits_dsp_r.db)
|
||||
* [`1f6d942f652416b24c7cdae7188144cc9a0778fc439d6e9f22ecec5d7833a391 ./kintex7/segbits_dsp_r.origin_info.db`](./kintex7/segbits_dsp_r.origin_info.db)
|
||||
* [`5d9063c8d4a35b5458573358459ec5e273cf242a97e5d7f1f0c1bf351edf2c63 ./kintex7/segbits_hclk_cmt.db`](./kintex7/segbits_hclk_cmt.db)
|
||||
* [`01b36f7757bee52cd1bdd78ecefed58b8215732678cef9eec629c21e4e89d7c5 ./kintex7/segbits_hclk_cmt.origin_info.db`](./kintex7/segbits_hclk_cmt.origin_info.db)
|
||||
* [`92eab3f79b39609fcd131300a63ddca51200ff4bd23b7b759d1e9bbf99543862 ./kintex7/segbits_hclk_cmt_l.db`](./kintex7/segbits_hclk_cmt_l.db)
|
||||
* [`7f83f0eb6b8d95ab391ab9bdc112de25829fc369c7c11d0ae2911131a6b81e50 ./kintex7/segbits_hclk_cmt_l.origin_info.db`](./kintex7/segbits_hclk_cmt_l.origin_info.db)
|
||||
* [`d1dd602c5c9d1280ed8d65630da5f53a1f95aab18a48adfa26bee7c76311d675 ./kintex7/segbits_hclk_ioi3.db`](./kintex7/segbits_hclk_ioi3.db)
|
||||
* [`52cf99e3a8d10e7b252907d53f9e1565a3e929fbf778331c17dd81c25a7c00ca ./kintex7/segbits_hclk_ioi3.origin_info.db`](./kintex7/segbits_hclk_ioi3.origin_info.db)
|
||||
* [`2ed495d6971c191c355614847839adf2590bbce598b5effabde9bac58712b675 ./kintex7/segbits_hclk_ioi3.db`](./kintex7/segbits_hclk_ioi3.db)
|
||||
* [`371f8a67be25ed72a8edf74b92b9baf0625a51410d08f83e55d3327e75f195b0 ./kintex7/segbits_hclk_ioi3.origin_info.db`](./kintex7/segbits_hclk_ioi3.origin_info.db)
|
||||
* [`1c2c7229781a4a1d51bbbdeea76238b10497c043aaadf2a76de783041a201878 ./kintex7/segbits_hclk_l.db`](./kintex7/segbits_hclk_l.db)
|
||||
* [`d51f086d6e887d5709d3c4e0bc00b8467fa6344de9a4c0f6de66aeba66e90287 ./kintex7/segbits_hclk_l.origin_info.db`](./kintex7/segbits_hclk_l.origin_info.db)
|
||||
* [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9 ./kintex7/segbits_hclk_r.db`](./kintex7/segbits_hclk_r.db)
|
||||
* [`61d05145f3613042e8f0c1d97d63f6c185cfb66df609b621b44422ebb27c77a0 ./kintex7/segbits_hclk_r.origin_info.db`](./kintex7/segbits_hclk_r.origin_info.db)
|
||||
* [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520 ./kintex7/segbits_int_l.db`](./kintex7/segbits_int_l.db)
|
||||
* [`b635b86e0c7171123c853dee145cf57f7a1f411b82d7a368ed69f659f765b54b ./kintex7/segbits_int_l.origin_info.db`](./kintex7/segbits_int_l.origin_info.db)
|
||||
* [`328b6a3f6f338a3f94526f7f936e442ba9579a0e739e5432b4a63eab47360996 ./kintex7/segbits_int_l.origin_info.db`](./kintex7/segbits_int_l.origin_info.db)
|
||||
* [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556 ./kintex7/segbits_int_r.db`](./kintex7/segbits_int_r.db)
|
||||
* [`0fc9c0513eb861f945057bf695b6b4e3026bd1b5a38953872b1c7ae3ab6f3468 ./kintex7/segbits_int_r.origin_info.db`](./kintex7/segbits_int_r.origin_info.db)
|
||||
* [`392e91def4df6eebb3ce5ed15570c01f6090be793a79054e1880549082eb6f23 ./kintex7/segbits_liob33.db`](./kintex7/segbits_liob33.db)
|
||||
* [`6ffdf37ae2c6625eed093d59458f3319928bab0ac268abfdeed04c92c4673cfb ./kintex7/segbits_liob33.origin_info.db`](./kintex7/segbits_liob33.origin_info.db)
|
||||
* [`af9a0ceb5d80201d21e5677b7aeb676f6ecb822abb6c7e90dd23b39da18e0194 ./kintex7/segbits_int_r.origin_info.db`](./kintex7/segbits_int_r.origin_info.db)
|
||||
* [`ed2b09c63c7af8dcee883f6d145743aa83d90ace16b6a3613312b6f1ce455617 ./kintex7/segbits_liob33.db`](./kintex7/segbits_liob33.db)
|
||||
* [`3fc479e800feb07c1acdd9345785a0bd227b4be4e3863ed38aa58186c15b1a26 ./kintex7/segbits_liob33.origin_info.db`](./kintex7/segbits_liob33.origin_info.db)
|
||||
* [`d369c1e614ef6ab1a464c0ab01d07456f73e88ca5a0c3c0dc524bb3b4f4364ff ./kintex7/segbits_lioi3.db`](./kintex7/segbits_lioi3.db)
|
||||
* [`4b1dd698dba50fdf44426b05641189c2faaff29a99d387543d1874983fd68a50 ./kintex7/segbits_lioi3.origin_info.db`](./kintex7/segbits_lioi3.origin_info.db)
|
||||
* [`0fb3e4c3427cb3fe2426445f9e6ebd1a33a3a5900904f28c7aea339a5f71530e ./kintex7/segbits_lioi3_tbytesrc.db`](./kintex7/segbits_lioi3_tbytesrc.db)
|
||||
* [`cbc24997471fa0a4cc59db46589a3daea9f59b4d599ca802a1f62b730090c89c ./kintex7/segbits_lioi3_tbytesrc.origin_info.db`](./kintex7/segbits_lioi3_tbytesrc.origin_info.db)
|
||||
* [`e81ad6e17e179647d06b9dc193588c8297af448e8eb7bd6c4b807a832631e07b ./kintex7/segbits_lioi3_tbyteterm.db`](./kintex7/segbits_lioi3_tbyteterm.db)
|
||||
* [`bf79280a339e566244220050232020c5d3b8dceed7bd80bcf23da7b4a53cb250 ./kintex7/segbits_lioi3_tbyteterm.origin_info.db`](./kintex7/segbits_lioi3_tbyteterm.origin_info.db)
|
||||
* [`ded5f7b0cdadb7558470dbca9102d7293e4237ecb563b5f69821e01b41e4aad1 ./kintex7/segbits_riob33.db`](./kintex7/segbits_riob33.db)
|
||||
* [`49456622ba534f8a616fe6e8bb0e3006c3ca292f2439f190ef07f82743f09613 ./kintex7/segbits_riob33.origin_info.db`](./kintex7/segbits_riob33.origin_info.db)
|
||||
* [`10541d81df91208703a5757830c0b89f177b18b097523f76e9f5d8f5d57e519a ./kintex7/segbits_riob33.db`](./kintex7/segbits_riob33.db)
|
||||
* [`d9185e3cc5aee6614fd8ee0deb7d9d83ef030f4df99186d9868eede4b91b15d2 ./kintex7/segbits_riob33.origin_info.db`](./kintex7/segbits_riob33.origin_info.db)
|
||||
* [`712cc4b66ff35ea6033cb76e41d8dde1225857836f4b799834925ab5c3e8575a ./kintex7/segbits_rioi3.db`](./kintex7/segbits_rioi3.db)
|
||||
* [`4d0e9719c7016a0dece266060eabf4db7218b6cc982449cb93b87e7b2d0c755b ./kintex7/segbits_rioi3.origin_info.db`](./kintex7/segbits_rioi3.origin_info.db)
|
||||
* [`6823106be1cdccae2cf0c1332c7a36ee11a1a86c31376100f16921b6b579ea19 ./kintex7/segbits_rioi3_tbytesrc.db`](./kintex7/segbits_rioi3_tbytesrc.db)
|
||||
|
|
@ -982,7 +995,7 @@ Results have checksums;
|
|||
|
||||
### Settings
|
||||
|
||||
Created using following [settings/zynq7.sh (sha256: 241ebc54a73b6a3cb3eacea09b798fe9887d955ccdfe7b48994a9a10928837c2)](https://github.com/SymbiFlow/prjxray/blob/6e3f05370102d3b93760120741ca75c14599e7e2/settings/zynq7.sh)
|
||||
Created using following [settings/zynq7.sh (sha256: 241ebc54a73b6a3cb3eacea09b798fe9887d955ccdfe7b48994a9a10928837c2)](https://github.com/SymbiFlow/prjxray/blob/f3028e157e5f554e085af2a58247e2c8c7be0f3b/settings/zynq7.sh)
|
||||
```shell
|
||||
# Copyright (C) 2017-2020 The Project X-Ray Authors.
|
||||
#
|
||||
|
|
@ -1062,11 +1075,11 @@ Results have checksums;
|
|||
* [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./zynq7/mask_hclk_l.origin_info.db`](./zynq7/mask_hclk_l.origin_info.db)
|
||||
* [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd ./zynq7/mask_hclk_r.db`](./zynq7/mask_hclk_r.db)
|
||||
* [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./zynq7/mask_hclk_r.origin_info.db`](./zynq7/mask_hclk_r.origin_info.db)
|
||||
* [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6 ./zynq7/mask_liob33.db`](./zynq7/mask_liob33.db)
|
||||
* [`b1e6417cccea25799f1e5bf4b86b7a42fa1c46cb1351da93e380a519691e9fbd ./zynq7/mask_liob33.db`](./zynq7/mask_liob33.db)
|
||||
* [`04905dcedfe5b075d28c7ca2af92f4c3b9677675fc27d64813c43b8569f493ae ./zynq7/mask_lioi3.db`](./zynq7/mask_lioi3.db)
|
||||
* [`04905dcedfe5b075d28c7ca2af92f4c3b9677675fc27d64813c43b8569f493ae ./zynq7/mask_lioi3_tbytesrc.db`](./zynq7/mask_lioi3_tbytesrc.db)
|
||||
* [`04905dcedfe5b075d28c7ca2af92f4c3b9677675fc27d64813c43b8569f493ae ./zynq7/mask_lioi3_tbyteterm.db`](./zynq7/mask_lioi3_tbyteterm.db)
|
||||
* [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6 ./zynq7/mask_riob33.db`](./zynq7/mask_riob33.db)
|
||||
* [`b1e6417cccea25799f1e5bf4b86b7a42fa1c46cb1351da93e380a519691e9fbd ./zynq7/mask_riob33.db`](./zynq7/mask_riob33.db)
|
||||
* [`04905dcedfe5b075d28c7ca2af92f4c3b9677675fc27d64813c43b8569f493ae ./zynq7/mask_rioi3.db`](./zynq7/mask_rioi3.db)
|
||||
* [`04905dcedfe5b075d28c7ca2af92f4c3b9677675fc27d64813c43b8569f493ae ./zynq7/mask_rioi3_tbytesrc.db`](./zynq7/mask_rioi3_tbytesrc.db)
|
||||
* [`04905dcedfe5b075d28c7ca2af92f4c3b9677675fc27d64813c43b8569f493ae ./zynq7/mask_rioi3_tbyteterm.db`](./zynq7/mask_rioi3_tbyteterm.db)
|
||||
|
|
@ -1160,42 +1173,42 @@ Results have checksums;
|
|||
* [`c913b6c8399b21d515063a9eba05749e06fcdb24fc40d7a4e1e009e91d7b9c02 ./zynq7/segbits_clk_hrow_bot_r.origin_info.db`](./zynq7/segbits_clk_hrow_bot_r.origin_info.db)
|
||||
* [`4c9c9effdaa6039eaa0df3c44056be0ceeaa1a34eab9134821f9f3e85f46738c ./zynq7/segbits_clk_hrow_top_r.db`](./zynq7/segbits_clk_hrow_top_r.db)
|
||||
* [`dce4badb8750dc9ddf3db28e818df81abf4f2258c189891c35a427616c0cfc71 ./zynq7/segbits_clk_hrow_top_r.origin_info.db`](./zynq7/segbits_clk_hrow_top_r.origin_info.db)
|
||||
* [`fe7dd72edf8ebe571742e60b93627c447dd5daeb69b35f52dc3690671db31a74 ./zynq7/segbits_cmt_top_l_lower_b.db`](./zynq7/segbits_cmt_top_l_lower_b.db)
|
||||
* [`5d8f9f08f06723733b17419fccd083bd79c91f1bedc3d9ad4eea649af2196719 ./zynq7/segbits_cmt_top_l_lower_b.origin_info.db`](./zynq7/segbits_cmt_top_l_lower_b.origin_info.db)
|
||||
* [`a4f42d6098b3aff51585f5ed58c0d13fb62019287172d98d73a5e0d8884134da ./zynq7/segbits_cmt_top_l_lower_b.db`](./zynq7/segbits_cmt_top_l_lower_b.db)
|
||||
* [`fe4b0310db36eb87fef9901c790193b7077fbe216b1ba789ef65446c1e3b0b19 ./zynq7/segbits_cmt_top_l_lower_b.origin_info.db`](./zynq7/segbits_cmt_top_l_lower_b.origin_info.db)
|
||||
* [`3e33276e75c69bf622e1019c4bf4b8cf3f7bb8bebcdd500f16e160b49e5a6811 ./zynq7/segbits_cmt_top_l_upper_t.db`](./zynq7/segbits_cmt_top_l_upper_t.db)
|
||||
* [`a8ba9d40de847f2175429ab3328c585242372124e499a520af2a2d8fb97d1550 ./zynq7/segbits_cmt_top_l_upper_t.origin_info.db`](./zynq7/segbits_cmt_top_l_upper_t.origin_info.db)
|
||||
* [`add1cfc6cb7bca692a3d2955d40dd41c70bc8ce3659053a88e149a16ced90627 ./zynq7/segbits_cmt_top_r_lower_b.db`](./zynq7/segbits_cmt_top_r_lower_b.db)
|
||||
* [`2094c1b4b02e63ed7cb7d00bf7ecaaf86ad205cc91125b125f0c40adcfa90728 ./zynq7/segbits_cmt_top_r_lower_b.origin_info.db`](./zynq7/segbits_cmt_top_r_lower_b.origin_info.db)
|
||||
* [`32cc74ba971e07fea70818fb15cd9b0e66e2cbd3f971ac68ca0e0f69337c11ca ./zynq7/segbits_cmt_top_r_lower_b.db`](./zynq7/segbits_cmt_top_r_lower_b.db)
|
||||
* [`a526b7838198cdd3d9733b59aa41fc07ae55b1b3f7dfb1d6f9c3193c6384573a ./zynq7/segbits_cmt_top_r_lower_b.origin_info.db`](./zynq7/segbits_cmt_top_r_lower_b.origin_info.db)
|
||||
* [`ff3f5ed631016fb97d2e949d02b6a4eda93b5291a14b43cda962a93eeed88894 ./zynq7/segbits_cmt_top_r_upper_t.db`](./zynq7/segbits_cmt_top_r_upper_t.db)
|
||||
* [`a6ea0f1abacda03e873459b43b5fda477a027904533d9bff94c0763bc2e30cef ./zynq7/segbits_cmt_top_r_upper_t.origin_info.db`](./zynq7/segbits_cmt_top_r_upper_t.origin_info.db)
|
||||
* [`0d9f730a1328a61f471c2f6abd98463a39c7e5e70ff557adc6228e1830560c64 ./zynq7/segbits_dsp_l.db`](./zynq7/segbits_dsp_l.db)
|
||||
* [`10a6e47f7b26f0d21cf0a011d4a5f2a4266538bb8d028a07fd981323dc1f0da0 ./zynq7/segbits_dsp_l.origin_info.db`](./zynq7/segbits_dsp_l.origin_info.db)
|
||||
* [`f81459ae1c84e0e73815c4577a7d0b19b497dd7f16029763c3fc4f3b8410dcc2 ./zynq7/segbits_dsp_r.db`](./zynq7/segbits_dsp_r.db)
|
||||
* [`76965c2e6ba2acab8f809a3d947b100fd322ba5b6d88c358bf816699348b07bf ./zynq7/segbits_dsp_r.origin_info.db`](./zynq7/segbits_dsp_r.origin_info.db)
|
||||
* [`81e0623ff13a253e3f9303de3d5dfbcf2fc92cf5cba277bd7de69e70c3c527e3 ./zynq7/segbits_dsp_l.db`](./zynq7/segbits_dsp_l.db)
|
||||
* [`18cfd5dd8f59ca704cabeeddb2365486c755185b16a41714cc18ad08818c4f62 ./zynq7/segbits_dsp_l.origin_info.db`](./zynq7/segbits_dsp_l.origin_info.db)
|
||||
* [`5297906aaafefd3be356682dc03cc4f8c85d0ec238a7d66bafc8b1b50a6c0c96 ./zynq7/segbits_dsp_r.db`](./zynq7/segbits_dsp_r.db)
|
||||
* [`1f6d942f652416b24c7cdae7188144cc9a0778fc439d6e9f22ecec5d7833a391 ./zynq7/segbits_dsp_r.origin_info.db`](./zynq7/segbits_dsp_r.origin_info.db)
|
||||
* [`5d9063c8d4a35b5458573358459ec5e273cf242a97e5d7f1f0c1bf351edf2c63 ./zynq7/segbits_hclk_cmt.db`](./zynq7/segbits_hclk_cmt.db)
|
||||
* [`01b36f7757bee52cd1bdd78ecefed58b8215732678cef9eec629c21e4e89d7c5 ./zynq7/segbits_hclk_cmt.origin_info.db`](./zynq7/segbits_hclk_cmt.origin_info.db)
|
||||
* [`92eab3f79b39609fcd131300a63ddca51200ff4bd23b7b759d1e9bbf99543862 ./zynq7/segbits_hclk_cmt_l.db`](./zynq7/segbits_hclk_cmt_l.db)
|
||||
* [`7f83f0eb6b8d95ab391ab9bdc112de25829fc369c7c11d0ae2911131a6b81e50 ./zynq7/segbits_hclk_cmt_l.origin_info.db`](./zynq7/segbits_hclk_cmt_l.origin_info.db)
|
||||
* [`d1dd602c5c9d1280ed8d65630da5f53a1f95aab18a48adfa26bee7c76311d675 ./zynq7/segbits_hclk_ioi3.db`](./zynq7/segbits_hclk_ioi3.db)
|
||||
* [`52cf99e3a8d10e7b252907d53f9e1565a3e929fbf778331c17dd81c25a7c00ca ./zynq7/segbits_hclk_ioi3.origin_info.db`](./zynq7/segbits_hclk_ioi3.origin_info.db)
|
||||
* [`2ed495d6971c191c355614847839adf2590bbce598b5effabde9bac58712b675 ./zynq7/segbits_hclk_ioi3.db`](./zynq7/segbits_hclk_ioi3.db)
|
||||
* [`371f8a67be25ed72a8edf74b92b9baf0625a51410d08f83e55d3327e75f195b0 ./zynq7/segbits_hclk_ioi3.origin_info.db`](./zynq7/segbits_hclk_ioi3.origin_info.db)
|
||||
* [`1c2c7229781a4a1d51bbbdeea76238b10497c043aaadf2a76de783041a201878 ./zynq7/segbits_hclk_l.db`](./zynq7/segbits_hclk_l.db)
|
||||
* [`d51f086d6e887d5709d3c4e0bc00b8467fa6344de9a4c0f6de66aeba66e90287 ./zynq7/segbits_hclk_l.origin_info.db`](./zynq7/segbits_hclk_l.origin_info.db)
|
||||
* [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9 ./zynq7/segbits_hclk_r.db`](./zynq7/segbits_hclk_r.db)
|
||||
* [`61d05145f3613042e8f0c1d97d63f6c185cfb66df609b621b44422ebb27c77a0 ./zynq7/segbits_hclk_r.origin_info.db`](./zynq7/segbits_hclk_r.origin_info.db)
|
||||
* [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520 ./zynq7/segbits_int_l.db`](./zynq7/segbits_int_l.db)
|
||||
* [`505898cbef5f62b7e4d1274c49dad1a373bae12af7825b14e52f053bf42217fe ./zynq7/segbits_int_l.origin_info.db`](./zynq7/segbits_int_l.origin_info.db)
|
||||
* [`ae75525546d228829d7ba8cebcff71b25d75a50ef7fbeabe60645ee99592d86e ./zynq7/segbits_int_l.origin_info.db`](./zynq7/segbits_int_l.origin_info.db)
|
||||
* [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556 ./zynq7/segbits_int_r.db`](./zynq7/segbits_int_r.db)
|
||||
* [`769ba4269774fca078ed64a0acaf380ae9532753b6cfb9378457e6485adbe15c ./zynq7/segbits_int_r.origin_info.db`](./zynq7/segbits_int_r.origin_info.db)
|
||||
* [`392e91def4df6eebb3ce5ed15570c01f6090be793a79054e1880549082eb6f23 ./zynq7/segbits_liob33.db`](./zynq7/segbits_liob33.db)
|
||||
* [`6ffdf37ae2c6625eed093d59458f3319928bab0ac268abfdeed04c92c4673cfb ./zynq7/segbits_liob33.origin_info.db`](./zynq7/segbits_liob33.origin_info.db)
|
||||
* [`1ba0ff2afa1d09037fdb6e31f6289712f3fbd37441a5f787536dc03ab78fb7ed ./zynq7/segbits_int_r.origin_info.db`](./zynq7/segbits_int_r.origin_info.db)
|
||||
* [`4523957b458005d3ca55aabfc7cbd967a3ef8717c2c9eee1c5be35b886a759db ./zynq7/segbits_liob33.db`](./zynq7/segbits_liob33.db)
|
||||
* [`091f100d6ccce6e7941b68ee8321da7577533c655743ff21f078cefd877e6b9d ./zynq7/segbits_liob33.origin_info.db`](./zynq7/segbits_liob33.origin_info.db)
|
||||
* [`d369c1e614ef6ab1a464c0ab01d07456f73e88ca5a0c3c0dc524bb3b4f4364ff ./zynq7/segbits_lioi3.db`](./zynq7/segbits_lioi3.db)
|
||||
* [`4b1dd698dba50fdf44426b05641189c2faaff29a99d387543d1874983fd68a50 ./zynq7/segbits_lioi3.origin_info.db`](./zynq7/segbits_lioi3.origin_info.db)
|
||||
* [`0fb3e4c3427cb3fe2426445f9e6ebd1a33a3a5900904f28c7aea339a5f71530e ./zynq7/segbits_lioi3_tbytesrc.db`](./zynq7/segbits_lioi3_tbytesrc.db)
|
||||
* [`cbc24997471fa0a4cc59db46589a3daea9f59b4d599ca802a1f62b730090c89c ./zynq7/segbits_lioi3_tbytesrc.origin_info.db`](./zynq7/segbits_lioi3_tbytesrc.origin_info.db)
|
||||
* [`e81ad6e17e179647d06b9dc193588c8297af448e8eb7bd6c4b807a832631e07b ./zynq7/segbits_lioi3_tbyteterm.db`](./zynq7/segbits_lioi3_tbyteterm.db)
|
||||
* [`bf79280a339e566244220050232020c5d3b8dceed7bd80bcf23da7b4a53cb250 ./zynq7/segbits_lioi3_tbyteterm.origin_info.db`](./zynq7/segbits_lioi3_tbyteterm.origin_info.db)
|
||||
* [`ded5f7b0cdadb7558470dbca9102d7293e4237ecb563b5f69821e01b41e4aad1 ./zynq7/segbits_riob33.db`](./zynq7/segbits_riob33.db)
|
||||
* [`49456622ba534f8a616fe6e8bb0e3006c3ca292f2439f190ef07f82743f09613 ./zynq7/segbits_riob33.origin_info.db`](./zynq7/segbits_riob33.origin_info.db)
|
||||
* [`7ac48ecadab7345faefab216256796a8c8c507b0ae37e2acc04a671b6b75a23b ./zynq7/segbits_riob33.db`](./zynq7/segbits_riob33.db)
|
||||
* [`22df2833dae390c044b62394764b79492d77db5fa15f6434d51c86e0ef10bcb3 ./zynq7/segbits_riob33.origin_info.db`](./zynq7/segbits_riob33.origin_info.db)
|
||||
* [`712cc4b66ff35ea6033cb76e41d8dde1225857836f4b799834925ab5c3e8575a ./zynq7/segbits_rioi3.db`](./zynq7/segbits_rioi3.db)
|
||||
* [`4d0e9719c7016a0dece266060eabf4db7218b6cc982449cb93b87e7b2d0c755b ./zynq7/segbits_rioi3.origin_info.db`](./zynq7/segbits_rioi3.origin_info.db)
|
||||
* [`6823106be1cdccae2cf0c1332c7a36ee11a1a86c31376100f16921b6b579ea19 ./zynq7/segbits_rioi3_tbytesrc.db`](./zynq7/segbits_rioi3_tbytesrc.db)
|
||||
|
|
|
|||
|
|
@ -1118,6 +1118,7 @@
|
|||
"LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
"LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
|
||||
"LIOB33_X0Y43.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
|
||||
"LIOB33_X0Y43.IOB_Y0.LVDS_25.IN",
|
||||
"LIOB33_X0Y43.IOB_Y0.PULLTYPE.PULLUP",
|
||||
"LIOB33_X0Y43.IOB_Y1.IN_TERM.NONE",
|
||||
"LIOB33_X0Y43.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
|
|
@ -1126,6 +1127,7 @@
|
|||
"LIOB33_X0Y51.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
"LIOB33_X0Y51.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
|
||||
"LIOB33_X0Y51.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
|
||||
"LIOB33_X0Y51.IOB_Y0.LVDS_25.IN",
|
||||
"LIOB33_X0Y51.IOB_Y0.PULLTYPE.NONE",
|
||||
"LIOB33_X0Y51.IOB_Y1.IN_TERM.NONE",
|
||||
"LIOB33_X0Y51.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
|
|
@ -1136,6 +1138,7 @@
|
|||
"LIOB33_X0Y53.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
"LIOB33_X0Y53.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
|
||||
"LIOB33_X0Y53.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
|
||||
"LIOB33_X0Y53.IOB_Y0.LVDS_25.IN",
|
||||
"LIOB33_X0Y53.IOB_Y0.PULLTYPE.NONE",
|
||||
"LIOB33_X0Y53.IOB_Y1.IN_TERM.NONE",
|
||||
"LIOB33_X0Y53.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
|
|
@ -1146,6 +1149,7 @@
|
|||
"LIOB33_X0Y75.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
"LIOB33_X0Y75.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
|
||||
"LIOB33_X0Y75.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
|
||||
"LIOB33_X0Y75.IOB_Y0.LVDS_25.IN",
|
||||
"LIOB33_X0Y75.IOB_Y0.PULLTYPE.NONE",
|
||||
"LIOB33_X0Y75.IOB_Y1.IN_TERM.NONE",
|
||||
"LIOB33_X0Y75.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
|
|
@ -1156,6 +1160,7 @@
|
|||
"LIOB33_X0Y77.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
"LIOB33_X0Y77.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
|
||||
"LIOB33_X0Y77.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
|
||||
"LIOB33_X0Y77.IOB_Y0.LVDS_25.IN",
|
||||
"LIOB33_X0Y77.IOB_Y0.PULLTYPE.NONE",
|
||||
"LIOB33_X0Y77.IOB_Y1.IN_TERM.NONE",
|
||||
"LIOB33_X0Y77.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
|
|
|
|||
|
|
@ -874,6 +874,7 @@
|
|||
"LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
"LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
|
||||
"LIOB33_X0Y43.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
|
||||
"LIOB33_X0Y43.IOB_Y0.LVDS_25.IN",
|
||||
"LIOB33_X0Y43.IOB_Y0.PULLTYPE.PULLUP",
|
||||
"LIOB33_X0Y43.IOB_Y1.IN_TERM.NONE",
|
||||
"LIOB33_X0Y43.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
|
|
@ -882,6 +883,7 @@
|
|||
"LIOB33_X0Y121.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
"LIOB33_X0Y121.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
|
||||
"LIOB33_X0Y121.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
|
||||
"LIOB33_X0Y121.IOB_Y0.LVDS_25.IN",
|
||||
"LIOB33_X0Y121.IOB_Y0.PULLTYPE.NONE",
|
||||
"LIOB33_X0Y121.IOB_Y1.IN_TERM.NONE",
|
||||
"LIOB33_X0Y121.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
|
|
@ -890,6 +892,7 @@
|
|||
"LIOB33_X0Y123.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
"LIOB33_X0Y123.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
|
||||
"LIOB33_X0Y123.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
|
||||
"LIOB33_X0Y123.IOB_Y0.LVDS_25.IN",
|
||||
"LIOB33_X0Y123.IOB_Y0.PULLTYPE.NONE",
|
||||
"LIOB33_X0Y123.IOB_Y1.IN_TERM.NONE",
|
||||
"LIOB33_X0Y123.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
|
|
@ -900,6 +903,7 @@
|
|||
"LIOB33_X0Y125.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
"LIOB33_X0Y125.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
|
||||
"LIOB33_X0Y125.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
|
||||
"LIOB33_X0Y125.IOB_Y0.LVDS_25.IN",
|
||||
"LIOB33_X0Y125.IOB_Y0.PULLTYPE.NONE",
|
||||
"LIOB33_X0Y125.IOB_Y1.IN_TERM.NONE",
|
||||
"LIOB33_X0Y125.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
|
|
@ -910,6 +914,7 @@
|
|||
"LIOB33_X0Y127.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
"LIOB33_X0Y127.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
|
||||
"LIOB33_X0Y127.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
|
||||
"LIOB33_X0Y127.IOB_Y0.LVDS_25.IN",
|
||||
"LIOB33_X0Y127.IOB_Y0.PULLTYPE.NONE",
|
||||
"LIOB33_X0Y127.IOB_Y1.IN_TERM.NONE",
|
||||
"LIOB33_X0Y127.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
|
|
@ -1035,6 +1040,7 @@
|
|||
"RIOB33_X43Y75.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
"RIOB33_X43Y75.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
|
||||
"RIOB33_X43Y75.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
|
||||
"RIOB33_X43Y75.IOB_Y0.LVDS_25.IN",
|
||||
"RIOB33_X43Y75.IOB_Y0.PULLTYPE.NONE",
|
||||
"RIOB33_X43Y75.IOB_Y1.IN_TERM.NONE",
|
||||
"RIOB33_X43Y75.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
|
|
|
|||
|
|
@ -356,6 +356,7 @@
|
|||
"LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
"LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
|
||||
"LIOB33_X0Y43.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
|
||||
"LIOB33_X0Y43.IOB_Y0.LVDS_25.IN",
|
||||
"LIOB33_X0Y43.IOB_Y0.PULLTYPE.PULLUP",
|
||||
"LIOB33_X0Y43.IOB_Y1.IN_TERM.NONE",
|
||||
"LIOB33_X0Y43.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
|
|
@ -416,6 +417,7 @@
|
|||
"RIOB33_X43Y67.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
"RIOB33_X43Y67.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
|
||||
"RIOB33_X43Y67.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
|
||||
"RIOB33_X43Y67.IOB_Y0.LVDS_25.IN",
|
||||
"RIOB33_X43Y67.IOB_Y0.PULLTYPE.NONE",
|
||||
"RIOB33_X43Y67.IOB_Y1.IN_TERM.NONE",
|
||||
"RIOB33_X43Y67.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
|
|
@ -424,6 +426,7 @@
|
|||
"RIOB33_X43Y75.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
"RIOB33_X43Y75.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
|
||||
"RIOB33_X43Y75.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
|
||||
"RIOB33_X43Y75.IOB_Y0.LVDS_25.IN",
|
||||
"RIOB33_X43Y75.IOB_Y0.PULLTYPE.NONE",
|
||||
"RIOB33_X43Y75.IOB_Y1.IN_TERM.NONE",
|
||||
"RIOB33_X43Y75.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
|
|
|
|||
|
|
@ -3530,6 +3530,7 @@
|
|||
"LIOB33_X0Y5.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
"LIOB33_X0Y5.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
|
||||
"LIOB33_X0Y5.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
|
||||
"LIOB33_X0Y5.IOB_Y0.LVDS_25.IN",
|
||||
"LIOB33_X0Y5.IOB_Y0.PULLTYPE.NONE",
|
||||
"LIOB33_X0Y5.IOB_Y1.IN_TERM.NONE",
|
||||
"LIOB33_X0Y5.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
|
|
@ -3540,6 +3541,7 @@
|
|||
"LIOB33_X0Y7.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
"LIOB33_X0Y7.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
|
||||
"LIOB33_X0Y7.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
|
||||
"LIOB33_X0Y7.IOB_Y0.LVDS_25.IN",
|
||||
"LIOB33_X0Y7.IOB_Y0.PULLTYPE.NONE",
|
||||
"LIOB33_X0Y7.IOB_Y1.IN_TERM.NONE",
|
||||
"LIOB33_X0Y7.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
|
|
@ -3550,6 +3552,7 @@
|
|||
"LIOB33_X0Y9.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
"LIOB33_X0Y9.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
|
||||
"LIOB33_X0Y9.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
|
||||
"LIOB33_X0Y9.IOB_Y0.LVDS_25.IN",
|
||||
"LIOB33_X0Y9.IOB_Y0.PULLTYPE.NONE",
|
||||
"LIOB33_X0Y9.IOB_Y1.IN_TERM.NONE",
|
||||
"LIOB33_X0Y9.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
|
|
@ -3560,6 +3563,7 @@
|
|||
"LIOB33_X0Y11.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
"LIOB33_X0Y11.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
|
||||
"LIOB33_X0Y11.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
|
||||
"LIOB33_X0Y11.IOB_Y0.LVDS_25.IN",
|
||||
"LIOB33_X0Y11.IOB_Y0.PULLTYPE.NONE",
|
||||
"LIOB33_X0Y11.IOB_Y1.IN_TERM.NONE",
|
||||
"LIOB33_X0Y11.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
|
|
@ -3585,6 +3589,7 @@
|
|||
"LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
"LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
|
||||
"LIOB33_X0Y43.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
|
||||
"LIOB33_X0Y43.IOB_Y0.LVDS_25.IN",
|
||||
"LIOB33_X0Y43.IOB_Y0.PULLTYPE.PULLUP",
|
||||
"LIOB33_X0Y43.IOB_Y1.IN_TERM.NONE",
|
||||
"LIOB33_X0Y43.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
|
||||
|
|
@ -3594,6 +3599,7 @@
|
|||
"LIOB33_X0Y111.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
"LIOB33_X0Y111.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
|
||||
"LIOB33_X0Y111.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
|
||||
"LIOB33_X0Y111.IOB_Y0.LVDS_25.IN",
|
||||
"LIOB33_X0Y111.IOB_Y0.PULLTYPE.NONE",
|
||||
"LIOB33_X0Y111.IOB_Y1.IN_TERM.NONE",
|
||||
"LIOB33_X0Y111.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
|
||||
|
|
@ -3747,6 +3753,7 @@
|
|||
"RIOB33_X43Y25.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
"RIOB33_X43Y25.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
|
||||
"RIOB33_X43Y25.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
|
||||
"RIOB33_X43Y25.IOB_Y0.LVDS_25.IN",
|
||||
"RIOB33_X43Y25.IOB_Y0.PULLTYPE.NONE",
|
||||
"RIOB33_X43Y25.IOB_Y1.IN_TERM.NONE",
|
||||
"RIOB33_X43Y25.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
|
|
@ -3770,6 +3777,7 @@
|
|||
"RIOB33_X43Y39.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
"RIOB33_X43Y39.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
|
||||
"RIOB33_X43Y39.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
|
||||
"RIOB33_X43Y39.IOB_Y0.LVDS_25.IN",
|
||||
"RIOB33_X43Y39.IOB_Y0.PULLTYPE.NONE",
|
||||
"RIOB33_X43Y39.IOB_Y1.IN_TERM.NONE",
|
||||
"RIOB33_X43Y39.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
|
|
@ -3780,6 +3788,7 @@
|
|||
"RIOB33_X43Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
"RIOB33_X43Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
|
||||
"RIOB33_X43Y43.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
|
||||
"RIOB33_X43Y43.IOB_Y0.LVDS_25.IN",
|
||||
"RIOB33_X43Y43.IOB_Y0.PULLTYPE.NONE",
|
||||
"RIOB33_X43Y43.IOB_Y1.IN_TERM.NONE",
|
||||
"RIOB33_X43Y43.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
|
|
@ -3790,6 +3799,7 @@
|
|||
"RIOB33_X43Y45.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
"RIOB33_X43Y45.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
|
||||
"RIOB33_X43Y45.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
|
||||
"RIOB33_X43Y45.IOB_Y0.LVDS_25.IN",
|
||||
"RIOB33_X43Y45.IOB_Y0.PULLTYPE.NONE",
|
||||
"RIOB33_X43Y45.IOB_Y1.IN_TERM.NONE",
|
||||
"RIOB33_X43Y45.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
|
|
@ -3800,6 +3810,7 @@
|
|||
"RIOB33_X43Y47.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
"RIOB33_X43Y47.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
|
||||
"RIOB33_X43Y47.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
|
||||
"RIOB33_X43Y47.IOB_Y0.LVDS_25.IN",
|
||||
"RIOB33_X43Y47.IOB_Y0.PULLTYPE.NONE",
|
||||
"RIOB33_X43Y47.IOB_Y1.IN_TERM.NONE",
|
||||
"RIOB33_X43Y47.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
|
||||
|
|
|
|||
|
|
@ -11,6 +11,10 @@
|
|||
device: "xc7a100t"
|
||||
package: "fgg676"
|
||||
speedgrade: "1"
|
||||
"xc7a100tfgg484-2":
|
||||
device: "xc7a100t"
|
||||
package: "fgg484"
|
||||
speedgrade: "2"
|
||||
"xc7a100tcsg324-1":
|
||||
device: "xc7a100t"
|
||||
package: "csg324"
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -1,3 +1,5 @@
|
|||
bit 24_1613
|
||||
bit 25_1613
|
||||
bit 28_1424
|
||||
bit 28_1425
|
||||
bit 28_1426
|
||||
|
|
@ -12,6 +14,7 @@ bit 28_1434
|
|||
bit 28_1435
|
||||
bit 28_1436
|
||||
bit 28_1437
|
||||
bit 28_1438
|
||||
bit 28_1440
|
||||
bit 28_1442
|
||||
bit 28_1448
|
||||
|
|
@ -40,7 +43,6 @@ bit 28_1493
|
|||
bit 28_1494
|
||||
bit 28_1495
|
||||
bit 28_1512
|
||||
bit 28_1514
|
||||
bit 28_1516
|
||||
bit 28_1528
|
||||
bit 28_1544
|
||||
|
|
@ -142,6 +144,7 @@ bit 28_1802
|
|||
bit 28_1803
|
||||
bit 28_1804
|
||||
bit 28_1805
|
||||
bit 28_1806
|
||||
bit 29_1424
|
||||
bit 29_1425
|
||||
bit 29_1426
|
||||
|
|
@ -155,6 +158,8 @@ bit 29_1433
|
|||
bit 29_1434
|
||||
bit 29_1435
|
||||
bit 29_1436
|
||||
bit 29_1438
|
||||
bit 29_1439
|
||||
bit 29_1440
|
||||
bit 29_1443
|
||||
bit 29_1446
|
||||
|
|
@ -183,7 +188,6 @@ bit 29_1493
|
|||
bit 29_1494
|
||||
bit 29_1495
|
||||
bit 29_1512
|
||||
bit 29_1516
|
||||
bit 29_1528
|
||||
bit 29_1544
|
||||
bit 29_1545
|
||||
|
|
@ -280,3 +284,5 @@ bit 29_1801
|
|||
bit 29_1802
|
||||
bit 29_1803
|
||||
bit 29_1804
|
||||
bit 29_1806
|
||||
bit 29_1807
|
||||
|
|
|
|||
|
|
@ -12,6 +12,7 @@ bit 00_1434
|
|||
bit 00_1435
|
||||
bit 00_1436
|
||||
bit 00_1437
|
||||
bit 00_1438
|
||||
bit 00_1440
|
||||
bit 00_1442
|
||||
bit 00_1448
|
||||
|
|
@ -40,7 +41,6 @@ bit 00_1493
|
|||
bit 00_1494
|
||||
bit 00_1495
|
||||
bit 00_1512
|
||||
bit 00_1514
|
||||
bit 00_1516
|
||||
bit 00_1528
|
||||
bit 00_1544
|
||||
|
|
@ -69,6 +69,7 @@ bit 00_1579
|
|||
bit 00_1580
|
||||
bit 00_1582
|
||||
bit 00_1584
|
||||
bit 00_1613
|
||||
bit 00_1640
|
||||
bit 00_1641
|
||||
bit 00_1642
|
||||
|
|
@ -142,6 +143,7 @@ bit 00_1802
|
|||
bit 00_1803
|
||||
bit 00_1804
|
||||
bit 00_1805
|
||||
bit 00_1806
|
||||
bit 01_1424
|
||||
bit 01_1425
|
||||
bit 01_1426
|
||||
|
|
@ -155,6 +157,8 @@ bit 01_1433
|
|||
bit 01_1434
|
||||
bit 01_1435
|
||||
bit 01_1436
|
||||
bit 01_1438
|
||||
bit 01_1439
|
||||
bit 01_1440
|
||||
bit 01_1443
|
||||
bit 01_1446
|
||||
|
|
@ -183,7 +187,6 @@ bit 01_1493
|
|||
bit 01_1494
|
||||
bit 01_1495
|
||||
bit 01_1512
|
||||
bit 01_1516
|
||||
bit 01_1528
|
||||
bit 01_1544
|
||||
bit 01_1545
|
||||
|
|
@ -208,6 +211,7 @@ bit 01_1563
|
|||
bit 01_1576
|
||||
bit 01_1580
|
||||
bit 01_1581
|
||||
bit 01_1613
|
||||
bit 01_1640
|
||||
bit 01_1641
|
||||
bit 01_1642
|
||||
|
|
@ -280,3 +284,5 @@ bit 01_1801
|
|||
bit 01_1802
|
||||
bit 01_1803
|
||||
bit 01_1804
|
||||
bit 01_1806
|
||||
bit 01_1807
|
||||
|
|
|
|||
|
|
@ -12,6 +12,7 @@ bit 00_1434
|
|||
bit 00_1435
|
||||
bit 00_1436
|
||||
bit 00_1437
|
||||
bit 00_1438
|
||||
bit 00_1440
|
||||
bit 00_1442
|
||||
bit 00_1448
|
||||
|
|
@ -40,7 +41,6 @@ bit 00_1493
|
|||
bit 00_1494
|
||||
bit 00_1495
|
||||
bit 00_1512
|
||||
bit 00_1514
|
||||
bit 00_1516
|
||||
bit 00_1528
|
||||
bit 00_1544
|
||||
|
|
@ -69,6 +69,7 @@ bit 00_1579
|
|||
bit 00_1580
|
||||
bit 00_1582
|
||||
bit 00_1584
|
||||
bit 00_1613
|
||||
bit 00_1640
|
||||
bit 00_1641
|
||||
bit 00_1642
|
||||
|
|
@ -142,6 +143,7 @@ bit 00_1802
|
|||
bit 00_1803
|
||||
bit 00_1804
|
||||
bit 00_1805
|
||||
bit 00_1806
|
||||
bit 01_1424
|
||||
bit 01_1425
|
||||
bit 01_1426
|
||||
|
|
@ -155,6 +157,8 @@ bit 01_1433
|
|||
bit 01_1434
|
||||
bit 01_1435
|
||||
bit 01_1436
|
||||
bit 01_1438
|
||||
bit 01_1439
|
||||
bit 01_1440
|
||||
bit 01_1443
|
||||
bit 01_1446
|
||||
|
|
@ -183,7 +187,6 @@ bit 01_1493
|
|||
bit 01_1494
|
||||
bit 01_1495
|
||||
bit 01_1512
|
||||
bit 01_1516
|
||||
bit 01_1528
|
||||
bit 01_1544
|
||||
bit 01_1545
|
||||
|
|
@ -208,6 +211,7 @@ bit 01_1563
|
|||
bit 01_1576
|
||||
bit 01_1580
|
||||
bit 01_1581
|
||||
bit 01_1613
|
||||
bit 01_1640
|
||||
bit 01_1641
|
||||
bit 01_1642
|
||||
|
|
@ -280,3 +284,5 @@ bit 01_1801
|
|||
bit 01_1802
|
||||
bit 01_1803
|
||||
bit 01_1804
|
||||
bit 01_1806
|
||||
bit 01_1807
|
||||
|
|
|
|||
|
|
@ -17,11 +17,16 @@ bit 38_42
|
|||
bit 38_44
|
||||
bit 38_62
|
||||
bit 38_64
|
||||
bit 38_74
|
||||
bit 38_76
|
||||
bit 38_82
|
||||
bit 38_84
|
||||
bit 38_86
|
||||
bit 38_92
|
||||
bit 38_94
|
||||
bit 38_98
|
||||
bit 38_100
|
||||
bit 38_102
|
||||
bit 38_106
|
||||
bit 38_110
|
||||
bit 38_112
|
||||
|
|
@ -45,12 +50,15 @@ bit 39_59
|
|||
bit 39_61
|
||||
bit 39_63
|
||||
bit 39_65
|
||||
bit 39_75
|
||||
bit 39_83
|
||||
bit 39_85
|
||||
bit 39_87
|
||||
bit 39_89
|
||||
bit 39_93
|
||||
bit 39_95
|
||||
bit 39_97
|
||||
bit 39_101
|
||||
bit 39_105
|
||||
bit 39_107
|
||||
bit 39_109
|
||||
|
|
|
|||
|
|
@ -17,11 +17,16 @@ bit 38_42
|
|||
bit 38_44
|
||||
bit 38_62
|
||||
bit 38_64
|
||||
bit 38_74
|
||||
bit 38_76
|
||||
bit 38_82
|
||||
bit 38_84
|
||||
bit 38_86
|
||||
bit 38_92
|
||||
bit 38_94
|
||||
bit 38_98
|
||||
bit 38_100
|
||||
bit 38_102
|
||||
bit 38_106
|
||||
bit 38_110
|
||||
bit 38_112
|
||||
|
|
@ -45,12 +50,15 @@ bit 39_59
|
|||
bit 39_61
|
||||
bit 39_63
|
||||
bit 39_65
|
||||
bit 39_75
|
||||
bit 39_83
|
||||
bit 39_85
|
||||
bit 39_87
|
||||
bit 39_89
|
||||
bit 39_93
|
||||
bit 39_95
|
||||
bit 39_97
|
||||
bit 39_101
|
||||
bit 39_105
|
||||
bit 39_107
|
||||
bit 39_109
|
||||
|
|
|
|||
|
|
@ -1,3 +1,159 @@
|
|||
DSP_L.DSP_0_CEAD.DSP_GND_L 26_63
|
||||
DSP_L.DSP_0_CEAD.DSP_VCC_L 27_62
|
||||
DSP_L.DSP_0_CEALUMODE.DSP_GND_L 27_51
|
||||
DSP_L.DSP_0_CEALUMODE.DSP_VCC_L 26_50
|
||||
DSP_L.DSP_0_CED.DSP_GND_L 27_72
|
||||
DSP_L.DSP_0_CED.DSP_VCC_L 26_72
|
||||
DSP_L.DSP_0_CEINMODE.DSP_GND_L 26_69
|
||||
DSP_L.DSP_0_CEINMODE.DSP_VCC_L 26_67
|
||||
DSP_L.DSP_0_RSTD.DSP_GND_L 27_96
|
||||
DSP_L.DSP_0_RSTD.DSP_VCC_L 27_85
|
||||
DSP_L.DSP_0_ALUMODE2.DSP_GND_L 27_56
|
||||
DSP_L.DSP_0_ALUMODE2.DSP_VCC_L 26_55
|
||||
DSP_L.DSP_0_ALUMODE3.DSP_GND_L 27_60
|
||||
DSP_L.DSP_0_ALUMODE3.DSP_VCC_L 26_53
|
||||
DSP_L.DSP_0_CARRYINSEL2.DSP_GND_L 26_17
|
||||
DSP_L.DSP_0_CARRYINSEL2.DSP_VCC_L 27_18
|
||||
DSP_L.DSP_0_D0.DSP_GND_L 26_65
|
||||
DSP_L.DSP_0_D0.DSP_VCC_L 27_64
|
||||
DSP_L.DSP_0_D1.DSP_GND_L 27_68
|
||||
DSP_L.DSP_0_D1.DSP_VCC_L 27_74
|
||||
DSP_L.DSP_0_D2.DSP_GND_L 27_71
|
||||
DSP_L.DSP_0_D2.DSP_VCC_L 27_70
|
||||
DSP_L.DSP_0_D3.DSP_GND_L 26_75
|
||||
DSP_L.DSP_0_D3.DSP_VCC_L 26_73
|
||||
DSP_L.DSP_0_D4.DSP_GND_L 27_78
|
||||
DSP_L.DSP_0_D4.DSP_VCC_L 26_77
|
||||
DSP_L.DSP_0_D5.DSP_GND_L 26_82
|
||||
DSP_L.DSP_0_D5.DSP_VCC_L 26_81
|
||||
DSP_L.DSP_0_D6.DSP_GND_L 26_89
|
||||
DSP_L.DSP_0_D6.DSP_VCC_L 27_89
|
||||
DSP_L.DSP_0_D7.DSP_GND_L 27_91
|
||||
DSP_L.DSP_0_D7.DSP_VCC_L 26_91
|
||||
DSP_L.DSP_0_D8.DSP_GND_L 26_98
|
||||
DSP_L.DSP_0_D8.DSP_VCC_L 27_97
|
||||
DSP_L.DSP_0_D9.DSP_GND_L 26_101
|
||||
DSP_L.DSP_0_D9.DSP_VCC_L 26_99
|
||||
DSP_L.DSP_0_D10.DSP_GND_L 26_105
|
||||
DSP_L.DSP_0_D10.DSP_VCC_L 26_103
|
||||
DSP_L.DSP_0_D11.DSP_GND_L 27_107
|
||||
DSP_L.DSP_0_D11.DSP_VCC_L 27_105
|
||||
DSP_L.DSP_0_D12.DSP_GND_L 26_107
|
||||
DSP_L.DSP_0_D12.DSP_VCC_L 26_111
|
||||
DSP_L.DSP_0_D13.DSP_GND_L 27_113
|
||||
DSP_L.DSP_0_D13.DSP_VCC_L 26_114
|
||||
DSP_L.DSP_0_D14.DSP_GND_L 26_118
|
||||
DSP_L.DSP_0_D14.DSP_VCC_L 27_116
|
||||
DSP_L.DSP_0_D15.DSP_GND_L 27_122
|
||||
DSP_L.DSP_0_D15.DSP_VCC_L 27_120
|
||||
DSP_L.DSP_0_D16.DSP_GND_L 27_125
|
||||
DSP_L.DSP_0_D16.DSP_VCC_L 26_125
|
||||
DSP_L.DSP_0_D17.DSP_GND_L 27_128
|
||||
DSP_L.DSP_0_D17.DSP_VCC_L 27_126
|
||||
DSP_L.DSP_0_D18.DSP_GND_L 26_135
|
||||
DSP_L.DSP_0_D18.DSP_VCC_L 26_131
|
||||
DSP_L.DSP_0_D19.DSP_GND_L 27_140
|
||||
DSP_L.DSP_0_D19.DSP_VCC_L 26_140
|
||||
DSP_L.DSP_0_D20.DSP_GND_L 26_145
|
||||
DSP_L.DSP_0_D20.DSP_VCC_L 27_143
|
||||
DSP_L.DSP_0_D21.DSP_GND_L 27_147
|
||||
DSP_L.DSP_0_D21.DSP_VCC_L 26_147
|
||||
DSP_L.DSP_0_D22.DSP_GND_L 27_151
|
||||
DSP_L.DSP_0_D22.DSP_VCC_L 26_150
|
||||
DSP_L.DSP_0_D23.DSP_GND_L 27_154
|
||||
DSP_L.DSP_0_D23.DSP_VCC_L 27_153
|
||||
DSP_L.DSP_0_D24.DSP_GND_L 27_158
|
||||
DSP_L.DSP_0_D24.DSP_VCC_L 27_155
|
||||
DSP_L.DSP_0_INMODE0.DSP_GND_L 27_134
|
||||
DSP_L.DSP_0_INMODE0.DSP_VCC_L 27_130
|
||||
DSP_L.DSP_0_INMODE1.DSP_GND_L 26_133
|
||||
DSP_L.DSP_0_INMODE1.DSP_VCC_L 27_145
|
||||
DSP_L.DSP_0_INMODE2.DSP_GND_L 27_80
|
||||
DSP_L.DSP_0_INMODE2.DSP_VCC_L 26_71
|
||||
DSP_L.DSP_0_INMODE3.DSP_GND_L 27_79
|
||||
DSP_L.DSP_0_INMODE3.DSP_VCC_L 26_70
|
||||
DSP_L.DSP_0_INMODE4.DSP_GND_L 26_58
|
||||
DSP_L.DSP_0_INMODE4.DSP_VCC_L 26_46
|
||||
DSP_L.DSP_0_OPMODE6.DSP_GND_L 27_12
|
||||
DSP_L.DSP_0_OPMODE6.DSP_VCC_L 27_20
|
||||
DSP_L.DSP_1_CEAD.DSP_GND_L 26_223
|
||||
DSP_L.DSP_1_CEAD.DSP_VCC_L 27_222
|
||||
DSP_L.DSP_1_CEALUMODE.DSP_GND_L 27_211
|
||||
DSP_L.DSP_1_CEALUMODE.DSP_VCC_L 26_210
|
||||
DSP_L.DSP_1_CED.DSP_GND_L 27_232
|
||||
DSP_L.DSP_1_CED.DSP_VCC_L 26_232
|
||||
DSP_L.DSP_1_CEINMODE.DSP_GND_L 26_229
|
||||
DSP_L.DSP_1_CEINMODE.DSP_VCC_L 26_227
|
||||
DSP_L.DSP_1_RSTD.DSP_GND_L 27_256
|
||||
DSP_L.DSP_1_RSTD.DSP_VCC_L 27_245
|
||||
DSP_L.DSP_1_ALUMODE2.DSP_GND_L 27_216
|
||||
DSP_L.DSP_1_ALUMODE2.DSP_VCC_L 26_215
|
||||
DSP_L.DSP_1_ALUMODE3.DSP_GND_L 27_220
|
||||
DSP_L.DSP_1_ALUMODE3.DSP_VCC_L 26_213
|
||||
DSP_L.DSP_1_CARRYINSEL2.DSP_GND_L 26_177
|
||||
DSP_L.DSP_1_CARRYINSEL2.DSP_VCC_L 27_178
|
||||
DSP_L.DSP_1_D0.DSP_GND_L 26_225
|
||||
DSP_L.DSP_1_D0.DSP_VCC_L 27_224
|
||||
DSP_L.DSP_1_D1.DSP_GND_L 27_228
|
||||
DSP_L.DSP_1_D1.DSP_VCC_L 27_234
|
||||
DSP_L.DSP_1_D2.DSP_GND_L 27_231
|
||||
DSP_L.DSP_1_D2.DSP_VCC_L 27_230
|
||||
DSP_L.DSP_1_D3.DSP_GND_L 26_235
|
||||
DSP_L.DSP_1_D3.DSP_VCC_L 26_233
|
||||
DSP_L.DSP_1_D4.DSP_GND_L 27_238
|
||||
DSP_L.DSP_1_D4.DSP_VCC_L 26_237
|
||||
DSP_L.DSP_1_D5.DSP_GND_L 26_242
|
||||
DSP_L.DSP_1_D5.DSP_VCC_L 26_241
|
||||
DSP_L.DSP_1_D6.DSP_GND_L 26_249
|
||||
DSP_L.DSP_1_D6.DSP_VCC_L 27_249
|
||||
DSP_L.DSP_1_D7.DSP_GND_L 27_251
|
||||
DSP_L.DSP_1_D7.DSP_VCC_L 26_251
|
||||
DSP_L.DSP_1_D8.DSP_GND_L 26_258
|
||||
DSP_L.DSP_1_D8.DSP_VCC_L 27_257
|
||||
DSP_L.DSP_1_D9.DSP_GND_L 26_261
|
||||
DSP_L.DSP_1_D9.DSP_VCC_L 26_259
|
||||
DSP_L.DSP_1_D10.DSP_GND_L 26_265
|
||||
DSP_L.DSP_1_D10.DSP_VCC_L 26_263
|
||||
DSP_L.DSP_1_D11.DSP_GND_L 27_267
|
||||
DSP_L.DSP_1_D11.DSP_VCC_L 27_265
|
||||
DSP_L.DSP_1_D12.DSP_GND_L 26_267
|
||||
DSP_L.DSP_1_D12.DSP_VCC_L 26_271
|
||||
DSP_L.DSP_1_D13.DSP_GND_L 27_273
|
||||
DSP_L.DSP_1_D13.DSP_VCC_L 26_274
|
||||
DSP_L.DSP_1_D14.DSP_GND_L 26_278
|
||||
DSP_L.DSP_1_D14.DSP_VCC_L 27_276
|
||||
DSP_L.DSP_1_D15.DSP_GND_L 27_282
|
||||
DSP_L.DSP_1_D15.DSP_VCC_L 27_280
|
||||
DSP_L.DSP_1_D16.DSP_GND_L 27_285
|
||||
DSP_L.DSP_1_D16.DSP_VCC_L 26_285
|
||||
DSP_L.DSP_1_D17.DSP_GND_L 27_288
|
||||
DSP_L.DSP_1_D17.DSP_VCC_L 27_286
|
||||
DSP_L.DSP_1_D18.DSP_GND_L 26_295
|
||||
DSP_L.DSP_1_D18.DSP_VCC_L 26_291
|
||||
DSP_L.DSP_1_D19.DSP_GND_L 27_300
|
||||
DSP_L.DSP_1_D19.DSP_VCC_L 26_300
|
||||
DSP_L.DSP_1_D20.DSP_GND_L 26_305
|
||||
DSP_L.DSP_1_D20.DSP_VCC_L 27_303
|
||||
DSP_L.DSP_1_D21.DSP_GND_L 27_307
|
||||
DSP_L.DSP_1_D21.DSP_VCC_L 26_307
|
||||
DSP_L.DSP_1_D22.DSP_GND_L 27_311
|
||||
DSP_L.DSP_1_D22.DSP_VCC_L 26_310
|
||||
DSP_L.DSP_1_D23.DSP_GND_L 27_314
|
||||
DSP_L.DSP_1_D23.DSP_VCC_L 27_313
|
||||
DSP_L.DSP_1_D24.DSP_GND_L 27_318
|
||||
DSP_L.DSP_1_D24.DSP_VCC_L 27_315
|
||||
DSP_L.DSP_1_INMODE0.DSP_GND_L 27_294
|
||||
DSP_L.DSP_1_INMODE0.DSP_VCC_L 27_290
|
||||
DSP_L.DSP_1_INMODE1.DSP_GND_L 26_293
|
||||
DSP_L.DSP_1_INMODE1.DSP_VCC_L 27_305
|
||||
DSP_L.DSP_1_INMODE2.DSP_GND_L 27_240
|
||||
DSP_L.DSP_1_INMODE2.DSP_VCC_L 26_231
|
||||
DSP_L.DSP_1_INMODE3.DSP_GND_L 27_239
|
||||
DSP_L.DSP_1_INMODE3.DSP_VCC_L 26_230
|
||||
DSP_L.DSP_1_INMODE4.DSP_GND_L 26_218
|
||||
DSP_L.DSP_1_INMODE4.DSP_VCC_L 26_206
|
||||
DSP_L.DSP_1_OPMODE6.DSP_GND_L 27_172
|
||||
DSP_L.DSP_1_OPMODE6.DSP_VCC_L 27_180
|
||||
DSP_L.DSP48.DSP_0.A_INPUT[0] 27_84
|
||||
DSP_L.DSP48.DSP_0.AREG_0 26_113 26_137 27_111
|
||||
DSP_L.DSP48.DSP_0.AREG_2 27_136
|
||||
|
|
|
|||
|
|
@ -1,3 +1,159 @@
|
|||
DSP_L.DSP_0_CEAD.DSP_GND_L origin:101-dsp-pips 26_63
|
||||
DSP_L.DSP_0_CEAD.DSP_VCC_L origin:101-dsp-pips 27_62
|
||||
DSP_L.DSP_0_CEALUMODE.DSP_GND_L origin:101-dsp-pips 27_51
|
||||
DSP_L.DSP_0_CEALUMODE.DSP_VCC_L origin:101-dsp-pips 26_50
|
||||
DSP_L.DSP_0_CED.DSP_GND_L origin:101-dsp-pips 27_72
|
||||
DSP_L.DSP_0_CED.DSP_VCC_L origin:101-dsp-pips 26_72
|
||||
DSP_L.DSP_0_CEINMODE.DSP_GND_L origin:101-dsp-pips 26_69
|
||||
DSP_L.DSP_0_CEINMODE.DSP_VCC_L origin:101-dsp-pips 26_67
|
||||
DSP_L.DSP_0_RSTD.DSP_GND_L origin:101-dsp-pips 27_96
|
||||
DSP_L.DSP_0_RSTD.DSP_VCC_L origin:101-dsp-pips 27_85
|
||||
DSP_L.DSP_0_ALUMODE2.DSP_GND_L origin:101-dsp-pips 27_56
|
||||
DSP_L.DSP_0_ALUMODE2.DSP_VCC_L origin:101-dsp-pips 26_55
|
||||
DSP_L.DSP_0_ALUMODE3.DSP_GND_L origin:101-dsp-pips 27_60
|
||||
DSP_L.DSP_0_ALUMODE3.DSP_VCC_L origin:101-dsp-pips 26_53
|
||||
DSP_L.DSP_0_CARRYINSEL2.DSP_GND_L origin:101-dsp-pips 26_17
|
||||
DSP_L.DSP_0_CARRYINSEL2.DSP_VCC_L origin:101-dsp-pips 27_18
|
||||
DSP_L.DSP_0_D0.DSP_GND_L origin:101-dsp-pips 26_65
|
||||
DSP_L.DSP_0_D0.DSP_VCC_L origin:101-dsp-pips 27_64
|
||||
DSP_L.DSP_0_D1.DSP_GND_L origin:101-dsp-pips 27_68
|
||||
DSP_L.DSP_0_D1.DSP_VCC_L origin:101-dsp-pips 27_74
|
||||
DSP_L.DSP_0_D2.DSP_GND_L origin:101-dsp-pips 27_71
|
||||
DSP_L.DSP_0_D2.DSP_VCC_L origin:101-dsp-pips 27_70
|
||||
DSP_L.DSP_0_D3.DSP_GND_L origin:101-dsp-pips 26_75
|
||||
DSP_L.DSP_0_D3.DSP_VCC_L origin:101-dsp-pips 26_73
|
||||
DSP_L.DSP_0_D4.DSP_GND_L origin:101-dsp-pips 27_78
|
||||
DSP_L.DSP_0_D4.DSP_VCC_L origin:101-dsp-pips 26_77
|
||||
DSP_L.DSP_0_D5.DSP_GND_L origin:101-dsp-pips 26_82
|
||||
DSP_L.DSP_0_D5.DSP_VCC_L origin:101-dsp-pips 26_81
|
||||
DSP_L.DSP_0_D6.DSP_GND_L origin:101-dsp-pips 26_89
|
||||
DSP_L.DSP_0_D6.DSP_VCC_L origin:101-dsp-pips 27_89
|
||||
DSP_L.DSP_0_D7.DSP_GND_L origin:101-dsp-pips 27_91
|
||||
DSP_L.DSP_0_D7.DSP_VCC_L origin:101-dsp-pips 26_91
|
||||
DSP_L.DSP_0_D8.DSP_GND_L origin:101-dsp-pips 26_98
|
||||
DSP_L.DSP_0_D8.DSP_VCC_L origin:101-dsp-pips 27_97
|
||||
DSP_L.DSP_0_D9.DSP_GND_L origin:101-dsp-pips 26_101
|
||||
DSP_L.DSP_0_D9.DSP_VCC_L origin:101-dsp-pips 26_99
|
||||
DSP_L.DSP_0_D10.DSP_GND_L origin:101-dsp-pips 26_105
|
||||
DSP_L.DSP_0_D10.DSP_VCC_L origin:101-dsp-pips 26_103
|
||||
DSP_L.DSP_0_D11.DSP_GND_L origin:101-dsp-pips 27_107
|
||||
DSP_L.DSP_0_D11.DSP_VCC_L origin:101-dsp-pips 27_105
|
||||
DSP_L.DSP_0_D12.DSP_GND_L origin:101-dsp-pips 26_107
|
||||
DSP_L.DSP_0_D12.DSP_VCC_L origin:101-dsp-pips 26_111
|
||||
DSP_L.DSP_0_D13.DSP_GND_L origin:101-dsp-pips 27_113
|
||||
DSP_L.DSP_0_D13.DSP_VCC_L origin:101-dsp-pips 26_114
|
||||
DSP_L.DSP_0_D14.DSP_GND_L origin:101-dsp-pips 26_118
|
||||
DSP_L.DSP_0_D14.DSP_VCC_L origin:101-dsp-pips 27_116
|
||||
DSP_L.DSP_0_D15.DSP_GND_L origin:101-dsp-pips 27_122
|
||||
DSP_L.DSP_0_D15.DSP_VCC_L origin:101-dsp-pips 27_120
|
||||
DSP_L.DSP_0_D16.DSP_GND_L origin:101-dsp-pips 27_125
|
||||
DSP_L.DSP_0_D16.DSP_VCC_L origin:101-dsp-pips 26_125
|
||||
DSP_L.DSP_0_D17.DSP_GND_L origin:101-dsp-pips 27_128
|
||||
DSP_L.DSP_0_D17.DSP_VCC_L origin:101-dsp-pips 27_126
|
||||
DSP_L.DSP_0_D18.DSP_GND_L origin:101-dsp-pips 26_135
|
||||
DSP_L.DSP_0_D18.DSP_VCC_L origin:101-dsp-pips 26_131
|
||||
DSP_L.DSP_0_D19.DSP_GND_L origin:101-dsp-pips 27_140
|
||||
DSP_L.DSP_0_D19.DSP_VCC_L origin:101-dsp-pips 26_140
|
||||
DSP_L.DSP_0_D20.DSP_GND_L origin:101-dsp-pips 26_145
|
||||
DSP_L.DSP_0_D20.DSP_VCC_L origin:101-dsp-pips 27_143
|
||||
DSP_L.DSP_0_D21.DSP_GND_L origin:101-dsp-pips 27_147
|
||||
DSP_L.DSP_0_D21.DSP_VCC_L origin:101-dsp-pips 26_147
|
||||
DSP_L.DSP_0_D22.DSP_GND_L origin:101-dsp-pips 27_151
|
||||
DSP_L.DSP_0_D22.DSP_VCC_L origin:101-dsp-pips 26_150
|
||||
DSP_L.DSP_0_D23.DSP_GND_L origin:101-dsp-pips 27_154
|
||||
DSP_L.DSP_0_D23.DSP_VCC_L origin:101-dsp-pips 27_153
|
||||
DSP_L.DSP_0_D24.DSP_GND_L origin:101-dsp-pips 27_158
|
||||
DSP_L.DSP_0_D24.DSP_VCC_L origin:101-dsp-pips 27_155
|
||||
DSP_L.DSP_0_INMODE0.DSP_GND_L origin:101-dsp-pips 27_134
|
||||
DSP_L.DSP_0_INMODE0.DSP_VCC_L origin:101-dsp-pips 27_130
|
||||
DSP_L.DSP_0_INMODE1.DSP_GND_L origin:101-dsp-pips 26_133
|
||||
DSP_L.DSP_0_INMODE1.DSP_VCC_L origin:101-dsp-pips 27_145
|
||||
DSP_L.DSP_0_INMODE2.DSP_GND_L origin:101-dsp-pips 27_80
|
||||
DSP_L.DSP_0_INMODE2.DSP_VCC_L origin:101-dsp-pips 26_71
|
||||
DSP_L.DSP_0_INMODE3.DSP_GND_L origin:101-dsp-pips 27_79
|
||||
DSP_L.DSP_0_INMODE3.DSP_VCC_L origin:101-dsp-pips 26_70
|
||||
DSP_L.DSP_0_INMODE4.DSP_GND_L origin:101-dsp-pips 26_58
|
||||
DSP_L.DSP_0_INMODE4.DSP_VCC_L origin:101-dsp-pips 26_46
|
||||
DSP_L.DSP_0_OPMODE6.DSP_GND_L origin:101-dsp-pips 27_12
|
||||
DSP_L.DSP_0_OPMODE6.DSP_VCC_L origin:101-dsp-pips 27_20
|
||||
DSP_L.DSP_1_CEAD.DSP_GND_L origin:101-dsp-pips 26_223
|
||||
DSP_L.DSP_1_CEAD.DSP_VCC_L origin:101-dsp-pips 27_222
|
||||
DSP_L.DSP_1_CEALUMODE.DSP_GND_L origin:101-dsp-pips 27_211
|
||||
DSP_L.DSP_1_CEALUMODE.DSP_VCC_L origin:101-dsp-pips 26_210
|
||||
DSP_L.DSP_1_CED.DSP_GND_L origin:101-dsp-pips 27_232
|
||||
DSP_L.DSP_1_CED.DSP_VCC_L origin:101-dsp-pips 26_232
|
||||
DSP_L.DSP_1_CEINMODE.DSP_GND_L origin:101-dsp-pips 26_229
|
||||
DSP_L.DSP_1_CEINMODE.DSP_VCC_L origin:101-dsp-pips 26_227
|
||||
DSP_L.DSP_1_RSTD.DSP_GND_L origin:101-dsp-pips 27_256
|
||||
DSP_L.DSP_1_RSTD.DSP_VCC_L origin:101-dsp-pips 27_245
|
||||
DSP_L.DSP_1_ALUMODE2.DSP_GND_L origin:101-dsp-pips 27_216
|
||||
DSP_L.DSP_1_ALUMODE2.DSP_VCC_L origin:101-dsp-pips 26_215
|
||||
DSP_L.DSP_1_ALUMODE3.DSP_GND_L origin:101-dsp-pips 27_220
|
||||
DSP_L.DSP_1_ALUMODE3.DSP_VCC_L origin:101-dsp-pips 26_213
|
||||
DSP_L.DSP_1_CARRYINSEL2.DSP_GND_L origin:101-dsp-pips 26_177
|
||||
DSP_L.DSP_1_CARRYINSEL2.DSP_VCC_L origin:101-dsp-pips 27_178
|
||||
DSP_L.DSP_1_D0.DSP_GND_L origin:101-dsp-pips 26_225
|
||||
DSP_L.DSP_1_D0.DSP_VCC_L origin:101-dsp-pips 27_224
|
||||
DSP_L.DSP_1_D1.DSP_GND_L origin:101-dsp-pips 27_228
|
||||
DSP_L.DSP_1_D1.DSP_VCC_L origin:101-dsp-pips 27_234
|
||||
DSP_L.DSP_1_D2.DSP_GND_L origin:101-dsp-pips 27_231
|
||||
DSP_L.DSP_1_D2.DSP_VCC_L origin:101-dsp-pips 27_230
|
||||
DSP_L.DSP_1_D3.DSP_GND_L origin:101-dsp-pips 26_235
|
||||
DSP_L.DSP_1_D3.DSP_VCC_L origin:101-dsp-pips 26_233
|
||||
DSP_L.DSP_1_D4.DSP_GND_L origin:101-dsp-pips 27_238
|
||||
DSP_L.DSP_1_D4.DSP_VCC_L origin:101-dsp-pips 26_237
|
||||
DSP_L.DSP_1_D5.DSP_GND_L origin:101-dsp-pips 26_242
|
||||
DSP_L.DSP_1_D5.DSP_VCC_L origin:101-dsp-pips 26_241
|
||||
DSP_L.DSP_1_D6.DSP_GND_L origin:101-dsp-pips 26_249
|
||||
DSP_L.DSP_1_D6.DSP_VCC_L origin:101-dsp-pips 27_249
|
||||
DSP_L.DSP_1_D7.DSP_GND_L origin:101-dsp-pips 27_251
|
||||
DSP_L.DSP_1_D7.DSP_VCC_L origin:101-dsp-pips 26_251
|
||||
DSP_L.DSP_1_D8.DSP_GND_L origin:101-dsp-pips 26_258
|
||||
DSP_L.DSP_1_D8.DSP_VCC_L origin:101-dsp-pips 27_257
|
||||
DSP_L.DSP_1_D9.DSP_GND_L origin:101-dsp-pips 26_261
|
||||
DSP_L.DSP_1_D9.DSP_VCC_L origin:101-dsp-pips 26_259
|
||||
DSP_L.DSP_1_D10.DSP_GND_L origin:101-dsp-pips 26_265
|
||||
DSP_L.DSP_1_D10.DSP_VCC_L origin:101-dsp-pips 26_263
|
||||
DSP_L.DSP_1_D11.DSP_GND_L origin:101-dsp-pips 27_267
|
||||
DSP_L.DSP_1_D11.DSP_VCC_L origin:101-dsp-pips 27_265
|
||||
DSP_L.DSP_1_D12.DSP_GND_L origin:101-dsp-pips 26_267
|
||||
DSP_L.DSP_1_D12.DSP_VCC_L origin:101-dsp-pips 26_271
|
||||
DSP_L.DSP_1_D13.DSP_GND_L origin:101-dsp-pips 27_273
|
||||
DSP_L.DSP_1_D13.DSP_VCC_L origin:101-dsp-pips 26_274
|
||||
DSP_L.DSP_1_D14.DSP_GND_L origin:101-dsp-pips 26_278
|
||||
DSP_L.DSP_1_D14.DSP_VCC_L origin:101-dsp-pips 27_276
|
||||
DSP_L.DSP_1_D15.DSP_GND_L origin:101-dsp-pips 27_282
|
||||
DSP_L.DSP_1_D15.DSP_VCC_L origin:101-dsp-pips 27_280
|
||||
DSP_L.DSP_1_D16.DSP_GND_L origin:101-dsp-pips 27_285
|
||||
DSP_L.DSP_1_D16.DSP_VCC_L origin:101-dsp-pips 26_285
|
||||
DSP_L.DSP_1_D17.DSP_GND_L origin:101-dsp-pips 27_288
|
||||
DSP_L.DSP_1_D17.DSP_VCC_L origin:101-dsp-pips 27_286
|
||||
DSP_L.DSP_1_D18.DSP_GND_L origin:101-dsp-pips 26_295
|
||||
DSP_L.DSP_1_D18.DSP_VCC_L origin:101-dsp-pips 26_291
|
||||
DSP_L.DSP_1_D19.DSP_GND_L origin:101-dsp-pips 27_300
|
||||
DSP_L.DSP_1_D19.DSP_VCC_L origin:101-dsp-pips 26_300
|
||||
DSP_L.DSP_1_D20.DSP_GND_L origin:101-dsp-pips 26_305
|
||||
DSP_L.DSP_1_D20.DSP_VCC_L origin:101-dsp-pips 27_303
|
||||
DSP_L.DSP_1_D21.DSP_GND_L origin:101-dsp-pips 27_307
|
||||
DSP_L.DSP_1_D21.DSP_VCC_L origin:101-dsp-pips 26_307
|
||||
DSP_L.DSP_1_D22.DSP_GND_L origin:101-dsp-pips 27_311
|
||||
DSP_L.DSP_1_D22.DSP_VCC_L origin:101-dsp-pips 26_310
|
||||
DSP_L.DSP_1_D23.DSP_GND_L origin:101-dsp-pips 27_314
|
||||
DSP_L.DSP_1_D23.DSP_VCC_L origin:101-dsp-pips 27_313
|
||||
DSP_L.DSP_1_D24.DSP_GND_L origin:101-dsp-pips 27_318
|
||||
DSP_L.DSP_1_D24.DSP_VCC_L origin:101-dsp-pips 27_315
|
||||
DSP_L.DSP_1_INMODE0.DSP_GND_L origin:101-dsp-pips 27_294
|
||||
DSP_L.DSP_1_INMODE0.DSP_VCC_L origin:101-dsp-pips 27_290
|
||||
DSP_L.DSP_1_INMODE1.DSP_GND_L origin:101-dsp-pips 26_293
|
||||
DSP_L.DSP_1_INMODE1.DSP_VCC_L origin:101-dsp-pips 27_305
|
||||
DSP_L.DSP_1_INMODE2.DSP_GND_L origin:101-dsp-pips 27_240
|
||||
DSP_L.DSP_1_INMODE2.DSP_VCC_L origin:101-dsp-pips 26_231
|
||||
DSP_L.DSP_1_INMODE3.DSP_GND_L origin:101-dsp-pips 27_239
|
||||
DSP_L.DSP_1_INMODE3.DSP_VCC_L origin:101-dsp-pips 26_230
|
||||
DSP_L.DSP_1_INMODE4.DSP_GND_L origin:101-dsp-pips 26_218
|
||||
DSP_L.DSP_1_INMODE4.DSP_VCC_L origin:101-dsp-pips 26_206
|
||||
DSP_L.DSP_1_OPMODE6.DSP_GND_L origin:101-dsp-pips 27_172
|
||||
DSP_L.DSP_1_OPMODE6.DSP_VCC_L origin:101-dsp-pips 27_180
|
||||
DSP_L.DSP48.DSP_0.A_INPUT[0] origin:100-dsp-mskpat 27_84
|
||||
DSP_L.DSP48.DSP_0.AREG_0 origin:100-dsp-mskpat 26_113 26_137 27_111
|
||||
DSP_L.DSP48.DSP_0.AREG_2 origin:100-dsp-mskpat 27_136
|
||||
|
|
|
|||
|
|
@ -1,3 +1,159 @@
|
|||
DSP_R.DSP_0_CEAD.DSP_GND_R 26_63
|
||||
DSP_R.DSP_0_CEAD.DSP_VCC_R 27_62
|
||||
DSP_R.DSP_0_CEALUMODE.DSP_GND_R 27_51
|
||||
DSP_R.DSP_0_CEALUMODE.DSP_VCC_R 26_50
|
||||
DSP_R.DSP_0_CED.DSP_GND_R 27_72
|
||||
DSP_R.DSP_0_CED.DSP_VCC_R 26_72
|
||||
DSP_R.DSP_0_CEINMODE.DSP_GND_R 26_69
|
||||
DSP_R.DSP_0_CEINMODE.DSP_VCC_R 26_67
|
||||
DSP_R.DSP_0_RSTD.DSP_GND_R 27_96
|
||||
DSP_R.DSP_0_RSTD.DSP_VCC_R 27_85
|
||||
DSP_R.DSP_0_ALUMODE2.DSP_GND_R 27_56
|
||||
DSP_R.DSP_0_ALUMODE2.DSP_VCC_R 26_55
|
||||
DSP_R.DSP_0_ALUMODE3.DSP_GND_R 27_60
|
||||
DSP_R.DSP_0_ALUMODE3.DSP_VCC_R 26_53
|
||||
DSP_R.DSP_0_CARRYINSEL2.DSP_GND_R 26_17
|
||||
DSP_R.DSP_0_CARRYINSEL2.DSP_VCC_R 27_18
|
||||
DSP_R.DSP_0_D0.DSP_GND_R 26_65
|
||||
DSP_R.DSP_0_D0.DSP_VCC_R 27_64
|
||||
DSP_R.DSP_0_D1.DSP_GND_R 27_68
|
||||
DSP_R.DSP_0_D1.DSP_VCC_R 27_74
|
||||
DSP_R.DSP_0_D2.DSP_GND_R 27_71
|
||||
DSP_R.DSP_0_D2.DSP_VCC_R 27_70
|
||||
DSP_R.DSP_0_D3.DSP_GND_R 26_75
|
||||
DSP_R.DSP_0_D3.DSP_VCC_R 26_73
|
||||
DSP_R.DSP_0_D4.DSP_GND_R 27_78
|
||||
DSP_R.DSP_0_D4.DSP_VCC_R 26_77
|
||||
DSP_R.DSP_0_D5.DSP_GND_R 26_82
|
||||
DSP_R.DSP_0_D5.DSP_VCC_R 26_81
|
||||
DSP_R.DSP_0_D6.DSP_GND_R 26_89
|
||||
DSP_R.DSP_0_D6.DSP_VCC_R 27_89
|
||||
DSP_R.DSP_0_D7.DSP_GND_R 27_91
|
||||
DSP_R.DSP_0_D7.DSP_VCC_R 26_91
|
||||
DSP_R.DSP_0_D8.DSP_GND_R 26_98
|
||||
DSP_R.DSP_0_D8.DSP_VCC_R 27_97
|
||||
DSP_R.DSP_0_D9.DSP_GND_R 26_101
|
||||
DSP_R.DSP_0_D9.DSP_VCC_R 26_99
|
||||
DSP_R.DSP_0_D10.DSP_GND_R 26_105
|
||||
DSP_R.DSP_0_D10.DSP_VCC_R 26_103
|
||||
DSP_R.DSP_0_D11.DSP_GND_R 27_107
|
||||
DSP_R.DSP_0_D11.DSP_VCC_R 27_105
|
||||
DSP_R.DSP_0_D12.DSP_GND_R 26_107
|
||||
DSP_R.DSP_0_D12.DSP_VCC_R 26_111
|
||||
DSP_R.DSP_0_D13.DSP_GND_R 27_113
|
||||
DSP_R.DSP_0_D13.DSP_VCC_R 26_114
|
||||
DSP_R.DSP_0_D14.DSP_GND_R 26_118
|
||||
DSP_R.DSP_0_D14.DSP_VCC_R 27_116
|
||||
DSP_R.DSP_0_D15.DSP_GND_R 27_122
|
||||
DSP_R.DSP_0_D15.DSP_VCC_R 27_120
|
||||
DSP_R.DSP_0_D16.DSP_GND_R 27_125
|
||||
DSP_R.DSP_0_D16.DSP_VCC_R 26_125
|
||||
DSP_R.DSP_0_D17.DSP_GND_R 27_128
|
||||
DSP_R.DSP_0_D17.DSP_VCC_R 27_126
|
||||
DSP_R.DSP_0_D18.DSP_GND_R 26_135
|
||||
DSP_R.DSP_0_D18.DSP_VCC_R 26_131
|
||||
DSP_R.DSP_0_D19.DSP_GND_R 27_140
|
||||
DSP_R.DSP_0_D19.DSP_VCC_R 26_140
|
||||
DSP_R.DSP_0_D20.DSP_GND_R 26_145
|
||||
DSP_R.DSP_0_D20.DSP_VCC_R 27_143
|
||||
DSP_R.DSP_0_D21.DSP_GND_R 27_147
|
||||
DSP_R.DSP_0_D21.DSP_VCC_R 26_147
|
||||
DSP_R.DSP_0_D22.DSP_GND_R 27_151
|
||||
DSP_R.DSP_0_D22.DSP_VCC_R 26_150
|
||||
DSP_R.DSP_0_D23.DSP_GND_R 27_154
|
||||
DSP_R.DSP_0_D23.DSP_VCC_R 27_153
|
||||
DSP_R.DSP_0_D24.DSP_GND_R 27_158
|
||||
DSP_R.DSP_0_D24.DSP_VCC_R 27_155
|
||||
DSP_R.DSP_0_INMODE0.DSP_GND_R 27_134
|
||||
DSP_R.DSP_0_INMODE0.DSP_VCC_R 27_130
|
||||
DSP_R.DSP_0_INMODE1.DSP_GND_R 26_133
|
||||
DSP_R.DSP_0_INMODE1.DSP_VCC_R 27_145
|
||||
DSP_R.DSP_0_INMODE2.DSP_GND_R 27_80
|
||||
DSP_R.DSP_0_INMODE2.DSP_VCC_R 26_71
|
||||
DSP_R.DSP_0_INMODE3.DSP_GND_R 27_79
|
||||
DSP_R.DSP_0_INMODE3.DSP_VCC_R 26_70
|
||||
DSP_R.DSP_0_INMODE4.DSP_GND_R 26_58
|
||||
DSP_R.DSP_0_INMODE4.DSP_VCC_R 26_46
|
||||
DSP_R.DSP_0_OPMODE6.DSP_GND_R 27_12
|
||||
DSP_R.DSP_0_OPMODE6.DSP_VCC_R 27_20
|
||||
DSP_R.DSP_1_CEAD.DSP_GND_R 26_223
|
||||
DSP_R.DSP_1_CEAD.DSP_VCC_R 27_222
|
||||
DSP_R.DSP_1_CEALUMODE.DSP_GND_R 27_211
|
||||
DSP_R.DSP_1_CEALUMODE.DSP_VCC_R 26_210
|
||||
DSP_R.DSP_1_CED.DSP_GND_R 27_232
|
||||
DSP_R.DSP_1_CED.DSP_VCC_R 26_232
|
||||
DSP_R.DSP_1_CEINMODE.DSP_GND_R 26_229
|
||||
DSP_R.DSP_1_CEINMODE.DSP_VCC_R 26_227
|
||||
DSP_R.DSP_1_RSTD.DSP_GND_R 27_256
|
||||
DSP_R.DSP_1_RSTD.DSP_VCC_R 27_245
|
||||
DSP_R.DSP_1_ALUMODE2.DSP_GND_R 27_216
|
||||
DSP_R.DSP_1_ALUMODE2.DSP_VCC_R 26_215
|
||||
DSP_R.DSP_1_ALUMODE3.DSP_GND_R 27_220
|
||||
DSP_R.DSP_1_ALUMODE3.DSP_VCC_R 26_213
|
||||
DSP_R.DSP_1_CARRYINSEL2.DSP_GND_R 26_177
|
||||
DSP_R.DSP_1_CARRYINSEL2.DSP_VCC_R 27_178
|
||||
DSP_R.DSP_1_D0.DSP_GND_R 26_225
|
||||
DSP_R.DSP_1_D0.DSP_VCC_R 27_224
|
||||
DSP_R.DSP_1_D1.DSP_GND_R 27_228
|
||||
DSP_R.DSP_1_D1.DSP_VCC_R 27_234
|
||||
DSP_R.DSP_1_D2.DSP_GND_R 27_231
|
||||
DSP_R.DSP_1_D2.DSP_VCC_R 27_230
|
||||
DSP_R.DSP_1_D3.DSP_GND_R 26_235
|
||||
DSP_R.DSP_1_D3.DSP_VCC_R 26_233
|
||||
DSP_R.DSP_1_D4.DSP_GND_R 27_238
|
||||
DSP_R.DSP_1_D4.DSP_VCC_R 26_237
|
||||
DSP_R.DSP_1_D5.DSP_GND_R 26_242
|
||||
DSP_R.DSP_1_D5.DSP_VCC_R 26_241
|
||||
DSP_R.DSP_1_D6.DSP_GND_R 26_249
|
||||
DSP_R.DSP_1_D6.DSP_VCC_R 27_249
|
||||
DSP_R.DSP_1_D7.DSP_GND_R 27_251
|
||||
DSP_R.DSP_1_D7.DSP_VCC_R 26_251
|
||||
DSP_R.DSP_1_D8.DSP_GND_R 26_258
|
||||
DSP_R.DSP_1_D8.DSP_VCC_R 27_257
|
||||
DSP_R.DSP_1_D9.DSP_GND_R 26_261
|
||||
DSP_R.DSP_1_D9.DSP_VCC_R 26_259
|
||||
DSP_R.DSP_1_D10.DSP_GND_R 26_265
|
||||
DSP_R.DSP_1_D10.DSP_VCC_R 26_263
|
||||
DSP_R.DSP_1_D11.DSP_GND_R 27_267
|
||||
DSP_R.DSP_1_D11.DSP_VCC_R 27_265
|
||||
DSP_R.DSP_1_D12.DSP_GND_R 26_267
|
||||
DSP_R.DSP_1_D12.DSP_VCC_R 26_271
|
||||
DSP_R.DSP_1_D13.DSP_GND_R 27_273
|
||||
DSP_R.DSP_1_D13.DSP_VCC_R 26_274
|
||||
DSP_R.DSP_1_D14.DSP_GND_R 26_278
|
||||
DSP_R.DSP_1_D14.DSP_VCC_R 27_276
|
||||
DSP_R.DSP_1_D15.DSP_GND_R 27_282
|
||||
DSP_R.DSP_1_D15.DSP_VCC_R 27_280
|
||||
DSP_R.DSP_1_D16.DSP_GND_R 27_285
|
||||
DSP_R.DSP_1_D16.DSP_VCC_R 26_285
|
||||
DSP_R.DSP_1_D17.DSP_GND_R 27_288
|
||||
DSP_R.DSP_1_D17.DSP_VCC_R 27_286
|
||||
DSP_R.DSP_1_D18.DSP_GND_R 26_295
|
||||
DSP_R.DSP_1_D18.DSP_VCC_R 26_291
|
||||
DSP_R.DSP_1_D19.DSP_GND_R 27_300
|
||||
DSP_R.DSP_1_D19.DSP_VCC_R 26_300
|
||||
DSP_R.DSP_1_D20.DSP_GND_R 26_305
|
||||
DSP_R.DSP_1_D20.DSP_VCC_R 27_303
|
||||
DSP_R.DSP_1_D21.DSP_GND_R 27_307
|
||||
DSP_R.DSP_1_D21.DSP_VCC_R 26_307
|
||||
DSP_R.DSP_1_D22.DSP_GND_R 27_311
|
||||
DSP_R.DSP_1_D22.DSP_VCC_R 26_310
|
||||
DSP_R.DSP_1_D23.DSP_GND_R 27_314
|
||||
DSP_R.DSP_1_D23.DSP_VCC_R 27_313
|
||||
DSP_R.DSP_1_D24.DSP_GND_R 27_318
|
||||
DSP_R.DSP_1_D24.DSP_VCC_R 27_315
|
||||
DSP_R.DSP_1_INMODE0.DSP_GND_R 27_294
|
||||
DSP_R.DSP_1_INMODE0.DSP_VCC_R 27_290
|
||||
DSP_R.DSP_1_INMODE1.DSP_GND_R 26_293
|
||||
DSP_R.DSP_1_INMODE1.DSP_VCC_R 27_305
|
||||
DSP_R.DSP_1_INMODE2.DSP_GND_R 27_240
|
||||
DSP_R.DSP_1_INMODE2.DSP_VCC_R 26_231
|
||||
DSP_R.DSP_1_INMODE3.DSP_GND_R 27_239
|
||||
DSP_R.DSP_1_INMODE3.DSP_VCC_R 26_230
|
||||
DSP_R.DSP_1_INMODE4.DSP_GND_R 26_218
|
||||
DSP_R.DSP_1_INMODE4.DSP_VCC_R 26_206
|
||||
DSP_R.DSP_1_OPMODE6.DSP_GND_R 27_172
|
||||
DSP_R.DSP_1_OPMODE6.DSP_VCC_R 27_180
|
||||
DSP_R.DSP48.DSP_0.A_INPUT[0] 27_84
|
||||
DSP_R.DSP48.DSP_0.AREG_0 26_113 26_137 27_111
|
||||
DSP_R.DSP48.DSP_0.AREG_2 27_136
|
||||
|
|
|
|||
|
|
@ -1,3 +1,159 @@
|
|||
DSP_R.DSP_0_CEAD.DSP_GND_R origin:101-dsp-pips 26_63
|
||||
DSP_R.DSP_0_CEAD.DSP_VCC_R origin:101-dsp-pips 27_62
|
||||
DSP_R.DSP_0_CEALUMODE.DSP_GND_R origin:101-dsp-pips 27_51
|
||||
DSP_R.DSP_0_CEALUMODE.DSP_VCC_R origin:101-dsp-pips 26_50
|
||||
DSP_R.DSP_0_CED.DSP_GND_R origin:101-dsp-pips 27_72
|
||||
DSP_R.DSP_0_CED.DSP_VCC_R origin:101-dsp-pips 26_72
|
||||
DSP_R.DSP_0_CEINMODE.DSP_GND_R origin:101-dsp-pips 26_69
|
||||
DSP_R.DSP_0_CEINMODE.DSP_VCC_R origin:101-dsp-pips 26_67
|
||||
DSP_R.DSP_0_RSTD.DSP_GND_R origin:101-dsp-pips 27_96
|
||||
DSP_R.DSP_0_RSTD.DSP_VCC_R origin:101-dsp-pips 27_85
|
||||
DSP_R.DSP_0_ALUMODE2.DSP_GND_R origin:101-dsp-pips 27_56
|
||||
DSP_R.DSP_0_ALUMODE2.DSP_VCC_R origin:101-dsp-pips 26_55
|
||||
DSP_R.DSP_0_ALUMODE3.DSP_GND_R origin:101-dsp-pips 27_60
|
||||
DSP_R.DSP_0_ALUMODE3.DSP_VCC_R origin:101-dsp-pips 26_53
|
||||
DSP_R.DSP_0_CARRYINSEL2.DSP_GND_R origin:101-dsp-pips 26_17
|
||||
DSP_R.DSP_0_CARRYINSEL2.DSP_VCC_R origin:101-dsp-pips 27_18
|
||||
DSP_R.DSP_0_D0.DSP_GND_R origin:101-dsp-pips 26_65
|
||||
DSP_R.DSP_0_D0.DSP_VCC_R origin:101-dsp-pips 27_64
|
||||
DSP_R.DSP_0_D1.DSP_GND_R origin:101-dsp-pips 27_68
|
||||
DSP_R.DSP_0_D1.DSP_VCC_R origin:101-dsp-pips 27_74
|
||||
DSP_R.DSP_0_D2.DSP_GND_R origin:101-dsp-pips 27_71
|
||||
DSP_R.DSP_0_D2.DSP_VCC_R origin:101-dsp-pips 27_70
|
||||
DSP_R.DSP_0_D3.DSP_GND_R origin:101-dsp-pips 26_75
|
||||
DSP_R.DSP_0_D3.DSP_VCC_R origin:101-dsp-pips 26_73
|
||||
DSP_R.DSP_0_D4.DSP_GND_R origin:101-dsp-pips 27_78
|
||||
DSP_R.DSP_0_D4.DSP_VCC_R origin:101-dsp-pips 26_77
|
||||
DSP_R.DSP_0_D5.DSP_GND_R origin:101-dsp-pips 26_82
|
||||
DSP_R.DSP_0_D5.DSP_VCC_R origin:101-dsp-pips 26_81
|
||||
DSP_R.DSP_0_D6.DSP_GND_R origin:101-dsp-pips 26_89
|
||||
DSP_R.DSP_0_D6.DSP_VCC_R origin:101-dsp-pips 27_89
|
||||
DSP_R.DSP_0_D7.DSP_GND_R origin:101-dsp-pips 27_91
|
||||
DSP_R.DSP_0_D7.DSP_VCC_R origin:101-dsp-pips 26_91
|
||||
DSP_R.DSP_0_D8.DSP_GND_R origin:101-dsp-pips 26_98
|
||||
DSP_R.DSP_0_D8.DSP_VCC_R origin:101-dsp-pips 27_97
|
||||
DSP_R.DSP_0_D9.DSP_GND_R origin:101-dsp-pips 26_101
|
||||
DSP_R.DSP_0_D9.DSP_VCC_R origin:101-dsp-pips 26_99
|
||||
DSP_R.DSP_0_D10.DSP_GND_R origin:101-dsp-pips 26_105
|
||||
DSP_R.DSP_0_D10.DSP_VCC_R origin:101-dsp-pips 26_103
|
||||
DSP_R.DSP_0_D11.DSP_GND_R origin:101-dsp-pips 27_107
|
||||
DSP_R.DSP_0_D11.DSP_VCC_R origin:101-dsp-pips 27_105
|
||||
DSP_R.DSP_0_D12.DSP_GND_R origin:101-dsp-pips 26_107
|
||||
DSP_R.DSP_0_D12.DSP_VCC_R origin:101-dsp-pips 26_111
|
||||
DSP_R.DSP_0_D13.DSP_GND_R origin:101-dsp-pips 27_113
|
||||
DSP_R.DSP_0_D13.DSP_VCC_R origin:101-dsp-pips 26_114
|
||||
DSP_R.DSP_0_D14.DSP_GND_R origin:101-dsp-pips 26_118
|
||||
DSP_R.DSP_0_D14.DSP_VCC_R origin:101-dsp-pips 27_116
|
||||
DSP_R.DSP_0_D15.DSP_GND_R origin:101-dsp-pips 27_122
|
||||
DSP_R.DSP_0_D15.DSP_VCC_R origin:101-dsp-pips 27_120
|
||||
DSP_R.DSP_0_D16.DSP_GND_R origin:101-dsp-pips 27_125
|
||||
DSP_R.DSP_0_D16.DSP_VCC_R origin:101-dsp-pips 26_125
|
||||
DSP_R.DSP_0_D17.DSP_GND_R origin:101-dsp-pips 27_128
|
||||
DSP_R.DSP_0_D17.DSP_VCC_R origin:101-dsp-pips 27_126
|
||||
DSP_R.DSP_0_D18.DSP_GND_R origin:101-dsp-pips 26_135
|
||||
DSP_R.DSP_0_D18.DSP_VCC_R origin:101-dsp-pips 26_131
|
||||
DSP_R.DSP_0_D19.DSP_GND_R origin:101-dsp-pips 27_140
|
||||
DSP_R.DSP_0_D19.DSP_VCC_R origin:101-dsp-pips 26_140
|
||||
DSP_R.DSP_0_D20.DSP_GND_R origin:101-dsp-pips 26_145
|
||||
DSP_R.DSP_0_D20.DSP_VCC_R origin:101-dsp-pips 27_143
|
||||
DSP_R.DSP_0_D21.DSP_GND_R origin:101-dsp-pips 27_147
|
||||
DSP_R.DSP_0_D21.DSP_VCC_R origin:101-dsp-pips 26_147
|
||||
DSP_R.DSP_0_D22.DSP_GND_R origin:101-dsp-pips 27_151
|
||||
DSP_R.DSP_0_D22.DSP_VCC_R origin:101-dsp-pips 26_150
|
||||
DSP_R.DSP_0_D23.DSP_GND_R origin:101-dsp-pips 27_154
|
||||
DSP_R.DSP_0_D23.DSP_VCC_R origin:101-dsp-pips 27_153
|
||||
DSP_R.DSP_0_D24.DSP_GND_R origin:101-dsp-pips 27_158
|
||||
DSP_R.DSP_0_D24.DSP_VCC_R origin:101-dsp-pips 27_155
|
||||
DSP_R.DSP_0_INMODE0.DSP_GND_R origin:101-dsp-pips 27_134
|
||||
DSP_R.DSP_0_INMODE0.DSP_VCC_R origin:101-dsp-pips 27_130
|
||||
DSP_R.DSP_0_INMODE1.DSP_GND_R origin:101-dsp-pips 26_133
|
||||
DSP_R.DSP_0_INMODE1.DSP_VCC_R origin:101-dsp-pips 27_145
|
||||
DSP_R.DSP_0_INMODE2.DSP_GND_R origin:101-dsp-pips 27_80
|
||||
DSP_R.DSP_0_INMODE2.DSP_VCC_R origin:101-dsp-pips 26_71
|
||||
DSP_R.DSP_0_INMODE3.DSP_GND_R origin:101-dsp-pips 27_79
|
||||
DSP_R.DSP_0_INMODE3.DSP_VCC_R origin:101-dsp-pips 26_70
|
||||
DSP_R.DSP_0_INMODE4.DSP_GND_R origin:101-dsp-pips 26_58
|
||||
DSP_R.DSP_0_INMODE4.DSP_VCC_R origin:101-dsp-pips 26_46
|
||||
DSP_R.DSP_0_OPMODE6.DSP_GND_R origin:101-dsp-pips 27_12
|
||||
DSP_R.DSP_0_OPMODE6.DSP_VCC_R origin:101-dsp-pips 27_20
|
||||
DSP_R.DSP_1_CEAD.DSP_GND_R origin:101-dsp-pips 26_223
|
||||
DSP_R.DSP_1_CEAD.DSP_VCC_R origin:101-dsp-pips 27_222
|
||||
DSP_R.DSP_1_CEALUMODE.DSP_GND_R origin:101-dsp-pips 27_211
|
||||
DSP_R.DSP_1_CEALUMODE.DSP_VCC_R origin:101-dsp-pips 26_210
|
||||
DSP_R.DSP_1_CED.DSP_GND_R origin:101-dsp-pips 27_232
|
||||
DSP_R.DSP_1_CED.DSP_VCC_R origin:101-dsp-pips 26_232
|
||||
DSP_R.DSP_1_CEINMODE.DSP_GND_R origin:101-dsp-pips 26_229
|
||||
DSP_R.DSP_1_CEINMODE.DSP_VCC_R origin:101-dsp-pips 26_227
|
||||
DSP_R.DSP_1_RSTD.DSP_GND_R origin:101-dsp-pips 27_256
|
||||
DSP_R.DSP_1_RSTD.DSP_VCC_R origin:101-dsp-pips 27_245
|
||||
DSP_R.DSP_1_ALUMODE2.DSP_GND_R origin:101-dsp-pips 27_216
|
||||
DSP_R.DSP_1_ALUMODE2.DSP_VCC_R origin:101-dsp-pips 26_215
|
||||
DSP_R.DSP_1_ALUMODE3.DSP_GND_R origin:101-dsp-pips 27_220
|
||||
DSP_R.DSP_1_ALUMODE3.DSP_VCC_R origin:101-dsp-pips 26_213
|
||||
DSP_R.DSP_1_CARRYINSEL2.DSP_GND_R origin:101-dsp-pips 26_177
|
||||
DSP_R.DSP_1_CARRYINSEL2.DSP_VCC_R origin:101-dsp-pips 27_178
|
||||
DSP_R.DSP_1_D0.DSP_GND_R origin:101-dsp-pips 26_225
|
||||
DSP_R.DSP_1_D0.DSP_VCC_R origin:101-dsp-pips 27_224
|
||||
DSP_R.DSP_1_D1.DSP_GND_R origin:101-dsp-pips 27_228
|
||||
DSP_R.DSP_1_D1.DSP_VCC_R origin:101-dsp-pips 27_234
|
||||
DSP_R.DSP_1_D2.DSP_GND_R origin:101-dsp-pips 27_231
|
||||
DSP_R.DSP_1_D2.DSP_VCC_R origin:101-dsp-pips 27_230
|
||||
DSP_R.DSP_1_D3.DSP_GND_R origin:101-dsp-pips 26_235
|
||||
DSP_R.DSP_1_D3.DSP_VCC_R origin:101-dsp-pips 26_233
|
||||
DSP_R.DSP_1_D4.DSP_GND_R origin:101-dsp-pips 27_238
|
||||
DSP_R.DSP_1_D4.DSP_VCC_R origin:101-dsp-pips 26_237
|
||||
DSP_R.DSP_1_D5.DSP_GND_R origin:101-dsp-pips 26_242
|
||||
DSP_R.DSP_1_D5.DSP_VCC_R origin:101-dsp-pips 26_241
|
||||
DSP_R.DSP_1_D6.DSP_GND_R origin:101-dsp-pips 26_249
|
||||
DSP_R.DSP_1_D6.DSP_VCC_R origin:101-dsp-pips 27_249
|
||||
DSP_R.DSP_1_D7.DSP_GND_R origin:101-dsp-pips 27_251
|
||||
DSP_R.DSP_1_D7.DSP_VCC_R origin:101-dsp-pips 26_251
|
||||
DSP_R.DSP_1_D8.DSP_GND_R origin:101-dsp-pips 26_258
|
||||
DSP_R.DSP_1_D8.DSP_VCC_R origin:101-dsp-pips 27_257
|
||||
DSP_R.DSP_1_D9.DSP_GND_R origin:101-dsp-pips 26_261
|
||||
DSP_R.DSP_1_D9.DSP_VCC_R origin:101-dsp-pips 26_259
|
||||
DSP_R.DSP_1_D10.DSP_GND_R origin:101-dsp-pips 26_265
|
||||
DSP_R.DSP_1_D10.DSP_VCC_R origin:101-dsp-pips 26_263
|
||||
DSP_R.DSP_1_D11.DSP_GND_R origin:101-dsp-pips 27_267
|
||||
DSP_R.DSP_1_D11.DSP_VCC_R origin:101-dsp-pips 27_265
|
||||
DSP_R.DSP_1_D12.DSP_GND_R origin:101-dsp-pips 26_267
|
||||
DSP_R.DSP_1_D12.DSP_VCC_R origin:101-dsp-pips 26_271
|
||||
DSP_R.DSP_1_D13.DSP_GND_R origin:101-dsp-pips 27_273
|
||||
DSP_R.DSP_1_D13.DSP_VCC_R origin:101-dsp-pips 26_274
|
||||
DSP_R.DSP_1_D14.DSP_GND_R origin:101-dsp-pips 26_278
|
||||
DSP_R.DSP_1_D14.DSP_VCC_R origin:101-dsp-pips 27_276
|
||||
DSP_R.DSP_1_D15.DSP_GND_R origin:101-dsp-pips 27_282
|
||||
DSP_R.DSP_1_D15.DSP_VCC_R origin:101-dsp-pips 27_280
|
||||
DSP_R.DSP_1_D16.DSP_GND_R origin:101-dsp-pips 27_285
|
||||
DSP_R.DSP_1_D16.DSP_VCC_R origin:101-dsp-pips 26_285
|
||||
DSP_R.DSP_1_D17.DSP_GND_R origin:101-dsp-pips 27_288
|
||||
DSP_R.DSP_1_D17.DSP_VCC_R origin:101-dsp-pips 27_286
|
||||
DSP_R.DSP_1_D18.DSP_GND_R origin:101-dsp-pips 26_295
|
||||
DSP_R.DSP_1_D18.DSP_VCC_R origin:101-dsp-pips 26_291
|
||||
DSP_R.DSP_1_D19.DSP_GND_R origin:101-dsp-pips 27_300
|
||||
DSP_R.DSP_1_D19.DSP_VCC_R origin:101-dsp-pips 26_300
|
||||
DSP_R.DSP_1_D20.DSP_GND_R origin:101-dsp-pips 26_305
|
||||
DSP_R.DSP_1_D20.DSP_VCC_R origin:101-dsp-pips 27_303
|
||||
DSP_R.DSP_1_D21.DSP_GND_R origin:101-dsp-pips 27_307
|
||||
DSP_R.DSP_1_D21.DSP_VCC_R origin:101-dsp-pips 26_307
|
||||
DSP_R.DSP_1_D22.DSP_GND_R origin:101-dsp-pips 27_311
|
||||
DSP_R.DSP_1_D22.DSP_VCC_R origin:101-dsp-pips 26_310
|
||||
DSP_R.DSP_1_D23.DSP_GND_R origin:101-dsp-pips 27_314
|
||||
DSP_R.DSP_1_D23.DSP_VCC_R origin:101-dsp-pips 27_313
|
||||
DSP_R.DSP_1_D24.DSP_GND_R origin:101-dsp-pips 27_318
|
||||
DSP_R.DSP_1_D24.DSP_VCC_R origin:101-dsp-pips 27_315
|
||||
DSP_R.DSP_1_INMODE0.DSP_GND_R origin:101-dsp-pips 27_294
|
||||
DSP_R.DSP_1_INMODE0.DSP_VCC_R origin:101-dsp-pips 27_290
|
||||
DSP_R.DSP_1_INMODE1.DSP_GND_R origin:101-dsp-pips 26_293
|
||||
DSP_R.DSP_1_INMODE1.DSP_VCC_R origin:101-dsp-pips 27_305
|
||||
DSP_R.DSP_1_INMODE2.DSP_GND_R origin:101-dsp-pips 27_240
|
||||
DSP_R.DSP_1_INMODE2.DSP_VCC_R origin:101-dsp-pips 26_231
|
||||
DSP_R.DSP_1_INMODE3.DSP_GND_R origin:101-dsp-pips 27_239
|
||||
DSP_R.DSP_1_INMODE3.DSP_VCC_R origin:101-dsp-pips 26_230
|
||||
DSP_R.DSP_1_INMODE4.DSP_GND_R origin:101-dsp-pips 26_218
|
||||
DSP_R.DSP_1_INMODE4.DSP_VCC_R origin:101-dsp-pips 26_206
|
||||
DSP_R.DSP_1_OPMODE6.DSP_GND_R origin:101-dsp-pips 27_172
|
||||
DSP_R.DSP_1_OPMODE6.DSP_VCC_R origin:101-dsp-pips 27_180
|
||||
DSP_R.DSP48.DSP_0.A_INPUT[0] origin:100-dsp-mskpat 27_84
|
||||
DSP_R.DSP48.DSP_0.AREG_0 origin:100-dsp-mskpat 26_113 26_137 27_111
|
||||
DSP_R.DSP48.DSP_0.AREG_2 origin:100-dsp-mskpat 27_136
|
||||
|
|
|
|||
|
|
@ -1,3 +1,4 @@
|
|||
GTP_COMMON.ENABLE_DRP 24_1613 25_1613
|
||||
GTP_COMMON.IBUFDS_GTE2.CLKCM_CFG[0] 29_1581
|
||||
GTP_COMMON.IBUFDS_GTE2.CLKCM_CFG[1] 28_1582
|
||||
GTP_COMMON.IBUFDS_GTE2_Y0.CLKCM_CFG 28_1580
|
||||
|
|
@ -70,6 +71,7 @@ GTP_COMMON.GTPE2.BIAS_CFG[60] 28_1670
|
|||
GTP_COMMON.GTPE2.BIAS_CFG[61] 29_1670
|
||||
GTP_COMMON.GTPE2.BIAS_CFG[62] 28_1671
|
||||
GTP_COMMON.GTPE2.BIAS_CFG[63] 29_1671
|
||||
GTP_COMMON.GTPE2.BOTH_GTREFCLK_USED 29_1439 29_1807
|
||||
GTP_COMMON.GTPE2.COMMON_CFG[0] 28_1544
|
||||
GTP_COMMON.GTPE2.COMMON_CFG[1] 29_1544
|
||||
GTP_COMMON.GTPE2.COMMON_CFG[2] 28_1545
|
||||
|
|
@ -103,8 +105,6 @@ GTP_COMMON.GTPE2.COMMON_CFG[29] 29_1558
|
|||
GTP_COMMON.GTPE2.COMMON_CFG[30] 28_1559
|
||||
GTP_COMMON.GTPE2.COMMON_CFG[31] 29_1559
|
||||
GTP_COMMON.GTPE2.IN_USE 28_1584
|
||||
GTP_COMMON.GTPE2.INV_GTGREFCLK0 29_1516
|
||||
GTP_COMMON.GTPE2.INV_GTGREFCLK1 28_1514
|
||||
GTP_COMMON.GTPE2.PLL_CLKOUT_CFG[0] 28_1560
|
||||
GTP_COMMON.GTPE2.PLL_CLKOUT_CFG[1] 29_1560
|
||||
GTP_COMMON.GTPE2.PLL_CLKOUT_CFG[2] 28_1561
|
||||
|
|
@ -148,6 +148,8 @@ GTP_COMMON.GTPE2.RSVD_ATTR1[15] 29_1735
|
|||
GTP_COMMON.GTPE2.ZINV_DRPCLK 28_1516
|
||||
GTP_COMMON.GTPE2.ZINV_PLL0LOCKDETCLK 29_1512
|
||||
GTP_COMMON.GTPE2.ZINV_PLL1LOCKDETCLK 28_1512
|
||||
GTP_COMMON.GTPE2.GTREFCLK0_USED 28_1438 28_1806
|
||||
GTP_COMMON.GTPE2.GTREFCLK1_USED 29_1438 29_1806
|
||||
GTP_COMMON.GTPE2.PLL0_CFG[0] 28_1424
|
||||
GTP_COMMON.GTPE2.PLL0_CFG[1] 29_1424
|
||||
GTP_COMMON.GTPE2.PLL0_CFG[2] 28_1425
|
||||
|
|
|
|||
|
|
@ -1,3 +1,4 @@
|
|||
GTP_COMMON.ENABLE_DRP origin:063-gtp-common-conf 24_1613 25_1613
|
||||
GTP_COMMON.IBUFDS_GTE2.CLKCM_CFG[0] origin:063-gtp-common-conf 29_1581
|
||||
GTP_COMMON.IBUFDS_GTE2.CLKCM_CFG[1] origin:063-gtp-common-conf 28_1582
|
||||
GTP_COMMON.IBUFDS_GTE2_Y0.CLKCM_CFG origin:063-gtp-common-conf 28_1580
|
||||
|
|
@ -70,6 +71,7 @@ GTP_COMMON.GTPE2.BIAS_CFG[60] origin:063-gtp-common-conf 28_1670
|
|||
GTP_COMMON.GTPE2.BIAS_CFG[61] origin:063-gtp-common-conf 29_1670
|
||||
GTP_COMMON.GTPE2.BIAS_CFG[62] origin:063-gtp-common-conf 28_1671
|
||||
GTP_COMMON.GTPE2.BIAS_CFG[63] origin:063-gtp-common-conf 29_1671
|
||||
GTP_COMMON.GTPE2.BOTH_GTREFCLK_USED origin:063-gtp-common-conf 29_1439 29_1807
|
||||
GTP_COMMON.GTPE2.COMMON_CFG[0] origin:063-gtp-common-conf 28_1544
|
||||
GTP_COMMON.GTPE2.COMMON_CFG[1] origin:063-gtp-common-conf 29_1544
|
||||
GTP_COMMON.GTPE2.COMMON_CFG[2] origin:063-gtp-common-conf 28_1545
|
||||
|
|
@ -103,8 +105,6 @@ GTP_COMMON.GTPE2.COMMON_CFG[29] origin:063-gtp-common-conf 29_1558
|
|||
GTP_COMMON.GTPE2.COMMON_CFG[30] origin:063-gtp-common-conf 28_1559
|
||||
GTP_COMMON.GTPE2.COMMON_CFG[31] origin:063-gtp-common-conf 29_1559
|
||||
GTP_COMMON.GTPE2.IN_USE origin:063-gtp-common-conf 28_1584
|
||||
GTP_COMMON.GTPE2.INV_GTGREFCLK0 origin:063-gtp-common-conf 29_1516
|
||||
GTP_COMMON.GTPE2.INV_GTGREFCLK1 origin:063-gtp-common-conf 28_1514
|
||||
GTP_COMMON.GTPE2.PLL_CLKOUT_CFG[0] origin:063-gtp-common-conf 28_1560
|
||||
GTP_COMMON.GTPE2.PLL_CLKOUT_CFG[1] origin:063-gtp-common-conf 29_1560
|
||||
GTP_COMMON.GTPE2.PLL_CLKOUT_CFG[2] origin:063-gtp-common-conf 28_1561
|
||||
|
|
@ -148,6 +148,8 @@ GTP_COMMON.GTPE2.RSVD_ATTR1[15] origin:063-gtp-common-conf 29_1735
|
|||
GTP_COMMON.GTPE2.ZINV_DRPCLK origin:063-gtp-common-conf 28_1516
|
||||
GTP_COMMON.GTPE2.ZINV_PLL0LOCKDETCLK origin:063-gtp-common-conf 29_1512
|
||||
GTP_COMMON.GTPE2.ZINV_PLL1LOCKDETCLK origin:063-gtp-common-conf 28_1512
|
||||
GTP_COMMON.GTPE2.GTREFCLK0_USED origin:063-gtp-common-conf 28_1438 28_1806
|
||||
GTP_COMMON.GTPE2.GTREFCLK1_USED origin:063-gtp-common-conf 29_1438 29_1806
|
||||
GTP_COMMON.GTPE2.PLL0_CFG[0] origin:063-gtp-common-conf 28_1424
|
||||
GTP_COMMON.GTPE2.PLL0_CFG[1] origin:063-gtp-common-conf 29_1424
|
||||
GTP_COMMON.GTPE2.PLL0_CFG[2] origin:063-gtp-common-conf 28_1425
|
||||
|
|
|
|||
|
|
@ -1,3 +1,172 @@
|
|||
GTP_COMMON_MID_LEFT.ENABLE_DRP 00_1613 01_1613
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.HCLK_GTP_CK_MUX0 02_1614 03_1617 03_1622
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.HCLK_GTP_CK_MUX1 02_1614 02_1622 03_1616
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 02_1615 03_1617
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 02_1615 03_1616
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.GTPE2_COMMON_RXOUTCLK_MUX_0 02_1615 03_1621
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.GTPE2_COMMON_RXOUTCLK_MUX_1 02_1615 03_1620
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.GTPE2_COMMON_RXOUTCLK_MUX_2 02_1614 03_1621
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.GTPE2_COMMON_RXOUTCLK_MUX_3 02_1614 03_1620
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.GTPE2_COMMON_TXOUTCLK_MUX_0 02_1615 03_1619
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.GTPE2_COMMON_TXOUTCLK_MUX_1 02_1615 03_1618
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.GTPE2_COMMON_TXOUTCLK_MUX_2 02_1614 03_1619
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.GTPE2_COMMON_TXOUTCLK_MUX_3 02_1614 03_1618
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.HCLK_GTP_CK_MUX0 02_1617 03_1614 03_1622
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.HCLK_GTP_CK_MUX1 02_1616 02_1622 03_1614
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 02_1617 03_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 02_1616 03_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.GTPE2_COMMON_RXOUTCLK_MUX_0 02_1621 03_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.GTPE2_COMMON_RXOUTCLK_MUX_1 02_1620 03_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.GTPE2_COMMON_RXOUTCLK_MUX_2 02_1621 03_1614
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.GTPE2_COMMON_RXOUTCLK_MUX_3 02_1620 03_1614
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.GTPE2_COMMON_TXOUTCLK_MUX_0 02_1619 03_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.GTPE2_COMMON_TXOUTCLK_MUX_1 02_1618 03_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.GTPE2_COMMON_TXOUTCLK_MUX_2 02_1619 03_1614
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.GTPE2_COMMON_TXOUTCLK_MUX_3 02_1618 03_1614
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.HCLK_GTP_CK_MUX2 02_1624 03_1623 03_1627
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.HCLK_GTP_CK_MUX3 02_1623 02_1624 03_1626
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 02_1625 03_1627
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 02_1625 03_1626
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.GTPE2_COMMON_RXOUTCLK_MUX_0 02_1625 03_1631
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.GTPE2_COMMON_RXOUTCLK_MUX_1 02_1625 03_1630
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.GTPE2_COMMON_RXOUTCLK_MUX_2 02_1624 03_1631
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.GTPE2_COMMON_RXOUTCLK_MUX_3 02_1624 03_1630
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.GTPE2_COMMON_TXOUTCLK_MUX_0 02_1625 03_1629
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.GTPE2_COMMON_TXOUTCLK_MUX_1 02_1625 03_1628
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.GTPE2_COMMON_TXOUTCLK_MUX_2 02_1624 03_1629
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.GTPE2_COMMON_TXOUTCLK_MUX_3 02_1624 03_1628
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.HCLK_GTP_CK_MUX2 02_1627 03_1623 03_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.HCLK_GTP_CK_MUX3 02_1623 02_1626 03_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 02_1627 03_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 02_1626 03_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.GTPE2_COMMON_RXOUTCLK_MUX_0 02_1631 03_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.GTPE2_COMMON_RXOUTCLK_MUX_1 02_1630 03_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.GTPE2_COMMON_RXOUTCLK_MUX_2 02_1631 03_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.GTPE2_COMMON_RXOUTCLK_MUX_3 02_1630 03_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.GTPE2_COMMON_TXOUTCLK_MUX_0 02_1629 03_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.GTPE2_COMMON_TXOUTCLK_MUX_1 02_1628 03_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.GTPE2_COMMON_TXOUTCLK_MUX_2 02_1629 03_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.GTPE2_COMMON_TXOUTCLK_MUX_3 02_1628 03_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.HCLK_GTP_CK_MUX4 00_1614 01_1617 01_1622
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.HCLK_GTP_CK_MUX5 00_1614 00_1622 01_1616
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 00_1615 01_1617
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 00_1615 01_1616
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.GTPE2_COMMON_RXOUTCLK_MUX_0 00_1615 01_1621
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.GTPE2_COMMON_RXOUTCLK_MUX_1 00_1615 01_1620
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.GTPE2_COMMON_RXOUTCLK_MUX_2 00_1614 01_1621
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.GTPE2_COMMON_RXOUTCLK_MUX_3 00_1614 01_1620
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.GTPE2_COMMON_TXOUTCLK_MUX_0 00_1615 01_1619
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.GTPE2_COMMON_TXOUTCLK_MUX_1 00_1615 01_1618
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.GTPE2_COMMON_TXOUTCLK_MUX_2 00_1614 01_1619
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.GTPE2_COMMON_TXOUTCLK_MUX_3 00_1614 01_1618
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.HCLK_GTP_CK_MUX4 00_1617 01_1614 01_1622
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.HCLK_GTP_CK_MUX5 00_1616 00_1622 01_1614
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 00_1617 01_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 00_1616 01_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.GTPE2_COMMON_RXOUTCLK_MUX_0 00_1621 01_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.GTPE2_COMMON_RXOUTCLK_MUX_1 00_1620 01_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.GTPE2_COMMON_RXOUTCLK_MUX_2 00_1621 01_1614
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.GTPE2_COMMON_RXOUTCLK_MUX_3 00_1620 01_1614
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.GTPE2_COMMON_TXOUTCLK_MUX_0 00_1619 01_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.GTPE2_COMMON_TXOUTCLK_MUX_1 00_1618 01_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.GTPE2_COMMON_TXOUTCLK_MUX_2 00_1619 01_1614
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.GTPE2_COMMON_TXOUTCLK_MUX_3 00_1618 01_1614
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.HCLK_GTP_CK_MUX6 00_1624 01_1623 01_1627
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.HCLK_GTP_CK_MUX7 00_1623 00_1624 01_1626
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 00_1625 01_1627
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 00_1625 01_1626
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.GTPE2_COMMON_RXOUTCLK_MUX_0 00_1625 01_1631
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.GTPE2_COMMON_RXOUTCLK_MUX_1 00_1625 01_1630
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.GTPE2_COMMON_RXOUTCLK_MUX_2 00_1624 01_1631
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.GTPE2_COMMON_RXOUTCLK_MUX_3 00_1624 01_1630
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.GTPE2_COMMON_TXOUTCLK_MUX_0 00_1625 01_1629
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.GTPE2_COMMON_TXOUTCLK_MUX_1 00_1625 01_1628
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.GTPE2_COMMON_TXOUTCLK_MUX_2 00_1624 01_1629
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.GTPE2_COMMON_TXOUTCLK_MUX_3 00_1624 01_1628
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.HCLK_GTP_CK_MUX6 00_1627 01_1623 01_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.HCLK_GTP_CK_MUX7 00_1623 00_1626 01_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 00_1627 01_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 00_1626 01_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.GTPE2_COMMON_RXOUTCLK_MUX_0 00_1631 01_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.GTPE2_COMMON_RXOUTCLK_MUX_1 00_1630 01_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.GTPE2_COMMON_RXOUTCLK_MUX_2 00_1631 01_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.GTPE2_COMMON_RXOUTCLK_MUX_3 00_1630 01_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.GTPE2_COMMON_TXOUTCLK_MUX_0 00_1629 01_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.GTPE2_COMMON_TXOUTCLK_MUX_1 00_1628 01_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.GTPE2_COMMON_TXOUTCLK_MUX_2 00_1629 01_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.GTPE2_COMMON_TXOUTCLK_MUX_3 00_1628 01_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.HCLK_GTP_CK_MUX8 04_1614 05_1617 05_1622
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.HCLK_GTP_CK_MUX9 04_1614 04_1622 05_1616
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 04_1615 05_1617
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 04_1615 05_1616
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.GTPE2_COMMON_RXOUTCLK_MUX_0 04_1615 05_1621
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.GTPE2_COMMON_RXOUTCLK_MUX_1 04_1615 05_1620
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.GTPE2_COMMON_RXOUTCLK_MUX_2 04_1614 05_1621
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.GTPE2_COMMON_RXOUTCLK_MUX_3 04_1614 05_1620
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.GTPE2_COMMON_TXOUTCLK_MUX_0 04_1615 05_1619
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.GTPE2_COMMON_TXOUTCLK_MUX_1 04_1615 05_1618
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.GTPE2_COMMON_TXOUTCLK_MUX_2 04_1614 05_1619
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.GTPE2_COMMON_TXOUTCLK_MUX_3 04_1614 05_1618
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.HCLK_GTP_CK_MUX8 04_1617 05_1614 05_1622
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.HCLK_GTP_CK_MUX9 04_1616 04_1622 05_1614
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 04_1617 05_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 04_1616 05_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.GTPE2_COMMON_RXOUTCLK_MUX_0 04_1621 05_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.GTPE2_COMMON_RXOUTCLK_MUX_1 04_1620 05_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.GTPE2_COMMON_RXOUTCLK_MUX_2 04_1621 05_1614
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.GTPE2_COMMON_RXOUTCLK_MUX_3 04_1620 05_1614
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.GTPE2_COMMON_TXOUTCLK_MUX_0 04_1619 05_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.GTPE2_COMMON_TXOUTCLK_MUX_1 04_1618 05_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.GTPE2_COMMON_TXOUTCLK_MUX_2 04_1619 05_1614
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.GTPE2_COMMON_TXOUTCLK_MUX_3 04_1618 05_1614
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.HCLK_GTP_CK_MUX10 04_1624 05_1623 05_1627
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.HCLK_GTP_CK_MUX11 04_1623 04_1624 05_1626
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 04_1625 05_1627
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 04_1625 05_1626
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.GTPE2_COMMON_RXOUTCLK_MUX_0 04_1625 05_1631
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.GTPE2_COMMON_RXOUTCLK_MUX_1 04_1625 05_1630
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.GTPE2_COMMON_RXOUTCLK_MUX_2 04_1624 05_1631
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.GTPE2_COMMON_RXOUTCLK_MUX_3 04_1624 05_1630
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.GTPE2_COMMON_TXOUTCLK_MUX_0 04_1625 05_1629
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.GTPE2_COMMON_TXOUTCLK_MUX_1 04_1625 05_1628
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.GTPE2_COMMON_TXOUTCLK_MUX_2 04_1624 05_1629
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.GTPE2_COMMON_TXOUTCLK_MUX_3 04_1624 05_1628
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.HCLK_GTP_CK_MUX10 04_1627 05_1623 05_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.HCLK_GTP_CK_MUX11 04_1623 04_1626 05_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 04_1627 05_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 04_1626 05_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.GTPE2_COMMON_RXOUTCLK_MUX_0 04_1631 05_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.GTPE2_COMMON_RXOUTCLK_MUX_1 04_1630 05_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.GTPE2_COMMON_RXOUTCLK_MUX_2 04_1631 05_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.GTPE2_COMMON_RXOUTCLK_MUX_3 04_1630 05_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.GTPE2_COMMON_TXOUTCLK_MUX_0 04_1629 05_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.GTPE2_COMMON_TXOUTCLK_MUX_1 04_1628 05_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.GTPE2_COMMON_TXOUTCLK_MUX_2 04_1629 05_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.GTPE2_COMMON_TXOUTCLK_MUX_3 04_1628 05_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.HCLK_GTP_CK_MUX12 06_1616 07_1619 07_1626
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.HCLK_GTP_CK_MUX13 06_1616 06_1626 07_1618
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 06_1617 07_1619
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 06_1617 07_1618
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.GTPE2_COMMON_RXOUTCLK_MUX_0 06_1617 07_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.GTPE2_COMMON_RXOUTCLK_MUX_1 06_1617 07_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.GTPE2_COMMON_RXOUTCLK_MUX_2 06_1616 07_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.GTPE2_COMMON_RXOUTCLK_MUX_3 06_1616 07_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.GTPE2_COMMON_TXOUTCLK_MUX_0 06_1617 07_1623
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.GTPE2_COMMON_TXOUTCLK_MUX_1 06_1617 07_1622
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.GTPE2_COMMON_TXOUTCLK_MUX_2 06_1616 07_1623
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.GTPE2_COMMON_TXOUTCLK_MUX_3 06_1616 07_1622
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.HCLK_GTP_CK_MUX12 06_1619 07_1616 07_1626
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.HCLK_GTP_CK_MUX13 06_1618 06_1626 07_1616
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 06_1619 07_1617
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 06_1618 07_1617
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.GTPE2_COMMON_RXOUTCLK_MUX_0 06_1625 07_1617
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.GTPE2_COMMON_RXOUTCLK_MUX_1 06_1624 07_1617
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.GTPE2_COMMON_RXOUTCLK_MUX_2 06_1625 07_1616
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.GTPE2_COMMON_RXOUTCLK_MUX_3 06_1624 07_1616
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.GTPE2_COMMON_TXOUTCLK_MUX_0 06_1623 07_1617
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.GTPE2_COMMON_TXOUTCLK_MUX_1 06_1620 07_1617
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.GTPE2_COMMON_TXOUTCLK_MUX_2 06_1623 07_1616
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.GTPE2_COMMON_TXOUTCLK_MUX_3 06_1620 07_1616
|
||||
GTP_COMMON_MID_LEFT.IBUFDS_GTE2.CLKCM_CFG[0] 01_1581
|
||||
GTP_COMMON_MID_LEFT.IBUFDS_GTE2.CLKCM_CFG[1] 00_1582
|
||||
GTP_COMMON_MID_LEFT.IBUFDS_GTE2_Y0.CLKCM_CFG 00_1580
|
||||
|
|
@ -6,6 +175,8 @@ GTP_COMMON_MID_LEFT.IBUFDS_GTE2_Y0.IN_USE 00_1578
|
|||
GTP_COMMON_MID_LEFT.IBUFDS_GTE2_Y1.CLKCM_CFG 01_1580
|
||||
GTP_COMMON_MID_LEFT.IBUFDS_GTE2_Y1.CLKRCV_TRST 01_1576
|
||||
GTP_COMMON_MID_LEFT.IBUFDS_GTE2_Y1.IN_USE 00_1579
|
||||
GTP_COMMON_MID_LEFT.IBUFDS_GTPE2_0_MGTCLKOUT_MUX.IBUFDS_GTPE2_0_MGTCLKOUT 07_1629
|
||||
GTP_COMMON_MID_LEFT.IBUFDS_GTPE2_1_MGTCLKOUT_MUX.IBUFDS_GTPE2_1_MGTCLKOUT 06_1627
|
||||
GTP_COMMON_MID_LEFT.GTPE2.BIAS_CFG[0] 00_1640
|
||||
GTP_COMMON_MID_LEFT.GTPE2.BIAS_CFG[1] 01_1640
|
||||
GTP_COMMON_MID_LEFT.GTPE2.BIAS_CFG[2] 00_1641
|
||||
|
|
@ -70,6 +241,7 @@ GTP_COMMON_MID_LEFT.GTPE2.BIAS_CFG[60] 00_1670
|
|||
GTP_COMMON_MID_LEFT.GTPE2.BIAS_CFG[61] 01_1670
|
||||
GTP_COMMON_MID_LEFT.GTPE2.BIAS_CFG[62] 00_1671
|
||||
GTP_COMMON_MID_LEFT.GTPE2.BIAS_CFG[63] 01_1671
|
||||
GTP_COMMON_MID_LEFT.GTPE2.BOTH_GTREFCLK_USED 01_1439 01_1807
|
||||
GTP_COMMON_MID_LEFT.GTPE2.COMMON_CFG[0] 00_1544
|
||||
GTP_COMMON_MID_LEFT.GTPE2.COMMON_CFG[1] 01_1544
|
||||
GTP_COMMON_MID_LEFT.GTPE2.COMMON_CFG[2] 00_1545
|
||||
|
|
@ -102,9 +274,15 @@ GTP_COMMON_MID_LEFT.GTPE2.COMMON_CFG[28] 00_1558
|
|||
GTP_COMMON_MID_LEFT.GTPE2.COMMON_CFG[29] 01_1558
|
||||
GTP_COMMON_MID_LEFT.GTPE2.COMMON_CFG[30] 00_1559
|
||||
GTP_COMMON_MID_LEFT.GTPE2.COMMON_CFG[31] 01_1559
|
||||
GTP_COMMON_MID_LEFT.GTPE2_COMMON_RXOUTCLK_MUX_0.GTPE2_COMMON_RXOUTCLK_0 06_1628
|
||||
GTP_COMMON_MID_LEFT.GTPE2_COMMON_RXOUTCLK_MUX_1.GTPE2_COMMON_RXOUTCLK_1 07_1627
|
||||
GTP_COMMON_MID_LEFT.GTPE2_COMMON_RXOUTCLK_MUX_2.GTPE2_COMMON_RXOUTCLK_2 07_1630
|
||||
GTP_COMMON_MID_LEFT.GTPE2_COMMON_RXOUTCLK_MUX_3.GTPE2_COMMON_RXOUTCLK_3 06_1630
|
||||
GTP_COMMON_MID_LEFT.GTPE2_COMMON_TXOUTCLK_MUX_0.GTPE2_COMMON_TXOUTCLK_0 06_1629
|
||||
GTP_COMMON_MID_LEFT.GTPE2_COMMON_TXOUTCLK_MUX_1.GTPE2_COMMON_TXOUTCLK_1 07_1628
|
||||
GTP_COMMON_MID_LEFT.GTPE2_COMMON_TXOUTCLK_MUX_2.GTPE2_COMMON_TXOUTCLK_2 07_1631
|
||||
GTP_COMMON_MID_LEFT.GTPE2_COMMON_TXOUTCLK_MUX_3.GTPE2_COMMON_TXOUTCLK_3 06_1631
|
||||
GTP_COMMON_MID_LEFT.GTPE2.IN_USE 00_1584
|
||||
GTP_COMMON_MID_LEFT.GTPE2.INV_GTGREFCLK0 01_1516
|
||||
GTP_COMMON_MID_LEFT.GTPE2.INV_GTGREFCLK1 00_1514
|
||||
GTP_COMMON_MID_LEFT.GTPE2.PLL_CLKOUT_CFG[0] 00_1560
|
||||
GTP_COMMON_MID_LEFT.GTPE2.PLL_CLKOUT_CFG[1] 01_1560
|
||||
GTP_COMMON_MID_LEFT.GTPE2.PLL_CLKOUT_CFG[2] 00_1561
|
||||
|
|
@ -148,6 +326,8 @@ GTP_COMMON_MID_LEFT.GTPE2.RSVD_ATTR1[15] 01_1735
|
|||
GTP_COMMON_MID_LEFT.GTPE2.ZINV_DRPCLK 00_1516
|
||||
GTP_COMMON_MID_LEFT.GTPE2.ZINV_PLL0LOCKDETCLK 01_1512
|
||||
GTP_COMMON_MID_LEFT.GTPE2.ZINV_PLL1LOCKDETCLK 00_1512
|
||||
GTP_COMMON_MID_LEFT.GTPE2.GTREFCLK0_USED 00_1438 00_1806
|
||||
GTP_COMMON_MID_LEFT.GTPE2.GTREFCLK1_USED 01_1438 01_1806
|
||||
GTP_COMMON_MID_LEFT.GTPE2.PLL0_CFG[0] 00_1424
|
||||
GTP_COMMON_MID_LEFT.GTPE2.PLL0_CFG[1] 01_1424
|
||||
GTP_COMMON_MID_LEFT.GTPE2.PLL0_CFG[2] 00_1425
|
||||
|
|
|
|||
|
|
@ -1,3 +1,172 @@
|
|||
GTP_COMMON_MID_LEFT.ENABLE_DRP origin:063-gtp-common-conf 00_1613 01_1613
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.HCLK_GTP_CK_MUX0 origin:065b-gtp-common-pips 02_1614 03_1617 03_1622
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.HCLK_GTP_CK_MUX1 origin:065b-gtp-common-pips 02_1614 02_1622 03_1616
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 02_1615 03_1617
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 02_1615 03_1616
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 02_1615 03_1621
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 02_1615 03_1620
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 02_1614 03_1621
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 02_1614 03_1620
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 02_1615 03_1619
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 02_1615 03_1618
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 02_1614 03_1619
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN0.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 02_1614 03_1618
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.HCLK_GTP_CK_MUX0 origin:065b-gtp-common-pips 02_1617 03_1614 03_1622
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.HCLK_GTP_CK_MUX1 origin:065b-gtp-common-pips 02_1616 02_1622 03_1614
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 02_1617 03_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 02_1616 03_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 02_1621 03_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 02_1620 03_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 02_1621 03_1614
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 02_1620 03_1614
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 02_1619 03_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 02_1618 03_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 02_1619 03_1614
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN1.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 02_1618 03_1614
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.HCLK_GTP_CK_MUX2 origin:065b-gtp-common-pips 02_1624 03_1623 03_1627
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.HCLK_GTP_CK_MUX3 origin:065b-gtp-common-pips 02_1623 02_1624 03_1626
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 02_1625 03_1627
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 02_1625 03_1626
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 02_1625 03_1631
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 02_1625 03_1630
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 02_1624 03_1631
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 02_1624 03_1630
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 02_1625 03_1629
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 02_1625 03_1628
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 02_1624 03_1629
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN2.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 02_1624 03_1628
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.HCLK_GTP_CK_MUX2 origin:065b-gtp-common-pips 02_1627 03_1623 03_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.HCLK_GTP_CK_MUX3 origin:065b-gtp-common-pips 02_1623 02_1626 03_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 02_1627 03_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 02_1626 03_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 02_1631 03_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 02_1630 03_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 02_1631 03_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 02_1630 03_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 02_1629 03_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 02_1628 03_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 02_1629 03_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN3.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 02_1628 03_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.HCLK_GTP_CK_MUX4 origin:065b-gtp-common-pips 00_1614 01_1617 01_1622
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.HCLK_GTP_CK_MUX5 origin:065b-gtp-common-pips 00_1614 00_1622 01_1616
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 00_1615 01_1617
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 00_1615 01_1616
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 00_1615 01_1621
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 00_1615 01_1620
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 00_1614 01_1621
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 00_1614 01_1620
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 00_1615 01_1619
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 00_1615 01_1618
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 00_1614 01_1619
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN4.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 00_1614 01_1618
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.HCLK_GTP_CK_MUX4 origin:065b-gtp-common-pips 00_1617 01_1614 01_1622
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.HCLK_GTP_CK_MUX5 origin:065b-gtp-common-pips 00_1616 00_1622 01_1614
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 00_1617 01_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 00_1616 01_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 00_1621 01_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 00_1620 01_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 00_1621 01_1614
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 00_1620 01_1614
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 00_1619 01_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 00_1618 01_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 00_1619 01_1614
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN5.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 00_1618 01_1614
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.HCLK_GTP_CK_MUX6 origin:065b-gtp-common-pips 00_1624 01_1623 01_1627
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.HCLK_GTP_CK_MUX7 origin:065b-gtp-common-pips 00_1623 00_1624 01_1626
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 00_1625 01_1627
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 00_1625 01_1626
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 00_1625 01_1631
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 00_1625 01_1630
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 00_1624 01_1631
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 00_1624 01_1630
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 00_1625 01_1629
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 00_1625 01_1628
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 00_1624 01_1629
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN6.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 00_1624 01_1628
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.HCLK_GTP_CK_MUX6 origin:065b-gtp-common-pips 00_1627 01_1623 01_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.HCLK_GTP_CK_MUX7 origin:065b-gtp-common-pips 00_1623 00_1626 01_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 00_1627 01_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 00_1626 01_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 00_1631 01_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 00_1630 01_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 00_1631 01_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 00_1630 01_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 00_1629 01_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 00_1628 01_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 00_1629 01_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN7.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 00_1628 01_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.HCLK_GTP_CK_MUX8 origin:065b-gtp-common-pips 04_1614 05_1617 05_1622
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.HCLK_GTP_CK_MUX9 origin:065b-gtp-common-pips 04_1614 04_1622 05_1616
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 04_1615 05_1617
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 04_1615 05_1616
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 04_1615 05_1621
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 04_1615 05_1620
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 04_1614 05_1621
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 04_1614 05_1620
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 04_1615 05_1619
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 04_1615 05_1618
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 04_1614 05_1619
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN8.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 04_1614 05_1618
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.HCLK_GTP_CK_MUX8 origin:065b-gtp-common-pips 04_1617 05_1614 05_1622
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.HCLK_GTP_CK_MUX9 origin:065b-gtp-common-pips 04_1616 04_1622 05_1614
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 04_1617 05_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 04_1616 05_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 04_1621 05_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 04_1620 05_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 04_1621 05_1614
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 04_1620 05_1614
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 04_1619 05_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 04_1618 05_1615
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 04_1619 05_1614
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN9.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 04_1618 05_1614
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.HCLK_GTP_CK_MUX10 origin:065b-gtp-common-pips 04_1624 05_1623 05_1627
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.HCLK_GTP_CK_MUX11 origin:065b-gtp-common-pips 04_1623 04_1624 05_1626
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 04_1625 05_1627
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 04_1625 05_1626
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 04_1625 05_1631
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 04_1625 05_1630
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 04_1624 05_1631
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 04_1624 05_1630
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 04_1625 05_1629
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 04_1625 05_1628
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 04_1624 05_1629
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN10.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 04_1624 05_1628
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.HCLK_GTP_CK_MUX10 origin:065b-gtp-common-pips 04_1627 05_1623 05_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.HCLK_GTP_CK_MUX11 origin:065b-gtp-common-pips 04_1623 04_1626 05_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 04_1627 05_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 04_1626 05_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 04_1631 05_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 04_1630 05_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 04_1631 05_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 04_1630 05_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 04_1629 05_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 04_1628 05_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 04_1629 05_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN11.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 04_1628 05_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.HCLK_GTP_CK_MUX12 origin:065b-gtp-common-pips 06_1616 07_1619 07_1626
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.HCLK_GTP_CK_MUX13 origin:065b-gtp-common-pips 06_1616 06_1626 07_1618
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 06_1617 07_1619
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 06_1617 07_1618
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 06_1617 07_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 06_1617 07_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 06_1616 07_1625
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 06_1616 07_1624
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 06_1617 07_1623
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 06_1617 07_1622
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 06_1616 07_1623
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN12.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 06_1616 07_1622
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.HCLK_GTP_CK_MUX12 origin:065b-gtp-common-pips 06_1619 07_1616 07_1626
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.HCLK_GTP_CK_MUX13 origin:065b-gtp-common-pips 06_1618 06_1626 07_1616
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 06_1619 07_1617
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 06_1618 07_1617
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 06_1625 07_1617
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 06_1624 07_1617
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 06_1625 07_1616
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 06_1624 07_1616
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 06_1623 07_1617
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 06_1620 07_1617
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 06_1623 07_1616
|
||||
GTP_COMMON_MID_LEFT.HCLK_GTP_CK_IN13.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 06_1620 07_1616
|
||||
GTP_COMMON_MID_LEFT.IBUFDS_GTE2.CLKCM_CFG[0] origin:063-gtp-common-conf 01_1581
|
||||
GTP_COMMON_MID_LEFT.IBUFDS_GTE2.CLKCM_CFG[1] origin:063-gtp-common-conf 00_1582
|
||||
GTP_COMMON_MID_LEFT.IBUFDS_GTE2_Y0.CLKCM_CFG origin:063-gtp-common-conf 00_1580
|
||||
|
|
@ -6,6 +175,8 @@ GTP_COMMON_MID_LEFT.IBUFDS_GTE2_Y0.IN_USE origin:063-gtp-common-conf 00_1578
|
|||
GTP_COMMON_MID_LEFT.IBUFDS_GTE2_Y1.CLKCM_CFG origin:063-gtp-common-conf 01_1580
|
||||
GTP_COMMON_MID_LEFT.IBUFDS_GTE2_Y1.CLKRCV_TRST origin:063-gtp-common-conf 01_1576
|
||||
GTP_COMMON_MID_LEFT.IBUFDS_GTE2_Y1.IN_USE origin:063-gtp-common-conf 00_1579
|
||||
GTP_COMMON_MID_LEFT.IBUFDS_GTPE2_0_MGTCLKOUT_MUX.IBUFDS_GTPE2_0_MGTCLKOUT origin:065-gtp-common-pips 07_1629
|
||||
GTP_COMMON_MID_LEFT.IBUFDS_GTPE2_1_MGTCLKOUT_MUX.IBUFDS_GTPE2_1_MGTCLKOUT origin:065-gtp-common-pips 06_1627
|
||||
GTP_COMMON_MID_LEFT.GTPE2.BIAS_CFG[0] origin:063-gtp-common-conf 00_1640
|
||||
GTP_COMMON_MID_LEFT.GTPE2.BIAS_CFG[1] origin:063-gtp-common-conf 01_1640
|
||||
GTP_COMMON_MID_LEFT.GTPE2.BIAS_CFG[2] origin:063-gtp-common-conf 00_1641
|
||||
|
|
@ -70,6 +241,7 @@ GTP_COMMON_MID_LEFT.GTPE2.BIAS_CFG[60] origin:063-gtp-common-conf 00_1670
|
|||
GTP_COMMON_MID_LEFT.GTPE2.BIAS_CFG[61] origin:063-gtp-common-conf 01_1670
|
||||
GTP_COMMON_MID_LEFT.GTPE2.BIAS_CFG[62] origin:063-gtp-common-conf 00_1671
|
||||
GTP_COMMON_MID_LEFT.GTPE2.BIAS_CFG[63] origin:063-gtp-common-conf 01_1671
|
||||
GTP_COMMON_MID_LEFT.GTPE2.BOTH_GTREFCLK_USED origin:063-gtp-common-conf 01_1439 01_1807
|
||||
GTP_COMMON_MID_LEFT.GTPE2.COMMON_CFG[0] origin:063-gtp-common-conf 00_1544
|
||||
GTP_COMMON_MID_LEFT.GTPE2.COMMON_CFG[1] origin:063-gtp-common-conf 01_1544
|
||||
GTP_COMMON_MID_LEFT.GTPE2.COMMON_CFG[2] origin:063-gtp-common-conf 00_1545
|
||||
|
|
@ -102,9 +274,15 @@ GTP_COMMON_MID_LEFT.GTPE2.COMMON_CFG[28] origin:063-gtp-common-conf 00_1558
|
|||
GTP_COMMON_MID_LEFT.GTPE2.COMMON_CFG[29] origin:063-gtp-common-conf 01_1558
|
||||
GTP_COMMON_MID_LEFT.GTPE2.COMMON_CFG[30] origin:063-gtp-common-conf 00_1559
|
||||
GTP_COMMON_MID_LEFT.GTPE2.COMMON_CFG[31] origin:063-gtp-common-conf 01_1559
|
||||
GTP_COMMON_MID_LEFT.GTPE2_COMMON_RXOUTCLK_MUX_0.GTPE2_COMMON_RXOUTCLK_0 origin:065-gtp-common-pips 06_1628
|
||||
GTP_COMMON_MID_LEFT.GTPE2_COMMON_RXOUTCLK_MUX_1.GTPE2_COMMON_RXOUTCLK_1 origin:065-gtp-common-pips 07_1627
|
||||
GTP_COMMON_MID_LEFT.GTPE2_COMMON_RXOUTCLK_MUX_2.GTPE2_COMMON_RXOUTCLK_2 origin:065-gtp-common-pips 07_1630
|
||||
GTP_COMMON_MID_LEFT.GTPE2_COMMON_RXOUTCLK_MUX_3.GTPE2_COMMON_RXOUTCLK_3 origin:065-gtp-common-pips 06_1630
|
||||
GTP_COMMON_MID_LEFT.GTPE2_COMMON_TXOUTCLK_MUX_0.GTPE2_COMMON_TXOUTCLK_0 origin:065-gtp-common-pips 06_1629
|
||||
GTP_COMMON_MID_LEFT.GTPE2_COMMON_TXOUTCLK_MUX_1.GTPE2_COMMON_TXOUTCLK_1 origin:065-gtp-common-pips 07_1628
|
||||
GTP_COMMON_MID_LEFT.GTPE2_COMMON_TXOUTCLK_MUX_2.GTPE2_COMMON_TXOUTCLK_2 origin:065-gtp-common-pips 07_1631
|
||||
GTP_COMMON_MID_LEFT.GTPE2_COMMON_TXOUTCLK_MUX_3.GTPE2_COMMON_TXOUTCLK_3 origin:065-gtp-common-pips 06_1631
|
||||
GTP_COMMON_MID_LEFT.GTPE2.IN_USE origin:063-gtp-common-conf 00_1584
|
||||
GTP_COMMON_MID_LEFT.GTPE2.INV_GTGREFCLK0 origin:063-gtp-common-conf 01_1516
|
||||
GTP_COMMON_MID_LEFT.GTPE2.INV_GTGREFCLK1 origin:063-gtp-common-conf 00_1514
|
||||
GTP_COMMON_MID_LEFT.GTPE2.PLL_CLKOUT_CFG[0] origin:063-gtp-common-conf 00_1560
|
||||
GTP_COMMON_MID_LEFT.GTPE2.PLL_CLKOUT_CFG[1] origin:063-gtp-common-conf 01_1560
|
||||
GTP_COMMON_MID_LEFT.GTPE2.PLL_CLKOUT_CFG[2] origin:063-gtp-common-conf 00_1561
|
||||
|
|
@ -148,6 +326,8 @@ GTP_COMMON_MID_LEFT.GTPE2.RSVD_ATTR1[15] origin:063-gtp-common-conf 01_1735
|
|||
GTP_COMMON_MID_LEFT.GTPE2.ZINV_DRPCLK origin:063-gtp-common-conf 00_1516
|
||||
GTP_COMMON_MID_LEFT.GTPE2.ZINV_PLL0LOCKDETCLK origin:063-gtp-common-conf 01_1512
|
||||
GTP_COMMON_MID_LEFT.GTPE2.ZINV_PLL1LOCKDETCLK origin:063-gtp-common-conf 00_1512
|
||||
GTP_COMMON_MID_LEFT.GTPE2.GTREFCLK0_USED origin:063-gtp-common-conf 00_1438 00_1806
|
||||
GTP_COMMON_MID_LEFT.GTPE2.GTREFCLK1_USED origin:063-gtp-common-conf 01_1438 01_1806
|
||||
GTP_COMMON_MID_LEFT.GTPE2.PLL0_CFG[0] origin:063-gtp-common-conf 00_1424
|
||||
GTP_COMMON_MID_LEFT.GTPE2.PLL0_CFG[1] origin:063-gtp-common-conf 01_1424
|
||||
GTP_COMMON_MID_LEFT.GTPE2.PLL0_CFG[2] origin:063-gtp-common-conf 00_1425
|
||||
|
|
|
|||
|
|
@ -1,3 +1,172 @@
|
|||
GTP_COMMON_MID_RIGHT.ENABLE_DRP 00_1613 01_1613
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.HCLK_GTP_CK_MUX0 02_1614 03_1617 03_1622
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.HCLK_GTP_CK_MUX1 02_1614 02_1622 03_1616
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 02_1615 03_1617
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 02_1615 03_1616
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.GTPE2_COMMON_RXOUTCLK_MUX_0 02_1615 03_1621
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.GTPE2_COMMON_RXOUTCLK_MUX_1 02_1615 03_1620
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.GTPE2_COMMON_RXOUTCLK_MUX_2 02_1614 03_1621
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.GTPE2_COMMON_RXOUTCLK_MUX_3 02_1614 03_1620
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.GTPE2_COMMON_TXOUTCLK_MUX_0 02_1615 03_1619
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.GTPE2_COMMON_TXOUTCLK_MUX_1 02_1615 03_1618
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.GTPE2_COMMON_TXOUTCLK_MUX_2 02_1614 03_1619
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.GTPE2_COMMON_TXOUTCLK_MUX_3 02_1614 03_1618
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.HCLK_GTP_CK_MUX0 02_1617 03_1614 03_1622
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.HCLK_GTP_CK_MUX1 02_1616 02_1622 03_1614
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 02_1617 03_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 02_1616 03_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.GTPE2_COMMON_RXOUTCLK_MUX_0 02_1621 03_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.GTPE2_COMMON_RXOUTCLK_MUX_1 02_1620 03_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.GTPE2_COMMON_RXOUTCLK_MUX_2 02_1621 03_1614
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.GTPE2_COMMON_RXOUTCLK_MUX_3 02_1620 03_1614
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.GTPE2_COMMON_TXOUTCLK_MUX_0 02_1619 03_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.GTPE2_COMMON_TXOUTCLK_MUX_1 02_1618 03_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.GTPE2_COMMON_TXOUTCLK_MUX_2 02_1619 03_1614
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.GTPE2_COMMON_TXOUTCLK_MUX_3 02_1618 03_1614
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.HCLK_GTP_CK_MUX2 02_1624 03_1623 03_1627
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.HCLK_GTP_CK_MUX3 02_1623 02_1624 03_1626
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 02_1625 03_1627
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 02_1625 03_1626
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.GTPE2_COMMON_RXOUTCLK_MUX_0 02_1625 03_1631
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.GTPE2_COMMON_RXOUTCLK_MUX_1 02_1625 03_1630
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.GTPE2_COMMON_RXOUTCLK_MUX_2 02_1624 03_1631
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.GTPE2_COMMON_RXOUTCLK_MUX_3 02_1624 03_1630
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.GTPE2_COMMON_TXOUTCLK_MUX_0 02_1625 03_1629
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.GTPE2_COMMON_TXOUTCLK_MUX_1 02_1625 03_1628
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.GTPE2_COMMON_TXOUTCLK_MUX_2 02_1624 03_1629
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.GTPE2_COMMON_TXOUTCLK_MUX_3 02_1624 03_1628
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.HCLK_GTP_CK_MUX2 02_1627 03_1623 03_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.HCLK_GTP_CK_MUX3 02_1623 02_1626 03_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 02_1627 03_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 02_1626 03_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.GTPE2_COMMON_RXOUTCLK_MUX_0 02_1631 03_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.GTPE2_COMMON_RXOUTCLK_MUX_1 02_1630 03_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.GTPE2_COMMON_RXOUTCLK_MUX_2 02_1631 03_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.GTPE2_COMMON_RXOUTCLK_MUX_3 02_1630 03_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.GTPE2_COMMON_TXOUTCLK_MUX_0 02_1629 03_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.GTPE2_COMMON_TXOUTCLK_MUX_1 02_1628 03_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.GTPE2_COMMON_TXOUTCLK_MUX_2 02_1629 03_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.GTPE2_COMMON_TXOUTCLK_MUX_3 02_1628 03_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.HCLK_GTP_CK_MUX4 00_1614 01_1617 01_1622
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.HCLK_GTP_CK_MUX5 00_1614 00_1622 01_1616
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 00_1615 01_1617
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 00_1615 01_1616
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.GTPE2_COMMON_RXOUTCLK_MUX_0 00_1615 01_1621
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.GTPE2_COMMON_RXOUTCLK_MUX_1 00_1615 01_1620
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.GTPE2_COMMON_RXOUTCLK_MUX_2 00_1614 01_1621
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.GTPE2_COMMON_RXOUTCLK_MUX_3 00_1614 01_1620
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.GTPE2_COMMON_TXOUTCLK_MUX_0 00_1615 01_1619
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.GTPE2_COMMON_TXOUTCLK_MUX_1 00_1615 01_1618
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.GTPE2_COMMON_TXOUTCLK_MUX_2 00_1614 01_1619
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.GTPE2_COMMON_TXOUTCLK_MUX_3 00_1614 01_1618
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.HCLK_GTP_CK_MUX4 00_1617 01_1614 01_1622
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.HCLK_GTP_CK_MUX5 00_1616 00_1622 01_1614
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 00_1617 01_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 00_1616 01_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.GTPE2_COMMON_RXOUTCLK_MUX_0 00_1621 01_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.GTPE2_COMMON_RXOUTCLK_MUX_1 00_1620 01_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.GTPE2_COMMON_RXOUTCLK_MUX_2 00_1621 01_1614
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.GTPE2_COMMON_RXOUTCLK_MUX_3 00_1620 01_1614
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.GTPE2_COMMON_TXOUTCLK_MUX_0 00_1619 01_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.GTPE2_COMMON_TXOUTCLK_MUX_1 00_1618 01_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.GTPE2_COMMON_TXOUTCLK_MUX_2 00_1619 01_1614
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.GTPE2_COMMON_TXOUTCLK_MUX_3 00_1618 01_1614
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.HCLK_GTP_CK_MUX6 00_1624 01_1623 01_1627
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.HCLK_GTP_CK_MUX7 00_1623 00_1624 01_1626
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 00_1625 01_1627
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 00_1625 01_1626
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.GTPE2_COMMON_RXOUTCLK_MUX_0 00_1625 01_1631
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.GTPE2_COMMON_RXOUTCLK_MUX_1 00_1625 01_1630
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.GTPE2_COMMON_RXOUTCLK_MUX_2 00_1624 01_1631
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.GTPE2_COMMON_RXOUTCLK_MUX_3 00_1624 01_1630
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.GTPE2_COMMON_TXOUTCLK_MUX_0 00_1625 01_1629
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.GTPE2_COMMON_TXOUTCLK_MUX_1 00_1625 01_1628
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.GTPE2_COMMON_TXOUTCLK_MUX_2 00_1624 01_1629
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.GTPE2_COMMON_TXOUTCLK_MUX_3 00_1624 01_1628
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.HCLK_GTP_CK_MUX6 00_1627 01_1623 01_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.HCLK_GTP_CK_MUX7 00_1623 00_1626 01_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 00_1627 01_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 00_1626 01_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.GTPE2_COMMON_RXOUTCLK_MUX_0 00_1631 01_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.GTPE2_COMMON_RXOUTCLK_MUX_1 00_1630 01_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.GTPE2_COMMON_RXOUTCLK_MUX_2 00_1631 01_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.GTPE2_COMMON_RXOUTCLK_MUX_3 00_1630 01_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.GTPE2_COMMON_TXOUTCLK_MUX_0 00_1629 01_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.GTPE2_COMMON_TXOUTCLK_MUX_1 00_1628 01_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.GTPE2_COMMON_TXOUTCLK_MUX_2 00_1629 01_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.GTPE2_COMMON_TXOUTCLK_MUX_3 00_1628 01_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.HCLK_GTP_CK_MUX8 04_1614 05_1617 05_1622
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.HCLK_GTP_CK_MUX9 04_1614 04_1622 05_1616
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 04_1615 05_1617
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 04_1615 05_1616
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.GTPE2_COMMON_RXOUTCLK_MUX_0 04_1615 05_1621
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.GTPE2_COMMON_RXOUTCLK_MUX_1 04_1615 05_1620
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.GTPE2_COMMON_RXOUTCLK_MUX_2 04_1614 05_1621
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.GTPE2_COMMON_RXOUTCLK_MUX_3 04_1614 05_1620
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.GTPE2_COMMON_TXOUTCLK_MUX_0 04_1615 05_1619
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.GTPE2_COMMON_TXOUTCLK_MUX_1 04_1615 05_1618
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.GTPE2_COMMON_TXOUTCLK_MUX_2 04_1614 05_1619
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.GTPE2_COMMON_TXOUTCLK_MUX_3 04_1614 05_1618
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.HCLK_GTP_CK_MUX8 04_1617 05_1614 05_1622
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.HCLK_GTP_CK_MUX9 04_1616 04_1622 05_1614
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 04_1617 05_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 04_1616 05_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.GTPE2_COMMON_RXOUTCLK_MUX_0 04_1621 05_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.GTPE2_COMMON_RXOUTCLK_MUX_1 04_1620 05_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.GTPE2_COMMON_RXOUTCLK_MUX_2 04_1621 05_1614
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.GTPE2_COMMON_RXOUTCLK_MUX_3 04_1620 05_1614
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.GTPE2_COMMON_TXOUTCLK_MUX_0 04_1619 05_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.GTPE2_COMMON_TXOUTCLK_MUX_1 04_1618 05_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.GTPE2_COMMON_TXOUTCLK_MUX_2 04_1619 05_1614
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.GTPE2_COMMON_TXOUTCLK_MUX_3 04_1618 05_1614
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.HCLK_GTP_CK_MUX10 04_1624 05_1623 05_1627
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.HCLK_GTP_CK_MUX11 04_1623 04_1624 05_1626
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 04_1625 05_1627
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 04_1625 05_1626
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.GTPE2_COMMON_RXOUTCLK_MUX_0 04_1625 05_1631
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.GTPE2_COMMON_RXOUTCLK_MUX_1 04_1625 05_1630
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.GTPE2_COMMON_RXOUTCLK_MUX_2 04_1624 05_1631
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.GTPE2_COMMON_RXOUTCLK_MUX_3 04_1624 05_1630
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.GTPE2_COMMON_TXOUTCLK_MUX_0 04_1625 05_1629
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.GTPE2_COMMON_TXOUTCLK_MUX_1 04_1625 05_1628
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.GTPE2_COMMON_TXOUTCLK_MUX_2 04_1624 05_1629
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.GTPE2_COMMON_TXOUTCLK_MUX_3 04_1624 05_1628
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.HCLK_GTP_CK_MUX10 04_1627 05_1623 05_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.HCLK_GTP_CK_MUX11 04_1623 04_1626 05_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 04_1627 05_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 04_1626 05_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.GTPE2_COMMON_RXOUTCLK_MUX_0 04_1631 05_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.GTPE2_COMMON_RXOUTCLK_MUX_1 04_1630 05_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.GTPE2_COMMON_RXOUTCLK_MUX_2 04_1631 05_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.GTPE2_COMMON_RXOUTCLK_MUX_3 04_1630 05_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.GTPE2_COMMON_TXOUTCLK_MUX_0 04_1629 05_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.GTPE2_COMMON_TXOUTCLK_MUX_1 04_1628 05_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.GTPE2_COMMON_TXOUTCLK_MUX_2 04_1629 05_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.GTPE2_COMMON_TXOUTCLK_MUX_3 04_1628 05_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.HCLK_GTP_CK_MUX12 06_1616 07_1619 07_1626
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.HCLK_GTP_CK_MUX13 06_1616 06_1626 07_1618
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 06_1617 07_1619
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 06_1617 07_1618
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.GTPE2_COMMON_RXOUTCLK_MUX_0 06_1617 07_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.GTPE2_COMMON_RXOUTCLK_MUX_1 06_1617 07_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.GTPE2_COMMON_RXOUTCLK_MUX_2 06_1616 07_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.GTPE2_COMMON_RXOUTCLK_MUX_3 06_1616 07_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.GTPE2_COMMON_TXOUTCLK_MUX_0 06_1617 07_1623
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.GTPE2_COMMON_TXOUTCLK_MUX_1 06_1617 07_1622
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.GTPE2_COMMON_TXOUTCLK_MUX_2 06_1616 07_1623
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.GTPE2_COMMON_TXOUTCLK_MUX_3 06_1616 07_1622
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.HCLK_GTP_CK_MUX12 06_1619 07_1616 07_1626
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.HCLK_GTP_CK_MUX13 06_1618 06_1626 07_1616
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.IBUFDS_GTPE2_0_MGTCLKOUT_MUX 06_1619 07_1617
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.IBUFDS_GTPE2_1_MGTCLKOUT_MUX 06_1618 07_1617
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.GTPE2_COMMON_RXOUTCLK_MUX_0 06_1625 07_1617
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.GTPE2_COMMON_RXOUTCLK_MUX_1 06_1624 07_1617
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.GTPE2_COMMON_RXOUTCLK_MUX_2 06_1625 07_1616
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.GTPE2_COMMON_RXOUTCLK_MUX_3 06_1624 07_1616
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.GTPE2_COMMON_TXOUTCLK_MUX_0 06_1623 07_1617
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.GTPE2_COMMON_TXOUTCLK_MUX_1 06_1620 07_1617
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.GTPE2_COMMON_TXOUTCLK_MUX_2 06_1623 07_1616
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.GTPE2_COMMON_TXOUTCLK_MUX_3 06_1620 07_1616
|
||||
GTP_COMMON_MID_RIGHT.IBUFDS_GTE2.CLKCM_CFG[0] 01_1581
|
||||
GTP_COMMON_MID_RIGHT.IBUFDS_GTE2.CLKCM_CFG[1] 00_1582
|
||||
GTP_COMMON_MID_RIGHT.IBUFDS_GTE2_Y0.CLKCM_CFG 00_1580
|
||||
|
|
@ -6,6 +175,8 @@ GTP_COMMON_MID_RIGHT.IBUFDS_GTE2_Y0.IN_USE 00_1578
|
|||
GTP_COMMON_MID_RIGHT.IBUFDS_GTE2_Y1.CLKCM_CFG 01_1580
|
||||
GTP_COMMON_MID_RIGHT.IBUFDS_GTE2_Y1.CLKRCV_TRST 01_1576
|
||||
GTP_COMMON_MID_RIGHT.IBUFDS_GTE2_Y1.IN_USE 00_1579
|
||||
GTP_COMMON_MID_RIGHT.IBUFDS_GTPE2_0_MGTCLKOUT_MUX.IBUFDS_GTPE2_0_MGTCLKOUT 07_1629
|
||||
GTP_COMMON_MID_RIGHT.IBUFDS_GTPE2_1_MGTCLKOUT_MUX.IBUFDS_GTPE2_1_MGTCLKOUT 06_1627
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.BIAS_CFG[0] 00_1640
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.BIAS_CFG[1] 01_1640
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.BIAS_CFG[2] 00_1641
|
||||
|
|
@ -70,6 +241,7 @@ GTP_COMMON_MID_RIGHT.GTPE2.BIAS_CFG[60] 00_1670
|
|||
GTP_COMMON_MID_RIGHT.GTPE2.BIAS_CFG[61] 01_1670
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.BIAS_CFG[62] 00_1671
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.BIAS_CFG[63] 01_1671
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.BOTH_GTREFCLK_USED 01_1439 01_1807
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.COMMON_CFG[0] 00_1544
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.COMMON_CFG[1] 01_1544
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.COMMON_CFG[2] 00_1545
|
||||
|
|
@ -102,9 +274,15 @@ GTP_COMMON_MID_RIGHT.GTPE2.COMMON_CFG[28] 00_1558
|
|||
GTP_COMMON_MID_RIGHT.GTPE2.COMMON_CFG[29] 01_1558
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.COMMON_CFG[30] 00_1559
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.COMMON_CFG[31] 01_1559
|
||||
GTP_COMMON_MID_RIGHT.GTPE2_COMMON_RXOUTCLK_MUX_0.GTPE2_COMMON_RXOUTCLK_0 06_1628
|
||||
GTP_COMMON_MID_RIGHT.GTPE2_COMMON_RXOUTCLK_MUX_1.GTPE2_COMMON_RXOUTCLK_1 07_1627
|
||||
GTP_COMMON_MID_RIGHT.GTPE2_COMMON_RXOUTCLK_MUX_2.GTPE2_COMMON_RXOUTCLK_2 07_1630
|
||||
GTP_COMMON_MID_RIGHT.GTPE2_COMMON_RXOUTCLK_MUX_3.GTPE2_COMMON_RXOUTCLK_3 06_1630
|
||||
GTP_COMMON_MID_RIGHT.GTPE2_COMMON_TXOUTCLK_MUX_0.GTPE2_COMMON_TXOUTCLK_0 06_1629
|
||||
GTP_COMMON_MID_RIGHT.GTPE2_COMMON_TXOUTCLK_MUX_1.GTPE2_COMMON_TXOUTCLK_1 07_1628
|
||||
GTP_COMMON_MID_RIGHT.GTPE2_COMMON_TXOUTCLK_MUX_2.GTPE2_COMMON_TXOUTCLK_2 07_1631
|
||||
GTP_COMMON_MID_RIGHT.GTPE2_COMMON_TXOUTCLK_MUX_3.GTPE2_COMMON_TXOUTCLK_3 06_1631
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.IN_USE 00_1584
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.INV_GTGREFCLK0 01_1516
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.INV_GTGREFCLK1 00_1514
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.PLL_CLKOUT_CFG[0] 00_1560
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.PLL_CLKOUT_CFG[1] 01_1560
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.PLL_CLKOUT_CFG[2] 00_1561
|
||||
|
|
@ -148,6 +326,8 @@ GTP_COMMON_MID_RIGHT.GTPE2.RSVD_ATTR1[15] 01_1735
|
|||
GTP_COMMON_MID_RIGHT.GTPE2.ZINV_DRPCLK 00_1516
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.ZINV_PLL0LOCKDETCLK 01_1512
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.ZINV_PLL1LOCKDETCLK 00_1512
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.GTREFCLK0_USED 00_1438 00_1806
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.GTREFCLK1_USED 01_1438 01_1806
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.PLL0_CFG[0] 00_1424
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.PLL0_CFG[1] 01_1424
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.PLL0_CFG[2] 00_1425
|
||||
|
|
|
|||
|
|
@ -1,3 +1,172 @@
|
|||
GTP_COMMON_MID_RIGHT.ENABLE_DRP origin:063-gtp-common-conf 00_1613 01_1613
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.HCLK_GTP_CK_MUX0 origin:065b-gtp-common-pips 02_1614 03_1617 03_1622
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.HCLK_GTP_CK_MUX1 origin:065b-gtp-common-pips 02_1614 02_1622 03_1616
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 02_1615 03_1617
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 02_1615 03_1616
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 02_1615 03_1621
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 02_1615 03_1620
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 02_1614 03_1621
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 02_1614 03_1620
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 02_1615 03_1619
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 02_1615 03_1618
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 02_1614 03_1619
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN0.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 02_1614 03_1618
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.HCLK_GTP_CK_MUX0 origin:065b-gtp-common-pips 02_1617 03_1614 03_1622
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.HCLK_GTP_CK_MUX1 origin:065b-gtp-common-pips 02_1616 02_1622 03_1614
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 02_1617 03_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 02_1616 03_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 02_1621 03_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 02_1620 03_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 02_1621 03_1614
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 02_1620 03_1614
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 02_1619 03_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 02_1618 03_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 02_1619 03_1614
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN1.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 02_1618 03_1614
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.HCLK_GTP_CK_MUX2 origin:065b-gtp-common-pips 02_1624 03_1623 03_1627
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.HCLK_GTP_CK_MUX3 origin:065b-gtp-common-pips 02_1623 02_1624 03_1626
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 02_1625 03_1627
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 02_1625 03_1626
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 02_1625 03_1631
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 02_1625 03_1630
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 02_1624 03_1631
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 02_1624 03_1630
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 02_1625 03_1629
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 02_1625 03_1628
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 02_1624 03_1629
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN2.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 02_1624 03_1628
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.HCLK_GTP_CK_MUX2 origin:065b-gtp-common-pips 02_1627 03_1623 03_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.HCLK_GTP_CK_MUX3 origin:065b-gtp-common-pips 02_1623 02_1626 03_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 02_1627 03_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 02_1626 03_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 02_1631 03_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 02_1630 03_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 02_1631 03_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 02_1630 03_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 02_1629 03_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 02_1628 03_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 02_1629 03_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN3.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 02_1628 03_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.HCLK_GTP_CK_MUX4 origin:065b-gtp-common-pips 00_1614 01_1617 01_1622
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.HCLK_GTP_CK_MUX5 origin:065b-gtp-common-pips 00_1614 00_1622 01_1616
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 00_1615 01_1617
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 00_1615 01_1616
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 00_1615 01_1621
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 00_1615 01_1620
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 00_1614 01_1621
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 00_1614 01_1620
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 00_1615 01_1619
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 00_1615 01_1618
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 00_1614 01_1619
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN4.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 00_1614 01_1618
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.HCLK_GTP_CK_MUX4 origin:065b-gtp-common-pips 00_1617 01_1614 01_1622
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.HCLK_GTP_CK_MUX5 origin:065b-gtp-common-pips 00_1616 00_1622 01_1614
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 00_1617 01_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 00_1616 01_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 00_1621 01_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 00_1620 01_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 00_1621 01_1614
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 00_1620 01_1614
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 00_1619 01_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 00_1618 01_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 00_1619 01_1614
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN5.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 00_1618 01_1614
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.HCLK_GTP_CK_MUX6 origin:065b-gtp-common-pips 00_1624 01_1623 01_1627
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.HCLK_GTP_CK_MUX7 origin:065b-gtp-common-pips 00_1623 00_1624 01_1626
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 00_1625 01_1627
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 00_1625 01_1626
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 00_1625 01_1631
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 00_1625 01_1630
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 00_1624 01_1631
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 00_1624 01_1630
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 00_1625 01_1629
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 00_1625 01_1628
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 00_1624 01_1629
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN6.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 00_1624 01_1628
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.HCLK_GTP_CK_MUX6 origin:065b-gtp-common-pips 00_1627 01_1623 01_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.HCLK_GTP_CK_MUX7 origin:065b-gtp-common-pips 00_1623 00_1626 01_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 00_1627 01_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 00_1626 01_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 00_1631 01_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 00_1630 01_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 00_1631 01_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 00_1630 01_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 00_1629 01_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 00_1628 01_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 00_1629 01_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN7.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 00_1628 01_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.HCLK_GTP_CK_MUX8 origin:065b-gtp-common-pips 04_1614 05_1617 05_1622
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.HCLK_GTP_CK_MUX9 origin:065b-gtp-common-pips 04_1614 04_1622 05_1616
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 04_1615 05_1617
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 04_1615 05_1616
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 04_1615 05_1621
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 04_1615 05_1620
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 04_1614 05_1621
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 04_1614 05_1620
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 04_1615 05_1619
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 04_1615 05_1618
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 04_1614 05_1619
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN8.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 04_1614 05_1618
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.HCLK_GTP_CK_MUX8 origin:065b-gtp-common-pips 04_1617 05_1614 05_1622
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.HCLK_GTP_CK_MUX9 origin:065b-gtp-common-pips 04_1616 04_1622 05_1614
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 04_1617 05_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 04_1616 05_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 04_1621 05_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 04_1620 05_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 04_1621 05_1614
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 04_1620 05_1614
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 04_1619 05_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 04_1618 05_1615
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 04_1619 05_1614
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN9.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 04_1618 05_1614
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.HCLK_GTP_CK_MUX10 origin:065b-gtp-common-pips 04_1624 05_1623 05_1627
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.HCLK_GTP_CK_MUX11 origin:065b-gtp-common-pips 04_1623 04_1624 05_1626
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 04_1625 05_1627
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 04_1625 05_1626
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 04_1625 05_1631
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 04_1625 05_1630
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 04_1624 05_1631
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 04_1624 05_1630
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 04_1625 05_1629
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 04_1625 05_1628
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 04_1624 05_1629
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN10.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 04_1624 05_1628
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.HCLK_GTP_CK_MUX10 origin:065b-gtp-common-pips 04_1627 05_1623 05_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.HCLK_GTP_CK_MUX11 origin:065b-gtp-common-pips 04_1623 04_1626 05_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 04_1627 05_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 04_1626 05_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 04_1631 05_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 04_1630 05_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 04_1631 05_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 04_1630 05_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 04_1629 05_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 04_1628 05_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 04_1629 05_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN11.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 04_1628 05_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.HCLK_GTP_CK_MUX12 origin:065b-gtp-common-pips 06_1616 07_1619 07_1626
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.HCLK_GTP_CK_MUX13 origin:065b-gtp-common-pips 06_1616 06_1626 07_1618
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 06_1617 07_1619
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 06_1617 07_1618
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 06_1617 07_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 06_1617 07_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 06_1616 07_1625
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 06_1616 07_1624
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 06_1617 07_1623
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 06_1617 07_1622
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 06_1616 07_1623
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN12.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 06_1616 07_1622
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.HCLK_GTP_CK_MUX12 origin:065b-gtp-common-pips 06_1619 07_1616 07_1626
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.HCLK_GTP_CK_MUX13 origin:065b-gtp-common-pips 06_1618 06_1626 07_1616
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.IBUFDS_GTPE2_0_MGTCLKOUT_MUX origin:065-gtp-common-pips 06_1619 07_1617
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.IBUFDS_GTPE2_1_MGTCLKOUT_MUX origin:065-gtp-common-pips 06_1618 07_1617
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.GTPE2_COMMON_RXOUTCLK_MUX_0 origin:065-gtp-common-pips 06_1625 07_1617
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.GTPE2_COMMON_RXOUTCLK_MUX_1 origin:065-gtp-common-pips 06_1624 07_1617
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.GTPE2_COMMON_RXOUTCLK_MUX_2 origin:065-gtp-common-pips 06_1625 07_1616
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.GTPE2_COMMON_RXOUTCLK_MUX_3 origin:065-gtp-common-pips 06_1624 07_1616
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.GTPE2_COMMON_TXOUTCLK_MUX_0 origin:065-gtp-common-pips 06_1623 07_1617
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.GTPE2_COMMON_TXOUTCLK_MUX_1 origin:065-gtp-common-pips 06_1620 07_1617
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.GTPE2_COMMON_TXOUTCLK_MUX_2 origin:065-gtp-common-pips 06_1623 07_1616
|
||||
GTP_COMMON_MID_RIGHT.HCLK_GTP_CK_IN13.GTPE2_COMMON_TXOUTCLK_MUX_3 origin:065-gtp-common-pips 06_1620 07_1616
|
||||
GTP_COMMON_MID_RIGHT.IBUFDS_GTE2.CLKCM_CFG[0] origin:063-gtp-common-conf 01_1581
|
||||
GTP_COMMON_MID_RIGHT.IBUFDS_GTE2.CLKCM_CFG[1] origin:063-gtp-common-conf 00_1582
|
||||
GTP_COMMON_MID_RIGHT.IBUFDS_GTE2_Y0.CLKCM_CFG origin:063-gtp-common-conf 00_1580
|
||||
|
|
@ -6,6 +175,8 @@ GTP_COMMON_MID_RIGHT.IBUFDS_GTE2_Y0.IN_USE origin:063-gtp-common-conf 00_1578
|
|||
GTP_COMMON_MID_RIGHT.IBUFDS_GTE2_Y1.CLKCM_CFG origin:063-gtp-common-conf 01_1580
|
||||
GTP_COMMON_MID_RIGHT.IBUFDS_GTE2_Y1.CLKRCV_TRST origin:063-gtp-common-conf 01_1576
|
||||
GTP_COMMON_MID_RIGHT.IBUFDS_GTE2_Y1.IN_USE origin:063-gtp-common-conf 00_1579
|
||||
GTP_COMMON_MID_RIGHT.IBUFDS_GTPE2_0_MGTCLKOUT_MUX.IBUFDS_GTPE2_0_MGTCLKOUT origin:065-gtp-common-pips 07_1629
|
||||
GTP_COMMON_MID_RIGHT.IBUFDS_GTPE2_1_MGTCLKOUT_MUX.IBUFDS_GTPE2_1_MGTCLKOUT origin:065-gtp-common-pips 06_1627
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.BIAS_CFG[0] origin:063-gtp-common-conf 00_1640
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.BIAS_CFG[1] origin:063-gtp-common-conf 01_1640
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.BIAS_CFG[2] origin:063-gtp-common-conf 00_1641
|
||||
|
|
@ -70,6 +241,7 @@ GTP_COMMON_MID_RIGHT.GTPE2.BIAS_CFG[60] origin:063-gtp-common-conf 00_1670
|
|||
GTP_COMMON_MID_RIGHT.GTPE2.BIAS_CFG[61] origin:063-gtp-common-conf 01_1670
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.BIAS_CFG[62] origin:063-gtp-common-conf 00_1671
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.BIAS_CFG[63] origin:063-gtp-common-conf 01_1671
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.BOTH_GTREFCLK_USED origin:063-gtp-common-conf 01_1439 01_1807
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.COMMON_CFG[0] origin:063-gtp-common-conf 00_1544
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.COMMON_CFG[1] origin:063-gtp-common-conf 01_1544
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.COMMON_CFG[2] origin:063-gtp-common-conf 00_1545
|
||||
|
|
@ -102,9 +274,15 @@ GTP_COMMON_MID_RIGHT.GTPE2.COMMON_CFG[28] origin:063-gtp-common-conf 00_1558
|
|||
GTP_COMMON_MID_RIGHT.GTPE2.COMMON_CFG[29] origin:063-gtp-common-conf 01_1558
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.COMMON_CFG[30] origin:063-gtp-common-conf 00_1559
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.COMMON_CFG[31] origin:063-gtp-common-conf 01_1559
|
||||
GTP_COMMON_MID_RIGHT.GTPE2_COMMON_RXOUTCLK_MUX_0.GTPE2_COMMON_RXOUTCLK_0 origin:065-gtp-common-pips 06_1628
|
||||
GTP_COMMON_MID_RIGHT.GTPE2_COMMON_RXOUTCLK_MUX_1.GTPE2_COMMON_RXOUTCLK_1 origin:065-gtp-common-pips 07_1627
|
||||
GTP_COMMON_MID_RIGHT.GTPE2_COMMON_RXOUTCLK_MUX_2.GTPE2_COMMON_RXOUTCLK_2 origin:065-gtp-common-pips 07_1630
|
||||
GTP_COMMON_MID_RIGHT.GTPE2_COMMON_RXOUTCLK_MUX_3.GTPE2_COMMON_RXOUTCLK_3 origin:065-gtp-common-pips 06_1630
|
||||
GTP_COMMON_MID_RIGHT.GTPE2_COMMON_TXOUTCLK_MUX_0.GTPE2_COMMON_TXOUTCLK_0 origin:065-gtp-common-pips 06_1629
|
||||
GTP_COMMON_MID_RIGHT.GTPE2_COMMON_TXOUTCLK_MUX_1.GTPE2_COMMON_TXOUTCLK_1 origin:065-gtp-common-pips 07_1628
|
||||
GTP_COMMON_MID_RIGHT.GTPE2_COMMON_TXOUTCLK_MUX_2.GTPE2_COMMON_TXOUTCLK_2 origin:065-gtp-common-pips 07_1631
|
||||
GTP_COMMON_MID_RIGHT.GTPE2_COMMON_TXOUTCLK_MUX_3.GTPE2_COMMON_TXOUTCLK_3 origin:065-gtp-common-pips 06_1631
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.IN_USE origin:063-gtp-common-conf 00_1584
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.INV_GTGREFCLK0 origin:063-gtp-common-conf 01_1516
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.INV_GTGREFCLK1 origin:063-gtp-common-conf 00_1514
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.PLL_CLKOUT_CFG[0] origin:063-gtp-common-conf 00_1560
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.PLL_CLKOUT_CFG[1] origin:063-gtp-common-conf 01_1560
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.PLL_CLKOUT_CFG[2] origin:063-gtp-common-conf 00_1561
|
||||
|
|
@ -148,6 +326,8 @@ GTP_COMMON_MID_RIGHT.GTPE2.RSVD_ATTR1[15] origin:063-gtp-common-conf 01_1735
|
|||
GTP_COMMON_MID_RIGHT.GTPE2.ZINV_DRPCLK origin:063-gtp-common-conf 00_1516
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.ZINV_PLL0LOCKDETCLK origin:063-gtp-common-conf 01_1512
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.ZINV_PLL1LOCKDETCLK origin:063-gtp-common-conf 00_1512
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.GTREFCLK0_USED origin:063-gtp-common-conf 00_1438 00_1806
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.GTREFCLK1_USED origin:063-gtp-common-conf 01_1438 01_1806
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.PLL0_CFG[0] origin:063-gtp-common-conf 00_1424
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.PLL0_CFG[1] origin:063-gtp-common-conf 01_1424
|
||||
GTP_COMMON_MID_RIGHT.GTPE2.PLL0_CFG[2] origin:063-gtp-common-conf 00_1425
|
||||
|
|
|
|||
|
|
@ -0,0 +1,48 @@
|
|||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT0.GTPE2_INT_INTERFACE_IMUX_DELAY0 26_00
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT1.GTPE2_INT_INTERFACE_IMUX_DELAY1 27_08
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT2.GTPE2_INT_INTERFACE_IMUX_DELAY2 27_16
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT3.GTPE2_INT_INTERFACE_IMUX_DELAY3 27_24
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT4.GTPE2_INT_INTERFACE_IMUX_DELAY4 26_32
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT5.GTPE2_INT_INTERFACE_IMUX_DELAY5 27_40
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT6.GTPE2_INT_INTERFACE_IMUX_DELAY6 27_48
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT7.GTPE2_INT_INTERFACE_IMUX_DELAY7 27_56
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT8.GTPE2_INT_INTERFACE_IMUX_DELAY8 26_02
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT9.GTPE2_INT_INTERFACE_IMUX_DELAY9 26_10
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT10.GTPE2_INT_INTERFACE_IMUX_DELAY10 26_18
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT11.GTPE2_INT_INTERFACE_IMUX_DELAY11 26_26
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT12.GTPE2_INT_INTERFACE_IMUX_DELAY12 26_34
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT13.GTPE2_INT_INTERFACE_IMUX_DELAY13 26_42
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT14.GTPE2_INT_INTERFACE_IMUX_DELAY14 26_50
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT15.GTPE2_INT_INTERFACE_IMUX_DELAY15 26_58
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT16.GTPE2_INT_INTERFACE_IMUX_DELAY16 26_03
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT17.GTPE2_INT_INTERFACE_IMUX_DELAY17 26_11
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT18.GTPE2_INT_INTERFACE_IMUX_DELAY18 26_19
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT19.GTPE2_INT_INTERFACE_IMUX_DELAY19 26_27
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT20.GTPE2_INT_INTERFACE_IMUX_DELAY20 26_35
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT21.GTPE2_INT_INTERFACE_IMUX_DELAY21 26_43
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT22.GTPE2_INT_INTERFACE_IMUX_DELAY22 26_51
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT23.GTPE2_INT_INTERFACE_IMUX_DELAY23 26_59
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT24.GTPE2_INT_INTERFACE_IMUX_DELAY24 27_04
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT25.GTPE2_INT_INTERFACE_IMUX_DELAY25 27_12
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT26.GTPE2_INT_INTERFACE_IMUX_DELAY26 27_20
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT27.GTPE2_INT_INTERFACE_IMUX_DELAY27 27_28
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT28.GTPE2_INT_INTERFACE_IMUX_DELAY28 27_36
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT29.GTPE2_INT_INTERFACE_IMUX_DELAY29 27_44
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT30.GTPE2_INT_INTERFACE_IMUX_DELAY30 27_52
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT31.GTPE2_INT_INTERFACE_IMUX_DELAY31 27_60
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT32.GTPE2_INT_INTERFACE_IMUX_DELAY32 27_05
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT33.GTPE2_INT_INTERFACE_IMUX_DELAY33 27_13
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT34.GTPE2_INT_INTERFACE_IMUX_DELAY34 27_21
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT35.GTPE2_INT_INTERFACE_IMUX_DELAY35 27_29
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT36.GTPE2_INT_INTERFACE_IMUX_DELAY36 27_37
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT37.GTPE2_INT_INTERFACE_IMUX_DELAY37 27_45
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT38.GTPE2_INT_INTERFACE_IMUX_DELAY38 27_53
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT39.GTPE2_INT_INTERFACE_IMUX_DELAY39 27_61
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT40.GTPE2_INT_INTERFACE_IMUX_DELAY40 27_07
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT41.GTPE2_INT_INTERFACE_IMUX_DELAY41 27_15
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT42.GTPE2_INT_INTERFACE_IMUX_DELAY42 27_23
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT43.GTPE2_INT_INTERFACE_IMUX_DELAY43 27_31
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT44.GTPE2_INT_INTERFACE_IMUX_DELAY44 27_39
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT45.GTPE2_INT_INTERFACE_IMUX_DELAY45 27_47
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT46.GTPE2_INT_INTERFACE_IMUX_DELAY46 27_55
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT47.GTPE2_INT_INTERFACE_IMUX_DELAY47 27_63
|
||||
|
|
@ -0,0 +1,48 @@
|
|||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT0.GTPE2_INT_INTERFACE_IMUX_DELAY0 origin:066-gtp-int-pips 26_00
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT1.GTPE2_INT_INTERFACE_IMUX_DELAY1 origin:066-gtp-int-pips 27_08
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT2.GTPE2_INT_INTERFACE_IMUX_DELAY2 origin:066-gtp-int-pips 27_16
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT3.GTPE2_INT_INTERFACE_IMUX_DELAY3 origin:066-gtp-int-pips 27_24
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT4.GTPE2_INT_INTERFACE_IMUX_DELAY4 origin:066-gtp-int-pips 26_32
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT5.GTPE2_INT_INTERFACE_IMUX_DELAY5 origin:066-gtp-int-pips 27_40
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT6.GTPE2_INT_INTERFACE_IMUX_DELAY6 origin:066-gtp-int-pips 27_48
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT7.GTPE2_INT_INTERFACE_IMUX_DELAY7 origin:066-gtp-int-pips 27_56
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT8.GTPE2_INT_INTERFACE_IMUX_DELAY8 origin:066-gtp-int-pips 26_02
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT9.GTPE2_INT_INTERFACE_IMUX_DELAY9 origin:066-gtp-int-pips 26_10
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT10.GTPE2_INT_INTERFACE_IMUX_DELAY10 origin:066-gtp-int-pips 26_18
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT11.GTPE2_INT_INTERFACE_IMUX_DELAY11 origin:066-gtp-int-pips 26_26
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT12.GTPE2_INT_INTERFACE_IMUX_DELAY12 origin:066-gtp-int-pips 26_34
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT13.GTPE2_INT_INTERFACE_IMUX_DELAY13 origin:066-gtp-int-pips 26_42
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT14.GTPE2_INT_INTERFACE_IMUX_DELAY14 origin:066-gtp-int-pips 26_50
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT15.GTPE2_INT_INTERFACE_IMUX_DELAY15 origin:066-gtp-int-pips 26_58
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT16.GTPE2_INT_INTERFACE_IMUX_DELAY16 origin:066-gtp-int-pips 26_03
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT17.GTPE2_INT_INTERFACE_IMUX_DELAY17 origin:066-gtp-int-pips 26_11
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT18.GTPE2_INT_INTERFACE_IMUX_DELAY18 origin:066-gtp-int-pips 26_19
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT19.GTPE2_INT_INTERFACE_IMUX_DELAY19 origin:066-gtp-int-pips 26_27
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT20.GTPE2_INT_INTERFACE_IMUX_DELAY20 origin:066-gtp-int-pips 26_35
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT21.GTPE2_INT_INTERFACE_IMUX_DELAY21 origin:066-gtp-int-pips 26_43
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT22.GTPE2_INT_INTERFACE_IMUX_DELAY22 origin:066-gtp-int-pips 26_51
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT23.GTPE2_INT_INTERFACE_IMUX_DELAY23 origin:066-gtp-int-pips 26_59
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT24.GTPE2_INT_INTERFACE_IMUX_DELAY24 origin:066-gtp-int-pips 27_04
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT25.GTPE2_INT_INTERFACE_IMUX_DELAY25 origin:066-gtp-int-pips 27_12
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT26.GTPE2_INT_INTERFACE_IMUX_DELAY26 origin:066-gtp-int-pips 27_20
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT27.GTPE2_INT_INTERFACE_IMUX_DELAY27 origin:066-gtp-int-pips 27_28
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT28.GTPE2_INT_INTERFACE_IMUX_DELAY28 origin:066-gtp-int-pips 27_36
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT29.GTPE2_INT_INTERFACE_IMUX_DELAY29 origin:066-gtp-int-pips 27_44
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT30.GTPE2_INT_INTERFACE_IMUX_DELAY30 origin:066-gtp-int-pips 27_52
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT31.GTPE2_INT_INTERFACE_IMUX_DELAY31 origin:066-gtp-int-pips 27_60
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT32.GTPE2_INT_INTERFACE_IMUX_DELAY32 origin:066-gtp-int-pips 27_05
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT33.GTPE2_INT_INTERFACE_IMUX_DELAY33 origin:066-gtp-int-pips 27_13
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT34.GTPE2_INT_INTERFACE_IMUX_DELAY34 origin:066-gtp-int-pips 27_21
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT35.GTPE2_INT_INTERFACE_IMUX_DELAY35 origin:066-gtp-int-pips 27_29
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT36.GTPE2_INT_INTERFACE_IMUX_DELAY36 origin:066-gtp-int-pips 27_37
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT37.GTPE2_INT_INTERFACE_IMUX_DELAY37 origin:066-gtp-int-pips 27_45
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT38.GTPE2_INT_INTERFACE_IMUX_DELAY38 origin:066-gtp-int-pips 27_53
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT39.GTPE2_INT_INTERFACE_IMUX_DELAY39 origin:066-gtp-int-pips 27_61
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT40.GTPE2_INT_INTERFACE_IMUX_DELAY40 origin:066-gtp-int-pips 27_07
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT41.GTPE2_INT_INTERFACE_IMUX_DELAY41 origin:066-gtp-int-pips 27_15
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT42.GTPE2_INT_INTERFACE_IMUX_DELAY42 origin:066-gtp-int-pips 27_23
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT43.GTPE2_INT_INTERFACE_IMUX_DELAY43 origin:066-gtp-int-pips 27_31
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT44.GTPE2_INT_INTERFACE_IMUX_DELAY44 origin:066-gtp-int-pips 27_39
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT45.GTPE2_INT_INTERFACE_IMUX_DELAY45 origin:066-gtp-int-pips 27_47
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT46.GTPE2_INT_INTERFACE_IMUX_DELAY46 origin:066-gtp-int-pips 27_55
|
||||
GTP_INT_INTERFACE.GTPE2_INT_INTERFACE_IMUX_OUT47.GTPE2_INT_INTERFACE_IMUX_DELAY47 origin:066-gtp-int-pips 27_63
|
||||
|
|
@ -0,0 +1,48 @@
|
|||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT0.GTPE2_INT_INTERFACE_IMUX_DELAY0 26_00
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT1.GTPE2_INT_INTERFACE_IMUX_DELAY1 27_08
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT2.GTPE2_INT_INTERFACE_IMUX_DELAY2 27_16
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT3.GTPE2_INT_INTERFACE_IMUX_DELAY3 27_24
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT4.GTPE2_INT_INTERFACE_IMUX_DELAY4 26_32
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT5.GTPE2_INT_INTERFACE_IMUX_DELAY5 27_40
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT6.GTPE2_INT_INTERFACE_IMUX_DELAY6 27_48
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT7.GTPE2_INT_INTERFACE_IMUX_DELAY7 27_56
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT8.GTPE2_INT_INTERFACE_IMUX_DELAY8 26_02
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT9.GTPE2_INT_INTERFACE_IMUX_DELAY9 26_10
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT10.GTPE2_INT_INTERFACE_IMUX_DELAY10 26_18
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT11.GTPE2_INT_INTERFACE_IMUX_DELAY11 26_26
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT12.GTPE2_INT_INTERFACE_IMUX_DELAY12 26_34
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT13.GTPE2_INT_INTERFACE_IMUX_DELAY13 26_42
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT14.GTPE2_INT_INTERFACE_IMUX_DELAY14 26_50
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT15.GTPE2_INT_INTERFACE_IMUX_DELAY15 26_58
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT16.GTPE2_INT_INTERFACE_IMUX_DELAY16 26_03
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT17.GTPE2_INT_INTERFACE_IMUX_DELAY17 26_11
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT18.GTPE2_INT_INTERFACE_IMUX_DELAY18 26_19
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT19.GTPE2_INT_INTERFACE_IMUX_DELAY19 26_27
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT20.GTPE2_INT_INTERFACE_IMUX_DELAY20 26_35
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT21.GTPE2_INT_INTERFACE_IMUX_DELAY21 26_43
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT22.GTPE2_INT_INTERFACE_IMUX_DELAY22 26_51
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT23.GTPE2_INT_INTERFACE_IMUX_DELAY23 26_59
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT24.GTPE2_INT_INTERFACE_IMUX_DELAY24 27_04
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT25.GTPE2_INT_INTERFACE_IMUX_DELAY25 27_12
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT26.GTPE2_INT_INTERFACE_IMUX_DELAY26 27_20
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT27.GTPE2_INT_INTERFACE_IMUX_DELAY27 27_28
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT28.GTPE2_INT_INTERFACE_IMUX_DELAY28 27_36
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT29.GTPE2_INT_INTERFACE_IMUX_DELAY29 27_44
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT30.GTPE2_INT_INTERFACE_IMUX_DELAY30 27_52
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT31.GTPE2_INT_INTERFACE_IMUX_DELAY31 27_60
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT32.GTPE2_INT_INTERFACE_IMUX_DELAY32 27_05
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT33.GTPE2_INT_INTERFACE_IMUX_DELAY33 27_13
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT34.GTPE2_INT_INTERFACE_IMUX_DELAY34 27_21
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT35.GTPE2_INT_INTERFACE_IMUX_DELAY35 27_29
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT36.GTPE2_INT_INTERFACE_IMUX_DELAY36 27_37
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT37.GTPE2_INT_INTERFACE_IMUX_DELAY37 27_45
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT38.GTPE2_INT_INTERFACE_IMUX_DELAY38 27_53
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT39.GTPE2_INT_INTERFACE_IMUX_DELAY39 27_61
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT40.GTPE2_INT_INTERFACE_IMUX_DELAY40 27_07
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT41.GTPE2_INT_INTERFACE_IMUX_DELAY41 27_15
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT42.GTPE2_INT_INTERFACE_IMUX_DELAY42 27_23
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT43.GTPE2_INT_INTERFACE_IMUX_DELAY43 27_31
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT44.GTPE2_INT_INTERFACE_IMUX_DELAY44 27_39
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT45.GTPE2_INT_INTERFACE_IMUX_DELAY45 27_47
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT46.GTPE2_INT_INTERFACE_IMUX_DELAY46 27_55
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT47.GTPE2_INT_INTERFACE_IMUX_DELAY47 27_63
|
||||
|
|
@ -0,0 +1,48 @@
|
|||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT0.GTPE2_INT_INTERFACE_IMUX_DELAY0 origin:066-gtp-int-pips 26_00
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT1.GTPE2_INT_INTERFACE_IMUX_DELAY1 origin:066-gtp-int-pips 27_08
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT2.GTPE2_INT_INTERFACE_IMUX_DELAY2 origin:066-gtp-int-pips 27_16
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT3.GTPE2_INT_INTERFACE_IMUX_DELAY3 origin:066-gtp-int-pips 27_24
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT4.GTPE2_INT_INTERFACE_IMUX_DELAY4 origin:066-gtp-int-pips 26_32
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT5.GTPE2_INT_INTERFACE_IMUX_DELAY5 origin:066-gtp-int-pips 27_40
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT6.GTPE2_INT_INTERFACE_IMUX_DELAY6 origin:066-gtp-int-pips 27_48
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT7.GTPE2_INT_INTERFACE_IMUX_DELAY7 origin:066-gtp-int-pips 27_56
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT8.GTPE2_INT_INTERFACE_IMUX_DELAY8 origin:066-gtp-int-pips 26_02
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT9.GTPE2_INT_INTERFACE_IMUX_DELAY9 origin:066-gtp-int-pips 26_10
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT10.GTPE2_INT_INTERFACE_IMUX_DELAY10 origin:066-gtp-int-pips 26_18
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT11.GTPE2_INT_INTERFACE_IMUX_DELAY11 origin:066-gtp-int-pips 26_26
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT12.GTPE2_INT_INTERFACE_IMUX_DELAY12 origin:066-gtp-int-pips 26_34
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT13.GTPE2_INT_INTERFACE_IMUX_DELAY13 origin:066-gtp-int-pips 26_42
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT14.GTPE2_INT_INTERFACE_IMUX_DELAY14 origin:066-gtp-int-pips 26_50
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT15.GTPE2_INT_INTERFACE_IMUX_DELAY15 origin:066-gtp-int-pips 26_58
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT16.GTPE2_INT_INTERFACE_IMUX_DELAY16 origin:066-gtp-int-pips 26_03
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT17.GTPE2_INT_INTERFACE_IMUX_DELAY17 origin:066-gtp-int-pips 26_11
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT18.GTPE2_INT_INTERFACE_IMUX_DELAY18 origin:066-gtp-int-pips 26_19
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT19.GTPE2_INT_INTERFACE_IMUX_DELAY19 origin:066-gtp-int-pips 26_27
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT20.GTPE2_INT_INTERFACE_IMUX_DELAY20 origin:066-gtp-int-pips 26_35
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT21.GTPE2_INT_INTERFACE_IMUX_DELAY21 origin:066-gtp-int-pips 26_43
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT22.GTPE2_INT_INTERFACE_IMUX_DELAY22 origin:066-gtp-int-pips 26_51
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT23.GTPE2_INT_INTERFACE_IMUX_DELAY23 origin:066-gtp-int-pips 26_59
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT24.GTPE2_INT_INTERFACE_IMUX_DELAY24 origin:066-gtp-int-pips 27_04
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT25.GTPE2_INT_INTERFACE_IMUX_DELAY25 origin:066-gtp-int-pips 27_12
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT26.GTPE2_INT_INTERFACE_IMUX_DELAY26 origin:066-gtp-int-pips 27_20
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT27.GTPE2_INT_INTERFACE_IMUX_DELAY27 origin:066-gtp-int-pips 27_28
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT28.GTPE2_INT_INTERFACE_IMUX_DELAY28 origin:066-gtp-int-pips 27_36
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT29.GTPE2_INT_INTERFACE_IMUX_DELAY29 origin:066-gtp-int-pips 27_44
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT30.GTPE2_INT_INTERFACE_IMUX_DELAY30 origin:066-gtp-int-pips 27_52
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT31.GTPE2_INT_INTERFACE_IMUX_DELAY31 origin:066-gtp-int-pips 27_60
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT32.GTPE2_INT_INTERFACE_IMUX_DELAY32 origin:066-gtp-int-pips 27_05
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT33.GTPE2_INT_INTERFACE_IMUX_DELAY33 origin:066-gtp-int-pips 27_13
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT34.GTPE2_INT_INTERFACE_IMUX_DELAY34 origin:066-gtp-int-pips 27_21
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT35.GTPE2_INT_INTERFACE_IMUX_DELAY35 origin:066-gtp-int-pips 27_29
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT36.GTPE2_INT_INTERFACE_IMUX_DELAY36 origin:066-gtp-int-pips 27_37
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT37.GTPE2_INT_INTERFACE_IMUX_DELAY37 origin:066-gtp-int-pips 27_45
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT38.GTPE2_INT_INTERFACE_IMUX_DELAY38 origin:066-gtp-int-pips 27_53
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT39.GTPE2_INT_INTERFACE_IMUX_DELAY39 origin:066-gtp-int-pips 27_61
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT40.GTPE2_INT_INTERFACE_IMUX_DELAY40 origin:066-gtp-int-pips 27_07
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT41.GTPE2_INT_INTERFACE_IMUX_DELAY41 origin:066-gtp-int-pips 27_15
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT42.GTPE2_INT_INTERFACE_IMUX_DELAY42 origin:066-gtp-int-pips 27_23
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT43.GTPE2_INT_INTERFACE_IMUX_DELAY43 origin:066-gtp-int-pips 27_31
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT44.GTPE2_INT_INTERFACE_IMUX_DELAY44 origin:066-gtp-int-pips 27_39
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT45.GTPE2_INT_INTERFACE_IMUX_DELAY45 origin:066-gtp-int-pips 27_47
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT46.GTPE2_INT_INTERFACE_IMUX_DELAY46 origin:066-gtp-int-pips 27_55
|
||||
GTP_INT_INTERFACE_L.GTPE2_INT_LEFT_INTERFACE_IMUX_OUT47.GTPE2_INT_INTERFACE_IMUX_DELAY47 origin:066-gtp-int-pips 27_63
|
||||
|
|
@ -0,0 +1,48 @@
|
|||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT0.GTPE2_INT_INTERFACE_IMUX_DELAY0 26_00
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT1.GTPE2_INT_INTERFACE_IMUX_DELAY1 27_08
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT2.GTPE2_INT_INTERFACE_IMUX_DELAY2 27_16
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT3.GTPE2_INT_INTERFACE_IMUX_DELAY3 27_24
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT4.GTPE2_INT_INTERFACE_IMUX_DELAY4 26_32
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT5.GTPE2_INT_INTERFACE_IMUX_DELAY5 27_40
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT6.GTPE2_INT_INTERFACE_IMUX_DELAY6 27_48
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT7.GTPE2_INT_INTERFACE_IMUX_DELAY7 27_56
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT8.GTPE2_INT_INTERFACE_IMUX_DELAY8 26_02
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT9.GTPE2_INT_INTERFACE_IMUX_DELAY9 26_10
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT10.GTPE2_INT_INTERFACE_IMUX_DELAY10 26_18
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT11.GTPE2_INT_INTERFACE_IMUX_DELAY11 26_26
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT12.GTPE2_INT_INTERFACE_IMUX_DELAY12 26_34
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT13.GTPE2_INT_INTERFACE_IMUX_DELAY13 26_42
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT14.GTPE2_INT_INTERFACE_IMUX_DELAY14 26_50
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT15.GTPE2_INT_INTERFACE_IMUX_DELAY15 26_58
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT16.GTPE2_INT_INTERFACE_IMUX_DELAY16 26_03
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT17.GTPE2_INT_INTERFACE_IMUX_DELAY17 26_11
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT18.GTPE2_INT_INTERFACE_IMUX_DELAY18 26_19
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT19.GTPE2_INT_INTERFACE_IMUX_DELAY19 26_27
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT20.GTPE2_INT_INTERFACE_IMUX_DELAY20 26_35
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT21.GTPE2_INT_INTERFACE_IMUX_DELAY21 26_43
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT22.GTPE2_INT_INTERFACE_IMUX_DELAY22 26_51
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT23.GTPE2_INT_INTERFACE_IMUX_DELAY23 26_59
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT24.GTPE2_INT_INTERFACE_IMUX_DELAY24 27_04
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT25.GTPE2_INT_INTERFACE_IMUX_DELAY25 27_12
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT26.GTPE2_INT_INTERFACE_IMUX_DELAY26 27_20
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT27.GTPE2_INT_INTERFACE_IMUX_DELAY27 27_28
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT28.GTPE2_INT_INTERFACE_IMUX_DELAY28 27_36
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT29.GTPE2_INT_INTERFACE_IMUX_DELAY29 27_44
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT30.GTPE2_INT_INTERFACE_IMUX_DELAY30 27_52
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT31.GTPE2_INT_INTERFACE_IMUX_DELAY31 27_60
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT32.GTPE2_INT_INTERFACE_IMUX_DELAY32 27_05
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT33.GTPE2_INT_INTERFACE_IMUX_DELAY33 27_13
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT34.GTPE2_INT_INTERFACE_IMUX_DELAY34 27_21
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT35.GTPE2_INT_INTERFACE_IMUX_DELAY35 27_29
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT36.GTPE2_INT_INTERFACE_IMUX_DELAY36 27_37
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT37.GTPE2_INT_INTERFACE_IMUX_DELAY37 27_45
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT38.GTPE2_INT_INTERFACE_IMUX_DELAY38 27_53
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT39.GTPE2_INT_INTERFACE_IMUX_DELAY39 27_61
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT40.GTPE2_INT_INTERFACE_IMUX_DELAY40 27_07
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT41.GTPE2_INT_INTERFACE_IMUX_DELAY41 27_15
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT42.GTPE2_INT_INTERFACE_IMUX_DELAY42 27_23
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT43.GTPE2_INT_INTERFACE_IMUX_DELAY43 27_31
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT44.GTPE2_INT_INTERFACE_IMUX_DELAY44 27_39
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT45.GTPE2_INT_INTERFACE_IMUX_DELAY45 27_47
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT46.GTPE2_INT_INTERFACE_IMUX_DELAY46 27_55
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT47.GTPE2_INT_INTERFACE_IMUX_DELAY47 27_63
|
||||
|
|
@ -0,0 +1,48 @@
|
|||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT0.GTPE2_INT_INTERFACE_IMUX_DELAY0 origin:066-gtp-int-pips 26_00
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT1.GTPE2_INT_INTERFACE_IMUX_DELAY1 origin:066-gtp-int-pips 27_08
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT2.GTPE2_INT_INTERFACE_IMUX_DELAY2 origin:066-gtp-int-pips 27_16
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT3.GTPE2_INT_INTERFACE_IMUX_DELAY3 origin:066-gtp-int-pips 27_24
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT4.GTPE2_INT_INTERFACE_IMUX_DELAY4 origin:066-gtp-int-pips 26_32
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT5.GTPE2_INT_INTERFACE_IMUX_DELAY5 origin:066-gtp-int-pips 27_40
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT6.GTPE2_INT_INTERFACE_IMUX_DELAY6 origin:066-gtp-int-pips 27_48
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT7.GTPE2_INT_INTERFACE_IMUX_DELAY7 origin:066-gtp-int-pips 27_56
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT8.GTPE2_INT_INTERFACE_IMUX_DELAY8 origin:066-gtp-int-pips 26_02
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT9.GTPE2_INT_INTERFACE_IMUX_DELAY9 origin:066-gtp-int-pips 26_10
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT10.GTPE2_INT_INTERFACE_IMUX_DELAY10 origin:066-gtp-int-pips 26_18
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT11.GTPE2_INT_INTERFACE_IMUX_DELAY11 origin:066-gtp-int-pips 26_26
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT12.GTPE2_INT_INTERFACE_IMUX_DELAY12 origin:066-gtp-int-pips 26_34
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT13.GTPE2_INT_INTERFACE_IMUX_DELAY13 origin:066-gtp-int-pips 26_42
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT14.GTPE2_INT_INTERFACE_IMUX_DELAY14 origin:066-gtp-int-pips 26_50
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT15.GTPE2_INT_INTERFACE_IMUX_DELAY15 origin:066-gtp-int-pips 26_58
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT16.GTPE2_INT_INTERFACE_IMUX_DELAY16 origin:066-gtp-int-pips 26_03
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT17.GTPE2_INT_INTERFACE_IMUX_DELAY17 origin:066-gtp-int-pips 26_11
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT18.GTPE2_INT_INTERFACE_IMUX_DELAY18 origin:066-gtp-int-pips 26_19
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT19.GTPE2_INT_INTERFACE_IMUX_DELAY19 origin:066-gtp-int-pips 26_27
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT20.GTPE2_INT_INTERFACE_IMUX_DELAY20 origin:066-gtp-int-pips 26_35
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT21.GTPE2_INT_INTERFACE_IMUX_DELAY21 origin:066-gtp-int-pips 26_43
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT22.GTPE2_INT_INTERFACE_IMUX_DELAY22 origin:066-gtp-int-pips 26_51
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT23.GTPE2_INT_INTERFACE_IMUX_DELAY23 origin:066-gtp-int-pips 26_59
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT24.GTPE2_INT_INTERFACE_IMUX_DELAY24 origin:066-gtp-int-pips 27_04
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT25.GTPE2_INT_INTERFACE_IMUX_DELAY25 origin:066-gtp-int-pips 27_12
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT26.GTPE2_INT_INTERFACE_IMUX_DELAY26 origin:066-gtp-int-pips 27_20
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT27.GTPE2_INT_INTERFACE_IMUX_DELAY27 origin:066-gtp-int-pips 27_28
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT28.GTPE2_INT_INTERFACE_IMUX_DELAY28 origin:066-gtp-int-pips 27_36
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT29.GTPE2_INT_INTERFACE_IMUX_DELAY29 origin:066-gtp-int-pips 27_44
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT30.GTPE2_INT_INTERFACE_IMUX_DELAY30 origin:066-gtp-int-pips 27_52
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT31.GTPE2_INT_INTERFACE_IMUX_DELAY31 origin:066-gtp-int-pips 27_60
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT32.GTPE2_INT_INTERFACE_IMUX_DELAY32 origin:066-gtp-int-pips 27_05
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT33.GTPE2_INT_INTERFACE_IMUX_DELAY33 origin:066-gtp-int-pips 27_13
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT34.GTPE2_INT_INTERFACE_IMUX_DELAY34 origin:066-gtp-int-pips 27_21
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT35.GTPE2_INT_INTERFACE_IMUX_DELAY35 origin:066-gtp-int-pips 27_29
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT36.GTPE2_INT_INTERFACE_IMUX_DELAY36 origin:066-gtp-int-pips 27_37
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT37.GTPE2_INT_INTERFACE_IMUX_DELAY37 origin:066-gtp-int-pips 27_45
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT38.GTPE2_INT_INTERFACE_IMUX_DELAY38 origin:066-gtp-int-pips 27_53
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT39.GTPE2_INT_INTERFACE_IMUX_DELAY39 origin:066-gtp-int-pips 27_61
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT40.GTPE2_INT_INTERFACE_IMUX_DELAY40 origin:066-gtp-int-pips 27_07
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT41.GTPE2_INT_INTERFACE_IMUX_DELAY41 origin:066-gtp-int-pips 27_15
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT42.GTPE2_INT_INTERFACE_IMUX_DELAY42 origin:066-gtp-int-pips 27_23
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT43.GTPE2_INT_INTERFACE_IMUX_DELAY43 origin:066-gtp-int-pips 27_31
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT44.GTPE2_INT_INTERFACE_IMUX_DELAY44 origin:066-gtp-int-pips 27_39
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT45.GTPE2_INT_INTERFACE_IMUX_DELAY45 origin:066-gtp-int-pips 27_47
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT46.GTPE2_INT_INTERFACE_IMUX_DELAY46 origin:066-gtp-int-pips 27_55
|
||||
GTP_INT_INTERFACE_R.GTPE2_INT_R_INTERFACE_IMUX_OUT47.GTPE2_INT_INTERFACE_IMUX_DELAY47 origin:066-gtp-int-pips 27_63
|
||||
|
|
@ -242,7 +242,10 @@ HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK0 32_16 32_19
|
|||
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK1 32_19 35_21
|
||||
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK2 31_20 32_19
|
||||
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK3 32_19 35_19
|
||||
HCLK_IOI3.LVDS_25_IN_USE 38_23 38_24 38_25 41_14 41_15 41_17 41_18 41_27 41_28 41_29
|
||||
HCLK_IOI3.ONLY_DIFF_IN_USE 38_27 39_23 40_25 40_27 40_29 40_30 41_16 41_31
|
||||
HCLK_IOI3.STEPDOWN 38_15 39_14 39_15 39_16
|
||||
HCLK_IOI3.TMDS_33_IN_USE 38_28 41_19
|
||||
HCLK_IOI3.VREF.V_600_MV 38_26 39_30
|
||||
HCLK_IOI3.VREF.V_675_MV 38_26 39_22
|
||||
HCLK_IOI3.VREF.V_750_MV 38_26 39_24
|
||||
|
|
|
|||
|
|
@ -242,7 +242,10 @@ HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK0 origin:047-hclk-ioi-pips 32_1
|
|||
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK1 origin:047-hclk-ioi-pips 32_19 35_21
|
||||
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK2 origin:047-hclk-ioi-pips 31_20 32_19
|
||||
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK3 origin:047-hclk-ioi-pips 32_19 35_19
|
||||
HCLK_IOI3.LVDS_25_IN_USE origin:030-iob 38_23 38_24 38_25 41_14 41_15 41_17 41_18 41_27 41_28 41_29
|
||||
HCLK_IOI3.ONLY_DIFF_IN_USE origin:030-iob 38_27 39_23 40_25 40_27 40_29 40_30 41_16 41_31
|
||||
HCLK_IOI3.STEPDOWN origin:030-iob 38_15 39_14 39_15 39_16
|
||||
HCLK_IOI3.TMDS_33_IN_USE origin:030-iob 38_28 41_19
|
||||
HCLK_IOI3.VREF.V_600_MV origin:030-iob 38_26 39_30
|
||||
HCLK_IOI3.VREF.V_675_MV origin:030-iob 38_26 39_22
|
||||
HCLK_IOI3.VREF.V_750_MV origin:030-iob 38_26 39_24
|
||||
|
|
|
|||
|
|
@ -301,7 +301,7 @@ INT_L.FAN_ALT0.FAN_BOUNCE4 origin:050-pip-seed !22_00 20_00 23_00 24_00 25_00
|
|||
INT_L.FAN_ALT0.FAN_BOUNCE6 origin:050-pip-seed !23_00 20_00 22_00 24_00 25_00
|
||||
INT_L.FAN_ALT0.LOGIC_OUTS_L0 origin:050-pip-seed !23_00 21_00 22_00 24_00 25_00
|
||||
INT_L.FAN_ALT0.LOGIC_OUTS_L12 origin:050-pip-seed !22_00 21_00 23_00 24_00 25_00
|
||||
INT_L.FAN_ALT0.LOGIC_OUTS_L22 origin:056-pip-rem !22_00 !23_00 !25_00 21_00 24_00
|
||||
INT_L.FAN_ALT0.LOGIC_OUTS_L22 origin:050-pip-seed !22_00 !23_00 !25_00 21_00 24_00
|
||||
INT_L.FAN_ALT0.SR1END_N3_3 origin:050-pip-seed !23_00 19_01 22_00 24_00 25_00
|
||||
INT_L.FAN_ALT0.SS2END_N0_3 origin:050-pip-seed !22_00 !23_00 !24_00 17_00 25_00
|
||||
INT_L.FAN_ALT0.SW2END_N0_3 origin:050-pip-seed !22_00 !23_00 !25_00 17_00 24_00
|
||||
|
|
@ -1937,7 +1937,7 @@ INT_L.EE4BEG3.SE6END3 origin:050-pip-seed 03_57 06_56
|
|||
INT_L.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59
|
||||
INT_L.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56
|
||||
INT_L.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59
|
||||
INT_L.EE4BEG3.SW6END3 origin:050-pip-seed 05_56 05_59
|
||||
INT_L.EE4BEG3.SW6END3 origin:056-pip-rem 05_56 05_59
|
||||
INT_L.EL1BEG0.LOGIC_OUTS_L1 origin:050-pip-seed 07_20 14_21
|
||||
INT_L.EL1BEG0.LOGIC_OUTS_L5 origin:050-pip-seed 11_21 14_21
|
||||
INT_L.EL1BEG0.LOGIC_OUTS_L9 origin:050-pip-seed 10_21 13_21
|
||||
|
|
@ -2273,7 +2273,7 @@ INT_L.NE6BEG3.NW6END3 origin:050-pip-seed 04_53 06_52
|
|||
INT_L.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55
|
||||
INT_L.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52
|
||||
INT_L.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53
|
||||
INT_L.NE6BEG3.WW4END3 origin:050-pip-seed 04_53 05_52
|
||||
INT_L.NE6BEG3.WW4END3 origin:056-pip-rem 04_53 05_52
|
||||
INT_L.NL1BEG0.LOGIC_OUTS_L1 origin:050-pip-seed 07_16 14_17
|
||||
INT_L.NL1BEG0.LOGIC_OUTS_L5 origin:050-pip-seed 11_17 14_17
|
||||
INT_L.NL1BEG0.LOGIC_OUTS_L9 origin:050-pip-seed 10_17 13_17
|
||||
|
|
@ -3348,7 +3348,7 @@ INT_L.SW6BEG3.EE2END3 origin:050-pip-seed 03_60 04_61
|
|||
INT_L.SW6BEG3.EE4END3 origin:056-pip-rem 04_61 05_60
|
||||
INT_L.SW6BEG3.LH0 origin:056-pip-rem 04_62 05_60
|
||||
INT_L.SW6BEG3.SE2END3 origin:050-pip-seed 02_61 04_61
|
||||
INT_L.SW6BEG3.SE6END3 origin:050-pip-seed 04_61 06_60
|
||||
INT_L.SW6BEG3.SE6END3 origin:056-pip-rem 04_61 06_60
|
||||
INT_L.SW6BEG3.SS2END3 origin:050-pip-seed 03_60 03_61
|
||||
INT_L.SW6BEG3.SS6END3 origin:050-pip-seed 03_61 06_60
|
||||
INT_L.SW6BEG3.SW2END3 origin:050-pip-seed 02_61 03_61
|
||||
|
|
|
|||
|
|
@ -237,7 +237,7 @@ INT_R.FAN_ALT0.FAN_BOUNCE4 origin:050-pip-seed !22_00 20_00 23_00 24_00 25_00
|
|||
INT_R.FAN_ALT0.FAN_BOUNCE6 origin:050-pip-seed !23_00 20_00 22_00 24_00 25_00
|
||||
INT_R.FAN_ALT0.LOGIC_OUTS0 origin:050-pip-seed !23_00 21_00 22_00 24_00 25_00
|
||||
INT_R.FAN_ALT0.LOGIC_OUTS12 origin:050-pip-seed !22_00 21_00 23_00 24_00 25_00
|
||||
INT_R.FAN_ALT0.LOGIC_OUTS22 origin:050-pip-seed !22_00 !23_00 !25_00 21_00 24_00
|
||||
INT_R.FAN_ALT0.LOGIC_OUTS22 origin:056-pip-rem !22_00 !23_00 !25_00 21_00 24_00
|
||||
INT_R.FAN_ALT0.SR1END_N3_3 origin:050-pip-seed !23_00 19_01 22_00 24_00 25_00
|
||||
INT_R.FAN_ALT0.SS2END_N0_3 origin:050-pip-seed !22_00 !23_00 !24_00 17_00 25_00
|
||||
INT_R.FAN_ALT0.SW2END_N0_3 origin:050-pip-seed !22_00 !23_00 !25_00 17_00 24_00
|
||||
|
|
@ -328,11 +328,11 @@ INT_R.FAN_ALT3.WR1END3 origin:050-pip-seed !23_56 16_56 22_56 24_56 25_56
|
|||
INT_R.FAN_ALT3.WW2END3 origin:050-pip-seed !22_56 !23_56 !24_56 19_57 25_56
|
||||
INT_R.FAN_ALT4.BYP_BOUNCE_N3_3 origin:059-pip-byp-bounce !22_08 !23_08 !24_08 20_08 25_08
|
||||
INT_R.FAN_ALT4.BYP_BOUNCE_N3_7 origin:059-pip-byp-bounce !22_08 !23_08 !25_08 20_08 24_08
|
||||
INT_R.FAN_ALT4.FAN_BOUNCE2 origin:050-pip-seed !23_08 20_08 22_08 24_08 25_08
|
||||
INT_R.FAN_ALT4.FAN_BOUNCE2 origin:056-pip-rem !23_08 20_08 22_08 24_08 25_08
|
||||
INT_R.FAN_ALT4.FAN_BOUNCE7 origin:056-pip-rem !22_08 20_08 23_08 24_08 25_08
|
||||
INT_R.FAN_ALT4.LOGIC_OUTS4 origin:050-pip-seed !23_08 21_08 22_08 24_08 25_08
|
||||
INT_R.FAN_ALT4.LOGIC_OUTS8 origin:050-pip-seed !22_08 21_08 23_08 24_08 25_08
|
||||
INT_R.FAN_ALT4.LOGIC_OUTS18 origin:050-pip-seed !22_08 !23_08 !25_08 21_08 24_08
|
||||
INT_R.FAN_ALT4.LOGIC_OUTS18 origin:056-pip-rem !22_08 !23_08 !25_08 21_08 24_08
|
||||
INT_R.FAN_ALT4.SR1BEG_S0 origin:050-pip-seed !23_08 19_09 22_08 24_08 25_08
|
||||
INT_R.FAN_ALT4.EE2END0 origin:050-pip-seed !22_08 !23_08 !24_08 16_08 25_08
|
||||
INT_R.FAN_ALT4.EL1END0 origin:050-pip-seed !22_08 16_08 23_08 24_08 25_08
|
||||
|
|
@ -725,7 +725,7 @@ INT_R.EE4BEG3.SE6END3 origin:050-pip-seed 03_57 06_56
|
|||
INT_R.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59
|
||||
INT_R.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56
|
||||
INT_R.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59
|
||||
INT_R.EE4BEG3.SW6END3 origin:050-pip-seed 05_56 05_59
|
||||
INT_R.EE4BEG3.SW6END3 origin:056-pip-rem 05_56 05_59
|
||||
INT_R.EL1BEG0.LOGIC_OUTS1 origin:050-pip-seed 07_20 14_21
|
||||
INT_R.EL1BEG0.LOGIC_OUTS5 origin:050-pip-seed 11_21 14_21
|
||||
INT_R.EL1BEG0.LOGIC_OUTS9 origin:050-pip-seed 10_21 13_21
|
||||
|
|
@ -2273,7 +2273,7 @@ INT_R.NE6BEG3.NW6END3 origin:050-pip-seed 04_53 06_52
|
|||
INT_R.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55
|
||||
INT_R.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52
|
||||
INT_R.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53
|
||||
INT_R.NE6BEG3.WW4END3 origin:056-pip-rem 04_53 05_52
|
||||
INT_R.NE6BEG3.WW4END3 origin:050-pip-seed 04_53 05_52
|
||||
INT_R.NL1BEG0.LOGIC_OUTS1 origin:050-pip-seed 07_16 14_17
|
||||
INT_R.NL1BEG0.LOGIC_OUTS5 origin:050-pip-seed 11_17 14_17
|
||||
INT_R.NL1BEG0.LOGIC_OUTS9 origin:050-pip-seed 10_17 13_17
|
||||
|
|
@ -2491,7 +2491,7 @@ INT_R.NN6BEG3.NN6END3 origin:050-pip-seed 02_54 07_55
|
|||
INT_R.NN6BEG3.NW2END3 origin:050-pip-seed 03_54 04_52
|
||||
INT_R.NN6BEG3.NW6END3 origin:050-pip-seed 04_52 07_55
|
||||
INT_R.NN6BEG3.SE2END3 origin:050-pip-seed 03_54 05_54
|
||||
INT_R.NN6BEG3.SE6END3 origin:056-pip-rem 05_54 07_55
|
||||
INT_R.NN6BEG3.SE6END3 origin:050-pip-seed 05_54 07_55
|
||||
INT_R.NN6BEG3.WW2END2 origin:050-pip-seed 02_55 04_52
|
||||
INT_R.NN6BEG3.WW4END3 origin:050-pip-seed 04_52 04_55
|
||||
INT_R.NR1BEG0.LOGIC_OUTS0 origin:050-pip-seed 11_07 14_07
|
||||
|
|
@ -3281,7 +3281,7 @@ INT_R.SW6BEG0.LOGIC_OUTS12 origin:050-pip-seed 03_12 07_13
|
|||
INT_R.SW6BEG0.LOGIC_OUTS18 origin:050-pip-seed 04_14 06_12
|
||||
INT_R.SW6BEG0.LOGIC_OUTS22 origin:050-pip-seed 06_12 07_13
|
||||
INT_R.SW6BEG0.EE2END0 origin:050-pip-seed 03_12 04_13
|
||||
INT_R.SW6BEG0.EE4END0 origin:050-pip-seed 04_13 05_12
|
||||
INT_R.SW6BEG0.EE4END0 origin:056-pip-rem 04_13 05_12
|
||||
INT_R.SW6BEG0.LH12 origin:056-pip-rem 05_12 07_13
|
||||
INT_R.SW6BEG0.LV0 origin:056-pip-rem 04_14 05_12
|
||||
INT_R.SW6BEG0.NW2END1 origin:050-pip-seed 02_13 05_15
|
||||
|
|
@ -3321,7 +3321,7 @@ INT_R.SW6BEG2.LOGIC_OUTS14 origin:050-pip-seed 03_44 07_45
|
|||
INT_R.SW6BEG2.LOGIC_OUTS16 origin:050-pip-seed 04_46 06_44
|
||||
INT_R.SW6BEG2.LOGIC_OUTS20 origin:050-pip-seed 06_44 07_45
|
||||
INT_R.SW6BEG2.EE2END2 origin:050-pip-seed 03_44 04_45
|
||||
INT_R.SW6BEG2.EE4END2 origin:056-pip-rem 04_45 05_44
|
||||
INT_R.SW6BEG2.EE4END2 origin:050-pip-seed 04_45 05_44
|
||||
INT_R.SW6BEG2.LVB0 origin:056-pip-rem 04_46 05_44
|
||||
INT_R.SW6BEG2.LVB12 origin:056-pip-rem 05_44 07_45
|
||||
INT_R.SW6BEG2.NW2END3 origin:050-pip-seed 02_45 05_47
|
||||
|
|
@ -3344,7 +3344,7 @@ INT_R.SW6BEG3.NW2END_S0_0 origin:050-pip-seed 02_61 05_63
|
|||
INT_R.SW6BEG3.NW6END_S0_0 origin:050-pip-seed 05_63 06_60
|
||||
INT_R.SW6BEG3.WW4END_S0_0 origin:050-pip-seed 05_60 05_63
|
||||
INT_R.SW6BEG3.EE2END3 origin:050-pip-seed 03_60 04_61
|
||||
INT_R.SW6BEG3.EE4END3 origin:050-pip-seed 04_61 05_60
|
||||
INT_R.SW6BEG3.EE4END3 origin:056-pip-rem 04_61 05_60
|
||||
INT_R.SW6BEG3.LH0 origin:056-pip-rem 04_62 05_60
|
||||
INT_R.SW6BEG3.LV18 origin:056-pip-rem 05_60 07_61
|
||||
INT_R.SW6BEG3.SE2END3 origin:050-pip-seed 02_61 04_61
|
||||
|
|
@ -3603,7 +3603,7 @@ INT_R.WW4BEG2.LOGIC_OUTS20 origin:050-pip-seed 04_34 06_32
|
|||
INT_R.WW4BEG2.LVB0 origin:056-pip-rem 04_34 05_32
|
||||
INT_R.WW4BEG2.LVB12 origin:056-pip-rem 05_32 07_33
|
||||
INT_R.WW4BEG2.NE2END2 origin:050-pip-seed 02_33 05_35
|
||||
INT_R.WW4BEG2.NE6END2 origin:056-pip-rem 05_32 05_35
|
||||
INT_R.WW4BEG2.NE6END2 origin:050-pip-seed 05_32 05_35
|
||||
INT_R.WW4BEG2.NN2END2 origin:050-pip-seed 03_32 05_35
|
||||
INT_R.WW4BEG2.NN6END2 origin:050-pip-seed 05_35 06_32
|
||||
INT_R.WW4BEG2.NW2END2 origin:050-pip-seed 02_33 03_33
|
||||
|
|
|
|||
|
|
@ -1,14 +1,21 @@
|
|||
LIOB33.DIFF.ZIBUF_LOW_PWR 38_44 39_83
|
||||
LIOB33.IOB_Y0.IBUFDISABLE.I 38_82
|
||||
LIOB33.IOB_Y0.IN_TERM.NONE !38_120 !38_122 !39_121 !39_123
|
||||
LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 38_120 38_122 39_121 39_123
|
||||
LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 38_120 38_122 !39_121 39_123
|
||||
LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 38_120 !38_122 !39_121 39_123
|
||||
LIOB33.IOB_Y0.INTERMDISABLE.I 39_89
|
||||
LIOB33.IOB_Y0.LVDS_25.DRIVE.I_FIXED 38_64 38_74 38_76 38_98 38_100 38_102 38_118 39_65 39_75 39_97 !39_101 39_113 39_119 39_125
|
||||
LIOB33.IOB_Y0.LVDS_25.IN 38_86 39_87
|
||||
LIOB33.IOB_Y0.LVDS_25.OUT 38_64 38_74 38_76 38_98 38_102 39_65 39_75 !39_101
|
||||
LIOB33.IOB_Y0.LVTTL.DRIVE.I24 38_64 !38_112 !38_118 38_126 39_65 39_117 39_119 !39_125 !39_127
|
||||
LIOB33.IOB_Y0.PULLTYPE.KEEPER 38_92 38_94 !39_93
|
||||
LIOB33.IOB_Y0.PULLTYPE.NONE !38_92 38_94 !39_93
|
||||
LIOB33.IOB_Y0.PULLTYPE.PULLDOWN !38_92 !38_94 !39_93
|
||||
LIOB33.IOB_Y0.PULLTYPE.PULLUP !38_92 38_94 39_93
|
||||
LIOB33.IOB_Y0.TMDS_33.DRIVE.I_FIXED 38_64 !38_74 !38_76 !38_98 !38_100 !38_102 38_118 39_65 !39_75 !39_97 39_101 39_113 39_119 39_125
|
||||
LIOB33.IOB_Y0.TMDS_33.IN 38_86 !39_87
|
||||
LIOB33.IOB_Y0.TMDS_33.OUT 38_64 !38_74 !38_76 !38_98 !38_102 39_65 !39_75 39_101
|
||||
LIOB33.IOB_Y0.ZIBUF_LOW_PWR 38_84
|
||||
LIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 38_64 38_112 38_118 38_126 39_65 39_113 !39_117 !39_119 39_125 !39_127
|
||||
LIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 !39_119 !39_125 39_127
|
||||
|
|
|
|||
|
|
@ -1,14 +1,21 @@
|
|||
LIOB33.DIFF.ZIBUF_LOW_PWR origin:030-iob 38_44 39_83
|
||||
LIOB33.IOB_Y0.IBUFDISABLE.I origin:030-iob 38_82
|
||||
LIOB33.IOB_Y0.IN_TERM.NONE origin:030-iob !38_120 !38_122 !39_121 !39_123
|
||||
LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_120 38_122 39_121 39_123
|
||||
LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob !39_121 38_120 38_122 39_123
|
||||
LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob !38_122 !39_121 38_120 39_123
|
||||
LIOB33.IOB_Y0.INTERMDISABLE.I origin:030-iob 39_89
|
||||
LIOB33.IOB_Y0.LVDS_25.DRIVE.I_FIXED origin:030-iob !39_101 38_100 38_102 38_118 38_64 38_74 38_76 38_98 39_113 39_119 39_125 39_65 39_75 39_97
|
||||
LIOB33.IOB_Y0.LVDS_25.IN origin:030-iob 38_86 39_87
|
||||
LIOB33.IOB_Y0.LVDS_25.OUT origin:030-iob !39_101 38_102 38_64 38_74 38_76 38_98 39_65 39_75
|
||||
LIOB33.IOB_Y0.LVTTL.DRIVE.I24 origin:030-iob !38_112 !38_118 !39_125 !39_127 38_126 38_64 39_117 39_119 39_65
|
||||
LIOB33.IOB_Y0.PULLTYPE.KEEPER origin:030-iob !39_93 38_92 38_94
|
||||
LIOB33.IOB_Y0.PULLTYPE.NONE origin:030-iob !38_92 !39_93 38_94
|
||||
LIOB33.IOB_Y0.PULLTYPE.PULLDOWN origin:030-iob !38_92 !38_94 !39_93
|
||||
LIOB33.IOB_Y0.PULLTYPE.PULLUP origin:030-iob !38_92 38_94 39_93
|
||||
LIOB33.IOB_Y0.TMDS_33.DRIVE.I_FIXED origin:030-iob !38_100 !38_102 !38_74 !38_76 !38_98 !39_75 !39_97 38_118 38_64 39_101 39_113 39_119 39_125 39_65
|
||||
LIOB33.IOB_Y0.TMDS_33.IN origin:030-iob !39_87 38_86
|
||||
LIOB33.IOB_Y0.TMDS_33.OUT origin:030-iob !38_102 !38_74 !38_76 !38_98 !39_75 38_64 39_101 39_65
|
||||
LIOB33.IOB_Y0.ZIBUF_LOW_PWR origin:030-iob 38_84
|
||||
LIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 origin:030-iob !39_117 !39_119 !39_127 38_112 38_118 38_126 38_64 39_113 39_125 39_65
|
||||
LIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 origin:030-iob !38_118 !39_117 !39_119 !39_125 38_112 38_126 38_64 39_113 39_127 39_65
|
||||
|
|
|
|||
|
|
@ -0,0 +1,27 @@
|
|||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT0.PCIE_INT_INTERFACE_IMUX_L_DELAY0 26_00
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT1.PCIE_INT_INTERFACE_IMUX_L_DELAY1 27_08
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT2.PCIE_INT_INTERFACE_IMUX_L_DELAY2 27_16
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT3.PCIE_INT_INTERFACE_IMUX_L_DELAY3 27_24
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT4.PCIE_INT_INTERFACE_IMUX_L_DELAY4 26_32
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT5.PCIE_INT_INTERFACE_IMUX_L_DELAY5 27_40
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT6.PCIE_INT_INTERFACE_IMUX_L_DELAY6 27_48
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT7.PCIE_INT_INTERFACE_IMUX_L_DELAY7 27_56
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT8.PCIE_INT_INTERFACE_IMUX_L_DELAY8 26_02
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT9.PCIE_INT_INTERFACE_IMUX_L_DELAY9 26_10
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT10.PCIE_INT_INTERFACE_IMUX_L_DELAY10 26_18
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT11.PCIE_INT_INTERFACE_IMUX_L_DELAY11 26_26
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT12.PCIE_INT_INTERFACE_IMUX_L_DELAY12 26_34
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT13.PCIE_INT_INTERFACE_IMUX_L_DELAY13 26_42
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT14.PCIE_INT_INTERFACE_IMUX_L_DELAY14 26_50
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT15.PCIE_INT_INTERFACE_IMUX_L_DELAY15 26_58
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT16.PCIE_INT_INTERFACE_IMUX_L_DELAY16 26_03
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT17.PCIE_INT_INTERFACE_IMUX_L_DELAY17 26_11
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT20.PCIE_INT_INTERFACE_IMUX_L_DELAY20 26_35
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT32.PCIE_INT_INTERFACE_IMUX_L_DELAY32 27_05
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT33.PCIE_INT_INTERFACE_IMUX_L_DELAY33 27_13
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT34.PCIE_INT_INTERFACE_IMUX_L_DELAY34 27_21
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT35.PCIE_INT_INTERFACE_IMUX_L_DELAY35 27_29
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT36.PCIE_INT_INTERFACE_IMUX_L_DELAY36 27_37
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT37.PCIE_INT_INTERFACE_IMUX_L_DELAY37 27_45
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT38.PCIE_INT_INTERFACE_IMUX_L_DELAY38 27_53
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT39.PCIE_INT_INTERFACE_IMUX_L_DELAY39 27_61
|
||||
|
|
@ -0,0 +1,27 @@
|
|||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT0.PCIE_INT_INTERFACE_IMUX_L_DELAY0 origin:062-pcie-int-pips 26_00
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT1.PCIE_INT_INTERFACE_IMUX_L_DELAY1 origin:062-pcie-int-pips 27_08
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT2.PCIE_INT_INTERFACE_IMUX_L_DELAY2 origin:062-pcie-int-pips 27_16
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT3.PCIE_INT_INTERFACE_IMUX_L_DELAY3 origin:062-pcie-int-pips 27_24
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT4.PCIE_INT_INTERFACE_IMUX_L_DELAY4 origin:062-pcie-int-pips 26_32
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT5.PCIE_INT_INTERFACE_IMUX_L_DELAY5 origin:062-pcie-int-pips 27_40
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT6.PCIE_INT_INTERFACE_IMUX_L_DELAY6 origin:062-pcie-int-pips 27_48
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT7.PCIE_INT_INTERFACE_IMUX_L_DELAY7 origin:062-pcie-int-pips 27_56
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT8.PCIE_INT_INTERFACE_IMUX_L_DELAY8 origin:062-pcie-int-pips 26_02
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT9.PCIE_INT_INTERFACE_IMUX_L_DELAY9 origin:062-pcie-int-pips 26_10
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT10.PCIE_INT_INTERFACE_IMUX_L_DELAY10 origin:062-pcie-int-pips 26_18
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT11.PCIE_INT_INTERFACE_IMUX_L_DELAY11 origin:062-pcie-int-pips 26_26
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT12.PCIE_INT_INTERFACE_IMUX_L_DELAY12 origin:062-pcie-int-pips 26_34
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT13.PCIE_INT_INTERFACE_IMUX_L_DELAY13 origin:062-pcie-int-pips 26_42
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT14.PCIE_INT_INTERFACE_IMUX_L_DELAY14 origin:062-pcie-int-pips 26_50
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT15.PCIE_INT_INTERFACE_IMUX_L_DELAY15 origin:062-pcie-int-pips 26_58
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT16.PCIE_INT_INTERFACE_IMUX_L_DELAY16 origin:062-pcie-int-pips 26_03
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT17.PCIE_INT_INTERFACE_IMUX_L_DELAY17 origin:062-pcie-int-pips 26_11
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT20.PCIE_INT_INTERFACE_IMUX_L_DELAY20 origin:062-pcie-int-pips 26_35
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT32.PCIE_INT_INTERFACE_IMUX_L_DELAY32 origin:062-pcie-int-pips 27_05
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT33.PCIE_INT_INTERFACE_IMUX_L_DELAY33 origin:062-pcie-int-pips 27_13
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT34.PCIE_INT_INTERFACE_IMUX_L_DELAY34 origin:062-pcie-int-pips 27_21
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT35.PCIE_INT_INTERFACE_IMUX_L_DELAY35 origin:062-pcie-int-pips 27_29
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT36.PCIE_INT_INTERFACE_IMUX_L_DELAY36 origin:062-pcie-int-pips 27_37
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT37.PCIE_INT_INTERFACE_IMUX_L_DELAY37 origin:062-pcie-int-pips 27_45
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT38.PCIE_INT_INTERFACE_IMUX_L_DELAY38 origin:062-pcie-int-pips 27_53
|
||||
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT39.PCIE_INT_INTERFACE_IMUX_L_DELAY39 origin:062-pcie-int-pips 27_61
|
||||
|
|
@ -0,0 +1,34 @@
|
|||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT0.PCIE_INT_INTERFACE_IMUX_DELAY0 26_00
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT1.PCIE_INT_INTERFACE_IMUX_DELAY1 27_08
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT2.PCIE_INT_INTERFACE_IMUX_DELAY2 27_16
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT3.PCIE_INT_INTERFACE_IMUX_DELAY3 27_24
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT4.PCIE_INT_INTERFACE_IMUX_DELAY4 26_32
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT5.PCIE_INT_INTERFACE_IMUX_DELAY5 27_40
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT6.PCIE_INT_INTERFACE_IMUX_DELAY6 27_48
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT7.PCIE_INT_INTERFACE_IMUX_DELAY7 27_56
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT8.PCIE_INT_INTERFACE_IMUX_DELAY8 26_02
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT9.PCIE_INT_INTERFACE_IMUX_DELAY9 26_10
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT10.PCIE_INT_INTERFACE_IMUX_DELAY10 26_18
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT11.PCIE_INT_INTERFACE_IMUX_DELAY11 26_26
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT12.PCIE_INT_INTERFACE_IMUX_DELAY12 26_34
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT13.PCIE_INT_INTERFACE_IMUX_DELAY13 26_42
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT14.PCIE_INT_INTERFACE_IMUX_DELAY14 26_50
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT15.PCIE_INT_INTERFACE_IMUX_DELAY15 26_58
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT16.PCIE_INT_INTERFACE_IMUX_DELAY16 26_03
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT17.PCIE_INT_INTERFACE_IMUX_DELAY17 26_11
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT18.PCIE_INT_INTERFACE_IMUX_DELAY18 26_19
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT19.PCIE_INT_INTERFACE_IMUX_DELAY19 26_27
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT20.PCIE_INT_INTERFACE_IMUX_DELAY20 26_35
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT21.PCIE_INT_INTERFACE_IMUX_DELAY21 26_43
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT22.PCIE_INT_INTERFACE_IMUX_DELAY22 26_51
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT23.PCIE_INT_INTERFACE_IMUX_DELAY23 26_59
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT24.PCIE_INT_INTERFACE_IMUX_DELAY24 27_04
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT25.PCIE_INT_INTERFACE_IMUX_DELAY25 27_12
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT32.PCIE_INT_INTERFACE_IMUX_DELAY32 27_05
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT33.PCIE_INT_INTERFACE_IMUX_DELAY33 27_13
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT34.PCIE_INT_INTERFACE_IMUX_DELAY34 27_21
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT35.PCIE_INT_INTERFACE_IMUX_DELAY35 27_29
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT36.PCIE_INT_INTERFACE_IMUX_DELAY36 27_37
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT37.PCIE_INT_INTERFACE_IMUX_DELAY37 27_45
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT38.PCIE_INT_INTERFACE_IMUX_DELAY38 27_53
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT39.PCIE_INT_INTERFACE_IMUX_DELAY39 27_61
|
||||
|
|
@ -0,0 +1,34 @@
|
|||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT0.PCIE_INT_INTERFACE_IMUX_DELAY0 origin:062-pcie-int-pips 26_00
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT1.PCIE_INT_INTERFACE_IMUX_DELAY1 origin:062-pcie-int-pips 27_08
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT2.PCIE_INT_INTERFACE_IMUX_DELAY2 origin:062-pcie-int-pips 27_16
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT3.PCIE_INT_INTERFACE_IMUX_DELAY3 origin:062-pcie-int-pips 27_24
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT4.PCIE_INT_INTERFACE_IMUX_DELAY4 origin:062-pcie-int-pips 26_32
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT5.PCIE_INT_INTERFACE_IMUX_DELAY5 origin:062-pcie-int-pips 27_40
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT6.PCIE_INT_INTERFACE_IMUX_DELAY6 origin:062-pcie-int-pips 27_48
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT7.PCIE_INT_INTERFACE_IMUX_DELAY7 origin:062-pcie-int-pips 27_56
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT8.PCIE_INT_INTERFACE_IMUX_DELAY8 origin:062-pcie-int-pips 26_02
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT9.PCIE_INT_INTERFACE_IMUX_DELAY9 origin:062-pcie-int-pips 26_10
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT10.PCIE_INT_INTERFACE_IMUX_DELAY10 origin:062-pcie-int-pips 26_18
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT11.PCIE_INT_INTERFACE_IMUX_DELAY11 origin:062-pcie-int-pips 26_26
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT12.PCIE_INT_INTERFACE_IMUX_DELAY12 origin:062-pcie-int-pips 26_34
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT13.PCIE_INT_INTERFACE_IMUX_DELAY13 origin:062-pcie-int-pips 26_42
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT14.PCIE_INT_INTERFACE_IMUX_DELAY14 origin:062-pcie-int-pips 26_50
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT15.PCIE_INT_INTERFACE_IMUX_DELAY15 origin:062-pcie-int-pips 26_58
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT16.PCIE_INT_INTERFACE_IMUX_DELAY16 origin:062-pcie-int-pips 26_03
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT17.PCIE_INT_INTERFACE_IMUX_DELAY17 origin:062-pcie-int-pips 26_11
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT18.PCIE_INT_INTERFACE_IMUX_DELAY18 origin:062-pcie-int-pips 26_19
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT19.PCIE_INT_INTERFACE_IMUX_DELAY19 origin:062-pcie-int-pips 26_27
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT20.PCIE_INT_INTERFACE_IMUX_DELAY20 origin:062-pcie-int-pips 26_35
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT21.PCIE_INT_INTERFACE_IMUX_DELAY21 origin:062-pcie-int-pips 26_43
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT22.PCIE_INT_INTERFACE_IMUX_DELAY22 origin:062-pcie-int-pips 26_51
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT23.PCIE_INT_INTERFACE_IMUX_DELAY23 origin:062-pcie-int-pips 26_59
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT24.PCIE_INT_INTERFACE_IMUX_DELAY24 origin:062-pcie-int-pips 27_04
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT25.PCIE_INT_INTERFACE_IMUX_DELAY25 origin:062-pcie-int-pips 27_12
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT32.PCIE_INT_INTERFACE_IMUX_DELAY32 origin:062-pcie-int-pips 27_05
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT33.PCIE_INT_INTERFACE_IMUX_DELAY33 origin:062-pcie-int-pips 27_13
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT34.PCIE_INT_INTERFACE_IMUX_DELAY34 origin:062-pcie-int-pips 27_21
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT35.PCIE_INT_INTERFACE_IMUX_DELAY35 origin:062-pcie-int-pips 27_29
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT36.PCIE_INT_INTERFACE_IMUX_DELAY36 origin:062-pcie-int-pips 27_37
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT37.PCIE_INT_INTERFACE_IMUX_DELAY37 origin:062-pcie-int-pips 27_45
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT38.PCIE_INT_INTERFACE_IMUX_DELAY38 origin:062-pcie-int-pips 27_53
|
||||
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT39.PCIE_INT_INTERFACE_IMUX_DELAY39 origin:062-pcie-int-pips 27_61
|
||||
|
|
@ -1,14 +1,21 @@
|
|||
RIOB33.DIFF.ZIBUF_LOW_PWR 38_44 39_83
|
||||
RIOB33.IOB_Y0.IBUFDISABLE.I 38_82
|
||||
RIOB33.IOB_Y0.IN_TERM.NONE !38_120 !38_122 !39_121 !39_123
|
||||
RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 38_120 38_122 39_121 39_123
|
||||
RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 38_120 38_122 !39_121 39_123
|
||||
RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 38_120 !38_122 !39_121 39_123
|
||||
RIOB33.IOB_Y0.INTERMDISABLE.I 39_89
|
||||
RIOB33.IOB_Y0.LVDS_25.DRIVE.I_FIXED 38_64 38_74 38_76 38_98 38_100 38_102 38_118 39_65 39_75 39_97 !39_101 39_113 39_119 39_125
|
||||
RIOB33.IOB_Y0.LVDS_25.IN 38_86 39_87
|
||||
RIOB33.IOB_Y0.LVDS_25.OUT 38_64 38_74 38_76 38_98 38_102 39_65 39_75 !39_101
|
||||
RIOB33.IOB_Y0.LVTTL.DRIVE.I24 38_64 !38_112 !38_118 38_126 39_65 39_117 39_119 !39_125 !39_127
|
||||
RIOB33.IOB_Y0.PULLTYPE.KEEPER 38_92 38_94 !39_93
|
||||
RIOB33.IOB_Y0.PULLTYPE.NONE !38_92 38_94 !39_93
|
||||
RIOB33.IOB_Y0.PULLTYPE.PULLDOWN !38_92 !38_94 !39_93
|
||||
RIOB33.IOB_Y0.PULLTYPE.PULLUP !38_92 38_94 39_93
|
||||
RIOB33.IOB_Y0.TMDS_33.DRIVE.I_FIXED 38_64 !38_74 !38_76 !38_98 !38_100 !38_102 38_118 39_65 !39_75 !39_97 39_101 39_113 39_119 39_125
|
||||
RIOB33.IOB_Y0.TMDS_33.IN 38_86 !39_87
|
||||
RIOB33.IOB_Y0.TMDS_33.OUT 38_64 !38_74 !38_76 !38_98 !38_102 39_65 !39_75 39_101
|
||||
RIOB33.IOB_Y0.ZIBUF_LOW_PWR 38_84
|
||||
RIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 38_64 38_112 38_118 38_126 39_65 39_113 !39_117 !39_119 39_125 !39_127
|
||||
RIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 !39_119 !39_125 39_127
|
||||
|
|
|
|||
|
|
@ -1,14 +1,21 @@
|
|||
RIOB33.DIFF.ZIBUF_LOW_PWR origin:030-iob 38_44 39_83
|
||||
RIOB33.IOB_Y0.IBUFDISABLE.I origin:030-iob 38_82
|
||||
RIOB33.IOB_Y0.IN_TERM.NONE origin:030-iob !38_120 !38_122 !39_121 !39_123
|
||||
RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_120 38_122 39_121 39_123
|
||||
RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob !39_121 38_120 38_122 39_123
|
||||
RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob !38_122 !39_121 38_120 39_123
|
||||
RIOB33.IOB_Y0.INTERMDISABLE.I origin:030-iob 39_89
|
||||
RIOB33.IOB_Y0.LVDS_25.DRIVE.I_FIXED origin:030-iob !39_101 38_100 38_102 38_118 38_64 38_74 38_76 38_98 39_113 39_119 39_125 39_65 39_75 39_97
|
||||
RIOB33.IOB_Y0.LVDS_25.IN origin:030-iob 38_86 39_87
|
||||
RIOB33.IOB_Y0.LVDS_25.OUT origin:030-iob !39_101 38_102 38_64 38_74 38_76 38_98 39_65 39_75
|
||||
RIOB33.IOB_Y0.LVTTL.DRIVE.I24 origin:030-iob !38_112 !38_118 !39_125 !39_127 38_126 38_64 39_117 39_119 39_65
|
||||
RIOB33.IOB_Y0.PULLTYPE.KEEPER origin:030-iob !39_93 38_92 38_94
|
||||
RIOB33.IOB_Y0.PULLTYPE.NONE origin:030-iob !38_92 !39_93 38_94
|
||||
RIOB33.IOB_Y0.PULLTYPE.PULLDOWN origin:030-iob !38_92 !38_94 !39_93
|
||||
RIOB33.IOB_Y0.PULLTYPE.PULLUP origin:030-iob !38_92 38_94 39_93
|
||||
RIOB33.IOB_Y0.TMDS_33.DRIVE.I_FIXED origin:030-iob !38_100 !38_102 !38_74 !38_76 !38_98 !39_75 !39_97 38_118 38_64 39_101 39_113 39_119 39_125 39_65
|
||||
RIOB33.IOB_Y0.TMDS_33.IN origin:030-iob !39_87 38_86
|
||||
RIOB33.IOB_Y0.TMDS_33.OUT origin:030-iob !38_102 !38_74 !38_76 !38_98 !39_75 38_64 39_101 39_65
|
||||
RIOB33.IOB_Y0.ZIBUF_LOW_PWR origin:030-iob 38_84
|
||||
RIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 origin:030-iob !39_117 !39_119 !39_127 38_112 38_118 38_126 38_64 39_113 39_125 39_65
|
||||
RIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 origin:030-iob !38_118 !39_117 !39_119 !39_125 38_112 38_126 38_64 39_113 39_127 39_65
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,308 @@
|
|||
pin,bank,site,tile,pin_function
|
||||
A1,35,IOB_X1Y147,RIOB33_X57Y147,IO_L1N_T0_AD4N_35
|
||||
A4,216,OPAD_X0Y8,GTP_CHANNEL_0_X130Y162,MGTPTXN0_216
|
||||
A6,216,OPAD_X0Y12,GTP_CHANNEL_2_X130Y191,MGTPTXN2_216
|
||||
A8,216,IPAD_X1Y36,GTP_CHANNEL_0_X130Y162,MGTPRXN0_216
|
||||
A10,216,IPAD_X1Y54,GTP_CHANNEL_2_X130Y191,MGTPRXN2_216
|
||||
A13,16,IOB_X0Y180,LIOB33_X0Y179,IO_L10P_T1_16
|
||||
A14,16,IOB_X0Y179,LIOB33_X0Y179,IO_L10N_T1_16
|
||||
A15,16,IOB_X0Y182,LIOB33_X0Y181,IO_L9P_T1_DQS_16
|
||||
A16,16,IOB_X0Y181,LIOB33_X0Y181,IO_L9N_T1_DQS_16
|
||||
A18,16,IOB_X0Y166,LIOB33_X0Y165,IO_L17P_T2_16
|
||||
A19,16,IOB_X0Y165,LIOB33_X0Y165,IO_L17N_T2_16
|
||||
A20,16,IOB_X0Y167,LIOB33_X0Y167,IO_L16N_T2_16
|
||||
A21,16,IOB_X0Y157,LIOB33_X0Y157,IO_L21N_T3_DQS_16
|
||||
AA1,34,IOB_X1Y86,RIOB33_X57Y85,IO_L7P_T1_34
|
||||
AA3,34,IOB_X1Y81,RIOB33_X57Y81,IO_L9N_T1_DQS_34
|
||||
AA4,34,IOB_X1Y77,RIOB33_X57Y77,IO_L11N_T1_SRCC_34
|
||||
AA5,34,IOB_X1Y80,RIOB33_X57Y79,IO_L10P_T1_34
|
||||
AA6,34,IOB_X1Y63,RIOB33_X57Y63,IO_L18N_T2_34
|
||||
AA8,34,IOB_X1Y56,RIOB33_X57Y55,IO_L22P_T3_34
|
||||
AA9,13,IOB_X0Y34,LIOB33_X0Y33,IO_L8P_T1_13
|
||||
AA10,13,IOB_X0Y32,LIOB33_X0Y31,IO_L9P_T1_DQS_13
|
||||
AA11,13,IOB_X0Y31,LIOB33_X0Y31,IO_L9N_T1_DQS_13
|
||||
AA13,13,IOB_X0Y44,LIOB33_X0Y43,IO_L3P_T0_DQS_13
|
||||
AA14,13,IOB_X0Y39,LIOB33_X0Y39,IO_L5N_T0_13
|
||||
AA15,13,IOB_X0Y42,LIOB33_X0Y41,IO_L4P_T0_13
|
||||
AA16,13,IOB_X0Y47,LIOB33_X0Y47,IO_L1N_T0_13
|
||||
AA18,14,IOB_X0Y66,LIOB33_X0Y65,IO_L17P_T2_A14_D30_14
|
||||
AA19,14,IOB_X0Y70,LIOB33_X0Y69,IO_L15P_T2_DQS_RDWR_B_14
|
||||
AA20,14,IOB_X0Y84,LIOB33_X0Y83,IO_L8P_T1_D11_14
|
||||
AA21,14,IOB_X0Y83,LIOB33_X0Y83,IO_L8N_T1_D12_14
|
||||
AB1,34,IOB_X1Y85,RIOB33_X57Y85,IO_L7N_T1_34
|
||||
AB2,34,IOB_X1Y83,RIOB33_X57Y83,IO_L8N_T1_34
|
||||
AB3,34,IOB_X1Y84,RIOB33_X57Y83,IO_L8P_T1_34
|
||||
AB5,34,IOB_X1Y79,RIOB33_X57Y79,IO_L10N_T1_34
|
||||
AB6,34,IOB_X1Y59,RIOB33_X57Y59,IO_L20N_T3_34
|
||||
AB7,34,IOB_X1Y60,RIOB33_X57Y59,IO_L20P_T3_34
|
||||
AB8,34,IOB_X1Y55,RIOB33_X57Y55,IO_L22N_T3_34
|
||||
AB10,13,IOB_X0Y33,LIOB33_X0Y33,IO_L8N_T1_13
|
||||
AB11,13,IOB_X0Y36,LIOB33_X0Y35,IO_L7P_T1_13
|
||||
AB12,13,IOB_X0Y35,LIOB33_X0Y35,IO_L7N_T1_13
|
||||
AB13,13,IOB_X0Y43,LIOB33_X0Y43,IO_L3N_T0_DQS_13
|
||||
AB15,13,IOB_X0Y41,LIOB33_X0Y41,IO_L4N_T0_13
|
||||
AB16,13,IOB_X0Y46,LIOB33_X0Y45,IO_L2P_T0_13
|
||||
AB17,13,IOB_X0Y45,LIOB33_X0Y45,IO_L2N_T0_13
|
||||
AB18,14,IOB_X0Y65,LIOB33_X0Y65,IO_L17N_T2_A13_D29_14
|
||||
AB20,14,IOB_X0Y69,LIOB33_X0Y69,IO_L15N_T2_DQS_DOUT_CSO_B_14
|
||||
AB21,14,IOB_X0Y80,LIOB33_X0Y79,IO_L10P_T1_D14_14
|
||||
AB22,14,IOB_X0Y79,LIOB33_X0Y79,IO_L10N_T1_D15_14
|
||||
B1,35,IOB_X1Y148,RIOB33_X57Y147,IO_L1P_T0_AD4P_35
|
||||
B2,35,IOB_X1Y145,RIOB33_X57Y145,IO_L2N_T0_AD12N_35
|
||||
B4,216,OPAD_X0Y9,GTP_CHANNEL_0_X130Y162,MGTPTXP0_216
|
||||
B6,216,OPAD_X0Y13,GTP_CHANNEL_2_X130Y191,MGTPTXP2_216
|
||||
B8,216,IPAD_X1Y37,GTP_CHANNEL_0_X130Y162,MGTPRXP0_216
|
||||
B10,216,IPAD_X1Y55,GTP_CHANNEL_2_X130Y191,MGTPRXP2_216
|
||||
B13,16,IOB_X0Y183,LIOB33_X0Y183,IO_L8N_T1_16
|
||||
B15,16,IOB_X0Y186,LIOB33_X0Y185,IO_L7P_T1_16
|
||||
B16,16,IOB_X0Y185,LIOB33_X0Y185,IO_L7N_T1_16
|
||||
B17,16,IOB_X0Y178,LIOB33_X0Y177,IO_L11P_T1_SRCC_16
|
||||
B18,16,IOB_X0Y177,LIOB33_X0Y177,IO_L11N_T1_SRCC_16
|
||||
B20,16,IOB_X0Y168,LIOB33_X0Y167,IO_L16P_T2_16
|
||||
B21,16,IOB_X0Y158,LIOB33_X0Y157,IO_L21P_T3_DQS_16
|
||||
B22,16,IOB_X0Y159,LIOB33_X0Y159,IO_L20N_T3_16
|
||||
C2,35,IOB_X1Y146,RIOB33_X57Y145,IO_L2P_T0_AD12P_35
|
||||
C5,216,OPAD_X0Y10,GTP_CHANNEL_1_X130Y173,MGTPTXN1_216
|
||||
C7,216,OPAD_X0Y14,GTP_CHANNEL_3_X130Y202,MGTPTXN3_216
|
||||
C9,216,IPAD_X1Y60,GTP_CHANNEL_3_X130Y202,MGTPRXN3_216
|
||||
C11,216,IPAD_X1Y42,GTP_CHANNEL_1_X130Y173,MGTPRXN1_216
|
||||
C13,16,IOB_X0Y184,LIOB33_X0Y183,IO_L8P_T1_16
|
||||
C14,16,IOB_X0Y194,LIOB33_X0Y193,IO_L3P_T0_DQS_16
|
||||
C15,16,IOB_X0Y193,LIOB33_X0Y193,IO_L3N_T0_DQS_16
|
||||
C17,16,IOB_X0Y175,LIOB33_X0Y175,IO_L12N_T1_MRCC_16
|
||||
C18,16,IOB_X0Y174,LIOB33_X0Y173,IO_L13P_T2_MRCC_16
|
||||
C19,16,IOB_X0Y173,LIOB33_X0Y173,IO_L13N_T2_MRCC_16
|
||||
C20,16,IOB_X0Y161,LIOB33_X0Y161,IO_L19N_T3_VREF_16
|
||||
C22,16,IOB_X0Y160,LIOB33_X0Y159,IO_L20P_T3_16
|
||||
D1,35,IOB_X1Y143,RIOB33_X57Y143,IO_L3N_T0_DQS_AD5N_35
|
||||
D2,35,IOB_X1Y141,RIOB33_X57Y141,IO_L4N_T0_35
|
||||
D5,216,OPAD_X0Y11,GTP_CHANNEL_1_X130Y173,MGTPTXP1_216
|
||||
D7,216,OPAD_X0Y15,GTP_CHANNEL_3_X130Y202,MGTPTXP3_216
|
||||
D9,216,IPAD_X1Y61,GTP_CHANNEL_3_X130Y202,MGTPRXP3_216
|
||||
D11,216,IPAD_X1Y43,GTP_CHANNEL_1_X130Y173,MGTPRXP1_216
|
||||
D14,16,IOB_X0Y188,LIOB33_X0Y187,IO_L6P_T0_16
|
||||
D15,16,IOB_X0Y187,LIOB33_X0Y187,IO_L6N_T0_VREF_16
|
||||
D16,16,IOB_X0Y189,LIOB33_X0Y189,IO_L5N_T0_16
|
||||
D17,16,IOB_X0Y176,LIOB33_X0Y175,IO_L12P_T1_MRCC_16
|
||||
D19,16,IOB_X0Y171,LIOB33_X0Y171,IO_L14N_T2_SRCC_16
|
||||
D20,16,IOB_X0Y162,LIOB33_X0Y161,IO_L19P_T3_16
|
||||
D21,16,IOB_X0Y153,LIOB33_X0Y153,IO_L23N_T3_16
|
||||
D22,16,IOB_X0Y155,LIOB33_X0Y155,IO_L22N_T3_16
|
||||
E1,35,IOB_X1Y144,RIOB33_X57Y143,IO_L3P_T0_DQS_AD5P_35
|
||||
E2,35,IOB_X1Y142,RIOB33_X57Y141,IO_L4P_T0_35
|
||||
E3,35,IOB_X1Y137,RIOB33_X57Y137,IO_L6N_T0_VREF_35
|
||||
E6,216,IPAD_X1Y45,GTP_COMMON_X130Y179,MGTREFCLK0N_216
|
||||
E10,216,IPAD_X1Y47,GTP_COMMON_X130Y179,MGTREFCLK1N_216
|
||||
E13,16,IOB_X0Y192,LIOB33_X0Y191,IO_L4P_T0_16
|
||||
E14,16,IOB_X0Y191,LIOB33_X0Y191,IO_L4N_T0_16
|
||||
E16,16,IOB_X0Y190,LIOB33_X0Y189,IO_L5P_T0_16
|
||||
E17,16,IOB_X0Y195,LIOB33_X0Y195,IO_L2N_T0_16
|
||||
E18,16,IOB_X0Y169,LIOB33_X0Y169,IO_L15N_T2_DQS_16
|
||||
E19,16,IOB_X0Y172,LIOB33_X0Y171,IO_L14P_T2_SRCC_16
|
||||
E21,16,IOB_X0Y154,LIOB33_X0Y153,IO_L23P_T3_16
|
||||
E22,16,IOB_X0Y156,LIOB33_X0Y155,IO_L22P_T3_16
|
||||
F1,35,IOB_X1Y139,RIOB33_X57Y139,IO_L5N_T0_AD13N_35
|
||||
F3,35,IOB_X1Y138,RIOB33_X57Y137,IO_L6P_T0_35
|
||||
F4,35,IOB_X1Y149,RIOB33_SING_X57Y149,IO_0_35
|
||||
F6,216,IPAD_X1Y44,GTP_COMMON_X130Y179,MGTREFCLK0P_216
|
||||
F10,216,IPAD_X1Y46,GTP_COMMON_X130Y179,MGTREFCLK1P_216
|
||||
F13,16,IOB_X0Y198,LIOB33_X0Y197,IO_L1P_T0_16
|
||||
F14,16,IOB_X0Y197,LIOB33_X0Y197,IO_L1N_T0_16
|
||||
F15,16,IOB_X0Y199,LIOB33_SING_X0Y199,IO_0_16
|
||||
F16,16,IOB_X0Y196,LIOB33_X0Y195,IO_L2P_T0_16
|
||||
F18,16,IOB_X0Y170,LIOB33_X0Y169,IO_L15P_T2_DQS_16
|
||||
F19,16,IOB_X0Y164,LIOB33_X0Y163,IO_L18P_T2_16
|
||||
F20,16,IOB_X0Y163,LIOB33_X0Y163,IO_L18N_T2_16
|
||||
F21,16,IOB_X0Y150,LIOB33_SING_X0Y150,IO_25_16
|
||||
G1,35,IOB_X1Y140,RIOB33_X57Y139,IO_L5P_T0_AD13P_35
|
||||
G2,35,IOB_X1Y133,RIOB33_X57Y133,IO_L8N_T1_AD14N_35
|
||||
G3,35,IOB_X1Y127,RIOB33_X57Y127,IO_L11N_T1_SRCC_35
|
||||
G4,35,IOB_X1Y125,RIOB33_X57Y125,IO_L12N_T1_MRCC_35
|
||||
G13,15,IOB_X0Y147,LIOB33_X0Y147,IO_L1N_T0_AD0N_15
|
||||
G15,15,IOB_X0Y146,LIOB33_X0Y145,IO_L2P_T0_AD8P_15
|
||||
G16,15,IOB_X0Y145,LIOB33_X0Y145,IO_L2N_T0_AD8N_15
|
||||
G17,15,IOB_X0Y142,LIOB33_X0Y141,IO_L4P_T0_15
|
||||
G18,15,IOB_X0Y141,LIOB33_X0Y141,IO_L4N_T0_15
|
||||
G20,15,IOB_X0Y133,LIOB33_X0Y133,IO_L8N_T1_AD10N_15
|
||||
G21,16,IOB_X0Y152,LIOB33_X0Y151,IO_L24P_T3_16
|
||||
G22,16,IOB_X0Y151,LIOB33_X0Y151,IO_L24N_T3_16
|
||||
H2,35,IOB_X1Y134,RIOB33_X57Y133,IO_L8P_T1_AD14P_35
|
||||
H3,35,IOB_X1Y128,RIOB33_X57Y127,IO_L11P_T1_SRCC_35
|
||||
H4,35,IOB_X1Y126,RIOB33_X57Y125,IO_L12P_T1_MRCC_35
|
||||
H5,35,IOB_X1Y129,RIOB33_X57Y129,IO_L10N_T1_AD15N_35
|
||||
H13,15,IOB_X0Y148,LIOB33_X0Y147,IO_L1P_T0_AD0P_15
|
||||
H14,15,IOB_X0Y143,LIOB33_X0Y143,IO_L3N_T0_DQS_AD1N_15
|
||||
H15,15,IOB_X0Y139,LIOB33_X0Y139,IO_L5N_T0_AD9N_15
|
||||
H17,15,IOB_X0Y138,LIOB33_X0Y137,IO_L6P_T0_15
|
||||
H18,15,IOB_X0Y137,LIOB33_X0Y137,IO_L6N_T0_VREF_15
|
||||
H19,15,IOB_X0Y125,LIOB33_X0Y125,IO_L12N_T1_MRCC_15
|
||||
H20,15,IOB_X0Y134,LIOB33_X0Y133,IO_L8P_T1_AD10P_15
|
||||
H22,15,IOB_X0Y135,LIOB33_X0Y135,IO_L7N_T1_AD2N_15
|
||||
J1,35,IOB_X1Y135,RIOB33_X57Y135,IO_L7N_T1_AD6N_35
|
||||
J2,35,IOB_X1Y131,RIOB33_X57Y131,IO_L9N_T1_DQS_AD7N_35
|
||||
J4,35,IOB_X1Y123,RIOB33_X57Y123,IO_L13N_T2_MRCC_35
|
||||
J5,35,IOB_X1Y130,RIOB33_X57Y129,IO_L10P_T1_AD15P_35
|
||||
J6,35,IOB_X1Y115,RIOB33_X57Y115,IO_L17N_T2_35
|
||||
J14,15,IOB_X0Y144,LIOB33_X0Y143,IO_L3P_T0_DQS_AD1P_15
|
||||
J15,15,IOB_X0Y140,LIOB33_X0Y139,IO_L5P_T0_AD9P_15
|
||||
J16,15,IOB_X0Y149,LIOB33_SING_X0Y149,IO_0_15
|
||||
J17,15,IOB_X0Y107,LIOB33_X0Y107,IO_L21N_T3_DQS_A18_15
|
||||
J19,15,IOB_X0Y126,LIOB33_X0Y125,IO_L12P_T1_MRCC_15
|
||||
J20,15,IOB_X0Y128,LIOB33_X0Y127,IO_L11P_T1_SRCC_15
|
||||
J21,15,IOB_X0Y127,LIOB33_X0Y127,IO_L11N_T1_SRCC_15
|
||||
J22,15,IOB_X0Y136,LIOB33_X0Y135,IO_L7P_T1_AD2P_15
|
||||
K1,35,IOB_X1Y136,RIOB33_X57Y135,IO_L7P_T1_AD6P_35
|
||||
K2,35,IOB_X1Y132,RIOB33_X57Y131,IO_L9P_T1_DQS_AD7P_35
|
||||
K3,35,IOB_X1Y121,RIOB33_X57Y121,IO_L14N_T2_SRCC_35
|
||||
K4,35,IOB_X1Y124,RIOB33_X57Y123,IO_L13P_T2_MRCC_35
|
||||
K6,35,IOB_X1Y116,RIOB33_X57Y115,IO_L17P_T2_35
|
||||
K13,15,IOB_X0Y112,LIOB33_X0Y111,IO_L19P_T3_A22_15
|
||||
K14,15,IOB_X0Y111,LIOB33_X0Y111,IO_L19N_T3_A21_VREF_15
|
||||
K16,15,IOB_X0Y103,LIOB33_X0Y103,IO_L23N_T3_FWE_B_15
|
||||
K17,15,IOB_X0Y108,LIOB33_X0Y107,IO_L21P_T3_DQS_15
|
||||
K18,15,IOB_X0Y124,LIOB33_X0Y123,IO_L13P_T2_MRCC_15
|
||||
K19,15,IOB_X0Y123,LIOB33_X0Y123,IO_L13N_T2_MRCC_15
|
||||
K21,15,IOB_X0Y132,LIOB33_X0Y131,IO_L9P_T1_DQS_AD3P_15
|
||||
K22,15,IOB_X0Y131,LIOB33_X0Y131,IO_L9N_T1_DQS_AD3N_15
|
||||
L1,35,IOB_X1Y119,RIOB33_X57Y119,IO_L15N_T2_DQS_35
|
||||
L3,35,IOB_X1Y122,RIOB33_X57Y121,IO_L14P_T2_SRCC_35
|
||||
L4,35,IOB_X1Y113,RIOB33_X57Y113,IO_L18N_T2_35
|
||||
L5,35,IOB_X1Y114,RIOB33_X57Y113,IO_L18P_T2_35
|
||||
L6,35,IOB_X1Y100,RIOB33_SING_X57Y100,IO_25_35
|
||||
L10,0,IPAD_X0Y30,MONITOR_BOT_X46Y131,VP_0
|
||||
L13,15,IOB_X0Y109,LIOB33_X0Y109,IO_L20N_T3_A19_15
|
||||
L14,15,IOB_X0Y106,LIOB33_X0Y105,IO_L22P_T3_A17_15
|
||||
L15,15,IOB_X0Y105,LIOB33_X0Y105,IO_L22N_T3_A16_15
|
||||
L16,15,IOB_X0Y104,LIOB33_X0Y103,IO_L23P_T3_FOE_B_15
|
||||
L18,15,IOB_X0Y117,LIOB33_X0Y117,IO_L16N_T2_A27_15
|
||||
L19,15,IOB_X0Y122,LIOB33_X0Y121,IO_L14P_T2_SRCC_15
|
||||
L20,15,IOB_X0Y121,LIOB33_X0Y121,IO_L14N_T2_SRCC_15
|
||||
L21,15,IOB_X0Y129,LIOB33_X0Y129,IO_L10N_T1_AD11N_15
|
||||
M1,35,IOB_X1Y120,RIOB33_X57Y119,IO_L15P_T2_DQS_35
|
||||
M2,35,IOB_X1Y117,RIOB33_X57Y117,IO_L16N_T2_35
|
||||
M3,35,IOB_X1Y118,RIOB33_X57Y117,IO_L16P_T2_35
|
||||
M5,35,IOB_X1Y103,RIOB33_X57Y103,IO_L23N_T3_35
|
||||
M6,35,IOB_X1Y104,RIOB33_X57Y103,IO_L23P_T3_35
|
||||
M9,0,IPAD_X0Y31,MONITOR_BOT_X46Y131,VN_0
|
||||
M13,15,IOB_X0Y110,LIOB33_X0Y109,IO_L20P_T3_A20_15
|
||||
M15,15,IOB_X0Y102,LIOB33_X0Y101,IO_L24P_T3_RS1_15
|
||||
M16,15,IOB_X0Y101,LIOB33_X0Y101,IO_L24N_T3_RS0_15
|
||||
M17,15,IOB_X0Y100,LIOB33_SING_X0Y100,IO_25_15
|
||||
M18,15,IOB_X0Y118,LIOB33_X0Y117,IO_L16P_T2_A28_15
|
||||
M20,15,IOB_X0Y113,LIOB33_X0Y113,IO_L18N_T2_A23_15
|
||||
M21,15,IOB_X0Y130,LIOB33_X0Y129,IO_L10P_T1_AD11P_15
|
||||
M22,15,IOB_X0Y119,LIOB33_X0Y119,IO_L15N_T2_DQS_ADV_B_15
|
||||
N2,35,IOB_X1Y105,RIOB33_X57Y105,IO_L22N_T3_35
|
||||
N3,35,IOB_X1Y111,RIOB33_X57Y111,IO_L19N_T3_VREF_35
|
||||
N4,35,IOB_X1Y112,RIOB33_X57Y111,IO_L19P_T3_35
|
||||
N5,35,IOB_X1Y101,RIOB33_X57Y101,IO_L24N_T3_35
|
||||
N13,14,IOB_X0Y54,LIOB33_X0Y53,IO_L23P_T3_A03_D19_14
|
||||
N14,14,IOB_X0Y53,LIOB33_X0Y53,IO_L23N_T3_A02_D18_14
|
||||
N15,14,IOB_X0Y50,LIOB33_SING_X0Y50,IO_25_14
|
||||
N17,14,IOB_X0Y58,LIOB33_X0Y57,IO_L21P_T3_DQS_14
|
||||
N18,15,IOB_X0Y116,LIOB33_X0Y115,IO_L17P_T2_A26_15
|
||||
N19,15,IOB_X0Y115,LIOB33_X0Y115,IO_L17N_T2_A25_15
|
||||
N20,15,IOB_X0Y114,LIOB33_X0Y113,IO_L18P_T2_A24_15
|
||||
N22,15,IOB_X0Y120,LIOB33_X0Y119,IO_L15P_T2_DQS_15
|
||||
P1,35,IOB_X1Y109,RIOB33_X57Y109,IO_L20N_T3_35
|
||||
P2,35,IOB_X1Y106,RIOB33_X57Y105,IO_L22P_T3_35
|
||||
P4,35,IOB_X1Y107,RIOB33_X57Y107,IO_L21N_T3_DQS_35
|
||||
P5,35,IOB_X1Y108,RIOB33_X57Y107,IO_L21P_T3_DQS_35
|
||||
P6,35,IOB_X1Y102,RIOB33_X57Y101,IO_L24P_T3_35
|
||||
P14,14,IOB_X0Y62,LIOB33_X0Y61,IO_L19P_T3_A10_D26_14
|
||||
P15,14,IOB_X0Y56,LIOB33_X0Y55,IO_L22P_T3_A05_D21_14
|
||||
P16,14,IOB_X0Y52,LIOB33_X0Y51,IO_L24P_T3_A01_D17_14
|
||||
P17,14,IOB_X0Y57,LIOB33_X0Y57,IO_L21N_T3_DQS_A06_D22_14
|
||||
P19,14,IOB_X0Y90,LIOB33_X0Y89,IO_L5P_T0_D06_14
|
||||
P20,14,IOB_X0Y99,LIOB33_SING_X0Y99,IO_0_14
|
||||
P21,14,IOB_X0Y96,LIOB33_X0Y95,IO_L2P_T0_D02_14
|
||||
P22,14,IOB_X0Y98,LIOB33_X0Y97,IO_L1P_T0_D00_MOSI_14
|
||||
R1,35,IOB_X1Y110,RIOB33_X57Y109,IO_L20P_T3_35
|
||||
R2,34,IOB_X1Y93,RIOB33_X57Y93,IO_L3N_T0_DQS_34
|
||||
R3,34,IOB_X1Y94,RIOB33_X57Y93,IO_L3P_T0_DQS_34
|
||||
R4,34,IOB_X1Y74,RIOB33_X57Y73,IO_L13P_T2_MRCC_34
|
||||
R6,34,IOB_X1Y66,RIOB33_X57Y65,IO_L17P_T2_34
|
||||
R14,14,IOB_X0Y61,LIOB33_X0Y61,IO_L19N_T3_A09_D25_VREF_14
|
||||
R16,14,IOB_X0Y55,LIOB33_X0Y55,IO_L22N_T3_A04_D20_14
|
||||
R17,14,IOB_X0Y51,LIOB33_X0Y51,IO_L24N_T3_A00_D16_14
|
||||
R18,14,IOB_X0Y60,LIOB33_X0Y59,IO_L20P_T3_A08_D24_14
|
||||
R19,14,IOB_X0Y89,LIOB33_X0Y89,IO_L5N_T0_D07_14
|
||||
R21,14,IOB_X0Y95,LIOB33_X0Y95,IO_L2N_T0_D03_14
|
||||
R22,14,IOB_X0Y97,LIOB33_X0Y97,IO_L1N_T0_D01_DIN_14
|
||||
T1,34,IOB_X1Y98,RIOB33_X57Y97,IO_L1P_T0_34
|
||||
T3,34,IOB_X1Y99,RIOB33_SING_X57Y99,IO_0_34
|
||||
T4,34,IOB_X1Y73,RIOB33_X57Y73,IO_L13N_T2_MRCC_34
|
||||
T5,34,IOB_X1Y72,RIOB33_X57Y71,IO_L14P_T2_SRCC_34
|
||||
T6,34,IOB_X1Y65,RIOB33_X57Y65,IO_L17N_T2_34
|
||||
T14,13,IOB_X0Y20,LIOB33_X0Y19,IO_L15P_T2_DQS_13
|
||||
T15,13,IOB_X0Y19,LIOB33_X0Y19,IO_L15N_T2_DQS_13
|
||||
T16,13,IOB_X0Y16,LIOB33_X0Y15,IO_L17P_T2_13
|
||||
T18,14,IOB_X0Y59,LIOB33_X0Y59,IO_L20N_T3_A07_D23_14
|
||||
T19,14,IOB_X0Y88,LIOB33_X0Y87,IO_L6P_T0_FCS_B_14
|
||||
T20,14,IOB_X0Y87,LIOB33_X0Y87,IO_L6N_T0_D08_VREF_14
|
||||
T21,14,IOB_X0Y92,LIOB33_X0Y91,IO_L4P_T0_D04_14
|
||||
U1,34,IOB_X1Y97,RIOB33_X57Y97,IO_L1N_T0_34
|
||||
U2,34,IOB_X1Y96,RIOB33_X57Y95,IO_L2P_T0_34
|
||||
U3,34,IOB_X1Y88,RIOB33_X57Y87,IO_L6P_T0_34
|
||||
U5,34,IOB_X1Y71,RIOB33_X57Y71,IO_L14N_T2_SRCC_34
|
||||
U6,34,IOB_X1Y68,RIOB33_X57Y67,IO_L16P_T2_34
|
||||
U7,34,IOB_X1Y50,RIOB33_SING_X57Y50,IO_25_34
|
||||
U15,13,IOB_X0Y22,LIOB33_X0Y21,IO_L14P_T2_SRCC_13
|
||||
U16,13,IOB_X0Y15,LIOB33_X0Y15,IO_L17N_T2_13
|
||||
U17,14,IOB_X0Y64,LIOB33_X0Y63,IO_L18P_T2_A12_D28_14
|
||||
U18,14,IOB_X0Y63,LIOB33_X0Y63,IO_L18N_T2_A11_D27_14
|
||||
U20,14,IOB_X0Y78,LIOB33_X0Y77,IO_L11P_T1_SRCC_14
|
||||
U21,14,IOB_X0Y91,LIOB33_X0Y91,IO_L4N_T0_D05_14
|
||||
U22,14,IOB_X0Y94,LIOB33_X0Y93,IO_L3P_T0_DQS_PUDC_B_14
|
||||
V2,34,IOB_X1Y95,RIOB33_X57Y95,IO_L2N_T0_34
|
||||
V3,34,IOB_X1Y87,RIOB33_X57Y87,IO_L6N_T0_VREF_34
|
||||
V4,34,IOB_X1Y76,RIOB33_X57Y75,IO_L12P_T1_MRCC_34
|
||||
V5,34,IOB_X1Y67,RIOB33_X57Y67,IO_L16N_T2_34
|
||||
V7,34,IOB_X1Y62,RIOB33_X57Y61,IO_L19P_T3_34
|
||||
V8,34,IOB_X1Y57,RIOB33_X57Y57,IO_L21N_T3_DQS_34
|
||||
V9,34,IOB_X1Y58,RIOB33_X57Y57,IO_L21P_T3_DQS_34
|
||||
V10,13,IOB_X0Y30,LIOB33_X0Y29,IO_L10P_T1_13
|
||||
V13,13,IOB_X0Y24,LIOB33_X0Y23,IO_L13P_T2_MRCC_13
|
||||
V14,13,IOB_X0Y23,LIOB33_X0Y23,IO_L13N_T2_MRCC_13
|
||||
V15,13,IOB_X0Y21,LIOB33_X0Y21,IO_L14N_T2_SRCC_13
|
||||
V17,14,IOB_X0Y68,LIOB33_X0Y67,IO_L16P_T2_CSI_B_14
|
||||
V18,14,IOB_X0Y72,LIOB33_X0Y71,IO_L14P_T2_SRCC_14
|
||||
V19,14,IOB_X0Y71,LIOB33_X0Y71,IO_L14N_T2_SRCC_14
|
||||
V20,14,IOB_X0Y77,LIOB33_X0Y77,IO_L11N_T1_SRCC_14
|
||||
V22,14,IOB_X0Y93,LIOB33_X0Y93,IO_L3N_T0_DQS_EMCCLK_14
|
||||
W1,34,IOB_X1Y90,RIOB33_X57Y89,IO_L5P_T0_34
|
||||
W2,34,IOB_X1Y92,RIOB33_X57Y91,IO_L4P_T0_34
|
||||
W4,34,IOB_X1Y75,RIOB33_X57Y75,IO_L12N_T1_MRCC_34
|
||||
W5,34,IOB_X1Y69,RIOB33_X57Y69,IO_L15N_T2_DQS_34
|
||||
W6,34,IOB_X1Y70,RIOB33_X57Y69,IO_L15P_T2_DQS_34
|
||||
W7,34,IOB_X1Y61,RIOB33_X57Y61,IO_L19N_T3_VREF_34
|
||||
W9,34,IOB_X1Y52,RIOB33_X57Y51,IO_L24P_T3_34
|
||||
W10,13,IOB_X0Y29,LIOB33_X0Y29,IO_L10N_T1_13
|
||||
W11,13,IOB_X0Y26,LIOB33_X0Y25,IO_L12P_T1_MRCC_13
|
||||
W12,13,IOB_X0Y25,LIOB33_X0Y25,IO_L12N_T1_MRCC_13
|
||||
W14,13,IOB_X0Y38,LIOB33_X0Y37,IO_L6P_T0_13
|
||||
W15,13,IOB_X0Y18,LIOB33_X0Y17,IO_L16P_T2_13
|
||||
W16,13,IOB_X0Y17,LIOB33_X0Y17,IO_L16N_T2_13
|
||||
W17,14,IOB_X0Y67,LIOB33_X0Y67,IO_L16N_T2_A15_D31_14
|
||||
W19,14,IOB_X0Y76,LIOB33_X0Y75,IO_L12P_T1_MRCC_14
|
||||
W20,14,IOB_X0Y75,LIOB33_X0Y75,IO_L12N_T1_MRCC_14
|
||||
W21,14,IOB_X0Y86,LIOB33_X0Y85,IO_L7P_T1_D09_14
|
||||
W22,14,IOB_X0Y85,LIOB33_X0Y85,IO_L7N_T1_D10_14
|
||||
Y1,34,IOB_X1Y89,RIOB33_X57Y89,IO_L5N_T0_34
|
||||
Y2,34,IOB_X1Y91,RIOB33_X57Y91,IO_L4N_T0_34
|
||||
Y3,34,IOB_X1Y82,RIOB33_X57Y81,IO_L9P_T1_DQS_34
|
||||
Y4,34,IOB_X1Y78,RIOB33_X57Y77,IO_L11P_T1_SRCC_34
|
||||
Y6,34,IOB_X1Y64,RIOB33_X57Y63,IO_L18P_T2_34
|
||||
Y7,34,IOB_X1Y53,RIOB33_X57Y53,IO_L23N_T3_34
|
||||
Y8,34,IOB_X1Y54,RIOB33_X57Y53,IO_L23P_T3_34
|
||||
Y9,34,IOB_X1Y51,RIOB33_X57Y51,IO_L24N_T3_34
|
||||
Y11,13,IOB_X0Y28,LIOB33_X0Y27,IO_L11P_T1_SRCC_13
|
||||
Y12,13,IOB_X0Y27,LIOB33_X0Y27,IO_L11N_T1_SRCC_13
|
||||
Y13,13,IOB_X0Y40,LIOB33_X0Y39,IO_L5P_T0_13
|
||||
Y14,13,IOB_X0Y37,LIOB33_X0Y37,IO_L6N_T0_VREF_13
|
||||
Y16,13,IOB_X0Y48,LIOB33_X0Y47,IO_L1P_T0_13
|
||||
Y17,13,IOB_X0Y49,LIOB33_SING_X0Y49,IO_0_13
|
||||
Y18,14,IOB_X0Y74,LIOB33_X0Y73,IO_L13P_T2_MRCC_14
|
||||
Y19,14,IOB_X0Y73,LIOB33_X0Y73,IO_L13N_T2_MRCC_14
|
||||
Y21,14,IOB_X0Y82,LIOB33_X0Y81,IO_L9P_T1_DQS_14
|
||||
Y22,14,IOB_X0Y81,LIOB33_X0Y81,IO_L9N_T1_DQS_D13_14
|
||||
|
|
|
@ -0,0 +1,772 @@
|
|||
{
|
||||
"global_clock_regions": {
|
||||
"bottom": {
|
||||
"rows": {
|
||||
"0": {
|
||||
"configuration_buses": {
|
||||
"BLOCK_RAM": {
|
||||
"configuration_columns": {
|
||||
"0": {
|
||||
"frame_count": 128
|
||||
},
|
||||
"1": {
|
||||
"frame_count": 128
|
||||
},
|
||||
"2": {
|
||||
"frame_count": 128
|
||||
},
|
||||
"3": {
|
||||
"frame_count": 128
|
||||
}
|
||||
}
|
||||
},
|
||||
"CLB_IO_CLK": {
|
||||
"configuration_columns": {
|
||||
"0": {
|
||||
"frame_count": 42
|
||||
},
|
||||
"1": {
|
||||
"frame_count": 30
|
||||
},
|
||||
"2": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"3": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"4": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"5": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"6": {
|
||||
"frame_count": 28
|
||||
},
|
||||
"7": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"8": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"9": {
|
||||
"frame_count": 28
|
||||
},
|
||||
"10": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"11": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"12": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"13": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"14": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"15": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"16": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"17": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"18": {
|
||||
"frame_count": 30
|
||||
},
|
||||
"19": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"20": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"21": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"22": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"23": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"24": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"25": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"26": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"27": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"28": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"29": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"30": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"31": {
|
||||
"frame_count": 30
|
||||
},
|
||||
"32": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"33": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"34": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"35": {
|
||||
"frame_count": 28
|
||||
},
|
||||
"36": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"37": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"38": {
|
||||
"frame_count": 28
|
||||
},
|
||||
"39": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"40": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"41": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"42": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"43": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"44": {
|
||||
"frame_count": 28
|
||||
},
|
||||
"45": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"46": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"47": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"48": {
|
||||
"frame_count": 28
|
||||
},
|
||||
"49": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"50": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"51": {
|
||||
"frame_count": 28
|
||||
},
|
||||
"52": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"53": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"54": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"55": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"56": {
|
||||
"frame_count": 30
|
||||
},
|
||||
"57": {
|
||||
"frame_count": 42
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
},
|
||||
"1": {
|
||||
"configuration_buses": {
|
||||
"BLOCK_RAM": {
|
||||
"configuration_columns": {
|
||||
"0": {
|
||||
"frame_count": 128
|
||||
},
|
||||
"1": {
|
||||
"frame_count": 128
|
||||
},
|
||||
"2": {
|
||||
"frame_count": 128
|
||||
}
|
||||
}
|
||||
},
|
||||
"CLB_IO_CLK": {
|
||||
"configuration_columns": {
|
||||
"0": {
|
||||
"frame_count": 42
|
||||
},
|
||||
"1": {
|
||||
"frame_count": 30
|
||||
},
|
||||
"2": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"3": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"4": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"5": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"6": {
|
||||
"frame_count": 28
|
||||
},
|
||||
"7": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"8": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"9": {
|
||||
"frame_count": 28
|
||||
},
|
||||
"10": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"11": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"12": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"13": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"14": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"15": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"16": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"17": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"18": {
|
||||
"frame_count": 30
|
||||
},
|
||||
"19": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"20": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"21": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"22": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"23": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"24": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"25": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"26": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"27": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"28": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"29": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"30": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"31": {
|
||||
"frame_count": 30
|
||||
},
|
||||
"32": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"33": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"34": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"35": {
|
||||
"frame_count": 28
|
||||
},
|
||||
"36": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"37": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"38": {
|
||||
"frame_count": 28
|
||||
},
|
||||
"39": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"40": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"41": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"42": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"43": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"44": {
|
||||
"frame_count": 28
|
||||
},
|
||||
"45": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"46": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"47": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"48": {
|
||||
"frame_count": 28
|
||||
},
|
||||
"49": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"50": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"51": {
|
||||
"frame_count": 32
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
},
|
||||
"top": {
|
||||
"rows": {
|
||||
"0": {
|
||||
"configuration_buses": {
|
||||
"BLOCK_RAM": {
|
||||
"configuration_columns": {
|
||||
"0": {
|
||||
"frame_count": 128
|
||||
},
|
||||
"1": {
|
||||
"frame_count": 128
|
||||
},
|
||||
"2": {
|
||||
"frame_count": 128
|
||||
},
|
||||
"3": {
|
||||
"frame_count": 128
|
||||
}
|
||||
}
|
||||
},
|
||||
"CLB_IO_CLK": {
|
||||
"configuration_columns": {
|
||||
"0": {
|
||||
"frame_count": 42
|
||||
},
|
||||
"1": {
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
}
|
||||
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|
||||
}
|
||||
}
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"13": {
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"16": {
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"23": {
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"25": {
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"28": {
|
||||
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|
||||
},
|
||||
"29": {
|
||||
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|
||||
},
|
||||
"30": {
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"33": {
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
"36": {
|
||||
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|
||||
},
|
||||
"37": {
|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
},
|
||||
"39": {
|
||||
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|
||||
},
|
||||
"40": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"41": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"42": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"43": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"44": {
|
||||
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|
||||
},
|
||||
"45": {
|
||||
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|
||||
},
|
||||
"46": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"47": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"48": {
|
||||
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|
||||
},
|
||||
"49": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"50": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"51": {
|
||||
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|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
},
|
||||
"idcode": 56823955,
|
||||
"iobanks": {
|
||||
"0": "X1Y130",
|
||||
"13": "X1Y26",
|
||||
"14": "X1Y78",
|
||||
"15": "X1Y130",
|
||||
"16": "X1Y182",
|
||||
"34": "X146Y78",
|
||||
"35": "X146Y130"
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,499 @@
|
|||
!<xilinx/xc7series/part>
|
||||
idcode: 0x3631093
|
||||
global_clock_regions:
|
||||
top: !<xilinx/xc7series/global_clock_region>
|
||||
rows:
|
||||
0: !<xilinx/xc7series/row>
|
||||
configuration_buses:
|
||||
CLB_IO_CLK: !<xilinx/xc7series/configuration_bus>
|
||||
configuration_columns:
|
||||
0: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 42
|
||||
1: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
2: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
3: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
4: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
5: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
6: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
7: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
8: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
9: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
10: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
11: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
12: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
13: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
14: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
15: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
16: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
17: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
18: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
19: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
20: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
21: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
22: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
23: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
24: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
25: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
26: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
27: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
28: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
29: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
30: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
31: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
32: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
33: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
34: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
35: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
36: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
37: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
38: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
39: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
40: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
41: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
42: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
43: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
44: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
45: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
46: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
47: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
48: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
49: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
50: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
51: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
52: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
53: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
54: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
55: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
56: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
57: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 42
|
||||
BLOCK_RAM: !<xilinx/xc7series/configuration_bus>
|
||||
configuration_columns:
|
||||
0: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
1: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
2: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
3: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
1: !<xilinx/xc7series/row>
|
||||
configuration_buses:
|
||||
CLB_IO_CLK: !<xilinx/xc7series/configuration_bus>
|
||||
configuration_columns:
|
||||
0: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 42
|
||||
1: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
2: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
3: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
4: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
5: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
6: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
7: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
8: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
9: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
10: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
11: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
12: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
13: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
14: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
15: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
16: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
17: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
18: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
19: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
20: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
21: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
22: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
23: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
24: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
25: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
26: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
27: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
28: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
29: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
30: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
31: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
32: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
33: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
34: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
35: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
36: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
37: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
38: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
39: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
40: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
41: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
42: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
43: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
44: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
45: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
46: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
47: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
48: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
49: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
50: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
51: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 32
|
||||
BLOCK_RAM: !<xilinx/xc7series/configuration_bus>
|
||||
configuration_columns:
|
||||
0: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
1: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
2: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
bottom: !<xilinx/xc7series/global_clock_region>
|
||||
rows:
|
||||
0: !<xilinx/xc7series/row>
|
||||
configuration_buses:
|
||||
CLB_IO_CLK: !<xilinx/xc7series/configuration_bus>
|
||||
configuration_columns:
|
||||
0: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 42
|
||||
1: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
2: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
3: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
4: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
5: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
6: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
7: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
8: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
9: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
10: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
11: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
12: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
13: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
14: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
15: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
16: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
17: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
18: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
19: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
20: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
21: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
22: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
23: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
24: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
25: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
26: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
27: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
28: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
29: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
30: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
31: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
32: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
33: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
34: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
35: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
36: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
37: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
38: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
39: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
40: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
41: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
42: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
43: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
44: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
45: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
46: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
47: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
48: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
49: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
50: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
51: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
52: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
53: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
54: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
55: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
56: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
57: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 42
|
||||
BLOCK_RAM: !<xilinx/xc7series/configuration_bus>
|
||||
configuration_columns:
|
||||
0: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
1: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
2: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
3: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
1: !<xilinx/xc7series/row>
|
||||
configuration_buses:
|
||||
CLB_IO_CLK: !<xilinx/xc7series/configuration_bus>
|
||||
configuration_columns:
|
||||
0: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 42
|
||||
1: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
2: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
3: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
4: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
5: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
6: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
7: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
8: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
9: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
10: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
11: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
12: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
13: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
14: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
15: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
16: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
17: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
18: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
19: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
20: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
21: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
22: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
23: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
24: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
25: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
26: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
27: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
28: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
29: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
30: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
31: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
32: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
33: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
34: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
35: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
36: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
37: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
38: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
39: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
40: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
41: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
42: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
43: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
44: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
45: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
46: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
47: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
48: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
49: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
50: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
51: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 32
|
||||
BLOCK_RAM: !<xilinx/xc7series/configuration_bus>
|
||||
configuration_columns:
|
||||
0: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
1: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
2: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -17,11 +17,16 @@ bit 38_42
|
|||
bit 38_44
|
||||
bit 38_62
|
||||
bit 38_64
|
||||
bit 38_74
|
||||
bit 38_76
|
||||
bit 38_82
|
||||
bit 38_84
|
||||
bit 38_86
|
||||
bit 38_92
|
||||
bit 38_94
|
||||
bit 38_98
|
||||
bit 38_100
|
||||
bit 38_102
|
||||
bit 38_106
|
||||
bit 38_110
|
||||
bit 38_112
|
||||
|
|
@ -45,12 +50,15 @@ bit 39_59
|
|||
bit 39_61
|
||||
bit 39_63
|
||||
bit 39_65
|
||||
bit 39_75
|
||||
bit 39_83
|
||||
bit 39_85
|
||||
bit 39_87
|
||||
bit 39_89
|
||||
bit 39_93
|
||||
bit 39_95
|
||||
bit 39_97
|
||||
bit 39_101
|
||||
bit 39_105
|
||||
bit 39_107
|
||||
bit 39_109
|
||||
|
|
|
|||
|
|
@ -17,11 +17,16 @@ bit 38_42
|
|||
bit 38_44
|
||||
bit 38_62
|
||||
bit 38_64
|
||||
bit 38_74
|
||||
bit 38_76
|
||||
bit 38_82
|
||||
bit 38_84
|
||||
bit 38_86
|
||||
bit 38_92
|
||||
bit 38_94
|
||||
bit 38_98
|
||||
bit 38_100
|
||||
bit 38_102
|
||||
bit 38_106
|
||||
bit 38_110
|
||||
bit 38_112
|
||||
|
|
@ -45,12 +50,15 @@ bit 39_59
|
|||
bit 39_61
|
||||
bit 39_63
|
||||
bit 39_65
|
||||
bit 39_75
|
||||
bit 39_83
|
||||
bit 39_85
|
||||
bit 39_87
|
||||
bit 39_89
|
||||
bit 39_93
|
||||
bit 39_95
|
||||
bit 39_97
|
||||
bit 39_101
|
||||
bit 39_105
|
||||
bit 39_107
|
||||
bit 39_109
|
||||
|
|
|
|||
|
|
@ -1,3 +1,159 @@
|
|||
DSP_L.DSP_0_CEAD.DSP_GND_L 26_63
|
||||
DSP_L.DSP_0_CEAD.DSP_VCC_L 27_62
|
||||
DSP_L.DSP_0_CEALUMODE.DSP_GND_L 27_51
|
||||
DSP_L.DSP_0_CEALUMODE.DSP_VCC_L 26_50
|
||||
DSP_L.DSP_0_CED.DSP_GND_L 27_72
|
||||
DSP_L.DSP_0_CED.DSP_VCC_L 26_72
|
||||
DSP_L.DSP_0_CEINMODE.DSP_GND_L 26_69
|
||||
DSP_L.DSP_0_CEINMODE.DSP_VCC_L 26_67
|
||||
DSP_L.DSP_0_RSTD.DSP_GND_L 27_96
|
||||
DSP_L.DSP_0_RSTD.DSP_VCC_L 27_85
|
||||
DSP_L.DSP_0_ALUMODE2.DSP_GND_L 27_56
|
||||
DSP_L.DSP_0_ALUMODE2.DSP_VCC_L 26_55
|
||||
DSP_L.DSP_0_ALUMODE3.DSP_GND_L 27_60
|
||||
DSP_L.DSP_0_ALUMODE3.DSP_VCC_L 26_53
|
||||
DSP_L.DSP_0_CARRYINSEL2.DSP_GND_L 26_17
|
||||
DSP_L.DSP_0_CARRYINSEL2.DSP_VCC_L 27_18
|
||||
DSP_L.DSP_0_D0.DSP_GND_L 26_65
|
||||
DSP_L.DSP_0_D0.DSP_VCC_L 27_64
|
||||
DSP_L.DSP_0_D1.DSP_GND_L 27_68
|
||||
DSP_L.DSP_0_D1.DSP_VCC_L 27_74
|
||||
DSP_L.DSP_0_D2.DSP_GND_L 27_71
|
||||
DSP_L.DSP_0_D2.DSP_VCC_L 27_70
|
||||
DSP_L.DSP_0_D3.DSP_GND_L 26_75
|
||||
DSP_L.DSP_0_D3.DSP_VCC_L 26_73
|
||||
DSP_L.DSP_0_D4.DSP_GND_L 27_78
|
||||
DSP_L.DSP_0_D4.DSP_VCC_L 26_77
|
||||
DSP_L.DSP_0_D5.DSP_GND_L 26_82
|
||||
DSP_L.DSP_0_D5.DSP_VCC_L 26_81
|
||||
DSP_L.DSP_0_D6.DSP_GND_L 26_89
|
||||
DSP_L.DSP_0_D6.DSP_VCC_L 27_89
|
||||
DSP_L.DSP_0_D7.DSP_GND_L 27_91
|
||||
DSP_L.DSP_0_D7.DSP_VCC_L 26_91
|
||||
DSP_L.DSP_0_D8.DSP_GND_L 26_98
|
||||
DSP_L.DSP_0_D8.DSP_VCC_L 27_97
|
||||
DSP_L.DSP_0_D9.DSP_GND_L 26_101
|
||||
DSP_L.DSP_0_D9.DSP_VCC_L 26_99
|
||||
DSP_L.DSP_0_D10.DSP_GND_L 26_105
|
||||
DSP_L.DSP_0_D10.DSP_VCC_L 26_103
|
||||
DSP_L.DSP_0_D11.DSP_GND_L 27_107
|
||||
DSP_L.DSP_0_D11.DSP_VCC_L 27_105
|
||||
DSP_L.DSP_0_D12.DSP_GND_L 26_107
|
||||
DSP_L.DSP_0_D12.DSP_VCC_L 26_111
|
||||
DSP_L.DSP_0_D13.DSP_GND_L 27_113
|
||||
DSP_L.DSP_0_D13.DSP_VCC_L 26_114
|
||||
DSP_L.DSP_0_D14.DSP_GND_L 26_118
|
||||
DSP_L.DSP_0_D14.DSP_VCC_L 27_116
|
||||
DSP_L.DSP_0_D15.DSP_GND_L 27_122
|
||||
DSP_L.DSP_0_D15.DSP_VCC_L 27_120
|
||||
DSP_L.DSP_0_D16.DSP_GND_L 27_125
|
||||
DSP_L.DSP_0_D16.DSP_VCC_L 26_125
|
||||
DSP_L.DSP_0_D17.DSP_GND_L 27_128
|
||||
DSP_L.DSP_0_D17.DSP_VCC_L 27_126
|
||||
DSP_L.DSP_0_D18.DSP_GND_L 26_135
|
||||
DSP_L.DSP_0_D18.DSP_VCC_L 26_131
|
||||
DSP_L.DSP_0_D19.DSP_GND_L 27_140
|
||||
DSP_L.DSP_0_D19.DSP_VCC_L 26_140
|
||||
DSP_L.DSP_0_D20.DSP_GND_L 26_145
|
||||
DSP_L.DSP_0_D20.DSP_VCC_L 27_143
|
||||
DSP_L.DSP_0_D21.DSP_GND_L 27_147
|
||||
DSP_L.DSP_0_D21.DSP_VCC_L 26_147
|
||||
DSP_L.DSP_0_D22.DSP_GND_L 27_151
|
||||
DSP_L.DSP_0_D22.DSP_VCC_L 26_150
|
||||
DSP_L.DSP_0_D23.DSP_GND_L 27_154
|
||||
DSP_L.DSP_0_D23.DSP_VCC_L 27_153
|
||||
DSP_L.DSP_0_D24.DSP_GND_L 27_158
|
||||
DSP_L.DSP_0_D24.DSP_VCC_L 27_155
|
||||
DSP_L.DSP_0_INMODE0.DSP_GND_L 27_134
|
||||
DSP_L.DSP_0_INMODE0.DSP_VCC_L 27_130
|
||||
DSP_L.DSP_0_INMODE1.DSP_GND_L 26_133
|
||||
DSP_L.DSP_0_INMODE1.DSP_VCC_L 27_145
|
||||
DSP_L.DSP_0_INMODE2.DSP_GND_L 27_80
|
||||
DSP_L.DSP_0_INMODE2.DSP_VCC_L 26_71
|
||||
DSP_L.DSP_0_INMODE3.DSP_GND_L 27_79
|
||||
DSP_L.DSP_0_INMODE3.DSP_VCC_L 26_70
|
||||
DSP_L.DSP_0_INMODE4.DSP_GND_L 26_58
|
||||
DSP_L.DSP_0_INMODE4.DSP_VCC_L 26_46
|
||||
DSP_L.DSP_0_OPMODE6.DSP_GND_L 27_12
|
||||
DSP_L.DSP_0_OPMODE6.DSP_VCC_L 27_20
|
||||
DSP_L.DSP_1_CEAD.DSP_GND_L 26_223
|
||||
DSP_L.DSP_1_CEAD.DSP_VCC_L 27_222
|
||||
DSP_L.DSP_1_CEALUMODE.DSP_GND_L 27_211
|
||||
DSP_L.DSP_1_CEALUMODE.DSP_VCC_L 26_210
|
||||
DSP_L.DSP_1_CED.DSP_GND_L 27_232
|
||||
DSP_L.DSP_1_CED.DSP_VCC_L 26_232
|
||||
DSP_L.DSP_1_CEINMODE.DSP_GND_L 26_229
|
||||
DSP_L.DSP_1_CEINMODE.DSP_VCC_L 26_227
|
||||
DSP_L.DSP_1_RSTD.DSP_GND_L 27_256
|
||||
DSP_L.DSP_1_RSTD.DSP_VCC_L 27_245
|
||||
DSP_L.DSP_1_ALUMODE2.DSP_GND_L 27_216
|
||||
DSP_L.DSP_1_ALUMODE2.DSP_VCC_L 26_215
|
||||
DSP_L.DSP_1_ALUMODE3.DSP_GND_L 27_220
|
||||
DSP_L.DSP_1_ALUMODE3.DSP_VCC_L 26_213
|
||||
DSP_L.DSP_1_CARRYINSEL2.DSP_GND_L 26_177
|
||||
DSP_L.DSP_1_CARRYINSEL2.DSP_VCC_L 27_178
|
||||
DSP_L.DSP_1_D0.DSP_GND_L 26_225
|
||||
DSP_L.DSP_1_D0.DSP_VCC_L 27_224
|
||||
DSP_L.DSP_1_D1.DSP_GND_L 27_228
|
||||
DSP_L.DSP_1_D1.DSP_VCC_L 27_234
|
||||
DSP_L.DSP_1_D2.DSP_GND_L 27_231
|
||||
DSP_L.DSP_1_D2.DSP_VCC_L 27_230
|
||||
DSP_L.DSP_1_D3.DSP_GND_L 26_235
|
||||
DSP_L.DSP_1_D3.DSP_VCC_L 26_233
|
||||
DSP_L.DSP_1_D4.DSP_GND_L 27_238
|
||||
DSP_L.DSP_1_D4.DSP_VCC_L 26_237
|
||||
DSP_L.DSP_1_D5.DSP_GND_L 26_242
|
||||
DSP_L.DSP_1_D5.DSP_VCC_L 26_241
|
||||
DSP_L.DSP_1_D6.DSP_GND_L 26_249
|
||||
DSP_L.DSP_1_D6.DSP_VCC_L 27_249
|
||||
DSP_L.DSP_1_D7.DSP_GND_L 27_251
|
||||
DSP_L.DSP_1_D7.DSP_VCC_L 26_251
|
||||
DSP_L.DSP_1_D8.DSP_GND_L 26_258
|
||||
DSP_L.DSP_1_D8.DSP_VCC_L 27_257
|
||||
DSP_L.DSP_1_D9.DSP_GND_L 26_261
|
||||
DSP_L.DSP_1_D9.DSP_VCC_L 26_259
|
||||
DSP_L.DSP_1_D10.DSP_GND_L 26_265
|
||||
DSP_L.DSP_1_D10.DSP_VCC_L 26_263
|
||||
DSP_L.DSP_1_D11.DSP_GND_L 27_267
|
||||
DSP_L.DSP_1_D11.DSP_VCC_L 27_265
|
||||
DSP_L.DSP_1_D12.DSP_GND_L 26_267
|
||||
DSP_L.DSP_1_D12.DSP_VCC_L 26_271
|
||||
DSP_L.DSP_1_D13.DSP_GND_L 27_273
|
||||
DSP_L.DSP_1_D13.DSP_VCC_L 26_274
|
||||
DSP_L.DSP_1_D14.DSP_GND_L 26_278
|
||||
DSP_L.DSP_1_D14.DSP_VCC_L 27_276
|
||||
DSP_L.DSP_1_D15.DSP_GND_L 27_282
|
||||
DSP_L.DSP_1_D15.DSP_VCC_L 27_280
|
||||
DSP_L.DSP_1_D16.DSP_GND_L 27_285
|
||||
DSP_L.DSP_1_D16.DSP_VCC_L 26_285
|
||||
DSP_L.DSP_1_D17.DSP_GND_L 27_288
|
||||
DSP_L.DSP_1_D17.DSP_VCC_L 27_286
|
||||
DSP_L.DSP_1_D18.DSP_GND_L 26_295
|
||||
DSP_L.DSP_1_D18.DSP_VCC_L 26_291
|
||||
DSP_L.DSP_1_D19.DSP_GND_L 27_300
|
||||
DSP_L.DSP_1_D19.DSP_VCC_L 26_300
|
||||
DSP_L.DSP_1_D20.DSP_GND_L 26_305
|
||||
DSP_L.DSP_1_D20.DSP_VCC_L 27_303
|
||||
DSP_L.DSP_1_D21.DSP_GND_L 27_307
|
||||
DSP_L.DSP_1_D21.DSP_VCC_L 26_307
|
||||
DSP_L.DSP_1_D22.DSP_GND_L 27_311
|
||||
DSP_L.DSP_1_D22.DSP_VCC_L 26_310
|
||||
DSP_L.DSP_1_D23.DSP_GND_L 27_314
|
||||
DSP_L.DSP_1_D23.DSP_VCC_L 27_313
|
||||
DSP_L.DSP_1_D24.DSP_GND_L 27_318
|
||||
DSP_L.DSP_1_D24.DSP_VCC_L 27_315
|
||||
DSP_L.DSP_1_INMODE0.DSP_GND_L 27_294
|
||||
DSP_L.DSP_1_INMODE0.DSP_VCC_L 27_290
|
||||
DSP_L.DSP_1_INMODE1.DSP_GND_L 26_293
|
||||
DSP_L.DSP_1_INMODE1.DSP_VCC_L 27_305
|
||||
DSP_L.DSP_1_INMODE2.DSP_GND_L 27_240
|
||||
DSP_L.DSP_1_INMODE2.DSP_VCC_L 26_231
|
||||
DSP_L.DSP_1_INMODE3.DSP_GND_L 27_239
|
||||
DSP_L.DSP_1_INMODE3.DSP_VCC_L 26_230
|
||||
DSP_L.DSP_1_INMODE4.DSP_GND_L 26_218
|
||||
DSP_L.DSP_1_INMODE4.DSP_VCC_L 26_206
|
||||
DSP_L.DSP_1_OPMODE6.DSP_GND_L 27_172
|
||||
DSP_L.DSP_1_OPMODE6.DSP_VCC_L 27_180
|
||||
DSP_L.DSP48.DSP_0.A_INPUT[0] 27_84
|
||||
DSP_L.DSP48.DSP_0.AREG_0 26_113 26_137 27_111
|
||||
DSP_L.DSP48.DSP_0.AREG_2 27_136
|
||||
|
|
|
|||
|
|
@ -1,3 +1,159 @@
|
|||
DSP_L.DSP_0_CEAD.DSP_GND_L origin:101-dsp-pips 26_63
|
||||
DSP_L.DSP_0_CEAD.DSP_VCC_L origin:101-dsp-pips 27_62
|
||||
DSP_L.DSP_0_CEALUMODE.DSP_GND_L origin:101-dsp-pips 27_51
|
||||
DSP_L.DSP_0_CEALUMODE.DSP_VCC_L origin:101-dsp-pips 26_50
|
||||
DSP_L.DSP_0_CED.DSP_GND_L origin:101-dsp-pips 27_72
|
||||
DSP_L.DSP_0_CED.DSP_VCC_L origin:101-dsp-pips 26_72
|
||||
DSP_L.DSP_0_CEINMODE.DSP_GND_L origin:101-dsp-pips 26_69
|
||||
DSP_L.DSP_0_CEINMODE.DSP_VCC_L origin:101-dsp-pips 26_67
|
||||
DSP_L.DSP_0_RSTD.DSP_GND_L origin:101-dsp-pips 27_96
|
||||
DSP_L.DSP_0_RSTD.DSP_VCC_L origin:101-dsp-pips 27_85
|
||||
DSP_L.DSP_0_ALUMODE2.DSP_GND_L origin:101-dsp-pips 27_56
|
||||
DSP_L.DSP_0_ALUMODE2.DSP_VCC_L origin:101-dsp-pips 26_55
|
||||
DSP_L.DSP_0_ALUMODE3.DSP_GND_L origin:101-dsp-pips 27_60
|
||||
DSP_L.DSP_0_ALUMODE3.DSP_VCC_L origin:101-dsp-pips 26_53
|
||||
DSP_L.DSP_0_CARRYINSEL2.DSP_GND_L origin:101-dsp-pips 26_17
|
||||
DSP_L.DSP_0_CARRYINSEL2.DSP_VCC_L origin:101-dsp-pips 27_18
|
||||
DSP_L.DSP_0_D0.DSP_GND_L origin:101-dsp-pips 26_65
|
||||
DSP_L.DSP_0_D0.DSP_VCC_L origin:101-dsp-pips 27_64
|
||||
DSP_L.DSP_0_D1.DSP_GND_L origin:101-dsp-pips 27_68
|
||||
DSP_L.DSP_0_D1.DSP_VCC_L origin:101-dsp-pips 27_74
|
||||
DSP_L.DSP_0_D2.DSP_GND_L origin:101-dsp-pips 27_71
|
||||
DSP_L.DSP_0_D2.DSP_VCC_L origin:101-dsp-pips 27_70
|
||||
DSP_L.DSP_0_D3.DSP_GND_L origin:101-dsp-pips 26_75
|
||||
DSP_L.DSP_0_D3.DSP_VCC_L origin:101-dsp-pips 26_73
|
||||
DSP_L.DSP_0_D4.DSP_GND_L origin:101-dsp-pips 27_78
|
||||
DSP_L.DSP_0_D4.DSP_VCC_L origin:101-dsp-pips 26_77
|
||||
DSP_L.DSP_0_D5.DSP_GND_L origin:101-dsp-pips 26_82
|
||||
DSP_L.DSP_0_D5.DSP_VCC_L origin:101-dsp-pips 26_81
|
||||
DSP_L.DSP_0_D6.DSP_GND_L origin:101-dsp-pips 26_89
|
||||
DSP_L.DSP_0_D6.DSP_VCC_L origin:101-dsp-pips 27_89
|
||||
DSP_L.DSP_0_D7.DSP_GND_L origin:101-dsp-pips 27_91
|
||||
DSP_L.DSP_0_D7.DSP_VCC_L origin:101-dsp-pips 26_91
|
||||
DSP_L.DSP_0_D8.DSP_GND_L origin:101-dsp-pips 26_98
|
||||
DSP_L.DSP_0_D8.DSP_VCC_L origin:101-dsp-pips 27_97
|
||||
DSP_L.DSP_0_D9.DSP_GND_L origin:101-dsp-pips 26_101
|
||||
DSP_L.DSP_0_D9.DSP_VCC_L origin:101-dsp-pips 26_99
|
||||
DSP_L.DSP_0_D10.DSP_GND_L origin:101-dsp-pips 26_105
|
||||
DSP_L.DSP_0_D10.DSP_VCC_L origin:101-dsp-pips 26_103
|
||||
DSP_L.DSP_0_D11.DSP_GND_L origin:101-dsp-pips 27_107
|
||||
DSP_L.DSP_0_D11.DSP_VCC_L origin:101-dsp-pips 27_105
|
||||
DSP_L.DSP_0_D12.DSP_GND_L origin:101-dsp-pips 26_107
|
||||
DSP_L.DSP_0_D12.DSP_VCC_L origin:101-dsp-pips 26_111
|
||||
DSP_L.DSP_0_D13.DSP_GND_L origin:101-dsp-pips 27_113
|
||||
DSP_L.DSP_0_D13.DSP_VCC_L origin:101-dsp-pips 26_114
|
||||
DSP_L.DSP_0_D14.DSP_GND_L origin:101-dsp-pips 26_118
|
||||
DSP_L.DSP_0_D14.DSP_VCC_L origin:101-dsp-pips 27_116
|
||||
DSP_L.DSP_0_D15.DSP_GND_L origin:101-dsp-pips 27_122
|
||||
DSP_L.DSP_0_D15.DSP_VCC_L origin:101-dsp-pips 27_120
|
||||
DSP_L.DSP_0_D16.DSP_GND_L origin:101-dsp-pips 27_125
|
||||
DSP_L.DSP_0_D16.DSP_VCC_L origin:101-dsp-pips 26_125
|
||||
DSP_L.DSP_0_D17.DSP_GND_L origin:101-dsp-pips 27_128
|
||||
DSP_L.DSP_0_D17.DSP_VCC_L origin:101-dsp-pips 27_126
|
||||
DSP_L.DSP_0_D18.DSP_GND_L origin:101-dsp-pips 26_135
|
||||
DSP_L.DSP_0_D18.DSP_VCC_L origin:101-dsp-pips 26_131
|
||||
DSP_L.DSP_0_D19.DSP_GND_L origin:101-dsp-pips 27_140
|
||||
DSP_L.DSP_0_D19.DSP_VCC_L origin:101-dsp-pips 26_140
|
||||
DSP_L.DSP_0_D20.DSP_GND_L origin:101-dsp-pips 26_145
|
||||
DSP_L.DSP_0_D20.DSP_VCC_L origin:101-dsp-pips 27_143
|
||||
DSP_L.DSP_0_D21.DSP_GND_L origin:101-dsp-pips 27_147
|
||||
DSP_L.DSP_0_D21.DSP_VCC_L origin:101-dsp-pips 26_147
|
||||
DSP_L.DSP_0_D22.DSP_GND_L origin:101-dsp-pips 27_151
|
||||
DSP_L.DSP_0_D22.DSP_VCC_L origin:101-dsp-pips 26_150
|
||||
DSP_L.DSP_0_D23.DSP_GND_L origin:101-dsp-pips 27_154
|
||||
DSP_L.DSP_0_D23.DSP_VCC_L origin:101-dsp-pips 27_153
|
||||
DSP_L.DSP_0_D24.DSP_GND_L origin:101-dsp-pips 27_158
|
||||
DSP_L.DSP_0_D24.DSP_VCC_L origin:101-dsp-pips 27_155
|
||||
DSP_L.DSP_0_INMODE0.DSP_GND_L origin:101-dsp-pips 27_134
|
||||
DSP_L.DSP_0_INMODE0.DSP_VCC_L origin:101-dsp-pips 27_130
|
||||
DSP_L.DSP_0_INMODE1.DSP_GND_L origin:101-dsp-pips 26_133
|
||||
DSP_L.DSP_0_INMODE1.DSP_VCC_L origin:101-dsp-pips 27_145
|
||||
DSP_L.DSP_0_INMODE2.DSP_GND_L origin:101-dsp-pips 27_80
|
||||
DSP_L.DSP_0_INMODE2.DSP_VCC_L origin:101-dsp-pips 26_71
|
||||
DSP_L.DSP_0_INMODE3.DSP_GND_L origin:101-dsp-pips 27_79
|
||||
DSP_L.DSP_0_INMODE3.DSP_VCC_L origin:101-dsp-pips 26_70
|
||||
DSP_L.DSP_0_INMODE4.DSP_GND_L origin:101-dsp-pips 26_58
|
||||
DSP_L.DSP_0_INMODE4.DSP_VCC_L origin:101-dsp-pips 26_46
|
||||
DSP_L.DSP_0_OPMODE6.DSP_GND_L origin:101-dsp-pips 27_12
|
||||
DSP_L.DSP_0_OPMODE6.DSP_VCC_L origin:101-dsp-pips 27_20
|
||||
DSP_L.DSP_1_CEAD.DSP_GND_L origin:101-dsp-pips 26_223
|
||||
DSP_L.DSP_1_CEAD.DSP_VCC_L origin:101-dsp-pips 27_222
|
||||
DSP_L.DSP_1_CEALUMODE.DSP_GND_L origin:101-dsp-pips 27_211
|
||||
DSP_L.DSP_1_CEALUMODE.DSP_VCC_L origin:101-dsp-pips 26_210
|
||||
DSP_L.DSP_1_CED.DSP_GND_L origin:101-dsp-pips 27_232
|
||||
DSP_L.DSP_1_CED.DSP_VCC_L origin:101-dsp-pips 26_232
|
||||
DSP_L.DSP_1_CEINMODE.DSP_GND_L origin:101-dsp-pips 26_229
|
||||
DSP_L.DSP_1_CEINMODE.DSP_VCC_L origin:101-dsp-pips 26_227
|
||||
DSP_L.DSP_1_RSTD.DSP_GND_L origin:101-dsp-pips 27_256
|
||||
DSP_L.DSP_1_RSTD.DSP_VCC_L origin:101-dsp-pips 27_245
|
||||
DSP_L.DSP_1_ALUMODE2.DSP_GND_L origin:101-dsp-pips 27_216
|
||||
DSP_L.DSP_1_ALUMODE2.DSP_VCC_L origin:101-dsp-pips 26_215
|
||||
DSP_L.DSP_1_ALUMODE3.DSP_GND_L origin:101-dsp-pips 27_220
|
||||
DSP_L.DSP_1_ALUMODE3.DSP_VCC_L origin:101-dsp-pips 26_213
|
||||
DSP_L.DSP_1_CARRYINSEL2.DSP_GND_L origin:101-dsp-pips 26_177
|
||||
DSP_L.DSP_1_CARRYINSEL2.DSP_VCC_L origin:101-dsp-pips 27_178
|
||||
DSP_L.DSP_1_D0.DSP_GND_L origin:101-dsp-pips 26_225
|
||||
DSP_L.DSP_1_D0.DSP_VCC_L origin:101-dsp-pips 27_224
|
||||
DSP_L.DSP_1_D1.DSP_GND_L origin:101-dsp-pips 27_228
|
||||
DSP_L.DSP_1_D1.DSP_VCC_L origin:101-dsp-pips 27_234
|
||||
DSP_L.DSP_1_D2.DSP_GND_L origin:101-dsp-pips 27_231
|
||||
DSP_L.DSP_1_D2.DSP_VCC_L origin:101-dsp-pips 27_230
|
||||
DSP_L.DSP_1_D3.DSP_GND_L origin:101-dsp-pips 26_235
|
||||
DSP_L.DSP_1_D3.DSP_VCC_L origin:101-dsp-pips 26_233
|
||||
DSP_L.DSP_1_D4.DSP_GND_L origin:101-dsp-pips 27_238
|
||||
DSP_L.DSP_1_D4.DSP_VCC_L origin:101-dsp-pips 26_237
|
||||
DSP_L.DSP_1_D5.DSP_GND_L origin:101-dsp-pips 26_242
|
||||
DSP_L.DSP_1_D5.DSP_VCC_L origin:101-dsp-pips 26_241
|
||||
DSP_L.DSP_1_D6.DSP_GND_L origin:101-dsp-pips 26_249
|
||||
DSP_L.DSP_1_D6.DSP_VCC_L origin:101-dsp-pips 27_249
|
||||
DSP_L.DSP_1_D7.DSP_GND_L origin:101-dsp-pips 27_251
|
||||
DSP_L.DSP_1_D7.DSP_VCC_L origin:101-dsp-pips 26_251
|
||||
DSP_L.DSP_1_D8.DSP_GND_L origin:101-dsp-pips 26_258
|
||||
DSP_L.DSP_1_D8.DSP_VCC_L origin:101-dsp-pips 27_257
|
||||
DSP_L.DSP_1_D9.DSP_GND_L origin:101-dsp-pips 26_261
|
||||
DSP_L.DSP_1_D9.DSP_VCC_L origin:101-dsp-pips 26_259
|
||||
DSP_L.DSP_1_D10.DSP_GND_L origin:101-dsp-pips 26_265
|
||||
DSP_L.DSP_1_D10.DSP_VCC_L origin:101-dsp-pips 26_263
|
||||
DSP_L.DSP_1_D11.DSP_GND_L origin:101-dsp-pips 27_267
|
||||
DSP_L.DSP_1_D11.DSP_VCC_L origin:101-dsp-pips 27_265
|
||||
DSP_L.DSP_1_D12.DSP_GND_L origin:101-dsp-pips 26_267
|
||||
DSP_L.DSP_1_D12.DSP_VCC_L origin:101-dsp-pips 26_271
|
||||
DSP_L.DSP_1_D13.DSP_GND_L origin:101-dsp-pips 27_273
|
||||
DSP_L.DSP_1_D13.DSP_VCC_L origin:101-dsp-pips 26_274
|
||||
DSP_L.DSP_1_D14.DSP_GND_L origin:101-dsp-pips 26_278
|
||||
DSP_L.DSP_1_D14.DSP_VCC_L origin:101-dsp-pips 27_276
|
||||
DSP_L.DSP_1_D15.DSP_GND_L origin:101-dsp-pips 27_282
|
||||
DSP_L.DSP_1_D15.DSP_VCC_L origin:101-dsp-pips 27_280
|
||||
DSP_L.DSP_1_D16.DSP_GND_L origin:101-dsp-pips 27_285
|
||||
DSP_L.DSP_1_D16.DSP_VCC_L origin:101-dsp-pips 26_285
|
||||
DSP_L.DSP_1_D17.DSP_GND_L origin:101-dsp-pips 27_288
|
||||
DSP_L.DSP_1_D17.DSP_VCC_L origin:101-dsp-pips 27_286
|
||||
DSP_L.DSP_1_D18.DSP_GND_L origin:101-dsp-pips 26_295
|
||||
DSP_L.DSP_1_D18.DSP_VCC_L origin:101-dsp-pips 26_291
|
||||
DSP_L.DSP_1_D19.DSP_GND_L origin:101-dsp-pips 27_300
|
||||
DSP_L.DSP_1_D19.DSP_VCC_L origin:101-dsp-pips 26_300
|
||||
DSP_L.DSP_1_D20.DSP_GND_L origin:101-dsp-pips 26_305
|
||||
DSP_L.DSP_1_D20.DSP_VCC_L origin:101-dsp-pips 27_303
|
||||
DSP_L.DSP_1_D21.DSP_GND_L origin:101-dsp-pips 27_307
|
||||
DSP_L.DSP_1_D21.DSP_VCC_L origin:101-dsp-pips 26_307
|
||||
DSP_L.DSP_1_D22.DSP_GND_L origin:101-dsp-pips 27_311
|
||||
DSP_L.DSP_1_D22.DSP_VCC_L origin:101-dsp-pips 26_310
|
||||
DSP_L.DSP_1_D23.DSP_GND_L origin:101-dsp-pips 27_314
|
||||
DSP_L.DSP_1_D23.DSP_VCC_L origin:101-dsp-pips 27_313
|
||||
DSP_L.DSP_1_D24.DSP_GND_L origin:101-dsp-pips 27_318
|
||||
DSP_L.DSP_1_D24.DSP_VCC_L origin:101-dsp-pips 27_315
|
||||
DSP_L.DSP_1_INMODE0.DSP_GND_L origin:101-dsp-pips 27_294
|
||||
DSP_L.DSP_1_INMODE0.DSP_VCC_L origin:101-dsp-pips 27_290
|
||||
DSP_L.DSP_1_INMODE1.DSP_GND_L origin:101-dsp-pips 26_293
|
||||
DSP_L.DSP_1_INMODE1.DSP_VCC_L origin:101-dsp-pips 27_305
|
||||
DSP_L.DSP_1_INMODE2.DSP_GND_L origin:101-dsp-pips 27_240
|
||||
DSP_L.DSP_1_INMODE2.DSP_VCC_L origin:101-dsp-pips 26_231
|
||||
DSP_L.DSP_1_INMODE3.DSP_GND_L origin:101-dsp-pips 27_239
|
||||
DSP_L.DSP_1_INMODE3.DSP_VCC_L origin:101-dsp-pips 26_230
|
||||
DSP_L.DSP_1_INMODE4.DSP_GND_L origin:101-dsp-pips 26_218
|
||||
DSP_L.DSP_1_INMODE4.DSP_VCC_L origin:101-dsp-pips 26_206
|
||||
DSP_L.DSP_1_OPMODE6.DSP_GND_L origin:101-dsp-pips 27_172
|
||||
DSP_L.DSP_1_OPMODE6.DSP_VCC_L origin:101-dsp-pips 27_180
|
||||
DSP_L.DSP48.DSP_0.A_INPUT[0] origin:100-dsp-mskpat 27_84
|
||||
DSP_L.DSP48.DSP_0.AREG_0 origin:100-dsp-mskpat 26_113 26_137 27_111
|
||||
DSP_L.DSP48.DSP_0.AREG_2 origin:100-dsp-mskpat 27_136
|
||||
|
|
|
|||
|
|
@ -1,3 +1,159 @@
|
|||
DSP_R.DSP_0_CEAD.DSP_GND_R 26_63
|
||||
DSP_R.DSP_0_CEAD.DSP_VCC_R 27_62
|
||||
DSP_R.DSP_0_CEALUMODE.DSP_GND_R 27_51
|
||||
DSP_R.DSP_0_CEALUMODE.DSP_VCC_R 26_50
|
||||
DSP_R.DSP_0_CED.DSP_GND_R 27_72
|
||||
DSP_R.DSP_0_CED.DSP_VCC_R 26_72
|
||||
DSP_R.DSP_0_CEINMODE.DSP_GND_R 26_69
|
||||
DSP_R.DSP_0_CEINMODE.DSP_VCC_R 26_67
|
||||
DSP_R.DSP_0_RSTD.DSP_GND_R 27_96
|
||||
DSP_R.DSP_0_RSTD.DSP_VCC_R 27_85
|
||||
DSP_R.DSP_0_ALUMODE2.DSP_GND_R 27_56
|
||||
DSP_R.DSP_0_ALUMODE2.DSP_VCC_R 26_55
|
||||
DSP_R.DSP_0_ALUMODE3.DSP_GND_R 27_60
|
||||
DSP_R.DSP_0_ALUMODE3.DSP_VCC_R 26_53
|
||||
DSP_R.DSP_0_CARRYINSEL2.DSP_GND_R 26_17
|
||||
DSP_R.DSP_0_CARRYINSEL2.DSP_VCC_R 27_18
|
||||
DSP_R.DSP_0_D0.DSP_GND_R 26_65
|
||||
DSP_R.DSP_0_D0.DSP_VCC_R 27_64
|
||||
DSP_R.DSP_0_D1.DSP_GND_R 27_68
|
||||
DSP_R.DSP_0_D1.DSP_VCC_R 27_74
|
||||
DSP_R.DSP_0_D2.DSP_GND_R 27_71
|
||||
DSP_R.DSP_0_D2.DSP_VCC_R 27_70
|
||||
DSP_R.DSP_0_D3.DSP_GND_R 26_75
|
||||
DSP_R.DSP_0_D3.DSP_VCC_R 26_73
|
||||
DSP_R.DSP_0_D4.DSP_GND_R 27_78
|
||||
DSP_R.DSP_0_D4.DSP_VCC_R 26_77
|
||||
DSP_R.DSP_0_D5.DSP_GND_R 26_82
|
||||
DSP_R.DSP_0_D5.DSP_VCC_R 26_81
|
||||
DSP_R.DSP_0_D6.DSP_GND_R 26_89
|
||||
DSP_R.DSP_0_D6.DSP_VCC_R 27_89
|
||||
DSP_R.DSP_0_D7.DSP_GND_R 27_91
|
||||
DSP_R.DSP_0_D7.DSP_VCC_R 26_91
|
||||
DSP_R.DSP_0_D8.DSP_GND_R 26_98
|
||||
DSP_R.DSP_0_D8.DSP_VCC_R 27_97
|
||||
DSP_R.DSP_0_D9.DSP_GND_R 26_101
|
||||
DSP_R.DSP_0_D9.DSP_VCC_R 26_99
|
||||
DSP_R.DSP_0_D10.DSP_GND_R 26_105
|
||||
DSP_R.DSP_0_D10.DSP_VCC_R 26_103
|
||||
DSP_R.DSP_0_D11.DSP_GND_R 27_107
|
||||
DSP_R.DSP_0_D11.DSP_VCC_R 27_105
|
||||
DSP_R.DSP_0_D12.DSP_GND_R 26_107
|
||||
DSP_R.DSP_0_D12.DSP_VCC_R 26_111
|
||||
DSP_R.DSP_0_D13.DSP_GND_R 27_113
|
||||
DSP_R.DSP_0_D13.DSP_VCC_R 26_114
|
||||
DSP_R.DSP_0_D14.DSP_GND_R 26_118
|
||||
DSP_R.DSP_0_D14.DSP_VCC_R 27_116
|
||||
DSP_R.DSP_0_D15.DSP_GND_R 27_122
|
||||
DSP_R.DSP_0_D15.DSP_VCC_R 27_120
|
||||
DSP_R.DSP_0_D16.DSP_GND_R 27_125
|
||||
DSP_R.DSP_0_D16.DSP_VCC_R 26_125
|
||||
DSP_R.DSP_0_D17.DSP_GND_R 27_128
|
||||
DSP_R.DSP_0_D17.DSP_VCC_R 27_126
|
||||
DSP_R.DSP_0_D18.DSP_GND_R 26_135
|
||||
DSP_R.DSP_0_D18.DSP_VCC_R 26_131
|
||||
DSP_R.DSP_0_D19.DSP_GND_R 27_140
|
||||
DSP_R.DSP_0_D19.DSP_VCC_R 26_140
|
||||
DSP_R.DSP_0_D20.DSP_GND_R 26_145
|
||||
DSP_R.DSP_0_D20.DSP_VCC_R 27_143
|
||||
DSP_R.DSP_0_D21.DSP_GND_R 27_147
|
||||
DSP_R.DSP_0_D21.DSP_VCC_R 26_147
|
||||
DSP_R.DSP_0_D22.DSP_GND_R 27_151
|
||||
DSP_R.DSP_0_D22.DSP_VCC_R 26_150
|
||||
DSP_R.DSP_0_D23.DSP_GND_R 27_154
|
||||
DSP_R.DSP_0_D23.DSP_VCC_R 27_153
|
||||
DSP_R.DSP_0_D24.DSP_GND_R 27_158
|
||||
DSP_R.DSP_0_D24.DSP_VCC_R 27_155
|
||||
DSP_R.DSP_0_INMODE0.DSP_GND_R 27_134
|
||||
DSP_R.DSP_0_INMODE0.DSP_VCC_R 27_130
|
||||
DSP_R.DSP_0_INMODE1.DSP_GND_R 26_133
|
||||
DSP_R.DSP_0_INMODE1.DSP_VCC_R 27_145
|
||||
DSP_R.DSP_0_INMODE2.DSP_GND_R 27_80
|
||||
DSP_R.DSP_0_INMODE2.DSP_VCC_R 26_71
|
||||
DSP_R.DSP_0_INMODE3.DSP_GND_R 27_79
|
||||
DSP_R.DSP_0_INMODE3.DSP_VCC_R 26_70
|
||||
DSP_R.DSP_0_INMODE4.DSP_GND_R 26_58
|
||||
DSP_R.DSP_0_INMODE4.DSP_VCC_R 26_46
|
||||
DSP_R.DSP_0_OPMODE6.DSP_GND_R 27_12
|
||||
DSP_R.DSP_0_OPMODE6.DSP_VCC_R 27_20
|
||||
DSP_R.DSP_1_CEAD.DSP_GND_R 26_223
|
||||
DSP_R.DSP_1_CEAD.DSP_VCC_R 27_222
|
||||
DSP_R.DSP_1_CEALUMODE.DSP_GND_R 27_211
|
||||
DSP_R.DSP_1_CEALUMODE.DSP_VCC_R 26_210
|
||||
DSP_R.DSP_1_CED.DSP_GND_R 27_232
|
||||
DSP_R.DSP_1_CED.DSP_VCC_R 26_232
|
||||
DSP_R.DSP_1_CEINMODE.DSP_GND_R 26_229
|
||||
DSP_R.DSP_1_CEINMODE.DSP_VCC_R 26_227
|
||||
DSP_R.DSP_1_RSTD.DSP_GND_R 27_256
|
||||
DSP_R.DSP_1_RSTD.DSP_VCC_R 27_245
|
||||
DSP_R.DSP_1_ALUMODE2.DSP_GND_R 27_216
|
||||
DSP_R.DSP_1_ALUMODE2.DSP_VCC_R 26_215
|
||||
DSP_R.DSP_1_ALUMODE3.DSP_GND_R 27_220
|
||||
DSP_R.DSP_1_ALUMODE3.DSP_VCC_R 26_213
|
||||
DSP_R.DSP_1_CARRYINSEL2.DSP_GND_R 26_177
|
||||
DSP_R.DSP_1_CARRYINSEL2.DSP_VCC_R 27_178
|
||||
DSP_R.DSP_1_D0.DSP_GND_R 26_225
|
||||
DSP_R.DSP_1_D0.DSP_VCC_R 27_224
|
||||
DSP_R.DSP_1_D1.DSP_GND_R 27_228
|
||||
DSP_R.DSP_1_D1.DSP_VCC_R 27_234
|
||||
DSP_R.DSP_1_D2.DSP_GND_R 27_231
|
||||
DSP_R.DSP_1_D2.DSP_VCC_R 27_230
|
||||
DSP_R.DSP_1_D3.DSP_GND_R 26_235
|
||||
DSP_R.DSP_1_D3.DSP_VCC_R 26_233
|
||||
DSP_R.DSP_1_D4.DSP_GND_R 27_238
|
||||
DSP_R.DSP_1_D4.DSP_VCC_R 26_237
|
||||
DSP_R.DSP_1_D5.DSP_GND_R 26_242
|
||||
DSP_R.DSP_1_D5.DSP_VCC_R 26_241
|
||||
DSP_R.DSP_1_D6.DSP_GND_R 26_249
|
||||
DSP_R.DSP_1_D6.DSP_VCC_R 27_249
|
||||
DSP_R.DSP_1_D7.DSP_GND_R 27_251
|
||||
DSP_R.DSP_1_D7.DSP_VCC_R 26_251
|
||||
DSP_R.DSP_1_D8.DSP_GND_R 26_258
|
||||
DSP_R.DSP_1_D8.DSP_VCC_R 27_257
|
||||
DSP_R.DSP_1_D9.DSP_GND_R 26_261
|
||||
DSP_R.DSP_1_D9.DSP_VCC_R 26_259
|
||||
DSP_R.DSP_1_D10.DSP_GND_R 26_265
|
||||
DSP_R.DSP_1_D10.DSP_VCC_R 26_263
|
||||
DSP_R.DSP_1_D11.DSP_GND_R 27_267
|
||||
DSP_R.DSP_1_D11.DSP_VCC_R 27_265
|
||||
DSP_R.DSP_1_D12.DSP_GND_R 26_267
|
||||
DSP_R.DSP_1_D12.DSP_VCC_R 26_271
|
||||
DSP_R.DSP_1_D13.DSP_GND_R 27_273
|
||||
DSP_R.DSP_1_D13.DSP_VCC_R 26_274
|
||||
DSP_R.DSP_1_D14.DSP_GND_R 26_278
|
||||
DSP_R.DSP_1_D14.DSP_VCC_R 27_276
|
||||
DSP_R.DSP_1_D15.DSP_GND_R 27_282
|
||||
DSP_R.DSP_1_D15.DSP_VCC_R 27_280
|
||||
DSP_R.DSP_1_D16.DSP_GND_R 27_285
|
||||
DSP_R.DSP_1_D16.DSP_VCC_R 26_285
|
||||
DSP_R.DSP_1_D17.DSP_GND_R 27_288
|
||||
DSP_R.DSP_1_D17.DSP_VCC_R 27_286
|
||||
DSP_R.DSP_1_D18.DSP_GND_R 26_295
|
||||
DSP_R.DSP_1_D18.DSP_VCC_R 26_291
|
||||
DSP_R.DSP_1_D19.DSP_GND_R 27_300
|
||||
DSP_R.DSP_1_D19.DSP_VCC_R 26_300
|
||||
DSP_R.DSP_1_D20.DSP_GND_R 26_305
|
||||
DSP_R.DSP_1_D20.DSP_VCC_R 27_303
|
||||
DSP_R.DSP_1_D21.DSP_GND_R 27_307
|
||||
DSP_R.DSP_1_D21.DSP_VCC_R 26_307
|
||||
DSP_R.DSP_1_D22.DSP_GND_R 27_311
|
||||
DSP_R.DSP_1_D22.DSP_VCC_R 26_310
|
||||
DSP_R.DSP_1_D23.DSP_GND_R 27_314
|
||||
DSP_R.DSP_1_D23.DSP_VCC_R 27_313
|
||||
DSP_R.DSP_1_D24.DSP_GND_R 27_318
|
||||
DSP_R.DSP_1_D24.DSP_VCC_R 27_315
|
||||
DSP_R.DSP_1_INMODE0.DSP_GND_R 27_294
|
||||
DSP_R.DSP_1_INMODE0.DSP_VCC_R 27_290
|
||||
DSP_R.DSP_1_INMODE1.DSP_GND_R 26_293
|
||||
DSP_R.DSP_1_INMODE1.DSP_VCC_R 27_305
|
||||
DSP_R.DSP_1_INMODE2.DSP_GND_R 27_240
|
||||
DSP_R.DSP_1_INMODE2.DSP_VCC_R 26_231
|
||||
DSP_R.DSP_1_INMODE3.DSP_GND_R 27_239
|
||||
DSP_R.DSP_1_INMODE3.DSP_VCC_R 26_230
|
||||
DSP_R.DSP_1_INMODE4.DSP_GND_R 26_218
|
||||
DSP_R.DSP_1_INMODE4.DSP_VCC_R 26_206
|
||||
DSP_R.DSP_1_OPMODE6.DSP_GND_R 27_172
|
||||
DSP_R.DSP_1_OPMODE6.DSP_VCC_R 27_180
|
||||
DSP_R.DSP48.DSP_0.A_INPUT[0] 27_84
|
||||
DSP_R.DSP48.DSP_0.AREG_0 26_113 26_137 27_111
|
||||
DSP_R.DSP48.DSP_0.AREG_2 27_136
|
||||
|
|
|
|||
|
|
@ -1,3 +1,159 @@
|
|||
DSP_R.DSP_0_CEAD.DSP_GND_R origin:101-dsp-pips 26_63
|
||||
DSP_R.DSP_0_CEAD.DSP_VCC_R origin:101-dsp-pips 27_62
|
||||
DSP_R.DSP_0_CEALUMODE.DSP_GND_R origin:101-dsp-pips 27_51
|
||||
DSP_R.DSP_0_CEALUMODE.DSP_VCC_R origin:101-dsp-pips 26_50
|
||||
DSP_R.DSP_0_CED.DSP_GND_R origin:101-dsp-pips 27_72
|
||||
DSP_R.DSP_0_CED.DSP_VCC_R origin:101-dsp-pips 26_72
|
||||
DSP_R.DSP_0_CEINMODE.DSP_GND_R origin:101-dsp-pips 26_69
|
||||
DSP_R.DSP_0_CEINMODE.DSP_VCC_R origin:101-dsp-pips 26_67
|
||||
DSP_R.DSP_0_RSTD.DSP_GND_R origin:101-dsp-pips 27_96
|
||||
DSP_R.DSP_0_RSTD.DSP_VCC_R origin:101-dsp-pips 27_85
|
||||
DSP_R.DSP_0_ALUMODE2.DSP_GND_R origin:101-dsp-pips 27_56
|
||||
DSP_R.DSP_0_ALUMODE2.DSP_VCC_R origin:101-dsp-pips 26_55
|
||||
DSP_R.DSP_0_ALUMODE3.DSP_GND_R origin:101-dsp-pips 27_60
|
||||
DSP_R.DSP_0_ALUMODE3.DSP_VCC_R origin:101-dsp-pips 26_53
|
||||
DSP_R.DSP_0_CARRYINSEL2.DSP_GND_R origin:101-dsp-pips 26_17
|
||||
DSP_R.DSP_0_CARRYINSEL2.DSP_VCC_R origin:101-dsp-pips 27_18
|
||||
DSP_R.DSP_0_D0.DSP_GND_R origin:101-dsp-pips 26_65
|
||||
DSP_R.DSP_0_D0.DSP_VCC_R origin:101-dsp-pips 27_64
|
||||
DSP_R.DSP_0_D1.DSP_GND_R origin:101-dsp-pips 27_68
|
||||
DSP_R.DSP_0_D1.DSP_VCC_R origin:101-dsp-pips 27_74
|
||||
DSP_R.DSP_0_D2.DSP_GND_R origin:101-dsp-pips 27_71
|
||||
DSP_R.DSP_0_D2.DSP_VCC_R origin:101-dsp-pips 27_70
|
||||
DSP_R.DSP_0_D3.DSP_GND_R origin:101-dsp-pips 26_75
|
||||
DSP_R.DSP_0_D3.DSP_VCC_R origin:101-dsp-pips 26_73
|
||||
DSP_R.DSP_0_D4.DSP_GND_R origin:101-dsp-pips 27_78
|
||||
DSP_R.DSP_0_D4.DSP_VCC_R origin:101-dsp-pips 26_77
|
||||
DSP_R.DSP_0_D5.DSP_GND_R origin:101-dsp-pips 26_82
|
||||
DSP_R.DSP_0_D5.DSP_VCC_R origin:101-dsp-pips 26_81
|
||||
DSP_R.DSP_0_D6.DSP_GND_R origin:101-dsp-pips 26_89
|
||||
DSP_R.DSP_0_D6.DSP_VCC_R origin:101-dsp-pips 27_89
|
||||
DSP_R.DSP_0_D7.DSP_GND_R origin:101-dsp-pips 27_91
|
||||
DSP_R.DSP_0_D7.DSP_VCC_R origin:101-dsp-pips 26_91
|
||||
DSP_R.DSP_0_D8.DSP_GND_R origin:101-dsp-pips 26_98
|
||||
DSP_R.DSP_0_D8.DSP_VCC_R origin:101-dsp-pips 27_97
|
||||
DSP_R.DSP_0_D9.DSP_GND_R origin:101-dsp-pips 26_101
|
||||
DSP_R.DSP_0_D9.DSP_VCC_R origin:101-dsp-pips 26_99
|
||||
DSP_R.DSP_0_D10.DSP_GND_R origin:101-dsp-pips 26_105
|
||||
DSP_R.DSP_0_D10.DSP_VCC_R origin:101-dsp-pips 26_103
|
||||
DSP_R.DSP_0_D11.DSP_GND_R origin:101-dsp-pips 27_107
|
||||
DSP_R.DSP_0_D11.DSP_VCC_R origin:101-dsp-pips 27_105
|
||||
DSP_R.DSP_0_D12.DSP_GND_R origin:101-dsp-pips 26_107
|
||||
DSP_R.DSP_0_D12.DSP_VCC_R origin:101-dsp-pips 26_111
|
||||
DSP_R.DSP_0_D13.DSP_GND_R origin:101-dsp-pips 27_113
|
||||
DSP_R.DSP_0_D13.DSP_VCC_R origin:101-dsp-pips 26_114
|
||||
DSP_R.DSP_0_D14.DSP_GND_R origin:101-dsp-pips 26_118
|
||||
DSP_R.DSP_0_D14.DSP_VCC_R origin:101-dsp-pips 27_116
|
||||
DSP_R.DSP_0_D15.DSP_GND_R origin:101-dsp-pips 27_122
|
||||
DSP_R.DSP_0_D15.DSP_VCC_R origin:101-dsp-pips 27_120
|
||||
DSP_R.DSP_0_D16.DSP_GND_R origin:101-dsp-pips 27_125
|
||||
DSP_R.DSP_0_D16.DSP_VCC_R origin:101-dsp-pips 26_125
|
||||
DSP_R.DSP_0_D17.DSP_GND_R origin:101-dsp-pips 27_128
|
||||
DSP_R.DSP_0_D17.DSP_VCC_R origin:101-dsp-pips 27_126
|
||||
DSP_R.DSP_0_D18.DSP_GND_R origin:101-dsp-pips 26_135
|
||||
DSP_R.DSP_0_D18.DSP_VCC_R origin:101-dsp-pips 26_131
|
||||
DSP_R.DSP_0_D19.DSP_GND_R origin:101-dsp-pips 27_140
|
||||
DSP_R.DSP_0_D19.DSP_VCC_R origin:101-dsp-pips 26_140
|
||||
DSP_R.DSP_0_D20.DSP_GND_R origin:101-dsp-pips 26_145
|
||||
DSP_R.DSP_0_D20.DSP_VCC_R origin:101-dsp-pips 27_143
|
||||
DSP_R.DSP_0_D21.DSP_GND_R origin:101-dsp-pips 27_147
|
||||
DSP_R.DSP_0_D21.DSP_VCC_R origin:101-dsp-pips 26_147
|
||||
DSP_R.DSP_0_D22.DSP_GND_R origin:101-dsp-pips 27_151
|
||||
DSP_R.DSP_0_D22.DSP_VCC_R origin:101-dsp-pips 26_150
|
||||
DSP_R.DSP_0_D23.DSP_GND_R origin:101-dsp-pips 27_154
|
||||
DSP_R.DSP_0_D23.DSP_VCC_R origin:101-dsp-pips 27_153
|
||||
DSP_R.DSP_0_D24.DSP_GND_R origin:101-dsp-pips 27_158
|
||||
DSP_R.DSP_0_D24.DSP_VCC_R origin:101-dsp-pips 27_155
|
||||
DSP_R.DSP_0_INMODE0.DSP_GND_R origin:101-dsp-pips 27_134
|
||||
DSP_R.DSP_0_INMODE0.DSP_VCC_R origin:101-dsp-pips 27_130
|
||||
DSP_R.DSP_0_INMODE1.DSP_GND_R origin:101-dsp-pips 26_133
|
||||
DSP_R.DSP_0_INMODE1.DSP_VCC_R origin:101-dsp-pips 27_145
|
||||
DSP_R.DSP_0_INMODE2.DSP_GND_R origin:101-dsp-pips 27_80
|
||||
DSP_R.DSP_0_INMODE2.DSP_VCC_R origin:101-dsp-pips 26_71
|
||||
DSP_R.DSP_0_INMODE3.DSP_GND_R origin:101-dsp-pips 27_79
|
||||
DSP_R.DSP_0_INMODE3.DSP_VCC_R origin:101-dsp-pips 26_70
|
||||
DSP_R.DSP_0_INMODE4.DSP_GND_R origin:101-dsp-pips 26_58
|
||||
DSP_R.DSP_0_INMODE4.DSP_VCC_R origin:101-dsp-pips 26_46
|
||||
DSP_R.DSP_0_OPMODE6.DSP_GND_R origin:101-dsp-pips 27_12
|
||||
DSP_R.DSP_0_OPMODE6.DSP_VCC_R origin:101-dsp-pips 27_20
|
||||
DSP_R.DSP_1_CEAD.DSP_GND_R origin:101-dsp-pips 26_223
|
||||
DSP_R.DSP_1_CEAD.DSP_VCC_R origin:101-dsp-pips 27_222
|
||||
DSP_R.DSP_1_CEALUMODE.DSP_GND_R origin:101-dsp-pips 27_211
|
||||
DSP_R.DSP_1_CEALUMODE.DSP_VCC_R origin:101-dsp-pips 26_210
|
||||
DSP_R.DSP_1_CED.DSP_GND_R origin:101-dsp-pips 27_232
|
||||
DSP_R.DSP_1_CED.DSP_VCC_R origin:101-dsp-pips 26_232
|
||||
DSP_R.DSP_1_CEINMODE.DSP_GND_R origin:101-dsp-pips 26_229
|
||||
DSP_R.DSP_1_CEINMODE.DSP_VCC_R origin:101-dsp-pips 26_227
|
||||
DSP_R.DSP_1_RSTD.DSP_GND_R origin:101-dsp-pips 27_256
|
||||
DSP_R.DSP_1_RSTD.DSP_VCC_R origin:101-dsp-pips 27_245
|
||||
DSP_R.DSP_1_ALUMODE2.DSP_GND_R origin:101-dsp-pips 27_216
|
||||
DSP_R.DSP_1_ALUMODE2.DSP_VCC_R origin:101-dsp-pips 26_215
|
||||
DSP_R.DSP_1_ALUMODE3.DSP_GND_R origin:101-dsp-pips 27_220
|
||||
DSP_R.DSP_1_ALUMODE3.DSP_VCC_R origin:101-dsp-pips 26_213
|
||||
DSP_R.DSP_1_CARRYINSEL2.DSP_GND_R origin:101-dsp-pips 26_177
|
||||
DSP_R.DSP_1_CARRYINSEL2.DSP_VCC_R origin:101-dsp-pips 27_178
|
||||
DSP_R.DSP_1_D0.DSP_GND_R origin:101-dsp-pips 26_225
|
||||
DSP_R.DSP_1_D0.DSP_VCC_R origin:101-dsp-pips 27_224
|
||||
DSP_R.DSP_1_D1.DSP_GND_R origin:101-dsp-pips 27_228
|
||||
DSP_R.DSP_1_D1.DSP_VCC_R origin:101-dsp-pips 27_234
|
||||
DSP_R.DSP_1_D2.DSP_GND_R origin:101-dsp-pips 27_231
|
||||
DSP_R.DSP_1_D2.DSP_VCC_R origin:101-dsp-pips 27_230
|
||||
DSP_R.DSP_1_D3.DSP_GND_R origin:101-dsp-pips 26_235
|
||||
DSP_R.DSP_1_D3.DSP_VCC_R origin:101-dsp-pips 26_233
|
||||
DSP_R.DSP_1_D4.DSP_GND_R origin:101-dsp-pips 27_238
|
||||
DSP_R.DSP_1_D4.DSP_VCC_R origin:101-dsp-pips 26_237
|
||||
DSP_R.DSP_1_D5.DSP_GND_R origin:101-dsp-pips 26_242
|
||||
DSP_R.DSP_1_D5.DSP_VCC_R origin:101-dsp-pips 26_241
|
||||
DSP_R.DSP_1_D6.DSP_GND_R origin:101-dsp-pips 26_249
|
||||
DSP_R.DSP_1_D6.DSP_VCC_R origin:101-dsp-pips 27_249
|
||||
DSP_R.DSP_1_D7.DSP_GND_R origin:101-dsp-pips 27_251
|
||||
DSP_R.DSP_1_D7.DSP_VCC_R origin:101-dsp-pips 26_251
|
||||
DSP_R.DSP_1_D8.DSP_GND_R origin:101-dsp-pips 26_258
|
||||
DSP_R.DSP_1_D8.DSP_VCC_R origin:101-dsp-pips 27_257
|
||||
DSP_R.DSP_1_D9.DSP_GND_R origin:101-dsp-pips 26_261
|
||||
DSP_R.DSP_1_D9.DSP_VCC_R origin:101-dsp-pips 26_259
|
||||
DSP_R.DSP_1_D10.DSP_GND_R origin:101-dsp-pips 26_265
|
||||
DSP_R.DSP_1_D10.DSP_VCC_R origin:101-dsp-pips 26_263
|
||||
DSP_R.DSP_1_D11.DSP_GND_R origin:101-dsp-pips 27_267
|
||||
DSP_R.DSP_1_D11.DSP_VCC_R origin:101-dsp-pips 27_265
|
||||
DSP_R.DSP_1_D12.DSP_GND_R origin:101-dsp-pips 26_267
|
||||
DSP_R.DSP_1_D12.DSP_VCC_R origin:101-dsp-pips 26_271
|
||||
DSP_R.DSP_1_D13.DSP_GND_R origin:101-dsp-pips 27_273
|
||||
DSP_R.DSP_1_D13.DSP_VCC_R origin:101-dsp-pips 26_274
|
||||
DSP_R.DSP_1_D14.DSP_GND_R origin:101-dsp-pips 26_278
|
||||
DSP_R.DSP_1_D14.DSP_VCC_R origin:101-dsp-pips 27_276
|
||||
DSP_R.DSP_1_D15.DSP_GND_R origin:101-dsp-pips 27_282
|
||||
DSP_R.DSP_1_D15.DSP_VCC_R origin:101-dsp-pips 27_280
|
||||
DSP_R.DSP_1_D16.DSP_GND_R origin:101-dsp-pips 27_285
|
||||
DSP_R.DSP_1_D16.DSP_VCC_R origin:101-dsp-pips 26_285
|
||||
DSP_R.DSP_1_D17.DSP_GND_R origin:101-dsp-pips 27_288
|
||||
DSP_R.DSP_1_D17.DSP_VCC_R origin:101-dsp-pips 27_286
|
||||
DSP_R.DSP_1_D18.DSP_GND_R origin:101-dsp-pips 26_295
|
||||
DSP_R.DSP_1_D18.DSP_VCC_R origin:101-dsp-pips 26_291
|
||||
DSP_R.DSP_1_D19.DSP_GND_R origin:101-dsp-pips 27_300
|
||||
DSP_R.DSP_1_D19.DSP_VCC_R origin:101-dsp-pips 26_300
|
||||
DSP_R.DSP_1_D20.DSP_GND_R origin:101-dsp-pips 26_305
|
||||
DSP_R.DSP_1_D20.DSP_VCC_R origin:101-dsp-pips 27_303
|
||||
DSP_R.DSP_1_D21.DSP_GND_R origin:101-dsp-pips 27_307
|
||||
DSP_R.DSP_1_D21.DSP_VCC_R origin:101-dsp-pips 26_307
|
||||
DSP_R.DSP_1_D22.DSP_GND_R origin:101-dsp-pips 27_311
|
||||
DSP_R.DSP_1_D22.DSP_VCC_R origin:101-dsp-pips 26_310
|
||||
DSP_R.DSP_1_D23.DSP_GND_R origin:101-dsp-pips 27_314
|
||||
DSP_R.DSP_1_D23.DSP_VCC_R origin:101-dsp-pips 27_313
|
||||
DSP_R.DSP_1_D24.DSP_GND_R origin:101-dsp-pips 27_318
|
||||
DSP_R.DSP_1_D24.DSP_VCC_R origin:101-dsp-pips 27_315
|
||||
DSP_R.DSP_1_INMODE0.DSP_GND_R origin:101-dsp-pips 27_294
|
||||
DSP_R.DSP_1_INMODE0.DSP_VCC_R origin:101-dsp-pips 27_290
|
||||
DSP_R.DSP_1_INMODE1.DSP_GND_R origin:101-dsp-pips 26_293
|
||||
DSP_R.DSP_1_INMODE1.DSP_VCC_R origin:101-dsp-pips 27_305
|
||||
DSP_R.DSP_1_INMODE2.DSP_GND_R origin:101-dsp-pips 27_240
|
||||
DSP_R.DSP_1_INMODE2.DSP_VCC_R origin:101-dsp-pips 26_231
|
||||
DSP_R.DSP_1_INMODE3.DSP_GND_R origin:101-dsp-pips 27_239
|
||||
DSP_R.DSP_1_INMODE3.DSP_VCC_R origin:101-dsp-pips 26_230
|
||||
DSP_R.DSP_1_INMODE4.DSP_GND_R origin:101-dsp-pips 26_218
|
||||
DSP_R.DSP_1_INMODE4.DSP_VCC_R origin:101-dsp-pips 26_206
|
||||
DSP_R.DSP_1_OPMODE6.DSP_GND_R origin:101-dsp-pips 27_172
|
||||
DSP_R.DSP_1_OPMODE6.DSP_VCC_R origin:101-dsp-pips 27_180
|
||||
DSP_R.DSP48.DSP_0.A_INPUT[0] origin:100-dsp-mskpat 27_84
|
||||
DSP_R.DSP48.DSP_0.AREG_0 origin:100-dsp-mskpat 26_113 26_137 27_111
|
||||
DSP_R.DSP48.DSP_0.AREG_2 origin:100-dsp-mskpat 27_136
|
||||
|
|
|
|||
|
|
@ -242,7 +242,10 @@ HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK0 32_16 32_19
|
|||
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK1 32_19 35_21
|
||||
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK2 31_20 32_19
|
||||
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK3 32_19 35_19
|
||||
HCLK_IOI3.LVDS_25_IN_USE 38_23 38_24 38_25 41_14 41_15 41_17 41_18 41_27 41_28 41_29
|
||||
HCLK_IOI3.ONLY_DIFF_IN_USE 38_27 39_23 40_25 40_27 40_29 40_30 41_16 41_31
|
||||
HCLK_IOI3.STEPDOWN 38_15 39_14 39_15 39_16
|
||||
HCLK_IOI3.TMDS_33_IN_USE 38_28 41_19
|
||||
HCLK_IOI3.VREF.V_600_MV 38_26 39_30
|
||||
HCLK_IOI3.VREF.V_675_MV 38_26 39_22
|
||||
HCLK_IOI3.VREF.V_750_MV 38_26 39_24
|
||||
|
|
|
|||
|
|
@ -242,7 +242,10 @@ HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK0 origin:047-hclk-ioi-pips 32_1
|
|||
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK1 origin:047-hclk-ioi-pips 32_19 35_21
|
||||
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK2 origin:047-hclk-ioi-pips 31_20 32_19
|
||||
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK3 origin:047-hclk-ioi-pips 32_19 35_19
|
||||
HCLK_IOI3.LVDS_25_IN_USE origin:030-iob 38_23 38_24 38_25 41_14 41_15 41_17 41_18 41_27 41_28 41_29
|
||||
HCLK_IOI3.ONLY_DIFF_IN_USE origin:030-iob 38_27 39_23 40_25 40_27 40_29 40_30 41_16 41_31
|
||||
HCLK_IOI3.STEPDOWN origin:030-iob 38_15 39_14 39_15 39_16
|
||||
HCLK_IOI3.TMDS_33_IN_USE origin:030-iob 38_28 41_19
|
||||
HCLK_IOI3.VREF.V_600_MV origin:030-iob 38_26 39_30
|
||||
HCLK_IOI3.VREF.V_675_MV origin:030-iob 38_26 39_22
|
||||
HCLK_IOI3.VREF.V_750_MV origin:030-iob 38_26 39_24
|
||||
|
|
|
|||
|
|
@ -170,7 +170,7 @@ INT_L.BYP_ALT7.BYP_BOUNCE2 origin:050-pip-seed !22_63 !23_63 !24_63 21_63 25_63
|
|||
INT_L.BYP_ALT7.BYP_BOUNCE6 origin:050-pip-seed !22_63 !23_63 !25_63 21_63 24_63
|
||||
INT_L.BYP_ALT7.EL1END_S3_0 origin:050-pip-seed !23_63 17_63 22_63 24_63 25_63
|
||||
INT_L.BYP_ALT7.FAN_BOUNCE_S3_4 origin:050-pip-seed !23_63 21_63 22_63 24_63 25_63
|
||||
INT_L.BYP_ALT7.FAN_BOUNCE_S3_6 origin:056-pip-rem !22_63 21_63 23_63 24_63 25_63
|
||||
INT_L.BYP_ALT7.FAN_BOUNCE_S3_6 origin:050-pip-seed !22_63 21_63 23_63 24_63 25_63
|
||||
INT_L.BYP_ALT7.LOGIC_OUTS_L3 origin:051-pip-imuxlout-bypalts !22_63 20_63 23_63 24_63 25_63
|
||||
INT_L.BYP_ALT7.LOGIC_OUTS_L15 origin:051-pip-imuxlout-bypalts !23_63 20_63 22_63 24_63 25_63
|
||||
INT_L.BYP_ALT7.LOGIC_OUTS_L21 origin:051-pip-imuxlout-bypalts !22_63 !23_63 !24_63 20_63 25_63
|
||||
|
|
@ -1917,7 +1917,7 @@ INT_L.EE4BEG2.SE6END2 origin:050-pip-seed 03_41 06_40
|
|||
INT_L.EE4BEG2.SS2END2 origin:050-pip-seed 03_40 05_43
|
||||
INT_L.EE4BEG2.SS6END2 origin:050-pip-seed 05_43 06_40
|
||||
INT_L.EE4BEG2.SW2END2 origin:050-pip-seed 02_41 05_43
|
||||
INT_L.EE4BEG2.SW6END2 origin:050-pip-seed 05_40 05_43
|
||||
INT_L.EE4BEG2.SW6END2 origin:056-pip-rem 05_40 05_43
|
||||
INT_L.EE4BEG3.LOGIC_OUTS_L3 origin:050-pip-seed 02_57 07_57
|
||||
INT_L.EE4BEG3.LOGIC_OUTS_L7 origin:050-pip-seed 02_57 04_58
|
||||
INT_L.EE4BEG3.LOGIC_OUTS_L11 origin:050-pip-seed 03_56 04_58
|
||||
|
|
@ -3603,7 +3603,7 @@ INT_L.WW4BEG2.LOGIC_OUTS_L20 origin:050-pip-seed 04_34 06_32
|
|||
INT_L.WW4BEG2.LVB_L0 origin:056-pip-rem 04_34 05_32
|
||||
INT_L.WW4BEG2.LVB_L12 origin:056-pip-rem 05_32 07_33
|
||||
INT_L.WW4BEG2.NE2END2 origin:050-pip-seed 02_33 05_35
|
||||
INT_L.WW4BEG2.NE6END2 origin:056-pip-rem 05_32 05_35
|
||||
INT_L.WW4BEG2.NE6END2 origin:050-pip-seed 05_32 05_35
|
||||
INT_L.WW4BEG2.NN2END2 origin:050-pip-seed 03_32 05_35
|
||||
INT_L.WW4BEG2.NN6END2 origin:050-pip-seed 05_35 06_32
|
||||
INT_L.WW4BEG2.NW2END2 origin:050-pip-seed 02_33 03_33
|
||||
|
|
|
|||
|
|
@ -705,7 +705,7 @@ INT_R.EE4BEG2.SE6END2 origin:050-pip-seed 03_41 06_40
|
|||
INT_R.EE4BEG2.SS2END2 origin:050-pip-seed 03_40 05_43
|
||||
INT_R.EE4BEG2.SS6END2 origin:050-pip-seed 05_43 06_40
|
||||
INT_R.EE4BEG2.SW2END2 origin:050-pip-seed 02_41 05_43
|
||||
INT_R.EE4BEG2.SW6END2 origin:050-pip-seed 05_40 05_43
|
||||
INT_R.EE4BEG2.SW6END2 origin:056-pip-rem 05_40 05_43
|
||||
INT_R.EE4BEG3.LOGIC_OUTS3 origin:050-pip-seed 02_57 07_57
|
||||
INT_R.EE4BEG3.LOGIC_OUTS7 origin:050-pip-seed 02_57 04_58
|
||||
INT_R.EE4BEG3.LOGIC_OUTS11 origin:050-pip-seed 03_56 04_58
|
||||
|
|
@ -3321,7 +3321,7 @@ INT_R.SW6BEG2.LOGIC_OUTS14 origin:050-pip-seed 03_44 07_45
|
|||
INT_R.SW6BEG2.LOGIC_OUTS16 origin:050-pip-seed 04_46 06_44
|
||||
INT_R.SW6BEG2.LOGIC_OUTS20 origin:050-pip-seed 06_44 07_45
|
||||
INT_R.SW6BEG2.EE2END2 origin:050-pip-seed 03_44 04_45
|
||||
INT_R.SW6BEG2.EE4END2 origin:056-pip-rem 04_45 05_44
|
||||
INT_R.SW6BEG2.EE4END2 origin:050-pip-seed 04_45 05_44
|
||||
INT_R.SW6BEG2.LVB0 origin:056-pip-rem 04_46 05_44
|
||||
INT_R.SW6BEG2.LVB12 origin:056-pip-rem 05_44 07_45
|
||||
INT_R.SW6BEG2.NW2END3 origin:050-pip-seed 02_45 05_47
|
||||
|
|
@ -3603,7 +3603,7 @@ INT_R.WW4BEG2.LOGIC_OUTS20 origin:050-pip-seed 04_34 06_32
|
|||
INT_R.WW4BEG2.LVB0 origin:056-pip-rem 04_34 05_32
|
||||
INT_R.WW4BEG2.LVB12 origin:056-pip-rem 05_32 07_33
|
||||
INT_R.WW4BEG2.NE2END2 origin:050-pip-seed 02_33 05_35
|
||||
INT_R.WW4BEG2.NE6END2 origin:050-pip-seed 05_32 05_35
|
||||
INT_R.WW4BEG2.NE6END2 origin:056-pip-rem 05_32 05_35
|
||||
INT_R.WW4BEG2.NN2END2 origin:050-pip-seed 03_32 05_35
|
||||
INT_R.WW4BEG2.NN6END2 origin:050-pip-seed 05_35 06_32
|
||||
INT_R.WW4BEG2.NW2END2 origin:050-pip-seed 02_33 03_33
|
||||
|
|
@ -3623,7 +3623,7 @@ INT_R.WW4BEG3.LOGIC_OUTS21 origin:050-pip-seed 06_48 07_49
|
|||
INT_R.WW4BEG3.LH0 origin:056-pip-rem 04_50 05_48
|
||||
INT_R.WW4BEG3.LV18 origin:056-pip-rem 05_48 07_49
|
||||
INT_R.WW4BEG3.NE2END3 origin:050-pip-seed 02_49 05_51
|
||||
INT_R.WW4BEG3.NE6END3 origin:050-pip-seed 05_48 05_51
|
||||
INT_R.WW4BEG3.NE6END3 origin:056-pip-rem 05_48 05_51
|
||||
INT_R.WW4BEG3.NN2END3 origin:050-pip-seed 03_48 05_51
|
||||
INT_R.WW4BEG3.NN6END3 origin:050-pip-seed 05_51 06_48
|
||||
INT_R.WW4BEG3.NW2END3 origin:050-pip-seed 02_49 03_49
|
||||
|
|
|
|||
|
|
@ -1,14 +1,21 @@
|
|||
LIOB33.DIFF.ZIBUF_LOW_PWR 38_44 39_83
|
||||
LIOB33.IOB_Y0.IBUFDISABLE.I 38_82
|
||||
LIOB33.IOB_Y0.IN_TERM.NONE !38_120 !38_122 !39_121 !39_123
|
||||
LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 38_120 38_122 39_121 39_123
|
||||
LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 38_120 38_122 !39_121 39_123
|
||||
LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 38_120 !38_122 !39_121 39_123
|
||||
LIOB33.IOB_Y0.INTERMDISABLE.I 39_89
|
||||
LIOB33.IOB_Y0.LVDS_25.DRIVE.I_FIXED 38_64 38_74 38_76 38_98 38_100 38_102 38_118 39_65 39_75 39_97 !39_101 39_113 39_119 39_125
|
||||
LIOB33.IOB_Y0.LVDS_25.IN 38_86 39_87
|
||||
LIOB33.IOB_Y0.LVDS_25.OUT 38_64 38_74 38_76 38_98 38_102 39_65 39_75 !39_101
|
||||
LIOB33.IOB_Y0.LVTTL.DRIVE.I24 38_64 !38_112 !38_118 38_126 39_65 39_117 39_119 !39_125 !39_127
|
||||
LIOB33.IOB_Y0.PULLTYPE.KEEPER 38_92 38_94 !39_93
|
||||
LIOB33.IOB_Y0.PULLTYPE.NONE !38_92 38_94 !39_93
|
||||
LIOB33.IOB_Y0.PULLTYPE.PULLDOWN !38_92 !38_94 !39_93
|
||||
LIOB33.IOB_Y0.PULLTYPE.PULLUP !38_92 38_94 39_93
|
||||
LIOB33.IOB_Y0.TMDS_33.DRIVE.I_FIXED 38_64 !38_74 !38_76 !38_98 !38_100 !38_102 38_118 39_65 !39_75 !39_97 39_101 39_113 39_119 39_125
|
||||
LIOB33.IOB_Y0.TMDS_33.IN 38_86 !39_87
|
||||
LIOB33.IOB_Y0.TMDS_33.OUT 38_64 !38_74 !38_76 !38_98 !38_102 39_65 !39_75 39_101
|
||||
LIOB33.IOB_Y0.ZIBUF_LOW_PWR 38_84
|
||||
LIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 38_64 38_112 38_118 38_126 39_65 39_113 !39_117 !39_119 39_125 !39_127
|
||||
LIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 !39_119 !39_125 39_127
|
||||
|
|
|
|||
|
|
@ -1,14 +1,21 @@
|
|||
LIOB33.DIFF.ZIBUF_LOW_PWR origin:030-iob 38_44 39_83
|
||||
LIOB33.IOB_Y0.IBUFDISABLE.I origin:030-iob 38_82
|
||||
LIOB33.IOB_Y0.IN_TERM.NONE origin:030-iob !38_120 !38_122 !39_121 !39_123
|
||||
LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_120 38_122 39_121 39_123
|
||||
LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob !39_121 38_120 38_122 39_123
|
||||
LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob !38_122 !39_121 38_120 39_123
|
||||
LIOB33.IOB_Y0.INTERMDISABLE.I origin:030-iob 39_89
|
||||
LIOB33.IOB_Y0.LVDS_25.DRIVE.I_FIXED origin:030-iob !39_101 38_100 38_102 38_118 38_64 38_74 38_76 38_98 39_113 39_119 39_125 39_65 39_75 39_97
|
||||
LIOB33.IOB_Y0.LVDS_25.IN origin:030-iob 38_86 39_87
|
||||
LIOB33.IOB_Y0.LVDS_25.OUT origin:030-iob !39_101 38_102 38_64 38_74 38_76 38_98 39_65 39_75
|
||||
LIOB33.IOB_Y0.LVTTL.DRIVE.I24 origin:030-iob !38_112 !38_118 !39_125 !39_127 38_126 38_64 39_117 39_119 39_65
|
||||
LIOB33.IOB_Y0.PULLTYPE.KEEPER origin:030-iob !39_93 38_92 38_94
|
||||
LIOB33.IOB_Y0.PULLTYPE.NONE origin:030-iob !38_92 !39_93 38_94
|
||||
LIOB33.IOB_Y0.PULLTYPE.PULLDOWN origin:030-iob !38_92 !38_94 !39_93
|
||||
LIOB33.IOB_Y0.PULLTYPE.PULLUP origin:030-iob !38_92 38_94 39_93
|
||||
LIOB33.IOB_Y0.TMDS_33.DRIVE.I_FIXED origin:030-iob !38_100 !38_102 !38_74 !38_76 !38_98 !39_75 !39_97 38_118 38_64 39_101 39_113 39_119 39_125 39_65
|
||||
LIOB33.IOB_Y0.TMDS_33.IN origin:030-iob !39_87 38_86
|
||||
LIOB33.IOB_Y0.TMDS_33.OUT origin:030-iob !38_102 !38_74 !38_76 !38_98 !39_75 38_64 39_101 39_65
|
||||
LIOB33.IOB_Y0.ZIBUF_LOW_PWR origin:030-iob 38_84
|
||||
LIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 origin:030-iob !39_117 !39_119 !39_127 38_112 38_118 38_126 38_64 39_113 39_125 39_65
|
||||
LIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 origin:030-iob !38_118 !39_117 !39_119 !39_125 38_112 38_126 38_64 39_113 39_127 39_65
|
||||
|
|
|
|||
|
|
@ -1,14 +1,21 @@
|
|||
RIOB33.DIFF.ZIBUF_LOW_PWR 38_44 39_83
|
||||
RIOB33.IOB_Y0.IBUFDISABLE.I 38_82
|
||||
RIOB33.IOB_Y0.IN_TERM.NONE !38_120 !38_122 !39_121 !39_123
|
||||
RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 38_120 38_122 39_121 39_123
|
||||
RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 38_120 38_122 !39_121 39_123
|
||||
RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 38_120 !38_122 !39_121 39_123
|
||||
RIOB33.IOB_Y0.INTERMDISABLE.I 39_89
|
||||
RIOB33.IOB_Y0.LVDS_25.DRIVE.I_FIXED 38_64 38_74 38_76 38_98 38_100 38_102 38_118 39_65 39_75 39_97 !39_101 39_113 39_119 39_125
|
||||
RIOB33.IOB_Y0.LVDS_25.IN 38_86 39_87
|
||||
RIOB33.IOB_Y0.LVDS_25.OUT 38_64 38_74 38_76 38_98 38_102 39_65 39_75 !39_101
|
||||
RIOB33.IOB_Y0.LVTTL.DRIVE.I24 38_64 !38_112 !38_118 38_126 39_65 39_117 39_119 !39_125 !39_127
|
||||
RIOB33.IOB_Y0.PULLTYPE.KEEPER 38_92 38_94 !39_93
|
||||
RIOB33.IOB_Y0.PULLTYPE.NONE !38_92 38_94 !39_93
|
||||
RIOB33.IOB_Y0.PULLTYPE.PULLDOWN !38_92 !38_94 !39_93
|
||||
RIOB33.IOB_Y0.PULLTYPE.PULLUP !38_92 38_94 39_93
|
||||
RIOB33.IOB_Y0.TMDS_33.DRIVE.I_FIXED 38_64 !38_74 !38_76 !38_98 !38_100 !38_102 38_118 39_65 !39_75 !39_97 39_101 39_113 39_119 39_125
|
||||
RIOB33.IOB_Y0.TMDS_33.IN 38_86 !39_87
|
||||
RIOB33.IOB_Y0.TMDS_33.OUT 38_64 !38_74 !38_76 !38_98 !38_102 39_65 !39_75 39_101
|
||||
RIOB33.IOB_Y0.ZIBUF_LOW_PWR 38_84
|
||||
RIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 38_64 38_112 38_118 38_126 39_65 39_113 !39_117 !39_119 39_125 !39_127
|
||||
RIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 !39_119 !39_125 39_127
|
||||
|
|
|
|||
|
|
@ -1,14 +1,21 @@
|
|||
RIOB33.DIFF.ZIBUF_LOW_PWR origin:030-iob 38_44 39_83
|
||||
RIOB33.IOB_Y0.IBUFDISABLE.I origin:030-iob 38_82
|
||||
RIOB33.IOB_Y0.IN_TERM.NONE origin:030-iob !38_120 !38_122 !39_121 !39_123
|
||||
RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_120 38_122 39_121 39_123
|
||||
RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob !39_121 38_120 38_122 39_123
|
||||
RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob !38_122 !39_121 38_120 39_123
|
||||
RIOB33.IOB_Y0.INTERMDISABLE.I origin:030-iob 39_89
|
||||
RIOB33.IOB_Y0.LVDS_25.DRIVE.I_FIXED origin:030-iob !39_101 38_100 38_102 38_118 38_64 38_74 38_76 38_98 39_113 39_119 39_125 39_65 39_75 39_97
|
||||
RIOB33.IOB_Y0.LVDS_25.IN origin:030-iob 38_86 39_87
|
||||
RIOB33.IOB_Y0.LVDS_25.OUT origin:030-iob !39_101 38_102 38_64 38_74 38_76 38_98 39_65 39_75
|
||||
RIOB33.IOB_Y0.LVTTL.DRIVE.I24 origin:030-iob !38_112 !38_118 !39_125 !39_127 38_126 38_64 39_117 39_119 39_65
|
||||
RIOB33.IOB_Y0.PULLTYPE.KEEPER origin:030-iob !39_93 38_92 38_94
|
||||
RIOB33.IOB_Y0.PULLTYPE.NONE origin:030-iob !38_92 !39_93 38_94
|
||||
RIOB33.IOB_Y0.PULLTYPE.PULLDOWN origin:030-iob !38_92 !38_94 !39_93
|
||||
RIOB33.IOB_Y0.PULLTYPE.PULLUP origin:030-iob !38_92 38_94 39_93
|
||||
RIOB33.IOB_Y0.TMDS_33.DRIVE.I_FIXED origin:030-iob !38_100 !38_102 !38_74 !38_76 !38_98 !39_75 !39_97 38_118 38_64 39_101 39_113 39_119 39_125 39_65
|
||||
RIOB33.IOB_Y0.TMDS_33.IN origin:030-iob !39_87 38_86
|
||||
RIOB33.IOB_Y0.TMDS_33.OUT origin:030-iob !38_102 !38_74 !38_76 !38_98 !39_75 38_64 39_101 39_65
|
||||
RIOB33.IOB_Y0.ZIBUF_LOW_PWR origin:030-iob 38_84
|
||||
RIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 origin:030-iob !39_117 !39_119 !39_127 38_112 38_118 38_126 38_64 39_113 39_125 39_65
|
||||
RIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 origin:030-iob !38_118 !39_117 !39_119 !39_125 38_112 38_126 38_64 39_113 39_127 39_65
|
||||
|
|
|
|||
|
|
@ -17,11 +17,16 @@ bit 38_42
|
|||
bit 38_44
|
||||
bit 38_62
|
||||
bit 38_64
|
||||
bit 38_74
|
||||
bit 38_76
|
||||
bit 38_82
|
||||
bit 38_84
|
||||
bit 38_86
|
||||
bit 38_92
|
||||
bit 38_94
|
||||
bit 38_98
|
||||
bit 38_100
|
||||
bit 38_102
|
||||
bit 38_106
|
||||
bit 38_110
|
||||
bit 38_112
|
||||
|
|
@ -45,12 +50,15 @@ bit 39_59
|
|||
bit 39_61
|
||||
bit 39_63
|
||||
bit 39_65
|
||||
bit 39_75
|
||||
bit 39_83
|
||||
bit 39_85
|
||||
bit 39_87
|
||||
bit 39_89
|
||||
bit 39_93
|
||||
bit 39_95
|
||||
bit 39_97
|
||||
bit 39_101
|
||||
bit 39_105
|
||||
bit 39_107
|
||||
bit 39_109
|
||||
|
|
|
|||
|
|
@ -17,11 +17,16 @@ bit 38_42
|
|||
bit 38_44
|
||||
bit 38_62
|
||||
bit 38_64
|
||||
bit 38_74
|
||||
bit 38_76
|
||||
bit 38_82
|
||||
bit 38_84
|
||||
bit 38_86
|
||||
bit 38_92
|
||||
bit 38_94
|
||||
bit 38_98
|
||||
bit 38_100
|
||||
bit 38_102
|
||||
bit 38_106
|
||||
bit 38_110
|
||||
bit 38_112
|
||||
|
|
@ -45,12 +50,15 @@ bit 39_59
|
|||
bit 39_61
|
||||
bit 39_63
|
||||
bit 39_65
|
||||
bit 39_75
|
||||
bit 39_83
|
||||
bit 39_85
|
||||
bit 39_87
|
||||
bit 39_89
|
||||
bit 39_93
|
||||
bit 39_95
|
||||
bit 39_97
|
||||
bit 39_101
|
||||
bit 39_105
|
||||
bit 39_107
|
||||
bit 39_109
|
||||
|
|
|
|||
|
|
@ -5,12 +5,12 @@ CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_L_LOWER_B_CLK_FREQ_BB3 !28_101
|
|||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_L_LOWER_B_CLK_IN3_HCLK 28_1012 !28_1013 29_979 !29_1012
|
||||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_L_LOWER_B_CLK_IN3_INT 28_1012 28_1013 29_979 !29_1012
|
||||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_LR_LOWER_B_CLKFBOUT2IN 28_980 28_981 29_980
|
||||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB0 28_1014 28_1015 !29_1013 29_1014
|
||||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB1 28_1014 !28_1015 !29_1013 !29_1014
|
||||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB2 !28_1014 !28_1015 !29_1013 29_1014
|
||||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB3 !28_1014 !28_1015 !29_1013 !29_1014
|
||||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_IN1_HCLK !28_1014 !28_1015 29_1013 !29_1014
|
||||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_IN1_INT !28_1014 !28_1015 29_1013 29_1014
|
||||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB0 28_1014 !29_1013 29_1014
|
||||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB1 28_1014 !29_1013 !29_1014
|
||||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB2 !28_1014 !29_1013 29_1014
|
||||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB3 !28_1014 !29_1013 !29_1014
|
||||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_IN1_HCLK !28_1014 29_1013 !29_1014
|
||||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_IN1_INT !28_1014 29_1013 29_1014
|
||||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN2.CMT_L_LOWER_B_CLK_FREQ_BB0 !28_1015 28_1016 29_1015
|
||||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN2.CMT_L_LOWER_B_CLK_FREQ_BB1 !28_1015 !28_1016 29_1015
|
||||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN2.CMT_L_LOWER_B_CLK_FREQ_BB2 !28_1015 28_1016 !29_1015
|
||||
|
|
|
|||
|
|
@ -5,12 +5,12 @@ CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_L_LOWER_B_CLK_FREQ_BB3 origin:
|
|||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_L_LOWER_B_CLK_IN3_HCLK origin:034b-cmt-mmcm-pips !28_1013 !29_1012 28_1012 29_979
|
||||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_L_LOWER_B_CLK_IN3_INT origin:034b-cmt-mmcm-pips !29_1012 28_1012 28_1013 29_979
|
||||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_LR_LOWER_B_CLKFBOUT2IN origin:034b-cmt-mmcm-pips 28_980 28_981 29_980
|
||||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB0 origin:034b-cmt-mmcm-pips !29_1013 28_1014 28_1015 29_1014
|
||||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB1 origin:034b-cmt-mmcm-pips !28_1015 !29_1013 !29_1014 28_1014
|
||||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB2 origin:034b-cmt-mmcm-pips !28_1014 !28_1015 !29_1013 29_1014
|
||||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB3 origin:034b-cmt-mmcm-pips !28_1014 !28_1015 !29_1013 !29_1014
|
||||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_IN1_HCLK origin:034b-cmt-mmcm-pips !28_1014 !28_1015 !29_1014 29_1013
|
||||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_IN1_INT origin:034b-cmt-mmcm-pips !28_1014 !28_1015 29_1013 29_1014
|
||||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB0 origin:034b-cmt-mmcm-pips !29_1013 28_1014 29_1014
|
||||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB1 origin:034b-cmt-mmcm-pips !29_1013 !29_1014 28_1014
|
||||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB2 origin:034b-cmt-mmcm-pips !28_1014 !29_1013 29_1014
|
||||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB3 origin:034b-cmt-mmcm-pips !28_1014 !29_1013 !29_1014
|
||||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_IN1_HCLK origin:034b-cmt-mmcm-pips !28_1014 !29_1014 29_1013
|
||||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_IN1_INT origin:034b-cmt-mmcm-pips !28_1014 29_1013 29_1014
|
||||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN2.CMT_L_LOWER_B_CLK_FREQ_BB0 origin:034b-cmt-mmcm-pips !28_1015 28_1016 29_1015
|
||||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN2.CMT_L_LOWER_B_CLK_FREQ_BB1 origin:034b-cmt-mmcm-pips !28_1015 !28_1016 29_1015
|
||||
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN2.CMT_L_LOWER_B_CLK_FREQ_BB2 origin:034b-cmt-mmcm-pips !28_1015 !29_1015 28_1016
|
||||
|
|
|
|||
|
|
@ -5,12 +5,12 @@ CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_FREQ_BB2 !28_101
|
|||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_FREQ_BB3 !28_1012 !28_1013 29_979 !29_1012
|
||||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_IN3_HCLK 28_1012 !28_1013 29_979 !29_1012
|
||||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_IN3_INT 28_1012 28_1013 29_979 !29_1012
|
||||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB0 28_1014 28_1015 !29_1013 29_1014
|
||||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB1 28_1014 !28_1015 !29_1013 !29_1014
|
||||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB2 !28_1014 !28_1015 !29_1013 29_1014
|
||||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB3 !28_1014 !28_1015 !29_1013 !29_1014
|
||||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_IN1_HCLK !28_1014 !28_1015 29_1013 !29_1014
|
||||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_IN1_INT !28_1014 !28_1015 29_1013 29_1014
|
||||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB0 28_1014 !29_1013 29_1014
|
||||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB1 28_1014 !29_1013 !29_1014
|
||||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB2 !28_1014 !29_1013 29_1014
|
||||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB3 !28_1014 !29_1013 !29_1014
|
||||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_IN1_HCLK !28_1014 29_1013 !29_1014
|
||||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_IN1_INT !28_1014 29_1013 29_1014
|
||||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN2.CMT_R_LOWER_B_CLK_FREQ_BB0 !28_1015 28_1016 29_1015
|
||||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN2.CMT_R_LOWER_B_CLK_FREQ_BB1 !28_1015 !28_1016 29_1015
|
||||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN2.CMT_R_LOWER_B_CLK_FREQ_BB2 !28_1015 28_1016 !29_1015
|
||||
|
|
|
|||
|
|
@ -5,12 +5,12 @@ CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_FREQ_BB2 origin:
|
|||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_FREQ_BB3 origin:034b-cmt-mmcm-pips !28_1012 !28_1013 !29_1012 29_979
|
||||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_IN3_HCLK origin:034b-cmt-mmcm-pips !28_1013 !29_1012 28_1012 29_979
|
||||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_IN3_INT origin:034b-cmt-mmcm-pips !29_1012 28_1012 28_1013 29_979
|
||||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB0 origin:034b-cmt-mmcm-pips !29_1013 28_1014 28_1015 29_1014
|
||||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB1 origin:034b-cmt-mmcm-pips !28_1015 !29_1013 !29_1014 28_1014
|
||||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB2 origin:034b-cmt-mmcm-pips !28_1014 !28_1015 !29_1013 29_1014
|
||||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB3 origin:034b-cmt-mmcm-pips !28_1014 !28_1015 !29_1013 !29_1014
|
||||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_IN1_HCLK origin:034b-cmt-mmcm-pips !28_1014 !28_1015 !29_1014 29_1013
|
||||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_IN1_INT origin:034b-cmt-mmcm-pips !28_1014 !28_1015 29_1013 29_1014
|
||||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB0 origin:034b-cmt-mmcm-pips !29_1013 28_1014 29_1014
|
||||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB1 origin:034b-cmt-mmcm-pips !29_1013 !29_1014 28_1014
|
||||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB2 origin:034b-cmt-mmcm-pips !28_1014 !29_1013 29_1014
|
||||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB3 origin:034b-cmt-mmcm-pips !28_1014 !29_1013 !29_1014
|
||||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_IN1_HCLK origin:034b-cmt-mmcm-pips !28_1014 !29_1014 29_1013
|
||||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_IN1_INT origin:034b-cmt-mmcm-pips !28_1014 29_1013 29_1014
|
||||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN2.CMT_R_LOWER_B_CLK_FREQ_BB0 origin:034b-cmt-mmcm-pips !28_1015 28_1016 29_1015
|
||||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN2.CMT_R_LOWER_B_CLK_FREQ_BB1 origin:034b-cmt-mmcm-pips !28_1015 !28_1016 29_1015
|
||||
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN2.CMT_R_LOWER_B_CLK_FREQ_BB2 origin:034b-cmt-mmcm-pips !28_1015 !29_1015 28_1016
|
||||
|
|
|
|||
|
|
@ -1,3 +1,159 @@
|
|||
DSP_L.DSP_0_CEAD.DSP_GND_L 26_63
|
||||
DSP_L.DSP_0_CEAD.DSP_VCC_L 27_62
|
||||
DSP_L.DSP_0_CEALUMODE.DSP_GND_L 27_51
|
||||
DSP_L.DSP_0_CEALUMODE.DSP_VCC_L 26_50
|
||||
DSP_L.DSP_0_CED.DSP_GND_L 27_72
|
||||
DSP_L.DSP_0_CED.DSP_VCC_L 26_72
|
||||
DSP_L.DSP_0_CEINMODE.DSP_GND_L 26_69
|
||||
DSP_L.DSP_0_CEINMODE.DSP_VCC_L 26_67
|
||||
DSP_L.DSP_0_RSTD.DSP_GND_L 27_96
|
||||
DSP_L.DSP_0_RSTD.DSP_VCC_L 27_85
|
||||
DSP_L.DSP_0_ALUMODE2.DSP_GND_L 27_56
|
||||
DSP_L.DSP_0_ALUMODE2.DSP_VCC_L 26_55
|
||||
DSP_L.DSP_0_ALUMODE3.DSP_GND_L 27_60
|
||||
DSP_L.DSP_0_ALUMODE3.DSP_VCC_L 26_53
|
||||
DSP_L.DSP_0_CARRYINSEL2.DSP_GND_L 26_17
|
||||
DSP_L.DSP_0_CARRYINSEL2.DSP_VCC_L 27_18
|
||||
DSP_L.DSP_0_D0.DSP_GND_L 26_65
|
||||
DSP_L.DSP_0_D0.DSP_VCC_L 27_64
|
||||
DSP_L.DSP_0_D1.DSP_GND_L 27_68
|
||||
DSP_L.DSP_0_D1.DSP_VCC_L 27_74
|
||||
DSP_L.DSP_0_D2.DSP_GND_L 27_71
|
||||
DSP_L.DSP_0_D2.DSP_VCC_L 27_70
|
||||
DSP_L.DSP_0_D3.DSP_GND_L 26_75
|
||||
DSP_L.DSP_0_D3.DSP_VCC_L 26_73
|
||||
DSP_L.DSP_0_D4.DSP_GND_L 27_78
|
||||
DSP_L.DSP_0_D4.DSP_VCC_L 26_77
|
||||
DSP_L.DSP_0_D5.DSP_GND_L 26_82
|
||||
DSP_L.DSP_0_D5.DSP_VCC_L 26_81
|
||||
DSP_L.DSP_0_D6.DSP_GND_L 26_89
|
||||
DSP_L.DSP_0_D6.DSP_VCC_L 27_89
|
||||
DSP_L.DSP_0_D7.DSP_GND_L 27_91
|
||||
DSP_L.DSP_0_D7.DSP_VCC_L 26_91
|
||||
DSP_L.DSP_0_D8.DSP_GND_L 26_98
|
||||
DSP_L.DSP_0_D8.DSP_VCC_L 27_97
|
||||
DSP_L.DSP_0_D9.DSP_GND_L 26_101
|
||||
DSP_L.DSP_0_D9.DSP_VCC_L 26_99
|
||||
DSP_L.DSP_0_D10.DSP_GND_L 26_105
|
||||
DSP_L.DSP_0_D10.DSP_VCC_L 26_103
|
||||
DSP_L.DSP_0_D11.DSP_GND_L 27_107
|
||||
DSP_L.DSP_0_D11.DSP_VCC_L 27_105
|
||||
DSP_L.DSP_0_D12.DSP_GND_L 26_107
|
||||
DSP_L.DSP_0_D12.DSP_VCC_L 26_111
|
||||
DSP_L.DSP_0_D13.DSP_GND_L 27_113
|
||||
DSP_L.DSP_0_D13.DSP_VCC_L 26_114
|
||||
DSP_L.DSP_0_D14.DSP_GND_L 26_118
|
||||
DSP_L.DSP_0_D14.DSP_VCC_L 27_116
|
||||
DSP_L.DSP_0_D15.DSP_GND_L 27_122
|
||||
DSP_L.DSP_0_D15.DSP_VCC_L 27_120
|
||||
DSP_L.DSP_0_D16.DSP_GND_L 27_125
|
||||
DSP_L.DSP_0_D16.DSP_VCC_L 26_125
|
||||
DSP_L.DSP_0_D17.DSP_GND_L 27_128
|
||||
DSP_L.DSP_0_D17.DSP_VCC_L 27_126
|
||||
DSP_L.DSP_0_D18.DSP_GND_L 26_135
|
||||
DSP_L.DSP_0_D18.DSP_VCC_L 26_131
|
||||
DSP_L.DSP_0_D19.DSP_GND_L 27_140
|
||||
DSP_L.DSP_0_D19.DSP_VCC_L 26_140
|
||||
DSP_L.DSP_0_D20.DSP_GND_L 26_145
|
||||
DSP_L.DSP_0_D20.DSP_VCC_L 27_143
|
||||
DSP_L.DSP_0_D21.DSP_GND_L 27_147
|
||||
DSP_L.DSP_0_D21.DSP_VCC_L 26_147
|
||||
DSP_L.DSP_0_D22.DSP_GND_L 27_151
|
||||
DSP_L.DSP_0_D22.DSP_VCC_L 26_150
|
||||
DSP_L.DSP_0_D23.DSP_GND_L 27_154
|
||||
DSP_L.DSP_0_D23.DSP_VCC_L 27_153
|
||||
DSP_L.DSP_0_D24.DSP_GND_L 27_158
|
||||
DSP_L.DSP_0_D24.DSP_VCC_L 27_155
|
||||
DSP_L.DSP_0_INMODE0.DSP_GND_L 27_134
|
||||
DSP_L.DSP_0_INMODE0.DSP_VCC_L 27_130
|
||||
DSP_L.DSP_0_INMODE1.DSP_GND_L 26_133
|
||||
DSP_L.DSP_0_INMODE1.DSP_VCC_L 27_145
|
||||
DSP_L.DSP_0_INMODE2.DSP_GND_L 27_80
|
||||
DSP_L.DSP_0_INMODE2.DSP_VCC_L 26_71
|
||||
DSP_L.DSP_0_INMODE3.DSP_GND_L 27_79
|
||||
DSP_L.DSP_0_INMODE3.DSP_VCC_L 26_70
|
||||
DSP_L.DSP_0_INMODE4.DSP_GND_L 26_58
|
||||
DSP_L.DSP_0_INMODE4.DSP_VCC_L 26_46
|
||||
DSP_L.DSP_0_OPMODE6.DSP_GND_L 27_12
|
||||
DSP_L.DSP_0_OPMODE6.DSP_VCC_L 27_20
|
||||
DSP_L.DSP_1_CEAD.DSP_GND_L 26_223
|
||||
DSP_L.DSP_1_CEAD.DSP_VCC_L 27_222
|
||||
DSP_L.DSP_1_CEALUMODE.DSP_GND_L 27_211
|
||||
DSP_L.DSP_1_CEALUMODE.DSP_VCC_L 26_210
|
||||
DSP_L.DSP_1_CED.DSP_GND_L 27_232
|
||||
DSP_L.DSP_1_CED.DSP_VCC_L 26_232
|
||||
DSP_L.DSP_1_CEINMODE.DSP_GND_L 26_229
|
||||
DSP_L.DSP_1_CEINMODE.DSP_VCC_L 26_227
|
||||
DSP_L.DSP_1_RSTD.DSP_GND_L 27_256
|
||||
DSP_L.DSP_1_RSTD.DSP_VCC_L 27_245
|
||||
DSP_L.DSP_1_ALUMODE2.DSP_GND_L 27_216
|
||||
DSP_L.DSP_1_ALUMODE2.DSP_VCC_L 26_215
|
||||
DSP_L.DSP_1_ALUMODE3.DSP_GND_L 27_220
|
||||
DSP_L.DSP_1_ALUMODE3.DSP_VCC_L 26_213
|
||||
DSP_L.DSP_1_CARRYINSEL2.DSP_GND_L 26_177
|
||||
DSP_L.DSP_1_CARRYINSEL2.DSP_VCC_L 27_178
|
||||
DSP_L.DSP_1_D0.DSP_GND_L 26_225
|
||||
DSP_L.DSP_1_D0.DSP_VCC_L 27_224
|
||||
DSP_L.DSP_1_D1.DSP_GND_L 27_228
|
||||
DSP_L.DSP_1_D1.DSP_VCC_L 27_234
|
||||
DSP_L.DSP_1_D2.DSP_GND_L 27_231
|
||||
DSP_L.DSP_1_D2.DSP_VCC_L 27_230
|
||||
DSP_L.DSP_1_D3.DSP_GND_L 26_235
|
||||
DSP_L.DSP_1_D3.DSP_VCC_L 26_233
|
||||
DSP_L.DSP_1_D4.DSP_GND_L 27_238
|
||||
DSP_L.DSP_1_D4.DSP_VCC_L 26_237
|
||||
DSP_L.DSP_1_D5.DSP_GND_L 26_242
|
||||
DSP_L.DSP_1_D5.DSP_VCC_L 26_241
|
||||
DSP_L.DSP_1_D6.DSP_GND_L 26_249
|
||||
DSP_L.DSP_1_D6.DSP_VCC_L 27_249
|
||||
DSP_L.DSP_1_D7.DSP_GND_L 27_251
|
||||
DSP_L.DSP_1_D7.DSP_VCC_L 26_251
|
||||
DSP_L.DSP_1_D8.DSP_GND_L 26_258
|
||||
DSP_L.DSP_1_D8.DSP_VCC_L 27_257
|
||||
DSP_L.DSP_1_D9.DSP_GND_L 26_261
|
||||
DSP_L.DSP_1_D9.DSP_VCC_L 26_259
|
||||
DSP_L.DSP_1_D10.DSP_GND_L 26_265
|
||||
DSP_L.DSP_1_D10.DSP_VCC_L 26_263
|
||||
DSP_L.DSP_1_D11.DSP_GND_L 27_267
|
||||
DSP_L.DSP_1_D11.DSP_VCC_L 27_265
|
||||
DSP_L.DSP_1_D12.DSP_GND_L 26_267
|
||||
DSP_L.DSP_1_D12.DSP_VCC_L 26_271
|
||||
DSP_L.DSP_1_D13.DSP_GND_L 27_273
|
||||
DSP_L.DSP_1_D13.DSP_VCC_L 26_274
|
||||
DSP_L.DSP_1_D14.DSP_GND_L 26_278
|
||||
DSP_L.DSP_1_D14.DSP_VCC_L 27_276
|
||||
DSP_L.DSP_1_D15.DSP_GND_L 27_282
|
||||
DSP_L.DSP_1_D15.DSP_VCC_L 27_280
|
||||
DSP_L.DSP_1_D16.DSP_GND_L 27_285
|
||||
DSP_L.DSP_1_D16.DSP_VCC_L 26_285
|
||||
DSP_L.DSP_1_D17.DSP_GND_L 27_288
|
||||
DSP_L.DSP_1_D17.DSP_VCC_L 27_286
|
||||
DSP_L.DSP_1_D18.DSP_GND_L 26_295
|
||||
DSP_L.DSP_1_D18.DSP_VCC_L 26_291
|
||||
DSP_L.DSP_1_D19.DSP_GND_L 27_300
|
||||
DSP_L.DSP_1_D19.DSP_VCC_L 26_300
|
||||
DSP_L.DSP_1_D20.DSP_GND_L 26_305
|
||||
DSP_L.DSP_1_D20.DSP_VCC_L 27_303
|
||||
DSP_L.DSP_1_D21.DSP_GND_L 27_307
|
||||
DSP_L.DSP_1_D21.DSP_VCC_L 26_307
|
||||
DSP_L.DSP_1_D22.DSP_GND_L 27_311
|
||||
DSP_L.DSP_1_D22.DSP_VCC_L 26_310
|
||||
DSP_L.DSP_1_D23.DSP_GND_L 27_314
|
||||
DSP_L.DSP_1_D23.DSP_VCC_L 27_313
|
||||
DSP_L.DSP_1_D24.DSP_GND_L 27_318
|
||||
DSP_L.DSP_1_D24.DSP_VCC_L 27_315
|
||||
DSP_L.DSP_1_INMODE0.DSP_GND_L 27_294
|
||||
DSP_L.DSP_1_INMODE0.DSP_VCC_L 27_290
|
||||
DSP_L.DSP_1_INMODE1.DSP_GND_L 26_293
|
||||
DSP_L.DSP_1_INMODE1.DSP_VCC_L 27_305
|
||||
DSP_L.DSP_1_INMODE2.DSP_GND_L 27_240
|
||||
DSP_L.DSP_1_INMODE2.DSP_VCC_L 26_231
|
||||
DSP_L.DSP_1_INMODE3.DSP_GND_L 27_239
|
||||
DSP_L.DSP_1_INMODE3.DSP_VCC_L 26_230
|
||||
DSP_L.DSP_1_INMODE4.DSP_GND_L 26_218
|
||||
DSP_L.DSP_1_INMODE4.DSP_VCC_L 26_206
|
||||
DSP_L.DSP_1_OPMODE6.DSP_GND_L 27_172
|
||||
DSP_L.DSP_1_OPMODE6.DSP_VCC_L 27_180
|
||||
DSP_L.DSP48.DSP_0.A_INPUT[0] 27_84
|
||||
DSP_L.DSP48.DSP_0.AREG_0 26_113 26_137 27_111
|
||||
DSP_L.DSP48.DSP_0.AREG_2 27_136
|
||||
|
|
|
|||
|
|
@ -1,3 +1,159 @@
|
|||
DSP_L.DSP_0_CEAD.DSP_GND_L origin:101-dsp-pips 26_63
|
||||
DSP_L.DSP_0_CEAD.DSP_VCC_L origin:101-dsp-pips 27_62
|
||||
DSP_L.DSP_0_CEALUMODE.DSP_GND_L origin:101-dsp-pips 27_51
|
||||
DSP_L.DSP_0_CEALUMODE.DSP_VCC_L origin:101-dsp-pips 26_50
|
||||
DSP_L.DSP_0_CED.DSP_GND_L origin:101-dsp-pips 27_72
|
||||
DSP_L.DSP_0_CED.DSP_VCC_L origin:101-dsp-pips 26_72
|
||||
DSP_L.DSP_0_CEINMODE.DSP_GND_L origin:101-dsp-pips 26_69
|
||||
DSP_L.DSP_0_CEINMODE.DSP_VCC_L origin:101-dsp-pips 26_67
|
||||
DSP_L.DSP_0_RSTD.DSP_GND_L origin:101-dsp-pips 27_96
|
||||
DSP_L.DSP_0_RSTD.DSP_VCC_L origin:101-dsp-pips 27_85
|
||||
DSP_L.DSP_0_ALUMODE2.DSP_GND_L origin:101-dsp-pips 27_56
|
||||
DSP_L.DSP_0_ALUMODE2.DSP_VCC_L origin:101-dsp-pips 26_55
|
||||
DSP_L.DSP_0_ALUMODE3.DSP_GND_L origin:101-dsp-pips 27_60
|
||||
DSP_L.DSP_0_ALUMODE3.DSP_VCC_L origin:101-dsp-pips 26_53
|
||||
DSP_L.DSP_0_CARRYINSEL2.DSP_GND_L origin:101-dsp-pips 26_17
|
||||
DSP_L.DSP_0_CARRYINSEL2.DSP_VCC_L origin:101-dsp-pips 27_18
|
||||
DSP_L.DSP_0_D0.DSP_GND_L origin:101-dsp-pips 26_65
|
||||
DSP_L.DSP_0_D0.DSP_VCC_L origin:101-dsp-pips 27_64
|
||||
DSP_L.DSP_0_D1.DSP_GND_L origin:101-dsp-pips 27_68
|
||||
DSP_L.DSP_0_D1.DSP_VCC_L origin:101-dsp-pips 27_74
|
||||
DSP_L.DSP_0_D2.DSP_GND_L origin:101-dsp-pips 27_71
|
||||
DSP_L.DSP_0_D2.DSP_VCC_L origin:101-dsp-pips 27_70
|
||||
DSP_L.DSP_0_D3.DSP_GND_L origin:101-dsp-pips 26_75
|
||||
DSP_L.DSP_0_D3.DSP_VCC_L origin:101-dsp-pips 26_73
|
||||
DSP_L.DSP_0_D4.DSP_GND_L origin:101-dsp-pips 27_78
|
||||
DSP_L.DSP_0_D4.DSP_VCC_L origin:101-dsp-pips 26_77
|
||||
DSP_L.DSP_0_D5.DSP_GND_L origin:101-dsp-pips 26_82
|
||||
DSP_L.DSP_0_D5.DSP_VCC_L origin:101-dsp-pips 26_81
|
||||
DSP_L.DSP_0_D6.DSP_GND_L origin:101-dsp-pips 26_89
|
||||
DSP_L.DSP_0_D6.DSP_VCC_L origin:101-dsp-pips 27_89
|
||||
DSP_L.DSP_0_D7.DSP_GND_L origin:101-dsp-pips 27_91
|
||||
DSP_L.DSP_0_D7.DSP_VCC_L origin:101-dsp-pips 26_91
|
||||
DSP_L.DSP_0_D8.DSP_GND_L origin:101-dsp-pips 26_98
|
||||
DSP_L.DSP_0_D8.DSP_VCC_L origin:101-dsp-pips 27_97
|
||||
DSP_L.DSP_0_D9.DSP_GND_L origin:101-dsp-pips 26_101
|
||||
DSP_L.DSP_0_D9.DSP_VCC_L origin:101-dsp-pips 26_99
|
||||
DSP_L.DSP_0_D10.DSP_GND_L origin:101-dsp-pips 26_105
|
||||
DSP_L.DSP_0_D10.DSP_VCC_L origin:101-dsp-pips 26_103
|
||||
DSP_L.DSP_0_D11.DSP_GND_L origin:101-dsp-pips 27_107
|
||||
DSP_L.DSP_0_D11.DSP_VCC_L origin:101-dsp-pips 27_105
|
||||
DSP_L.DSP_0_D12.DSP_GND_L origin:101-dsp-pips 26_107
|
||||
DSP_L.DSP_0_D12.DSP_VCC_L origin:101-dsp-pips 26_111
|
||||
DSP_L.DSP_0_D13.DSP_GND_L origin:101-dsp-pips 27_113
|
||||
DSP_L.DSP_0_D13.DSP_VCC_L origin:101-dsp-pips 26_114
|
||||
DSP_L.DSP_0_D14.DSP_GND_L origin:101-dsp-pips 26_118
|
||||
DSP_L.DSP_0_D14.DSP_VCC_L origin:101-dsp-pips 27_116
|
||||
DSP_L.DSP_0_D15.DSP_GND_L origin:101-dsp-pips 27_122
|
||||
DSP_L.DSP_0_D15.DSP_VCC_L origin:101-dsp-pips 27_120
|
||||
DSP_L.DSP_0_D16.DSP_GND_L origin:101-dsp-pips 27_125
|
||||
DSP_L.DSP_0_D16.DSP_VCC_L origin:101-dsp-pips 26_125
|
||||
DSP_L.DSP_0_D17.DSP_GND_L origin:101-dsp-pips 27_128
|
||||
DSP_L.DSP_0_D17.DSP_VCC_L origin:101-dsp-pips 27_126
|
||||
DSP_L.DSP_0_D18.DSP_GND_L origin:101-dsp-pips 26_135
|
||||
DSP_L.DSP_0_D18.DSP_VCC_L origin:101-dsp-pips 26_131
|
||||
DSP_L.DSP_0_D19.DSP_GND_L origin:101-dsp-pips 27_140
|
||||
DSP_L.DSP_0_D19.DSP_VCC_L origin:101-dsp-pips 26_140
|
||||
DSP_L.DSP_0_D20.DSP_GND_L origin:101-dsp-pips 26_145
|
||||
DSP_L.DSP_0_D20.DSP_VCC_L origin:101-dsp-pips 27_143
|
||||
DSP_L.DSP_0_D21.DSP_GND_L origin:101-dsp-pips 27_147
|
||||
DSP_L.DSP_0_D21.DSP_VCC_L origin:101-dsp-pips 26_147
|
||||
DSP_L.DSP_0_D22.DSP_GND_L origin:101-dsp-pips 27_151
|
||||
DSP_L.DSP_0_D22.DSP_VCC_L origin:101-dsp-pips 26_150
|
||||
DSP_L.DSP_0_D23.DSP_GND_L origin:101-dsp-pips 27_154
|
||||
DSP_L.DSP_0_D23.DSP_VCC_L origin:101-dsp-pips 27_153
|
||||
DSP_L.DSP_0_D24.DSP_GND_L origin:101-dsp-pips 27_158
|
||||
DSP_L.DSP_0_D24.DSP_VCC_L origin:101-dsp-pips 27_155
|
||||
DSP_L.DSP_0_INMODE0.DSP_GND_L origin:101-dsp-pips 27_134
|
||||
DSP_L.DSP_0_INMODE0.DSP_VCC_L origin:101-dsp-pips 27_130
|
||||
DSP_L.DSP_0_INMODE1.DSP_GND_L origin:101-dsp-pips 26_133
|
||||
DSP_L.DSP_0_INMODE1.DSP_VCC_L origin:101-dsp-pips 27_145
|
||||
DSP_L.DSP_0_INMODE2.DSP_GND_L origin:101-dsp-pips 27_80
|
||||
DSP_L.DSP_0_INMODE2.DSP_VCC_L origin:101-dsp-pips 26_71
|
||||
DSP_L.DSP_0_INMODE3.DSP_GND_L origin:101-dsp-pips 27_79
|
||||
DSP_L.DSP_0_INMODE3.DSP_VCC_L origin:101-dsp-pips 26_70
|
||||
DSP_L.DSP_0_INMODE4.DSP_GND_L origin:101-dsp-pips 26_58
|
||||
DSP_L.DSP_0_INMODE4.DSP_VCC_L origin:101-dsp-pips 26_46
|
||||
DSP_L.DSP_0_OPMODE6.DSP_GND_L origin:101-dsp-pips 27_12
|
||||
DSP_L.DSP_0_OPMODE6.DSP_VCC_L origin:101-dsp-pips 27_20
|
||||
DSP_L.DSP_1_CEAD.DSP_GND_L origin:101-dsp-pips 26_223
|
||||
DSP_L.DSP_1_CEAD.DSP_VCC_L origin:101-dsp-pips 27_222
|
||||
DSP_L.DSP_1_CEALUMODE.DSP_GND_L origin:101-dsp-pips 27_211
|
||||
DSP_L.DSP_1_CEALUMODE.DSP_VCC_L origin:101-dsp-pips 26_210
|
||||
DSP_L.DSP_1_CED.DSP_GND_L origin:101-dsp-pips 27_232
|
||||
DSP_L.DSP_1_CED.DSP_VCC_L origin:101-dsp-pips 26_232
|
||||
DSP_L.DSP_1_CEINMODE.DSP_GND_L origin:101-dsp-pips 26_229
|
||||
DSP_L.DSP_1_CEINMODE.DSP_VCC_L origin:101-dsp-pips 26_227
|
||||
DSP_L.DSP_1_RSTD.DSP_GND_L origin:101-dsp-pips 27_256
|
||||
DSP_L.DSP_1_RSTD.DSP_VCC_L origin:101-dsp-pips 27_245
|
||||
DSP_L.DSP_1_ALUMODE2.DSP_GND_L origin:101-dsp-pips 27_216
|
||||
DSP_L.DSP_1_ALUMODE2.DSP_VCC_L origin:101-dsp-pips 26_215
|
||||
DSP_L.DSP_1_ALUMODE3.DSP_GND_L origin:101-dsp-pips 27_220
|
||||
DSP_L.DSP_1_ALUMODE3.DSP_VCC_L origin:101-dsp-pips 26_213
|
||||
DSP_L.DSP_1_CARRYINSEL2.DSP_GND_L origin:101-dsp-pips 26_177
|
||||
DSP_L.DSP_1_CARRYINSEL2.DSP_VCC_L origin:101-dsp-pips 27_178
|
||||
DSP_L.DSP_1_D0.DSP_GND_L origin:101-dsp-pips 26_225
|
||||
DSP_L.DSP_1_D0.DSP_VCC_L origin:101-dsp-pips 27_224
|
||||
DSP_L.DSP_1_D1.DSP_GND_L origin:101-dsp-pips 27_228
|
||||
DSP_L.DSP_1_D1.DSP_VCC_L origin:101-dsp-pips 27_234
|
||||
DSP_L.DSP_1_D2.DSP_GND_L origin:101-dsp-pips 27_231
|
||||
DSP_L.DSP_1_D2.DSP_VCC_L origin:101-dsp-pips 27_230
|
||||
DSP_L.DSP_1_D3.DSP_GND_L origin:101-dsp-pips 26_235
|
||||
DSP_L.DSP_1_D3.DSP_VCC_L origin:101-dsp-pips 26_233
|
||||
DSP_L.DSP_1_D4.DSP_GND_L origin:101-dsp-pips 27_238
|
||||
DSP_L.DSP_1_D4.DSP_VCC_L origin:101-dsp-pips 26_237
|
||||
DSP_L.DSP_1_D5.DSP_GND_L origin:101-dsp-pips 26_242
|
||||
DSP_L.DSP_1_D5.DSP_VCC_L origin:101-dsp-pips 26_241
|
||||
DSP_L.DSP_1_D6.DSP_GND_L origin:101-dsp-pips 26_249
|
||||
DSP_L.DSP_1_D6.DSP_VCC_L origin:101-dsp-pips 27_249
|
||||
DSP_L.DSP_1_D7.DSP_GND_L origin:101-dsp-pips 27_251
|
||||
DSP_L.DSP_1_D7.DSP_VCC_L origin:101-dsp-pips 26_251
|
||||
DSP_L.DSP_1_D8.DSP_GND_L origin:101-dsp-pips 26_258
|
||||
DSP_L.DSP_1_D8.DSP_VCC_L origin:101-dsp-pips 27_257
|
||||
DSP_L.DSP_1_D9.DSP_GND_L origin:101-dsp-pips 26_261
|
||||
DSP_L.DSP_1_D9.DSP_VCC_L origin:101-dsp-pips 26_259
|
||||
DSP_L.DSP_1_D10.DSP_GND_L origin:101-dsp-pips 26_265
|
||||
DSP_L.DSP_1_D10.DSP_VCC_L origin:101-dsp-pips 26_263
|
||||
DSP_L.DSP_1_D11.DSP_GND_L origin:101-dsp-pips 27_267
|
||||
DSP_L.DSP_1_D11.DSP_VCC_L origin:101-dsp-pips 27_265
|
||||
DSP_L.DSP_1_D12.DSP_GND_L origin:101-dsp-pips 26_267
|
||||
DSP_L.DSP_1_D12.DSP_VCC_L origin:101-dsp-pips 26_271
|
||||
DSP_L.DSP_1_D13.DSP_GND_L origin:101-dsp-pips 27_273
|
||||
DSP_L.DSP_1_D13.DSP_VCC_L origin:101-dsp-pips 26_274
|
||||
DSP_L.DSP_1_D14.DSP_GND_L origin:101-dsp-pips 26_278
|
||||
DSP_L.DSP_1_D14.DSP_VCC_L origin:101-dsp-pips 27_276
|
||||
DSP_L.DSP_1_D15.DSP_GND_L origin:101-dsp-pips 27_282
|
||||
DSP_L.DSP_1_D15.DSP_VCC_L origin:101-dsp-pips 27_280
|
||||
DSP_L.DSP_1_D16.DSP_GND_L origin:101-dsp-pips 27_285
|
||||
DSP_L.DSP_1_D16.DSP_VCC_L origin:101-dsp-pips 26_285
|
||||
DSP_L.DSP_1_D17.DSP_GND_L origin:101-dsp-pips 27_288
|
||||
DSP_L.DSP_1_D17.DSP_VCC_L origin:101-dsp-pips 27_286
|
||||
DSP_L.DSP_1_D18.DSP_GND_L origin:101-dsp-pips 26_295
|
||||
DSP_L.DSP_1_D18.DSP_VCC_L origin:101-dsp-pips 26_291
|
||||
DSP_L.DSP_1_D19.DSP_GND_L origin:101-dsp-pips 27_300
|
||||
DSP_L.DSP_1_D19.DSP_VCC_L origin:101-dsp-pips 26_300
|
||||
DSP_L.DSP_1_D20.DSP_GND_L origin:101-dsp-pips 26_305
|
||||
DSP_L.DSP_1_D20.DSP_VCC_L origin:101-dsp-pips 27_303
|
||||
DSP_L.DSP_1_D21.DSP_GND_L origin:101-dsp-pips 27_307
|
||||
DSP_L.DSP_1_D21.DSP_VCC_L origin:101-dsp-pips 26_307
|
||||
DSP_L.DSP_1_D22.DSP_GND_L origin:101-dsp-pips 27_311
|
||||
DSP_L.DSP_1_D22.DSP_VCC_L origin:101-dsp-pips 26_310
|
||||
DSP_L.DSP_1_D23.DSP_GND_L origin:101-dsp-pips 27_314
|
||||
DSP_L.DSP_1_D23.DSP_VCC_L origin:101-dsp-pips 27_313
|
||||
DSP_L.DSP_1_D24.DSP_GND_L origin:101-dsp-pips 27_318
|
||||
DSP_L.DSP_1_D24.DSP_VCC_L origin:101-dsp-pips 27_315
|
||||
DSP_L.DSP_1_INMODE0.DSP_GND_L origin:101-dsp-pips 27_294
|
||||
DSP_L.DSP_1_INMODE0.DSP_VCC_L origin:101-dsp-pips 27_290
|
||||
DSP_L.DSP_1_INMODE1.DSP_GND_L origin:101-dsp-pips 26_293
|
||||
DSP_L.DSP_1_INMODE1.DSP_VCC_L origin:101-dsp-pips 27_305
|
||||
DSP_L.DSP_1_INMODE2.DSP_GND_L origin:101-dsp-pips 27_240
|
||||
DSP_L.DSP_1_INMODE2.DSP_VCC_L origin:101-dsp-pips 26_231
|
||||
DSP_L.DSP_1_INMODE3.DSP_GND_L origin:101-dsp-pips 27_239
|
||||
DSP_L.DSP_1_INMODE3.DSP_VCC_L origin:101-dsp-pips 26_230
|
||||
DSP_L.DSP_1_INMODE4.DSP_GND_L origin:101-dsp-pips 26_218
|
||||
DSP_L.DSP_1_INMODE4.DSP_VCC_L origin:101-dsp-pips 26_206
|
||||
DSP_L.DSP_1_OPMODE6.DSP_GND_L origin:101-dsp-pips 27_172
|
||||
DSP_L.DSP_1_OPMODE6.DSP_VCC_L origin:101-dsp-pips 27_180
|
||||
DSP_L.DSP48.DSP_0.A_INPUT[0] origin:100-dsp-mskpat 27_84
|
||||
DSP_L.DSP48.DSP_0.AREG_0 origin:100-dsp-mskpat 26_113 26_137 27_111
|
||||
DSP_L.DSP48.DSP_0.AREG_2 origin:100-dsp-mskpat 27_136
|
||||
|
|
|
|||
|
|
@ -1,3 +1,159 @@
|
|||
DSP_R.DSP_0_CEAD.DSP_GND_R 26_63
|
||||
DSP_R.DSP_0_CEAD.DSP_VCC_R 27_62
|
||||
DSP_R.DSP_0_CEALUMODE.DSP_GND_R 27_51
|
||||
DSP_R.DSP_0_CEALUMODE.DSP_VCC_R 26_50
|
||||
DSP_R.DSP_0_CED.DSP_GND_R 27_72
|
||||
DSP_R.DSP_0_CED.DSP_VCC_R 26_72
|
||||
DSP_R.DSP_0_CEINMODE.DSP_GND_R 26_69
|
||||
DSP_R.DSP_0_CEINMODE.DSP_VCC_R 26_67
|
||||
DSP_R.DSP_0_RSTD.DSP_GND_R 27_96
|
||||
DSP_R.DSP_0_RSTD.DSP_VCC_R 27_85
|
||||
DSP_R.DSP_0_ALUMODE2.DSP_GND_R 27_56
|
||||
DSP_R.DSP_0_ALUMODE2.DSP_VCC_R 26_55
|
||||
DSP_R.DSP_0_ALUMODE3.DSP_GND_R 27_60
|
||||
DSP_R.DSP_0_ALUMODE3.DSP_VCC_R 26_53
|
||||
DSP_R.DSP_0_CARRYINSEL2.DSP_GND_R 26_17
|
||||
DSP_R.DSP_0_CARRYINSEL2.DSP_VCC_R 27_18
|
||||
DSP_R.DSP_0_D0.DSP_GND_R 26_65
|
||||
DSP_R.DSP_0_D0.DSP_VCC_R 27_64
|
||||
DSP_R.DSP_0_D1.DSP_GND_R 27_68
|
||||
DSP_R.DSP_0_D1.DSP_VCC_R 27_74
|
||||
DSP_R.DSP_0_D2.DSP_GND_R 27_71
|
||||
DSP_R.DSP_0_D2.DSP_VCC_R 27_70
|
||||
DSP_R.DSP_0_D3.DSP_GND_R 26_75
|
||||
DSP_R.DSP_0_D3.DSP_VCC_R 26_73
|
||||
DSP_R.DSP_0_D4.DSP_GND_R 27_78
|
||||
DSP_R.DSP_0_D4.DSP_VCC_R 26_77
|
||||
DSP_R.DSP_0_D5.DSP_GND_R 26_82
|
||||
DSP_R.DSP_0_D5.DSP_VCC_R 26_81
|
||||
DSP_R.DSP_0_D6.DSP_GND_R 26_89
|
||||
DSP_R.DSP_0_D6.DSP_VCC_R 27_89
|
||||
DSP_R.DSP_0_D7.DSP_GND_R 27_91
|
||||
DSP_R.DSP_0_D7.DSP_VCC_R 26_91
|
||||
DSP_R.DSP_0_D8.DSP_GND_R 26_98
|
||||
DSP_R.DSP_0_D8.DSP_VCC_R 27_97
|
||||
DSP_R.DSP_0_D9.DSP_GND_R 26_101
|
||||
DSP_R.DSP_0_D9.DSP_VCC_R 26_99
|
||||
DSP_R.DSP_0_D10.DSP_GND_R 26_105
|
||||
DSP_R.DSP_0_D10.DSP_VCC_R 26_103
|
||||
DSP_R.DSP_0_D11.DSP_GND_R 27_107
|
||||
DSP_R.DSP_0_D11.DSP_VCC_R 27_105
|
||||
DSP_R.DSP_0_D12.DSP_GND_R 26_107
|
||||
DSP_R.DSP_0_D12.DSP_VCC_R 26_111
|
||||
DSP_R.DSP_0_D13.DSP_GND_R 27_113
|
||||
DSP_R.DSP_0_D13.DSP_VCC_R 26_114
|
||||
DSP_R.DSP_0_D14.DSP_GND_R 26_118
|
||||
DSP_R.DSP_0_D14.DSP_VCC_R 27_116
|
||||
DSP_R.DSP_0_D15.DSP_GND_R 27_122
|
||||
DSP_R.DSP_0_D15.DSP_VCC_R 27_120
|
||||
DSP_R.DSP_0_D16.DSP_GND_R 27_125
|
||||
DSP_R.DSP_0_D16.DSP_VCC_R 26_125
|
||||
DSP_R.DSP_0_D17.DSP_GND_R 27_128
|
||||
DSP_R.DSP_0_D17.DSP_VCC_R 27_126
|
||||
DSP_R.DSP_0_D18.DSP_GND_R 26_135
|
||||
DSP_R.DSP_0_D18.DSP_VCC_R 26_131
|
||||
DSP_R.DSP_0_D19.DSP_GND_R 27_140
|
||||
DSP_R.DSP_0_D19.DSP_VCC_R 26_140
|
||||
DSP_R.DSP_0_D20.DSP_GND_R 26_145
|
||||
DSP_R.DSP_0_D20.DSP_VCC_R 27_143
|
||||
DSP_R.DSP_0_D21.DSP_GND_R 27_147
|
||||
DSP_R.DSP_0_D21.DSP_VCC_R 26_147
|
||||
DSP_R.DSP_0_D22.DSP_GND_R 27_151
|
||||
DSP_R.DSP_0_D22.DSP_VCC_R 26_150
|
||||
DSP_R.DSP_0_D23.DSP_GND_R 27_154
|
||||
DSP_R.DSP_0_D23.DSP_VCC_R 27_153
|
||||
DSP_R.DSP_0_D24.DSP_GND_R 27_158
|
||||
DSP_R.DSP_0_D24.DSP_VCC_R 27_155
|
||||
DSP_R.DSP_0_INMODE0.DSP_GND_R 27_134
|
||||
DSP_R.DSP_0_INMODE0.DSP_VCC_R 27_130
|
||||
DSP_R.DSP_0_INMODE1.DSP_GND_R 26_133
|
||||
DSP_R.DSP_0_INMODE1.DSP_VCC_R 27_145
|
||||
DSP_R.DSP_0_INMODE2.DSP_GND_R 27_80
|
||||
DSP_R.DSP_0_INMODE2.DSP_VCC_R 26_71
|
||||
DSP_R.DSP_0_INMODE3.DSP_GND_R 27_79
|
||||
DSP_R.DSP_0_INMODE3.DSP_VCC_R 26_70
|
||||
DSP_R.DSP_0_INMODE4.DSP_GND_R 26_58
|
||||
DSP_R.DSP_0_INMODE4.DSP_VCC_R 26_46
|
||||
DSP_R.DSP_0_OPMODE6.DSP_GND_R 27_12
|
||||
DSP_R.DSP_0_OPMODE6.DSP_VCC_R 27_20
|
||||
DSP_R.DSP_1_CEAD.DSP_GND_R 26_223
|
||||
DSP_R.DSP_1_CEAD.DSP_VCC_R 27_222
|
||||
DSP_R.DSP_1_CEALUMODE.DSP_GND_R 27_211
|
||||
DSP_R.DSP_1_CEALUMODE.DSP_VCC_R 26_210
|
||||
DSP_R.DSP_1_CED.DSP_GND_R 27_232
|
||||
DSP_R.DSP_1_CED.DSP_VCC_R 26_232
|
||||
DSP_R.DSP_1_CEINMODE.DSP_GND_R 26_229
|
||||
DSP_R.DSP_1_CEINMODE.DSP_VCC_R 26_227
|
||||
DSP_R.DSP_1_RSTD.DSP_GND_R 27_256
|
||||
DSP_R.DSP_1_RSTD.DSP_VCC_R 27_245
|
||||
DSP_R.DSP_1_ALUMODE2.DSP_GND_R 27_216
|
||||
DSP_R.DSP_1_ALUMODE2.DSP_VCC_R 26_215
|
||||
DSP_R.DSP_1_ALUMODE3.DSP_GND_R 27_220
|
||||
DSP_R.DSP_1_ALUMODE3.DSP_VCC_R 26_213
|
||||
DSP_R.DSP_1_CARRYINSEL2.DSP_GND_R 26_177
|
||||
DSP_R.DSP_1_CARRYINSEL2.DSP_VCC_R 27_178
|
||||
DSP_R.DSP_1_D0.DSP_GND_R 26_225
|
||||
DSP_R.DSP_1_D0.DSP_VCC_R 27_224
|
||||
DSP_R.DSP_1_D1.DSP_GND_R 27_228
|
||||
DSP_R.DSP_1_D1.DSP_VCC_R 27_234
|
||||
DSP_R.DSP_1_D2.DSP_GND_R 27_231
|
||||
DSP_R.DSP_1_D2.DSP_VCC_R 27_230
|
||||
DSP_R.DSP_1_D3.DSP_GND_R 26_235
|
||||
DSP_R.DSP_1_D3.DSP_VCC_R 26_233
|
||||
DSP_R.DSP_1_D4.DSP_GND_R 27_238
|
||||
DSP_R.DSP_1_D4.DSP_VCC_R 26_237
|
||||
DSP_R.DSP_1_D5.DSP_GND_R 26_242
|
||||
DSP_R.DSP_1_D5.DSP_VCC_R 26_241
|
||||
DSP_R.DSP_1_D6.DSP_GND_R 26_249
|
||||
DSP_R.DSP_1_D6.DSP_VCC_R 27_249
|
||||
DSP_R.DSP_1_D7.DSP_GND_R 27_251
|
||||
DSP_R.DSP_1_D7.DSP_VCC_R 26_251
|
||||
DSP_R.DSP_1_D8.DSP_GND_R 26_258
|
||||
DSP_R.DSP_1_D8.DSP_VCC_R 27_257
|
||||
DSP_R.DSP_1_D9.DSP_GND_R 26_261
|
||||
DSP_R.DSP_1_D9.DSP_VCC_R 26_259
|
||||
DSP_R.DSP_1_D10.DSP_GND_R 26_265
|
||||
DSP_R.DSP_1_D10.DSP_VCC_R 26_263
|
||||
DSP_R.DSP_1_D11.DSP_GND_R 27_267
|
||||
DSP_R.DSP_1_D11.DSP_VCC_R 27_265
|
||||
DSP_R.DSP_1_D12.DSP_GND_R 26_267
|
||||
DSP_R.DSP_1_D12.DSP_VCC_R 26_271
|
||||
DSP_R.DSP_1_D13.DSP_GND_R 27_273
|
||||
DSP_R.DSP_1_D13.DSP_VCC_R 26_274
|
||||
DSP_R.DSP_1_D14.DSP_GND_R 26_278
|
||||
DSP_R.DSP_1_D14.DSP_VCC_R 27_276
|
||||
DSP_R.DSP_1_D15.DSP_GND_R 27_282
|
||||
DSP_R.DSP_1_D15.DSP_VCC_R 27_280
|
||||
DSP_R.DSP_1_D16.DSP_GND_R 27_285
|
||||
DSP_R.DSP_1_D16.DSP_VCC_R 26_285
|
||||
DSP_R.DSP_1_D17.DSP_GND_R 27_288
|
||||
DSP_R.DSP_1_D17.DSP_VCC_R 27_286
|
||||
DSP_R.DSP_1_D18.DSP_GND_R 26_295
|
||||
DSP_R.DSP_1_D18.DSP_VCC_R 26_291
|
||||
DSP_R.DSP_1_D19.DSP_GND_R 27_300
|
||||
DSP_R.DSP_1_D19.DSP_VCC_R 26_300
|
||||
DSP_R.DSP_1_D20.DSP_GND_R 26_305
|
||||
DSP_R.DSP_1_D20.DSP_VCC_R 27_303
|
||||
DSP_R.DSP_1_D21.DSP_GND_R 27_307
|
||||
DSP_R.DSP_1_D21.DSP_VCC_R 26_307
|
||||
DSP_R.DSP_1_D22.DSP_GND_R 27_311
|
||||
DSP_R.DSP_1_D22.DSP_VCC_R 26_310
|
||||
DSP_R.DSP_1_D23.DSP_GND_R 27_314
|
||||
DSP_R.DSP_1_D23.DSP_VCC_R 27_313
|
||||
DSP_R.DSP_1_D24.DSP_GND_R 27_318
|
||||
DSP_R.DSP_1_D24.DSP_VCC_R 27_315
|
||||
DSP_R.DSP_1_INMODE0.DSP_GND_R 27_294
|
||||
DSP_R.DSP_1_INMODE0.DSP_VCC_R 27_290
|
||||
DSP_R.DSP_1_INMODE1.DSP_GND_R 26_293
|
||||
DSP_R.DSP_1_INMODE1.DSP_VCC_R 27_305
|
||||
DSP_R.DSP_1_INMODE2.DSP_GND_R 27_240
|
||||
DSP_R.DSP_1_INMODE2.DSP_VCC_R 26_231
|
||||
DSP_R.DSP_1_INMODE3.DSP_GND_R 27_239
|
||||
DSP_R.DSP_1_INMODE3.DSP_VCC_R 26_230
|
||||
DSP_R.DSP_1_INMODE4.DSP_GND_R 26_218
|
||||
DSP_R.DSP_1_INMODE4.DSP_VCC_R 26_206
|
||||
DSP_R.DSP_1_OPMODE6.DSP_GND_R 27_172
|
||||
DSP_R.DSP_1_OPMODE6.DSP_VCC_R 27_180
|
||||
DSP_R.DSP48.DSP_0.A_INPUT[0] 27_84
|
||||
DSP_R.DSP48.DSP_0.AREG_0 26_113 26_137 27_111
|
||||
DSP_R.DSP48.DSP_0.AREG_2 27_136
|
||||
|
|
|
|||
|
|
@ -1,3 +1,159 @@
|
|||
DSP_R.DSP_0_CEAD.DSP_GND_R origin:101-dsp-pips 26_63
|
||||
DSP_R.DSP_0_CEAD.DSP_VCC_R origin:101-dsp-pips 27_62
|
||||
DSP_R.DSP_0_CEALUMODE.DSP_GND_R origin:101-dsp-pips 27_51
|
||||
DSP_R.DSP_0_CEALUMODE.DSP_VCC_R origin:101-dsp-pips 26_50
|
||||
DSP_R.DSP_0_CED.DSP_GND_R origin:101-dsp-pips 27_72
|
||||
DSP_R.DSP_0_CED.DSP_VCC_R origin:101-dsp-pips 26_72
|
||||
DSP_R.DSP_0_CEINMODE.DSP_GND_R origin:101-dsp-pips 26_69
|
||||
DSP_R.DSP_0_CEINMODE.DSP_VCC_R origin:101-dsp-pips 26_67
|
||||
DSP_R.DSP_0_RSTD.DSP_GND_R origin:101-dsp-pips 27_96
|
||||
DSP_R.DSP_0_RSTD.DSP_VCC_R origin:101-dsp-pips 27_85
|
||||
DSP_R.DSP_0_ALUMODE2.DSP_GND_R origin:101-dsp-pips 27_56
|
||||
DSP_R.DSP_0_ALUMODE2.DSP_VCC_R origin:101-dsp-pips 26_55
|
||||
DSP_R.DSP_0_ALUMODE3.DSP_GND_R origin:101-dsp-pips 27_60
|
||||
DSP_R.DSP_0_ALUMODE3.DSP_VCC_R origin:101-dsp-pips 26_53
|
||||
DSP_R.DSP_0_CARRYINSEL2.DSP_GND_R origin:101-dsp-pips 26_17
|
||||
DSP_R.DSP_0_CARRYINSEL2.DSP_VCC_R origin:101-dsp-pips 27_18
|
||||
DSP_R.DSP_0_D0.DSP_GND_R origin:101-dsp-pips 26_65
|
||||
DSP_R.DSP_0_D0.DSP_VCC_R origin:101-dsp-pips 27_64
|
||||
DSP_R.DSP_0_D1.DSP_GND_R origin:101-dsp-pips 27_68
|
||||
DSP_R.DSP_0_D1.DSP_VCC_R origin:101-dsp-pips 27_74
|
||||
DSP_R.DSP_0_D2.DSP_GND_R origin:101-dsp-pips 27_71
|
||||
DSP_R.DSP_0_D2.DSP_VCC_R origin:101-dsp-pips 27_70
|
||||
DSP_R.DSP_0_D3.DSP_GND_R origin:101-dsp-pips 26_75
|
||||
DSP_R.DSP_0_D3.DSP_VCC_R origin:101-dsp-pips 26_73
|
||||
DSP_R.DSP_0_D4.DSP_GND_R origin:101-dsp-pips 27_78
|
||||
DSP_R.DSP_0_D4.DSP_VCC_R origin:101-dsp-pips 26_77
|
||||
DSP_R.DSP_0_D5.DSP_GND_R origin:101-dsp-pips 26_82
|
||||
DSP_R.DSP_0_D5.DSP_VCC_R origin:101-dsp-pips 26_81
|
||||
DSP_R.DSP_0_D6.DSP_GND_R origin:101-dsp-pips 26_89
|
||||
DSP_R.DSP_0_D6.DSP_VCC_R origin:101-dsp-pips 27_89
|
||||
DSP_R.DSP_0_D7.DSP_GND_R origin:101-dsp-pips 27_91
|
||||
DSP_R.DSP_0_D7.DSP_VCC_R origin:101-dsp-pips 26_91
|
||||
DSP_R.DSP_0_D8.DSP_GND_R origin:101-dsp-pips 26_98
|
||||
DSP_R.DSP_0_D8.DSP_VCC_R origin:101-dsp-pips 27_97
|
||||
DSP_R.DSP_0_D9.DSP_GND_R origin:101-dsp-pips 26_101
|
||||
DSP_R.DSP_0_D9.DSP_VCC_R origin:101-dsp-pips 26_99
|
||||
DSP_R.DSP_0_D10.DSP_GND_R origin:101-dsp-pips 26_105
|
||||
DSP_R.DSP_0_D10.DSP_VCC_R origin:101-dsp-pips 26_103
|
||||
DSP_R.DSP_0_D11.DSP_GND_R origin:101-dsp-pips 27_107
|
||||
DSP_R.DSP_0_D11.DSP_VCC_R origin:101-dsp-pips 27_105
|
||||
DSP_R.DSP_0_D12.DSP_GND_R origin:101-dsp-pips 26_107
|
||||
DSP_R.DSP_0_D12.DSP_VCC_R origin:101-dsp-pips 26_111
|
||||
DSP_R.DSP_0_D13.DSP_GND_R origin:101-dsp-pips 27_113
|
||||
DSP_R.DSP_0_D13.DSP_VCC_R origin:101-dsp-pips 26_114
|
||||
DSP_R.DSP_0_D14.DSP_GND_R origin:101-dsp-pips 26_118
|
||||
DSP_R.DSP_0_D14.DSP_VCC_R origin:101-dsp-pips 27_116
|
||||
DSP_R.DSP_0_D15.DSP_GND_R origin:101-dsp-pips 27_122
|
||||
DSP_R.DSP_0_D15.DSP_VCC_R origin:101-dsp-pips 27_120
|
||||
DSP_R.DSP_0_D16.DSP_GND_R origin:101-dsp-pips 27_125
|
||||
DSP_R.DSP_0_D16.DSP_VCC_R origin:101-dsp-pips 26_125
|
||||
DSP_R.DSP_0_D17.DSP_GND_R origin:101-dsp-pips 27_128
|
||||
DSP_R.DSP_0_D17.DSP_VCC_R origin:101-dsp-pips 27_126
|
||||
DSP_R.DSP_0_D18.DSP_GND_R origin:101-dsp-pips 26_135
|
||||
DSP_R.DSP_0_D18.DSP_VCC_R origin:101-dsp-pips 26_131
|
||||
DSP_R.DSP_0_D19.DSP_GND_R origin:101-dsp-pips 27_140
|
||||
DSP_R.DSP_0_D19.DSP_VCC_R origin:101-dsp-pips 26_140
|
||||
DSP_R.DSP_0_D20.DSP_GND_R origin:101-dsp-pips 26_145
|
||||
DSP_R.DSP_0_D20.DSP_VCC_R origin:101-dsp-pips 27_143
|
||||
DSP_R.DSP_0_D21.DSP_GND_R origin:101-dsp-pips 27_147
|
||||
DSP_R.DSP_0_D21.DSP_VCC_R origin:101-dsp-pips 26_147
|
||||
DSP_R.DSP_0_D22.DSP_GND_R origin:101-dsp-pips 27_151
|
||||
DSP_R.DSP_0_D22.DSP_VCC_R origin:101-dsp-pips 26_150
|
||||
DSP_R.DSP_0_D23.DSP_GND_R origin:101-dsp-pips 27_154
|
||||
DSP_R.DSP_0_D23.DSP_VCC_R origin:101-dsp-pips 27_153
|
||||
DSP_R.DSP_0_D24.DSP_GND_R origin:101-dsp-pips 27_158
|
||||
DSP_R.DSP_0_D24.DSP_VCC_R origin:101-dsp-pips 27_155
|
||||
DSP_R.DSP_0_INMODE0.DSP_GND_R origin:101-dsp-pips 27_134
|
||||
DSP_R.DSP_0_INMODE0.DSP_VCC_R origin:101-dsp-pips 27_130
|
||||
DSP_R.DSP_0_INMODE1.DSP_GND_R origin:101-dsp-pips 26_133
|
||||
DSP_R.DSP_0_INMODE1.DSP_VCC_R origin:101-dsp-pips 27_145
|
||||
DSP_R.DSP_0_INMODE2.DSP_GND_R origin:101-dsp-pips 27_80
|
||||
DSP_R.DSP_0_INMODE2.DSP_VCC_R origin:101-dsp-pips 26_71
|
||||
DSP_R.DSP_0_INMODE3.DSP_GND_R origin:101-dsp-pips 27_79
|
||||
DSP_R.DSP_0_INMODE3.DSP_VCC_R origin:101-dsp-pips 26_70
|
||||
DSP_R.DSP_0_INMODE4.DSP_GND_R origin:101-dsp-pips 26_58
|
||||
DSP_R.DSP_0_INMODE4.DSP_VCC_R origin:101-dsp-pips 26_46
|
||||
DSP_R.DSP_0_OPMODE6.DSP_GND_R origin:101-dsp-pips 27_12
|
||||
DSP_R.DSP_0_OPMODE6.DSP_VCC_R origin:101-dsp-pips 27_20
|
||||
DSP_R.DSP_1_CEAD.DSP_GND_R origin:101-dsp-pips 26_223
|
||||
DSP_R.DSP_1_CEAD.DSP_VCC_R origin:101-dsp-pips 27_222
|
||||
DSP_R.DSP_1_CEALUMODE.DSP_GND_R origin:101-dsp-pips 27_211
|
||||
DSP_R.DSP_1_CEALUMODE.DSP_VCC_R origin:101-dsp-pips 26_210
|
||||
DSP_R.DSP_1_CED.DSP_GND_R origin:101-dsp-pips 27_232
|
||||
DSP_R.DSP_1_CED.DSP_VCC_R origin:101-dsp-pips 26_232
|
||||
DSP_R.DSP_1_CEINMODE.DSP_GND_R origin:101-dsp-pips 26_229
|
||||
DSP_R.DSP_1_CEINMODE.DSP_VCC_R origin:101-dsp-pips 26_227
|
||||
DSP_R.DSP_1_RSTD.DSP_GND_R origin:101-dsp-pips 27_256
|
||||
DSP_R.DSP_1_RSTD.DSP_VCC_R origin:101-dsp-pips 27_245
|
||||
DSP_R.DSP_1_ALUMODE2.DSP_GND_R origin:101-dsp-pips 27_216
|
||||
DSP_R.DSP_1_ALUMODE2.DSP_VCC_R origin:101-dsp-pips 26_215
|
||||
DSP_R.DSP_1_ALUMODE3.DSP_GND_R origin:101-dsp-pips 27_220
|
||||
DSP_R.DSP_1_ALUMODE3.DSP_VCC_R origin:101-dsp-pips 26_213
|
||||
DSP_R.DSP_1_CARRYINSEL2.DSP_GND_R origin:101-dsp-pips 26_177
|
||||
DSP_R.DSP_1_CARRYINSEL2.DSP_VCC_R origin:101-dsp-pips 27_178
|
||||
DSP_R.DSP_1_D0.DSP_GND_R origin:101-dsp-pips 26_225
|
||||
DSP_R.DSP_1_D0.DSP_VCC_R origin:101-dsp-pips 27_224
|
||||
DSP_R.DSP_1_D1.DSP_GND_R origin:101-dsp-pips 27_228
|
||||
DSP_R.DSP_1_D1.DSP_VCC_R origin:101-dsp-pips 27_234
|
||||
DSP_R.DSP_1_D2.DSP_GND_R origin:101-dsp-pips 27_231
|
||||
DSP_R.DSP_1_D2.DSP_VCC_R origin:101-dsp-pips 27_230
|
||||
DSP_R.DSP_1_D3.DSP_GND_R origin:101-dsp-pips 26_235
|
||||
DSP_R.DSP_1_D3.DSP_VCC_R origin:101-dsp-pips 26_233
|
||||
DSP_R.DSP_1_D4.DSP_GND_R origin:101-dsp-pips 27_238
|
||||
DSP_R.DSP_1_D4.DSP_VCC_R origin:101-dsp-pips 26_237
|
||||
DSP_R.DSP_1_D5.DSP_GND_R origin:101-dsp-pips 26_242
|
||||
DSP_R.DSP_1_D5.DSP_VCC_R origin:101-dsp-pips 26_241
|
||||
DSP_R.DSP_1_D6.DSP_GND_R origin:101-dsp-pips 26_249
|
||||
DSP_R.DSP_1_D6.DSP_VCC_R origin:101-dsp-pips 27_249
|
||||
DSP_R.DSP_1_D7.DSP_GND_R origin:101-dsp-pips 27_251
|
||||
DSP_R.DSP_1_D7.DSP_VCC_R origin:101-dsp-pips 26_251
|
||||
DSP_R.DSP_1_D8.DSP_GND_R origin:101-dsp-pips 26_258
|
||||
DSP_R.DSP_1_D8.DSP_VCC_R origin:101-dsp-pips 27_257
|
||||
DSP_R.DSP_1_D9.DSP_GND_R origin:101-dsp-pips 26_261
|
||||
DSP_R.DSP_1_D9.DSP_VCC_R origin:101-dsp-pips 26_259
|
||||
DSP_R.DSP_1_D10.DSP_GND_R origin:101-dsp-pips 26_265
|
||||
DSP_R.DSP_1_D10.DSP_VCC_R origin:101-dsp-pips 26_263
|
||||
DSP_R.DSP_1_D11.DSP_GND_R origin:101-dsp-pips 27_267
|
||||
DSP_R.DSP_1_D11.DSP_VCC_R origin:101-dsp-pips 27_265
|
||||
DSP_R.DSP_1_D12.DSP_GND_R origin:101-dsp-pips 26_267
|
||||
DSP_R.DSP_1_D12.DSP_VCC_R origin:101-dsp-pips 26_271
|
||||
DSP_R.DSP_1_D13.DSP_GND_R origin:101-dsp-pips 27_273
|
||||
DSP_R.DSP_1_D13.DSP_VCC_R origin:101-dsp-pips 26_274
|
||||
DSP_R.DSP_1_D14.DSP_GND_R origin:101-dsp-pips 26_278
|
||||
DSP_R.DSP_1_D14.DSP_VCC_R origin:101-dsp-pips 27_276
|
||||
DSP_R.DSP_1_D15.DSP_GND_R origin:101-dsp-pips 27_282
|
||||
DSP_R.DSP_1_D15.DSP_VCC_R origin:101-dsp-pips 27_280
|
||||
DSP_R.DSP_1_D16.DSP_GND_R origin:101-dsp-pips 27_285
|
||||
DSP_R.DSP_1_D16.DSP_VCC_R origin:101-dsp-pips 26_285
|
||||
DSP_R.DSP_1_D17.DSP_GND_R origin:101-dsp-pips 27_288
|
||||
DSP_R.DSP_1_D17.DSP_VCC_R origin:101-dsp-pips 27_286
|
||||
DSP_R.DSP_1_D18.DSP_GND_R origin:101-dsp-pips 26_295
|
||||
DSP_R.DSP_1_D18.DSP_VCC_R origin:101-dsp-pips 26_291
|
||||
DSP_R.DSP_1_D19.DSP_GND_R origin:101-dsp-pips 27_300
|
||||
DSP_R.DSP_1_D19.DSP_VCC_R origin:101-dsp-pips 26_300
|
||||
DSP_R.DSP_1_D20.DSP_GND_R origin:101-dsp-pips 26_305
|
||||
DSP_R.DSP_1_D20.DSP_VCC_R origin:101-dsp-pips 27_303
|
||||
DSP_R.DSP_1_D21.DSP_GND_R origin:101-dsp-pips 27_307
|
||||
DSP_R.DSP_1_D21.DSP_VCC_R origin:101-dsp-pips 26_307
|
||||
DSP_R.DSP_1_D22.DSP_GND_R origin:101-dsp-pips 27_311
|
||||
DSP_R.DSP_1_D22.DSP_VCC_R origin:101-dsp-pips 26_310
|
||||
DSP_R.DSP_1_D23.DSP_GND_R origin:101-dsp-pips 27_314
|
||||
DSP_R.DSP_1_D23.DSP_VCC_R origin:101-dsp-pips 27_313
|
||||
DSP_R.DSP_1_D24.DSP_GND_R origin:101-dsp-pips 27_318
|
||||
DSP_R.DSP_1_D24.DSP_VCC_R origin:101-dsp-pips 27_315
|
||||
DSP_R.DSP_1_INMODE0.DSP_GND_R origin:101-dsp-pips 27_294
|
||||
DSP_R.DSP_1_INMODE0.DSP_VCC_R origin:101-dsp-pips 27_290
|
||||
DSP_R.DSP_1_INMODE1.DSP_GND_R origin:101-dsp-pips 26_293
|
||||
DSP_R.DSP_1_INMODE1.DSP_VCC_R origin:101-dsp-pips 27_305
|
||||
DSP_R.DSP_1_INMODE2.DSP_GND_R origin:101-dsp-pips 27_240
|
||||
DSP_R.DSP_1_INMODE2.DSP_VCC_R origin:101-dsp-pips 26_231
|
||||
DSP_R.DSP_1_INMODE3.DSP_GND_R origin:101-dsp-pips 27_239
|
||||
DSP_R.DSP_1_INMODE3.DSP_VCC_R origin:101-dsp-pips 26_230
|
||||
DSP_R.DSP_1_INMODE4.DSP_GND_R origin:101-dsp-pips 26_218
|
||||
DSP_R.DSP_1_INMODE4.DSP_VCC_R origin:101-dsp-pips 26_206
|
||||
DSP_R.DSP_1_OPMODE6.DSP_GND_R origin:101-dsp-pips 27_172
|
||||
DSP_R.DSP_1_OPMODE6.DSP_VCC_R origin:101-dsp-pips 27_180
|
||||
DSP_R.DSP48.DSP_0.A_INPUT[0] origin:100-dsp-mskpat 27_84
|
||||
DSP_R.DSP48.DSP_0.AREG_0 origin:100-dsp-mskpat 26_113 26_137 27_111
|
||||
DSP_R.DSP48.DSP_0.AREG_2 origin:100-dsp-mskpat 27_136
|
||||
|
|
|
|||
|
|
@ -242,7 +242,10 @@ HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK0 32_16 32_19
|
|||
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK1 32_19 35_21
|
||||
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK2 31_20 32_19
|
||||
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK3 32_19 35_19
|
||||
HCLK_IOI3.LVDS_25_IN_USE 38_23 38_24 38_25 41_14 41_15 41_17 41_18 41_27 41_28 41_29
|
||||
HCLK_IOI3.ONLY_DIFF_IN_USE 38_27 39_23 40_25 40_27 40_29 40_30 41_16 41_31
|
||||
HCLK_IOI3.STEPDOWN 38_15 39_14 39_15 39_16
|
||||
HCLK_IOI3.TMDS_33_IN_USE 38_28 41_19
|
||||
HCLK_IOI3.VREF.V_600_MV 38_26 39_30
|
||||
HCLK_IOI3.VREF.V_675_MV 38_26 39_22
|
||||
HCLK_IOI3.VREF.V_750_MV 38_26 39_24
|
||||
|
|
|
|||
|
|
@ -242,7 +242,10 @@ HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK0 origin:047-hclk-ioi-pips 32_1
|
|||
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK1 origin:047-hclk-ioi-pips 32_19 35_21
|
||||
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK2 origin:047-hclk-ioi-pips 31_20 32_19
|
||||
HCLK_IOI3.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK3 origin:047-hclk-ioi-pips 32_19 35_19
|
||||
HCLK_IOI3.LVDS_25_IN_USE origin:030-iob 38_23 38_24 38_25 41_14 41_15 41_17 41_18 41_27 41_28 41_29
|
||||
HCLK_IOI3.ONLY_DIFF_IN_USE origin:030-iob 38_27 39_23 40_25 40_27 40_29 40_30 41_16 41_31
|
||||
HCLK_IOI3.STEPDOWN origin:030-iob 38_15 39_14 39_15 39_16
|
||||
HCLK_IOI3.TMDS_33_IN_USE origin:030-iob 38_28 41_19
|
||||
HCLK_IOI3.VREF.V_600_MV origin:030-iob 38_26 39_30
|
||||
HCLK_IOI3.VREF.V_675_MV origin:030-iob 38_26 39_22
|
||||
HCLK_IOI3.VREF.V_750_MV origin:030-iob 38_26 39_24
|
||||
|
|
|
|||
|
|
@ -393,7 +393,7 @@ INT_L.FAN_ALT3.WW2END3 origin:050-pip-seed !22_56 !23_56 !24_56 19_57 25_56
|
|||
INT_L.FAN_ALT4.BYP_BOUNCE_N3_3 origin:059-pip-byp-bounce !22_08 !23_08 !24_08 20_08 25_08
|
||||
INT_L.FAN_ALT4.BYP_BOUNCE_N3_7 origin:059-pip-byp-bounce !22_08 !23_08 !25_08 20_08 24_08
|
||||
INT_L.FAN_ALT4.FAN_BOUNCE2 origin:050-pip-seed !23_08 20_08 22_08 24_08 25_08
|
||||
INT_L.FAN_ALT4.FAN_BOUNCE7 origin:056-pip-rem !22_08 20_08 23_08 24_08 25_08
|
||||
INT_L.FAN_ALT4.FAN_BOUNCE7 origin:050-pip-seed !22_08 20_08 23_08 24_08 25_08
|
||||
INT_L.FAN_ALT4.LOGIC_OUTS_L4 origin:050-pip-seed !23_08 21_08 22_08 24_08 25_08
|
||||
INT_L.FAN_ALT4.LOGIC_OUTS_L8 origin:050-pip-seed !22_08 21_08 23_08 24_08 25_08
|
||||
INT_L.FAN_ALT4.LOGIC_OUTS_L18 origin:050-pip-seed !22_08 !23_08 !25_08 21_08 24_08
|
||||
|
|
@ -2273,7 +2273,7 @@ INT_L.NE6BEG3.NW6END3 origin:050-pip-seed 04_53 06_52
|
|||
INT_L.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55
|
||||
INT_L.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52
|
||||
INT_L.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53
|
||||
INT_L.NE6BEG3.WW4END3 origin:056-pip-rem 04_53 05_52
|
||||
INT_L.NE6BEG3.WW4END3 origin:050-pip-seed 04_53 05_52
|
||||
INT_L.NL1BEG0.LOGIC_OUTS_L1 origin:050-pip-seed 07_16 14_17
|
||||
INT_L.NL1BEG0.LOGIC_OUTS_L5 origin:050-pip-seed 11_17 14_17
|
||||
INT_L.NL1BEG0.LOGIC_OUTS_L9 origin:050-pip-seed 10_17 13_17
|
||||
|
|
@ -2491,7 +2491,7 @@ INT_L.NN6BEG3.NN6END3 origin:050-pip-seed 02_54 07_55
|
|||
INT_L.NN6BEG3.NW2END3 origin:050-pip-seed 03_54 04_52
|
||||
INT_L.NN6BEG3.NW6END3 origin:050-pip-seed 04_52 07_55
|
||||
INT_L.NN6BEG3.SE2END3 origin:050-pip-seed 03_54 05_54
|
||||
INT_L.NN6BEG3.SE6END3 origin:056-pip-rem 05_54 07_55
|
||||
INT_L.NN6BEG3.SE6END3 origin:050-pip-seed 05_54 07_55
|
||||
INT_L.NN6BEG3.WW2END2 origin:050-pip-seed 02_55 04_52
|
||||
INT_L.NN6BEG3.WW4END3 origin:050-pip-seed 04_52 04_55
|
||||
INT_L.NR1BEG0.LOGIC_OUTS_L0 origin:050-pip-seed 11_07 14_07
|
||||
|
|
@ -3345,7 +3345,7 @@ INT_L.SW6BEG3.NW2END_S0_0 origin:050-pip-seed 02_61 05_63
|
|||
INT_L.SW6BEG3.NW6END_S0_0 origin:050-pip-seed 05_63 06_60
|
||||
INT_L.SW6BEG3.WW4END_S0_0 origin:050-pip-seed 05_60 05_63
|
||||
INT_L.SW6BEG3.EE2END3 origin:050-pip-seed 03_60 04_61
|
||||
INT_L.SW6BEG3.EE4END3 origin:056-pip-rem 04_61 05_60
|
||||
INT_L.SW6BEG3.EE4END3 origin:050-pip-seed 04_61 05_60
|
||||
INT_L.SW6BEG3.LH0 origin:056-pip-rem 04_62 05_60
|
||||
INT_L.SW6BEG3.SE2END3 origin:050-pip-seed 02_61 04_61
|
||||
INT_L.SW6BEG3.SE6END3 origin:050-pip-seed 04_61 06_60
|
||||
|
|
@ -3603,7 +3603,7 @@ INT_L.WW4BEG2.LOGIC_OUTS_L20 origin:050-pip-seed 04_34 06_32
|
|||
INT_L.WW4BEG2.LVB_L0 origin:056-pip-rem 04_34 05_32
|
||||
INT_L.WW4BEG2.LVB_L12 origin:056-pip-rem 05_32 07_33
|
||||
INT_L.WW4BEG2.NE2END2 origin:050-pip-seed 02_33 05_35
|
||||
INT_L.WW4BEG2.NE6END2 origin:056-pip-rem 05_32 05_35
|
||||
INT_L.WW4BEG2.NE6END2 origin:050-pip-seed 05_32 05_35
|
||||
INT_L.WW4BEG2.NN2END2 origin:050-pip-seed 03_32 05_35
|
||||
INT_L.WW4BEG2.NN6END2 origin:050-pip-seed 05_35 06_32
|
||||
INT_L.WW4BEG2.NW2END2 origin:050-pip-seed 02_33 03_33
|
||||
|
|
|
|||
|
|
@ -329,7 +329,7 @@ INT_R.FAN_ALT3.WW2END3 origin:050-pip-seed !22_56 !23_56 !24_56 19_57 25_56
|
|||
INT_R.FAN_ALT4.BYP_BOUNCE_N3_3 origin:059-pip-byp-bounce !22_08 !23_08 !24_08 20_08 25_08
|
||||
INT_R.FAN_ALT4.BYP_BOUNCE_N3_7 origin:059-pip-byp-bounce !22_08 !23_08 !25_08 20_08 24_08
|
||||
INT_R.FAN_ALT4.FAN_BOUNCE2 origin:050-pip-seed !23_08 20_08 22_08 24_08 25_08
|
||||
INT_R.FAN_ALT4.FAN_BOUNCE7 origin:056-pip-rem !22_08 20_08 23_08 24_08 25_08
|
||||
INT_R.FAN_ALT4.FAN_BOUNCE7 origin:050-pip-seed !22_08 20_08 23_08 24_08 25_08
|
||||
INT_R.FAN_ALT4.LOGIC_OUTS4 origin:050-pip-seed !23_08 21_08 22_08 24_08 25_08
|
||||
INT_R.FAN_ALT4.LOGIC_OUTS8 origin:050-pip-seed !22_08 21_08 23_08 24_08 25_08
|
||||
INT_R.FAN_ALT4.LOGIC_OUTS18 origin:050-pip-seed !22_08 !23_08 !25_08 21_08 24_08
|
||||
|
|
@ -685,7 +685,7 @@ INT_R.EE4BEG1.SE6END1 origin:050-pip-seed 03_25 06_24
|
|||
INT_R.EE4BEG1.SS2END1 origin:050-pip-seed 03_24 05_27
|
||||
INT_R.EE4BEG1.SS6END1 origin:050-pip-seed 05_27 06_24
|
||||
INT_R.EE4BEG1.SW2END1 origin:050-pip-seed 02_25 05_27
|
||||
INT_R.EE4BEG1.SW6END1 origin:056-pip-rem 05_24 05_27
|
||||
INT_R.EE4BEG1.SW6END1 origin:050-pip-seed 05_24 05_27
|
||||
INT_R.EE4BEG2.LOGIC_OUTS2 origin:050-pip-seed 02_41 04_42
|
||||
INT_R.EE4BEG2.LOGIC_OUTS6 origin:050-pip-seed 02_41 07_41
|
||||
INT_R.EE4BEG2.LOGIC_OUTS10 origin:050-pip-seed 03_40 07_41
|
||||
|
|
@ -725,7 +725,7 @@ INT_R.EE4BEG3.SE6END3 origin:050-pip-seed 03_57 06_56
|
|||
INT_R.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59
|
||||
INT_R.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56
|
||||
INT_R.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59
|
||||
INT_R.EE4BEG3.SW6END3 origin:056-pip-rem 05_56 05_59
|
||||
INT_R.EE4BEG3.SW6END3 origin:050-pip-seed 05_56 05_59
|
||||
INT_R.EL1BEG0.LOGIC_OUTS1 origin:050-pip-seed 07_20 14_21
|
||||
INT_R.EL1BEG0.LOGIC_OUTS5 origin:050-pip-seed 11_21 14_21
|
||||
INT_R.EL1BEG0.LOGIC_OUTS9 origin:050-pip-seed 10_21 13_21
|
||||
|
|
@ -2471,7 +2471,7 @@ INT_R.NN6BEG2.NN6END2 origin:050-pip-seed 02_38 07_39
|
|||
INT_R.NN6BEG2.NW2END2 origin:050-pip-seed 03_38 04_36
|
||||
INT_R.NN6BEG2.NW6END2 origin:050-pip-seed 04_36 07_39
|
||||
INT_R.NN6BEG2.SE2END2 origin:050-pip-seed 03_38 05_38
|
||||
INT_R.NN6BEG2.SE6END2 origin:056-pip-rem 05_38 07_39
|
||||
INT_R.NN6BEG2.SE6END2 origin:050-pip-seed 05_38 07_39
|
||||
INT_R.NN6BEG2.WW2END1 origin:050-pip-seed 02_39 04_36
|
||||
INT_R.NN6BEG2.WW4END2 origin:050-pip-seed 04_36 04_39
|
||||
INT_R.NN6BEG3.LOGIC_OUTS3 origin:050-pip-seed 03_54 06_54
|
||||
|
|
@ -3568,7 +3568,7 @@ INT_R.WW4BEG0.WW2END_N0_3 origin:050-pip-seed 03_00 03_01
|
|||
INT_R.WW4BEG0.LH12 origin:056-pip-rem 05_00 07_01
|
||||
INT_R.WW4BEG0.LV0 origin:056-pip-rem 04_02 05_00
|
||||
INT_R.WW4BEG0.NE2END0 origin:050-pip-seed 02_01 05_03
|
||||
INT_R.WW4BEG0.NE6END0 origin:056-pip-rem 05_00 05_03
|
||||
INT_R.WW4BEG0.NE6END0 origin:050-pip-seed 05_00 05_03
|
||||
INT_R.WW4BEG0.NN2END0 origin:050-pip-seed 03_00 05_03
|
||||
INT_R.WW4BEG0.NN6END0 origin:050-pip-seed 05_03 06_00
|
||||
INT_R.WW4BEG0.NW2END0 origin:050-pip-seed 02_01 03_01
|
||||
|
|
@ -3603,7 +3603,7 @@ INT_R.WW4BEG2.LOGIC_OUTS20 origin:050-pip-seed 04_34 06_32
|
|||
INT_R.WW4BEG2.LVB0 origin:056-pip-rem 04_34 05_32
|
||||
INT_R.WW4BEG2.LVB12 origin:056-pip-rem 05_32 07_33
|
||||
INT_R.WW4BEG2.NE2END2 origin:050-pip-seed 02_33 05_35
|
||||
INT_R.WW4BEG2.NE6END2 origin:056-pip-rem 05_32 05_35
|
||||
INT_R.WW4BEG2.NE6END2 origin:050-pip-seed 05_32 05_35
|
||||
INT_R.WW4BEG2.NN2END2 origin:050-pip-seed 03_32 05_35
|
||||
INT_R.WW4BEG2.NN6END2 origin:050-pip-seed 05_35 06_32
|
||||
INT_R.WW4BEG2.NW2END2 origin:050-pip-seed 02_33 03_33
|
||||
|
|
@ -3623,7 +3623,7 @@ INT_R.WW4BEG3.LOGIC_OUTS21 origin:050-pip-seed 06_48 07_49
|
|||
INT_R.WW4BEG3.LH0 origin:056-pip-rem 04_50 05_48
|
||||
INT_R.WW4BEG3.LV18 origin:056-pip-rem 05_48 07_49
|
||||
INT_R.WW4BEG3.NE2END3 origin:050-pip-seed 02_49 05_51
|
||||
INT_R.WW4BEG3.NE6END3 origin:056-pip-rem 05_48 05_51
|
||||
INT_R.WW4BEG3.NE6END3 origin:050-pip-seed 05_48 05_51
|
||||
INT_R.WW4BEG3.NN2END3 origin:050-pip-seed 03_48 05_51
|
||||
INT_R.WW4BEG3.NN6END3 origin:050-pip-seed 05_51 06_48
|
||||
INT_R.WW4BEG3.NW2END3 origin:050-pip-seed 02_49 03_49
|
||||
|
|
|
|||
|
|
@ -1,14 +1,21 @@
|
|||
LIOB33.DIFF.ZIBUF_LOW_PWR 38_44 39_83
|
||||
LIOB33.IOB_Y0.IBUFDISABLE.I 38_82
|
||||
LIOB33.IOB_Y0.IN_TERM.NONE !38_120 !38_122 !39_121 !39_123
|
||||
LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 38_120 38_122 39_121 39_123
|
||||
LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 38_120 38_122 !39_121 39_123
|
||||
LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 38_120 !38_122 !39_121 39_123
|
||||
LIOB33.IOB_Y0.INTERMDISABLE.I 39_89
|
||||
LIOB33.IOB_Y0.LVDS_25.DRIVE.I_FIXED 38_64 38_74 38_76 38_98 38_100 38_102 38_118 39_65 39_75 39_97 !39_101 39_113 39_119 39_125
|
||||
LIOB33.IOB_Y0.LVDS_25.IN 38_86 39_87
|
||||
LIOB33.IOB_Y0.LVDS_25.OUT 38_64 38_74 38_76 38_98 38_102 39_65 39_75 !39_101
|
||||
LIOB33.IOB_Y0.LVTTL.DRIVE.I24 38_64 !38_112 !38_118 38_126 39_65 39_117 39_119 !39_125 !39_127
|
||||
LIOB33.IOB_Y0.PULLTYPE.KEEPER 38_92 38_94 !39_93
|
||||
LIOB33.IOB_Y0.PULLTYPE.NONE !38_92 38_94 !39_93
|
||||
LIOB33.IOB_Y0.PULLTYPE.PULLDOWN !38_92 !38_94 !39_93
|
||||
LIOB33.IOB_Y0.PULLTYPE.PULLUP !38_92 38_94 39_93
|
||||
LIOB33.IOB_Y0.TMDS_33.DRIVE.I_FIXED 38_64 !38_74 !38_76 !38_98 !38_100 !38_102 38_118 39_65 !39_75 !39_97 39_101 39_113 39_119 39_125
|
||||
LIOB33.IOB_Y0.TMDS_33.IN 38_86 !39_87
|
||||
LIOB33.IOB_Y0.TMDS_33.OUT 38_64 !38_74 !38_76 !38_98 !38_102 39_65 !39_75 39_101
|
||||
LIOB33.IOB_Y0.ZIBUF_LOW_PWR 38_84
|
||||
LIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 38_64 38_112 38_118 38_126 39_65 39_113 !39_117 !39_119 39_125 !39_127
|
||||
LIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 !39_119 !39_125 39_127
|
||||
|
|
@ -52,7 +59,7 @@ LIOB33.IOB_Y1.LVCMOS12.DRIVE.I4 !38_00 38_02 !38_08 !38_10 38_14 38_62 39_01 39_
|
|||
LIOB33.IOB_Y1.LVCMOS12.DRIVE.I12 38_00 !38_02 !38_08 !38_10 38_14 38_62 39_01 !39_09 39_15 39_63
|
||||
LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18.IN !38_40 38_42 39_41
|
||||
LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST !38_16 !38_18 !38_20 !38_22 !39_17 !39_21
|
||||
LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY !38_00 38_02 38_08 !38_10 38_14 !38_62 !39_01 39_09 !39_15 !39_63
|
||||
LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY !38_00 38_02 38_08 !38_10 38_14 !38_62 !39_01 39_09 !39_15 !39_33 !39_63
|
||||
LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW !38_16 38_18 !38_20 38_22 39_17 39_21
|
||||
LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15.STEPDOWN 38_32
|
||||
LIOB33.IOB_Y1.LVCMOS12_LVCMOS25.DRIVE.I8 !38_00 !38_02 38_08 !38_10 38_14 38_62 !39_01 !39_09 39_15 39_63
|
||||
|
|
@ -70,6 +77,7 @@ LIOB33.IOB_Y1.LVCMOS33.DRIVE.I16 38_00 !38_02 !38_08 38_10 38_62 !39_01 39_09 !3
|
|||
LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I4 38_00 38_02 !38_08 !38_10 38_62 !39_01 39_09 !39_15 39_63
|
||||
LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I8 !38_00 38_02 38_08 !38_10 38_62 39_01 !39_09 !39_15 39_63
|
||||
LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16 38_00 38_02 !38_08 !38_10 38_62 39_01 !39_09 !39_15 39_63
|
||||
LIOB33.IOB_Y1.SSTL15.IN_ONLY !38_00 38_02 38_08 !38_10 38_14 !38_62 !39_01 39_09 !39_15 39_33 !39_63
|
||||
LIOB33.IOB_Y1.SSTL135.DRIVE.I_FIXED 38_00 !38_02 38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
|
||||
LIOB33.IOB_Y1.SSTL135_SSTL15.IN 38_40 !38_42 !39_41
|
||||
LIOB33.IOB_Y1.SSTL135_SSTL15.IN_DIFF 38_40 !38_42 39_41
|
||||
|
|
|
|||
|
|
@ -1,14 +1,21 @@
|
|||
LIOB33.DIFF.ZIBUF_LOW_PWR origin:030-iob 38_44 39_83
|
||||
LIOB33.IOB_Y0.IBUFDISABLE.I origin:030-iob 38_82
|
||||
LIOB33.IOB_Y0.IN_TERM.NONE origin:030-iob !38_120 !38_122 !39_121 !39_123
|
||||
LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_120 38_122 39_121 39_123
|
||||
LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob !39_121 38_120 38_122 39_123
|
||||
LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob !38_122 !39_121 38_120 39_123
|
||||
LIOB33.IOB_Y0.INTERMDISABLE.I origin:030-iob 39_89
|
||||
LIOB33.IOB_Y0.LVDS_25.DRIVE.I_FIXED origin:030-iob !39_101 38_100 38_102 38_118 38_64 38_74 38_76 38_98 39_113 39_119 39_125 39_65 39_75 39_97
|
||||
LIOB33.IOB_Y0.LVDS_25.IN origin:030-iob 38_86 39_87
|
||||
LIOB33.IOB_Y0.LVDS_25.OUT origin:030-iob !39_101 38_102 38_64 38_74 38_76 38_98 39_65 39_75
|
||||
LIOB33.IOB_Y0.LVTTL.DRIVE.I24 origin:030-iob !38_112 !38_118 !39_125 !39_127 38_126 38_64 39_117 39_119 39_65
|
||||
LIOB33.IOB_Y0.PULLTYPE.KEEPER origin:030-iob !39_93 38_92 38_94
|
||||
LIOB33.IOB_Y0.PULLTYPE.NONE origin:030-iob !38_92 !39_93 38_94
|
||||
LIOB33.IOB_Y0.PULLTYPE.PULLDOWN origin:030-iob !38_92 !38_94 !39_93
|
||||
LIOB33.IOB_Y0.PULLTYPE.PULLUP origin:030-iob !38_92 38_94 39_93
|
||||
LIOB33.IOB_Y0.TMDS_33.DRIVE.I_FIXED origin:030-iob !38_100 !38_102 !38_74 !38_76 !38_98 !39_75 !39_97 38_118 38_64 39_101 39_113 39_119 39_125 39_65
|
||||
LIOB33.IOB_Y0.TMDS_33.IN origin:030-iob !39_87 38_86
|
||||
LIOB33.IOB_Y0.TMDS_33.OUT origin:030-iob !38_102 !38_74 !38_76 !38_98 !39_75 38_64 39_101 39_65
|
||||
LIOB33.IOB_Y0.ZIBUF_LOW_PWR origin:030-iob 38_84
|
||||
LIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 origin:030-iob !39_117 !39_119 !39_127 38_112 38_118 38_126 38_64 39_113 39_125 39_65
|
||||
LIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 origin:030-iob !38_118 !39_117 !39_119 !39_125 38_112 38_126 38_64 39_113 39_127 39_65
|
||||
|
|
@ -52,7 +59,7 @@ LIOB33.IOB_Y1.LVCMOS12.DRIVE.I4 origin:030-iob !38_00 !38_08 !38_10 38_02 38_14
|
|||
LIOB33.IOB_Y1.LVCMOS12.DRIVE.I12 origin:030-iob !38_02 !38_08 !38_10 !39_09 38_00 38_14 38_62 39_01 39_15 39_63
|
||||
LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18.IN origin:030-iob !38_40 38_42 39_41
|
||||
LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST origin:030-iob !38_16 !38_18 !38_20 !38_22 !39_17 !39_21
|
||||
LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY origin:030-iob !38_00 !38_10 !38_62 !39_01 !39_15 !39_63 38_02 38_08 38_14 39_09
|
||||
LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY origin:030-iob !38_00 !38_10 !38_62 !39_01 !39_15 !39_33 !39_63 38_02 38_08 38_14 39_09
|
||||
LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW origin:030-iob !38_16 !38_20 38_18 38_22 39_17 39_21
|
||||
LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15.STEPDOWN origin:030-iob 38_32
|
||||
LIOB33.IOB_Y1.LVCMOS12_LVCMOS25.DRIVE.I8 origin:030-iob !38_00 !38_02 !38_10 !39_01 !39_09 38_08 38_14 38_62 39_15 39_63
|
||||
|
|
@ -70,6 +77,7 @@ LIOB33.IOB_Y1.LVCMOS33.DRIVE.I16 origin:030-iob !38_02 !38_08 !39_01 !39_15 38_0
|
|||
LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I4 origin:030-iob !38_08 !38_10 !39_01 !39_15 38_00 38_02 38_62 39_09 39_63
|
||||
LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I8 origin:030-iob !38_00 !38_10 !39_09 !39_15 38_02 38_08 38_62 39_01 39_63
|
||||
LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16 origin:030-iob !38_08 !38_10 !39_09 !39_15 38_00 38_02 38_62 39_01 39_63
|
||||
LIOB33.IOB_Y1.SSTL15.IN_ONLY origin:030-iob !38_00 !38_10 !38_62 !39_01 !39_15 !39_63 38_02 38_08 38_14 39_09 39_33
|
||||
LIOB33.IOB_Y1.SSTL135.DRIVE.I_FIXED origin:030-iob !38_02 38_00 38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
|
||||
LIOB33.IOB_Y1.SSTL135_SSTL15.IN origin:030-iob !38_42 !39_41 38_40
|
||||
LIOB33.IOB_Y1.SSTL135_SSTL15.IN_DIFF origin:030-iob !38_42 38_40 39_41
|
||||
|
|
|
|||
|
|
@ -1,14 +1,21 @@
|
|||
RIOB33.DIFF.ZIBUF_LOW_PWR 38_44 39_83
|
||||
RIOB33.IOB_Y0.IBUFDISABLE.I 38_82
|
||||
RIOB33.IOB_Y0.IN_TERM.NONE !38_120 !38_122 !39_121 !39_123
|
||||
RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 38_120 38_122 39_121 39_123
|
||||
RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 38_120 38_122 !39_121 39_123
|
||||
RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 38_120 !38_122 !39_121 39_123
|
||||
RIOB33.IOB_Y0.INTERMDISABLE.I 39_89
|
||||
RIOB33.IOB_Y0.LVDS_25.DRIVE.I_FIXED 38_64 38_74 38_76 38_98 38_100 38_102 38_118 39_65 39_75 39_97 !39_101 39_113 39_119 39_125
|
||||
RIOB33.IOB_Y0.LVDS_25.IN 38_86 39_87
|
||||
RIOB33.IOB_Y0.LVDS_25.OUT 38_64 38_74 38_76 38_98 38_102 39_65 39_75 !39_101
|
||||
RIOB33.IOB_Y0.LVTTL.DRIVE.I24 38_64 !38_112 !38_118 38_126 39_65 39_117 39_119 !39_125 !39_127
|
||||
RIOB33.IOB_Y0.PULLTYPE.KEEPER 38_92 38_94 !39_93
|
||||
RIOB33.IOB_Y0.PULLTYPE.NONE !38_92 38_94 !39_93
|
||||
RIOB33.IOB_Y0.PULLTYPE.PULLDOWN !38_92 !38_94 !39_93
|
||||
RIOB33.IOB_Y0.PULLTYPE.PULLUP !38_92 38_94 39_93
|
||||
RIOB33.IOB_Y0.TMDS_33.DRIVE.I_FIXED 38_64 !38_74 !38_76 !38_98 !38_100 !38_102 38_118 39_65 !39_75 !39_97 39_101 39_113 39_119 39_125
|
||||
RIOB33.IOB_Y0.TMDS_33.IN 38_86 !39_87
|
||||
RIOB33.IOB_Y0.TMDS_33.OUT 38_64 !38_74 !38_76 !38_98 !38_102 39_65 !39_75 39_101
|
||||
RIOB33.IOB_Y0.ZIBUF_LOW_PWR 38_84
|
||||
RIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 38_64 38_112 38_118 38_126 39_65 39_113 !39_117 !39_119 39_125 !39_127
|
||||
RIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 !39_119 !39_125 39_127
|
||||
|
|
@ -52,7 +59,7 @@ RIOB33.IOB_Y1.LVCMOS12.DRIVE.I4 !38_00 38_02 !38_08 !38_10 38_14 38_62 39_01 39_
|
|||
RIOB33.IOB_Y1.LVCMOS12.DRIVE.I12 38_00 !38_02 !38_08 !38_10 38_14 38_62 39_01 !39_09 39_15 39_63
|
||||
RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18.IN !38_40 38_42 39_41
|
||||
RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST !38_16 !38_18 !38_20 !38_22 !39_17 !39_21
|
||||
RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY !38_00 38_02 38_08 !38_10 38_14 !38_62 !39_01 39_09 !39_15 !39_63
|
||||
RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY !38_00 38_02 38_08 !38_10 38_14 !38_62 !39_01 39_09 !39_15 !39_33 !39_63
|
||||
RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW !38_16 38_18 !38_20 38_22 39_17 39_21
|
||||
RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15.STEPDOWN 38_32
|
||||
RIOB33.IOB_Y1.LVCMOS12_LVCMOS25.DRIVE.I8 !38_00 !38_02 38_08 !38_10 38_14 38_62 !39_01 !39_09 39_15 39_63
|
||||
|
|
@ -70,6 +77,7 @@ RIOB33.IOB_Y1.LVCMOS33.DRIVE.I16 38_00 !38_02 !38_08 38_10 38_62 !39_01 39_09 !3
|
|||
RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I4 38_00 38_02 !38_08 !38_10 38_62 !39_01 39_09 !39_15 39_63
|
||||
RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I8 !38_00 38_02 38_08 !38_10 38_62 39_01 !39_09 !39_15 39_63
|
||||
RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16 38_00 38_02 !38_08 !38_10 38_62 39_01 !39_09 !39_15 39_63
|
||||
RIOB33.IOB_Y1.SSTL15.IN_ONLY !38_00 38_02 38_08 !38_10 38_14 !38_62 !39_01 39_09 !39_15 39_33 !39_63
|
||||
RIOB33.IOB_Y1.SSTL135.DRIVE.I_FIXED 38_00 !38_02 38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
|
||||
RIOB33.IOB_Y1.SSTL135_SSTL15.IN 38_40 !38_42 !39_41
|
||||
RIOB33.IOB_Y1.SSTL135_SSTL15.IN_DIFF 38_40 !38_42 39_41
|
||||
|
|
|
|||
|
|
@ -1,14 +1,21 @@
|
|||
RIOB33.DIFF.ZIBUF_LOW_PWR origin:030-iob 38_44 39_83
|
||||
RIOB33.IOB_Y0.IBUFDISABLE.I origin:030-iob 38_82
|
||||
RIOB33.IOB_Y0.IN_TERM.NONE origin:030-iob !38_120 !38_122 !39_121 !39_123
|
||||
RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_120 38_122 39_121 39_123
|
||||
RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob !39_121 38_120 38_122 39_123
|
||||
RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob !38_122 !39_121 38_120 39_123
|
||||
RIOB33.IOB_Y0.INTERMDISABLE.I origin:030-iob 39_89
|
||||
RIOB33.IOB_Y0.LVDS_25.DRIVE.I_FIXED origin:030-iob !39_101 38_100 38_102 38_118 38_64 38_74 38_76 38_98 39_113 39_119 39_125 39_65 39_75 39_97
|
||||
RIOB33.IOB_Y0.LVDS_25.IN origin:030-iob 38_86 39_87
|
||||
RIOB33.IOB_Y0.LVDS_25.OUT origin:030-iob !39_101 38_102 38_64 38_74 38_76 38_98 39_65 39_75
|
||||
RIOB33.IOB_Y0.LVTTL.DRIVE.I24 origin:030-iob !38_112 !38_118 !39_125 !39_127 38_126 38_64 39_117 39_119 39_65
|
||||
RIOB33.IOB_Y0.PULLTYPE.KEEPER origin:030-iob !39_93 38_92 38_94
|
||||
RIOB33.IOB_Y0.PULLTYPE.NONE origin:030-iob !38_92 !39_93 38_94
|
||||
RIOB33.IOB_Y0.PULLTYPE.PULLDOWN origin:030-iob !38_92 !38_94 !39_93
|
||||
RIOB33.IOB_Y0.PULLTYPE.PULLUP origin:030-iob !38_92 38_94 39_93
|
||||
RIOB33.IOB_Y0.TMDS_33.DRIVE.I_FIXED origin:030-iob !38_100 !38_102 !38_74 !38_76 !38_98 !39_75 !39_97 38_118 38_64 39_101 39_113 39_119 39_125 39_65
|
||||
RIOB33.IOB_Y0.TMDS_33.IN origin:030-iob !39_87 38_86
|
||||
RIOB33.IOB_Y0.TMDS_33.OUT origin:030-iob !38_102 !38_74 !38_76 !38_98 !39_75 38_64 39_101 39_65
|
||||
RIOB33.IOB_Y0.ZIBUF_LOW_PWR origin:030-iob 38_84
|
||||
RIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 origin:030-iob !39_117 !39_119 !39_127 38_112 38_118 38_126 38_64 39_113 39_125 39_65
|
||||
RIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 origin:030-iob !38_118 !39_117 !39_119 !39_125 38_112 38_126 38_64 39_113 39_127 39_65
|
||||
|
|
@ -52,7 +59,7 @@ RIOB33.IOB_Y1.LVCMOS12.DRIVE.I4 origin:030-iob !38_00 !38_08 !38_10 38_02 38_14
|
|||
RIOB33.IOB_Y1.LVCMOS12.DRIVE.I12 origin:030-iob !38_02 !38_08 !38_10 !39_09 38_00 38_14 38_62 39_01 39_15 39_63
|
||||
RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18.IN origin:030-iob !38_40 38_42 39_41
|
||||
RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST origin:030-iob !38_16 !38_18 !38_20 !38_22 !39_17 !39_21
|
||||
RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY origin:030-iob !38_00 !38_10 !38_62 !39_01 !39_15 !39_63 38_02 38_08 38_14 39_09
|
||||
RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY origin:030-iob !38_00 !38_10 !38_62 !39_01 !39_15 !39_33 !39_63 38_02 38_08 38_14 39_09
|
||||
RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW origin:030-iob !38_16 !38_20 38_18 38_22 39_17 39_21
|
||||
RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15.STEPDOWN origin:030-iob 38_32
|
||||
RIOB33.IOB_Y1.LVCMOS12_LVCMOS25.DRIVE.I8 origin:030-iob !38_00 !38_02 !38_10 !39_01 !39_09 38_08 38_14 38_62 39_15 39_63
|
||||
|
|
@ -70,6 +77,7 @@ RIOB33.IOB_Y1.LVCMOS33.DRIVE.I16 origin:030-iob !38_02 !38_08 !39_01 !39_15 38_0
|
|||
RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I4 origin:030-iob !38_08 !38_10 !39_01 !39_15 38_00 38_02 38_62 39_09 39_63
|
||||
RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I8 origin:030-iob !38_00 !38_10 !39_09 !39_15 38_02 38_08 38_62 39_01 39_63
|
||||
RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16 origin:030-iob !38_08 !38_10 !39_09 !39_15 38_00 38_02 38_62 39_01 39_63
|
||||
RIOB33.IOB_Y1.SSTL15.IN_ONLY origin:030-iob !38_00 !38_10 !38_62 !39_01 !39_15 !39_63 38_02 38_08 38_14 39_09 39_33
|
||||
RIOB33.IOB_Y1.SSTL135.DRIVE.I_FIXED origin:030-iob !38_02 38_00 38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
|
||||
RIOB33.IOB_Y1.SSTL135_SSTL15.IN origin:030-iob !38_42 !39_41 38_40
|
||||
RIOB33.IOB_Y1.SSTL135_SSTL15.IN_DIFF origin:030-iob !38_42 38_40 39_41
|
||||
|
|
|
|||
Loading…
Reference in New Issue