Updating info based on "Merge pull request #19 from mcmasterg/minitest_muxf8".
Ran overnight.... See [Info File](Info.md) for details. Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
This commit is contained in:
Tim 'mithro' Ansell
parent
beaf2425fb
commit
7800b80e7b
36
Info.md
36
Info.md
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@ -39,7 +39,7 @@ These files are released under the very permissive
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# Details
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Last updated on Sat Dec 23 08:37:59 UTC 2017 (2017-12-23T08:37:59+00:00).
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Last updated on Sat Dec 23 08:39:11 UTC 2017 (2017-12-23T08:39:11+00:00).
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Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [v0.0-374-g4bb24aa](https://github.com/SymbiFlow/prjxray/commit/4bb24aa09e3fab467066a8bf53c4f3af4773b489).
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@ -142,17 +142,37 @@ source $(dirname ${BASH_SOURCE[0]})/../../utils/environment.sh
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Results have checksums;
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* [`249454dbc8f00dc8f87d5c4a7adbc4c07b5fa283f1b1f184371f8970d5a1dac1 ./kintex7/mask_clbll_l.db`](./kintex7/mask_clbll_l.db)
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* [`4b2dd9141ec0999a9a63af28bcde59e4890aff04358116087de1783eaad1268d ./kintex7/mask_clbll_r.db`](./kintex7/mask_clbll_r.db)
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* [`77520b1532eabdcde99b538829d073207a24ea62d6c857eff2d2305a938c8b0a ./kintex7/mask_clblm_l.db`](./kintex7/mask_clblm_l.db)
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* [`f1a9808f40a675bfb11d9f7d44e2426c473d664731126a1a8234c911607bbd0d ./kintex7/mask_clblm_r.db`](./kintex7/mask_clblm_r.db)
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* [`6f6dd0ba33fdd78d87f8591adbff5aad2d3653a1b1fa03d77079ce64a7c1f175 ./kintex7/mask_bram0_l.db`](./kintex7/mask_bram0_l.db)
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* [`9d12bc3be758587479874bff531ad702f429a963518d7bc5b2b3c0400ded4c6a ./kintex7/mask_bram0_r.db`](./kintex7/mask_bram0_r.db)
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* [`6f6dd0ba33fdd78d87f8591adbff5aad2d3653a1b1fa03d77079ce64a7c1f175 ./kintex7/mask_bram1_l.db`](./kintex7/mask_bram1_l.db)
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* [`9d12bc3be758587479874bff531ad702f429a963518d7bc5b2b3c0400ded4c6a ./kintex7/mask_bram1_r.db`](./kintex7/mask_bram1_r.db)
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* [`6f6dd0ba33fdd78d87f8591adbff5aad2d3653a1b1fa03d77079ce64a7c1f175 ./kintex7/mask_bram2_l.db`](./kintex7/mask_bram2_l.db)
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* [`9d12bc3be758587479874bff531ad702f429a963518d7bc5b2b3c0400ded4c6a ./kintex7/mask_bram2_r.db`](./kintex7/mask_bram2_r.db)
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* [`6f6dd0ba33fdd78d87f8591adbff5aad2d3653a1b1fa03d77079ce64a7c1f175 ./kintex7/mask_bram3_l.db`](./kintex7/mask_bram3_l.db)
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* [`9d12bc3be758587479874bff531ad702f429a963518d7bc5b2b3c0400ded4c6a ./kintex7/mask_bram3_r.db`](./kintex7/mask_bram3_r.db)
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* [`6f6dd0ba33fdd78d87f8591adbff5aad2d3653a1b1fa03d77079ce64a7c1f175 ./kintex7/mask_bram4_l.db`](./kintex7/mask_bram4_l.db)
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* [`9d12bc3be758587479874bff531ad702f429a963518d7bc5b2b3c0400ded4c6a ./kintex7/mask_bram4_r.db`](./kintex7/mask_bram4_r.db)
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* [`03fe7af3125c25f3d84bd8e874525c83275a6c3b6736d0b01134b5f982721f5b ./kintex7/mask_clbll_l.db`](./kintex7/mask_clbll_l.db)
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* [`be34841c9aa64527e5f84d1819abbac1d324047367003b6fdc1402cd695481de ./kintex7/mask_clbll_r.db`](./kintex7/mask_clbll_r.db)
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* [`fec2e4a94efd8b4e9d29d52689d406482f842e6f718ab671131b5e9ac2e0805b ./kintex7/mask_clblm_l.db`](./kintex7/mask_clblm_l.db)
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* [`7b68fbcb19382d54bdc57971dd7eb9b0cbb4318f9b6053b301f3384f7ee4bb75 ./kintex7/mask_clblm_r.db`](./kintex7/mask_clblm_r.db)
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* [`6f6dd0ba33fdd78d87f8591adbff5aad2d3653a1b1fa03d77079ce64a7c1f175 ./kintex7/mask_dsp0_l.db`](./kintex7/mask_dsp0_l.db)
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* [`9d12bc3be758587479874bff531ad702f429a963518d7bc5b2b3c0400ded4c6a ./kintex7/mask_dsp0_r.db`](./kintex7/mask_dsp0_r.db)
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* [`6f6dd0ba33fdd78d87f8591adbff5aad2d3653a1b1fa03d77079ce64a7c1f175 ./kintex7/mask_dsp1_l.db`](./kintex7/mask_dsp1_l.db)
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* [`9d12bc3be758587479874bff531ad702f429a963518d7bc5b2b3c0400ded4c6a ./kintex7/mask_dsp1_r.db`](./kintex7/mask_dsp1_r.db)
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* [`6f6dd0ba33fdd78d87f8591adbff5aad2d3653a1b1fa03d77079ce64a7c1f175 ./kintex7/mask_dsp2_l.db`](./kintex7/mask_dsp2_l.db)
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* [`9d12bc3be758587479874bff531ad702f429a963518d7bc5b2b3c0400ded4c6a ./kintex7/mask_dsp2_r.db`](./kintex7/mask_dsp2_r.db)
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* [`6f6dd0ba33fdd78d87f8591adbff5aad2d3653a1b1fa03d77079ce64a7c1f175 ./kintex7/mask_dsp3_l.db`](./kintex7/mask_dsp3_l.db)
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* [`9d12bc3be758587479874bff531ad702f429a963518d7bc5b2b3c0400ded4c6a ./kintex7/mask_dsp3_r.db`](./kintex7/mask_dsp3_r.db)
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* [`6f6dd0ba33fdd78d87f8591adbff5aad2d3653a1b1fa03d77079ce64a7c1f175 ./kintex7/mask_dsp4_l.db`](./kintex7/mask_dsp4_l.db)
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* [`9d12bc3be758587479874bff531ad702f429a963518d7bc5b2b3c0400ded4c6a ./kintex7/mask_dsp4_r.db`](./kintex7/mask_dsp4_r.db)
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* [`3e3b19a2d49a1d0f25937bc5d0b33f0269c22c5e8ae3cfe52e4ff5c65843b134 ./kintex7/segbits_clbll_l.db`](./kintex7/segbits_clbll_l.db)
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* [`fdb5499b9e2aa9d1796332279f0b5dc881a5ad0796698e8ef3af40ddc98df26b ./kintex7/segbits_clbll_r.db`](./kintex7/segbits_clbll_r.db)
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* [`0b79670cc5a03b7580f73dc162a8bad048ade2f50971622138e0d0a5759899b6 ./kintex7/segbits_clblm_l.db`](./kintex7/segbits_clblm_l.db)
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* [`e7f5d16940fde9397f69d5f52c2a6339641191dc9dba4466e8b7f9e5f6a735bf ./kintex7/segbits_clblm_r.db`](./kintex7/segbits_clblm_r.db)
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* [`3acf987b9e7fb81ef6834b82418cac50c50a1b8789afd46b70600dd3cda57b7a ./kintex7/segbits_int_l.db`](./kintex7/segbits_int_l.db)
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* [`0bf2446027e385b1336d67afa85670ca9557a8786ee70db8453c81af08e8a002 ./kintex7/segbits_int_r.db`](./kintex7/segbits_int_r.db)
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* [`9ed8769618df03902c73e78312467108c7b74b903ac61d1bbbba1fd9710e6d3b ./kintex7/segbits_int_l.db`](./kintex7/segbits_int_l.db)
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* [`dbf6cba5bbba95d7d78d9b51d236d8819dc776c2ebc540521e5b48d3a2c1390f ./kintex7/segbits_int_r.db`](./kintex7/segbits_int_r.db)
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* [`2daf6a69dd6d20df7b1273ff43c5c340abe36f8229d297646865edcfd91eff18 ./kintex7/settings.sh`](./kintex7/settings.sh)
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* [`2de0ad914422b7fdf14f26895122cd7bcf4263c2e86286519ca4a8efafddab4a ./kintex7/tilegrid.json`](./kintex7/tilegrid.json)
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* [`8f5b7a7924adec5132208cf8e851e81bcb01a5c61f8839eb5a5de0b20b924510 ./kintex7/tilegrid.json`](./kintex7/tilegrid.json)
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* [`68426295ab4a35e367c9dff93e4f9b807afd43fe83418cb2da7465cd4d7177a2 ./kintex7/xc7k70tfbg676-2.yaml`](./kintex7/xc7k70tfbg676-2.yaml)
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File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
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@ -9,14 +9,21 @@ bit 00_09
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bit 00_10
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bit 00_11
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bit 00_12
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bit 00_13
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bit 00_14
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bit 00_15
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bit 00_16
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bit 00_17
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bit 00_18
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bit 00_19
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bit 00_21
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bit 00_22
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bit 00_23
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bit 00_25
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bit 00_26
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bit 00_27
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bit 00_29
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bit 00_30
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bit 00_32
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bit 00_33
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bit 00_34
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@ -53,14 +60,21 @@ bit 01_08
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bit 01_09
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bit 01_10
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bit 01_11
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bit 01_12
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bit 01_13
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bit 01_14
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bit 01_15
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bit 01_16
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bit 01_17
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bit 01_18
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bit 01_19
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bit 01_20
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bit 01_21
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bit 01_22
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bit 01_24
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bit 01_25
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bit 01_26
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bit 01_28
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bit 01_29
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bit 01_31
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bit 01_32
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@ -1,20 +1,68 @@
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bit 00_08
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bit 00_10
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bit 00_11
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bit 00_12
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bit 00_13
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bit 00_14
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bit 00_15
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bit 00_16
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bit 00_17
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bit 00_18
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bit 00_19
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bit 00_21
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bit 00_22
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bit 00_23
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bit 00_25
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bit 00_26
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bit 00_27
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bit 00_29
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bit 00_30
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bit 00_32
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bit 00_33
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bit 00_34
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bit 00_35
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bit 00_36
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bit 00_37
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bit 00_38
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bit 00_39
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bit 00_41
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bit 00_42
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bit 00_44
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bit 00_48
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bit 00_52
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bit 00_56
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bit 01_03
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bit 01_07
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bit 01_09
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bit 01_10
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bit 01_11
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bit 01_12
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bit 01_13
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bit 01_14
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bit 01_15
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bit 01_16
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bit 01_17
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bit 01_18
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bit 01_19
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bit 01_20
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bit 01_21
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bit 01_22
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bit 01_24
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bit 01_25
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bit 01_26
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bit 01_28
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bit 01_29
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bit 01_31
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bit 01_32
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bit 01_33
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bit 01_34
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bit 01_35
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bit 01_36
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bit 01_37
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bit 01_38
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bit 01_39
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bit 01_40
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bit 01_41
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bit 01_47
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bit 01_51
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bit 01_55
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@ -1786,13 +1834,16 @@ bit 30_30
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bit 30_32
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bit 30_33
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bit 30_34
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bit 30_45
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bit 30_48
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bit 30_49
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bit 30_50
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bit 30_56
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bit 31_03
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bit 31_04
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bit 31_05
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bit 31_06
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bit 31_09
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bit 31_12
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bit 31_13
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bit 31_14
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@ -1807,11 +1858,13 @@ bit 31_33
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bit 31_34
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bit 31_41
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bit 31_42
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bit 31_43
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bit 31_48
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bit 31_49
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bit 31_50
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bit 31_51
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bit 31_52
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bit 31_56
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bit 31_58
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bit 31_59
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bit 32_00
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@ -11,17 +11,24 @@ bit 00_09
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bit 00_10
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bit 00_11
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bit 00_12
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bit 00_13
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bit 00_14
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bit 00_15
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bit 00_16
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bit 00_17
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bit 00_18
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bit 00_19
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bit 00_20
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bit 00_21
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bit 00_22
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bit 00_23
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bit 00_24
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bit 00_25
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bit 00_26
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bit 00_27
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bit 00_28
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bit 00_29
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bit 00_30
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bit 00_32
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bit 00_33
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bit 00_34
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@ -56,15 +63,22 @@ bit 01_08
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bit 01_09
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bit 01_10
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bit 01_11
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bit 01_12
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bit 01_13
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bit 01_14
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bit 01_15
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bit 01_16
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bit 01_17
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bit 01_18
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bit 01_19
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bit 01_20
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bit 01_21
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bit 01_22
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bit 01_23
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bit 01_24
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bit 01_25
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bit 01_26
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bit 01_28
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bit 01_29
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bit 01_31
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bit 01_32
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@ -11,17 +11,24 @@ bit 00_09
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bit 00_10
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bit 00_11
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bit 00_12
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bit 00_13
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bit 00_14
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bit 00_15
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bit 00_16
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bit 00_17
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bit 00_18
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bit 00_19
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bit 00_20
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bit 00_21
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bit 00_22
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bit 00_23
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bit 00_24
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bit 00_25
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bit 00_26
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bit 00_27
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bit 00_28
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bit 00_29
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bit 00_30
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bit 00_32
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bit 00_33
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bit 00_34
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@ -55,15 +62,22 @@ bit 01_08
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bit 01_09
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bit 01_10
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bit 01_11
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bit 01_12
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bit 01_13
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bit 01_14
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bit 01_15
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bit 01_16
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bit 01_17
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bit 01_18
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bit 01_19
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bit 01_20
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bit 01_21
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bit 01_22
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bit 01_23
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bit 01_24
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bit 01_25
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bit 01_26
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bit 01_28
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bit 01_29
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bit 01_31
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bit 01_32
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File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
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@ -190,6 +190,70 @@ INT_L.BYP_ALT7.SW2END3 !22_63 !23_63 !24_63 19_62 25_63
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INT_L.BYP_ALT7.WL1END3 !23_63 16_63 22_63 24_63 25_63
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INT_L.BYP_ALT7.WR1END_S1_0 !22_63 17_63 23_63 24_63 25_63
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INT_L.BYP_ALT7.WW2END3 !22_63 !23_63 !25_63 18_62 24_63
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INT_L.CLK_L0.ER1END1 !01_21 00_22 00_25 01_20 01_24
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INT_L.CLK_L0.FAN_BOUNCE5 !01_20 00_25 00_26 01_21 01_24
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INT_L.CLK_L0.GCLK_L_B0 !01_21 00_25 00_26 01_20 01_24
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INT_L.CLK_L0.GCLK_L_B1 !00_25 !01_20 !01_21 00_26 01_24
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INT_L.CLK_L0.GCLK_L_B10_WEST !01_20 !01_21 !01_24 00_21 00_25
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INT_L.CLK_L0.GCLK_L_B11_WEST !01_20 00_22 00_25 01_21 01_24
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INT_L.CLK_L0.GCLK_L_B2 !01_20 !01_21 !01_24 00_25 00_26
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INT_L.CLK_L0.GCLK_L_B3 !01_20 00_25 01_21 01_24 01_28
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INT_L.CLK_L0.GCLK_L_B4 !01_21 00_25 01_20 01_24 01_28
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INT_L.CLK_L0.GCLK_L_B5 !00_25 !01_20 !01_21 01_24 01_28
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INT_L.CLK_L0.GCLK_L_B6_WEST !01_20 !01_21 !01_24 00_25 01_28
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INT_L.CLK_L0.GCLK_L_B7_WEST !01_20 00_21 00_25 01_21 01_24
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INT_L.CLK_L0.GCLK_L_B8_WEST !01_21 00_21 00_25 01_20 01_24
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INT_L.CLK_L0.GCLK_L_B9_WEST !00_25 !01_20 !01_21 00_21 01_24
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INT_L.CLK_L0.SR1END1 !01_20 !01_21 !01_24 00_22 00_25
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INT_L.CLK_L0.WR1END1 !00_25 !01_20 !01_21 00_22 01_24
|
||||
INT_L.CLK_L1.ER1END1 !01_29 00_27 00_29 01_25 01_26
|
||||
INT_L.CLK_L1.FAN_BOUNCE5 !00_29 00_27 00_30 01_26 01_29
|
||||
INT_L.CLK_L1.GCLK_L_B0 !01_29 00_27 00_29 00_30 01_26
|
||||
INT_L.CLK_L1.GCLK_L_B1 !00_29 !01_26 !01_29 00_27 00_30
|
||||
INT_L.CLK_L1.GCLK_L_B10_WEST !00_27 !00_29 !01_29 01_22 01_26
|
||||
INT_L.CLK_L1.GCLK_L_B11_WEST !00_29 00_27 01_25 01_26 01_29
|
||||
INT_L.CLK_L1.GCLK_L_B2 !00_27 !00_29 !01_29 00_30 01_26
|
||||
INT_L.CLK_L1.GCLK_L_B3 !00_29 00_23 00_27 01_26 01_29
|
||||
INT_L.CLK_L1.GCLK_L_B4 !01_29 00_23 00_27 00_29 01_26
|
||||
INT_L.CLK_L1.GCLK_L_B5 !00_29 !01_26 !01_29 00_23 00_27
|
||||
INT_L.CLK_L1.GCLK_L_B6_WEST !00_27 !00_29 !01_29 00_23 01_26
|
||||
INT_L.CLK_L1.GCLK_L_B7_WEST !00_29 00_27 01_22 01_26 01_29
|
||||
INT_L.CLK_L1.GCLK_L_B8_WEST !01_29 00_27 00_29 01_22 01_26
|
||||
INT_L.CLK_L1.GCLK_L_B9_WEST !00_29 !01_26 !01_29 00_27 01_22
|
||||
INT_L.CLK_L1.SR1END1 !00_27 !00_29 !01_29 01_25 01_26
|
||||
INT_L.CLK_L1.WR1END1 !00_29 !01_26 !01_29 00_27 01_25
|
||||
INT_L.CTRL_L0.BYP_BOUNCE4 !00_35 !00_39 !01_40 01_37 01_38
|
||||
INT_L.CTRL_L0.EE4END2 !00_35 !01_38 !01_40 00_38 00_39
|
||||
INT_L.CTRL_L0.ER1END2 !00_35 !00_39 !01_40 01_33 01_38
|
||||
INT_L.CTRL_L0.FAN_BOUNCE1 !00_35 !01_38 !01_40 00_39 01_37
|
||||
INT_L.CTRL_L0.GFAN0 !01_40 00_35 00_39 01_37 01_38
|
||||
INT_L.CTRL_L0.GFAN1 !00_35 00_39 01_37 01_38 01_40
|
||||
INT_L.CTRL_L0.NE6END2 !00_35 00_39 01_33 01_38 01_40
|
||||
INT_L.CTRL_L0.NN6END2 !01_40 00_35 00_39 01_33 01_38
|
||||
INT_L.CTRL_L0.NR1END2 !00_35 00_34 00_39 01_38 01_40
|
||||
INT_L.CTRL_L0.NW6END2 !01_40 00_34 00_35 00_39 01_38
|
||||
INT_L.CTRL_L0.SE6END2 !00_35 !00_39 !01_40 00_38 01_38
|
||||
INT_L.CTRL_L0.SR1END2 !00_35 00_38 00_39 01_38 01_40
|
||||
INT_L.CTRL_L0.SS6END2 !01_40 00_35 00_38 00_39 01_38
|
||||
INT_L.CTRL_L0.SW6END1 !00_35 !00_39 !01_40 00_34 01_38
|
||||
INT_L.CTRL_L0.WR1END2 !00_35 !01_38 !01_40 00_34 00_39
|
||||
INT_L.CTRL_L0.WW4END2 !00_35 !01_38 !01_40 00_39 01_33
|
||||
INT_L.CTRL_L1.BYP_BOUNCE4 !00_37 !01_36 !01_41 00_42 01_32
|
||||
INT_L.CTRL_L1.EE4END2 !00_37 !00_42 !01_36 00_41 01_41
|
||||
INT_L.CTRL_L1.ER1END2 !00_37 !01_36 !01_41 00_33 00_42
|
||||
INT_L.CTRL_L1.FAN_BOUNCE1 !00_37 !00_42 !01_36 01_32 01_41
|
||||
INT_L.CTRL_L1.GFAN0 !00_37 00_42 01_32 01_36 01_41
|
||||
INT_L.CTRL_L1.GFAN1 !01_36 00_37 00_42 01_32 01_41
|
||||
INT_L.CTRL_L1.NE6END2 !01_36 00_33 00_37 00_42 01_41
|
||||
INT_L.CTRL_L1.NN6END2 !00_37 00_33 00_42 01_36 01_41
|
||||
INT_L.CTRL_L1.NR1END2 !01_36 00_37 00_42 01_34 01_41
|
||||
INT_L.CTRL_L1.NW6END2 !00_37 00_42 01_34 01_36 01_41
|
||||
INT_L.CTRL_L1.SE6END2 !00_37 !01_36 !01_41 00_41 00_42
|
||||
INT_L.CTRL_L1.SR1END2 !01_36 00_37 00_41 00_42 01_41
|
||||
INT_L.CTRL_L1.SS6END2 !00_37 00_41 00_42 01_36 01_41
|
||||
INT_L.CTRL_L1.SW6END1 !00_37 !01_36 !01_41 00_42 01_34
|
||||
INT_L.CTRL_L1.WR1END2 !00_37 !00_42 !01_36 01_34 01_41
|
||||
INT_L.CTRL_L1.WW4END2 !00_37 !00_42 !01_36 00_33 01_41
|
||||
INT_L.EE2BEG0.EE2END0 11_06 14_06
|
||||
INT_L.EE2BEG0.EE4END0 11_06 13_06
|
||||
INT_L.EE2BEG0.EL1END0 09_06 12_06
|
||||
|
|
@ -692,6 +756,36 @@ INT_L.FAN_ALT7.SW2END1 !22_32 !23_32 !25_32 17_32 24_32
|
|||
INT_L.FAN_ALT7.WL1END1 !22_32 16_32 23_32 24_32 25_32
|
||||
INT_L.FAN_ALT7.WR1END2 !23_32 17_32 22_32 24_32 25_32
|
||||
INT_L.FAN_ALT7.WW2END1 !22_32 !23_32 !24_32 16_32 25_32
|
||||
INT_L.GFAN0.BYP_BOUNCE1 !01_09 00_10 00_11 01_10 01_14
|
||||
INT_L.GFAN0.GCLK_L_B0 !01_09 00_10 00_11 01_10 01_12
|
||||
INT_L.GFAN0.GCLK_L_B1 !00_10 00_11 01_09 01_10 01_12
|
||||
INT_L.GFAN0.GCLK_L_B10_WEST !00_10 !00_11 !01_09 01_10 01_16
|
||||
INT_L.GFAN0.GCLK_L_B11_WEST !00_10 !01_09 !01_10 00_11 01_16
|
||||
INT_L.GFAN0.GCLK_L_B2 !00_10 !00_11 !01_09 01_10 01_12
|
||||
INT_L.GFAN0.GCLK_L_B3 !00_10 !01_09 !01_10 00_11 01_12
|
||||
INT_L.GFAN0.GCLK_L_B4 !01_09 00_10 00_11 01_10 01_18
|
||||
INT_L.GFAN0.GCLK_L_B5 !00_10 00_11 01_09 01_10 01_18
|
||||
INT_L.GFAN0.GCLK_L_B6_WEST !00_10 !00_11 !01_09 01_10 01_18
|
||||
INT_L.GFAN0.GCLK_L_B7_WEST !00_10 !01_09 !01_10 00_11 01_18
|
||||
INT_L.GFAN0.GCLK_L_B8_WEST !01_09 00_10 00_11 01_10 01_16
|
||||
INT_L.GFAN0.GCLK_L_B9_WEST !00_10 00_11 01_09 01_10 01_16
|
||||
INT_L.GFAN0.NR1END1 !00_10 00_11 01_09 01_10 01_14
|
||||
INT_L.GFAN0.WW4END1 !00_10 !00_11 !01_09 01_10 01_14
|
||||
INT_L.GFAN1.BYP_BOUNCE1 !00_19 00_14 00_17 00_18 01_13
|
||||
INT_L.GFAN1.GCLK_L_B0 !00_19 00_13 00_14 00_18 01_13
|
||||
INT_L.GFAN1.GCLK_L_B1 !00_18 00_13 00_14 00_19 01_13
|
||||
INT_L.GFAN1.GCLK_L_B10_WEST !00_18 !00_19 !01_13 00_14 01_17
|
||||
INT_L.GFAN1.GCLK_L_B11_WEST !00_14 !00_18 !00_19 01_13 01_17
|
||||
INT_L.GFAN1.GCLK_L_B2 !00_18 !00_19 !01_13 00_13 00_14
|
||||
INT_L.GFAN1.GCLK_L_B3 !00_14 !00_18 !00_19 00_13 01_13
|
||||
INT_L.GFAN1.GCLK_L_B4 !00_19 00_14 00_15 00_18 01_13
|
||||
INT_L.GFAN1.GCLK_L_B5 !00_18 00_14 00_15 00_19 01_13
|
||||
INT_L.GFAN1.GCLK_L_B6_WEST !00_18 !00_19 !01_13 00_14 00_15
|
||||
INT_L.GFAN1.GCLK_L_B7_WEST !00_14 !00_18 !00_19 00_15 01_13
|
||||
INT_L.GFAN1.GCLK_L_B8_WEST !00_19 00_14 00_18 01_13 01_17
|
||||
INT_L.GFAN1.GCLK_L_B9_WEST !00_18 00_14 00_19 01_13 01_17
|
||||
INT_L.GFAN1.NR1END1 !00_18 00_14 00_17 00_19 01_13
|
||||
INT_L.GFAN1.WW4END1 !00_18 !00_19 !01_13 00_14 00_17
|
||||
INT_L.IMUX_L0.BYP_BOUNCE_N3_2 !22_01 !23_01 !24_01 21_01 25_01
|
||||
INT_L.IMUX_L0.BYP_BOUNCE_N3_6 !22_01 !23_01 !25_01 21_01 24_01
|
||||
INT_L.IMUX_L0.EE2END0 !22_01 !23_01 !25_01 17_01 24_01
|
||||
|
|
@ -1036,6 +1130,7 @@ INT_L.IMUX_L21.ER1END2 !22_43 16_43 23_43 24_43 25_43
|
|||
INT_L.IMUX_L21.FAN_BOUNCE3 !23_43 21_43 22_43 24_43 25_43
|
||||
INT_L.IMUX_L21.FAN_BOUNCE_S3_4 !22_43 21_43 23_43 24_43 25_43
|
||||
INT_L.IMUX_L21.GFAN1 !22_43 !23_43 !25_43 20_43 24_43
|
||||
INT_L.IMUX_L21.LOGIC_OUTS_L10 !23_43 20_43 22_43 24_43 25_43
|
||||
INT_L.IMUX_L21.LOGIC_OUTS_L16 !22_43 !23_43 !24_43 20_43 25_43
|
||||
INT_L.IMUX_L21.LOGIC_OUTS_L6 !22_43 20_43 23_43 24_43 25_43
|
||||
INT_L.IMUX_L21.NE2END2 !22_43 !23_43 !24_43 18_42 25_43
|
||||
|
|
@ -1157,6 +1252,7 @@ INT_L.IMUX_L26.FAN_BOUNCE7 !23_20 20_20 22_20 24_20 25_20
|
|||
INT_L.IMUX_L26.GFAN0 !22_20 !23_20 !24_20 21_20 25_20
|
||||
INT_L.IMUX_L26.LOGIC_OUTS_L19 !22_20 !23_20 !25_20 21_20 24_20
|
||||
INT_L.IMUX_L26.LOGIC_OUTS_L5 !23_20 21_20 22_20 24_20 25_20
|
||||
INT_L.IMUX_L26.LOGIC_OUTS_L9 !22_20 21_20 23_20 24_20 25_20
|
||||
INT_L.IMUX_L26.NE2END1 !22_20 !23_20 !25_20 18_21 24_20
|
||||
INT_L.IMUX_L26.NL1END1 !22_20 19_21 23_20 24_20 25_20
|
||||
INT_L.IMUX_L26.NN2END1 !22_20 !23_20 !24_20 18_21 25_20
|
||||
|
|
@ -1179,6 +1275,7 @@ INT_L.IMUX_L27.FAN_BOUNCE3 !22_28 20_28 23_28 24_28 25_28
|
|||
INT_L.IMUX_L27.FAN_BOUNCE5 !23_28 20_28 22_28 24_28 25_28
|
||||
INT_L.IMUX_L27.GFAN0 !22_28 !23_28 !24_28 21_28 25_28
|
||||
INT_L.IMUX_L27.LOGIC_OUTS_L1 !23_28 21_28 22_28 24_28 25_28
|
||||
INT_L.IMUX_L27.LOGIC_OUTS_L13 !22_28 21_28 23_28 24_28 25_28
|
||||
INT_L.IMUX_L27.LOGIC_OUTS_L23 !22_28 !23_28 !25_28 21_28 24_28
|
||||
INT_L.IMUX_L27.NE2END2 !22_28 !23_28 !25_28 19_29 24_28
|
||||
INT_L.IMUX_L27.NL1END2 !22_28 19_29 23_28 24_28 25_28
|
||||
|
|
@ -1201,6 +1298,7 @@ INT_L.IMUX_L28.ER1END2 !23_36 18_37 22_36 24_36 25_36
|
|||
INT_L.IMUX_L28.FAN_BOUNCE1 !22_36 20_36 23_36 24_36 25_36
|
||||
INT_L.IMUX_L28.FAN_BOUNCE_S3_0 !23_36 20_36 22_36 24_36 25_36
|
||||
INT_L.IMUX_L28.GFAN1 !22_36 !23_36 !24_36 21_36 25_36
|
||||
INT_L.IMUX_L28.LOGIC_OUTS_L14 !22_36 21_36 23_36 24_36 25_36
|
||||
INT_L.IMUX_L28.LOGIC_OUTS_L2 !23_36 21_36 22_36 24_36 25_36
|
||||
INT_L.IMUX_L28.LOGIC_OUTS_L20 !22_36 !23_36 !25_36 21_36 24_36
|
||||
INT_L.IMUX_L28.NE2END2 !22_36 !23_36 !25_36 18_37 24_36
|
||||
|
|
@ -1322,6 +1420,7 @@ INT_L.IMUX_L32.FAN_BOUNCE7 !23_05 21_05 22_05 24_05 25_05
|
|||
INT_L.IMUX_L32.GFAN0 !22_05 !23_05 !25_05 20_05 24_05
|
||||
INT_L.IMUX_L32.LOGIC_OUTS_L0 !22_05 20_05 23_05 24_05 25_05
|
||||
INT_L.IMUX_L32.LOGIC_OUTS_L12 !23_05 20_05 22_05 24_05 25_05
|
||||
INT_L.IMUX_L32.LOGIC_OUTS_L22 !22_05 !23_05 !24_05 20_05 25_05
|
||||
INT_L.IMUX_L32.NE2END0 !22_05 !23_05 !24_05 16_05 25_05
|
||||
INT_L.IMUX_L32.NL1END0 !23_05 17_05 22_05 24_05 25_05
|
||||
INT_L.IMUX_L32.NN2END0 !22_05 !23_05 !25_05 16_05 24_05
|
||||
|
|
@ -1343,6 +1442,7 @@ INT_L.IMUX_L33.ER1END0 !22_13 19_12 23_13 24_13 25_13
|
|||
INT_L.IMUX_L33.FAN_BOUNCE5 !23_13 21_13 22_13 24_13 25_13
|
||||
INT_L.IMUX_L33.FAN_BOUNCE6 !22_13 21_13 23_13 24_13 25_13
|
||||
INT_L.IMUX_L33.GFAN0 !22_13 !23_13 !25_13 20_13 24_13
|
||||
INT_L.IMUX_L33.LOGIC_OUTS_L18 !22_13 !23_13 !24_13 20_13 25_13
|
||||
INT_L.IMUX_L33.LOGIC_OUTS_L4 !22_13 20_13 23_13 24_13 25_13
|
||||
INT_L.IMUX_L33.LOGIC_OUTS_L8 !23_13 20_13 22_13 24_13 25_13
|
||||
INT_L.IMUX_L33.NE2END1 !22_13 !23_13 !24_13 17_13 25_13
|
||||
|
|
@ -1582,6 +1682,7 @@ INT_L.IMUX_L42.ER1END1 !23_22 19_23 22_22 24_22 25_22
|
|||
INT_L.IMUX_L42.FAN_BOUNCE1 !22_22 20_22 23_22 24_22 25_22
|
||||
INT_L.IMUX_L42.FAN_BOUNCE7 !23_22 20_22 22_22 24_22 25_22
|
||||
INT_L.IMUX_L42.GFAN0 !22_22 !23_22 !24_22 21_22 25_22
|
||||
INT_L.IMUX_L42.LOGIC_OUTS_L19 !22_22 !23_22 !25_22 21_22 24_22
|
||||
INT_L.IMUX_L42.LOGIC_OUTS_L5 !23_22 21_22 22_22 24_22 25_22
|
||||
INT_L.IMUX_L42.LOGIC_OUTS_L9 !22_22 21_22 23_22 24_22 25_22
|
||||
INT_L.IMUX_L42.NE2END1 !22_22 !23_22 !25_22 17_22 24_22
|
||||
|
|
@ -1607,6 +1708,7 @@ INT_L.IMUX_L43.FAN_BOUNCE5 !23_30 20_30 22_30 24_30 25_30
|
|||
INT_L.IMUX_L43.GFAN0 !22_30 !23_30 !24_30 21_30 25_30
|
||||
INT_L.IMUX_L43.LOGIC_OUTS_L1 !23_30 21_30 22_30 24_30 25_30
|
||||
INT_L.IMUX_L43.LOGIC_OUTS_L13 !22_30 21_30 23_30 24_30 25_30
|
||||
INT_L.IMUX_L43.LOGIC_OUTS_L23 !22_30 !23_30 !25_30 21_30 24_30
|
||||
INT_L.IMUX_L43.NE2END2 !22_30 !23_30 !25_30 18_31 24_30
|
||||
INT_L.IMUX_L43.NL1END2 !22_30 16_30 23_30 24_30 25_30
|
||||
INT_L.IMUX_L43.NN2END2 !22_30 !23_30 !24_30 18_31 25_30
|
||||
|
|
@ -1676,6 +1778,7 @@ INT_L.IMUX_L46.ER1END3 !23_54 19_55 22_54 24_54 25_54
|
|||
INT_L.IMUX_L46.FAN_BOUNCE_S3_0 !22_54 20_54 23_54 24_54 25_54
|
||||
INT_L.IMUX_L46.FAN_BOUNCE_S3_2 !23_54 20_54 22_54 24_54 25_54
|
||||
INT_L.IMUX_L46.GFAN1 !22_54 !23_54 !24_54 21_54 25_54
|
||||
INT_L.IMUX_L46.LOGIC_OUTS_L11 !22_54 21_54 23_54 24_54 25_54
|
||||
INT_L.IMUX_L46.LOGIC_OUTS_L17 !22_54 !23_54 !25_54 21_54 24_54
|
||||
INT_L.IMUX_L46.LOGIC_OUTS_L7 !23_54 21_54 22_54 24_54 25_54
|
||||
INT_L.IMUX_L46.NE2END3 !22_54 !23_54 !25_54 17_54 24_54
|
||||
|
|
@ -1699,6 +1802,7 @@ INT_L.IMUX_L47.ER1END3 !23_62 18_63 22_62 24_62 25_62
|
|||
INT_L.IMUX_L47.FAN_BOUNCE_S3_4 !22_62 20_62 23_62 24_62 25_62
|
||||
INT_L.IMUX_L47.FAN_BOUNCE_S3_6 !23_62 20_62 22_62 24_62 25_62
|
||||
INT_L.IMUX_L47.GFAN1 !22_62 !23_62 !24_62 21_62 25_62
|
||||
INT_L.IMUX_L47.LOGIC_OUTS_L15 !22_62 21_62 23_62 24_62 25_62
|
||||
INT_L.IMUX_L47.LOGIC_OUTS_L21 !22_62 !23_62 !25_62 21_62 24_62
|
||||
INT_L.IMUX_L47.LOGIC_OUTS_L3 !23_62 21_62 22_62 24_62 25_62
|
||||
INT_L.IMUX_L47.NE2END_S3_0 !22_62 !23_62 !25_62 18_63 24_62
|
||||
|
|
@ -1795,6 +1899,7 @@ INT_L.IMUX_L8.FAN_BOUNCE2 !23_02 20_02 22_02 24_02 25_02
|
|||
INT_L.IMUX_L8.FAN_BOUNCE7 !22_02 20_02 23_02 24_02 25_02
|
||||
INT_L.IMUX_L8.GFAN0 !22_02 !23_02 !24_02 21_02 25_02
|
||||
INT_L.IMUX_L8.LOGIC_OUTS_L0 !23_02 21_02 22_02 24_02 25_02
|
||||
INT_L.IMUX_L8.LOGIC_OUTS_L12 !22_02 21_02 23_02 24_02 25_02
|
||||
INT_L.IMUX_L8.LOGIC_OUTS_L22 !22_02 !23_02 !25_02 21_02 24_02
|
||||
INT_L.IMUX_L8.NE2END0 !22_02 !23_02 !25_02 17_02 24_02
|
||||
INT_L.IMUX_L8.NL1END0 !22_02 16_02 23_02 24_02 25_02
|
||||
|
|
@ -1819,6 +1924,7 @@ INT_L.IMUX_L9.FAN_BOUNCE6 !23_10 20_10 22_10 24_10 25_10
|
|||
INT_L.IMUX_L9.GFAN0 !22_10 !23_10 !24_10 21_10 25_10
|
||||
INT_L.IMUX_L9.LOGIC_OUTS_L18 !22_10 !23_10 !25_10 21_10 24_10
|
||||
INT_L.IMUX_L9.LOGIC_OUTS_L4 !23_10 21_10 22_10 24_10 25_10
|
||||
INT_L.IMUX_L9.LOGIC_OUTS_L8 !22_10 21_10 23_10 24_10 25_10
|
||||
INT_L.IMUX_L9.NE2END0 !22_10 !23_10 !25_10 16_10 24_10
|
||||
INT_L.IMUX_L9.NL1END1 !22_10 16_10 23_10 24_10 25_10
|
||||
INT_L.IMUX_L9.NN2END0 !22_10 !23_10 !24_10 16_10 25_10
|
||||
|
|
|
|||
|
|
@ -190,6 +190,70 @@ INT_R.BYP_ALT7.SW2END3 !22_63 !23_63 !24_63 19_62 25_63
|
|||
INT_R.BYP_ALT7.WL1END3 !23_63 16_63 22_63 24_63 25_63
|
||||
INT_R.BYP_ALT7.WR1END_S1_0 !22_63 17_63 23_63 24_63 25_63
|
||||
INT_R.BYP_ALT7.WW2END3 !22_63 !23_63 !25_63 18_62 24_63
|
||||
INT_R.CLK0.ER1END1 !01_21 00_22 00_25 01_20 01_24
|
||||
INT_R.CLK0.FAN_BOUNCE5 !01_20 00_25 00_26 01_21 01_24
|
||||
INT_R.CLK0.GCLK_B0_EAST !01_21 00_25 00_26 01_20 01_24
|
||||
INT_R.CLK0.GCLK_B10 !01_20 !01_21 !01_24 00_21 00_25
|
||||
INT_R.CLK0.GCLK_B11 !01_20 00_22 00_25 01_21 01_24
|
||||
INT_R.CLK0.GCLK_B1_EAST !00_25 !01_20 !01_21 00_26 01_24
|
||||
INT_R.CLK0.GCLK_B2_EAST !01_20 !01_21 !01_24 00_25 00_26
|
||||
INT_R.CLK0.GCLK_B3_EAST !01_20 00_25 01_21 01_24 01_28
|
||||
INT_R.CLK0.GCLK_B4_EAST !01_21 00_25 01_20 01_24 01_28
|
||||
INT_R.CLK0.GCLK_B5_EAST !00_25 !01_20 !01_21 01_24 01_28
|
||||
INT_R.CLK0.GCLK_B6 !01_20 !01_21 !01_24 00_25 01_28
|
||||
INT_R.CLK0.GCLK_B7 !01_20 00_21 00_25 01_21 01_24
|
||||
INT_R.CLK0.GCLK_B8 !01_21 00_21 00_25 01_20 01_24
|
||||
INT_R.CLK0.GCLK_B9 !00_25 !01_20 !01_21 00_21 01_24
|
||||
INT_R.CLK0.SR1END1 !01_20 !01_21 !01_24 00_22 00_25
|
||||
INT_R.CLK0.WR1END1 !00_25 !01_20 !01_21 00_22 01_24
|
||||
INT_R.CLK1.ER1END1 !01_29 00_27 00_29 01_25 01_26
|
||||
INT_R.CLK1.FAN_BOUNCE5 !00_29 00_27 00_30 01_26 01_29
|
||||
INT_R.CLK1.GCLK_B0_EAST !01_29 00_27 00_29 00_30 01_26
|
||||
INT_R.CLK1.GCLK_B10 !00_27 !00_29 !01_29 01_22 01_26
|
||||
INT_R.CLK1.GCLK_B11 !00_29 00_27 01_25 01_26 01_29
|
||||
INT_R.CLK1.GCLK_B1_EAST !00_29 !01_26 !01_29 00_27 00_30
|
||||
INT_R.CLK1.GCLK_B2_EAST !00_27 !00_29 !01_29 00_30 01_26
|
||||
INT_R.CLK1.GCLK_B3_EAST !00_29 00_23 00_27 01_26 01_29
|
||||
INT_R.CLK1.GCLK_B4_EAST !01_29 00_23 00_27 00_29 01_26
|
||||
INT_R.CLK1.GCLK_B5_EAST !00_29 !01_26 !01_29 00_23 00_27
|
||||
INT_R.CLK1.GCLK_B6 !00_27 !00_29 !01_29 00_23 01_26
|
||||
INT_R.CLK1.GCLK_B7 !00_29 00_27 01_22 01_26 01_29
|
||||
INT_R.CLK1.GCLK_B8 !01_29 00_27 00_29 01_22 01_26
|
||||
INT_R.CLK1.GCLK_B9 !00_29 !01_26 !01_29 00_27 01_22
|
||||
INT_R.CLK1.SR1END1 !00_27 !00_29 !01_29 01_25 01_26
|
||||
INT_R.CLK1.WR1END1 !00_29 !01_26 !01_29 00_27 01_25
|
||||
INT_R.CTRL0.BYP_BOUNCE4 !00_35 !00_39 !01_40 01_37 01_38
|
||||
INT_R.CTRL0.EE4END2 !00_35 !01_38 !01_40 00_38 00_39
|
||||
INT_R.CTRL0.ER1END2 !00_35 !00_39 !01_40 01_33 01_38
|
||||
INT_R.CTRL0.FAN_BOUNCE1 !00_35 !01_38 !01_40 00_39 01_37
|
||||
INT_R.CTRL0.GFAN0 !01_40 00_35 00_39 01_37 01_38
|
||||
INT_R.CTRL0.GFAN1 !00_35 00_39 01_37 01_38 01_40
|
||||
INT_R.CTRL0.NE6END2 !00_35 00_39 01_33 01_38 01_40
|
||||
INT_R.CTRL0.NN6END2 !01_40 00_35 00_39 01_33 01_38
|
||||
INT_R.CTRL0.NR1END2 !00_35 00_34 00_39 01_38 01_40
|
||||
INT_R.CTRL0.NW6END2 !01_40 00_34 00_35 00_39 01_38
|
||||
INT_R.CTRL0.SE6END2 !00_35 !00_39 !01_40 00_38 01_38
|
||||
INT_R.CTRL0.SR1END2 !00_35 00_38 00_39 01_38 01_40
|
||||
INT_R.CTRL0.SS6END2 !01_40 00_35 00_38 00_39 01_38
|
||||
INT_R.CTRL0.SW6END1 !00_35 !00_39 !01_40 00_34 01_38
|
||||
INT_R.CTRL0.WR1END2 !00_35 !01_38 !01_40 00_34 00_39
|
||||
INT_R.CTRL0.WW4END2 !00_35 !01_38 !01_40 00_39 01_33
|
||||
INT_R.CTRL1.BYP_BOUNCE4 !00_37 !01_36 !01_41 00_42 01_32
|
||||
INT_R.CTRL1.EE4END2 !00_37 !00_42 !01_36 00_41 01_41
|
||||
INT_R.CTRL1.ER1END2 !00_37 !01_36 !01_41 00_33 00_42
|
||||
INT_R.CTRL1.FAN_BOUNCE1 !00_37 !00_42 !01_36 01_32 01_41
|
||||
INT_R.CTRL1.GFAN0 !00_37 00_42 01_32 01_36 01_41
|
||||
INT_R.CTRL1.GFAN1 !01_36 00_37 00_42 01_32 01_41
|
||||
INT_R.CTRL1.NE6END2 !01_36 00_33 00_37 00_42 01_41
|
||||
INT_R.CTRL1.NN6END2 !00_37 00_33 00_42 01_36 01_41
|
||||
INT_R.CTRL1.NR1END2 !01_36 00_37 00_42 01_34 01_41
|
||||
INT_R.CTRL1.NW6END2 !00_37 00_42 01_34 01_36 01_41
|
||||
INT_R.CTRL1.SE6END2 !00_37 !01_36 !01_41 00_41 00_42
|
||||
INT_R.CTRL1.SR1END2 !01_36 00_37 00_41 00_42 01_41
|
||||
INT_R.CTRL1.SS6END2 !00_37 00_41 00_42 01_36 01_41
|
||||
INT_R.CTRL1.SW6END1 !00_37 !01_36 !01_41 00_42 01_34
|
||||
INT_R.CTRL1.WR1END2 !00_37 !00_42 !01_36 01_34 01_41
|
||||
INT_R.CTRL1.WW4END2 !00_37 !00_42 !01_36 00_33 01_41
|
||||
INT_R.EE2BEG0.EE2END0 11_06 14_06
|
||||
INT_R.EE2BEG0.EE4END0 11_06 13_06
|
||||
INT_R.EE2BEG0.EL1END0 09_06 12_06
|
||||
|
|
@ -692,6 +756,36 @@ INT_R.FAN_ALT7.SW2END1 !22_32 !23_32 !25_32 17_32 24_32
|
|||
INT_R.FAN_ALT7.WL1END1 !22_32 16_32 23_32 24_32 25_32
|
||||
INT_R.FAN_ALT7.WR1END2 !23_32 17_32 22_32 24_32 25_32
|
||||
INT_R.FAN_ALT7.WW2END1 !22_32 !23_32 !24_32 16_32 25_32
|
||||
INT_R.GFAN0.BYP_BOUNCE1 !01_09 00_10 00_11 01_10 01_14
|
||||
INT_R.GFAN0.GCLK_B0_EAST !01_09 00_10 00_11 01_10 01_12
|
||||
INT_R.GFAN0.GCLK_B10 !00_10 !00_11 !01_09 01_10 01_16
|
||||
INT_R.GFAN0.GCLK_B11 !00_10 !01_09 !01_10 00_11 01_16
|
||||
INT_R.GFAN0.GCLK_B1_EAST !00_10 00_11 01_09 01_10 01_12
|
||||
INT_R.GFAN0.GCLK_B2_EAST !00_10 !00_11 !01_09 01_10 01_12
|
||||
INT_R.GFAN0.GCLK_B3_EAST !00_10 !01_09 !01_10 00_11 01_12
|
||||
INT_R.GFAN0.GCLK_B4_EAST !01_09 00_10 00_11 01_10 01_18
|
||||
INT_R.GFAN0.GCLK_B5_EAST !00_10 00_11 01_09 01_10 01_18
|
||||
INT_R.GFAN0.GCLK_B6 !00_10 !00_11 !01_09 01_10 01_18
|
||||
INT_R.GFAN0.GCLK_B7 !00_10 !01_09 !01_10 00_11 01_18
|
||||
INT_R.GFAN0.GCLK_B8 !01_09 00_10 00_11 01_10 01_16
|
||||
INT_R.GFAN0.GCLK_B9 !00_10 00_11 01_09 01_10 01_16
|
||||
INT_R.GFAN0.NR1END1 !00_10 00_11 01_09 01_10 01_14
|
||||
INT_R.GFAN0.WW4END1 !00_10 !00_11 !01_09 01_10 01_14
|
||||
INT_R.GFAN1.BYP_BOUNCE1 !00_19 00_14 00_17 00_18 01_13
|
||||
INT_R.GFAN1.GCLK_B0_EAST !00_19 00_13 00_14 00_18 01_13
|
||||
INT_R.GFAN1.GCLK_B10 !00_18 !00_19 !01_13 00_14 01_17
|
||||
INT_R.GFAN1.GCLK_B11 !00_14 !00_18 !00_19 01_13 01_17
|
||||
INT_R.GFAN1.GCLK_B1_EAST !00_18 00_13 00_14 00_19 01_13
|
||||
INT_R.GFAN1.GCLK_B2_EAST !00_18 !00_19 !01_13 00_13 00_14
|
||||
INT_R.GFAN1.GCLK_B3_EAST !00_14 !00_18 !00_19 00_13 01_13
|
||||
INT_R.GFAN1.GCLK_B4_EAST !00_19 00_14 00_15 00_18 01_13
|
||||
INT_R.GFAN1.GCLK_B5_EAST !00_18 00_14 00_15 00_19 01_13
|
||||
INT_R.GFAN1.GCLK_B6 !00_18 !00_19 !01_13 00_14 00_15
|
||||
INT_R.GFAN1.GCLK_B7 !00_14 !00_18 !00_19 00_15 01_13
|
||||
INT_R.GFAN1.GCLK_B8 !00_19 00_14 00_18 01_13 01_17
|
||||
INT_R.GFAN1.GCLK_B9 !00_18 00_14 00_19 01_13 01_17
|
||||
INT_R.GFAN1.NR1END1 !00_18 00_14 00_17 00_19 01_13
|
||||
INT_R.GFAN1.WW4END1 !00_18 !00_19 !01_13 00_14 00_17
|
||||
INT_R.IMUX0.BYP_BOUNCE_N3_2 !22_01 !23_01 !24_01 21_01 25_01
|
||||
INT_R.IMUX0.BYP_BOUNCE_N3_6 !22_01 !23_01 !25_01 21_01 24_01
|
||||
INT_R.IMUX0.EE2END0 !22_01 !23_01 !25_01 17_01 24_01
|
||||
|
|
@ -1036,6 +1130,7 @@ INT_R.IMUX21.ER1END2 !22_43 16_43 23_43 24_43 25_43
|
|||
INT_R.IMUX21.FAN_BOUNCE3 !23_43 21_43 22_43 24_43 25_43
|
||||
INT_R.IMUX21.FAN_BOUNCE_S3_4 !22_43 21_43 23_43 24_43 25_43
|
||||
INT_R.IMUX21.GFAN1 !22_43 !23_43 !25_43 20_43 24_43
|
||||
INT_R.IMUX21.LOGIC_OUTS10 !23_43 20_43 22_43 24_43 25_43
|
||||
INT_R.IMUX21.LOGIC_OUTS16 !22_43 !23_43 !24_43 20_43 25_43
|
||||
INT_R.IMUX21.LOGIC_OUTS6 !22_43 20_43 23_43 24_43 25_43
|
||||
INT_R.IMUX21.NE2END2 !22_43 !23_43 !24_43 18_42 25_43
|
||||
|
|
@ -1157,6 +1252,7 @@ INT_R.IMUX26.FAN_BOUNCE7 !23_20 20_20 22_20 24_20 25_20
|
|||
INT_R.IMUX26.GFAN0 !22_20 !23_20 !24_20 21_20 25_20
|
||||
INT_R.IMUX26.LOGIC_OUTS19 !22_20 !23_20 !25_20 21_20 24_20
|
||||
INT_R.IMUX26.LOGIC_OUTS5 !23_20 21_20 22_20 24_20 25_20
|
||||
INT_R.IMUX26.LOGIC_OUTS9 !22_20 21_20 23_20 24_20 25_20
|
||||
INT_R.IMUX26.NE2END1 !22_20 !23_20 !25_20 18_21 24_20
|
||||
INT_R.IMUX26.NL1END1 !22_20 19_21 23_20 24_20 25_20
|
||||
INT_R.IMUX26.NN2END1 !22_20 !23_20 !24_20 18_21 25_20
|
||||
|
|
@ -1179,6 +1275,7 @@ INT_R.IMUX27.FAN_BOUNCE3 !22_28 20_28 23_28 24_28 25_28
|
|||
INT_R.IMUX27.FAN_BOUNCE5 !23_28 20_28 22_28 24_28 25_28
|
||||
INT_R.IMUX27.GFAN0 !22_28 !23_28 !24_28 21_28 25_28
|
||||
INT_R.IMUX27.LOGIC_OUTS1 !23_28 21_28 22_28 24_28 25_28
|
||||
INT_R.IMUX27.LOGIC_OUTS13 !22_28 21_28 23_28 24_28 25_28
|
||||
INT_R.IMUX27.LOGIC_OUTS23 !22_28 !23_28 !25_28 21_28 24_28
|
||||
INT_R.IMUX27.NE2END2 !22_28 !23_28 !25_28 19_29 24_28
|
||||
INT_R.IMUX27.NL1END2 !22_28 19_29 23_28 24_28 25_28
|
||||
|
|
@ -1201,6 +1298,7 @@ INT_R.IMUX28.ER1END2 !23_36 18_37 22_36 24_36 25_36
|
|||
INT_R.IMUX28.FAN_BOUNCE1 !22_36 20_36 23_36 24_36 25_36
|
||||
INT_R.IMUX28.FAN_BOUNCE_S3_0 !23_36 20_36 22_36 24_36 25_36
|
||||
INT_R.IMUX28.GFAN1 !22_36 !23_36 !24_36 21_36 25_36
|
||||
INT_R.IMUX28.LOGIC_OUTS14 !22_36 21_36 23_36 24_36 25_36
|
||||
INT_R.IMUX28.LOGIC_OUTS2 !23_36 21_36 22_36 24_36 25_36
|
||||
INT_R.IMUX28.LOGIC_OUTS20 !22_36 !23_36 !25_36 21_36 24_36
|
||||
INT_R.IMUX28.NE2END2 !22_36 !23_36 !25_36 18_37 24_36
|
||||
|
|
@ -1322,6 +1420,7 @@ INT_R.IMUX32.FAN_BOUNCE7 !23_05 21_05 22_05 24_05 25_05
|
|||
INT_R.IMUX32.GFAN0 !22_05 !23_05 !25_05 20_05 24_05
|
||||
INT_R.IMUX32.LOGIC_OUTS0 !22_05 20_05 23_05 24_05 25_05
|
||||
INT_R.IMUX32.LOGIC_OUTS12 !23_05 20_05 22_05 24_05 25_05
|
||||
INT_R.IMUX32.LOGIC_OUTS22 !22_05 !23_05 !24_05 20_05 25_05
|
||||
INT_R.IMUX32.NE2END0 !22_05 !23_05 !24_05 16_05 25_05
|
||||
INT_R.IMUX32.NL1END0 !23_05 17_05 22_05 24_05 25_05
|
||||
INT_R.IMUX32.NN2END0 !22_05 !23_05 !25_05 16_05 24_05
|
||||
|
|
@ -1343,6 +1442,7 @@ INT_R.IMUX33.ER1END0 !22_13 19_12 23_13 24_13 25_13
|
|||
INT_R.IMUX33.FAN_BOUNCE5 !23_13 21_13 22_13 24_13 25_13
|
||||
INT_R.IMUX33.FAN_BOUNCE6 !22_13 21_13 23_13 24_13 25_13
|
||||
INT_R.IMUX33.GFAN0 !22_13 !23_13 !25_13 20_13 24_13
|
||||
INT_R.IMUX33.LOGIC_OUTS18 !22_13 !23_13 !24_13 20_13 25_13
|
||||
INT_R.IMUX33.LOGIC_OUTS4 !22_13 20_13 23_13 24_13 25_13
|
||||
INT_R.IMUX33.LOGIC_OUTS8 !23_13 20_13 22_13 24_13 25_13
|
||||
INT_R.IMUX33.NE2END1 !22_13 !23_13 !24_13 17_13 25_13
|
||||
|
|
@ -1582,6 +1682,7 @@ INT_R.IMUX42.ER1END1 !23_22 19_23 22_22 24_22 25_22
|
|||
INT_R.IMUX42.FAN_BOUNCE1 !22_22 20_22 23_22 24_22 25_22
|
||||
INT_R.IMUX42.FAN_BOUNCE7 !23_22 20_22 22_22 24_22 25_22
|
||||
INT_R.IMUX42.GFAN0 !22_22 !23_22 !24_22 21_22 25_22
|
||||
INT_R.IMUX42.LOGIC_OUTS19 !22_22 !23_22 !25_22 21_22 24_22
|
||||
INT_R.IMUX42.LOGIC_OUTS5 !23_22 21_22 22_22 24_22 25_22
|
||||
INT_R.IMUX42.LOGIC_OUTS9 !22_22 21_22 23_22 24_22 25_22
|
||||
INT_R.IMUX42.NE2END1 !22_22 !23_22 !25_22 17_22 24_22
|
||||
|
|
@ -1607,6 +1708,7 @@ INT_R.IMUX43.FAN_BOUNCE5 !23_30 20_30 22_30 24_30 25_30
|
|||
INT_R.IMUX43.GFAN0 !22_30 !23_30 !24_30 21_30 25_30
|
||||
INT_R.IMUX43.LOGIC_OUTS1 !23_30 21_30 22_30 24_30 25_30
|
||||
INT_R.IMUX43.LOGIC_OUTS13 !22_30 21_30 23_30 24_30 25_30
|
||||
INT_R.IMUX43.LOGIC_OUTS23 !22_30 !23_30 !25_30 21_30 24_30
|
||||
INT_R.IMUX43.NE2END2 !22_30 !23_30 !25_30 18_31 24_30
|
||||
INT_R.IMUX43.NL1END2 !22_30 16_30 23_30 24_30 25_30
|
||||
INT_R.IMUX43.NN2END2 !22_30 !23_30 !24_30 18_31 25_30
|
||||
|
|
@ -1676,6 +1778,7 @@ INT_R.IMUX46.ER1END3 !23_54 19_55 22_54 24_54 25_54
|
|||
INT_R.IMUX46.FAN_BOUNCE_S3_0 !22_54 20_54 23_54 24_54 25_54
|
||||
INT_R.IMUX46.FAN_BOUNCE_S3_2 !23_54 20_54 22_54 24_54 25_54
|
||||
INT_R.IMUX46.GFAN1 !22_54 !23_54 !24_54 21_54 25_54
|
||||
INT_R.IMUX46.LOGIC_OUTS11 !22_54 21_54 23_54 24_54 25_54
|
||||
INT_R.IMUX46.LOGIC_OUTS17 !22_54 !23_54 !25_54 21_54 24_54
|
||||
INT_R.IMUX46.LOGIC_OUTS7 !23_54 21_54 22_54 24_54 25_54
|
||||
INT_R.IMUX46.NE2END3 !22_54 !23_54 !25_54 17_54 24_54
|
||||
|
|
@ -1699,6 +1802,7 @@ INT_R.IMUX47.ER1END3 !23_62 18_63 22_62 24_62 25_62
|
|||
INT_R.IMUX47.FAN_BOUNCE_S3_4 !22_62 20_62 23_62 24_62 25_62
|
||||
INT_R.IMUX47.FAN_BOUNCE_S3_6 !23_62 20_62 22_62 24_62 25_62
|
||||
INT_R.IMUX47.GFAN1 !22_62 !23_62 !24_62 21_62 25_62
|
||||
INT_R.IMUX47.LOGIC_OUTS15 !22_62 21_62 23_62 24_62 25_62
|
||||
INT_R.IMUX47.LOGIC_OUTS21 !22_62 !23_62 !25_62 21_62 24_62
|
||||
INT_R.IMUX47.LOGIC_OUTS3 !23_62 21_62 22_62 24_62 25_62
|
||||
INT_R.IMUX47.NE2END_S3_0 !22_62 !23_62 !25_62 18_63 24_62
|
||||
|
|
@ -1723,6 +1827,7 @@ INT_R.IMUX5.FAN_BOUNCE3 !23_41 21_41 22_41 24_41 25_41
|
|||
INT_R.IMUX5.FAN_BOUNCE_S3_4 !22_41 21_41 23_41 24_41 25_41
|
||||
INT_R.IMUX5.GFAN1 !22_41 !23_41 !25_41 20_41 24_41
|
||||
INT_R.IMUX5.LOGIC_OUTS10 !23_41 20_41 22_41 24_41 25_41
|
||||
INT_R.IMUX5.LOGIC_OUTS16 !22_41 !23_41 !24_41 20_41 25_41
|
||||
INT_R.IMUX5.LOGIC_OUTS6 !22_41 20_41 23_41 24_41 25_41
|
||||
INT_R.IMUX5.NE2END2 !22_41 !23_41 !24_41 19_40 25_41
|
||||
INT_R.IMUX5.NL1BEG_N3 !23_41 17_41 22_41 24_41 25_41
|
||||
|
|
@ -1794,6 +1899,7 @@ INT_R.IMUX8.FAN_BOUNCE2 !23_02 20_02 22_02 24_02 25_02
|
|||
INT_R.IMUX8.FAN_BOUNCE7 !22_02 20_02 23_02 24_02 25_02
|
||||
INT_R.IMUX8.GFAN0 !22_02 !23_02 !24_02 21_02 25_02
|
||||
INT_R.IMUX8.LOGIC_OUTS0 !23_02 21_02 22_02 24_02 25_02
|
||||
INT_R.IMUX8.LOGIC_OUTS12 !22_02 21_02 23_02 24_02 25_02
|
||||
INT_R.IMUX8.LOGIC_OUTS22 !22_02 !23_02 !25_02 21_02 24_02
|
||||
INT_R.IMUX8.NE2END0 !22_02 !23_02 !25_02 17_02 24_02
|
||||
INT_R.IMUX8.NL1END0 !22_02 16_02 23_02 24_02 25_02
|
||||
|
|
@ -1818,6 +1924,7 @@ INT_R.IMUX9.FAN_BOUNCE6 !23_10 20_10 22_10 24_10 25_10
|
|||
INT_R.IMUX9.GFAN0 !22_10 !23_10 !24_10 21_10 25_10
|
||||
INT_R.IMUX9.LOGIC_OUTS18 !22_10 !23_10 !25_10 21_10 24_10
|
||||
INT_R.IMUX9.LOGIC_OUTS4 !23_10 21_10 22_10 24_10 25_10
|
||||
INT_R.IMUX9.LOGIC_OUTS8 !22_10 21_10 23_10 24_10 25_10
|
||||
INT_R.IMUX9.NE2END0 !22_10 !23_10 !25_10 16_10 24_10
|
||||
INT_R.IMUX9.NL1END1 !22_10 16_10 23_10 24_10 25_10
|
||||
INT_R.IMUX9.NN2END0 !22_10 !23_10 !24_10 16_10 25_10
|
||||
|
|
|
|||
|
|
@ -12,7 +12,7 @@
|
|||
"INT_L_X6Y50"
|
||||
],
|
||||
"type": "bram0_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM0_L_X6Y55": {
|
||||
"baseaddr": [
|
||||
|
|
@ -26,7 +26,7 @@
|
|||
"INT_L_X6Y55"
|
||||
],
|
||||
"type": "bram0_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM0_L_X6Y60": {
|
||||
"baseaddr": [
|
||||
|
|
@ -40,7 +40,7 @@
|
|||
"INT_L_X6Y60"
|
||||
],
|
||||
"type": "bram0_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM0_L_X6Y65": {
|
||||
"baseaddr": [
|
||||
|
|
@ -54,7 +54,7 @@
|
|||
"INT_L_X6Y65"
|
||||
],
|
||||
"type": "bram0_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM0_L_X6Y70": {
|
||||
"baseaddr": [
|
||||
|
|
@ -68,7 +68,7 @@
|
|||
"INT_L_X6Y70"
|
||||
],
|
||||
"type": "bram0_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM0_L_X6Y75": {
|
||||
"baseaddr": [
|
||||
|
|
@ -82,7 +82,7 @@
|
|||
"INT_L_X6Y75"
|
||||
],
|
||||
"type": "bram0_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM0_L_X6Y80": {
|
||||
"baseaddr": [
|
||||
|
|
@ -96,7 +96,7 @@
|
|||
"INT_L_X6Y80"
|
||||
],
|
||||
"type": "bram0_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM0_L_X6Y85": {
|
||||
"baseaddr": [
|
||||
|
|
@ -110,7 +110,7 @@
|
|||
"INT_L_X6Y85"
|
||||
],
|
||||
"type": "bram0_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM0_L_X6Y90": {
|
||||
"baseaddr": [
|
||||
|
|
@ -124,7 +124,7 @@
|
|||
"INT_L_X6Y90"
|
||||
],
|
||||
"type": "bram0_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM0_L_X6Y95": {
|
||||
"baseaddr": [
|
||||
|
|
@ -138,7 +138,7 @@
|
|||
"INT_L_X6Y95"
|
||||
],
|
||||
"type": "bram0_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM1_L_X6Y50": {
|
||||
"baseaddr": [
|
||||
|
|
@ -151,7 +151,7 @@
|
|||
"INT_L_X6Y51"
|
||||
],
|
||||
"type": "bram1_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM1_L_X6Y55": {
|
||||
"baseaddr": [
|
||||
|
|
@ -164,7 +164,7 @@
|
|||
"INT_L_X6Y56"
|
||||
],
|
||||
"type": "bram1_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM1_L_X6Y60": {
|
||||
"baseaddr": [
|
||||
|
|
@ -177,7 +177,7 @@
|
|||
"INT_L_X6Y61"
|
||||
],
|
||||
"type": "bram1_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM1_L_X6Y65": {
|
||||
"baseaddr": [
|
||||
|
|
@ -190,7 +190,7 @@
|
|||
"INT_L_X6Y66"
|
||||
],
|
||||
"type": "bram1_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM1_L_X6Y70": {
|
||||
"baseaddr": [
|
||||
|
|
@ -203,7 +203,7 @@
|
|||
"INT_L_X6Y71"
|
||||
],
|
||||
"type": "bram1_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM1_L_X6Y75": {
|
||||
"baseaddr": [
|
||||
|
|
@ -216,7 +216,7 @@
|
|||
"INT_L_X6Y76"
|
||||
],
|
||||
"type": "bram1_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM1_L_X6Y80": {
|
||||
"baseaddr": [
|
||||
|
|
@ -229,7 +229,7 @@
|
|||
"INT_L_X6Y81"
|
||||
],
|
||||
"type": "bram1_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM1_L_X6Y85": {
|
||||
"baseaddr": [
|
||||
|
|
@ -242,7 +242,7 @@
|
|||
"INT_L_X6Y86"
|
||||
],
|
||||
"type": "bram1_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM1_L_X6Y90": {
|
||||
"baseaddr": [
|
||||
|
|
@ -255,7 +255,7 @@
|
|||
"INT_L_X6Y91"
|
||||
],
|
||||
"type": "bram1_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM1_L_X6Y95": {
|
||||
"baseaddr": [
|
||||
|
|
@ -268,7 +268,7 @@
|
|||
"INT_L_X6Y96"
|
||||
],
|
||||
"type": "bram1_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM2_L_X6Y50": {
|
||||
"baseaddr": [
|
||||
|
|
@ -281,7 +281,7 @@
|
|||
"INT_L_X6Y52"
|
||||
],
|
||||
"type": "bram2_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM2_L_X6Y55": {
|
||||
"baseaddr": [
|
||||
|
|
@ -294,7 +294,7 @@
|
|||
"INT_L_X6Y57"
|
||||
],
|
||||
"type": "bram2_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM2_L_X6Y60": {
|
||||
"baseaddr": [
|
||||
|
|
@ -307,7 +307,7 @@
|
|||
"INT_L_X6Y62"
|
||||
],
|
||||
"type": "bram2_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM2_L_X6Y65": {
|
||||
"baseaddr": [
|
||||
|
|
@ -320,7 +320,7 @@
|
|||
"INT_L_X6Y67"
|
||||
],
|
||||
"type": "bram2_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM2_L_X6Y70": {
|
||||
"baseaddr": [
|
||||
|
|
@ -333,7 +333,7 @@
|
|||
"INT_L_X6Y72"
|
||||
],
|
||||
"type": "bram2_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM2_L_X6Y75": {
|
||||
"baseaddr": [
|
||||
|
|
@ -346,7 +346,7 @@
|
|||
"INT_L_X6Y77"
|
||||
],
|
||||
"type": "bram2_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM2_L_X6Y80": {
|
||||
"baseaddr": [
|
||||
|
|
@ -359,7 +359,7 @@
|
|||
"INT_L_X6Y82"
|
||||
],
|
||||
"type": "bram2_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM2_L_X6Y85": {
|
||||
"baseaddr": [
|
||||
|
|
@ -372,7 +372,7 @@
|
|||
"INT_L_X6Y87"
|
||||
],
|
||||
"type": "bram2_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM2_L_X6Y90": {
|
||||
"baseaddr": [
|
||||
|
|
@ -385,7 +385,7 @@
|
|||
"INT_L_X6Y92"
|
||||
],
|
||||
"type": "bram2_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM2_L_X6Y95": {
|
||||
"baseaddr": [
|
||||
|
|
@ -398,7 +398,7 @@
|
|||
"INT_L_X6Y97"
|
||||
],
|
||||
"type": "bram2_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM3_L_X6Y50": {
|
||||
"baseaddr": [
|
||||
|
|
@ -411,7 +411,7 @@
|
|||
"INT_L_X6Y53"
|
||||
],
|
||||
"type": "bram3_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM3_L_X6Y55": {
|
||||
"baseaddr": [
|
||||
|
|
@ -424,7 +424,7 @@
|
|||
"INT_L_X6Y58"
|
||||
],
|
||||
"type": "bram3_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM3_L_X6Y60": {
|
||||
"baseaddr": [
|
||||
|
|
@ -437,7 +437,7 @@
|
|||
"INT_L_X6Y63"
|
||||
],
|
||||
"type": "bram3_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM3_L_X6Y65": {
|
||||
"baseaddr": [
|
||||
|
|
@ -450,7 +450,7 @@
|
|||
"INT_L_X6Y68"
|
||||
],
|
||||
"type": "bram3_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM3_L_X6Y70": {
|
||||
"baseaddr": [
|
||||
|
|
@ -463,7 +463,7 @@
|
|||
"INT_L_X6Y73"
|
||||
],
|
||||
"type": "bram3_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM3_L_X6Y75": {
|
||||
"baseaddr": [
|
||||
|
|
@ -476,7 +476,7 @@
|
|||
"INT_L_X6Y78"
|
||||
],
|
||||
"type": "bram3_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM3_L_X6Y80": {
|
||||
"baseaddr": [
|
||||
|
|
@ -489,7 +489,7 @@
|
|||
"INT_L_X6Y83"
|
||||
],
|
||||
"type": "bram3_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM3_L_X6Y85": {
|
||||
"baseaddr": [
|
||||
|
|
@ -502,7 +502,7 @@
|
|||
"INT_L_X6Y88"
|
||||
],
|
||||
"type": "bram3_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM3_L_X6Y90": {
|
||||
"baseaddr": [
|
||||
|
|
@ -515,7 +515,7 @@
|
|||
"INT_L_X6Y93"
|
||||
],
|
||||
"type": "bram3_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM3_L_X6Y95": {
|
||||
"baseaddr": [
|
||||
|
|
@ -528,7 +528,7 @@
|
|||
"INT_L_X6Y98"
|
||||
],
|
||||
"type": "bram3_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM4_L_X6Y50": {
|
||||
"baseaddr": [
|
||||
|
|
@ -541,7 +541,7 @@
|
|||
"INT_L_X6Y54"
|
||||
],
|
||||
"type": "bram4_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM4_L_X6Y55": {
|
||||
"baseaddr": [
|
||||
|
|
@ -554,7 +554,7 @@
|
|||
"INT_L_X6Y59"
|
||||
],
|
||||
"type": "bram4_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM4_L_X6Y60": {
|
||||
"baseaddr": [
|
||||
|
|
@ -567,7 +567,7 @@
|
|||
"INT_L_X6Y64"
|
||||
],
|
||||
"type": "bram4_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM4_L_X6Y65": {
|
||||
"baseaddr": [
|
||||
|
|
@ -580,7 +580,7 @@
|
|||
"INT_L_X6Y69"
|
||||
],
|
||||
"type": "bram4_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM4_L_X6Y70": {
|
||||
"baseaddr": [
|
||||
|
|
@ -593,7 +593,7 @@
|
|||
"INT_L_X6Y74"
|
||||
],
|
||||
"type": "bram4_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM4_L_X6Y75": {
|
||||
"baseaddr": [
|
||||
|
|
@ -606,7 +606,7 @@
|
|||
"INT_L_X6Y79"
|
||||
],
|
||||
"type": "bram4_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM4_L_X6Y80": {
|
||||
"baseaddr": [
|
||||
|
|
@ -619,7 +619,7 @@
|
|||
"INT_L_X6Y84"
|
||||
],
|
||||
"type": "bram4_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM4_L_X6Y85": {
|
||||
"baseaddr": [
|
||||
|
|
@ -632,7 +632,7 @@
|
|||
"INT_L_X6Y89"
|
||||
],
|
||||
"type": "bram4_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM4_L_X6Y90": {
|
||||
"baseaddr": [
|
||||
|
|
@ -645,7 +645,7 @@
|
|||
"INT_L_X6Y94"
|
||||
],
|
||||
"type": "bram4_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_BRAM4_L_X6Y95": {
|
||||
"baseaddr": [
|
||||
|
|
@ -658,7 +658,7 @@
|
|||
"INT_L_X6Y99"
|
||||
],
|
||||
"type": "bram4_l",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_CLBLL_L_X2Y50": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7172,7 +7172,7 @@
|
|||
"INT_R_X9Y50"
|
||||
],
|
||||
"type": "dsp0_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP0_R_X9Y55": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7186,7 +7186,7 @@
|
|||
"INT_R_X9Y55"
|
||||
],
|
||||
"type": "dsp0_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP0_R_X9Y60": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7200,7 +7200,7 @@
|
|||
"INT_R_X9Y60"
|
||||
],
|
||||
"type": "dsp0_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP0_R_X9Y65": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7214,7 +7214,7 @@
|
|||
"INT_R_X9Y65"
|
||||
],
|
||||
"type": "dsp0_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP0_R_X9Y70": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7228,7 +7228,7 @@
|
|||
"INT_R_X9Y70"
|
||||
],
|
||||
"type": "dsp0_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP0_R_X9Y75": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7242,7 +7242,7 @@
|
|||
"INT_R_X9Y75"
|
||||
],
|
||||
"type": "dsp0_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP0_R_X9Y80": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7256,7 +7256,7 @@
|
|||
"INT_R_X9Y80"
|
||||
],
|
||||
"type": "dsp0_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP0_R_X9Y85": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7270,7 +7270,7 @@
|
|||
"INT_R_X9Y85"
|
||||
],
|
||||
"type": "dsp0_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP0_R_X9Y90": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7284,7 +7284,7 @@
|
|||
"INT_R_X9Y90"
|
||||
],
|
||||
"type": "dsp0_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP0_R_X9Y95": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7298,7 +7298,7 @@
|
|||
"INT_R_X9Y95"
|
||||
],
|
||||
"type": "dsp0_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP1_R_X9Y50": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7311,7 +7311,7 @@
|
|||
"INT_R_X9Y51"
|
||||
],
|
||||
"type": "dsp1_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP1_R_X9Y55": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7324,7 +7324,7 @@
|
|||
"INT_R_X9Y56"
|
||||
],
|
||||
"type": "dsp1_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP1_R_X9Y60": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7337,7 +7337,7 @@
|
|||
"INT_R_X9Y61"
|
||||
],
|
||||
"type": "dsp1_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP1_R_X9Y65": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7350,7 +7350,7 @@
|
|||
"INT_R_X9Y66"
|
||||
],
|
||||
"type": "dsp1_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP1_R_X9Y70": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7363,7 +7363,7 @@
|
|||
"INT_R_X9Y71"
|
||||
],
|
||||
"type": "dsp1_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP1_R_X9Y75": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7376,7 +7376,7 @@
|
|||
"INT_R_X9Y76"
|
||||
],
|
||||
"type": "dsp1_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP1_R_X9Y80": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7389,7 +7389,7 @@
|
|||
"INT_R_X9Y81"
|
||||
],
|
||||
"type": "dsp1_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP1_R_X9Y85": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7402,7 +7402,7 @@
|
|||
"INT_R_X9Y86"
|
||||
],
|
||||
"type": "dsp1_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP1_R_X9Y90": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7415,7 +7415,7 @@
|
|||
"INT_R_X9Y91"
|
||||
],
|
||||
"type": "dsp1_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP1_R_X9Y95": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7428,7 +7428,7 @@
|
|||
"INT_R_X9Y96"
|
||||
],
|
||||
"type": "dsp1_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP2_R_X9Y50": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7441,7 +7441,7 @@
|
|||
"INT_R_X9Y52"
|
||||
],
|
||||
"type": "dsp2_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP2_R_X9Y55": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7454,7 +7454,7 @@
|
|||
"INT_R_X9Y57"
|
||||
],
|
||||
"type": "dsp2_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP2_R_X9Y60": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7467,7 +7467,7 @@
|
|||
"INT_R_X9Y62"
|
||||
],
|
||||
"type": "dsp2_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP2_R_X9Y65": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7480,7 +7480,7 @@
|
|||
"INT_R_X9Y67"
|
||||
],
|
||||
"type": "dsp2_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP2_R_X9Y70": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7493,7 +7493,7 @@
|
|||
"INT_R_X9Y72"
|
||||
],
|
||||
"type": "dsp2_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP2_R_X9Y75": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7506,7 +7506,7 @@
|
|||
"INT_R_X9Y77"
|
||||
],
|
||||
"type": "dsp2_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP2_R_X9Y80": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7519,7 +7519,7 @@
|
|||
"INT_R_X9Y82"
|
||||
],
|
||||
"type": "dsp2_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP2_R_X9Y85": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7532,7 +7532,7 @@
|
|||
"INT_R_X9Y87"
|
||||
],
|
||||
"type": "dsp2_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP2_R_X9Y90": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7545,7 +7545,7 @@
|
|||
"INT_R_X9Y92"
|
||||
],
|
||||
"type": "dsp2_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP2_R_X9Y95": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7558,7 +7558,7 @@
|
|||
"INT_R_X9Y97"
|
||||
],
|
||||
"type": "dsp2_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP3_R_X9Y50": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7571,7 +7571,7 @@
|
|||
"INT_R_X9Y53"
|
||||
],
|
||||
"type": "dsp3_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP3_R_X9Y55": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7584,7 +7584,7 @@
|
|||
"INT_R_X9Y58"
|
||||
],
|
||||
"type": "dsp3_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP3_R_X9Y60": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7597,7 +7597,7 @@
|
|||
"INT_R_X9Y63"
|
||||
],
|
||||
"type": "dsp3_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP3_R_X9Y65": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7610,7 +7610,7 @@
|
|||
"INT_R_X9Y68"
|
||||
],
|
||||
"type": "dsp3_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP3_R_X9Y70": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7623,7 +7623,7 @@
|
|||
"INT_R_X9Y73"
|
||||
],
|
||||
"type": "dsp3_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP3_R_X9Y75": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7636,7 +7636,7 @@
|
|||
"INT_R_X9Y78"
|
||||
],
|
||||
"type": "dsp3_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP3_R_X9Y80": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7649,7 +7649,7 @@
|
|||
"INT_R_X9Y83"
|
||||
],
|
||||
"type": "dsp3_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP3_R_X9Y85": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7662,7 +7662,7 @@
|
|||
"INT_R_X9Y88"
|
||||
],
|
||||
"type": "dsp3_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP3_R_X9Y90": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7675,7 +7675,7 @@
|
|||
"INT_R_X9Y93"
|
||||
],
|
||||
"type": "dsp3_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP3_R_X9Y95": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7688,7 +7688,7 @@
|
|||
"INT_R_X9Y98"
|
||||
],
|
||||
"type": "dsp3_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP4_R_X9Y50": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7701,7 +7701,7 @@
|
|||
"INT_R_X9Y54"
|
||||
],
|
||||
"type": "dsp4_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP4_R_X9Y55": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7714,7 +7714,7 @@
|
|||
"INT_R_X9Y59"
|
||||
],
|
||||
"type": "dsp4_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP4_R_X9Y60": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7727,7 +7727,7 @@
|
|||
"INT_R_X9Y64"
|
||||
],
|
||||
"type": "dsp4_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP4_R_X9Y65": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7740,7 +7740,7 @@
|
|||
"INT_R_X9Y69"
|
||||
],
|
||||
"type": "dsp4_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP4_R_X9Y70": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7753,7 +7753,7 @@
|
|||
"INT_R_X9Y74"
|
||||
],
|
||||
"type": "dsp4_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP4_R_X9Y75": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7766,7 +7766,7 @@
|
|||
"INT_R_X9Y79"
|
||||
],
|
||||
"type": "dsp4_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP4_R_X9Y80": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7779,7 +7779,7 @@
|
|||
"INT_R_X9Y84"
|
||||
],
|
||||
"type": "dsp4_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP4_R_X9Y85": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7792,7 +7792,7 @@
|
|||
"INT_R_X9Y89"
|
||||
],
|
||||
"type": "dsp4_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP4_R_X9Y90": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7805,7 +7805,7 @@
|
|||
"INT_R_X9Y94"
|
||||
],
|
||||
"type": "dsp4_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_DSP4_R_X9Y95": {
|
||||
"baseaddr": [
|
||||
|
|
@ -7818,7 +7818,7 @@
|
|||
"INT_R_X9Y99"
|
||||
],
|
||||
"type": "dsp4_r",
|
||||
"words": 1
|
||||
"words": 2
|
||||
},
|
||||
"SEG_HCLK_L_X11Y78": {
|
||||
"baseaddr": [
|
||||
|
|
|
|||
Loading…
Reference in New Issue