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prjxray-db
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Updating info based on "Merge pull request #715 from litghost/fix_pip_list". 

See [Info File](Info.md) for details.

Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
This commit is contained in:
Tim 'mithro' Ansell 2019-03-13 01:29:21 +00:00
parent f4f2ad3a3c
commit 69fa7e6538
8 changed files with 4675 additions and 721 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

34
Info.md
View File

@ -37,20 +37,20 @@ These files are released under the very permissive [CC0 1.0 Universal](COPYING).
# Details
Last updated on Sat Mar 2 00:01:19 UTC 2019 (2019-03-02T00:01:19+00:00).
Last updated on Wed Mar 13 01:29:20 UTC 2019 (2019-03-13T01:29:20+00:00).
Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [e2dc1f5](https://github.com/SymbiFlow/prjxray/commit/e2dc1f56f6ddf085d3e30e28d5f88ff222d09a4c).
Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [45a8af8](https://github.com/SymbiFlow/prjxray/commit/45a8af8d71c285e7115112c564e5d46b6c81dd97).
Latest commit was;
```
commit e2dc1f56f6ddf085d3e30e28d5f88ff222d09a4c
Merge: d3da948 49b09b4
commit 45a8af8d71c285e7115112c564e5d46b6c81dd97
Merge: 2389645 1f53d57
Author: litghost <537074+litghost@users.noreply.github.com>
Date: Fri Mar 1 15:03:18 2019 -0800
Date: Tue Mar 12 13:43:29 2019 -0700
Merge pull request #687 from litghost/fix_bram_regression
Merge pull request #715 from litghost/fix_pip_list
Only tag some tags when running in TDP mode.
Fix 048 not using correct directory.
```
@ -59,7 +59,7 @@ Date: Fri Mar 1 15:03:18 2019 -0800
### Settings
Created using following [settings/artix7.sh (sha256: 632f87003df3388761e7f843432ae7cb2eaedeba95245503a09279ef9452db9d)](https://github.com/SymbiFlow/prjxray/blob/e2dc1f56f6ddf085d3e30e28d5f88ff222d09a4c/settings/artix7.sh)
Created using following [settings/artix7.sh (sha256: 26e1ff93657132928a3b583c95347267d7afeb18a7b7036f0d7a6ea3367ae803)](https://github.com/SymbiFlow/prjxray/blob/45a8af8d71c285e7115112c564e5d46b6c81dd97/settings/artix7.sh)
```shell
export XRAY_DATABASE="artix7"
export XRAY_PART="xc7a50tfgg484-1"
@ -76,7 +76,7 @@ export XRAY_ROI_GRID_X1="10"
export XRAY_ROI_GRID_X2="58"
# Include VBRK / VTERM
export XRAY_ROI_GRID_Y1="0"
export XRAY_ROI_GRID_Y2="52"
export XRAY_ROI_GRID_Y2="51"
export XRAY_PIN_00="E22"
export XRAY_PIN_01="D22"
@ -117,15 +117,17 @@ Results have checksums;
* [`4f37a37c925f92956b6fc010034529a4cc37698ecb7dd263a0fe737ad600cde7 ./artix7/mask_clbll_r.db`](./artix7/mask_clbll_r.db)
* [`5c274320294201935a3edccb43eca8e347ca1f0acded71ec388c794877d4b55b ./artix7/mask_clblm_l.db`](./artix7/mask_clblm_l.db)
* [`5c274320294201935a3edccb43eca8e347ca1f0acded71ec388c794877d4b55b ./artix7/mask_clblm_r.db`](./artix7/mask_clblm_r.db)
* [`b38bd0228c8e9dbe2e7523f7e5eed08051f93c5cd1da67bebc1ab055769c452b ./artix7/mask_clk_bufg_bot_r.db`](./artix7/mask_clk_bufg_bot_r.db)
* [`1cde0386fe583e82edd1f07590271a33fc794e7fe469ca81f8f0c5f749545b0c ./artix7/mask_clk_bufg_bot_r.db`](./artix7/mask_clk_bufg_bot_r.db)
* [`fab582dba708b87f84b7d493cfc738317201a90cdf73a438a753f7512eee7dea ./artix7/mask_clk_bufg_rebuf.db`](./artix7/mask_clk_bufg_rebuf.db)
* [`b38bd0228c8e9dbe2e7523f7e5eed08051f93c5cd1da67bebc1ab055769c452b ./artix7/mask_clk_bufg_top_r.db`](./artix7/mask_clk_bufg_top_r.db)
* [`1cde0386fe583e82edd1f07590271a33fc794e7fe469ca81f8f0c5f749545b0c ./artix7/mask_clk_bufg_top_r.db`](./artix7/mask_clk_bufg_top_r.db)
* [`26d239696939420f8dede45a66bf68b6b555a423350a5e82de34ba421e5a0c2e ./artix7/mask_clk_hrow_bot_r.db`](./artix7/mask_clk_hrow_bot_r.db)
* [`26d239696939420f8dede45a66bf68b6b555a423350a5e82de34ba421e5a0c2e ./artix7/mask_clk_hrow_top_r.db`](./artix7/mask_clk_hrow_top_r.db)
* [`aab2e5f20890d805b6a78db6e6fd68d6024a140ac5e960feb4162d7e49582ca8 ./artix7/mask_dsp_l.db`](./artix7/mask_dsp_l.db)
* [`aab2e5f20890d805b6a78db6e6fd68d6024a140ac5e960feb4162d7e49582ca8 ./artix7/mask_dsp_r.db`](./artix7/mask_dsp_r.db)
* [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd ./artix7/mask_hclk_l.db`](./artix7/mask_hclk_l.db)
* [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd ./artix7/mask_hclk_r.db`](./artix7/mask_hclk_r.db)
* [`2e2903784928e691e260cf453f1d1949d74634c6461c8e00f9b501041eaaec9e ./artix7/mask_liob33.db`](./artix7/mask_liob33.db)
* [`2e2903784928e691e260cf453f1d1949d74634c6461c8e00f9b501041eaaec9e ./artix7/mask_riob33.db`](./artix7/mask_riob33.db)
* [`d94e4d13df16da498224f0e94deaa310fbf471b6f9ec0ec8b2308fe62fa2eeaf ./artix7/ppips_bram_int_interface_l.db`](./artix7/ppips_bram_int_interface_l.db)
* [`b48d766ac6f9dd0e21280d3a04dd448ea39016143309c0c7867fc00d730a59ae ./artix7/ppips_bram_int_interface_r.db`](./artix7/ppips_bram_int_interface_r.db)
* [`2c68f8b128aeb79197013c3a1774522143a3507a8fa595a98c22dba2553fd5ce ./artix7/ppips_bram_l.db`](./artix7/ppips_bram_l.db)
@ -159,6 +161,8 @@ Results have checksums;
* [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9 ./artix7/segbits_hclk_r.db`](./artix7/segbits_hclk_r.db)
* [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520 ./artix7/segbits_int_l.db`](./artix7/segbits_int_l.db)
* [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556 ./artix7/segbits_int_r.db`](./artix7/segbits_int_r.db)
* [`6ece030404b8fd09095382730639d261e0402e2c513bf07d9ec301a7311ceb7e ./artix7/segbits_liob33.db`](./artix7/segbits_liob33.db)
* [`32cae09e1ab0ba143570d702cfee2a3e04948c131f6511e6040c684638c67ed4 ./artix7/segbits_riob33.db`](./artix7/segbits_riob33.db)
* [`2bc07bf06b86af1985fe1c76da7bd6d858768dd6d9e99344a3c52d490b797cdb ./artix7/settings.sh`](./artix7/settings.sh)
* [`ac6ba9ad814503f0fdc1dabb4292aaccd1a2195f5b348276cfee12aed3d96a70 ./artix7/site_type_BSCAN.json`](./artix7/site_type_BSCAN.json)
* [`64724ba2f8af98df5e1d92e5c2da2e6d5a41eec6580f796405e271dadb4e63be ./artix7/site_type_BUFGCTRL.json`](./artix7/site_type_BUFGCTRL.json)
@ -317,7 +321,7 @@ Results have checksums;
* [`04409fb1eb974ee5af7e8115bf16aacfd4bda61094c7c4644cc020762a45f6c8 ./artix7/tile_type_VBRK_EXT.json`](./artix7/tile_type_VBRK_EXT.json)
* [`004efcd7f9e172780ca7b8c379ec329bcfc52f86beaa1d997f41dbef7ac4a242 ./artix7/tile_type_VFRAME.json`](./artix7/tile_type_VFRAME.json)
* [`1604d48580815e26069c2b4909fcc50e8e8f974ad0beb349ced2329c302bb06b ./artix7/tileconn.json`](./artix7/tileconn.json)
* [`babfdaa149ace78b7487733817d9eea8ef3a011285605637ab20234cffcf7788 ./artix7/tilegrid.json`](./artix7/tilegrid.json)
* [`44584f682ded911408877fece3febf26e881cf9880121c9e7903f519490f2a15 ./artix7/tilegrid.json`](./artix7/tilegrid.json)
* [`4c20ee41ea32668919b7d91a7fabe38960e0ee4d5b3b83f1d18102d48895bf1c ./artix7/xc7a35tcpg236-1.json`](./artix7/xc7a35tcpg236-1.json)
* [`ef0724733da87455426a0f833642d96e9d206d047f4eb97072c3093f80c40d7d ./artix7/xc7a35tcpg236-1.yaml`](./artix7/xc7a35tcpg236-1.yaml)
* [`4c20ee41ea32668919b7d91a7fabe38960e0ee4d5b3b83f1d18102d48895bf1c ./artix7/xc7a35tcsg324-1.json`](./artix7/xc7a35tcsg324-1.json)
@ -330,7 +334,7 @@ Results have checksums;
### Settings
Created using following [settings/kintex7.sh (sha256: 794538b550d399255cbafeeb1b5ff183dc66ebc6cd8dc0f725e3f6a3977f757d)](https://github.com/SymbiFlow/prjxray/blob/e2dc1f56f6ddf085d3e30e28d5f88ff222d09a4c/settings/kintex7.sh)
Created using following [settings/kintex7.sh (sha256: 794538b550d399255cbafeeb1b5ff183dc66ebc6cd8dc0f725e3f6a3977f757d)](https://github.com/SymbiFlow/prjxray/blob/45a8af8d71c285e7115112c564e5d46b6c81dd97/settings/kintex7.sh)
```shell
export XRAY_DATABASE="kintex7"
export XRAY_PART="xc7k70tfbg676-2"
@ -591,7 +595,7 @@ Results have checksums;
### Settings
Created using following [settings/zynq7.sh (sha256: 4fda8e53d37070c2ae679944740d8ea38b79c68785ab47e9482e0536d27a8b4f)](https://github.com/SymbiFlow/prjxray/blob/e2dc1f56f6ddf085d3e30e28d5f88ff222d09a4c/settings/zynq7.sh)
Created using following [settings/zynq7.sh (sha256: 61298e89dcc873eadba47f5c2f9f72a38fa022583b2c7ff89246b2e051585ad8)](https://github.com/SymbiFlow/prjxray/blob/45a8af8d71c285e7115112c564e5d46b6c81dd97/settings/zynq7.sh)
```shell
export XRAY_DATABASE="zynq7"
export XRAY_PART="xc7z010clg400-1"
@ -604,7 +608,7 @@ export XRAY_ROI_TILEGRID="SLICE_X0Y0:SLICE_X43Y99 RAMB18_X0Y0:RAMB18_X2Y39 RAMB3
export XRAY_ROI="SLICE_X00Y50:SLICE_X43Y99 RAMB18_X0Y20:RAMB18_X2Y39 RAMB36_X0Y10:RAMB36_X2Y19 IOB_X0Y50:IOB_X0Y99"
# Most of CMT X0Y2.
export XRAY_ROI_GRID_X1="0"
export XRAY_ROI_GRID_X1="83"
export XRAY_ROI_GRID_X2="118"
# Include VBRK / VTERM
export XRAY_ROI_GRID_Y1="0"

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artix7/mask_clk_bufg_top_r.db
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artix7/segbits_liob33.db Normal file
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@ -0,0 +1,128 @@
LIOB33.IOB_Y0.IBUFDISABLE.I 38_82
LIOB33.IOB_Y0.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE 27_98
LIOB33.IOB_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE 26_99
LIOB33.IOB_Y0.IFF.SRTYPE.SYNC 29_67
LIOB33.IOB_Y0.IFF.ZINIT_Q1 28_72
LIOB33.IOB_Y0.IFF.ZINIT_Q2 28_76
LIOB33.IOB_Y0.IFF.ZINIT_Q3 28_86
LIOB33.IOB_Y0.IFF.ZINIT_Q4 28_94
LIOB33.IOB_Y0.IFF.ZINV_C 28_126 29_123 29_125
LIOB33.IOB_Y0.IFF.ZINV_OCLK 28_64
LIOB33.IOB_Y0.IFF.ZSRVAL_Q1 29_71
LIOB33.IOB_Y0.IFF.ZSRVAL_Q2 29_75
LIOB33.IOB_Y0.IFF.ZSRVAL_Q3 29_85
LIOB33.IOB_Y0.IFF.ZSRVAL_Q4 29_93
LIOB33.IOB_Y0.IN_ONLY 38_118 39_119 39_125
LIOB33.IOB_Y0.INOUT 30_67
LIOB33.IOB_Y0.INTERMDISABLE.I 39_89
LIOB33.IOB_Y0.ISERDES.DATA_RATE.SDR 27_108
LIOB33.IOB_Y0.ISERDES.INTERFACE_TYPE.MEMORY_DDR3 26_117
LIOB33.IOB_Y0.ISERDES.INTERFACE_TYPE.OVERSAMPLE 26_115
LIOB33.IOB_Y0.LVTTL.DRIVE.I24 31_86 32_66 33_111 38_64 !38_112 !38_118 38_126 39_65 !39_95 !39_113 39_117 39_119 !39_125 !39_127
LIOB33.IOB_Y0.ODDR.DDR_CLK_EDGE.OPPOSITE_EDGE !31_92
LIOB33.IOB_Y0.ODDR.DDR_CLK_EDGE.SAME_EDGE 31_92
LIOB33.IOB_Y0.OFF.ZINIT_Q 33_97
LIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.BUF 32_66
LIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.DDR 32_70
LIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.SDR 33_69
LIOB33.IOB_Y0.OSERDESE.DATA_WIDTH.2 30_127
LIOB33.IOB_Y0.OSERDESE.DATA_WIDTH.3 31_126
LIOB33.IOB_Y0.OSERDESE.DATA_WIDTH.4 31_124
LIOB33.IOB_Y0.OSERDESE.DATA_WIDTH.5 30_121
LIOB33.IOB_Y0.OSERDESE.DATA_WIDTH.6 31_120
LIOB33.IOB_Y0.OSERDESE.DATA_WIDTH.7 30_123
LIOB33.IOB_Y0.OSERDESE.DATA_WIDTH.8 31_116
LIOB33.IOB_Y0.PULLTYPE.KEEPER 38_92 38_94 !39_93
LIOB33.IOB_Y0.PULLTYPE.NONE !38_92 38_94 !39_93
LIOB33.IOB_Y0.PULLTYPE.PULLDOWN !38_92 !38_94 !39_93
LIOB33.IOB_Y0.PULLTYPE.PULLUP !38_92 38_94 39_93
LIOB33.IOB_Y0.SLEW.FAST !38_106 !38_110 !39_105 !39_109
LIOB33.IOB_Y0.SLEW.SLOW 38_106 38_110 39_105 39_109
LIOB33.IOB_Y0.TFF.ZINIT_Q 30_75
LIOB33.IOB_Y0.ZINV_D 29_109
LIOB33.IOB_Y0.IDELMUXE3.0 29_101
LIOB33.IOB_Y0.IFFDELMUXE3.0 28_116
LIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 31_86 32_66 33_111 38_64 38_112 38_118 38_126 39_65 39_95 39_113 !39_117 !39_119 39_125 !39_127
LIOB33.IOB_Y0.LVCMOS12.DRIVE.I8 31_86 32_66 33_111 38_64 38_112 !38_118 !38_126 39_65 39_95 39_113 !39_117 39_119 !39_125 !39_127
LIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 31_86 32_66 33_111 38_64 38_112 !38_118 38_126 39_65 39_95 39_113 !39_117 !39_119 !39_125 39_127
LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18.IN 38_86 39_85 !39_87 39_113
LIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 31_86 32_66 33_111 38_64 38_112 !38_118 38_126 39_65 39_95 39_113 !39_117 39_119 39_125 39_127
LIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 31_86 32_66 33_111 38_64 38_112 !38_118 !38_126 39_65 39_95 39_113 !39_117 !39_119 !39_125 39_127
LIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 31_86 32_66 33_111 38_64 38_112 38_118 38_126 39_65 39_95 39_113 39_117 !39_119 !39_125 39_127
LIOB33.IOB_Y0.LVCMOS15_LVCMOS18.DRIVE.I4 31_86 32_66 33_111 38_64 38_112 38_118 !38_126 39_65 39_95 39_113 !39_117 !39_119 39_125 39_127
LIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 31_86 32_66 33_111 38_64 38_112 !38_118 38_126 39_65 39_95 39_113 !39_117 39_119 39_125 !39_127
LIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 31_86 32_66 33_111 38_64 38_112 !38_118 38_126 39_65 39_95 39_113 !39_117 !39_119 39_125 39_127
LIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 31_86 32_66 33_111 38_64 38_112 !38_118 38_126 39_65 39_95 39_113 39_117 39_119 !39_125 !39_127
LIOB33.IOB_Y0.LVCMOS25.DRIVE.I4 31_86 32_66 33_111 38_64 38_112 38_118 !38_126 39_65 !39_95 39_113 !39_117 !39_119 39_125 39_127
LIOB33.IOB_Y0.LVCMOS25.DRIVE.I8 31_86 32_66 33_111 38_64 38_112 !38_118 !38_126 39_65 !39_95 39_113 !39_117 39_119 !39_125 !39_127
LIOB33.IOB_Y0.LVCMOS25.DRIVE.I12 31_86 32_66 33_111 38_64 38_112 !38_118 !38_126 39_65 !39_95 39_113 !39_117 !39_119 !39_125 !39_127
LIOB33.IOB_Y0.LVCMOS25.DRIVE.I16 31_86 32_66 33_111 38_64 38_112 38_118 38_126 39_65 !39_95 39_113 39_117 !39_119 !39_125 !39_127
LIOB33.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN 38_86 39_85 39_87 39_113
LIOB33.IOB_Y0.LVCMOS33.DRIVE.I16 31_86 32_66 33_111 38_64 !38_112 38_118 !38_126 39_65 !39_95 !39_113 39_117 !39_119 !39_125 39_127
LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I4 31_86 32_66 33_111 38_64 !38_112 38_118 !38_126 39_65 !39_95 !39_113 !39_117 !39_119 39_125 39_127
LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I8 31_86 32_66 33_111 38_64 !38_112 !38_118 38_126 39_65 !39_95 !39_113 !39_117 39_119 39_125 !39_127
LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16 31_86 32_66 33_111 38_64 !38_112 !38_118 38_126 39_65 !39_95 !39_113 !39_117 !39_119 39_125 39_127
LIOB33.IOB_Y1.IBUFDISABLE.I 39_45
LIOB33.IOB_Y1.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE 26_29
LIOB33.IOB_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE 27_28
LIOB33.IOB_Y1.IFF.SRTYPE.SYNC 28_60
LIOB33.IOB_Y1.IFF.ZINIT_Q1 29_55
LIOB33.IOB_Y1.IFF.ZINIT_Q2 29_51
LIOB33.IOB_Y1.IFF.ZINIT_Q3 29_41
LIOB33.IOB_Y1.IFF.ZINIT_Q4 29_33
LIOB33.IOB_Y1.IFF.ZINV_C 28_02 28_04 29_01
LIOB33.IOB_Y1.IFF.ZINV_OCLK 29_63
LIOB33.IOB_Y1.IFF.ZSRVAL_Q1 28_56
LIOB33.IOB_Y1.IFF.ZSRVAL_Q2 28_52
LIOB33.IOB_Y1.IFF.ZSRVAL_Q3 28_42
LIOB33.IOB_Y1.IFF.ZSRVAL_Q4 28_34
LIOB33.IOB_Y1.IN_ONLY 38_02 38_08 39_09
LIOB33.IOB_Y1.INOUT 31_60
LIOB33.IOB_Y1.INTERMDISABLE.I 38_38
LIOB33.IOB_Y1.ISERDES.DATA_RATE.SDR 26_19
LIOB33.IOB_Y1.ISERDES.INTERFACE_TYPE.MEMORY_DDR3 27_10
LIOB33.IOB_Y1.ISERDES.INTERFACE_TYPE.OVERSAMPLE 27_12
LIOB33.IOB_Y1.LVTTL.DRIVE.I24 30_41 32_16 33_61 !38_00 !38_02 38_08 38_10 !38_14 !38_32 38_62 39_01 !39_09 !39_15 39_63
LIOB33.IOB_Y1.ODDR.DDR_CLK_EDGE.OPPOSITE_EDGE !30_35
LIOB33.IOB_Y1.ODDR.DDR_CLK_EDGE.SAME_EDGE 30_35
LIOB33.IOB_Y1.OFF.ZINIT_Q 32_30
LIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.BUF 33_61
LIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.DDR 33_57
LIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.SDR 32_58
LIOB33.IOB_Y1.OSERDESE.DATA_WIDTH.2 31_00
LIOB33.IOB_Y1.OSERDESE.DATA_WIDTH.3 30_01
LIOB33.IOB_Y1.OSERDESE.DATA_WIDTH.4 30_03
LIOB33.IOB_Y1.OSERDESE.DATA_WIDTH.5 31_06
LIOB33.IOB_Y1.OSERDESE.DATA_WIDTH.6 30_07
LIOB33.IOB_Y1.OSERDESE.DATA_WIDTH.7 31_04
LIOB33.IOB_Y1.OSERDESE.DATA_WIDTH.8 30_11
LIOB33.IOB_Y1.PULLTYPE.KEEPER !38_34 39_33 39_35
LIOB33.IOB_Y1.PULLTYPE.NONE !38_34 39_33 !39_35
LIOB33.IOB_Y1.PULLTYPE.PULLDOWN !38_34 !39_33 !39_35
LIOB33.IOB_Y1.PULLTYPE.PULLUP 38_34 39_33 !39_35
LIOB33.IOB_Y1.SLEW.FAST !38_18 !38_22 !39_17 !39_21
LIOB33.IOB_Y1.SLEW.SLOW 38_18 38_22 39_17 39_21
LIOB33.IOB_Y1.TFF.ZINIT_Q 31_52
LIOB33.IOB_Y1.ZINV_D 28_18
LIOB33.IOB_Y1.IDELMUXE3.0 28_26
LIOB33.IOB_Y1.IFFDELMUXE3.0 29_11
LIOB33.IOB_Y1.LVCMOS12.DRIVE.I4 30_41 32_16 33_61 !38_00 38_02 !38_08 !38_10 38_14 38_32 38_62 39_01 39_09 39_15 39_63
LIOB33.IOB_Y1.LVCMOS12.DRIVE.I8 30_41 32_16 33_61 !38_00 !38_02 38_08 !38_10 38_14 38_32 38_62 !39_01 !39_09 39_15 39_63
LIOB33.IOB_Y1.LVCMOS12.DRIVE.I12 30_41 32_16 33_61 38_00 !38_02 !38_08 !38_10 38_14 38_32 38_62 39_01 !39_09 39_15 39_63
LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18.IN 38_14 !38_40 38_42 39_41
LIOB33.IOB_Y1.LVCMOS15.DRIVE.I8 30_41 32_16 33_61 38_00 38_02 38_08 !38_10 38_14 38_32 38_62 39_01 !39_09 39_15 39_63
LIOB33.IOB_Y1.LVCMOS15.DRIVE.I12 30_41 32_16 33_61 38_00 !38_02 !38_08 !38_10 38_14 38_32 38_62 !39_01 !39_09 39_15 39_63
LIOB33.IOB_Y1.LVCMOS15.DRIVE.I16 30_41 32_16 33_61 38_00 !38_02 !38_08 38_10 38_14 38_32 38_62 39_01 39_09 39_15 39_63
LIOB33.IOB_Y1.LVCMOS15_LVCMOS18.DRIVE.I4 30_41 32_16 33_61 38_00 38_02 !38_08 !38_10 38_14 38_32 38_62 !39_01 39_09 39_15 39_63
LIOB33.IOB_Y1.LVCMOS18.DRIVE.I12_I8 30_41 32_16 33_61 !38_00 38_02 38_08 !38_10 38_14 38_32 38_62 39_01 !39_09 39_15 39_63
LIOB33.IOB_Y1.LVCMOS18.DRIVE.I16 30_41 32_16 33_61 38_00 38_02 !38_08 !38_10 38_14 38_32 38_62 39_01 !39_09 39_15 39_63
LIOB33.IOB_Y1.LVCMOS18.DRIVE.I24 30_41 32_16 33_61 !38_00 !38_02 38_08 38_10 38_14 38_32 38_62 39_01 !39_09 39_15 39_63
LIOB33.IOB_Y1.LVCMOS25.DRIVE.I4 30_41 32_16 33_61 38_00 38_02 !38_08 !38_10 38_14 !38_32 38_62 !39_01 39_09 39_15 39_63
LIOB33.IOB_Y1.LVCMOS25.DRIVE.I8 30_41 32_16 33_61 !38_00 !38_02 38_08 !38_10 38_14 !38_32 38_62 !39_01 !39_09 39_15 39_63
LIOB33.IOB_Y1.LVCMOS25.DRIVE.I12 30_41 32_16 33_61 !38_00 !38_02 !38_08 !38_10 38_14 !38_32 38_62 !39_01 !39_09 39_15 39_63
LIOB33.IOB_Y1.LVCMOS25.DRIVE.I16 30_41 32_16 33_61 !38_00 !38_02 !38_08 38_10 38_14 !38_32 38_62 39_01 39_09 39_15 39_63
LIOB33.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN 38_14 38_40 38_42 39_41
LIOB33.IOB_Y1.LVCMOS33.DRIVE.I16 30_41 32_16 33_61 38_00 !38_02 !38_08 38_10 !38_14 !38_32 38_62 !39_01 39_09 !39_15 39_63
LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I4 30_41 32_16 33_61 38_00 38_02 !38_08 !38_10 !38_14 !38_32 38_62 !39_01 39_09 !39_15 39_63
LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I8 30_41 32_16 33_61 !38_00 38_02 38_08 !38_10 !38_14 !38_32 38_62 39_01 !39_09 !39_15 39_63
LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16 30_41 32_16 33_61 38_00 38_02 !38_08 !38_10 !38_14 !38_32 38_62 39_01 !39_09 !39_15 39_63

128
artix7/segbits_riob33.db Normal file
View File

@ -0,0 +1,128 @@
RIOB33.IOB_Y0.IBUFDISABLE.I 38_82
RIOB33.IOB_Y0.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE 27_98
RIOB33.IOB_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE 26_99
RIOB33.IOB_Y0.IFF.SRTYPE.SYNC 29_67
RIOB33.IOB_Y0.IFF.ZINIT_Q1 28_72
RIOB33.IOB_Y0.IFF.ZINIT_Q2 28_76
RIOB33.IOB_Y0.IFF.ZINIT_Q3 28_86
RIOB33.IOB_Y0.IFF.ZINIT_Q4 28_94
RIOB33.IOB_Y0.IFF.ZINV_C 28_126 29_123 29_125
RIOB33.IOB_Y0.IFF.ZINV_OCLK 28_64
RIOB33.IOB_Y0.IFF.ZSRVAL_Q1 29_71
RIOB33.IOB_Y0.IFF.ZSRVAL_Q2 29_75
RIOB33.IOB_Y0.IFF.ZSRVAL_Q3 29_85
RIOB33.IOB_Y0.IFF.ZSRVAL_Q4 29_93
RIOB33.IOB_Y0.IN_ONLY 38_118 39_119 39_125
RIOB33.IOB_Y0.INOUT 30_67
RIOB33.IOB_Y0.INTERMDISABLE.I 39_89
RIOB33.IOB_Y0.ISERDES.DATA_RATE.SDR 27_108
RIOB33.IOB_Y0.ISERDES.INTERFACE_TYPE.MEMORY_DDR3 26_117
RIOB33.IOB_Y0.ISERDES.INTERFACE_TYPE.OVERSAMPLE 26_115
RIOB33.IOB_Y0.LVTTL.DRIVE.I24 31_86 32_66 33_111 38_64 !38_112 !38_118 38_126 39_65 !39_95 !39_113 39_117 39_119 !39_125 !39_127
RIOB33.IOB_Y0.ODDR.DDR_CLK_EDGE.OPPOSITE_EDGE !31_92
RIOB33.IOB_Y0.ODDR.DDR_CLK_EDGE.SAME_EDGE 31_92
RIOB33.IOB_Y0.OFF.ZINIT_Q 33_97
RIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.BUF 32_66
RIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.DDR 32_70
RIOB33.IOB_Y0.OSERDESE.DATA_RATE_TQ.SDR 33_69
RIOB33.IOB_Y0.OSERDESE.DATA_WIDTH.2 30_127
RIOB33.IOB_Y0.OSERDESE.DATA_WIDTH.3 31_126
RIOB33.IOB_Y0.OSERDESE.DATA_WIDTH.4 31_124
RIOB33.IOB_Y0.OSERDESE.DATA_WIDTH.5 30_121
RIOB33.IOB_Y0.OSERDESE.DATA_WIDTH.6 31_120
RIOB33.IOB_Y0.OSERDESE.DATA_WIDTH.7 30_123
RIOB33.IOB_Y0.OSERDESE.DATA_WIDTH.8 31_116
RIOB33.IOB_Y0.PULLTYPE.KEEPER 38_92 38_94 !39_93
RIOB33.IOB_Y0.PULLTYPE.NONE !38_92 38_94 !39_93
RIOB33.IOB_Y0.PULLTYPE.PULLDOWN !38_92 !38_94 !39_93
RIOB33.IOB_Y0.PULLTYPE.PULLUP !38_92 38_94 39_93
RIOB33.IOB_Y0.SLEW.FAST !38_106 !38_110 !39_105 !39_109
RIOB33.IOB_Y0.SLEW.SLOW 38_106 38_110 39_105 39_109
RIOB33.IOB_Y0.TFF.ZINIT_Q 30_75
RIOB33.IOB_Y0.ZINV_D 29_109
RIOB33.IOB_Y0.IDELMUXE3.0 29_101
RIOB33.IOB_Y0.IFFDELMUXE3.0 28_116
RIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 31_86 32_66 33_111 38_64 38_112 38_118 38_126 39_65 39_95 39_113 !39_117 !39_119 39_125 !39_127
RIOB33.IOB_Y0.LVCMOS12.DRIVE.I8 31_86 32_66 33_111 38_64 38_112 !38_118 !38_126 39_65 39_95 39_113 !39_117 39_119 !39_125 !39_127
RIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 31_86 32_66 33_111 38_64 38_112 !38_118 38_126 39_65 39_95 39_113 !39_117 !39_119 !39_125 39_127
RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18.IN 38_86 39_85 !39_87 39_113
RIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 31_86 32_66 33_111 38_64 38_112 !38_118 38_126 39_65 39_95 39_113 !39_117 39_119 39_125 39_127
RIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 31_86 32_66 33_111 38_64 38_112 !38_118 !38_126 39_65 39_95 39_113 !39_117 !39_119 !39_125 39_127
RIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 31_86 32_66 33_111 38_64 38_112 38_118 38_126 39_65 39_95 39_113 39_117 !39_119 !39_125 39_127
RIOB33.IOB_Y0.LVCMOS15_LVCMOS18.DRIVE.I4 31_86 32_66 33_111 38_64 38_112 38_118 !38_126 39_65 39_95 39_113 !39_117 !39_119 39_125 39_127
RIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 31_86 32_66 33_111 38_64 38_112 !38_118 38_126 39_65 39_95 39_113 !39_117 39_119 39_125 !39_127
RIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 31_86 32_66 33_111 38_64 38_112 !38_118 38_126 39_65 39_95 39_113 !39_117 !39_119 39_125 39_127
RIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 31_86 32_66 33_111 38_64 38_112 !38_118 38_126 39_65 39_95 39_113 39_117 39_119 !39_125 !39_127
RIOB33.IOB_Y0.LVCMOS25.DRIVE.I4 31_86 32_66 33_111 38_64 38_112 38_118 !38_126 39_65 !39_95 39_113 !39_117 !39_119 39_125 39_127
RIOB33.IOB_Y0.LVCMOS25.DRIVE.I8 31_86 32_66 33_111 38_64 38_112 !38_118 !38_126 39_65 !39_95 39_113 !39_117 39_119 !39_125 !39_127
RIOB33.IOB_Y0.LVCMOS25.DRIVE.I12 31_86 32_66 33_111 38_64 38_112 !38_118 !38_126 39_65 !39_95 39_113 !39_117 !39_119 !39_125 !39_127
RIOB33.IOB_Y0.LVCMOS25.DRIVE.I16 31_86 32_66 33_111 38_64 38_112 38_118 38_126 39_65 !39_95 39_113 39_117 !39_119 !39_125 !39_127
RIOB33.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN 38_86 39_85 39_87 39_113
RIOB33.IOB_Y0.LVCMOS33.DRIVE.I16 31_86 32_66 33_111 38_64 !38_112 38_118 !38_126 39_65 !39_95 !39_113 39_117 !39_119 !39_125 39_127
RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I4 31_86 32_66 33_111 38_64 !38_112 38_118 !38_126 39_65 !39_95 !39_113 !39_117 !39_119 39_125 39_127
RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I8 31_86 32_66 33_111 38_64 !38_112 !38_118 38_126 39_65 !39_95 !39_113 !39_117 39_119 39_125 !39_127
RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16 31_86 32_66 33_111 38_64 !38_112 !38_118 38_126 39_65 !39_95 !39_113 !39_117 !39_119 39_125 39_127
RIOB33.IOB_Y1.IBUFDISABLE.I 39_45
RIOB33.IOB_Y1.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE 26_29
RIOB33.IOB_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE 27_28
RIOB33.IOB_Y1.IFF.SRTYPE.SYNC 28_60
RIOB33.IOB_Y1.IFF.ZINIT_Q1 29_55
RIOB33.IOB_Y1.IFF.ZINIT_Q2 29_51
RIOB33.IOB_Y1.IFF.ZINIT_Q3 29_41
RIOB33.IOB_Y1.IFF.ZINIT_Q4 29_33
RIOB33.IOB_Y1.IFF.ZINV_C 28_02 28_04 29_01
RIOB33.IOB_Y1.IFF.ZINV_OCLK 29_63
RIOB33.IOB_Y1.IFF.ZSRVAL_Q1 28_56
RIOB33.IOB_Y1.IFF.ZSRVAL_Q2 28_52
RIOB33.IOB_Y1.IFF.ZSRVAL_Q3 28_42
RIOB33.IOB_Y1.IFF.ZSRVAL_Q4 28_34
RIOB33.IOB_Y1.IN_ONLY 38_02 38_08 39_09
RIOB33.IOB_Y1.INOUT 31_60
RIOB33.IOB_Y1.INTERMDISABLE.I 38_38
RIOB33.IOB_Y1.ISERDES.DATA_RATE.SDR 26_19
RIOB33.IOB_Y1.ISERDES.INTERFACE_TYPE.MEMORY_DDR3 27_10
RIOB33.IOB_Y1.ISERDES.INTERFACE_TYPE.OVERSAMPLE 27_12
RIOB33.IOB_Y1.LVTTL.DRIVE.I24 30_41 32_16 33_61 !38_00 !38_02 38_08 38_10 !38_14 !38_32 38_62 39_01 !39_09 !39_15 39_63
RIOB33.IOB_Y1.ODDR.DDR_CLK_EDGE.OPPOSITE_EDGE !30_35
RIOB33.IOB_Y1.ODDR.DDR_CLK_EDGE.SAME_EDGE 30_35
RIOB33.IOB_Y1.OFF.ZINIT_Q 32_30
RIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.BUF 33_61
RIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.DDR 33_57
RIOB33.IOB_Y1.OSERDESE.DATA_RATE_TQ.SDR 32_58
RIOB33.IOB_Y1.OSERDESE.DATA_WIDTH.2 31_00
RIOB33.IOB_Y1.OSERDESE.DATA_WIDTH.3 30_01
RIOB33.IOB_Y1.OSERDESE.DATA_WIDTH.4 30_03
RIOB33.IOB_Y1.OSERDESE.DATA_WIDTH.5 31_06
RIOB33.IOB_Y1.OSERDESE.DATA_WIDTH.6 30_07
RIOB33.IOB_Y1.OSERDESE.DATA_WIDTH.7 31_04
RIOB33.IOB_Y1.OSERDESE.DATA_WIDTH.8 30_11
RIOB33.IOB_Y1.PULLTYPE.KEEPER !38_34 39_33 39_35
RIOB33.IOB_Y1.PULLTYPE.NONE !38_34 39_33 !39_35
RIOB33.IOB_Y1.PULLTYPE.PULLDOWN !38_34 !39_33 !39_35
RIOB33.IOB_Y1.PULLTYPE.PULLUP 38_34 39_33 !39_35
RIOB33.IOB_Y1.SLEW.FAST !38_18 !38_22 !39_17 !39_21
RIOB33.IOB_Y1.SLEW.SLOW 38_18 38_22 39_17 39_21
RIOB33.IOB_Y1.TFF.ZINIT_Q 31_52
RIOB33.IOB_Y1.ZINV_D 28_18
RIOB33.IOB_Y1.IDELMUXE3.0 28_26
RIOB33.IOB_Y1.IFFDELMUXE3.0 29_11
RIOB33.IOB_Y1.LVCMOS12.DRIVE.I4 30_41 32_16 33_61 !38_00 38_02 !38_08 !38_10 38_14 38_32 38_62 39_01 39_09 39_15 39_63
RIOB33.IOB_Y1.LVCMOS12.DRIVE.I8 30_41 32_16 33_61 !38_00 !38_02 38_08 !38_10 38_14 38_32 38_62 !39_01 !39_09 39_15 39_63
RIOB33.IOB_Y1.LVCMOS12.DRIVE.I12 30_41 32_16 33_61 38_00 !38_02 !38_08 !38_10 38_14 38_32 38_62 39_01 !39_09 39_15 39_63
RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18.IN 38_14 !38_40 38_42 39_41
RIOB33.IOB_Y1.LVCMOS15.DRIVE.I8 30_41 32_16 33_61 38_00 38_02 38_08 !38_10 38_14 38_32 38_62 39_01 !39_09 39_15 39_63
RIOB33.IOB_Y1.LVCMOS15.DRIVE.I12 30_41 32_16 33_61 38_00 !38_02 !38_08 !38_10 38_14 38_32 38_62 !39_01 !39_09 39_15 39_63
RIOB33.IOB_Y1.LVCMOS15.DRIVE.I16 30_41 32_16 33_61 38_00 !38_02 !38_08 38_10 38_14 38_32 38_62 39_01 39_09 39_15 39_63
RIOB33.IOB_Y1.LVCMOS15_LVCMOS18.DRIVE.I4 30_41 32_16 33_61 38_00 38_02 !38_08 !38_10 38_14 38_32 38_62 !39_01 39_09 39_15 39_63
RIOB33.IOB_Y1.LVCMOS18.DRIVE.I12_I8 30_41 32_16 33_61 !38_00 38_02 38_08 !38_10 38_14 38_32 38_62 39_01 !39_09 39_15 39_63
RIOB33.IOB_Y1.LVCMOS18.DRIVE.I16 30_41 32_16 33_61 38_00 38_02 !38_08 !38_10 38_14 38_32 38_62 39_01 !39_09 39_15 39_63
RIOB33.IOB_Y1.LVCMOS18.DRIVE.I24 30_41 32_16 33_61 !38_00 !38_02 38_08 38_10 38_14 38_32 38_62 39_01 !39_09 39_15 39_63
RIOB33.IOB_Y1.LVCMOS25.DRIVE.I4 30_41 32_16 33_61 38_00 38_02 !38_08 !38_10 38_14 !38_32 38_62 !39_01 39_09 39_15 39_63
RIOB33.IOB_Y1.LVCMOS25.DRIVE.I8 30_41 32_16 33_61 !38_00 !38_02 38_08 !38_10 38_14 !38_32 38_62 !39_01 !39_09 39_15 39_63
RIOB33.IOB_Y1.LVCMOS25.DRIVE.I12 30_41 32_16 33_61 !38_00 !38_02 !38_08 !38_10 38_14 !38_32 38_62 !39_01 !39_09 39_15 39_63
RIOB33.IOB_Y1.LVCMOS25.DRIVE.I16 30_41 32_16 33_61 !38_00 !38_02 !38_08 38_10 38_14 !38_32 38_62 39_01 39_09 39_15 39_63
RIOB33.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN 38_14 38_40 38_42 39_41
RIOB33.IOB_Y1.LVCMOS33.DRIVE.I16 30_41 32_16 33_61 38_00 !38_02 !38_08 38_10 !38_14 !38_32 38_62 !39_01 39_09 !39_15 39_63
RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I4 30_41 32_16 33_61 38_00 38_02 !38_08 !38_10 !38_14 !38_32 38_62 !39_01 39_09 !39_15 39_63
RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I8 30_41 32_16 33_61 !38_00 38_02 38_08 !38_10 !38_14 !38_32 38_62 39_01 !39_09 !39_15 39_63
RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16 30_41 32_16 33_61 38_00 38_02 !38_08 !38_10 !38_14 !38_32 38_62 39_01 !39_09 !39_15 39_63

160
artix7/tilegrid.json
View File

@ -187138,7 +187138,21 @@
"type": "IO_INT_INTERFACE_R"
},
"LIOB33_SING_X0Y0": {
"bits": {},
"bits": {
"CLB_IO_CLK": {
"alias": {
"sites": {
"IOB33_Y0": "IOB33_Y0"
},
"start_offset": 2,
"type": "LIOB33"
},
"baseaddr": "0x00400000",
"frames": 42,
"offset": 0,
"words": 2
}
},
"grid_x": 0,
"grid_y": 155,
"sites": {
@ -187147,7 +187161,21 @@
"type": "LIOB33_SING"
},
"LIOB33_SING_X0Y100": {
"bits": {},
"bits": {
"CLB_IO_CLK": {
"alias": {
"sites": {
"IOB33_Y0": "IOB33_Y0"
},
"start_offset": 2,
"type": "LIOB33"
},
"baseaddr": "0x00020000",
"frames": 42,
"offset": 0,
"words": 2
}
},
"grid_x": 0,
"grid_y": 51,
"sites": {
@ -187156,7 +187184,21 @@
"type": "LIOB33_SING"
},
"LIOB33_SING_X0Y149": {
"bits": {},
"bits": {
"CLB_IO_CLK": {
"alias": {
"sites": {
"IOB33_Y0": "IOB33_Y1"
},
"start_offset": 0,
"type": "LIOB33"
},
"baseaddr": "0x00020000",
"frames": 42,
"offset": 99,
"words": 2
}
},
"grid_x": 0,
"grid_y": 1,
"sites": {
@ -187165,7 +187207,21 @@
"type": "LIOB33_SING"
},
"LIOB33_SING_X0Y49": {
"bits": {},
"bits": {
"CLB_IO_CLK": {
"alias": {
"sites": {
"IOB33_Y0": "IOB33_Y1"
},
"start_offset": 0,
"type": "LIOB33"
},
"baseaddr": "0x00400000",
"frames": 42,
"offset": 99,
"words": 2
}
},
"grid_x": 0,
"grid_y": 105,
"sites": {
@ -187174,7 +187230,21 @@
"type": "LIOB33_SING"
},
"LIOB33_SING_X0Y50": {
"bits": {},
"bits": {
"CLB_IO_CLK": {
"alias": {
"sites": {
"IOB33_Y0": "IOB33_Y0"
},
"start_offset": 2,
"type": "LIOB33"
},
"baseaddr": "0x00000000",
"frames": 42,
"offset": 0,
"words": 2
}
},
"grid_x": 0,
"grid_y": 103,
"sites": {
@ -187183,7 +187253,21 @@
"type": "LIOB33_SING"
},
"LIOB33_SING_X0Y99": {
"bits": {},
"bits": {
"CLB_IO_CLK": {
"alias": {
"sites": {
"IOB33_Y0": "IOB33_Y1"
},
"start_offset": 0,
"type": "LIOB33"
},
"baseaddr": "0x00000000",
"frames": 42,
"offset": 99,
"words": 2
}
},
"grid_x": 0,
"grid_y": 53,
"sites": {
@ -209236,7 +209320,21 @@
"type": "PCIE_TOP"
},
"RIOB33_SING_X43Y0": {
"bits": {},
"bits": {
"CLB_IO_CLK": {
"alias": {
"sites": {
"IOB33_Y0": "IOB33_Y0"
},
"start_offset": 2,
"type": "RIOB33"
},
"baseaddr": "0x00401580",
"frames": 42,
"offset": 0,
"words": 2
}
},
"grid_x": 114,
"grid_y": 155,
"sites": {
@ -209245,7 +209343,21 @@
"type": "RIOB33_SING"
},
"RIOB33_SING_X43Y49": {
"bits": {},
"bits": {
"CLB_IO_CLK": {
"alias": {
"sites": {
"IOB33_Y0": "IOB33_Y1"
},
"start_offset": 0,
"type": "RIOB33"
},
"baseaddr": "0x00401580",
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@ -209254,7 +209366,21 @@
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@ -209263,7 +209389,21 @@
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