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Updating all based on "Merge pull request #1389 from andrewb1999/fix-sdf-gen". 

See [Info File](Info.md) for details.

Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
This commit is contained in:
Tim 'mithro' Ansell 2020-07-09 15:10:08 -07:00
parent e45604d941
commit 485a8378c3
34 changed files with 2706 additions and 2738 deletions
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86
Info.md
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@ -37,20 +37,20 @@ These files are released under the very permissive [CC0 1.0 Universal](COPYING).
# Details # Details
Last updated on Thu 02 Jul 2020 09:39:45 PM UTC (2020-07-02T21:39:45+00:00). Last updated on Thu 09 Jul 2020 10:09:56 PM UTC (2020-07-09T22:09:56+00:00).
Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [b0432d14](https://github.com/SymbiFlow/prjxray/commit/b0432d14d5806f379bd56fe2e967a553bf11287f). Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [18ac5cff](https://github.com/SymbiFlow/prjxray/commit/18ac5cffa6e5f0da57a9e0013ef186d9e8e99e58).
Latest commit was; Latest commit was;
``` ```
commit b0432d14d5806f379bd56fe2e967a553bf11287f commit 18ac5cffa6e5f0da57a9e0013ef186d9e8e99e58
Merge: 9749d6d5 30f35f97 Merge: b0432d14 2f03a575
Author: litghost <537074+litghost@users.noreply.github.com> Author: litghost <537074+litghost@users.noreply.github.com>
Date: Wed Jul 1 15:59:30 2020 -0700 Date: Wed Jul 8 15:10:13 2020 -0700
Merge pull request #1383 from andrewb1999/json-add-explicit-type Merge pull request #1389 from andrewb1999/fix-sdf-gen
Add dedicated port type to harness design.json Fix SDF generation
``` ```
@ -59,7 +59,7 @@ Date: Wed Jul 1 15:59:30 2020 -0700
### Settings ### Settings
Created using following [settings/artix7.sh (sha256: 56ee1f9747510a62c9ea078738b273f4dcbaeca49aa98334db6ef1a9ececa9a7)](https://github.com/SymbiFlow/prjxray/blob/b0432d14d5806f379bd56fe2e967a553bf11287f/settings/artix7.sh) Created using following [settings/artix7.sh (sha256: 56ee1f9747510a62c9ea078738b273f4dcbaeca49aa98334db6ef1a9ececa9a7)](https://github.com/SymbiFlow/prjxray/blob/18ac5cffa6e5f0da57a9e0013ef186d9e8e99e58/settings/artix7.sh)
```shell ```shell
# Copyright (C) 2017-2020 The Project X-Ray Authors. # Copyright (C) 2017-2020 The Project X-Ray Authors.
# #
@ -166,13 +166,13 @@ Results have checksums;
* [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd ./artix7/mask_hclk_r.db`](./artix7/mask_hclk_r.db) * [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd ./artix7/mask_hclk_r.db`](./artix7/mask_hclk_r.db)
* [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./artix7/mask_hclk_r.origin_info.db`](./artix7/mask_hclk_r.origin_info.db) * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./artix7/mask_hclk_r.origin_info.db`](./artix7/mask_hclk_r.origin_info.db)
* [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6 ./artix7/mask_liob33.db`](./artix7/mask_liob33.db) * [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6 ./artix7/mask_liob33.db`](./artix7/mask_liob33.db)
* [`5ce5815a27e861034d00cf44b4480757b648f946c0a90ca51cd1ccd7166b023f ./artix7/mask_lioi3.db`](./artix7/mask_lioi3.db) * [`d89ce8904fc7479bd1806f29c9cf1a56a27382a34dc867caf7a3a8e48f079f46 ./artix7/mask_lioi3.db`](./artix7/mask_lioi3.db)
* [`5ce5815a27e861034d00cf44b4480757b648f946c0a90ca51cd1ccd7166b023f ./artix7/mask_lioi3_tbytesrc.db`](./artix7/mask_lioi3_tbytesrc.db) * [`d89ce8904fc7479bd1806f29c9cf1a56a27382a34dc867caf7a3a8e48f079f46 ./artix7/mask_lioi3_tbytesrc.db`](./artix7/mask_lioi3_tbytesrc.db)
* [`5ce5815a27e861034d00cf44b4480757b648f946c0a90ca51cd1ccd7166b023f ./artix7/mask_lioi3_tbyteterm.db`](./artix7/mask_lioi3_tbyteterm.db) * [`d89ce8904fc7479bd1806f29c9cf1a56a27382a34dc867caf7a3a8e48f079f46 ./artix7/mask_lioi3_tbyteterm.db`](./artix7/mask_lioi3_tbyteterm.db)
* [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6 ./artix7/mask_riob33.db`](./artix7/mask_riob33.db) * [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6 ./artix7/mask_riob33.db`](./artix7/mask_riob33.db)
* [`5ce5815a27e861034d00cf44b4480757b648f946c0a90ca51cd1ccd7166b023f ./artix7/mask_rioi3.db`](./artix7/mask_rioi3.db) * [`d89ce8904fc7479bd1806f29c9cf1a56a27382a34dc867caf7a3a8e48f079f46 ./artix7/mask_rioi3.db`](./artix7/mask_rioi3.db)
* [`5ce5815a27e861034d00cf44b4480757b648f946c0a90ca51cd1ccd7166b023f ./artix7/mask_rioi3_tbytesrc.db`](./artix7/mask_rioi3_tbytesrc.db) * [`d89ce8904fc7479bd1806f29c9cf1a56a27382a34dc867caf7a3a8e48f079f46 ./artix7/mask_rioi3_tbytesrc.db`](./artix7/mask_rioi3_tbytesrc.db)
* [`5ce5815a27e861034d00cf44b4480757b648f946c0a90ca51cd1ccd7166b023f ./artix7/mask_rioi3_tbyteterm.db`](./artix7/mask_rioi3_tbyteterm.db) * [`d89ce8904fc7479bd1806f29c9cf1a56a27382a34dc867caf7a3a8e48f079f46 ./artix7/mask_rioi3_tbyteterm.db`](./artix7/mask_rioi3_tbyteterm.db)
* [`d94e4d13df16da498224f0e94deaa310fbf471b6f9ec0ec8b2308fe62fa2eeaf ./artix7/ppips_bram_int_interface_l.db`](./artix7/ppips_bram_int_interface_l.db) * [`d94e4d13df16da498224f0e94deaa310fbf471b6f9ec0ec8b2308fe62fa2eeaf ./artix7/ppips_bram_int_interface_l.db`](./artix7/ppips_bram_int_interface_l.db)
* [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./artix7/ppips_bram_int_interface_l.origin_info.db`](./artix7/ppips_bram_int_interface_l.origin_info.db) * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./artix7/ppips_bram_int_interface_l.origin_info.db`](./artix7/ppips_bram_int_interface_l.origin_info.db)
* [`b48d766ac6f9dd0e21280d3a04dd448ea39016143309c0c7867fc00d730a59ae ./artix7/ppips_bram_int_interface_r.db`](./artix7/ppips_bram_int_interface_r.db) * [`b48d766ac6f9dd0e21280d3a04dd448ea39016143309c0c7867fc00d730a59ae ./artix7/ppips_bram_int_interface_r.db`](./artix7/ppips_bram_int_interface_r.db)
@ -275,9 +275,9 @@ Results have checksums;
* [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9 ./artix7/segbits_hclk_r.db`](./artix7/segbits_hclk_r.db) * [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9 ./artix7/segbits_hclk_r.db`](./artix7/segbits_hclk_r.db)
* [`61d05145f3613042e8f0c1d97d63f6c185cfb66df609b621b44422ebb27c77a0 ./artix7/segbits_hclk_r.origin_info.db`](./artix7/segbits_hclk_r.origin_info.db) * [`61d05145f3613042e8f0c1d97d63f6c185cfb66df609b621b44422ebb27c77a0 ./artix7/segbits_hclk_r.origin_info.db`](./artix7/segbits_hclk_r.origin_info.db)
* [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520 ./artix7/segbits_int_l.db`](./artix7/segbits_int_l.db) * [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520 ./artix7/segbits_int_l.db`](./artix7/segbits_int_l.db)
* [`4c74f917fa6c914e8ea8e44155fc8b1f52c51274d4ec4cb75d3053bad0b798ab ./artix7/segbits_int_l.origin_info.db`](./artix7/segbits_int_l.origin_info.db) * [`27ebf7e3eac4fb4b20fe4ec29d8525de4a0259e593c28a6beae7dd2ce6a2ea33 ./artix7/segbits_int_l.origin_info.db`](./artix7/segbits_int_l.origin_info.db)
* [`9c7b94275c440e0bb0634ae2c347e92b605a77e29bb28c04f8bba126ba808f60 ./artix7/segbits_int_r.db`](./artix7/segbits_int_r.db) * [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556 ./artix7/segbits_int_r.db`](./artix7/segbits_int_r.db)
* [`5ccdf716246053de58c1d0f7c350ed09e117bc44695aa69bdd2d1357d09aff2a ./artix7/segbits_int_r.origin_info.db`](./artix7/segbits_int_r.origin_info.db) * [`ec34fb06aa9a7165943c9d9bc02f0543e0e3807a0807c5f94421e4dd079e61fe ./artix7/segbits_int_r.origin_info.db`](./artix7/segbits_int_r.origin_info.db)
* [`392e91def4df6eebb3ce5ed15570c01f6090be793a79054e1880549082eb6f23 ./artix7/segbits_liob33.db`](./artix7/segbits_liob33.db) * [`392e91def4df6eebb3ce5ed15570c01f6090be793a79054e1880549082eb6f23 ./artix7/segbits_liob33.db`](./artix7/segbits_liob33.db)
* [`0fca9c6530589b14c77b738e68c63ed4246713e44e1e699e153b69907e77e09e ./artix7/segbits_liob33.origin_info.db`](./artix7/segbits_liob33.origin_info.db) * [`0fca9c6530589b14c77b738e68c63ed4246713e44e1e699e153b69907e77e09e ./artix7/segbits_liob33.origin_info.db`](./artix7/segbits_liob33.origin_info.db)
* [`c9dfa75f8b565b3c47813cdf7f1df2aa7c59402f41396e939dd97ec68f7638d8 ./artix7/segbits_lioi3.db`](./artix7/segbits_lioi3.db) * [`c9dfa75f8b565b3c47813cdf7f1df2aa7c59402f41396e939dd97ec68f7638d8 ./artix7/segbits_lioi3.db`](./artix7/segbits_lioi3.db)
@ -489,8 +489,8 @@ Results have checksums;
* [`bda848e132cf93158addf5db6e449dd5d79050155bd2ba52ccad7bd3c1607ec4 ./artix7/timings/CMT_TOP_R_LOWER_T.sdf`](./artix7/timings/CMT_TOP_R_LOWER_T.sdf) * [`bda848e132cf93158addf5db6e449dd5d79050155bd2ba52ccad7bd3c1607ec4 ./artix7/timings/CMT_TOP_R_LOWER_T.sdf`](./artix7/timings/CMT_TOP_R_LOWER_T.sdf)
* [`e56222b18e7fabf7473656f7446958e93373a3bf956ca75968d26f9c652fa14e ./artix7/timings/CMT_TOP_R_UPPER_B.sdf`](./artix7/timings/CMT_TOP_R_UPPER_B.sdf) * [`e56222b18e7fabf7473656f7446958e93373a3bf956ca75968d26f9c652fa14e ./artix7/timings/CMT_TOP_R_UPPER_B.sdf`](./artix7/timings/CMT_TOP_R_UPPER_B.sdf)
* [`24408756edd72f9c82dc2badb3e94e372916c00c407e86a88db1274f8951d721 ./artix7/timings/CMT_TOP_R_UPPER_T.sdf`](./artix7/timings/CMT_TOP_R_UPPER_T.sdf) * [`24408756edd72f9c82dc2badb3e94e372916c00c407e86a88db1274f8951d721 ./artix7/timings/CMT_TOP_R_UPPER_T.sdf`](./artix7/timings/CMT_TOP_R_UPPER_T.sdf)
* [`a1945d3cc9f7a422691d7cad098dc61cf6804bdbb8df8c572576d651e0f44c44 ./artix7/timings/DSP_L.sdf`](./artix7/timings/DSP_L.sdf) * [`3f9923d175379d32f859a8d3e07992c0174cabe3b260c14b69394009fa1d0569 ./artix7/timings/DSP_L.sdf`](./artix7/timings/DSP_L.sdf)
* [`a1945d3cc9f7a422691d7cad098dc61cf6804bdbb8df8c572576d651e0f44c44 ./artix7/timings/DSP_R.sdf`](./artix7/timings/DSP_R.sdf) * [`3f9923d175379d32f859a8d3e07992c0174cabe3b260c14b69394009fa1d0569 ./artix7/timings/DSP_R.sdf`](./artix7/timings/DSP_R.sdf)
* [`fd93513fb5389752c1f1716bf15c2d3d118666e9f968533bb50d845504deb5ff ./artix7/timings/GTP_CHANNEL_0.sdf`](./artix7/timings/GTP_CHANNEL_0.sdf) * [`fd93513fb5389752c1f1716bf15c2d3d118666e9f968533bb50d845504deb5ff ./artix7/timings/GTP_CHANNEL_0.sdf`](./artix7/timings/GTP_CHANNEL_0.sdf)
* [`fd93513fb5389752c1f1716bf15c2d3d118666e9f968533bb50d845504deb5ff ./artix7/timings/GTP_CHANNEL_1.sdf`](./artix7/timings/GTP_CHANNEL_1.sdf) * [`fd93513fb5389752c1f1716bf15c2d3d118666e9f968533bb50d845504deb5ff ./artix7/timings/GTP_CHANNEL_1.sdf`](./artix7/timings/GTP_CHANNEL_1.sdf)
* [`fd93513fb5389752c1f1716bf15c2d3d118666e9f968533bb50d845504deb5ff ./artix7/timings/GTP_CHANNEL_2.sdf`](./artix7/timings/GTP_CHANNEL_2.sdf) * [`fd93513fb5389752c1f1716bf15c2d3d118666e9f968533bb50d845504deb5ff ./artix7/timings/GTP_CHANNEL_2.sdf`](./artix7/timings/GTP_CHANNEL_2.sdf)
@ -515,8 +515,8 @@ Results have checksums;
* [`3bb5a39c36bcd83a540200072baa4c36057960fa1e35f5fcba875f2a755c34a1 ./artix7/timings/RIOI3_TBYTETERM.sdf`](./artix7/timings/RIOI3_TBYTETERM.sdf) * [`3bb5a39c36bcd83a540200072baa4c36057960fa1e35f5fcba875f2a755c34a1 ./artix7/timings/RIOI3_TBYTETERM.sdf`](./artix7/timings/RIOI3_TBYTETERM.sdf)
* [`feb5cf787894379d158c5218ba44af20458c8008a1e75e30df00adde8aa97108 ./artix7/timings/carry4_slicel.sdf`](./artix7/timings/carry4_slicel.sdf) * [`feb5cf787894379d158c5218ba44af20458c8008a1e75e30df00adde8aa97108 ./artix7/timings/carry4_slicel.sdf`](./artix7/timings/carry4_slicel.sdf)
* [`626d9e188a1c4874f7ac657e82c64df8d52f819624e8ee4f9ed9e557d85ad3f2 ./artix7/timings/carry4_slicem.sdf`](./artix7/timings/carry4_slicem.sdf) * [`626d9e188a1c4874f7ac657e82c64df8d52f819624e8ee4f9ed9e557d85ad3f2 ./artix7/timings/carry4_slicem.sdf`](./artix7/timings/carry4_slicem.sdf)
* [`ee750af8a355de7fdbcee19e3c216068912f5502b9ad342090a35ba9cce90038 ./artix7/timings/slicel.sdf`](./artix7/timings/slicel.sdf) * [`fd31d66077f869d01f13d9fabbd0dcd38b4aab0322179ecf9ac190a3b70c5456 ./artix7/timings/slicel.sdf`](./artix7/timings/slicel.sdf)
* [`37f7377698f69c400e009e7134fd5752fb93724ffa74dde46d076fb23ef914bb ./artix7/timings/slicem.sdf`](./artix7/timings/slicem.sdf) * [`3d2da5714d8c81165fa51403fb719b3ddd9e7ea7ab79280ae4e157d11a29172e ./artix7/timings/slicem.sdf`](./artix7/timings/slicem.sdf)
* [`3f202fefbd0f36761f08eb58737a42754c65c965968174421df0374198e31daa ./artix7/xc7a100tcsg324-1/package_pins.csv`](./artix7/xc7a100tcsg324-1/package_pins.csv) * [`3f202fefbd0f36761f08eb58737a42754c65c965968174421df0374198e31daa ./artix7/xc7a100tcsg324-1/package_pins.csv`](./artix7/xc7a100tcsg324-1/package_pins.csv)
* [`277906907e43846ac8a52115983cd0ece673b2310d8d10c9b2253d6537bf1a02 ./artix7/xc7a100tcsg324-1/part.json`](./artix7/xc7a100tcsg324-1/part.json) * [`277906907e43846ac8a52115983cd0ece673b2310d8d10c9b2253d6537bf1a02 ./artix7/xc7a100tcsg324-1/part.json`](./artix7/xc7a100tcsg324-1/part.json)
* [`4e1f153303270ed3727ca40af3179020f74271ff63c4d771556020b1d3037b92 ./artix7/xc7a100tcsg324-1/part.yaml`](./artix7/xc7a100tcsg324-1/part.yaml) * [`4e1f153303270ed3727ca40af3179020f74271ff63c4d771556020b1d3037b92 ./artix7/xc7a100tcsg324-1/part.yaml`](./artix7/xc7a100tcsg324-1/part.yaml)
@ -563,7 +563,7 @@ Results have checksums;
### Settings ### Settings
Created using following [settings/kintex7.sh (sha256: 8c4c506cbdc6a25696436bbe6359e3617c82a11931ad6e406a1c433b263527c4)](https://github.com/SymbiFlow/prjxray/blob/b0432d14d5806f379bd56fe2e967a553bf11287f/settings/kintex7.sh) Created using following [settings/kintex7.sh (sha256: 8c4c506cbdc6a25696436bbe6359e3617c82a11931ad6e406a1c433b263527c4)](https://github.com/SymbiFlow/prjxray/blob/18ac5cffa6e5f0da57a9e0013ef186d9e8e99e58/settings/kintex7.sh)
```shell ```shell
# Copyright (C) 2017-2020 The Project X-Ray Authors. # Copyright (C) 2017-2020 The Project X-Ray Authors.
# #
@ -642,13 +642,13 @@ Results have checksums;
* [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd ./kintex7/mask_hclk_r.db`](./kintex7/mask_hclk_r.db) * [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd ./kintex7/mask_hclk_r.db`](./kintex7/mask_hclk_r.db)
* [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./kintex7/mask_hclk_r.origin_info.db`](./kintex7/mask_hclk_r.origin_info.db) * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./kintex7/mask_hclk_r.origin_info.db`](./kintex7/mask_hclk_r.origin_info.db)
* [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6 ./kintex7/mask_liob33.db`](./kintex7/mask_liob33.db) * [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6 ./kintex7/mask_liob33.db`](./kintex7/mask_liob33.db)
* [`3570fd1c1fde57ee0f64aa815176edfaf65043920bba3cf2484e8f6b14c13064 ./kintex7/mask_lioi3.db`](./kintex7/mask_lioi3.db) * [`7db4e012a058ddedde6f42fd3cf00105d56ae9695e6755b52c421bfc32e404a8 ./kintex7/mask_lioi3.db`](./kintex7/mask_lioi3.db)
* [`3570fd1c1fde57ee0f64aa815176edfaf65043920bba3cf2484e8f6b14c13064 ./kintex7/mask_lioi3_tbytesrc.db`](./kintex7/mask_lioi3_tbytesrc.db) * [`7db4e012a058ddedde6f42fd3cf00105d56ae9695e6755b52c421bfc32e404a8 ./kintex7/mask_lioi3_tbytesrc.db`](./kintex7/mask_lioi3_tbytesrc.db)
* [`3570fd1c1fde57ee0f64aa815176edfaf65043920bba3cf2484e8f6b14c13064 ./kintex7/mask_lioi3_tbyteterm.db`](./kintex7/mask_lioi3_tbyteterm.db) * [`7db4e012a058ddedde6f42fd3cf00105d56ae9695e6755b52c421bfc32e404a8 ./kintex7/mask_lioi3_tbyteterm.db`](./kintex7/mask_lioi3_tbyteterm.db)
* [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6 ./kintex7/mask_riob33.db`](./kintex7/mask_riob33.db) * [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6 ./kintex7/mask_riob33.db`](./kintex7/mask_riob33.db)
* [`3570fd1c1fde57ee0f64aa815176edfaf65043920bba3cf2484e8f6b14c13064 ./kintex7/mask_rioi3.db`](./kintex7/mask_rioi3.db) * [`7db4e012a058ddedde6f42fd3cf00105d56ae9695e6755b52c421bfc32e404a8 ./kintex7/mask_rioi3.db`](./kintex7/mask_rioi3.db)
* [`3570fd1c1fde57ee0f64aa815176edfaf65043920bba3cf2484e8f6b14c13064 ./kintex7/mask_rioi3_tbytesrc.db`](./kintex7/mask_rioi3_tbytesrc.db) * [`7db4e012a058ddedde6f42fd3cf00105d56ae9695e6755b52c421bfc32e404a8 ./kintex7/mask_rioi3_tbytesrc.db`](./kintex7/mask_rioi3_tbytesrc.db)
* [`3570fd1c1fde57ee0f64aa815176edfaf65043920bba3cf2484e8f6b14c13064 ./kintex7/mask_rioi3_tbyteterm.db`](./kintex7/mask_rioi3_tbyteterm.db) * [`7db4e012a058ddedde6f42fd3cf00105d56ae9695e6755b52c421bfc32e404a8 ./kintex7/mask_rioi3_tbyteterm.db`](./kintex7/mask_rioi3_tbyteterm.db)
* [`d94e4d13df16da498224f0e94deaa310fbf471b6f9ec0ec8b2308fe62fa2eeaf ./kintex7/ppips_bram_int_interface_l.db`](./kintex7/ppips_bram_int_interface_l.db) * [`d94e4d13df16da498224f0e94deaa310fbf471b6f9ec0ec8b2308fe62fa2eeaf ./kintex7/ppips_bram_int_interface_l.db`](./kintex7/ppips_bram_int_interface_l.db)
* [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./kintex7/ppips_bram_int_interface_l.origin_info.db`](./kintex7/ppips_bram_int_interface_l.origin_info.db) * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./kintex7/ppips_bram_int_interface_l.origin_info.db`](./kintex7/ppips_bram_int_interface_l.origin_info.db)
* [`b48d766ac6f9dd0e21280d3a04dd448ea39016143309c0c7867fc00d730a59ae ./kintex7/ppips_bram_int_interface_r.db`](./kintex7/ppips_bram_int_interface_r.db) * [`b48d766ac6f9dd0e21280d3a04dd448ea39016143309c0c7867fc00d730a59ae ./kintex7/ppips_bram_int_interface_r.db`](./kintex7/ppips_bram_int_interface_r.db)
@ -747,9 +747,9 @@ Results have checksums;
* [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9 ./kintex7/segbits_hclk_r.db`](./kintex7/segbits_hclk_r.db) * [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9 ./kintex7/segbits_hclk_r.db`](./kintex7/segbits_hclk_r.db)
* [`61d05145f3613042e8f0c1d97d63f6c185cfb66df609b621b44422ebb27c77a0 ./kintex7/segbits_hclk_r.origin_info.db`](./kintex7/segbits_hclk_r.origin_info.db) * [`61d05145f3613042e8f0c1d97d63f6c185cfb66df609b621b44422ebb27c77a0 ./kintex7/segbits_hclk_r.origin_info.db`](./kintex7/segbits_hclk_r.origin_info.db)
* [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520 ./kintex7/segbits_int_l.db`](./kintex7/segbits_int_l.db) * [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520 ./kintex7/segbits_int_l.db`](./kintex7/segbits_int_l.db)
* [`185771cfd6d029ded688a2df21d1b304acecaa4dddab3f2e5325fe754455f568 ./kintex7/segbits_int_l.origin_info.db`](./kintex7/segbits_int_l.origin_info.db) * [`41610695659e595d9b893432a86929f9f0ba49508ea4daf936d49b0537d38d12 ./kintex7/segbits_int_l.origin_info.db`](./kintex7/segbits_int_l.origin_info.db)
* [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556 ./kintex7/segbits_int_r.db`](./kintex7/segbits_int_r.db) * [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556 ./kintex7/segbits_int_r.db`](./kintex7/segbits_int_r.db)
* [`5c07d9ae1e280ed7398df52234004717e61ce017b2f92f43242bc845b955c6d6 ./kintex7/segbits_int_r.origin_info.db`](./kintex7/segbits_int_r.origin_info.db) * [`e5ea22253169e856f1cbeabd8e9b0faf0a116d7203622fbda6adba88f8658ee0 ./kintex7/segbits_int_r.origin_info.db`](./kintex7/segbits_int_r.origin_info.db)
* [`392e91def4df6eebb3ce5ed15570c01f6090be793a79054e1880549082eb6f23 ./kintex7/segbits_liob33.db`](./kintex7/segbits_liob33.db) * [`392e91def4df6eebb3ce5ed15570c01f6090be793a79054e1880549082eb6f23 ./kintex7/segbits_liob33.db`](./kintex7/segbits_liob33.db)
* [`0fca9c6530589b14c77b738e68c63ed4246713e44e1e699e153b69907e77e09e ./kintex7/segbits_liob33.origin_info.db`](./kintex7/segbits_liob33.origin_info.db) * [`0fca9c6530589b14c77b738e68c63ed4246713e44e1e699e153b69907e77e09e ./kintex7/segbits_liob33.origin_info.db`](./kintex7/segbits_liob33.origin_info.db)
* [`c9dfa75f8b565b3c47813cdf7f1df2aa7c59402f41396e939dd97ec68f7638d8 ./kintex7/segbits_lioi3.db`](./kintex7/segbits_lioi3.db) * [`c9dfa75f8b565b3c47813cdf7f1df2aa7c59402f41396e939dd97ec68f7638d8 ./kintex7/segbits_lioi3.db`](./kintex7/segbits_lioi3.db)
@ -942,7 +942,7 @@ Results have checksums;
### Settings ### Settings
Created using following [settings/zynq7.sh (sha256: 790d0886285b195daff0950f82ddb42635257c7c6400dcc5c7fb5b13f66ee6ba)](https://github.com/SymbiFlow/prjxray/blob/b0432d14d5806f379bd56fe2e967a553bf11287f/settings/zynq7.sh) Created using following [settings/zynq7.sh (sha256: 790d0886285b195daff0950f82ddb42635257c7c6400dcc5c7fb5b13f66ee6ba)](https://github.com/SymbiFlow/prjxray/blob/18ac5cffa6e5f0da57a9e0013ef186d9e8e99e58/settings/zynq7.sh)
```shell ```shell
# Copyright (C) 2017-2020 The Project X-Ray Authors. # Copyright (C) 2017-2020 The Project X-Ray Authors.
# #
@ -1024,13 +1024,13 @@ Results have checksums;
* [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd ./zynq7/mask_hclk_r.db`](./zynq7/mask_hclk_r.db) * [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd ./zynq7/mask_hclk_r.db`](./zynq7/mask_hclk_r.db)
* [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./zynq7/mask_hclk_r.origin_info.db`](./zynq7/mask_hclk_r.origin_info.db) * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./zynq7/mask_hclk_r.origin_info.db`](./zynq7/mask_hclk_r.origin_info.db)
* [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6 ./zynq7/mask_liob33.db`](./zynq7/mask_liob33.db) * [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6 ./zynq7/mask_liob33.db`](./zynq7/mask_liob33.db)
* [`4b2e654db21ea7a65cd107929aee1d5944b71fdc83bc5f4fc62037f38961b763 ./zynq7/mask_lioi3.db`](./zynq7/mask_lioi3.db) * [`42ff660a9ccb4708ad8fb4806f411a57881b7f6ec2afd7e6d313ccae4a3bc762 ./zynq7/mask_lioi3.db`](./zynq7/mask_lioi3.db)
* [`4b2e654db21ea7a65cd107929aee1d5944b71fdc83bc5f4fc62037f38961b763 ./zynq7/mask_lioi3_tbytesrc.db`](./zynq7/mask_lioi3_tbytesrc.db) * [`42ff660a9ccb4708ad8fb4806f411a57881b7f6ec2afd7e6d313ccae4a3bc762 ./zynq7/mask_lioi3_tbytesrc.db`](./zynq7/mask_lioi3_tbytesrc.db)
* [`4b2e654db21ea7a65cd107929aee1d5944b71fdc83bc5f4fc62037f38961b763 ./zynq7/mask_lioi3_tbyteterm.db`](./zynq7/mask_lioi3_tbyteterm.db) * [`42ff660a9ccb4708ad8fb4806f411a57881b7f6ec2afd7e6d313ccae4a3bc762 ./zynq7/mask_lioi3_tbyteterm.db`](./zynq7/mask_lioi3_tbyteterm.db)
* [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6 ./zynq7/mask_riob33.db`](./zynq7/mask_riob33.db) * [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6 ./zynq7/mask_riob33.db`](./zynq7/mask_riob33.db)
* [`4b2e654db21ea7a65cd107929aee1d5944b71fdc83bc5f4fc62037f38961b763 ./zynq7/mask_rioi3.db`](./zynq7/mask_rioi3.db) * [`42ff660a9ccb4708ad8fb4806f411a57881b7f6ec2afd7e6d313ccae4a3bc762 ./zynq7/mask_rioi3.db`](./zynq7/mask_rioi3.db)
* [`4b2e654db21ea7a65cd107929aee1d5944b71fdc83bc5f4fc62037f38961b763 ./zynq7/mask_rioi3_tbytesrc.db`](./zynq7/mask_rioi3_tbytesrc.db) * [`42ff660a9ccb4708ad8fb4806f411a57881b7f6ec2afd7e6d313ccae4a3bc762 ./zynq7/mask_rioi3_tbytesrc.db`](./zynq7/mask_rioi3_tbytesrc.db)
* [`4b2e654db21ea7a65cd107929aee1d5944b71fdc83bc5f4fc62037f38961b763 ./zynq7/mask_rioi3_tbyteterm.db`](./zynq7/mask_rioi3_tbyteterm.db) * [`42ff660a9ccb4708ad8fb4806f411a57881b7f6ec2afd7e6d313ccae4a3bc762 ./zynq7/mask_rioi3_tbyteterm.db`](./zynq7/mask_rioi3_tbyteterm.db)
* [`d94e4d13df16da498224f0e94deaa310fbf471b6f9ec0ec8b2308fe62fa2eeaf ./zynq7/ppips_bram_int_interface_l.db`](./zynq7/ppips_bram_int_interface_l.db) * [`d94e4d13df16da498224f0e94deaa310fbf471b6f9ec0ec8b2308fe62fa2eeaf ./zynq7/ppips_bram_int_interface_l.db`](./zynq7/ppips_bram_int_interface_l.db)
* [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./zynq7/ppips_bram_int_interface_l.origin_info.db`](./zynq7/ppips_bram_int_interface_l.origin_info.db) * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./zynq7/ppips_bram_int_interface_l.origin_info.db`](./zynq7/ppips_bram_int_interface_l.origin_info.db)
* [`b48d766ac6f9dd0e21280d3a04dd448ea39016143309c0c7867fc00d730a59ae ./zynq7/ppips_bram_int_interface_r.db`](./zynq7/ppips_bram_int_interface_r.db) * [`b48d766ac6f9dd0e21280d3a04dd448ea39016143309c0c7867fc00d730a59ae ./zynq7/ppips_bram_int_interface_r.db`](./zynq7/ppips_bram_int_interface_r.db)
@ -1140,9 +1140,9 @@ Results have checksums;
* [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9 ./zynq7/segbits_hclk_r.db`](./zynq7/segbits_hclk_r.db) * [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9 ./zynq7/segbits_hclk_r.db`](./zynq7/segbits_hclk_r.db)
* [`61d05145f3613042e8f0c1d97d63f6c185cfb66df609b621b44422ebb27c77a0 ./zynq7/segbits_hclk_r.origin_info.db`](./zynq7/segbits_hclk_r.origin_info.db) * [`61d05145f3613042e8f0c1d97d63f6c185cfb66df609b621b44422ebb27c77a0 ./zynq7/segbits_hclk_r.origin_info.db`](./zynq7/segbits_hclk_r.origin_info.db)
* [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520 ./zynq7/segbits_int_l.db`](./zynq7/segbits_int_l.db) * [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520 ./zynq7/segbits_int_l.db`](./zynq7/segbits_int_l.db)
* [`57c86786f96c79410d6b4587c60b26dab0f404d9a41a0665ff2d4091f7a96fb4 ./zynq7/segbits_int_l.origin_info.db`](./zynq7/segbits_int_l.origin_info.db) * [`85707fb23013a3fb4f92874b07346e80f58697b5843ddbd8f21723bc1450cc24 ./zynq7/segbits_int_l.origin_info.db`](./zynq7/segbits_int_l.origin_info.db)
* [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556 ./zynq7/segbits_int_r.db`](./zynq7/segbits_int_r.db) * [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556 ./zynq7/segbits_int_r.db`](./zynq7/segbits_int_r.db)
* [`66008bbd9dac18783ce0c3d698f37771ced2a5e291ccc55a1a4f55bb23e80e1e ./zynq7/segbits_int_r.origin_info.db`](./zynq7/segbits_int_r.origin_info.db) * [`68e6d4e12fbdd0164f2328ac0620dc4ffbe597e8cb95bd1755b561b1ec207a0a ./zynq7/segbits_int_r.origin_info.db`](./zynq7/segbits_int_r.origin_info.db)
* [`392e91def4df6eebb3ce5ed15570c01f6090be793a79054e1880549082eb6f23 ./zynq7/segbits_liob33.db`](./zynq7/segbits_liob33.db) * [`392e91def4df6eebb3ce5ed15570c01f6090be793a79054e1880549082eb6f23 ./zynq7/segbits_liob33.db`](./zynq7/segbits_liob33.db)
* [`0fca9c6530589b14c77b738e68c63ed4246713e44e1e699e153b69907e77e09e ./zynq7/segbits_liob33.origin_info.db`](./zynq7/segbits_liob33.origin_info.db) * [`0fca9c6530589b14c77b738e68c63ed4246713e44e1e699e153b69907e77e09e ./zynq7/segbits_liob33.origin_info.db`](./zynq7/segbits_liob33.origin_info.db)
* [`c9dfa75f8b565b3c47813cdf7f1df2aa7c59402f41396e939dd97ec68f7638d8 ./zynq7/segbits_lioi3.db`](./zynq7/segbits_lioi3.db) * [`c9dfa75f8b565b3c47813cdf7f1df2aa7c59402f41396e939dd97ec68f7638d8 ./zynq7/segbits_lioi3.db`](./zynq7/segbits_lioi3.db)
@ -1330,8 +1330,8 @@ Results have checksums;
* [`bda848e132cf93158addf5db6e449dd5d79050155bd2ba52ccad7bd3c1607ec4 ./zynq7/timings/CMT_TOP_R_LOWER_T.sdf`](./zynq7/timings/CMT_TOP_R_LOWER_T.sdf) * [`bda848e132cf93158addf5db6e449dd5d79050155bd2ba52ccad7bd3c1607ec4 ./zynq7/timings/CMT_TOP_R_LOWER_T.sdf`](./zynq7/timings/CMT_TOP_R_LOWER_T.sdf)
* [`e56222b18e7fabf7473656f7446958e93373a3bf956ca75968d26f9c652fa14e ./zynq7/timings/CMT_TOP_R_UPPER_B.sdf`](./zynq7/timings/CMT_TOP_R_UPPER_B.sdf) * [`e56222b18e7fabf7473656f7446958e93373a3bf956ca75968d26f9c652fa14e ./zynq7/timings/CMT_TOP_R_UPPER_B.sdf`](./zynq7/timings/CMT_TOP_R_UPPER_B.sdf)
* [`24408756edd72f9c82dc2badb3e94e372916c00c407e86a88db1274f8951d721 ./zynq7/timings/CMT_TOP_R_UPPER_T.sdf`](./zynq7/timings/CMT_TOP_R_UPPER_T.sdf) * [`24408756edd72f9c82dc2badb3e94e372916c00c407e86a88db1274f8951d721 ./zynq7/timings/CMT_TOP_R_UPPER_T.sdf`](./zynq7/timings/CMT_TOP_R_UPPER_T.sdf)
* [`f9dc790354ec061813a023ae9e01a80d6db8f0800d7550e86966aea5be26f903 ./zynq7/timings/DSP_L.sdf`](./zynq7/timings/DSP_L.sdf) * [`a1945d3cc9f7a422691d7cad098dc61cf6804bdbb8df8c572576d651e0f44c44 ./zynq7/timings/DSP_L.sdf`](./zynq7/timings/DSP_L.sdf)
* [`f9dc790354ec061813a023ae9e01a80d6db8f0800d7550e86966aea5be26f903 ./zynq7/timings/DSP_R.sdf`](./zynq7/timings/DSP_R.sdf) * [`a1945d3cc9f7a422691d7cad098dc61cf6804bdbb8df8c572576d651e0f44c44 ./zynq7/timings/DSP_R.sdf`](./zynq7/timings/DSP_R.sdf)
* [`5afccb72fdc7e9a452988e5db5dd7517ab38792ba21af020f9f1885f686ae5a3 ./zynq7/timings/HCLK_CMT.sdf`](./zynq7/timings/HCLK_CMT.sdf) * [`5afccb72fdc7e9a452988e5db5dd7517ab38792ba21af020f9f1885f686ae5a3 ./zynq7/timings/HCLK_CMT.sdf`](./zynq7/timings/HCLK_CMT.sdf)
* [`5afccb72fdc7e9a452988e5db5dd7517ab38792ba21af020f9f1885f686ae5a3 ./zynq7/timings/HCLK_CMT_L.sdf`](./zynq7/timings/HCLK_CMT_L.sdf) * [`5afccb72fdc7e9a452988e5db5dd7517ab38792ba21af020f9f1885f686ae5a3 ./zynq7/timings/HCLK_CMT_L.sdf`](./zynq7/timings/HCLK_CMT_L.sdf)
* [`b5d5ca72d453879fca2bf2470fb0a670ebfb38d6e85cdbfdb3967e2e4f59ee73 ./zynq7/timings/HCLK_IOI3.sdf`](./zynq7/timings/HCLK_IOI3.sdf) * [`b5d5ca72d453879fca2bf2470fb0a670ebfb38d6e85cdbfdb3967e2e4f59ee73 ./zynq7/timings/HCLK_IOI3.sdf`](./zynq7/timings/HCLK_IOI3.sdf)
@ -1351,8 +1351,8 @@ Results have checksums;
* [`3bb5a39c36bcd83a540200072baa4c36057960fa1e35f5fcba875f2a755c34a1 ./zynq7/timings/RIOI3_TBYTETERM.sdf`](./zynq7/timings/RIOI3_TBYTETERM.sdf) * [`3bb5a39c36bcd83a540200072baa4c36057960fa1e35f5fcba875f2a755c34a1 ./zynq7/timings/RIOI3_TBYTETERM.sdf`](./zynq7/timings/RIOI3_TBYTETERM.sdf)
* [`feb5cf787894379d158c5218ba44af20458c8008a1e75e30df00adde8aa97108 ./zynq7/timings/carry4_slicel.sdf`](./zynq7/timings/carry4_slicel.sdf) * [`feb5cf787894379d158c5218ba44af20458c8008a1e75e30df00adde8aa97108 ./zynq7/timings/carry4_slicel.sdf`](./zynq7/timings/carry4_slicel.sdf)
* [`626d9e188a1c4874f7ac657e82c64df8d52f819624e8ee4f9ed9e557d85ad3f2 ./zynq7/timings/carry4_slicem.sdf`](./zynq7/timings/carry4_slicem.sdf) * [`626d9e188a1c4874f7ac657e82c64df8d52f819624e8ee4f9ed9e557d85ad3f2 ./zynq7/timings/carry4_slicem.sdf`](./zynq7/timings/carry4_slicem.sdf)
* [`ee750af8a355de7fdbcee19e3c216068912f5502b9ad342090a35ba9cce90038 ./zynq7/timings/slicel.sdf`](./zynq7/timings/slicel.sdf) * [`fd31d66077f869d01f13d9fabbd0dcd38b4aab0322179ecf9ac190a3b70c5456 ./zynq7/timings/slicel.sdf`](./zynq7/timings/slicel.sdf)
* [`37f7377698f69c400e009e7134fd5752fb93724ffa74dde46d076fb23ef914bb ./zynq7/timings/slicem.sdf`](./zynq7/timings/slicem.sdf) * [`3d2da5714d8c81165fa51403fb719b3ddd9e7ea7ab79280ae4e157d11a29172e ./zynq7/timings/slicem.sdf`](./zynq7/timings/slicem.sdf)
* [`2e714cd17c9768566a3a262edf9665a5bdb3e5bfa9d4756ac6d224b44f24a107 ./zynq7/xc7z010clg400-1/package_pins.csv`](./zynq7/xc7z010clg400-1/package_pins.csv) * [`2e714cd17c9768566a3a262edf9665a5bdb3e5bfa9d4756ac6d224b44f24a107 ./zynq7/xc7z010clg400-1/package_pins.csv`](./zynq7/xc7z010clg400-1/package_pins.csv)
* [`1754ec1c7a8e0447a116984505cc422819d3be06389527de96bf192c5175d095 ./zynq7/xc7z010clg400-1/part.json`](./zynq7/xc7z010clg400-1/part.json) * [`1754ec1c7a8e0447a116984505cc422819d3be06389527de96bf192c5175d095 ./zynq7/xc7z010clg400-1/part.json`](./zynq7/xc7z010clg400-1/part.json)
* [`43a136f26603c51bd97e9489d223bbc80f278fcc234225ed9fde404402f22683 ./zynq7/xc7z010clg400-1/part.yaml`](./zynq7/xc7z010clg400-1/part.yaml) * [`43a136f26603c51bd97e9489d223bbc80f278fcc234225ed9fde404402f22683 ./zynq7/xc7z010clg400-1/part.yaml`](./zynq7/xc7z010clg400-1/part.yaml)

3
artix7/mask_lioi3.db
View File

@ -1,11 +1,12 @@
bit 25_07 bit 25_07
bit 25_20 bit 25_20
bit 25_21 bit 25_21
bit 25_23
bit 25_24
bit 25_31 bit 25_31
bit 25_32 bit 25_32
bit 25_34 bit 25_34
bit 25_35 bit 25_35
bit 25_39
bit 25_47 bit 25_47
bit 25_48 bit 25_48
bit 25_51 bit 25_51

3
artix7/mask_lioi3_tbytesrc.db
View File

@ -1,11 +1,12 @@
bit 25_07 bit 25_07
bit 25_20 bit 25_20
bit 25_21 bit 25_21
bit 25_23
bit 25_24
bit 25_31 bit 25_31
bit 25_32 bit 25_32
bit 25_34 bit 25_34
bit 25_35 bit 25_35
bit 25_39
bit 25_47 bit 25_47
bit 25_48 bit 25_48
bit 25_51 bit 25_51

3
artix7/mask_lioi3_tbyteterm.db
View File

@ -1,11 +1,12 @@
bit 25_07 bit 25_07
bit 25_20 bit 25_20
bit 25_21 bit 25_21
bit 25_23
bit 25_24
bit 25_31 bit 25_31
bit 25_32 bit 25_32
bit 25_34 bit 25_34
bit 25_35 bit 25_35
bit 25_39
bit 25_47 bit 25_47
bit 25_48 bit 25_48
bit 25_51 bit 25_51

3
artix7/mask_rioi3.db
View File

@ -1,11 +1,12 @@
bit 25_07 bit 25_07
bit 25_20 bit 25_20
bit 25_21 bit 25_21
bit 25_23
bit 25_24
bit 25_31 bit 25_31
bit 25_32 bit 25_32
bit 25_34 bit 25_34
bit 25_35 bit 25_35
bit 25_39
bit 25_47 bit 25_47
bit 25_48 bit 25_48
bit 25_51 bit 25_51

3
artix7/mask_rioi3_tbytesrc.db
View File

@ -1,11 +1,12 @@
bit 25_07 bit 25_07
bit 25_20 bit 25_20
bit 25_21 bit 25_21
bit 25_23
bit 25_24
bit 25_31 bit 25_31
bit 25_32 bit 25_32
bit 25_34 bit 25_34
bit 25_35 bit 25_35
bit 25_39
bit 25_47 bit 25_47
bit 25_48 bit 25_48
bit 25_51 bit 25_51

3
artix7/mask_rioi3_tbyteterm.db
View File

@ -1,11 +1,12 @@
bit 25_07 bit 25_07
bit 25_20 bit 25_20
bit 25_21 bit 25_21
bit 25_23
bit 25_24
bit 25_31 bit 25_31
bit 25_32 bit 25_32
bit 25_34 bit 25_34
bit 25_35 bit 25_35
bit 25_39
bit 25_47 bit 25_47
bit 25_48 bit 25_48
bit 25_51 bit 25_51

12
artix7/segbits_int_l.origin_info.db
View File

@ -170,7 +170,7 @@ INT_L.BYP_ALT7.BYP_BOUNCE2 origin:050-pip-seed !22_63 !23_63 !24_63 21_63 25_63
INT_L.BYP_ALT7.BYP_BOUNCE6 origin:050-pip-seed !22_63 !23_63 !25_63 21_63 24_63 INT_L.BYP_ALT7.BYP_BOUNCE6 origin:050-pip-seed !22_63 !23_63 !25_63 21_63 24_63
INT_L.BYP_ALT7.EL1END_S3_0 origin:050-pip-seed !23_63 17_63 22_63 24_63 25_63 INT_L.BYP_ALT7.EL1END_S3_0 origin:050-pip-seed !23_63 17_63 22_63 24_63 25_63
INT_L.BYP_ALT7.FAN_BOUNCE_S3_4 origin:050-pip-seed !23_63 21_63 22_63 24_63 25_63 INT_L.BYP_ALT7.FAN_BOUNCE_S3_4 origin:050-pip-seed !23_63 21_63 22_63 24_63 25_63
INT_L.BYP_ALT7.FAN_BOUNCE_S3_6 origin:056-pip-rem !22_63 21_63 23_63 24_63 25_63 INT_L.BYP_ALT7.FAN_BOUNCE_S3_6 origin:050-pip-seed !22_63 21_63 23_63 24_63 25_63
INT_L.BYP_ALT7.LOGIC_OUTS_L3 origin:051-pip-imuxlout-bypalts !22_63 20_63 23_63 24_63 25_63 INT_L.BYP_ALT7.LOGIC_OUTS_L3 origin:051-pip-imuxlout-bypalts !22_63 20_63 23_63 24_63 25_63
INT_L.BYP_ALT7.LOGIC_OUTS_L15 origin:051-pip-imuxlout-bypalts !23_63 20_63 22_63 24_63 25_63 INT_L.BYP_ALT7.LOGIC_OUTS_L15 origin:051-pip-imuxlout-bypalts !23_63 20_63 22_63 24_63 25_63
INT_L.BYP_ALT7.LOGIC_OUTS_L21 origin:051-pip-imuxlout-bypalts !22_63 !23_63 !24_63 20_63 25_63 INT_L.BYP_ALT7.LOGIC_OUTS_L21 origin:051-pip-imuxlout-bypalts !22_63 !23_63 !24_63 20_63 25_63
@ -1917,7 +1917,7 @@ INT_L.EE4BEG2.SE6END2 origin:050-pip-seed 03_41 06_40
INT_L.EE4BEG2.SS2END2 origin:050-pip-seed 03_40 05_43 INT_L.EE4BEG2.SS2END2 origin:050-pip-seed 03_40 05_43
INT_L.EE4BEG2.SS6END2 origin:050-pip-seed 05_43 06_40 INT_L.EE4BEG2.SS6END2 origin:050-pip-seed 05_43 06_40
INT_L.EE4BEG2.SW2END2 origin:050-pip-seed 02_41 05_43 INT_L.EE4BEG2.SW2END2 origin:050-pip-seed 02_41 05_43
INT_L.EE4BEG2.SW6END2 origin:050-pip-seed 05_40 05_43 INT_L.EE4BEG2.SW6END2 origin:056-pip-rem 05_40 05_43
INT_L.EE4BEG3.LOGIC_OUTS_L3 origin:050-pip-seed 02_57 07_57 INT_L.EE4BEG3.LOGIC_OUTS_L3 origin:050-pip-seed 02_57 07_57
INT_L.EE4BEG3.LOGIC_OUTS_L7 origin:050-pip-seed 02_57 04_58 INT_L.EE4BEG3.LOGIC_OUTS_L7 origin:050-pip-seed 02_57 04_58
INT_L.EE4BEG3.LOGIC_OUTS_L11 origin:050-pip-seed 03_56 04_58 INT_L.EE4BEG3.LOGIC_OUTS_L11 origin:050-pip-seed 03_56 04_58
@ -2491,7 +2491,7 @@ INT_L.NN6BEG3.NN6END3 origin:050-pip-seed 02_54 07_55
INT_L.NN6BEG3.NW2END3 origin:050-pip-seed 03_54 04_52 INT_L.NN6BEG3.NW2END3 origin:050-pip-seed 03_54 04_52
INT_L.NN6BEG3.NW6END3 origin:050-pip-seed 04_52 07_55 INT_L.NN6BEG3.NW6END3 origin:050-pip-seed 04_52 07_55
INT_L.NN6BEG3.SE2END3 origin:050-pip-seed 03_54 05_54 INT_L.NN6BEG3.SE2END3 origin:050-pip-seed 03_54 05_54
INT_L.NN6BEG3.SE6END3 origin:050-pip-seed 05_54 07_55 INT_L.NN6BEG3.SE6END3 origin:056-pip-rem 05_54 07_55
INT_L.NN6BEG3.WW2END2 origin:050-pip-seed 02_55 04_52 INT_L.NN6BEG3.WW2END2 origin:050-pip-seed 02_55 04_52
INT_L.NN6BEG3.WW4END3 origin:050-pip-seed 04_52 04_55 INT_L.NN6BEG3.WW4END3 origin:050-pip-seed 04_52 04_55
INT_L.NR1BEG0.LOGIC_OUTS_L0 origin:050-pip-seed 11_07 14_07 INT_L.NR1BEG0.LOGIC_OUTS_L0 origin:050-pip-seed 11_07 14_07
@ -2662,7 +2662,7 @@ INT_L.NW6BEG0.LOGIC_OUTS_L18 origin:050-pip-seed 05_01 07_03
INT_L.NW6BEG0.LOGIC_OUTS_L22 origin:050-pip-seed 06_02 07_03 INT_L.NW6BEG0.LOGIC_OUTS_L22 origin:050-pip-seed 06_02 07_03
INT_L.NW6BEG0.LV_L0 origin:056-pip-rem 04_03 06_02 INT_L.NW6BEG0.LV_L0 origin:056-pip-rem 04_03 06_02
INT_L.NW6BEG0.SS2END_N0_3 origin:050-pip-seed 02_03 04_00 INT_L.NW6BEG0.SS2END_N0_3 origin:050-pip-seed 02_03 04_00
INT_L.NW6BEG0.SS6END_N0_3 origin:056-pip-rem 04_00 07_03 INT_L.NW6BEG0.SS6END_N0_3 origin:050-pip-seed 04_00 07_03
INT_L.NW6BEG0.SW2END_N0_3 origin:050-pip-seed 03_02 04_00 INT_L.NW6BEG0.SW2END_N0_3 origin:050-pip-seed 03_02 04_00
INT_L.NW6BEG0.SW6END_N0_3 origin:050-pip-seed 04_00 04_03 INT_L.NW6BEG0.SW6END_N0_3 origin:050-pip-seed 04_00 04_03
INT_L.NW6BEG0.WW2END_N0_3 origin:050-pip-seed 02_02 02_03 INT_L.NW6BEG0.WW2END_N0_3 origin:050-pip-seed 02_02 02_03
@ -3302,7 +3302,7 @@ INT_L.SW6BEG1.LOGIC_OUTS_L19 origin:050-pip-seed 06_28 07_29
INT_L.SW6BEG1.LOGIC_OUTS_L23 origin:050-pip-seed 04_30 06_28 INT_L.SW6BEG1.LOGIC_OUTS_L23 origin:050-pip-seed 04_30 06_28
INT_L.SW6BEG1.LV_L9 origin:056-pip-rem 04_30 05_28 INT_L.SW6BEG1.LV_L9 origin:056-pip-rem 04_30 05_28
INT_L.SW6BEG1.EE2END1 origin:050-pip-seed 03_28 04_29 INT_L.SW6BEG1.EE2END1 origin:050-pip-seed 03_28 04_29
INT_L.SW6BEG1.EE4END1 origin:050-pip-seed 04_29 05_28 INT_L.SW6BEG1.EE4END1 origin:056-pip-rem 04_29 05_28
INT_L.SW6BEG1.LH6 origin:056-pip-rem 05_28 07_29 INT_L.SW6BEG1.LH6 origin:056-pip-rem 05_28 07_29
INT_L.SW6BEG1.NW2END2 origin:050-pip-seed 02_29 05_31 INT_L.SW6BEG1.NW2END2 origin:050-pip-seed 02_29 05_31
INT_L.SW6BEG1.NW6END2 origin:050-pip-seed 05_31 06_28 INT_L.SW6BEG1.NW6END2 origin:050-pip-seed 05_31 06_28
@ -3323,7 +3323,7 @@ INT_L.SW6BEG2.LOGIC_OUTS_L20 origin:050-pip-seed 06_44 07_45
INT_L.SW6BEG2.LVB_L0 origin:056-pip-rem 04_46 05_44 INT_L.SW6BEG2.LVB_L0 origin:056-pip-rem 04_46 05_44
INT_L.SW6BEG2.LVB_L12 origin:056-pip-rem 05_44 07_45 INT_L.SW6BEG2.LVB_L12 origin:056-pip-rem 05_44 07_45
INT_L.SW6BEG2.EE2END2 origin:050-pip-seed 03_44 04_45 INT_L.SW6BEG2.EE2END2 origin:050-pip-seed 03_44 04_45
INT_L.SW6BEG2.EE4END2 origin:056-pip-rem 04_45 05_44 INT_L.SW6BEG2.EE4END2 origin:050-pip-seed 04_45 05_44
INT_L.SW6BEG2.NW2END3 origin:050-pip-seed 02_45 05_47 INT_L.SW6BEG2.NW2END3 origin:050-pip-seed 02_45 05_47
INT_L.SW6BEG2.NW6END3 origin:050-pip-seed 05_47 06_44 INT_L.SW6BEG2.NW6END3 origin:050-pip-seed 05_47 06_44
INT_L.SW6BEG2.SE2END2 origin:050-pip-seed 02_45 04_45 INT_L.SW6BEG2.SE2END2 origin:050-pip-seed 02_45 04_45

2
artix7/segbits_int_r.db
View File

@ -1916,7 +1916,7 @@ INT_R.IMUX43.FAN_BOUNCE3 20_30 !22_30 23_30 24_30 25_30
INT_R.IMUX43.FAN_BOUNCE5 20_30 22_30 !23_30 24_30 25_30 INT_R.IMUX43.FAN_BOUNCE5 20_30 22_30 !23_30 24_30 25_30
INT_R.IMUX43.LOGIC_OUTS1 21_30 22_30 !23_30 24_30 25_30 INT_R.IMUX43.LOGIC_OUTS1 21_30 22_30 !23_30 24_30 25_30
INT_R.IMUX43.LOGIC_OUTS13 21_30 !22_30 23_30 24_30 25_30 INT_R.IMUX43.LOGIC_OUTS13 21_30 !22_30 23_30 24_30 25_30
INT_R.IMUX43.LOGIC_OUTS23 20_00 21_30 !22_30 !23_30 24_30 !25_30 INT_R.IMUX43.LOGIC_OUTS23 21_30 !22_30 !23_30 24_30 !25_30
INT_R.IMUX43.EE2END1 19_31 !22_30 !23_30 !24_30 25_30 INT_R.IMUX43.EE2END1 19_31 !22_30 !23_30 !24_30 25_30
INT_R.IMUX43.EL1END2 19_31 !22_30 23_30 24_30 25_30 INT_R.IMUX43.EL1END2 19_31 !22_30 23_30 24_30 25_30
INT_R.IMUX43.ER1END1 18_31 22_30 !23_30 24_30 25_30 INT_R.IMUX43.ER1END1 18_31 22_30 !23_30 24_30 25_30

24
artix7/segbits_int_r.origin_info.db
View File

@ -237,7 +237,7 @@ INT_R.FAN_ALT0.FAN_BOUNCE4 origin:050-pip-seed !22_00 20_00 23_00 24_00 25_00
INT_R.FAN_ALT0.FAN_BOUNCE6 origin:050-pip-seed !23_00 20_00 22_00 24_00 25_00 INT_R.FAN_ALT0.FAN_BOUNCE6 origin:050-pip-seed !23_00 20_00 22_00 24_00 25_00
INT_R.FAN_ALT0.LOGIC_OUTS0 origin:050-pip-seed !23_00 21_00 22_00 24_00 25_00 INT_R.FAN_ALT0.LOGIC_OUTS0 origin:050-pip-seed !23_00 21_00 22_00 24_00 25_00
INT_R.FAN_ALT0.LOGIC_OUTS12 origin:050-pip-seed !22_00 21_00 23_00 24_00 25_00 INT_R.FAN_ALT0.LOGIC_OUTS12 origin:050-pip-seed !22_00 21_00 23_00 24_00 25_00
INT_R.FAN_ALT0.LOGIC_OUTS22 origin:050-pip-seed !22_00 !23_00 !25_00 21_00 24_00 INT_R.FAN_ALT0.LOGIC_OUTS22 origin:056-pip-rem !22_00 !23_00 !25_00 21_00 24_00
INT_R.FAN_ALT0.SR1END_N3_3 origin:050-pip-seed !23_00 19_01 22_00 24_00 25_00 INT_R.FAN_ALT0.SR1END_N3_3 origin:050-pip-seed !23_00 19_01 22_00 24_00 25_00
INT_R.FAN_ALT0.SS2END_N0_3 origin:050-pip-seed !22_00 !23_00 !24_00 17_00 25_00 INT_R.FAN_ALT0.SS2END_N0_3 origin:050-pip-seed !22_00 !23_00 !24_00 17_00 25_00
INT_R.FAN_ALT0.SW2END_N0_3 origin:050-pip-seed !22_00 !23_00 !25_00 17_00 24_00 INT_R.FAN_ALT0.SW2END_N0_3 origin:050-pip-seed !22_00 !23_00 !25_00 17_00 24_00
@ -328,11 +328,11 @@ INT_R.FAN_ALT3.WR1END3 origin:050-pip-seed !23_56 16_56 22_56 24_56 25_56
INT_R.FAN_ALT3.WW2END3 origin:050-pip-seed !22_56 !23_56 !24_56 19_57 25_56 INT_R.FAN_ALT3.WW2END3 origin:050-pip-seed !22_56 !23_56 !24_56 19_57 25_56
INT_R.FAN_ALT4.BYP_BOUNCE_N3_3 origin:059-pip-byp-bounce !22_08 !23_08 !24_08 20_08 25_08 INT_R.FAN_ALT4.BYP_BOUNCE_N3_3 origin:059-pip-byp-bounce !22_08 !23_08 !24_08 20_08 25_08
INT_R.FAN_ALT4.BYP_BOUNCE_N3_7 origin:059-pip-byp-bounce !22_08 !23_08 !25_08 20_08 24_08 INT_R.FAN_ALT4.BYP_BOUNCE_N3_7 origin:059-pip-byp-bounce !22_08 !23_08 !25_08 20_08 24_08
INT_R.FAN_ALT4.FAN_BOUNCE2 origin:056-pip-rem !23_08 20_08 22_08 24_08 25_08 INT_R.FAN_ALT4.FAN_BOUNCE2 origin:050-pip-seed !23_08 20_08 22_08 24_08 25_08
INT_R.FAN_ALT4.FAN_BOUNCE7 origin:056-pip-rem !22_08 20_08 23_08 24_08 25_08 INT_R.FAN_ALT4.FAN_BOUNCE7 origin:056-pip-rem !22_08 20_08 23_08 24_08 25_08
INT_R.FAN_ALT4.LOGIC_OUTS4 origin:050-pip-seed !23_08 21_08 22_08 24_08 25_08 INT_R.FAN_ALT4.LOGIC_OUTS4 origin:050-pip-seed !23_08 21_08 22_08 24_08 25_08
INT_R.FAN_ALT4.LOGIC_OUTS8 origin:050-pip-seed !22_08 21_08 23_08 24_08 25_08 INT_R.FAN_ALT4.LOGIC_OUTS8 origin:050-pip-seed !22_08 21_08 23_08 24_08 25_08
INT_R.FAN_ALT4.LOGIC_OUTS18 origin:056-pip-rem !22_08 !23_08 !25_08 21_08 24_08 INT_R.FAN_ALT4.LOGIC_OUTS18 origin:050-pip-seed !22_08 !23_08 !25_08 21_08 24_08
INT_R.FAN_ALT4.SR1BEG_S0 origin:050-pip-seed !23_08 19_09 22_08 24_08 25_08 INT_R.FAN_ALT4.SR1BEG_S0 origin:050-pip-seed !23_08 19_09 22_08 24_08 25_08
INT_R.FAN_ALT4.EE2END0 origin:050-pip-seed !22_08 !23_08 !24_08 16_08 25_08 INT_R.FAN_ALT4.EE2END0 origin:050-pip-seed !22_08 !23_08 !24_08 16_08 25_08
INT_R.FAN_ALT4.EL1END0 origin:050-pip-seed !22_08 16_08 23_08 24_08 25_08 INT_R.FAN_ALT4.EL1END0 origin:050-pip-seed !22_08 16_08 23_08 24_08 25_08
@ -665,7 +665,7 @@ INT_R.EE4BEG0.SE6END0 origin:050-pip-seed 03_09 06_08
INT_R.EE4BEG0.SS2END0 origin:050-pip-seed 03_08 05_11 INT_R.EE4BEG0.SS2END0 origin:050-pip-seed 03_08 05_11
INT_R.EE4BEG0.SS6END0 origin:050-pip-seed 05_11 06_08 INT_R.EE4BEG0.SS6END0 origin:050-pip-seed 05_11 06_08
INT_R.EE4BEG0.SW2END0 origin:050-pip-seed 02_09 05_11 INT_R.EE4BEG0.SW2END0 origin:050-pip-seed 02_09 05_11
INT_R.EE4BEG0.SW6END0 origin:056-pip-rem 05_08 05_11 INT_R.EE4BEG0.SW6END0 origin:050-pip-seed 05_08 05_11
INT_R.EE4BEG1.LOGIC_OUTS1 origin:050-pip-seed 02_25 07_25 INT_R.EE4BEG1.LOGIC_OUTS1 origin:050-pip-seed 02_25 07_25
INT_R.EE4BEG1.LOGIC_OUTS5 origin:050-pip-seed 02_25 04_26 INT_R.EE4BEG1.LOGIC_OUTS5 origin:050-pip-seed 02_25 04_26
INT_R.EE4BEG1.LOGIC_OUTS9 origin:050-pip-seed 03_24 04_26 INT_R.EE4BEG1.LOGIC_OUTS9 origin:050-pip-seed 03_24 04_26
@ -685,7 +685,7 @@ INT_R.EE4BEG1.SE6END1 origin:050-pip-seed 03_25 06_24
INT_R.EE4BEG1.SS2END1 origin:050-pip-seed 03_24 05_27 INT_R.EE4BEG1.SS2END1 origin:050-pip-seed 03_24 05_27
INT_R.EE4BEG1.SS6END1 origin:050-pip-seed 05_27 06_24 INT_R.EE4BEG1.SS6END1 origin:050-pip-seed 05_27 06_24
INT_R.EE4BEG1.SW2END1 origin:050-pip-seed 02_25 05_27 INT_R.EE4BEG1.SW2END1 origin:050-pip-seed 02_25 05_27
INT_R.EE4BEG1.SW6END1 origin:050-pip-seed 05_24 05_27 INT_R.EE4BEG1.SW6END1 origin:056-pip-rem 05_24 05_27
INT_R.EE4BEG2.LOGIC_OUTS2 origin:050-pip-seed 02_41 04_42 INT_R.EE4BEG2.LOGIC_OUTS2 origin:050-pip-seed 02_41 04_42
INT_R.EE4BEG2.LOGIC_OUTS6 origin:050-pip-seed 02_41 07_41 INT_R.EE4BEG2.LOGIC_OUTS6 origin:050-pip-seed 02_41 07_41
INT_R.EE4BEG2.LOGIC_OUTS10 origin:050-pip-seed 03_40 07_41 INT_R.EE4BEG2.LOGIC_OUTS10 origin:050-pip-seed 03_40 07_41
@ -725,7 +725,7 @@ INT_R.EE4BEG3.SE6END3 origin:050-pip-seed 03_57 06_56
INT_R.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59 INT_R.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59
INT_R.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56 INT_R.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56
INT_R.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59 INT_R.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59
INT_R.EE4BEG3.SW6END3 origin:056-pip-rem 05_56 05_59 INT_R.EE4BEG3.SW6END3 origin:050-pip-seed 05_56 05_59
INT_R.EL1BEG0.LOGIC_OUTS1 origin:050-pip-seed 07_20 14_21 INT_R.EL1BEG0.LOGIC_OUTS1 origin:050-pip-seed 07_20 14_21
INT_R.EL1BEG0.LOGIC_OUTS5 origin:050-pip-seed 11_21 14_21 INT_R.EL1BEG0.LOGIC_OUTS5 origin:050-pip-seed 11_21 14_21
INT_R.EL1BEG0.LOGIC_OUTS9 origin:050-pip-seed 10_21 13_21 INT_R.EL1BEG0.LOGIC_OUTS9 origin:050-pip-seed 10_21 13_21
@ -1916,7 +1916,7 @@ INT_R.IMUX43.FAN_BOUNCE3 origin:050-pip-seed !22_30 20_30 23_30 24_30 25_30
INT_R.IMUX43.FAN_BOUNCE5 origin:050-pip-seed !23_30 20_30 22_30 24_30 25_30 INT_R.IMUX43.FAN_BOUNCE5 origin:050-pip-seed !23_30 20_30 22_30 24_30 25_30
INT_R.IMUX43.LOGIC_OUTS1 origin:051-pip-imuxlout-bypalts !23_30 21_30 22_30 24_30 25_30 INT_R.IMUX43.LOGIC_OUTS1 origin:051-pip-imuxlout-bypalts !23_30 21_30 22_30 24_30 25_30
INT_R.IMUX43.LOGIC_OUTS13 origin:051-pip-imuxlout-bypalts !22_30 21_30 23_30 24_30 25_30 INT_R.IMUX43.LOGIC_OUTS13 origin:051-pip-imuxlout-bypalts !22_30 21_30 23_30 24_30 25_30
INT_R.IMUX43.LOGIC_OUTS23 origin:051-pip-imuxlout-bypalts !22_30 !23_30 !25_30 20_00 21_30 24_30 INT_R.IMUX43.LOGIC_OUTS23 origin:051-pip-imuxlout-bypalts !22_30 !23_30 !25_30 21_30 24_30
INT_R.IMUX43.EE2END1 origin:050-pip-seed !22_30 !23_30 !24_30 19_31 25_30 INT_R.IMUX43.EE2END1 origin:050-pip-seed !22_30 !23_30 !24_30 19_31 25_30
INT_R.IMUX43.EL1END2 origin:050-pip-seed !22_30 19_31 23_30 24_30 25_30 INT_R.IMUX43.EL1END2 origin:050-pip-seed !22_30 19_31 23_30 24_30 25_30
INT_R.IMUX43.ER1END1 origin:050-pip-seed !23_30 18_31 22_30 24_30 25_30 INT_R.IMUX43.ER1END1 origin:050-pip-seed !23_30 18_31 22_30 24_30 25_30
@ -2253,7 +2253,7 @@ INT_R.NE6BEG2.NW6END2 origin:050-pip-seed 04_37 06_36
INT_R.NE6BEG2.SE2END2 origin:050-pip-seed 02_37 05_39 INT_R.NE6BEG2.SE2END2 origin:050-pip-seed 02_37 05_39
INT_R.NE6BEG2.SE6END2 origin:050-pip-seed 05_39 06_36 INT_R.NE6BEG2.SE6END2 origin:050-pip-seed 05_39 06_36
INT_R.NE6BEG2.WW2END1 origin:050-pip-seed 03_36 04_37 INT_R.NE6BEG2.WW2END1 origin:050-pip-seed 03_36 04_37
INT_R.NE6BEG2.WW4END2 origin:050-pip-seed 04_37 05_36 INT_R.NE6BEG2.WW4END2 origin:056-pip-rem 04_37 05_36
INT_R.NE6BEG3.LOGIC_OUTS3 origin:050-pip-seed 02_53 04_54 INT_R.NE6BEG3.LOGIC_OUTS3 origin:050-pip-seed 02_53 04_54
INT_R.NE6BEG3.LOGIC_OUTS7 origin:050-pip-seed 02_53 07_53 INT_R.NE6BEG3.LOGIC_OUTS7 origin:050-pip-seed 02_53 07_53
INT_R.NE6BEG3.LOGIC_OUTS11 origin:050-pip-seed 03_52 07_53 INT_R.NE6BEG3.LOGIC_OUTS11 origin:050-pip-seed 03_52 07_53
@ -3281,7 +3281,7 @@ INT_R.SW6BEG0.LOGIC_OUTS12 origin:050-pip-seed 03_12 07_13
INT_R.SW6BEG0.LOGIC_OUTS18 origin:050-pip-seed 04_14 06_12 INT_R.SW6BEG0.LOGIC_OUTS18 origin:050-pip-seed 04_14 06_12
INT_R.SW6BEG0.LOGIC_OUTS22 origin:050-pip-seed 06_12 07_13 INT_R.SW6BEG0.LOGIC_OUTS22 origin:050-pip-seed 06_12 07_13
INT_R.SW6BEG0.EE2END0 origin:050-pip-seed 03_12 04_13 INT_R.SW6BEG0.EE2END0 origin:050-pip-seed 03_12 04_13
INT_R.SW6BEG0.EE4END0 origin:050-pip-seed 04_13 05_12 INT_R.SW6BEG0.EE4END0 origin:056-pip-rem 04_13 05_12
INT_R.SW6BEG0.LH12 origin:056-pip-rem 05_12 07_13 INT_R.SW6BEG0.LH12 origin:056-pip-rem 05_12 07_13
INT_R.SW6BEG0.LV0 origin:056-pip-rem 04_14 05_12 INT_R.SW6BEG0.LV0 origin:056-pip-rem 04_14 05_12
INT_R.SW6BEG0.NW2END1 origin:050-pip-seed 02_13 05_15 INT_R.SW6BEG0.NW2END1 origin:050-pip-seed 02_13 05_15
@ -3321,7 +3321,7 @@ INT_R.SW6BEG2.LOGIC_OUTS14 origin:050-pip-seed 03_44 07_45
INT_R.SW6BEG2.LOGIC_OUTS16 origin:050-pip-seed 04_46 06_44 INT_R.SW6BEG2.LOGIC_OUTS16 origin:050-pip-seed 04_46 06_44
INT_R.SW6BEG2.LOGIC_OUTS20 origin:050-pip-seed 06_44 07_45 INT_R.SW6BEG2.LOGIC_OUTS20 origin:050-pip-seed 06_44 07_45
INT_R.SW6BEG2.EE2END2 origin:050-pip-seed 03_44 04_45 INT_R.SW6BEG2.EE2END2 origin:050-pip-seed 03_44 04_45
INT_R.SW6BEG2.EE4END2 origin:050-pip-seed 04_45 05_44 INT_R.SW6BEG2.EE4END2 origin:056-pip-rem 04_45 05_44
INT_R.SW6BEG2.LVB0 origin:056-pip-rem 04_46 05_44 INT_R.SW6BEG2.LVB0 origin:056-pip-rem 04_46 05_44
INT_R.SW6BEG2.LVB12 origin:056-pip-rem 05_44 07_45 INT_R.SW6BEG2.LVB12 origin:056-pip-rem 05_44 07_45
INT_R.SW6BEG2.NW2END3 origin:050-pip-seed 02_45 05_47 INT_R.SW6BEG2.NW2END3 origin:050-pip-seed 02_45 05_47
@ -3568,7 +3568,7 @@ INT_R.WW4BEG0.WW2END_N0_3 origin:050-pip-seed 03_00 03_01
INT_R.WW4BEG0.LH12 origin:056-pip-rem 05_00 07_01 INT_R.WW4BEG0.LH12 origin:056-pip-rem 05_00 07_01
INT_R.WW4BEG0.LV0 origin:056-pip-rem 04_02 05_00 INT_R.WW4BEG0.LV0 origin:056-pip-rem 04_02 05_00
INT_R.WW4BEG0.NE2END0 origin:050-pip-seed 02_01 05_03 INT_R.WW4BEG0.NE2END0 origin:050-pip-seed 02_01 05_03
INT_R.WW4BEG0.NE6END0 origin:056-pip-rem 05_00 05_03 INT_R.WW4BEG0.NE6END0 origin:050-pip-seed 05_00 05_03
INT_R.WW4BEG0.NN2END0 origin:050-pip-seed 03_00 05_03 INT_R.WW4BEG0.NN2END0 origin:050-pip-seed 03_00 05_03
INT_R.WW4BEG0.NN6END0 origin:050-pip-seed 05_03 06_00 INT_R.WW4BEG0.NN6END0 origin:050-pip-seed 05_03 06_00
INT_R.WW4BEG0.NW2END0 origin:050-pip-seed 02_01 03_01 INT_R.WW4BEG0.NW2END0 origin:050-pip-seed 02_01 03_01
@ -3603,7 +3603,7 @@ INT_R.WW4BEG2.LOGIC_OUTS20 origin:050-pip-seed 04_34 06_32
INT_R.WW4BEG2.LVB0 origin:056-pip-rem 04_34 05_32 INT_R.WW4BEG2.LVB0 origin:056-pip-rem 04_34 05_32
INT_R.WW4BEG2.LVB12 origin:056-pip-rem 05_32 07_33 INT_R.WW4BEG2.LVB12 origin:056-pip-rem 05_32 07_33
INT_R.WW4BEG2.NE2END2 origin:050-pip-seed 02_33 05_35 INT_R.WW4BEG2.NE2END2 origin:050-pip-seed 02_33 05_35
INT_R.WW4BEG2.NE6END2 origin:056-pip-rem 05_32 05_35 INT_R.WW4BEG2.NE6END2 origin:050-pip-seed 05_32 05_35
INT_R.WW4BEG2.NN2END2 origin:050-pip-seed 03_32 05_35 INT_R.WW4BEG2.NN2END2 origin:050-pip-seed 03_32 05_35
INT_R.WW4BEG2.NN6END2 origin:050-pip-seed 05_35 06_32 INT_R.WW4BEG2.NN6END2 origin:050-pip-seed 05_35 06_32
INT_R.WW4BEG2.NW2END2 origin:050-pip-seed 02_33 03_33 INT_R.WW4BEG2.NW2END2 origin:050-pip-seed 02_33 03_33

84
artix7/timings/DSP_L.sdf
View File

@ -260,13 +260,13 @@
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(DELAY (DELAY
(ABSOLUTE (ABSOLUTE
(IOPATH A CARRYCASCOUT (0.596::2.268)(1.345::5.400)) (IOPATH D CARRYCASCOUT (0.596::2.268)(1.345::5.400))
(IOPATH A CARRYOUT (0.580::2.133)(1.334::5.046)) (IOPATH D CARRYOUT (0.580::2.133)(1.334::5.046))
(IOPATH A MULTSIGNOUT (0.592::2.140)(1.323::5.029)) (IOPATH D MULTSIGNOUT (0.592::2.140)(1.323::5.029))
(IOPATH A P (0.587::2.142)(1.346::5.070)) (IOPATH D P (0.587::2.142)(1.346::5.070))
(IOPATH A PATTERNBDETECT (0.628::2.339)(1.430::5.636)) (IOPATH D PATTERNBDETECT (0.628::2.339)(1.430::5.636))
(IOPATH A PATTERNDETECT (0.628::2.339)(1.430::5.636)) (IOPATH D PATTERNDETECT (0.628::2.339)(1.430::5.636))
(IOPATH A PCOUT (0.580::2.133)(1.334::5.046)) (IOPATH D PCOUT (0.580::2.133)(1.334::5.046))
) )
) )
) )
@ -275,13 +275,13 @@
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(DELAY (DELAY
(ABSOLUTE (ABSOLUTE
(IOPATH A CARRYCASCOUT (0.596::2.268)(1.345::5.400)) (IOPATH D CARRYCASCOUT (0.596::2.268)(1.345::5.400))
(IOPATH A CARRYOUT (0.580::2.133)(1.334::5.046)) (IOPATH D CARRYOUT (0.580::2.133)(1.334::5.046))
(IOPATH A MULTSIGNOUT (0.592::2.140)(1.323::5.029)) (IOPATH D MULTSIGNOUT (0.592::2.140)(1.323::5.029))
(IOPATH A P (0.587::2.142)(1.346::5.070)) (IOPATH D P (0.587::2.142)(1.346::5.070))
(IOPATH A PATTERNBDETECT (0.628::2.339)(1.430::5.636)) (IOPATH D PATTERNBDETECT (0.628::2.339)(1.430::5.636))
(IOPATH A PATTERNDETECT (0.628::2.339)(1.430::5.636)) (IOPATH D PATTERNDETECT (0.628::2.339)(1.430::5.636))
(IOPATH A PCOUT (0.580::2.133)(1.334::5.046)) (IOPATH D PCOUT (0.580::2.133)(1.334::5.046))
) )
) )
) )
@ -289,48 +289,48 @@
(CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET")
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(TIMINGCHECK (TIMINGCHECK
(HOLD A (posedge CLK) (-4.951::-0.994)) (HOLD D (posedge CLK) (-4.951::-0.994))
(SETUP A (posedge CLK) (0.994::4.951)) (SETUP D (posedge CLK) (0.994::4.951))
) )
) )
(CELL (CELL
(CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET")
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(TIMINGCHECK (TIMINGCHECK
(HOLD A (posedge CLK) (-5.342::-1.063)) (HOLD D (posedge CLK) (-5.342::-1.063))
(SETUP A (posedge CLK) (1.063::5.342)) (SETUP D (posedge CLK) (1.063::5.342))
) )
) )
(CELL (CELL
(CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET")
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(TIMINGCHECK (TIMINGCHECK
(HOLD A (posedge CLK) (-4.951::-0.994)) (HOLD D (posedge CLK) (-4.951::-0.994))
(SETUP A (posedge CLK) (0.994::4.951)) (SETUP D (posedge CLK) (0.994::4.951))
) )
) )
(CELL (CELL
(CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET")
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(TIMINGCHECK (TIMINGCHECK
(HOLD A (posedge CLK) (-5.342::-1.063)) (HOLD D (posedge CLK) (-5.342::-1.063))
(SETUP A (posedge CLK) (1.063::5.342)) (SETUP D (posedge CLK) (1.063::5.342))
) )
) )
(CELL (CELL
(CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC") (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC")
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(TIMINGCHECK (TIMINGCHECK
(HOLD A (posedge CLK) (-3.158::-0.249)) (HOLD D (posedge CLK) (-3.158::-0.249))
(SETUP A (posedge CLK) (0.249::3.158)) (SETUP D (posedge CLK) (0.249::3.158))
) )
) )
(CELL (CELL
(CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY") (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY")
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(TIMINGCHECK (TIMINGCHECK
(HOLD A (posedge CLK) (-3.158::-0.249)) (HOLD D (posedge CLK) (-3.158::-0.249))
(SETUP A (posedge CLK) (0.249::3.158)) (SETUP D (posedge CLK) (0.249::3.158))
) )
) )
(CELL (CELL
@ -1837,8 +1837,12 @@
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(DELAY (DELAY
(ABSOLUTE (ABSOLUTE
(IOPATH CLK CARRYCASCOUT (0.705::2.375)(1.531::5.650))
(IOPATH CLK CARRYOUT (0.688::2.241)(1.522::5.297)) (IOPATH CLK CARRYOUT (0.688::2.241)(1.522::5.297))
(IOPATH CLK MULTSIGNOUT (0.700::2.248)(1.510::5.279))
(IOPATH CLK P (0.696::2.251)(1.533::5.320)) (IOPATH CLK P (0.696::2.251)(1.533::5.320))
(IOPATH CLK PATTERNBDETECT (0.736::2.447)(1.618::5.885))
(IOPATH CLK PATTERNDETECT (0.736::2.447)(1.618::5.885))
(IOPATH CLK PCOUT (0.717::2.334)(1.575::5.515)) (IOPATH CLK PCOUT (0.717::2.334)(1.575::5.515))
) )
) )
@ -1848,34 +1852,14 @@
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(DELAY (DELAY
(ABSOLUTE (ABSOLUTE
(IOPATH CLK CARRYCASCOUT (0.705::2.375)(1.531::5.650))
(IOPATH CLK CARRYOUT (0.688::2.241)(1.522::5.297)) (IOPATH CLK CARRYOUT (0.688::2.241)(1.522::5.297))
(IOPATH CLK MULTSIGNOUT (0.700::2.248)(1.510::5.279))
(IOPATH CLK P (0.696::2.251)(1.533::5.320)) (IOPATH CLK P (0.696::2.251)(1.533::5.320))
(IOPATH CLK PATTERNBDETECT (0.736::2.447)(1.618::5.885))
(IOPATH CLK PATTERNDETECT (0.736::2.447)(1.618::5.885))
(IOPATH CLK PCOUT (0.717::2.334)(1.575::5.515)) (IOPATH CLK PCOUT (0.717::2.334)(1.575::5.515))
) )
) )
) )
(CELL
(CELLTYPE "DSP48E1DREG_1_A_ADREG_0_DREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC")
(INSTANCE DSP48E1)
(DELAY
(ABSOLUTE
(IOPATH CLK CARRYCASCOUT (0.705::2.375)(1.531::5.650))
(IOPATH CLK MULTSIGNOUT (0.700::2.248)(1.510::5.279))
(IOPATH CLK PATTERNBDETECT (0.736::2.447)(1.618::5.885))
(IOPATH CLK PATTERNDETECT (0.736::2.447)(1.618::5.885))
)
)
)
(CELL
(CELLTYPE "DSP48E1DREG_1_A_ADREG_0_DREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY")
(INSTANCE DSP48E1)
(DELAY
(ABSOLUTE
(IOPATH CLK CARRYCASCOUT (0.705::2.375)(1.531::5.650))
(IOPATH CLK MULTSIGNOUT (0.700::2.248)(1.510::5.279))
(IOPATH CLK PATTERNBDETECT (0.736::2.447)(1.618::5.885))
(IOPATH CLK PATTERNDETECT (0.736::2.447)(1.618::5.885))
)
)
)
) )

84
artix7/timings/DSP_R.sdf
View File

@ -260,13 +260,13 @@
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(DELAY (DELAY
(ABSOLUTE (ABSOLUTE
(IOPATH A CARRYCASCOUT (0.596::2.268)(1.345::5.400)) (IOPATH D CARRYCASCOUT (0.596::2.268)(1.345::5.400))
(IOPATH A CARRYOUT (0.580::2.133)(1.334::5.046)) (IOPATH D CARRYOUT (0.580::2.133)(1.334::5.046))
(IOPATH A MULTSIGNOUT (0.592::2.140)(1.323::5.029)) (IOPATH D MULTSIGNOUT (0.592::2.140)(1.323::5.029))
(IOPATH A P (0.587::2.142)(1.346::5.070)) (IOPATH D P (0.587::2.142)(1.346::5.070))
(IOPATH A PATTERNBDETECT (0.628::2.339)(1.430::5.636)) (IOPATH D PATTERNBDETECT (0.628::2.339)(1.430::5.636))
(IOPATH A PATTERNDETECT (0.628::2.339)(1.430::5.636)) (IOPATH D PATTERNDETECT (0.628::2.339)(1.430::5.636))
(IOPATH A PCOUT (0.580::2.133)(1.334::5.046)) (IOPATH D PCOUT (0.580::2.133)(1.334::5.046))
) )
) )
) )
@ -275,13 +275,13 @@
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(DELAY (DELAY
(ABSOLUTE (ABSOLUTE
(IOPATH A CARRYCASCOUT (0.596::2.268)(1.345::5.400)) (IOPATH D CARRYCASCOUT (0.596::2.268)(1.345::5.400))
(IOPATH A CARRYOUT (0.580::2.133)(1.334::5.046)) (IOPATH D CARRYOUT (0.580::2.133)(1.334::5.046))
(IOPATH A MULTSIGNOUT (0.592::2.140)(1.323::5.029)) (IOPATH D MULTSIGNOUT (0.592::2.140)(1.323::5.029))
(IOPATH A P (0.587::2.142)(1.346::5.070)) (IOPATH D P (0.587::2.142)(1.346::5.070))
(IOPATH A PATTERNBDETECT (0.628::2.339)(1.430::5.636)) (IOPATH D PATTERNBDETECT (0.628::2.339)(1.430::5.636))
(IOPATH A PATTERNDETECT (0.628::2.339)(1.430::5.636)) (IOPATH D PATTERNDETECT (0.628::2.339)(1.430::5.636))
(IOPATH A PCOUT (0.580::2.133)(1.334::5.046)) (IOPATH D PCOUT (0.580::2.133)(1.334::5.046))
) )
) )
) )
@ -289,48 +289,48 @@
(CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET")
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(TIMINGCHECK (TIMINGCHECK
(HOLD A (posedge CLK) (-4.951::-0.994)) (HOLD D (posedge CLK) (-4.951::-0.994))
(SETUP A (posedge CLK) (0.994::4.951)) (SETUP D (posedge CLK) (0.994::4.951))
) )
) )
(CELL (CELL
(CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET")
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(TIMINGCHECK (TIMINGCHECK
(HOLD A (posedge CLK) (-5.342::-1.063)) (HOLD D (posedge CLK) (-5.342::-1.063))
(SETUP A (posedge CLK) (1.063::5.342)) (SETUP D (posedge CLK) (1.063::5.342))
) )
) )
(CELL (CELL
(CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET")
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(TIMINGCHECK (TIMINGCHECK
(HOLD A (posedge CLK) (-4.951::-0.994)) (HOLD D (posedge CLK) (-4.951::-0.994))
(SETUP A (posedge CLK) (0.994::4.951)) (SETUP D (posedge CLK) (0.994::4.951))
) )
) )
(CELL (CELL
(CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET")
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(TIMINGCHECK (TIMINGCHECK
(HOLD A (posedge CLK) (-5.342::-1.063)) (HOLD D (posedge CLK) (-5.342::-1.063))
(SETUP A (posedge CLK) (1.063::5.342)) (SETUP D (posedge CLK) (1.063::5.342))
) )
) )
(CELL (CELL
(CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC") (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC")
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(TIMINGCHECK (TIMINGCHECK
(HOLD A (posedge CLK) (-3.158::-0.249)) (HOLD D (posedge CLK) (-3.158::-0.249))
(SETUP A (posedge CLK) (0.249::3.158)) (SETUP D (posedge CLK) (0.249::3.158))
) )
) )
(CELL (CELL
(CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY") (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY")
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(TIMINGCHECK (TIMINGCHECK
(HOLD A (posedge CLK) (-3.158::-0.249)) (HOLD D (posedge CLK) (-3.158::-0.249))
(SETUP A (posedge CLK) (0.249::3.158)) (SETUP D (posedge CLK) (0.249::3.158))
) )
) )
(CELL (CELL
@ -1837,8 +1837,12 @@
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(DELAY (DELAY
(ABSOLUTE (ABSOLUTE
(IOPATH CLK CARRYCASCOUT (0.705::2.375)(1.531::5.650))
(IOPATH CLK CARRYOUT (0.688::2.241)(1.522::5.297)) (IOPATH CLK CARRYOUT (0.688::2.241)(1.522::5.297))
(IOPATH CLK MULTSIGNOUT (0.700::2.248)(1.510::5.279))
(IOPATH CLK P (0.696::2.251)(1.533::5.320)) (IOPATH CLK P (0.696::2.251)(1.533::5.320))
(IOPATH CLK PATTERNBDETECT (0.736::2.447)(1.618::5.885))
(IOPATH CLK PATTERNDETECT (0.736::2.447)(1.618::5.885))
(IOPATH CLK PCOUT (0.717::2.334)(1.575::5.515)) (IOPATH CLK PCOUT (0.717::2.334)(1.575::5.515))
) )
) )
@ -1848,34 +1852,14 @@
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(DELAY (DELAY
(ABSOLUTE (ABSOLUTE
(IOPATH CLK CARRYCASCOUT (0.705::2.375)(1.531::5.650))
(IOPATH CLK CARRYOUT (0.688::2.241)(1.522::5.297)) (IOPATH CLK CARRYOUT (0.688::2.241)(1.522::5.297))
(IOPATH CLK MULTSIGNOUT (0.700::2.248)(1.510::5.279))
(IOPATH CLK P (0.696::2.251)(1.533::5.320)) (IOPATH CLK P (0.696::2.251)(1.533::5.320))
(IOPATH CLK PATTERNBDETECT (0.736::2.447)(1.618::5.885))
(IOPATH CLK PATTERNDETECT (0.736::2.447)(1.618::5.885))
(IOPATH CLK PCOUT (0.717::2.334)(1.575::5.515)) (IOPATH CLK PCOUT (0.717::2.334)(1.575::5.515))
) )
) )
) )
(CELL
(CELLTYPE "DSP48E1DREG_1_A_ADREG_0_DREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC")
(INSTANCE DSP48E1)
(DELAY
(ABSOLUTE
(IOPATH CLK CARRYCASCOUT (0.705::2.375)(1.531::5.650))
(IOPATH CLK MULTSIGNOUT (0.700::2.248)(1.510::5.279))
(IOPATH CLK PATTERNBDETECT (0.736::2.447)(1.618::5.885))
(IOPATH CLK PATTERNDETECT (0.736::2.447)(1.618::5.885))
)
)
)
(CELL
(CELLTYPE "DSP48E1DREG_1_A_ADREG_0_DREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY")
(INSTANCE DSP48E1)
(DELAY
(ABSOLUTE
(IOPATH CLK CARRYCASCOUT (0.705::2.375)(1.531::5.650))
(IOPATH CLK MULTSIGNOUT (0.700::2.248)(1.510::5.279))
(IOPATH CLK PATTERNBDETECT (0.736::2.447)(1.618::5.885))
(IOPATH CLK PATTERNDETECT (0.736::2.447)(1.618::5.885))
)
)
)
) )

1124
artix7/timings/slicel.sdf
View File

File diff suppressed because it is too large Load Diff

1356
artix7/timings/slicem.sdf
View File

File diff suppressed because it is too large Load Diff

2
kintex7/mask_lioi3.db
View File

@ -1,5 +1,4 @@
bit 25_07 bit 25_07
bit 25_16
bit 25_20 bit 25_20
bit 25_21 bit 25_21
bit 25_31 bit 25_31
@ -16,6 +15,7 @@ bit 25_71
bit 25_84 bit 25_84
bit 25_85 bit 25_85
bit 25_95 bit 25_95
bit 25_96
bit 25_98 bit 25_98
bit 25_99 bit 25_99
bit 25_111 bit 25_111

2
kintex7/mask_lioi3_tbytesrc.db
View File

@ -1,5 +1,4 @@
bit 25_07 bit 25_07
bit 25_16
bit 25_20 bit 25_20
bit 25_21 bit 25_21
bit 25_31 bit 25_31
@ -16,6 +15,7 @@ bit 25_71
bit 25_84 bit 25_84
bit 25_85 bit 25_85
bit 25_95 bit 25_95
bit 25_96
bit 25_98 bit 25_98
bit 25_99 bit 25_99
bit 25_111 bit 25_111

2
kintex7/mask_lioi3_tbyteterm.db
View File

@ -1,5 +1,4 @@
bit 25_07 bit 25_07
bit 25_16
bit 25_20 bit 25_20
bit 25_21 bit 25_21
bit 25_31 bit 25_31
@ -16,6 +15,7 @@ bit 25_71
bit 25_84 bit 25_84
bit 25_85 bit 25_85
bit 25_95 bit 25_95
bit 25_96
bit 25_98 bit 25_98
bit 25_99 bit 25_99
bit 25_111 bit 25_111

2
kintex7/mask_rioi3.db
View File

@ -1,5 +1,4 @@
bit 25_07 bit 25_07
bit 25_16
bit 25_20 bit 25_20
bit 25_21 bit 25_21
bit 25_31 bit 25_31
@ -16,6 +15,7 @@ bit 25_71
bit 25_84 bit 25_84
bit 25_85 bit 25_85
bit 25_95 bit 25_95
bit 25_96
bit 25_98 bit 25_98
bit 25_99 bit 25_99
bit 25_111 bit 25_111

2
kintex7/mask_rioi3_tbytesrc.db
View File

@ -1,5 +1,4 @@
bit 25_07 bit 25_07
bit 25_16
bit 25_20 bit 25_20
bit 25_21 bit 25_21
bit 25_31 bit 25_31
@ -16,6 +15,7 @@ bit 25_71
bit 25_84 bit 25_84
bit 25_85 bit 25_85
bit 25_95 bit 25_95
bit 25_96
bit 25_98 bit 25_98
bit 25_99 bit 25_99
bit 25_111 bit 25_111

2
kintex7/mask_rioi3_tbyteterm.db
View File

@ -1,5 +1,4 @@
bit 25_07 bit 25_07
bit 25_16
bit 25_20 bit 25_20
bit 25_21 bit 25_21
bit 25_31 bit 25_31
@ -16,6 +15,7 @@ bit 25_71
bit 25_84 bit 25_84
bit 25_85 bit 25_85
bit 25_95 bit 25_95
bit 25_96
bit 25_98 bit 25_98
bit 25_99 bit 25_99
bit 25_111 bit 25_111

16
kintex7/segbits_int_l.origin_info.db
View File

@ -170,7 +170,7 @@ INT_L.BYP_ALT7.BYP_BOUNCE2 origin:050-pip-seed !22_63 !23_63 !24_63 21_63 25_63
INT_L.BYP_ALT7.BYP_BOUNCE6 origin:050-pip-seed !22_63 !23_63 !25_63 21_63 24_63 INT_L.BYP_ALT7.BYP_BOUNCE6 origin:050-pip-seed !22_63 !23_63 !25_63 21_63 24_63
INT_L.BYP_ALT7.EL1END_S3_0 origin:050-pip-seed !23_63 17_63 22_63 24_63 25_63 INT_L.BYP_ALT7.EL1END_S3_0 origin:050-pip-seed !23_63 17_63 22_63 24_63 25_63
INT_L.BYP_ALT7.FAN_BOUNCE_S3_4 origin:050-pip-seed !23_63 21_63 22_63 24_63 25_63 INT_L.BYP_ALT7.FAN_BOUNCE_S3_4 origin:050-pip-seed !23_63 21_63 22_63 24_63 25_63
INT_L.BYP_ALT7.FAN_BOUNCE_S3_6 origin:056-pip-rem !22_63 21_63 23_63 24_63 25_63 INT_L.BYP_ALT7.FAN_BOUNCE_S3_6 origin:050-pip-seed !22_63 21_63 23_63 24_63 25_63
INT_L.BYP_ALT7.LOGIC_OUTS_L3 origin:051-pip-imuxlout-bypalts !22_63 20_63 23_63 24_63 25_63 INT_L.BYP_ALT7.LOGIC_OUTS_L3 origin:051-pip-imuxlout-bypalts !22_63 20_63 23_63 24_63 25_63
INT_L.BYP_ALT7.LOGIC_OUTS_L15 origin:051-pip-imuxlout-bypalts !23_63 20_63 22_63 24_63 25_63 INT_L.BYP_ALT7.LOGIC_OUTS_L15 origin:051-pip-imuxlout-bypalts !23_63 20_63 22_63 24_63 25_63
INT_L.BYP_ALT7.LOGIC_OUTS_L21 origin:051-pip-imuxlout-bypalts !22_63 !23_63 !24_63 20_63 25_63 INT_L.BYP_ALT7.LOGIC_OUTS_L21 origin:051-pip-imuxlout-bypalts !22_63 !23_63 !24_63 20_63 25_63
@ -393,7 +393,7 @@ INT_L.FAN_ALT3.WW2END3 origin:050-pip-seed !22_56 !23_56 !24_56 19_57 25_56
INT_L.FAN_ALT4.BYP_BOUNCE_N3_3 origin:059-pip-byp-bounce !22_08 !23_08 !24_08 20_08 25_08 INT_L.FAN_ALT4.BYP_BOUNCE_N3_3 origin:059-pip-byp-bounce !22_08 !23_08 !24_08 20_08 25_08
INT_L.FAN_ALT4.BYP_BOUNCE_N3_7 origin:059-pip-byp-bounce !22_08 !23_08 !25_08 20_08 24_08 INT_L.FAN_ALT4.BYP_BOUNCE_N3_7 origin:059-pip-byp-bounce !22_08 !23_08 !25_08 20_08 24_08
INT_L.FAN_ALT4.FAN_BOUNCE2 origin:050-pip-seed !23_08 20_08 22_08 24_08 25_08 INT_L.FAN_ALT4.FAN_BOUNCE2 origin:050-pip-seed !23_08 20_08 22_08 24_08 25_08
INT_L.FAN_ALT4.FAN_BOUNCE7 origin:050-pip-seed !22_08 20_08 23_08 24_08 25_08 INT_L.FAN_ALT4.FAN_BOUNCE7 origin:056-pip-rem !22_08 20_08 23_08 24_08 25_08
INT_L.FAN_ALT4.LOGIC_OUTS_L4 origin:050-pip-seed !23_08 21_08 22_08 24_08 25_08 INT_L.FAN_ALT4.LOGIC_OUTS_L4 origin:050-pip-seed !23_08 21_08 22_08 24_08 25_08
INT_L.FAN_ALT4.LOGIC_OUTS_L8 origin:050-pip-seed !22_08 21_08 23_08 24_08 25_08 INT_L.FAN_ALT4.LOGIC_OUTS_L8 origin:050-pip-seed !22_08 21_08 23_08 24_08 25_08
INT_L.FAN_ALT4.LOGIC_OUTS_L18 origin:050-pip-seed !22_08 !23_08 !25_08 21_08 24_08 INT_L.FAN_ALT4.LOGIC_OUTS_L18 origin:050-pip-seed !22_08 !23_08 !25_08 21_08 24_08
@ -1917,7 +1917,7 @@ INT_L.EE4BEG2.SE6END2 origin:050-pip-seed 03_41 06_40
INT_L.EE4BEG2.SS2END2 origin:050-pip-seed 03_40 05_43 INT_L.EE4BEG2.SS2END2 origin:050-pip-seed 03_40 05_43
INT_L.EE4BEG2.SS6END2 origin:050-pip-seed 05_43 06_40 INT_L.EE4BEG2.SS6END2 origin:050-pip-seed 05_43 06_40
INT_L.EE4BEG2.SW2END2 origin:050-pip-seed 02_41 05_43 INT_L.EE4BEG2.SW2END2 origin:050-pip-seed 02_41 05_43
INT_L.EE4BEG2.SW6END2 origin:050-pip-seed 05_40 05_43 INT_L.EE4BEG2.SW6END2 origin:056-pip-rem 05_40 05_43
INT_L.EE4BEG3.LOGIC_OUTS_L3 origin:050-pip-seed 02_57 07_57 INT_L.EE4BEG3.LOGIC_OUTS_L3 origin:050-pip-seed 02_57 07_57
INT_L.EE4BEG3.LOGIC_OUTS_L7 origin:050-pip-seed 02_57 04_58 INT_L.EE4BEG3.LOGIC_OUTS_L7 origin:050-pip-seed 02_57 04_58
INT_L.EE4BEG3.LOGIC_OUTS_L11 origin:050-pip-seed 03_56 04_58 INT_L.EE4BEG3.LOGIC_OUTS_L11 origin:050-pip-seed 03_56 04_58
@ -1937,7 +1937,7 @@ INT_L.EE4BEG3.SE6END3 origin:050-pip-seed 03_57 06_56
INT_L.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59 INT_L.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59
INT_L.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56 INT_L.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56
INT_L.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59 INT_L.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59
INT_L.EE4BEG3.SW6END3 origin:056-pip-rem 05_56 05_59 INT_L.EE4BEG3.SW6END3 origin:050-pip-seed 05_56 05_59
INT_L.EL1BEG0.LOGIC_OUTS_L1 origin:050-pip-seed 07_20 14_21 INT_L.EL1BEG0.LOGIC_OUTS_L1 origin:050-pip-seed 07_20 14_21
INT_L.EL1BEG0.LOGIC_OUTS_L5 origin:050-pip-seed 11_21 14_21 INT_L.EL1BEG0.LOGIC_OUTS_L5 origin:050-pip-seed 11_21 14_21
INT_L.EL1BEG0.LOGIC_OUTS_L9 origin:050-pip-seed 10_21 13_21 INT_L.EL1BEG0.LOGIC_OUTS_L9 origin:050-pip-seed 10_21 13_21
@ -2273,7 +2273,7 @@ INT_L.NE6BEG3.NW6END3 origin:050-pip-seed 04_53 06_52
INT_L.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55 INT_L.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55
INT_L.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52 INT_L.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52
INT_L.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53 INT_L.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53
INT_L.NE6BEG3.WW4END3 origin:056-pip-rem 04_53 05_52 INT_L.NE6BEG3.WW4END3 origin:050-pip-seed 04_53 05_52
INT_L.NL1BEG0.LOGIC_OUTS_L1 origin:050-pip-seed 07_16 14_17 INT_L.NL1BEG0.LOGIC_OUTS_L1 origin:050-pip-seed 07_16 14_17
INT_L.NL1BEG0.LOGIC_OUTS_L5 origin:050-pip-seed 11_17 14_17 INT_L.NL1BEG0.LOGIC_OUTS_L5 origin:050-pip-seed 11_17 14_17
INT_L.NL1BEG0.LOGIC_OUTS_L9 origin:050-pip-seed 10_17 13_17 INT_L.NL1BEG0.LOGIC_OUTS_L9 origin:050-pip-seed 10_17 13_17
@ -2887,7 +2887,7 @@ INT_L.SE6BEG3.LH0 origin:056-pip-rem 04_59 06_58
INT_L.SE6BEG3.NE2END3 origin:050-pip-seed 03_58 04_56 INT_L.SE6BEG3.NE2END3 origin:050-pip-seed 03_58 04_56
INT_L.SE6BEG3.NE6END3 origin:050-pip-seed 04_56 04_59 INT_L.SE6BEG3.NE6END3 origin:050-pip-seed 04_56 04_59
INT_L.SE6BEG3.NN2END3 origin:050-pip-seed 02_59 04_56 INT_L.SE6BEG3.NN2END3 origin:050-pip-seed 02_59 04_56
INT_L.SE6BEG3.NN6END3 origin:050-pip-seed 04_56 07_59 INT_L.SE6BEG3.NN6END3 origin:056-pip-rem 04_56 07_59
INT_L.SE6BEG3.SE2END3 origin:050-pip-seed 02_58 03_58 INT_L.SE6BEG3.SE2END3 origin:050-pip-seed 02_58 03_58
INT_L.SE6BEG3.SE6END3 origin:050-pip-seed 02_58 07_59 INT_L.SE6BEG3.SE6END3 origin:050-pip-seed 02_58 07_59
INT_L.SE6BEG3.SS2END3 origin:050-pip-seed 02_59 05_58 INT_L.SE6BEG3.SS2END3 origin:050-pip-seed 02_59 05_58
@ -3345,7 +3345,7 @@ INT_L.SW6BEG3.NW2END_S0_0 origin:050-pip-seed 02_61 05_63
INT_L.SW6BEG3.NW6END_S0_0 origin:050-pip-seed 05_63 06_60 INT_L.SW6BEG3.NW6END_S0_0 origin:050-pip-seed 05_63 06_60
INT_L.SW6BEG3.WW4END_S0_0 origin:050-pip-seed 05_60 05_63 INT_L.SW6BEG3.WW4END_S0_0 origin:050-pip-seed 05_60 05_63
INT_L.SW6BEG3.EE2END3 origin:050-pip-seed 03_60 04_61 INT_L.SW6BEG3.EE2END3 origin:050-pip-seed 03_60 04_61
INT_L.SW6BEG3.EE4END3 origin:050-pip-seed 04_61 05_60 INT_L.SW6BEG3.EE4END3 origin:056-pip-rem 04_61 05_60
INT_L.SW6BEG3.LH0 origin:056-pip-rem 04_62 05_60 INT_L.SW6BEG3.LH0 origin:056-pip-rem 04_62 05_60
INT_L.SW6BEG3.SE2END3 origin:050-pip-seed 02_61 04_61 INT_L.SW6BEG3.SE2END3 origin:050-pip-seed 02_61 04_61
INT_L.SW6BEG3.SE6END3 origin:050-pip-seed 04_61 06_60 INT_L.SW6BEG3.SE6END3 origin:050-pip-seed 04_61 06_60
@ -3623,7 +3623,7 @@ INT_L.WW4BEG3.LOGIC_OUTS_L21 origin:050-pip-seed 06_48 07_49
INT_L.WW4BEG3.LV_L18 origin:056-pip-rem 05_48 07_49 INT_L.WW4BEG3.LV_L18 origin:056-pip-rem 05_48 07_49
INT_L.WW4BEG3.LH0 origin:056-pip-rem 04_50 05_48 INT_L.WW4BEG3.LH0 origin:056-pip-rem 04_50 05_48
INT_L.WW4BEG3.NE2END3 origin:050-pip-seed 02_49 05_51 INT_L.WW4BEG3.NE2END3 origin:050-pip-seed 02_49 05_51
INT_L.WW4BEG3.NE6END3 origin:050-pip-seed 05_48 05_51 INT_L.WW4BEG3.NE6END3 origin:056-pip-rem 05_48 05_51
INT_L.WW4BEG3.NN2END3 origin:050-pip-seed 03_48 05_51 INT_L.WW4BEG3.NN2END3 origin:050-pip-seed 03_48 05_51
INT_L.WW4BEG3.NN6END3 origin:050-pip-seed 05_51 06_48 INT_L.WW4BEG3.NN6END3 origin:050-pip-seed 05_51 06_48
INT_L.WW4BEG3.NW2END3 origin:050-pip-seed 02_49 03_49 INT_L.WW4BEG3.NW2END3 origin:050-pip-seed 02_49 03_49

14
kintex7/segbits_int_r.origin_info.db
View File

@ -329,10 +329,10 @@ INT_R.FAN_ALT3.WW2END3 origin:050-pip-seed !22_56 !23_56 !24_56 19_57 25_56
INT_R.FAN_ALT4.BYP_BOUNCE_N3_3 origin:059-pip-byp-bounce !22_08 !23_08 !24_08 20_08 25_08 INT_R.FAN_ALT4.BYP_BOUNCE_N3_3 origin:059-pip-byp-bounce !22_08 !23_08 !24_08 20_08 25_08
INT_R.FAN_ALT4.BYP_BOUNCE_N3_7 origin:059-pip-byp-bounce !22_08 !23_08 !25_08 20_08 24_08 INT_R.FAN_ALT4.BYP_BOUNCE_N3_7 origin:059-pip-byp-bounce !22_08 !23_08 !25_08 20_08 24_08
INT_R.FAN_ALT4.FAN_BOUNCE2 origin:050-pip-seed !23_08 20_08 22_08 24_08 25_08 INT_R.FAN_ALT4.FAN_BOUNCE2 origin:050-pip-seed !23_08 20_08 22_08 24_08 25_08
INT_R.FAN_ALT4.FAN_BOUNCE7 origin:050-pip-seed !22_08 20_08 23_08 24_08 25_08 INT_R.FAN_ALT4.FAN_BOUNCE7 origin:056-pip-rem !22_08 20_08 23_08 24_08 25_08
INT_R.FAN_ALT4.LOGIC_OUTS4 origin:050-pip-seed !23_08 21_08 22_08 24_08 25_08 INT_R.FAN_ALT4.LOGIC_OUTS4 origin:050-pip-seed !23_08 21_08 22_08 24_08 25_08
INT_R.FAN_ALT4.LOGIC_OUTS8 origin:050-pip-seed !22_08 21_08 23_08 24_08 25_08 INT_R.FAN_ALT4.LOGIC_OUTS8 origin:050-pip-seed !22_08 21_08 23_08 24_08 25_08
INT_R.FAN_ALT4.LOGIC_OUTS18 origin:050-pip-seed !22_08 !23_08 !25_08 21_08 24_08 INT_R.FAN_ALT4.LOGIC_OUTS18 origin:056-pip-rem !22_08 !23_08 !25_08 21_08 24_08
INT_R.FAN_ALT4.SR1BEG_S0 origin:050-pip-seed !23_08 19_09 22_08 24_08 25_08 INT_R.FAN_ALT4.SR1BEG_S0 origin:050-pip-seed !23_08 19_09 22_08 24_08 25_08
INT_R.FAN_ALT4.EE2END0 origin:050-pip-seed !22_08 !23_08 !24_08 16_08 25_08 INT_R.FAN_ALT4.EE2END0 origin:050-pip-seed !22_08 !23_08 !24_08 16_08 25_08
INT_R.FAN_ALT4.EL1END0 origin:050-pip-seed !22_08 16_08 23_08 24_08 25_08 INT_R.FAN_ALT4.EL1END0 origin:050-pip-seed !22_08 16_08 23_08 24_08 25_08
@ -685,7 +685,7 @@ INT_R.EE4BEG1.SE6END1 origin:050-pip-seed 03_25 06_24
INT_R.EE4BEG1.SS2END1 origin:050-pip-seed 03_24 05_27 INT_R.EE4BEG1.SS2END1 origin:050-pip-seed 03_24 05_27
INT_R.EE4BEG1.SS6END1 origin:050-pip-seed 05_27 06_24 INT_R.EE4BEG1.SS6END1 origin:050-pip-seed 05_27 06_24
INT_R.EE4BEG1.SW2END1 origin:050-pip-seed 02_25 05_27 INT_R.EE4BEG1.SW2END1 origin:050-pip-seed 02_25 05_27
INT_R.EE4BEG1.SW6END1 origin:050-pip-seed 05_24 05_27 INT_R.EE4BEG1.SW6END1 origin:056-pip-rem 05_24 05_27
INT_R.EE4BEG2.LOGIC_OUTS2 origin:050-pip-seed 02_41 04_42 INT_R.EE4BEG2.LOGIC_OUTS2 origin:050-pip-seed 02_41 04_42
INT_R.EE4BEG2.LOGIC_OUTS6 origin:050-pip-seed 02_41 07_41 INT_R.EE4BEG2.LOGIC_OUTS6 origin:050-pip-seed 02_41 07_41
INT_R.EE4BEG2.LOGIC_OUTS10 origin:050-pip-seed 03_40 07_41 INT_R.EE4BEG2.LOGIC_OUTS10 origin:050-pip-seed 03_40 07_41
@ -705,7 +705,7 @@ INT_R.EE4BEG2.SE6END2 origin:050-pip-seed 03_41 06_40
INT_R.EE4BEG2.SS2END2 origin:050-pip-seed 03_40 05_43 INT_R.EE4BEG2.SS2END2 origin:050-pip-seed 03_40 05_43
INT_R.EE4BEG2.SS6END2 origin:050-pip-seed 05_43 06_40 INT_R.EE4BEG2.SS6END2 origin:050-pip-seed 05_43 06_40
INT_R.EE4BEG2.SW2END2 origin:050-pip-seed 02_41 05_43 INT_R.EE4BEG2.SW2END2 origin:050-pip-seed 02_41 05_43
INT_R.EE4BEG2.SW6END2 origin:050-pip-seed 05_40 05_43 INT_R.EE4BEG2.SW6END2 origin:056-pip-rem 05_40 05_43
INT_R.EE4BEG3.LOGIC_OUTS3 origin:050-pip-seed 02_57 07_57 INT_R.EE4BEG3.LOGIC_OUTS3 origin:050-pip-seed 02_57 07_57
INT_R.EE4BEG3.LOGIC_OUTS7 origin:050-pip-seed 02_57 04_58 INT_R.EE4BEG3.LOGIC_OUTS7 origin:050-pip-seed 02_57 04_58
INT_R.EE4BEG3.LOGIC_OUTS11 origin:050-pip-seed 03_56 04_58 INT_R.EE4BEG3.LOGIC_OUTS11 origin:050-pip-seed 03_56 04_58
@ -2273,7 +2273,7 @@ INT_R.NE6BEG3.NW6END3 origin:050-pip-seed 04_53 06_52
INT_R.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55 INT_R.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55
INT_R.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52 INT_R.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52
INT_R.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53 INT_R.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53
INT_R.NE6BEG3.WW4END3 origin:050-pip-seed 04_53 05_52 INT_R.NE6BEG3.WW4END3 origin:056-pip-rem 04_53 05_52
INT_R.NL1BEG0.LOGIC_OUTS1 origin:050-pip-seed 07_16 14_17 INT_R.NL1BEG0.LOGIC_OUTS1 origin:050-pip-seed 07_16 14_17
INT_R.NL1BEG0.LOGIC_OUTS5 origin:050-pip-seed 11_17 14_17 INT_R.NL1BEG0.LOGIC_OUTS5 origin:050-pip-seed 11_17 14_17
INT_R.NL1BEG0.LOGIC_OUTS9 origin:050-pip-seed 10_17 13_17 INT_R.NL1BEG0.LOGIC_OUTS9 origin:050-pip-seed 10_17 13_17
@ -3321,7 +3321,7 @@ INT_R.SW6BEG2.LOGIC_OUTS14 origin:050-pip-seed 03_44 07_45
INT_R.SW6BEG2.LOGIC_OUTS16 origin:050-pip-seed 04_46 06_44 INT_R.SW6BEG2.LOGIC_OUTS16 origin:050-pip-seed 04_46 06_44
INT_R.SW6BEG2.LOGIC_OUTS20 origin:050-pip-seed 06_44 07_45 INT_R.SW6BEG2.LOGIC_OUTS20 origin:050-pip-seed 06_44 07_45
INT_R.SW6BEG2.EE2END2 origin:050-pip-seed 03_44 04_45 INT_R.SW6BEG2.EE2END2 origin:050-pip-seed 03_44 04_45
INT_R.SW6BEG2.EE4END2 origin:050-pip-seed 04_45 05_44 INT_R.SW6BEG2.EE4END2 origin:056-pip-rem 04_45 05_44
INT_R.SW6BEG2.LVB0 origin:056-pip-rem 04_46 05_44 INT_R.SW6BEG2.LVB0 origin:056-pip-rem 04_46 05_44
INT_R.SW6BEG2.LVB12 origin:056-pip-rem 05_44 07_45 INT_R.SW6BEG2.LVB12 origin:056-pip-rem 05_44 07_45
INT_R.SW6BEG2.NW2END3 origin:050-pip-seed 02_45 05_47 INT_R.SW6BEG2.NW2END3 origin:050-pip-seed 02_45 05_47
@ -3344,7 +3344,7 @@ INT_R.SW6BEG3.NW2END_S0_0 origin:050-pip-seed 02_61 05_63
INT_R.SW6BEG3.NW6END_S0_0 origin:050-pip-seed 05_63 06_60 INT_R.SW6BEG3.NW6END_S0_0 origin:050-pip-seed 05_63 06_60
INT_R.SW6BEG3.WW4END_S0_0 origin:050-pip-seed 05_60 05_63 INT_R.SW6BEG3.WW4END_S0_0 origin:050-pip-seed 05_60 05_63
INT_R.SW6BEG3.EE2END3 origin:050-pip-seed 03_60 04_61 INT_R.SW6BEG3.EE2END3 origin:050-pip-seed 03_60 04_61
INT_R.SW6BEG3.EE4END3 origin:056-pip-rem 04_61 05_60 INT_R.SW6BEG3.EE4END3 origin:050-pip-seed 04_61 05_60
INT_R.SW6BEG3.LH0 origin:056-pip-rem 04_62 05_60 INT_R.SW6BEG3.LH0 origin:056-pip-rem 04_62 05_60
INT_R.SW6BEG3.LV18 origin:056-pip-rem 05_60 07_61 INT_R.SW6BEG3.LV18 origin:056-pip-rem 05_60 07_61
INT_R.SW6BEG3.SE2END3 origin:050-pip-seed 02_61 04_61 INT_R.SW6BEG3.SE2END3 origin:050-pip-seed 02_61 04_61

1
zynq7/mask_lioi3.db
View File

@ -1,5 +1,4 @@
bit 25_07 bit 25_07
bit 25_08
bit 25_16 bit 25_16
bit 25_20 bit 25_20
bit 25_21 bit 25_21

1
zynq7/mask_lioi3_tbytesrc.db
View File

@ -1,5 +1,4 @@
bit 25_07 bit 25_07
bit 25_08
bit 25_16 bit 25_16
bit 25_20 bit 25_20
bit 25_21 bit 25_21

1
zynq7/mask_lioi3_tbyteterm.db
View File

@ -1,5 +1,4 @@
bit 25_07 bit 25_07
bit 25_08
bit 25_16 bit 25_16
bit 25_20 bit 25_20
bit 25_21 bit 25_21

1
zynq7/mask_rioi3.db
View File

@ -1,5 +1,4 @@
bit 25_07 bit 25_07
bit 25_08
bit 25_16 bit 25_16
bit 25_20 bit 25_20
bit 25_21 bit 25_21

1
zynq7/mask_rioi3_tbytesrc.db
View File

@ -1,5 +1,4 @@
bit 25_07 bit 25_07
bit 25_08
bit 25_16 bit 25_16
bit 25_20 bit 25_20
bit 25_21 bit 25_21

1
zynq7/mask_rioi3_tbyteterm.db
View File

@ -1,5 +1,4 @@
bit 25_07 bit 25_07
bit 25_08
bit 25_16 bit 25_16
bit 25_20 bit 25_20
bit 25_21 bit 25_21

14
zynq7/segbits_int_l.origin_info.db
View File

@ -1917,7 +1917,7 @@ INT_L.EE4BEG2.SE6END2 origin:050-pip-seed 03_41 06_40
INT_L.EE4BEG2.SS2END2 origin:050-pip-seed 03_40 05_43 INT_L.EE4BEG2.SS2END2 origin:050-pip-seed 03_40 05_43
INT_L.EE4BEG2.SS6END2 origin:050-pip-seed 05_43 06_40 INT_L.EE4BEG2.SS6END2 origin:050-pip-seed 05_43 06_40
INT_L.EE4BEG2.SW2END2 origin:050-pip-seed 02_41 05_43 INT_L.EE4BEG2.SW2END2 origin:050-pip-seed 02_41 05_43
INT_L.EE4BEG2.SW6END2 origin:050-pip-seed 05_40 05_43 INT_L.EE4BEG2.SW6END2 origin:056-pip-rem 05_40 05_43
INT_L.EE4BEG3.LOGIC_OUTS_L3 origin:050-pip-seed 02_57 07_57 INT_L.EE4BEG3.LOGIC_OUTS_L3 origin:050-pip-seed 02_57 07_57
INT_L.EE4BEG3.LOGIC_OUTS_L7 origin:050-pip-seed 02_57 04_58 INT_L.EE4BEG3.LOGIC_OUTS_L7 origin:050-pip-seed 02_57 04_58
INT_L.EE4BEG3.LOGIC_OUTS_L11 origin:050-pip-seed 03_56 04_58 INT_L.EE4BEG3.LOGIC_OUTS_L11 origin:050-pip-seed 03_56 04_58
@ -1937,7 +1937,7 @@ INT_L.EE4BEG3.SE6END3 origin:050-pip-seed 03_57 06_56
INT_L.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59 INT_L.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59
INT_L.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56 INT_L.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56
INT_L.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59 INT_L.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59
INT_L.EE4BEG3.SW6END3 origin:050-pip-seed 05_56 05_59 INT_L.EE4BEG3.SW6END3 origin:056-pip-rem 05_56 05_59
INT_L.EL1BEG0.LOGIC_OUTS_L1 origin:050-pip-seed 07_20 14_21 INT_L.EL1BEG0.LOGIC_OUTS_L1 origin:050-pip-seed 07_20 14_21
INT_L.EL1BEG0.LOGIC_OUTS_L5 origin:050-pip-seed 11_21 14_21 INT_L.EL1BEG0.LOGIC_OUTS_L5 origin:050-pip-seed 11_21 14_21
INT_L.EL1BEG0.LOGIC_OUTS_L9 origin:050-pip-seed 10_21 13_21 INT_L.EL1BEG0.LOGIC_OUTS_L9 origin:050-pip-seed 10_21 13_21
@ -2273,7 +2273,7 @@ INT_L.NE6BEG3.NW6END3 origin:050-pip-seed 04_53 06_52
INT_L.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55 INT_L.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55
INT_L.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52 INT_L.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52
INT_L.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53 INT_L.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53
INT_L.NE6BEG3.WW4END3 origin:056-pip-rem 04_53 05_52 INT_L.NE6BEG3.WW4END3 origin:050-pip-seed 04_53 05_52
INT_L.NL1BEG0.LOGIC_OUTS_L1 origin:050-pip-seed 07_16 14_17 INT_L.NL1BEG0.LOGIC_OUTS_L1 origin:050-pip-seed 07_16 14_17
INT_L.NL1BEG0.LOGIC_OUTS_L5 origin:050-pip-seed 11_17 14_17 INT_L.NL1BEG0.LOGIC_OUTS_L5 origin:050-pip-seed 11_17 14_17
INT_L.NL1BEG0.LOGIC_OUTS_L9 origin:050-pip-seed 10_17 13_17 INT_L.NL1BEG0.LOGIC_OUTS_L9 origin:050-pip-seed 10_17 13_17
@ -2662,7 +2662,7 @@ INT_L.NW6BEG0.LOGIC_OUTS_L18 origin:050-pip-seed 05_01 07_03
INT_L.NW6BEG0.LOGIC_OUTS_L22 origin:050-pip-seed 06_02 07_03 INT_L.NW6BEG0.LOGIC_OUTS_L22 origin:050-pip-seed 06_02 07_03
INT_L.NW6BEG0.LV_L0 origin:056-pip-rem 04_03 06_02 INT_L.NW6BEG0.LV_L0 origin:056-pip-rem 04_03 06_02
INT_L.NW6BEG0.SS2END_N0_3 origin:050-pip-seed 02_03 04_00 INT_L.NW6BEG0.SS2END_N0_3 origin:050-pip-seed 02_03 04_00
INT_L.NW6BEG0.SS6END_N0_3 origin:056-pip-rem 04_00 07_03 INT_L.NW6BEG0.SS6END_N0_3 origin:050-pip-seed 04_00 07_03
INT_L.NW6BEG0.SW2END_N0_3 origin:050-pip-seed 03_02 04_00 INT_L.NW6BEG0.SW2END_N0_3 origin:050-pip-seed 03_02 04_00
INT_L.NW6BEG0.SW6END_N0_3 origin:050-pip-seed 04_00 04_03 INT_L.NW6BEG0.SW6END_N0_3 origin:050-pip-seed 04_00 04_03
INT_L.NW6BEG0.WW2END_N0_3 origin:050-pip-seed 02_02 02_03 INT_L.NW6BEG0.WW2END_N0_3 origin:050-pip-seed 02_02 02_03
@ -2729,7 +2729,7 @@ INT_L.NW6BEG3.NN6END3 origin:050-pip-seed 05_50 07_51
INT_L.NW6BEG3.NW2END3 origin:050-pip-seed 02_50 03_50 INT_L.NW6BEG3.NW2END3 origin:050-pip-seed 02_50 03_50
INT_L.NW6BEG3.NW6END3 origin:050-pip-seed 02_50 07_51 INT_L.NW6BEG3.NW6END3 origin:050-pip-seed 02_50 07_51
INT_L.NW6BEG3.SS2END2 origin:050-pip-seed 02_51 04_48 INT_L.NW6BEG3.SS2END2 origin:050-pip-seed 02_51 04_48
INT_L.NW6BEG3.SS6END2 origin:056-pip-rem 04_48 07_51 INT_L.NW6BEG3.SS6END2 origin:050-pip-seed 04_48 07_51
INT_L.NW6BEG3.SW2END2 origin:050-pip-seed 03_50 04_48 INT_L.NW6BEG3.SW2END2 origin:050-pip-seed 03_50 04_48
INT_L.NW6BEG3.SW6END2 origin:050-pip-seed 04_48 04_51 INT_L.NW6BEG3.SW6END2 origin:050-pip-seed 04_48 04_51
INT_L.NW6BEG3.WW2END2 origin:050-pip-seed 02_50 02_51 INT_L.NW6BEG3.WW2END2 origin:050-pip-seed 02_50 02_51
@ -2887,7 +2887,7 @@ INT_L.SE6BEG3.LH0 origin:056-pip-rem 04_59 06_58
INT_L.SE6BEG3.NE2END3 origin:050-pip-seed 03_58 04_56 INT_L.SE6BEG3.NE2END3 origin:050-pip-seed 03_58 04_56
INT_L.SE6BEG3.NE6END3 origin:050-pip-seed 04_56 04_59 INT_L.SE6BEG3.NE6END3 origin:050-pip-seed 04_56 04_59
INT_L.SE6BEG3.NN2END3 origin:050-pip-seed 02_59 04_56 INT_L.SE6BEG3.NN2END3 origin:050-pip-seed 02_59 04_56
INT_L.SE6BEG3.NN6END3 origin:056-pip-rem 04_56 07_59 INT_L.SE6BEG3.NN6END3 origin:050-pip-seed 04_56 07_59
INT_L.SE6BEG3.SE2END3 origin:050-pip-seed 02_58 03_58 INT_L.SE6BEG3.SE2END3 origin:050-pip-seed 02_58 03_58
INT_L.SE6BEG3.SE6END3 origin:050-pip-seed 02_58 07_59 INT_L.SE6BEG3.SE6END3 origin:050-pip-seed 02_58 07_59
INT_L.SE6BEG3.SS2END3 origin:050-pip-seed 02_59 05_58 INT_L.SE6BEG3.SS2END3 origin:050-pip-seed 02_59 05_58
@ -3345,7 +3345,7 @@ INT_L.SW6BEG3.NW2END_S0_0 origin:050-pip-seed 02_61 05_63
INT_L.SW6BEG3.NW6END_S0_0 origin:050-pip-seed 05_63 06_60 INT_L.SW6BEG3.NW6END_S0_0 origin:050-pip-seed 05_63 06_60
INT_L.SW6BEG3.WW4END_S0_0 origin:050-pip-seed 05_60 05_63 INT_L.SW6BEG3.WW4END_S0_0 origin:050-pip-seed 05_60 05_63
INT_L.SW6BEG3.EE2END3 origin:050-pip-seed 03_60 04_61 INT_L.SW6BEG3.EE2END3 origin:050-pip-seed 03_60 04_61
INT_L.SW6BEG3.EE4END3 origin:056-pip-rem 04_61 05_60 INT_L.SW6BEG3.EE4END3 origin:050-pip-seed 04_61 05_60
INT_L.SW6BEG3.LH0 origin:056-pip-rem 04_62 05_60 INT_L.SW6BEG3.LH0 origin:056-pip-rem 04_62 05_60
INT_L.SW6BEG3.SE2END3 origin:050-pip-seed 02_61 04_61 INT_L.SW6BEG3.SE2END3 origin:050-pip-seed 02_61 04_61
INT_L.SW6BEG3.SE6END3 origin:050-pip-seed 04_61 06_60 INT_L.SW6BEG3.SE6END3 origin:050-pip-seed 04_61 06_60

8
zynq7/segbits_int_r.origin_info.db
View File

@ -2273,7 +2273,7 @@ INT_R.NE6BEG3.NW6END3 origin:050-pip-seed 04_53 06_52
INT_R.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55 INT_R.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55
INT_R.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52 INT_R.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52
INT_R.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53 INT_R.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53
INT_R.NE6BEG3.WW4END3 origin:056-pip-rem 04_53 05_52 INT_R.NE6BEG3.WW4END3 origin:050-pip-seed 04_53 05_52
INT_R.NL1BEG0.LOGIC_OUTS1 origin:050-pip-seed 07_16 14_17 INT_R.NL1BEG0.LOGIC_OUTS1 origin:050-pip-seed 07_16 14_17
INT_R.NL1BEG0.LOGIC_OUTS5 origin:050-pip-seed 11_17 14_17 INT_R.NL1BEG0.LOGIC_OUTS5 origin:050-pip-seed 11_17 14_17
INT_R.NL1BEG0.LOGIC_OUTS9 origin:050-pip-seed 10_17 13_17 INT_R.NL1BEG0.LOGIC_OUTS9 origin:050-pip-seed 10_17 13_17
@ -2471,7 +2471,7 @@ INT_R.NN6BEG2.NN6END2 origin:050-pip-seed 02_38 07_39
INT_R.NN6BEG2.NW2END2 origin:050-pip-seed 03_38 04_36 INT_R.NN6BEG2.NW2END2 origin:050-pip-seed 03_38 04_36
INT_R.NN6BEG2.NW6END2 origin:050-pip-seed 04_36 07_39 INT_R.NN6BEG2.NW6END2 origin:050-pip-seed 04_36 07_39
INT_R.NN6BEG2.SE2END2 origin:050-pip-seed 03_38 05_38 INT_R.NN6BEG2.SE2END2 origin:050-pip-seed 03_38 05_38
INT_R.NN6BEG2.SE6END2 origin:056-pip-rem 05_38 07_39 INT_R.NN6BEG2.SE6END2 origin:050-pip-seed 05_38 07_39
INT_R.NN6BEG2.WW2END1 origin:050-pip-seed 02_39 04_36 INT_R.NN6BEG2.WW2END1 origin:050-pip-seed 02_39 04_36
INT_R.NN6BEG2.WW4END2 origin:050-pip-seed 04_36 04_39 INT_R.NN6BEG2.WW4END2 origin:050-pip-seed 04_36 04_39
INT_R.NN6BEG3.LOGIC_OUTS3 origin:050-pip-seed 03_54 06_54 INT_R.NN6BEG3.LOGIC_OUTS3 origin:050-pip-seed 03_54 06_54
@ -2661,7 +2661,7 @@ INT_R.NW6BEG0.LOGIC_OUTS12 origin:050-pip-seed 02_03 06_02
INT_R.NW6BEG0.LOGIC_OUTS18 origin:050-pip-seed 05_01 07_03 INT_R.NW6BEG0.LOGIC_OUTS18 origin:050-pip-seed 05_01 07_03
INT_R.NW6BEG0.LOGIC_OUTS22 origin:050-pip-seed 06_02 07_03 INT_R.NW6BEG0.LOGIC_OUTS22 origin:050-pip-seed 06_02 07_03
INT_R.NW6BEG0.SS2END_N0_3 origin:050-pip-seed 02_03 04_00 INT_R.NW6BEG0.SS2END_N0_3 origin:050-pip-seed 02_03 04_00
INT_R.NW6BEG0.SS6END_N0_3 origin:050-pip-seed 04_00 07_03 INT_R.NW6BEG0.SS6END_N0_3 origin:056-pip-rem 04_00 07_03
INT_R.NW6BEG0.SW2END_N0_3 origin:050-pip-seed 03_02 04_00 INT_R.NW6BEG0.SW2END_N0_3 origin:050-pip-seed 03_02 04_00
INT_R.NW6BEG0.SW6END_N0_3 origin:050-pip-seed 04_00 04_03 INT_R.NW6BEG0.SW6END_N0_3 origin:050-pip-seed 04_00 04_03
INT_R.NW6BEG0.WW2END_N0_3 origin:050-pip-seed 02_02 02_03 INT_R.NW6BEG0.WW2END_N0_3 origin:050-pip-seed 02_02 02_03
@ -3301,7 +3301,7 @@ INT_R.SW6BEG1.LOGIC_OUTS13 origin:050-pip-seed 03_28 04_30
INT_R.SW6BEG1.LOGIC_OUTS19 origin:050-pip-seed 06_28 07_29 INT_R.SW6BEG1.LOGIC_OUTS19 origin:050-pip-seed 06_28 07_29
INT_R.SW6BEG1.LOGIC_OUTS23 origin:050-pip-seed 04_30 06_28 INT_R.SW6BEG1.LOGIC_OUTS23 origin:050-pip-seed 04_30 06_28
INT_R.SW6BEG1.EE2END1 origin:050-pip-seed 03_28 04_29 INT_R.SW6BEG1.EE2END1 origin:050-pip-seed 03_28 04_29
INT_R.SW6BEG1.EE4END1 origin:050-pip-seed 04_29 05_28 INT_R.SW6BEG1.EE4END1 origin:056-pip-rem 04_29 05_28
INT_R.SW6BEG1.LH6 origin:056-pip-rem 05_28 07_29 INT_R.SW6BEG1.LH6 origin:056-pip-rem 05_28 07_29
INT_R.SW6BEG1.LV9 origin:056-pip-rem 04_30 05_28 INT_R.SW6BEG1.LV9 origin:056-pip-rem 04_30 05_28
INT_R.SW6BEG1.NW2END2 origin:050-pip-seed 02_29 05_31 INT_R.SW6BEG1.NW2END2 origin:050-pip-seed 02_29 05_31

52
zynq7/timings/DSP_L.sdf
View File

@ -260,13 +260,13 @@
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(DELAY (DELAY
(ABSOLUTE (ABSOLUTE
(IOPATH D CARRYCASCOUT (0.596::2.268)(1.345::5.400)) (IOPATH A CARRYCASCOUT (0.596::2.268)(1.345::5.400))
(IOPATH D CARRYOUT (0.580::2.133)(1.334::5.046)) (IOPATH A CARRYOUT (0.580::2.133)(1.334::5.046))
(IOPATH D MULTSIGNOUT (0.592::2.140)(1.323::5.029)) (IOPATH A MULTSIGNOUT (0.592::2.140)(1.323::5.029))
(IOPATH D P (0.587::2.142)(1.346::5.070)) (IOPATH A P (0.587::2.142)(1.346::5.070))
(IOPATH D PATTERNBDETECT (0.628::2.339)(1.430::5.636)) (IOPATH A PATTERNBDETECT (0.628::2.339)(1.430::5.636))
(IOPATH D PATTERNDETECT (0.628::2.339)(1.430::5.636)) (IOPATH A PATTERNDETECT (0.628::2.339)(1.430::5.636))
(IOPATH D PCOUT (0.580::2.133)(1.334::5.046)) (IOPATH A PCOUT (0.580::2.133)(1.334::5.046))
) )
) )
) )
@ -275,13 +275,13 @@
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(DELAY (DELAY
(ABSOLUTE (ABSOLUTE
(IOPATH D CARRYCASCOUT (0.596::2.268)(1.345::5.400)) (IOPATH A CARRYCASCOUT (0.596::2.268)(1.345::5.400))
(IOPATH D CARRYOUT (0.580::2.133)(1.334::5.046)) (IOPATH A CARRYOUT (0.580::2.133)(1.334::5.046))
(IOPATH D MULTSIGNOUT (0.592::2.140)(1.323::5.029)) (IOPATH A MULTSIGNOUT (0.592::2.140)(1.323::5.029))
(IOPATH D P (0.587::2.142)(1.346::5.070)) (IOPATH A P (0.587::2.142)(1.346::5.070))
(IOPATH D PATTERNBDETECT (0.628::2.339)(1.430::5.636)) (IOPATH A PATTERNBDETECT (0.628::2.339)(1.430::5.636))
(IOPATH D PATTERNDETECT (0.628::2.339)(1.430::5.636)) (IOPATH A PATTERNDETECT (0.628::2.339)(1.430::5.636))
(IOPATH D PCOUT (0.580::2.133)(1.334::5.046)) (IOPATH A PCOUT (0.580::2.133)(1.334::5.046))
) )
) )
) )
@ -289,48 +289,48 @@
(CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET")
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(TIMINGCHECK (TIMINGCHECK
(HOLD D (posedge CLK) (-4.951::-0.994)) (HOLD A (posedge CLK) (-4.951::-0.994))
(SETUP D (posedge CLK) (0.994::4.951)) (SETUP A (posedge CLK) (0.994::4.951))
) )
) )
(CELL (CELL
(CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET")
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(TIMINGCHECK (TIMINGCHECK
(HOLD D (posedge CLK) (-5.342::-1.063)) (HOLD A (posedge CLK) (-5.342::-1.063))
(SETUP D (posedge CLK) (1.063::5.342)) (SETUP A (posedge CLK) (1.063::5.342))
) )
) )
(CELL (CELL
(CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET")
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(TIMINGCHECK (TIMINGCHECK
(HOLD D (posedge CLK) (-4.951::-0.994)) (HOLD A (posedge CLK) (-4.951::-0.994))
(SETUP D (posedge CLK) (0.994::4.951)) (SETUP A (posedge CLK) (0.994::4.951))
) )
) )
(CELL (CELL
(CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET")
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(TIMINGCHECK (TIMINGCHECK
(HOLD D (posedge CLK) (-5.342::-1.063)) (HOLD A (posedge CLK) (-5.342::-1.063))
(SETUP D (posedge CLK) (1.063::5.342)) (SETUP A (posedge CLK) (1.063::5.342))
) )
) )
(CELL (CELL
(CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC") (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC")
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(TIMINGCHECK (TIMINGCHECK
(HOLD D (posedge CLK) (-3.158::-0.249)) (HOLD A (posedge CLK) (-3.158::-0.249))
(SETUP D (posedge CLK) (0.249::3.158)) (SETUP A (posedge CLK) (0.249::3.158))
) )
) )
(CELL (CELL
(CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY") (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY")
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(TIMINGCHECK (TIMINGCHECK
(HOLD D (posedge CLK) (-3.158::-0.249)) (HOLD A (posedge CLK) (-3.158::-0.249))
(SETUP D (posedge CLK) (0.249::3.158)) (SETUP A (posedge CLK) (0.249::3.158))
) )
) )
(CELL (CELL

52
zynq7/timings/DSP_R.sdf
View File

@ -260,13 +260,13 @@
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(DELAY (DELAY
(ABSOLUTE (ABSOLUTE
(IOPATH D CARRYCASCOUT (0.596::2.268)(1.345::5.400)) (IOPATH A CARRYCASCOUT (0.596::2.268)(1.345::5.400))
(IOPATH D CARRYOUT (0.580::2.133)(1.334::5.046)) (IOPATH A CARRYOUT (0.580::2.133)(1.334::5.046))
(IOPATH D MULTSIGNOUT (0.592::2.140)(1.323::5.029)) (IOPATH A MULTSIGNOUT (0.592::2.140)(1.323::5.029))
(IOPATH D P (0.587::2.142)(1.346::5.070)) (IOPATH A P (0.587::2.142)(1.346::5.070))
(IOPATH D PATTERNBDETECT (0.628::2.339)(1.430::5.636)) (IOPATH A PATTERNBDETECT (0.628::2.339)(1.430::5.636))
(IOPATH D PATTERNDETECT (0.628::2.339)(1.430::5.636)) (IOPATH A PATTERNDETECT (0.628::2.339)(1.430::5.636))
(IOPATH D PCOUT (0.580::2.133)(1.334::5.046)) (IOPATH A PCOUT (0.580::2.133)(1.334::5.046))
) )
) )
) )
@ -275,13 +275,13 @@
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(DELAY (DELAY
(ABSOLUTE (ABSOLUTE
(IOPATH D CARRYCASCOUT (0.596::2.268)(1.345::5.400)) (IOPATH A CARRYCASCOUT (0.596::2.268)(1.345::5.400))
(IOPATH D CARRYOUT (0.580::2.133)(1.334::5.046)) (IOPATH A CARRYOUT (0.580::2.133)(1.334::5.046))
(IOPATH D MULTSIGNOUT (0.592::2.140)(1.323::5.029)) (IOPATH A MULTSIGNOUT (0.592::2.140)(1.323::5.029))
(IOPATH D P (0.587::2.142)(1.346::5.070)) (IOPATH A P (0.587::2.142)(1.346::5.070))
(IOPATH D PATTERNBDETECT (0.628::2.339)(1.430::5.636)) (IOPATH A PATTERNBDETECT (0.628::2.339)(1.430::5.636))
(IOPATH D PATTERNDETECT (0.628::2.339)(1.430::5.636)) (IOPATH A PATTERNDETECT (0.628::2.339)(1.430::5.636))
(IOPATH D PCOUT (0.580::2.133)(1.334::5.046)) (IOPATH A PCOUT (0.580::2.133)(1.334::5.046))
) )
) )
) )
@ -289,48 +289,48 @@
(CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET")
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(TIMINGCHECK (TIMINGCHECK
(HOLD D (posedge CLK) (-4.951::-0.994)) (HOLD A (posedge CLK) (-4.951::-0.994))
(SETUP D (posedge CLK) (0.994::4.951)) (SETUP A (posedge CLK) (0.994::4.951))
) )
) )
(CELL (CELL
(CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET")
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(TIMINGCHECK (TIMINGCHECK
(HOLD D (posedge CLK) (-5.342::-1.063)) (HOLD A (posedge CLK) (-5.342::-1.063))
(SETUP D (posedge CLK) (1.063::5.342)) (SETUP A (posedge CLK) (1.063::5.342))
) )
) )
(CELL (CELL
(CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET")
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(TIMINGCHECK (TIMINGCHECK
(HOLD D (posedge CLK) (-4.951::-0.994)) (HOLD A (posedge CLK) (-4.951::-0.994))
(SETUP D (posedge CLK) (0.994::4.951)) (SETUP A (posedge CLK) (0.994::4.951))
) )
) )
(CELL (CELL
(CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET")
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(TIMINGCHECK (TIMINGCHECK
(HOLD D (posedge CLK) (-5.342::-1.063)) (HOLD A (posedge CLK) (-5.342::-1.063))
(SETUP D (posedge CLK) (1.063::5.342)) (SETUP A (posedge CLK) (1.063::5.342))
) )
) )
(CELL (CELL
(CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC") (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC")
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(TIMINGCHECK (TIMINGCHECK
(HOLD D (posedge CLK) (-3.158::-0.249)) (HOLD A (posedge CLK) (-3.158::-0.249))
(SETUP D (posedge CLK) (0.249::3.158)) (SETUP A (posedge CLK) (0.249::3.158))
) )
) )
(CELL (CELL
(CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY") (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY")
(INSTANCE DSP48E1) (INSTANCE DSP48E1)
(TIMINGCHECK (TIMINGCHECK
(HOLD D (posedge CLK) (-3.158::-0.249)) (HOLD A (posedge CLK) (-3.158::-0.249))
(SETUP D (posedge CLK) (0.249::3.158)) (SETUP A (posedge CLK) (0.249::3.158))
) )
) )
(CELL (CELL

1124
zynq7/timings/slicel.sdf
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1356
zynq7/timings/slicem.sdf
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