Updating info based on "Merge pull request #565 from mithro/formatdb".

See [Info File](Info.md) for details.

Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
This commit is contained in:
Tim 'mithro' Ansell 2019-01-31 01:11:28 +00:00
parent 8eb564a20b
commit 41ef594688
12 changed files with 65992 additions and 30763 deletions

42
Info.md
View File

@ -37,20 +37,20 @@ These files are released under the very permissive [CC0 1.0 Universal](COPYING).
# Details
Last updated on Wed Jan 30 05:34:37 UTC 2019 (2019-01-30T05:34:37+00:00).
Last updated on Thu Jan 31 01:15:43 UTC 2019 (2019-01-31T01:15:43+00:00).
Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [v0.0-1623-gd77c6d8](https://github.com/SymbiFlow/prjxray/commit/d77c6d8d6a47fc880ec09872039909b1f1193d20).
Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [a8299c8](https://github.com/SymbiFlow/prjxray/commit/a8299c84a3e37414b961c4ca837c629f84a4ce4f).
Latest commit was;
```
commit d77c6d8d6a47fc880ec09872039909b1f1193d20
Merge: b767eaf c444e8a
commit a8299c84a3e37414b961c4ca837c629f84a4ce4f
Merge: b116641 90bec29
Author: litghost <537074+litghost@users.noreply.github.com>
Date: Thu Jan 24 10:51:07 2019 -0800
Date: Wed Jan 30 08:20:41 2019 -0800
Merge pull request #561 from litghost/add_tilegrid_tool
Merge pull request #578 from litghost/add_zinv_reg_clk
Add tilegrid tool
Add remaining RAMB parameters
```
@ -59,7 +59,7 @@ Date: Thu Jan 24 10:51:07 2019 -0800
### Settings
Created using following [settings/artix7.sh (sha256: 15398c7d0dd8a20e2b3d586ec845e9b1c2292587e308711eacf4fd31508821d5)](https://github.com/SymbiFlow/prjxray/blob/d77c6d8d6a47fc880ec09872039909b1f1193d20/settings/artix7.sh)
Created using following [settings/artix7.sh (sha256: 15398c7d0dd8a20e2b3d586ec845e9b1c2292587e308711eacf4fd31508821d5)](https://github.com/SymbiFlow/prjxray/blob/a8299c84a3e37414b961c4ca837c629f84a4ce4f/settings/artix7.sh)
```shell
export XRAY_DATABASE="artix7"
export XRAY_PART="xc7a50tfgg484-1"
@ -140,12 +140,12 @@ Results have checksums;
* [`53c0ea2b05a2c4ddf2b6cce38073534d0c21b893fc5783dc777d97de2f2d6a9e ./artix7/segbits_clbll_r.db`](./artix7/segbits_clbll_r.db)
* [`e6459c01d0c1c7724fa02716103fd02a3e2a75d6b7326f4c937f158a264ffe85 ./artix7/segbits_clblm_l.db`](./artix7/segbits_clblm_l.db)
* [`5862b402a5e0a95be5f140112678fd39e1dc039bc339fda0e58111ca1ee9cb6e ./artix7/segbits_clblm_r.db`](./artix7/segbits_clblm_r.db)
* [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./artix7/segbits_dsp_l.db`](./artix7/segbits_dsp_l.db)
* [`718d2d615a8b636bdd102c3cf4e36be11f8f4d835c2a3c70fff7e03e9d95a763 ./artix7/segbits_dsp_r.db`](./artix7/segbits_dsp_r.db)
* [`0c4a6e4bc385a8b3a43d05a06d8e87c8822cf2cc1742593167244ff194af4a5e ./artix7/segbits_dsp_l.db`](./artix7/segbits_dsp_l.db)
* [`b014d7e2b101b0b0540a539cb74a76ccbe3a494e225e8e510bf258a457b18685 ./artix7/segbits_dsp_r.db`](./artix7/segbits_dsp_r.db)
* [`1c2c7229781a4a1d51bbbdeea76238b10497c043aaadf2a76de783041a201878 ./artix7/segbits_hclk_l.db`](./artix7/segbits_hclk_l.db)
* [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9 ./artix7/segbits_hclk_r.db`](./artix7/segbits_hclk_r.db)
* [`9bb390b2a3c4d568cd268924d21763196ba1f624d9cd287c641258b845f980aa ./artix7/segbits_int_l.db`](./artix7/segbits_int_l.db)
* [`6a7e04b81043f69652511c4e784a8b112dce3d703b4e97d27ceeff3bec792214 ./artix7/segbits_int_r.db`](./artix7/segbits_int_r.db)
* [`5d127ad971383f9719608e240c2c4aa5d7c52d651fcebc3faa386fc53c2affc7 ./artix7/segbits_int_l.db`](./artix7/segbits_int_l.db)
* [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556 ./artix7/segbits_int_r.db`](./artix7/segbits_int_r.db)
* [`2bc07bf06b86af1985fe1c76da7bd6d858768dd6d9e99344a3c52d490b797cdb ./artix7/settings.sh`](./artix7/settings.sh)
* [`ac6ba9ad814503f0fdc1dabb4292aaccd1a2195f5b348276cfee12aed3d96a70 ./artix7/site_type_BSCAN.json`](./artix7/site_type_BSCAN.json)
* [`64724ba2f8af98df5e1d92e5c2da2e6d5a41eec6580f796405e271dadb4e63be ./artix7/site_type_BUFGCTRL.json`](./artix7/site_type_BUFGCTRL.json)
@ -193,8 +193,8 @@ Results have checksums;
* [`f711f285e16aa11d4827ce8504e9413c8ccf87f9f86d108740738ae6cbb4f388 ./artix7/site_type_XADC.json`](./artix7/site_type_XADC.json)
* [`0bfdad62f04128ca4d469aa18b179cbd3bf78e40c6af50450c9ca85bfffd746f ./artix7/tile_type_BRAM_INT_INTERFACE_L.json`](./artix7/tile_type_BRAM_INT_INTERFACE_L.json)
* [`fd0b3b31118249e66193fa06633a58aa5d86820bed16d3f85497b886d2282845 ./artix7/tile_type_BRAM_INT_INTERFACE_R.json`](./artix7/tile_type_BRAM_INT_INTERFACE_R.json)
* [`0872dcafbe45716e7f05f85e6f21fdf13b83f1b01ad425194a3beb91ebba9c45 ./artix7/tile_type_BRAM_L.json`](./artix7/tile_type_BRAM_L.json)
* [`1f6fb30b7a5ea1931caad8efebaaef9e4c0f8c7505912418974d3922d9668ed5 ./artix7/tile_type_BRAM_R.json`](./artix7/tile_type_BRAM_R.json)
* [`23af85ab67092eb90d6b05c3bff539499494eaecb07b5063baa2aa494063a1ec ./artix7/tile_type_BRAM_L.json`](./artix7/tile_type_BRAM_L.json)
* [`1c16777c03b83fd75f36bd5a4dba291532a1266b19b53441528d521bebb4162e ./artix7/tile_type_BRAM_R.json`](./artix7/tile_type_BRAM_R.json)
* [`29e4879a736ff9d43178ba3887ba47b8f1190464dabf4eef7c8fe8d8d23647c2 ./artix7/tile_type_BRKH_BRAM.json`](./artix7/tile_type_BRKH_BRAM.json)
* [`fccd1abee620b9dc48534d82af9c84d7e4fb9f2fbeaa0d8bbef1ddab5d2d91c5 ./artix7/tile_type_BRKH_B_TERM_INT.json`](./artix7/tile_type_BRKH_B_TERM_INT.json)
* [`1adbede824487b01b77eed4443ff5434c9473a067dae3c620df3ccca800951ac ./artix7/tile_type_BRKH_CLB.json`](./artix7/tile_type_BRKH_CLB.json)
@ -231,14 +231,14 @@ Results have checksums;
* [`9207ebd19f94b6a3a9d8ea08f1fe78dcf592d3b5b5f541694a23d5dc1a9163e3 ./artix7/tile_type_CMT_PMV_L.json`](./artix7/tile_type_CMT_PMV_L.json)
* [`63d8187207a325d174e8d509014200531f3e11236e5064c2675871ca42fbbffa ./artix7/tile_type_CMT_TOP_L_LOWER_B.json`](./artix7/tile_type_CMT_TOP_L_LOWER_B.json)
* [`129c5c28dee6d7cc79263d280a391c07b5db326124ad1e973582643d9eadff3a ./artix7/tile_type_CMT_TOP_L_LOWER_T.json`](./artix7/tile_type_CMT_TOP_L_LOWER_T.json)
* [`74796039811f8938f5ba648cdf6776631345c63a4460e72c6562f457dd176af9 ./artix7/tile_type_CMT_TOP_L_UPPER_B.json`](./artix7/tile_type_CMT_TOP_L_UPPER_B.json)
* [`3196f3226311d6da93de4941e326367c75d2433dcda15df9d1ca9a361f57b297 ./artix7/tile_type_CMT_TOP_L_UPPER_B.json`](./artix7/tile_type_CMT_TOP_L_UPPER_B.json)
* [`e008d249e1f1dafa57e4ac276826c60e24b7fd29ec4e5acafd078c0604631afc ./artix7/tile_type_CMT_TOP_L_UPPER_T.json`](./artix7/tile_type_CMT_TOP_L_UPPER_T.json)
* [`5b45ef7b0d9a366440da629a02330f51b6210652842fe723369e88f31df5d732 ./artix7/tile_type_CMT_TOP_R_LOWER_B.json`](./artix7/tile_type_CMT_TOP_R_LOWER_B.json)
* [`6260182cedf2857372997d8b9a9b3d28504931d1c7ff5176d718dd44935354f0 ./artix7/tile_type_CMT_TOP_R_LOWER_T.json`](./artix7/tile_type_CMT_TOP_R_LOWER_T.json)
* [`21e908de40301ce5b6d3a2479a5784c74f7227a1493941a5552845e794bdfa2b ./artix7/tile_type_CMT_TOP_R_UPPER_B.json`](./artix7/tile_type_CMT_TOP_R_UPPER_B.json)
* [`816d810709c3f54a33774c6a9acefe472cac1e5748d306e692524007b699ee35 ./artix7/tile_type_CMT_TOP_R_UPPER_T.json`](./artix7/tile_type_CMT_TOP_R_UPPER_T.json)
* [`d4731d3d594d0f941c9e8565caf1d5fc8b2da870dc7b311e988b2216f15f7707 ./artix7/tile_type_DSP_L.json`](./artix7/tile_type_DSP_L.json)
* [`25fd899484af79547af7cf8cdb73d6c12a35dd007c2ce570fe739f8268327d61 ./artix7/tile_type_DSP_R.json`](./artix7/tile_type_DSP_R.json)
* [`67014634eb0884ca84f121db190d59d8c32b1fd6e8b130f5b4be43fcca2c66b3 ./artix7/tile_type_DSP_L.json`](./artix7/tile_type_DSP_L.json)
* [`cdcb7f5a7d5fa09b04a3b850cbc196bce36725e135e3f5fa7508d4bf97aa7db8 ./artix7/tile_type_DSP_R.json`](./artix7/tile_type_DSP_R.json)
* [`01bb373548f7244412efb0a59b85203b18450d357c809b0c36ceaee46a81f3d1 ./artix7/tile_type_GTP_CHANNEL_0.json`](./artix7/tile_type_GTP_CHANNEL_0.json)
* [`e34491f9e8151c172f330dbddd41ee646dbb526772409174810ca8872df4e6a1 ./artix7/tile_type_GTP_CHANNEL_1.json`](./artix7/tile_type_GTP_CHANNEL_1.json)
* [`fcb1a2ac092a41409be635c1d61585f0e9d40d0ce86014e424ab99f2f50342ea ./artix7/tile_type_GTP_CHANNEL_2.json`](./artix7/tile_type_GTP_CHANNEL_2.json)
@ -257,7 +257,7 @@ Results have checksums;
* [`7897a72ad8df7a9561af0cd339d07b78fda2d8978771ca314edb158eb6bf21d5 ./artix7/tile_type_HCLK_GTX.json`](./artix7/tile_type_HCLK_GTX.json)
* [`6a66fa18fdad81ae738e61f650066415a2adc7d15b15ab87b5080faff3edb9e1 ./artix7/tile_type_HCLK_INT_INTERFACE.json`](./artix7/tile_type_HCLK_INT_INTERFACE.json)
* [`51fbaa9613664a08814f372c5791189ceb855720997334f55e52872cc6d4c46f ./artix7/tile_type_HCLK_IOB.json`](./artix7/tile_type_HCLK_IOB.json)
* [`5e15b63a15fd7864d838d448599718e5f82e8caafa8fd316eb19374e20c0d89c ./artix7/tile_type_HCLK_IOI3.json`](./artix7/tile_type_HCLK_IOI3.json)
* [`012dd251f28565bd1e4c32568338f9de1b7096b0cd8ed7cd61c7a4e482eafd2e ./artix7/tile_type_HCLK_IOI3.json`](./artix7/tile_type_HCLK_IOI3.json)
* [`2c39172c06f58c30f92d140c6c7c060777b1b3f397a23b9cf82a41a656da82ef ./artix7/tile_type_HCLK_L.json`](./artix7/tile_type_HCLK_L.json)
* [`4270980b733f54a17a34b5259579fd2e42d38efeeb42518967362c599def37c2 ./artix7/tile_type_HCLK_L_BOT_UTURN.json`](./artix7/tile_type_HCLK_L_BOT_UTURN.json)
* [`782d62d7a78ca8282570a945739057b1801795271764120ff4f20696a36e9354 ./artix7/tile_type_HCLK_R.json`](./artix7/tile_type_HCLK_R.json)
@ -304,7 +304,7 @@ Results have checksums;
* [`04409fb1eb974ee5af7e8115bf16aacfd4bda61094c7c4644cc020762a45f6c8 ./artix7/tile_type_VBRK_EXT.json`](./artix7/tile_type_VBRK_EXT.json)
* [`004efcd7f9e172780ca7b8c379ec329bcfc52f86beaa1d997f41dbef7ac4a242 ./artix7/tile_type_VFRAME.json`](./artix7/tile_type_VFRAME.json)
* [`1604d48580815e26069c2b4909fcc50e8e8f974ad0beb349ced2329c302bb06b ./artix7/tileconn.json`](./artix7/tileconn.json)
* [`294062cc5a981f002f0b4ab868c2d75f46276d413e9f178df7e7af78cc47e911 ./artix7/tilegrid.json`](./artix7/tilegrid.json)
* [`3fc6887ad3e71949cc6e444e70c2e380deb588731e8bb1cdeecf5bdd937b86b4 ./artix7/tilegrid.json`](./artix7/tilegrid.json)
* [`4c20ee41ea32668919b7d91a7fabe38960e0ee4d5b3b83f1d18102d48895bf1c ./artix7/xc7a35tcpg236-1.json`](./artix7/xc7a35tcpg236-1.json)
* [`ef0724733da87455426a0f833642d96e9d206d047f4eb97072c3093f80c40d7d ./artix7/xc7a35tcpg236-1.yaml`](./artix7/xc7a35tcpg236-1.yaml)
* [`4c20ee41ea32668919b7d91a7fabe38960e0ee4d5b3b83f1d18102d48895bf1c ./artix7/xc7a35tcsg324-1.json`](./artix7/xc7a35tcsg324-1.json)
@ -317,7 +317,7 @@ Results have checksums;
### Settings
Created using following [settings/kintex7.sh (sha256: b15d95afeae26cb0236f2a17b411f0242e4af0f3664d49dda936465ad3fa2b25)](https://github.com/SymbiFlow/prjxray/blob/d77c6d8d6a47fc880ec09872039909b1f1193d20/settings/kintex7.sh)
Created using following [settings/kintex7.sh (sha256: b15d95afeae26cb0236f2a17b411f0242e4af0f3664d49dda936465ad3fa2b25)](https://github.com/SymbiFlow/prjxray/blob/a8299c84a3e37414b961c4ca837c629f84a4ce4f/settings/kintex7.sh)
```shell
export XRAY_DATABASE="kintex7"
export XRAY_PART="xc7k70tfbg676-2"
@ -555,7 +555,7 @@ Results have checksums;
### Settings
Created using following [settings/zynq7.sh (sha256: d956938bea24fcf8e8c7f71480116a9a668fb7be744e34a4e627b31a6b553f4b)](https://github.com/SymbiFlow/prjxray/blob/d77c6d8d6a47fc880ec09872039909b1f1193d20/settings/zynq7.sh)
Created using following [settings/zynq7.sh (sha256: d956938bea24fcf8e8c7f71480116a9a668fb7be744e34a4e627b31a6b553f4b)](https://github.com/SymbiFlow/prjxray/blob/a8299c84a3e37414b961c4ca837c629f84a4ce4f/settings/zynq7.sh)
```shell
export XRAY_DATABASE="zynq7"
export XRAY_PART="xc7z010clg400-1"

View File

@ -0,0 +1,192 @@
DSP_L.DSP48.DSP_0.MASK[0] 27_01
DSP_L.DSP48.DSP_0.MASK[1] 26_03
DSP_L.DSP48.DSP_0.MASK[2] 27_06
DSP_L.DSP48.DSP_0.MASK[3] 26_07
DSP_L.DSP48.DSP_0.MASK[4] 26_10
DSP_L.DSP48.DSP_0.MASK[5] 27_11
DSP_L.DSP48.DSP_0.MASK[6] 26_18
DSP_L.DSP48.DSP_0.MASK[7] 27_19
DSP_L.DSP48.DSP_0.MASK[8] 26_22
DSP_L.DSP48.DSP_0.MASK[9] 27_23
DSP_L.DSP48.DSP_0.MASK[10] 27_26
DSP_L.DSP48.DSP_0.MASK[11] 26_28
DSP_L.DSP48.DSP_0.MASK[12] 26_41
DSP_L.DSP48.DSP_0.MASK[13] 27_42
DSP_L.DSP48.DSP_0.MASK[14] 26_45
DSP_L.DSP48.DSP_0.MASK[15] 27_46
DSP_L.DSP48.DSP_0.MASK[16] 26_49
DSP_L.DSP48.DSP_0.MASK[17] 27_50
DSP_L.DSP48.DSP_0.MASK[18] 27_57
DSP_L.DSP48.DSP_0.MASK[19] 26_59
DSP_L.DSP48.DSP_0.MASK[20] 26_62
DSP_L.DSP48.DSP_0.MASK[21] 27_63
DSP_L.DSP48.DSP_0.MASK[22] 26_66
DSP_L.DSP48.DSP_0.MASK[23] 27_67
DSP_L.DSP48.DSP_0.MASK[24] 27_86
DSP_L.DSP48.DSP_0.MASK[25] 26_88
DSP_L.DSP48.DSP_0.MASK[26] 27_90
DSP_L.DSP48.DSP_0.MASK[27] 26_92
DSP_L.DSP48.DSP_0.MASK[28] 27_94
DSP_L.DSP48.DSP_0.MASK[29] 26_96
DSP_L.DSP48.DSP_0.MASK[30] 27_102
DSP_L.DSP48.DSP_0.MASK[31] 26_104
DSP_L.DSP48.DSP_0.MASK[32] 27_106
DSP_L.DSP48.DSP_0.MASK[33] 26_108
DSP_L.DSP48.DSP_0.MASK[34] 27_110
DSP_L.DSP48.DSP_0.MASK[35] 26_112
DSP_L.DSP48.DSP_0.MASK[36] 27_127
DSP_L.DSP48.DSP_0.MASK[37] 26_129
DSP_L.DSP48.DSP_0.MASK[38] 26_132
DSP_L.DSP48.DSP_0.MASK[39] 27_133
DSP_L.DSP48.DSP_0.MASK[40] 26_136
DSP_L.DSP48.DSP_0.MASK[41] 27_137
DSP_L.DSP48.DSP_0.MASK[42] 27_144
DSP_L.DSP48.DSP_0.MASK[43] 26_146
DSP_L.DSP48.DSP_0.MASK[44] 26_149
DSP_L.DSP48.DSP_0.MASK[45] 27_150
DSP_L.DSP48.DSP_0.MASK[46] 26_153
DSP_L.DSP48.DSP_0.MASK[47] 26_154
DSP_L.DSP48.DSP_0.PATTERN[0] 26_01
DSP_L.DSP48.DSP_0.PATTERN[1] 26_04
DSP_L.DSP48.DSP_0.PATTERN[2] 26_05
DSP_L.DSP48.DSP_0.PATTERN[3] 27_08
DSP_L.DSP48.DSP_0.PATTERN[4] 26_09
DSP_L.DSP48.DSP_0.PATTERN[5] 26_12
DSP_L.DSP48.DSP_0.PATTERN[6] 27_17
DSP_L.DSP48.DSP_0.PATTERN[7] 26_20
DSP_L.DSP48.DSP_0.PATTERN[8] 27_21
DSP_L.DSP48.DSP_0.PATTERN[9] 27_24
DSP_L.DSP48.DSP_0.PATTERN[10] 26_26
DSP_L.DSP48.DSP_0.PATTERN[11] 26_29
DSP_L.DSP48.DSP_0.PATTERN[12] 27_40
DSP_L.DSP48.DSP_0.PATTERN[13] 26_43
DSP_L.DSP48.DSP_0.PATTERN[14] 27_44
DSP_L.DSP48.DSP_0.PATTERN[15] 26_47
DSP_L.DSP48.DSP_0.PATTERN[16] 27_48
DSP_L.DSP48.DSP_0.PATTERN[17] 26_51
DSP_L.DSP48.DSP_0.PATTERN[18] 26_57
DSP_L.DSP48.DSP_0.PATTERN[19] 26_60
DSP_L.DSP48.DSP_0.PATTERN[20] 27_61
DSP_L.DSP48.DSP_0.PATTERN[21] 26_64
DSP_L.DSP48.DSP_0.PATTERN[22] 27_65
DSP_L.DSP48.DSP_0.PATTERN[23] 26_68
DSP_L.DSP48.DSP_0.PATTERN[24] 26_86
DSP_L.DSP48.DSP_0.PATTERN[25] 27_88
DSP_L.DSP48.DSP_0.PATTERN[26] 26_90
DSP_L.DSP48.DSP_0.PATTERN[27] 27_92
DSP_L.DSP48.DSP_0.PATTERN[28] 26_94
DSP_L.DSP48.DSP_0.PATTERN[29] 26_97
DSP_L.DSP48.DSP_0.PATTERN[30] 27_101
DSP_L.DSP48.DSP_0.PATTERN[31] 27_104
DSP_L.DSP48.DSP_0.PATTERN[32] 26_106
DSP_L.DSP48.DSP_0.PATTERN[33] 27_108
DSP_L.DSP48.DSP_0.PATTERN[34] 26_110
DSP_L.DSP48.DSP_0.PATTERN[35] 27_112
DSP_L.DSP48.DSP_0.PATTERN[36] 26_127
DSP_L.DSP48.DSP_0.PATTERN[37] 26_130
DSP_L.DSP48.DSP_0.PATTERN[38] 27_131
DSP_L.DSP48.DSP_0.PATTERN[39] 26_134
DSP_L.DSP48.DSP_0.PATTERN[40] 27_135
DSP_L.DSP48.DSP_0.PATTERN[41] 26_138
DSP_L.DSP48.DSP_0.PATTERN[42] 26_144
DSP_L.DSP48.DSP_0.PATTERN[43] 27_146
DSP_L.DSP48.DSP_0.PATTERN[44] 26_148
DSP_L.DSP48.DSP_0.PATTERN[45] 26_151
DSP_L.DSP48.DSP_0.PATTERN[46] 27_152
DSP_L.DSP48.DSP_0.PATTERN[47] 26_155
DSP_L.DSP48.DSP_1.MASK[0] 27_161
DSP_L.DSP48.DSP_1.MASK[1] 26_163
DSP_L.DSP48.DSP_1.MASK[2] 27_166
DSP_L.DSP48.DSP_1.MASK[3] 26_167
DSP_L.DSP48.DSP_1.MASK[4] 26_170
DSP_L.DSP48.DSP_1.MASK[5] 27_171
DSP_L.DSP48.DSP_1.MASK[6] 26_178
DSP_L.DSP48.DSP_1.MASK[7] 27_179
DSP_L.DSP48.DSP_1.MASK[8] 26_182
DSP_L.DSP48.DSP_1.MASK[9] 27_183
DSP_L.DSP48.DSP_1.MASK[10] 27_186
DSP_L.DSP48.DSP_1.MASK[11] 26_188
DSP_L.DSP48.DSP_1.MASK[12] 26_201
DSP_L.DSP48.DSP_1.MASK[13] 27_202
DSP_L.DSP48.DSP_1.MASK[14] 26_205
DSP_L.DSP48.DSP_1.MASK[15] 27_206
DSP_L.DSP48.DSP_1.MASK[16] 26_209
DSP_L.DSP48.DSP_1.MASK[17] 27_210
DSP_L.DSP48.DSP_1.MASK[18] 27_217
DSP_L.DSP48.DSP_1.MASK[19] 26_219
DSP_L.DSP48.DSP_1.MASK[20] 26_222
DSP_L.DSP48.DSP_1.MASK[21] 27_223
DSP_L.DSP48.DSP_1.MASK[22] 26_226
DSP_L.DSP48.DSP_1.MASK[23] 27_227
DSP_L.DSP48.DSP_1.MASK[24] 27_246
DSP_L.DSP48.DSP_1.MASK[25] 26_248
DSP_L.DSP48.DSP_1.MASK[26] 27_250
DSP_L.DSP48.DSP_1.MASK[27] 26_252
DSP_L.DSP48.DSP_1.MASK[28] 27_254
DSP_L.DSP48.DSP_1.MASK[29] 26_256
DSP_L.DSP48.DSP_1.MASK[30] 27_262
DSP_L.DSP48.DSP_1.MASK[31] 26_264
DSP_L.DSP48.DSP_1.MASK[32] 27_266
DSP_L.DSP48.DSP_1.MASK[33] 26_268
DSP_L.DSP48.DSP_1.MASK[34] 27_270
DSP_L.DSP48.DSP_1.MASK[35] 26_272
DSP_L.DSP48.DSP_1.MASK[36] 27_287
DSP_L.DSP48.DSP_1.MASK[37] 26_289
DSP_L.DSP48.DSP_1.MASK[38] 26_292
DSP_L.DSP48.DSP_1.MASK[39] 27_293
DSP_L.DSP48.DSP_1.MASK[40] 26_296
DSP_L.DSP48.DSP_1.MASK[41] 27_297
DSP_L.DSP48.DSP_1.MASK[42] 27_304
DSP_L.DSP48.DSP_1.MASK[43] 26_306
DSP_L.DSP48.DSP_1.MASK[44] 26_309
DSP_L.DSP48.DSP_1.MASK[45] 27_310
DSP_L.DSP48.DSP_1.MASK[46] 26_313
DSP_L.DSP48.DSP_1.MASK[47] 26_314
DSP_L.DSP48.DSP_1.PATTERN[0] 26_161
DSP_L.DSP48.DSP_1.PATTERN[1] 26_164
DSP_L.DSP48.DSP_1.PATTERN[2] 26_165
DSP_L.DSP48.DSP_1.PATTERN[3] 27_168
DSP_L.DSP48.DSP_1.PATTERN[4] 26_169
DSP_L.DSP48.DSP_1.PATTERN[5] 26_172
DSP_L.DSP48.DSP_1.PATTERN[6] 27_177
DSP_L.DSP48.DSP_1.PATTERN[7] 26_180
DSP_L.DSP48.DSP_1.PATTERN[8] 27_181
DSP_L.DSP48.DSP_1.PATTERN[9] 27_184
DSP_L.DSP48.DSP_1.PATTERN[10] 26_186
DSP_L.DSP48.DSP_1.PATTERN[11] 26_189
DSP_L.DSP48.DSP_1.PATTERN[12] 27_200
DSP_L.DSP48.DSP_1.PATTERN[13] 26_203
DSP_L.DSP48.DSP_1.PATTERN[14] 27_204
DSP_L.DSP48.DSP_1.PATTERN[15] 26_207
DSP_L.DSP48.DSP_1.PATTERN[16] 27_208
DSP_L.DSP48.DSP_1.PATTERN[17] 26_211
DSP_L.DSP48.DSP_1.PATTERN[18] 26_217
DSP_L.DSP48.DSP_1.PATTERN[19] 26_220
DSP_L.DSP48.DSP_1.PATTERN[20] 27_221
DSP_L.DSP48.DSP_1.PATTERN[21] 26_224
DSP_L.DSP48.DSP_1.PATTERN[22] 27_225
DSP_L.DSP48.DSP_1.PATTERN[23] 26_228
DSP_L.DSP48.DSP_1.PATTERN[24] 26_246
DSP_L.DSP48.DSP_1.PATTERN[25] 27_248
DSP_L.DSP48.DSP_1.PATTERN[26] 26_250
DSP_L.DSP48.DSP_1.PATTERN[27] 27_252
DSP_L.DSP48.DSP_1.PATTERN[28] 26_254
DSP_L.DSP48.DSP_1.PATTERN[29] 26_257
DSP_L.DSP48.DSP_1.PATTERN[30] 27_261
DSP_L.DSP48.DSP_1.PATTERN[31] 27_264
DSP_L.DSP48.DSP_1.PATTERN[32] 26_266
DSP_L.DSP48.DSP_1.PATTERN[33] 27_268
DSP_L.DSP48.DSP_1.PATTERN[34] 26_270
DSP_L.DSP48.DSP_1.PATTERN[35] 27_272
DSP_L.DSP48.DSP_1.PATTERN[36] 26_287
DSP_L.DSP48.DSP_1.PATTERN[37] 26_290
DSP_L.DSP48.DSP_1.PATTERN[38] 27_291
DSP_L.DSP48.DSP_1.PATTERN[39] 26_294
DSP_L.DSP48.DSP_1.PATTERN[40] 27_295
DSP_L.DSP48.DSP_1.PATTERN[41] 26_298
DSP_L.DSP48.DSP_1.PATTERN[42] 26_304
DSP_L.DSP48.DSP_1.PATTERN[43] 27_306
DSP_L.DSP48.DSP_1.PATTERN[44] 26_308
DSP_L.DSP48.DSP_1.PATTERN[45] 26_311
DSP_L.DSP48.DSP_1.PATTERN[46] 27_312
DSP_L.DSP48.DSP_1.PATTERN[47] 26_315

View File

@ -1,192 +1,192 @@
DSP_R.DSP_0.MASK[0] 27_01
DSP_R.DSP_0.MASK[1] 26_03
DSP_R.DSP_0.MASK[2] 27_06
DSP_R.DSP_0.MASK[3] 26_07
DSP_R.DSP_0.MASK[4] 26_10
DSP_R.DSP_0.MASK[5] 27_11
DSP_R.DSP_0.MASK[6] 26_18
DSP_R.DSP_0.MASK[7] 27_19
DSP_R.DSP_0.MASK[8] 26_22
DSP_R.DSP_0.MASK[9] 27_23
DSP_R.DSP_0.MASK[10] 27_26
DSP_R.DSP_0.MASK[11] 26_28
DSP_R.DSP_0.MASK[12] 26_41
DSP_R.DSP_0.MASK[13] 27_42
DSP_R.DSP_0.MASK[14] 26_45
DSP_R.DSP_0.MASK[15] 27_46
DSP_R.DSP_0.MASK[16] 26_49
DSP_R.DSP_0.MASK[17] 27_50
DSP_R.DSP_0.MASK[18] 27_57
DSP_R.DSP_0.MASK[19] 26_59
DSP_R.DSP_0.MASK[20] 26_62
DSP_R.DSP_0.MASK[21] 27_63
DSP_R.DSP_0.MASK[22] 26_66
DSP_R.DSP_0.MASK[23] 27_67
DSP_R.DSP_0.MASK[24] 27_86
DSP_R.DSP_0.MASK[25] 26_88
DSP_R.DSP_0.MASK[26] 27_90
DSP_R.DSP_0.MASK[27] 26_92
DSP_R.DSP_0.MASK[28] 27_94
DSP_R.DSP_0.MASK[29] 26_96
DSP_R.DSP_0.MASK[30] 27_102
DSP_R.DSP_0.MASK[31] 26_104
DSP_R.DSP_0.MASK[32] 27_106
DSP_R.DSP_0.MASK[33] 26_108
DSP_R.DSP_0.MASK[34] 27_110
DSP_R.DSP_0.MASK[35] 26_112
DSP_R.DSP_0.MASK[36] 27_127
DSP_R.DSP_0.MASK[37] 26_129
DSP_R.DSP_0.MASK[38] 26_132
DSP_R.DSP_0.MASK[39] 27_133
DSP_R.DSP_0.MASK[40] 26_136
DSP_R.DSP_0.MASK[41] 27_137
DSP_R.DSP_0.MASK[42] 27_144
DSP_R.DSP_0.MASK[43] 26_146
DSP_R.DSP_0.MASK[44] 26_149
DSP_R.DSP_0.MASK[45] 27_150
DSP_R.DSP_0.MASK[46] 26_153
DSP_R.DSP_0.MASK[47] 26_154
DSP_R.DSP_0.PATTERN[0] 26_01
DSP_R.DSP_0.PATTERN[1] 26_04
DSP_R.DSP_0.PATTERN[2] 26_05
DSP_R.DSP_0.PATTERN[3] 27_08
DSP_R.DSP_0.PATTERN[4] 26_09
DSP_R.DSP_0.PATTERN[5] 26_12
DSP_R.DSP_0.PATTERN[6] 27_17
DSP_R.DSP_0.PATTERN[7] 26_20
DSP_R.DSP_0.PATTERN[8] 27_21
DSP_R.DSP_0.PATTERN[9] 27_24
DSP_R.DSP_0.PATTERN[10] 26_26
DSP_R.DSP_0.PATTERN[11] 26_29
DSP_R.DSP_0.PATTERN[12] 27_40
DSP_R.DSP_0.PATTERN[13] 26_43
DSP_R.DSP_0.PATTERN[14] 27_44
DSP_R.DSP_0.PATTERN[15] 26_47
DSP_R.DSP_0.PATTERN[16] 27_48
DSP_R.DSP_0.PATTERN[17] 26_51
DSP_R.DSP_0.PATTERN[18] 26_57
DSP_R.DSP_0.PATTERN[19] 26_60
DSP_R.DSP_0.PATTERN[20] 27_61
DSP_R.DSP_0.PATTERN[21] 26_64
DSP_R.DSP_0.PATTERN[22] 27_65
DSP_R.DSP_0.PATTERN[23] 26_68
DSP_R.DSP_0.PATTERN[24] 26_86
DSP_R.DSP_0.PATTERN[25] 27_88
DSP_R.DSP_0.PATTERN[26] 26_90
DSP_R.DSP_0.PATTERN[27] 27_92
DSP_R.DSP_0.PATTERN[28] 26_94
DSP_R.DSP_0.PATTERN[29] 26_97
DSP_R.DSP_0.PATTERN[30] 27_101
DSP_R.DSP_0.PATTERN[31] 27_104
DSP_R.DSP_0.PATTERN[32] 26_106
DSP_R.DSP_0.PATTERN[33] 27_108
DSP_R.DSP_0.PATTERN[34] 26_110
DSP_R.DSP_0.PATTERN[35] 27_112
DSP_R.DSP_0.PATTERN[36] 26_127
DSP_R.DSP_0.PATTERN[37] 26_130
DSP_R.DSP_0.PATTERN[38] 27_131
DSP_R.DSP_0.PATTERN[39] 26_134
DSP_R.DSP_0.PATTERN[40] 27_135
DSP_R.DSP_0.PATTERN[41] 26_138
DSP_R.DSP_0.PATTERN[42] 26_144
DSP_R.DSP_0.PATTERN[43] 27_146
DSP_R.DSP_0.PATTERN[44] 26_148
DSP_R.DSP_0.PATTERN[45] 26_151
DSP_R.DSP_0.PATTERN[46] 27_152
DSP_R.DSP_0.PATTERN[47] 26_155
DSP_R.DSP_1.MASK[0] 27_161
DSP_R.DSP_1.MASK[1] 26_163
DSP_R.DSP_1.MASK[2] 27_166
DSP_R.DSP_1.MASK[3] 26_167
DSP_R.DSP_1.MASK[4] 26_170
DSP_R.DSP_1.MASK[5] 27_171
DSP_R.DSP_1.MASK[6] 26_178
DSP_R.DSP_1.MASK[7] 27_179
DSP_R.DSP_1.MASK[8] 26_182
DSP_R.DSP_1.MASK[9] 27_183
DSP_R.DSP_1.MASK[10] 27_186
DSP_R.DSP_1.MASK[11] 26_188
DSP_R.DSP_1.MASK[12] 26_201
DSP_R.DSP_1.MASK[13] 27_202
DSP_R.DSP_1.MASK[14] 26_205
DSP_R.DSP_1.MASK[15] 27_206
DSP_R.DSP_1.MASK[16] 26_209
DSP_R.DSP_1.MASK[17] 27_210
DSP_R.DSP_1.MASK[18] 27_217
DSP_R.DSP_1.MASK[19] 26_219
DSP_R.DSP_1.MASK[20] 26_222
DSP_R.DSP_1.MASK[21] 27_223
DSP_R.DSP_1.MASK[22] 26_226
DSP_R.DSP_1.MASK[23] 27_227
DSP_R.DSP_1.MASK[24] 27_246
DSP_R.DSP_1.MASK[25] 26_248
DSP_R.DSP_1.MASK[26] 27_250
DSP_R.DSP_1.MASK[27] 26_252
DSP_R.DSP_1.MASK[28] 27_254
DSP_R.DSP_1.MASK[29] 26_256
DSP_R.DSP_1.MASK[30] 27_262
DSP_R.DSP_1.MASK[31] 26_264
DSP_R.DSP_1.MASK[32] 27_266
DSP_R.DSP_1.MASK[33] 26_268
DSP_R.DSP_1.MASK[34] 27_270
DSP_R.DSP_1.MASK[35] 26_272
DSP_R.DSP_1.MASK[36] 27_287
DSP_R.DSP_1.MASK[37] 26_289
DSP_R.DSP_1.MASK[38] 26_292
DSP_R.DSP_1.MASK[39] 27_293
DSP_R.DSP_1.MASK[40] 26_296
DSP_R.DSP_1.MASK[41] 27_297
DSP_R.DSP_1.MASK[42] 27_304
DSP_R.DSP_1.MASK[43] 26_306
DSP_R.DSP_1.MASK[44] 26_309
DSP_R.DSP_1.MASK[45] 27_310
DSP_R.DSP_1.MASK[46] 26_313
DSP_R.DSP_1.MASK[47] 26_314
DSP_R.DSP_1.PATTERN[0] 26_161
DSP_R.DSP_1.PATTERN[1] 26_164
DSP_R.DSP_1.PATTERN[2] 26_165
DSP_R.DSP_1.PATTERN[3] 27_168
DSP_R.DSP_1.PATTERN[4] 26_169
DSP_R.DSP_1.PATTERN[5] 26_172
DSP_R.DSP_1.PATTERN[6] 27_177
DSP_R.DSP_1.PATTERN[7] 26_180
DSP_R.DSP_1.PATTERN[8] 27_181
DSP_R.DSP_1.PATTERN[9] 27_184
DSP_R.DSP_1.PATTERN[10] 26_186
DSP_R.DSP_1.PATTERN[11] 26_189
DSP_R.DSP_1.PATTERN[12] 27_200
DSP_R.DSP_1.PATTERN[13] 26_203
DSP_R.DSP_1.PATTERN[14] 27_204
DSP_R.DSP_1.PATTERN[15] 26_207
DSP_R.DSP_1.PATTERN[16] 27_208
DSP_R.DSP_1.PATTERN[17] 26_211
DSP_R.DSP_1.PATTERN[18] 26_217
DSP_R.DSP_1.PATTERN[19] 26_220
DSP_R.DSP_1.PATTERN[20] 27_221
DSP_R.DSP_1.PATTERN[21] 26_224
DSP_R.DSP_1.PATTERN[22] 27_225
DSP_R.DSP_1.PATTERN[23] 26_228
DSP_R.DSP_1.PATTERN[24] 26_246
DSP_R.DSP_1.PATTERN[25] 27_248
DSP_R.DSP_1.PATTERN[26] 26_250
DSP_R.DSP_1.PATTERN[27] 27_252
DSP_R.DSP_1.PATTERN[28] 26_254
DSP_R.DSP_1.PATTERN[29] 26_257
DSP_R.DSP_1.PATTERN[30] 27_261
DSP_R.DSP_1.PATTERN[31] 27_264
DSP_R.DSP_1.PATTERN[32] 26_266
DSP_R.DSP_1.PATTERN[33] 27_268
DSP_R.DSP_1.PATTERN[34] 26_270
DSP_R.DSP_1.PATTERN[35] 27_272
DSP_R.DSP_1.PATTERN[36] 26_287
DSP_R.DSP_1.PATTERN[37] 26_290
DSP_R.DSP_1.PATTERN[38] 27_291
DSP_R.DSP_1.PATTERN[39] 26_294
DSP_R.DSP_1.PATTERN[40] 27_295
DSP_R.DSP_1.PATTERN[41] 26_298
DSP_R.DSP_1.PATTERN[42] 26_304
DSP_R.DSP_1.PATTERN[43] 27_306
DSP_R.DSP_1.PATTERN[44] 26_308
DSP_R.DSP_1.PATTERN[45] 26_311
DSP_R.DSP_1.PATTERN[46] 27_312
DSP_R.DSP_1.PATTERN[47] 26_315
DSP_R.DSP48.DSP_0.MASK[0] 27_01
DSP_R.DSP48.DSP_0.MASK[1] 26_03
DSP_R.DSP48.DSP_0.MASK[2] 27_06
DSP_R.DSP48.DSP_0.MASK[3] 26_07
DSP_R.DSP48.DSP_0.MASK[4] 26_10
DSP_R.DSP48.DSP_0.MASK[5] 27_11
DSP_R.DSP48.DSP_0.MASK[6] 26_18
DSP_R.DSP48.DSP_0.MASK[7] 27_19
DSP_R.DSP48.DSP_0.MASK[8] 26_22
DSP_R.DSP48.DSP_0.MASK[9] 27_23
DSP_R.DSP48.DSP_0.MASK[10] 27_26
DSP_R.DSP48.DSP_0.MASK[11] 26_28
DSP_R.DSP48.DSP_0.MASK[12] 26_41
DSP_R.DSP48.DSP_0.MASK[13] 27_42
DSP_R.DSP48.DSP_0.MASK[14] 26_45
DSP_R.DSP48.DSP_0.MASK[15] 27_46
DSP_R.DSP48.DSP_0.MASK[16] 26_49
DSP_R.DSP48.DSP_0.MASK[17] 27_50
DSP_R.DSP48.DSP_0.MASK[18] 27_57
DSP_R.DSP48.DSP_0.MASK[19] 26_59
DSP_R.DSP48.DSP_0.MASK[20] 26_62
DSP_R.DSP48.DSP_0.MASK[21] 27_63
DSP_R.DSP48.DSP_0.MASK[22] 26_66
DSP_R.DSP48.DSP_0.MASK[23] 27_67
DSP_R.DSP48.DSP_0.MASK[24] 27_86
DSP_R.DSP48.DSP_0.MASK[25] 26_88
DSP_R.DSP48.DSP_0.MASK[26] 27_90
DSP_R.DSP48.DSP_0.MASK[27] 26_92
DSP_R.DSP48.DSP_0.MASK[28] 27_94
DSP_R.DSP48.DSP_0.MASK[29] 26_96
DSP_R.DSP48.DSP_0.MASK[30] 27_102
DSP_R.DSP48.DSP_0.MASK[31] 26_104
DSP_R.DSP48.DSP_0.MASK[32] 27_106
DSP_R.DSP48.DSP_0.MASK[33] 26_108
DSP_R.DSP48.DSP_0.MASK[34] 27_110
DSP_R.DSP48.DSP_0.MASK[35] 26_112
DSP_R.DSP48.DSP_0.MASK[36] 27_127
DSP_R.DSP48.DSP_0.MASK[37] 26_129
DSP_R.DSP48.DSP_0.MASK[38] 26_132
DSP_R.DSP48.DSP_0.MASK[39] 27_133
DSP_R.DSP48.DSP_0.MASK[40] 26_136
DSP_R.DSP48.DSP_0.MASK[41] 27_137
DSP_R.DSP48.DSP_0.MASK[42] 27_144
DSP_R.DSP48.DSP_0.MASK[43] 26_146
DSP_R.DSP48.DSP_0.MASK[44] 26_149
DSP_R.DSP48.DSP_0.MASK[45] 27_150
DSP_R.DSP48.DSP_0.MASK[46] 26_153
DSP_R.DSP48.DSP_0.MASK[47] 26_154
DSP_R.DSP48.DSP_0.PATTERN[0] 26_01
DSP_R.DSP48.DSP_0.PATTERN[1] 26_04
DSP_R.DSP48.DSP_0.PATTERN[2] 26_05
DSP_R.DSP48.DSP_0.PATTERN[3] 27_08
DSP_R.DSP48.DSP_0.PATTERN[4] 26_09
DSP_R.DSP48.DSP_0.PATTERN[5] 26_12
DSP_R.DSP48.DSP_0.PATTERN[6] 27_17
DSP_R.DSP48.DSP_0.PATTERN[7] 26_20
DSP_R.DSP48.DSP_0.PATTERN[8] 27_21
DSP_R.DSP48.DSP_0.PATTERN[9] 27_24
DSP_R.DSP48.DSP_0.PATTERN[10] 26_26
DSP_R.DSP48.DSP_0.PATTERN[11] 26_29
DSP_R.DSP48.DSP_0.PATTERN[12] 27_40
DSP_R.DSP48.DSP_0.PATTERN[13] 26_43
DSP_R.DSP48.DSP_0.PATTERN[14] 27_44
DSP_R.DSP48.DSP_0.PATTERN[15] 26_47
DSP_R.DSP48.DSP_0.PATTERN[16] 27_48
DSP_R.DSP48.DSP_0.PATTERN[17] 26_51
DSP_R.DSP48.DSP_0.PATTERN[18] 26_57
DSP_R.DSP48.DSP_0.PATTERN[19] 26_60
DSP_R.DSP48.DSP_0.PATTERN[20] 27_61
DSP_R.DSP48.DSP_0.PATTERN[21] 26_64
DSP_R.DSP48.DSP_0.PATTERN[22] 27_65
DSP_R.DSP48.DSP_0.PATTERN[23] 26_68
DSP_R.DSP48.DSP_0.PATTERN[24] 26_86
DSP_R.DSP48.DSP_0.PATTERN[25] 27_88
DSP_R.DSP48.DSP_0.PATTERN[26] 26_90
DSP_R.DSP48.DSP_0.PATTERN[27] 27_92
DSP_R.DSP48.DSP_0.PATTERN[28] 26_94
DSP_R.DSP48.DSP_0.PATTERN[29] 26_97
DSP_R.DSP48.DSP_0.PATTERN[30] 27_101
DSP_R.DSP48.DSP_0.PATTERN[31] 27_104
DSP_R.DSP48.DSP_0.PATTERN[32] 26_106
DSP_R.DSP48.DSP_0.PATTERN[33] 27_108
DSP_R.DSP48.DSP_0.PATTERN[34] 26_110
DSP_R.DSP48.DSP_0.PATTERN[35] 27_112
DSP_R.DSP48.DSP_0.PATTERN[36] 26_127
DSP_R.DSP48.DSP_0.PATTERN[37] 26_130
DSP_R.DSP48.DSP_0.PATTERN[38] 27_131
DSP_R.DSP48.DSP_0.PATTERN[39] 26_134
DSP_R.DSP48.DSP_0.PATTERN[40] 27_135
DSP_R.DSP48.DSP_0.PATTERN[41] 26_138
DSP_R.DSP48.DSP_0.PATTERN[42] 26_144
DSP_R.DSP48.DSP_0.PATTERN[43] 27_146
DSP_R.DSP48.DSP_0.PATTERN[44] 26_148
DSP_R.DSP48.DSP_0.PATTERN[45] 26_151
DSP_R.DSP48.DSP_0.PATTERN[46] 27_152
DSP_R.DSP48.DSP_0.PATTERN[47] 26_155
DSP_R.DSP48.DSP_1.MASK[0] 27_161
DSP_R.DSP48.DSP_1.MASK[1] 26_163
DSP_R.DSP48.DSP_1.MASK[2] 27_166
DSP_R.DSP48.DSP_1.MASK[3] 26_167
DSP_R.DSP48.DSP_1.MASK[4] 26_170
DSP_R.DSP48.DSP_1.MASK[5] 27_171
DSP_R.DSP48.DSP_1.MASK[6] 26_178
DSP_R.DSP48.DSP_1.MASK[7] 27_179
DSP_R.DSP48.DSP_1.MASK[8] 26_182
DSP_R.DSP48.DSP_1.MASK[9] 27_183
DSP_R.DSP48.DSP_1.MASK[10] 27_186
DSP_R.DSP48.DSP_1.MASK[11] 26_188
DSP_R.DSP48.DSP_1.MASK[12] 26_201
DSP_R.DSP48.DSP_1.MASK[13] 27_202
DSP_R.DSP48.DSP_1.MASK[14] 26_205
DSP_R.DSP48.DSP_1.MASK[15] 27_206
DSP_R.DSP48.DSP_1.MASK[16] 26_209
DSP_R.DSP48.DSP_1.MASK[17] 27_210
DSP_R.DSP48.DSP_1.MASK[18] 27_217
DSP_R.DSP48.DSP_1.MASK[19] 26_219
DSP_R.DSP48.DSP_1.MASK[20] 26_222
DSP_R.DSP48.DSP_1.MASK[21] 27_223
DSP_R.DSP48.DSP_1.MASK[22] 26_226
DSP_R.DSP48.DSP_1.MASK[23] 27_227
DSP_R.DSP48.DSP_1.MASK[24] 27_246
DSP_R.DSP48.DSP_1.MASK[25] 26_248
DSP_R.DSP48.DSP_1.MASK[26] 27_250
DSP_R.DSP48.DSP_1.MASK[27] 26_252
DSP_R.DSP48.DSP_1.MASK[28] 27_254
DSP_R.DSP48.DSP_1.MASK[29] 26_256
DSP_R.DSP48.DSP_1.MASK[30] 27_262
DSP_R.DSP48.DSP_1.MASK[31] 26_264
DSP_R.DSP48.DSP_1.MASK[32] 27_266
DSP_R.DSP48.DSP_1.MASK[33] 26_268
DSP_R.DSP48.DSP_1.MASK[34] 27_270
DSP_R.DSP48.DSP_1.MASK[35] 26_272
DSP_R.DSP48.DSP_1.MASK[36] 27_287
DSP_R.DSP48.DSP_1.MASK[37] 26_289
DSP_R.DSP48.DSP_1.MASK[38] 26_292
DSP_R.DSP48.DSP_1.MASK[39] 27_293
DSP_R.DSP48.DSP_1.MASK[40] 26_296
DSP_R.DSP48.DSP_1.MASK[41] 27_297
DSP_R.DSP48.DSP_1.MASK[42] 27_304
DSP_R.DSP48.DSP_1.MASK[43] 26_306
DSP_R.DSP48.DSP_1.MASK[44] 26_309
DSP_R.DSP48.DSP_1.MASK[45] 27_310
DSP_R.DSP48.DSP_1.MASK[46] 26_313
DSP_R.DSP48.DSP_1.MASK[47] 26_314
DSP_R.DSP48.DSP_1.PATTERN[0] 26_161
DSP_R.DSP48.DSP_1.PATTERN[1] 26_164
DSP_R.DSP48.DSP_1.PATTERN[2] 26_165
DSP_R.DSP48.DSP_1.PATTERN[3] 27_168
DSP_R.DSP48.DSP_1.PATTERN[4] 26_169
DSP_R.DSP48.DSP_1.PATTERN[5] 26_172
DSP_R.DSP48.DSP_1.PATTERN[6] 27_177
DSP_R.DSP48.DSP_1.PATTERN[7] 26_180
DSP_R.DSP48.DSP_1.PATTERN[8] 27_181
DSP_R.DSP48.DSP_1.PATTERN[9] 27_184
DSP_R.DSP48.DSP_1.PATTERN[10] 26_186
DSP_R.DSP48.DSP_1.PATTERN[11] 26_189
DSP_R.DSP48.DSP_1.PATTERN[12] 27_200
DSP_R.DSP48.DSP_1.PATTERN[13] 26_203
DSP_R.DSP48.DSP_1.PATTERN[14] 27_204
DSP_R.DSP48.DSP_1.PATTERN[15] 26_207
DSP_R.DSP48.DSP_1.PATTERN[16] 27_208
DSP_R.DSP48.DSP_1.PATTERN[17] 26_211
DSP_R.DSP48.DSP_1.PATTERN[18] 26_217
DSP_R.DSP48.DSP_1.PATTERN[19] 26_220
DSP_R.DSP48.DSP_1.PATTERN[20] 27_221
DSP_R.DSP48.DSP_1.PATTERN[21] 26_224
DSP_R.DSP48.DSP_1.PATTERN[22] 27_225
DSP_R.DSP48.DSP_1.PATTERN[23] 26_228
DSP_R.DSP48.DSP_1.PATTERN[24] 26_246
DSP_R.DSP48.DSP_1.PATTERN[25] 27_248
DSP_R.DSP48.DSP_1.PATTERN[26] 26_250
DSP_R.DSP48.DSP_1.PATTERN[27] 27_252
DSP_R.DSP48.DSP_1.PATTERN[28] 26_254
DSP_R.DSP48.DSP_1.PATTERN[29] 26_257
DSP_R.DSP48.DSP_1.PATTERN[30] 27_261
DSP_R.DSP48.DSP_1.PATTERN[31] 27_264
DSP_R.DSP48.DSP_1.PATTERN[32] 26_266
DSP_R.DSP48.DSP_1.PATTERN[33] 27_268
DSP_R.DSP48.DSP_1.PATTERN[34] 26_270
DSP_R.DSP48.DSP_1.PATTERN[35] 27_272
DSP_R.DSP48.DSP_1.PATTERN[36] 26_287
DSP_R.DSP48.DSP_1.PATTERN[37] 26_290
DSP_R.DSP48.DSP_1.PATTERN[38] 27_291
DSP_R.DSP48.DSP_1.PATTERN[39] 26_294
DSP_R.DSP48.DSP_1.PATTERN[40] 27_295
DSP_R.DSP48.DSP_1.PATTERN[41] 26_298
DSP_R.DSP48.DSP_1.PATTERN[42] 26_304
DSP_R.DSP48.DSP_1.PATTERN[43] 27_306
DSP_R.DSP48.DSP_1.PATTERN[44] 26_308
DSP_R.DSP48.DSP_1.PATTERN[45] 26_311
DSP_R.DSP48.DSP_1.PATTERN[46] 27_312
DSP_R.DSP48.DSP_1.PATTERN[47] 26_315

View File

@ -353,7 +353,7 @@ INT_L.FAN_ALT2.SR1BEG_S0 19_17 22_16 !23_16 24_16 25_16
INT_L.FAN_ALT2.EE2END1 19_17 !22_16 !23_16 !24_16 25_16
INT_L.FAN_ALT2.EL1END1 17_16 !22_16 23_16 24_16 25_16
INT_L.FAN_ALT2.ER1END0 16_16 22_16 !23_16 24_16 25_16
INT_L.FAN_ALT2.GFAN0 !00_10 !00_11 !01_09 !01_10 01_14 21_16 !22_16 !23_16 !24_16 25_16
INT_L.FAN_ALT2.GFAN0 !00_10 !00_11 !01_09 01_10 01_14 21_16 !22_16 !23_16 !24_16 25_16
INT_L.FAN_ALT2.NE2END1 18_17 !22_16 !23_16 24_16 !25_16
INT_L.FAN_ALT2.NL1END1 19_17 !22_16 23_16 24_16 25_16
INT_L.FAN_ALT2.NN2END1 18_17 !22_16 !23_16 !24_16 25_16
@ -401,7 +401,7 @@ INT_L.FAN_ALT4.SR1BEG_S0 19_09 22_08 !23_08 24_08 25_08
INT_L.FAN_ALT4.EE2END0 16_08 !22_08 !23_08 !24_08 25_08
INT_L.FAN_ALT4.EL1END0 16_08 !22_08 23_08 24_08 25_08
INT_L.FAN_ALT4.ER1END0 17_08 22_08 !23_08 24_08 25_08
INT_L.FAN_ALT4.GFAN0 21_08 !22_08 !23_08 !24_08 25_08
INT_L.FAN_ALT4.GFAN0 !00_10 !00_11 !01_09 01_10 01_14 21_08 !22_08 !23_08 !24_08 25_08
INT_L.FAN_ALT4.NE2END0 17_08 !22_08 !23_08 24_08 !25_08
INT_L.FAN_ALT4.NL1END1 19_09 !22_08 23_08 24_08 25_08
INT_L.FAN_ALT4.NN2END0 17_08 !22_08 !23_08 !24_08 25_08

View File

@ -337,7 +337,7 @@ INT_R.FAN_ALT4.SR1BEG_S0 19_09 22_08 !23_08 24_08 25_08
INT_R.FAN_ALT4.EE2END0 16_08 !22_08 !23_08 !24_08 25_08
INT_R.FAN_ALT4.EL1END0 16_08 !22_08 23_08 24_08 25_08
INT_R.FAN_ALT4.ER1END0 17_08 22_08 !23_08 24_08 25_08
INT_R.FAN_ALT4.GFAN0 !00_10 !00_11 !01_09 01_10 01_14 21_08 !22_08 !23_08 !24_08 25_08
INT_R.FAN_ALT4.GFAN0 21_08 !22_08 !23_08 !24_08 25_08
INT_R.FAN_ALT4.NE2END0 17_08 !22_08 !23_08 24_08 !25_08
INT_R.FAN_ALT4.NL1END1 19_09 !22_08 23_08 24_08 25_08
INT_R.FAN_ALT4.NN2END0 17_08 !22_08 !23_08 !24_08 25_08

View File

@ -7186,7 +7186,7 @@
"y_coord": 0
},
{
"name": "X0Y29",
"name": "X0Y0",
"prefix": "RAMB18",
"site_pins": {
"ADDRARDADDR0": "BRAM_FIFO18_ADDRARDADDR0",
@ -7350,10 +7350,10 @@
},
"type": "FIFO18E1",
"x_coord": 0,
"y_coord": 29
"y_coord": 0
},
{
"name": "X0Y30",
"name": "X0Y1",
"prefix": "RAMB18",
"site_pins": {
"ADDRARDADDR0": "BRAM_RAMB18_ADDRARDADDR0",
@ -7517,7 +7517,7 @@
},
"type": "RAMB18E1",
"x_coord": 0,
"y_coord": 30
"y_coord": 1
}
],
"tile_type": "BRAM_L",

View File

@ -6821,7 +6821,7 @@
},
"sites": [
{
"name": "X0Y19",
"name": "X0Y8",
"prefix": "RAMB18",
"site_pins": {
"ADDRARDADDR0": "BRAM_FIFO18_ADDRARDADDR0",
@ -6985,10 +6985,10 @@
},
"type": "FIFO18E1",
"x_coord": 0,
"y_coord": 19
"y_coord": 8
},
{
"name": "X0Y20",
"name": "X0Y9",
"prefix": "RAMB18",
"site_pins": {
"ADDRARDADDR0": "BRAM_RAMB18_ADDRARDADDR0",
@ -7152,7 +7152,7 @@
},
"type": "RAMB18E1",
"x_coord": 0,
"y_coord": 20
"y_coord": 9
},
{
"name": "X0Y0",

View File

@ -2856,7 +2856,7 @@
"y_coord": 0
},
{
"name": "X0Y2",
"name": "X0Y5",
"prefix": "PHASER_OUT_PHY",
"site_pins": {
"BURSTPENDING": "CMT_PHASER_OUT_CA_BURSTPENDING",
@ -2939,10 +2939,10 @@
},
"type": "PHASER_OUT_PHY",
"x_coord": 0,
"y_coord": 2
"y_coord": 5
},
{
"name": "X0Y2",
"name": "X0Y5",
"prefix": "PHASER_IN_PHY",
"site_pins": {
"BURSTPENDING": "CMT_PHASER_IN_CA_BURSTPENDING",
@ -3040,10 +3040,10 @@
},
"type": "PHASER_IN_PHY",
"x_coord": 0,
"y_coord": 2
"y_coord": 5
},
{
"name": "X0Y3",
"name": "X0Y6",
"prefix": "PHASER_OUT_PHY",
"site_pins": {
"BURSTPENDING": "CMT_PHASER_OUT_DB_BURSTPENDING",
@ -3126,10 +3126,10 @@
},
"type": "PHASER_OUT_PHY",
"x_coord": 0,
"y_coord": 3
"y_coord": 6
},
{
"name": "X0Y3",
"name": "X0Y6",
"prefix": "PHASER_IN_PHY",
"site_pins": {
"BURSTPENDING": "CMT_PHASER_IN_DB_BURSTPENDING",
@ -3227,7 +3227,7 @@
},
"type": "PHASER_IN_PHY",
"x_coord": 0,
"y_coord": 3
"y_coord": 6
}
],
"tile_type": "CMT_TOP_L_UPPER_B",

View File

@ -6413,7 +6413,7 @@
"y_coord": 1
},
{
"name": "X34Y0",
"name": "X34Y21",
"prefix": "TIEOFF",
"site_pins": {
"HARD0": "DSP_GND_L",
@ -6421,7 +6421,7 @@
},
"type": "TIEOFF",
"x_coord": 34,
"y_coord": 0
"y_coord": 21
}
],
"tile_type": "DSP_L",

View File

@ -6413,7 +6413,7 @@
"y_coord": 1
},
{
"name": "X10Y0",
"name": "X10Y24",
"prefix": "TIEOFF",
"site_pins": {
"HARD0": "DSP_GND_R",
@ -6421,7 +6421,7 @@
},
"type": "TIEOFF",
"x_coord": 10,
"y_coord": 0
"y_coord": 24
}
],
"tile_type": "DSP_R",

View File

@ -1711,7 +1711,7 @@
},
"sites": [
{
"name": "X0Y1",
"name": "X0Y4",
"prefix": "BUFIO",
"site_pins": {
"I": "HCLK_IOI_IO_PLL_CLK3",
@ -1719,10 +1719,10 @@
},
"type": "BUFIO",
"x_coord": 0,
"y_coord": 1
"y_coord": 4
},
{
"name": "X0Y0",
"name": "X0Y3",
"prefix": "BUFIO",
"site_pins": {
"I": "HCLK_IOI_IO_PLL_CLK2",
@ -1730,10 +1730,10 @@
},
"type": "BUFIO",
"x_coord": 0,
"y_coord": 0
"y_coord": 3
},
{
"name": "X0Y3",
"name": "X0Y6",
"prefix": "BUFIO",
"site_pins": {
"I": "HCLK_IOI_IO_PLL_CLK1",
@ -1741,10 +1741,10 @@
},
"type": "BUFIO",
"x_coord": 0,
"y_coord": 3
"y_coord": 6
},
{
"name": "X0Y2",
"name": "X0Y5",
"prefix": "BUFIO",
"site_pins": {
"I": "HCLK_IOI_IO_PLL_CLK0",
@ -1752,10 +1752,10 @@
},
"type": "BUFIO",
"x_coord": 0,
"y_coord": 2
"y_coord": 5
},
{
"name": "X0Y1",
"name": "X0Y4",
"prefix": "BUFR",
"site_pins": {
"CE": "HCLK_IOI_BUFR3_CE",
@ -1765,10 +1765,10 @@
},
"type": "BUFR",
"x_coord": 0,
"y_coord": 1
"y_coord": 4
},
{
"name": "X0Y0",
"name": "X0Y3",
"prefix": "BUFR",
"site_pins": {
"CE": "HCLK_IOI_BUFR2_CE",
@ -1778,10 +1778,10 @@
},
"type": "BUFR",
"x_coord": 0,
"y_coord": 0
"y_coord": 3
},
{
"name": "X0Y3",
"name": "X0Y6",
"prefix": "BUFR",
"site_pins": {
"CE": "HCLK_IOI_BUFR1_CE",
@ -1791,10 +1791,10 @@
},
"type": "BUFR",
"x_coord": 0,
"y_coord": 3
"y_coord": 6
},
{
"name": "X0Y2",
"name": "X0Y5",
"prefix": "BUFR",
"site_pins": {
"CE": "HCLK_IOI_BUFR0_CE",
@ -1804,7 +1804,7 @@
},
"type": "BUFR",
"x_coord": 0,
"y_coord": 2
"y_coord": 5
},
{
"name": "X0Y0",

File diff suppressed because it is too large Load Diff