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kintex7: add missing RIOI_Y9 tilegrid frame bits 

The bottom-edge RIOI row (k160t RIOI_X73Y9, k325t RIOI_X95Y9) had an
empty bits entry while its neighbours (Y5 offset 10, Y11 offset 22)
carried the CLB_IO_CLK frame map; the k70t X43Y9 confirms the expected
offset 18 (+4 per row).  Any routed TQ->T1 pass-through through that
row made fasm2frames abort with FasmLookupError (seen on
litex-ddr-enclustra-kx2).
This commit is contained in:
Hans Baier 2026-08-08 15:11:48 +07:00
parent d429061eab
commit 399a099bb9
2 changed files with 2 additions and 2 deletions
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2
kintex7/xc7k160t/tilegrid.json
View File

@ -734807,7 +734807,7 @@
"type": "RIOI" "type": "RIOI"
}, },
"RIOI_X73Y9": { "RIOI_X73Y9": {
"bits": {}, "bits": {"CLB_IO_CLK": {"baseaddr": "0x00442480", "frames": 42, "offset": 18, "words": 4}},
"clock_region": "X1Y0", "clock_region": "X1Y0",
"grid_x": 188, "grid_x": 188,
"grid_y": 250, "grid_y": 250,

2
kintex7/xc7k325t/tilegrid.json
View File

@ -1335306,7 +1335306,7 @@
"type": "RIOI" "type": "RIOI"
}, },
"RIOI_X95Y9": { "RIOI_X95Y9": {
"bits": {}, "bits": {"CLB_IO_CLK": {"baseaddr": "0x00442F80", "frames": 42, "offset": 18, "words": 4}},
"clock_region": "X1Y0", "clock_region": "X1Y0",
"grid_x": 235, "grid_x": 235,
"grid_y": 354, "grid_y": 354,