Zynq 7035, 7045, 7100 fuzzed database.

This commit is contained in:
regymm 2025-01-08 10:14:33 +09:00
parent 77938473cd
commit 2d722b472c
213 changed files with 6805131 additions and 26 deletions

View File

@ -3,3 +3,11 @@
fabric: "xc7z020"
"xc7z010":
fabric: "xc7z010"
"xc7z030":
fabric: "xc7z030"
"xc7z035":
fabric: "xc7z045"
"xc7z045":
fabric: "xc7z045"
"xc7z100":
fabric: "xc7z100"

View File

@ -46,3 +46,275 @@ xc7z020clg484-3:
device: xc7z020
package: clg484
speedgrade: '3'
xc7z030fbg484-1:
device: xc7z030
package: fbg484
speedgrade: '1'
xc7z030fbg484-2:
device: xc7z030
package: fbg484
speedgrade: '2'
xc7z030fbg484-3:
device: xc7z030
package: fbg484
speedgrade: '3'
xc7z030fbg676-1:
device: xc7z030
package: fbg676
speedgrade: '1'
xc7z030fbg676-2:
device: xc7z030
package: fbg676
speedgrade: '2'
xc7z030fbg676-3:
device: xc7z030
package: fbg676
speedgrade: '3'
xc7z030fbv484-1:
device: xc7z030
package: fbv484
speedgrade: '1'
xc7z030fbv484-2:
device: xc7z030
package: fbv484
speedgrade: '2'
xc7z030fbv484-3:
device: xc7z030
package: fbv484
speedgrade: '3'
xc7z030fbv676-1:
device: xc7z030
package: fbv676
speedgrade: '1'
xc7z030fbv676-2:
device: xc7z030
package: fbv676
speedgrade: '2'
xc7z030fbv676-3:
device: xc7z030
package: fbv676
speedgrade: '3'
xc7z030ffg676-1:
device: xc7z030
package: ffg676
speedgrade: '1'
xc7z030ffg676-2:
device: xc7z030
package: ffg676
speedgrade: '2'
xc7z030ffg676-3:
device: xc7z030
package: ffg676
speedgrade: '3'
xc7z030ffv676-1:
device: xc7z030
package: ffv676
speedgrade: '1'
xc7z030ffv676-2:
device: xc7z030
package: ffv676
speedgrade: '2'
xc7z030ffv676-3:
device: xc7z030
package: ffv676
speedgrade: '3'
xc7z030sbg485-1:
device: xc7z030
package: sbg485
speedgrade: '1'
xc7z030sbg485-2:
device: xc7z030
package: sbg485
speedgrade: '2'
xc7z030sbg485-3:
device: xc7z030
package: sbg485
speedgrade: '3'
xc7z030sbv485-1:
device: xc7z030
package: sbv485
speedgrade: '1'
xc7z030sbv485-2:
device: xc7z030
package: sbv485
speedgrade: '2'
xc7z030sbv485-3:
device: xc7z030
package: sbv485
speedgrade: '3'
xc7z035fbg676-1:
device: xc7z035
package: fbg676
speedgrade: '1'
xc7z035fbg676-2:
device: xc7z035
package: fbg676
speedgrade: '2'
xc7z035fbg676-3:
device: xc7z035
package: fbg676
speedgrade: '3'
xc7z035fbv676-1:
device: xc7z035
package: fbv676
speedgrade: '1'
xc7z035fbv676-2:
device: xc7z035
package: fbv676
speedgrade: '2'
xc7z035fbv676-3:
device: xc7z035
package: fbv676
speedgrade: '3'
xc7z035ffg676-1:
device: xc7z035
package: ffg676
speedgrade: '1'
xc7z035ffg676-2:
device: xc7z035
package: ffg676
speedgrade: '2'
xc7z035ffg676-3:
device: xc7z035
package: ffg676
speedgrade: '3'
xc7z035ffg900-1:
device: xc7z035
package: ffg900
speedgrade: '1'
xc7z035ffg900-2:
device: xc7z035
package: ffg900
speedgrade: '2'
xc7z035ffg900-3:
device: xc7z035
package: ffg900
speedgrade: '3'
xc7z035ffv676-1:
device: xc7z035
package: ffv676
speedgrade: '1'
xc7z035ffv676-2:
device: xc7z035
package: ffv676
speedgrade: '2'
xc7z035ffv676-3:
device: xc7z035
package: ffv676
speedgrade: '3'
xc7z035ffv900-1:
device: xc7z035
package: ffv900
speedgrade: '1'
xc7z035ffv900-2:
device: xc7z035
package: ffv900
speedgrade: '2'
xc7z035ffv900-3:
device: xc7z035
package: ffv900
speedgrade: '3'
xc7z045fbg676-1:
device: xc7z045
package: fbg676
speedgrade: '1'
xc7z045fbg676-2:
device: xc7z045
package: fbg676
speedgrade: '2'
xc7z045fbg676-3:
device: xc7z045
package: fbg676
speedgrade: '3'
xc7z045fbv676-1:
device: xc7z045
package: fbv676
speedgrade: '1'
xc7z045fbv676-2:
device: xc7z045
package: fbv676
speedgrade: '2'
xc7z045fbv676-3:
device: xc7z045
package: fbv676
speedgrade: '3'
xc7z045ffg676-1:
device: xc7z045
package: ffg676
speedgrade: '1'
xc7z045ffg676-2:
device: xc7z045
package: ffg676
speedgrade: '2'
xc7z045ffg676-3:
device: xc7z045
package: ffg676
speedgrade: '3'
xc7z045ffg900-1:
device: xc7z045
package: ffg900
speedgrade: '1'
xc7z045ffg900-2:
device: xc7z045
package: ffg900
speedgrade: '2'
xc7z045ffg900-3:
device: xc7z045
package: ffg900
speedgrade: '3'
xc7z045ffv676-1:
device: xc7z045
package: ffv676
speedgrade: '1'
xc7z045ffv676-2:
device: xc7z045
package: ffv676
speedgrade: '2'
xc7z045ffv676-3:
device: xc7z045
package: ffv676
speedgrade: '3'
xc7z045ffv900-1:
device: xc7z045
package: ffv900
speedgrade: '1'
xc7z045ffv900-2:
device: xc7z045
package: ffv900
speedgrade: '2'
xc7z045ffv900-3:
device: xc7z045
package: ffv900
speedgrade: '3'
xc7z100ffg1156-1:
device: xc7z100
package: ffg1156
speedgrade: '1'
xc7z100ffg1156-2:
device: xc7z100
package: ffg1156
speedgrade: '2'
xc7z100ffg900-1:
device: xc7z100
package: ffg900
speedgrade: '1'
xc7z100ffg900-2:
device: xc7z100
package: ffg900
speedgrade: '2'
xc7z100ffv1156-1:
device: xc7z100
package: ffv1156
speedgrade: '1'
xc7z100ffv1156-2:
device: xc7z100
package: ffv1156
speedgrade: '2'
xc7z100ffv900-1:
device: xc7z100
package: ffv900
speedgrade: '1'
xc7z100ffv900-2:
device: xc7z100
package: ffv900
speedgrade: '2'

75
zynq7/mask_riob18.db Normal file
View File

@ -0,0 +1,75 @@
bit 38_00
bit 38_02
bit 38_04
bit 38_08
bit 38_10
bit 38_12
bit 38_14
bit 38_16
bit 38_20
bit 38_22
bit 38_24
bit 38_26
bit 38_28
bit 38_30
bit 38_32
bit 38_34
bit 38_38
bit 38_40
bit 38_44
bit 38_46
bit 38_48
bit 38_50
bit 38_62
bit 38_72
bit 38_78
bit 38_80
bit 38_82
bit 38_86
bit 38_88
bit 38_92
bit 38_94
bit 38_96
bit 38_104
bit 38_114
bit 38_124
bit 38_126
bit 39_01
bit 39_03
bit 39_13
bit 39_15
bit 39_17
bit 39_21
bit 39_23
bit 39_31
bit 39_33
bit 39_35
bit 39_37
bit 39_39
bit 39_41
bit 39_43
bit 39_45
bit 39_47
bit 39_49
bit 39_55
bit 39_65
bit 39_73
bit 39_77
bit 39_79
bit 39_81
bit 39_83
bit 39_89
bit 39_93
bit 39_95
bit 39_97
bit 39_101
bit 39_103
bit 39_105
bit 39_107
bit 39_111
bit 39_113
bit 39_115
bit 39_117
bit 39_123
bit 39_125
bit 39_127

364
zynq7/mask_rioi.db Normal file
View File

@ -0,0 +1,364 @@
bit 25_07
bit 25_20
bit 25_21
bit 25_31
bit 25_32
bit 25_34
bit 25_35
bit 25_48
bit 25_51
bit 25_52
bit 25_58
bit 25_60
bit 25_71
bit 25_84
bit 25_85
bit 25_95
bit 25_98
bit 25_99
bit 25_112
bit 25_115
bit 25_116
bit 25_122
bit 25_124
bit 26_09
bit 26_15
bit 26_17
bit 26_19
bit 26_21
bit 26_25
bit 26_29
bit 26_47
bit 26_57
bit 26_71
bit 26_99
bit 26_101
bit 26_107
bit 26_109
bit 26_111
bit 26_115
bit 26_117
bit 26_119
bit 26_121
bit 27_06
bit 27_08
bit 27_10
bit 27_12
bit 27_16
bit 27_18
bit 27_20
bit 27_26
bit 27_28
bit 27_56
bit 27_70
bit 27_80
bit 27_98
bit 27_102
bit 27_106
bit 27_108
bit 27_110
bit 27_112
bit 27_118
bit 28_00
bit 28_02
bit 28_04
bit 28_14
bit 28_18
bit 28_24
bit 28_26
bit 28_33
bit 28_34
bit 28_42
bit 28_47
bit 28_49
bit 28_52
bit 28_56
bit 28_60
bit 28_64
bit 28_67
bit 28_72
bit 28_75
bit 28_76
bit 28_77
bit 28_79
bit 28_81
bit 28_83
bit 28_86
bit 28_89
bit 28_93
bit 28_94
bit 28_95
bit 28_97
bit 28_110
bit 28_111
bit 28_116
bit 28_121
bit 28_123
bit 28_124
bit 28_126
bit 29_01
bit 29_03
bit 29_04
bit 29_06
bit 29_11
bit 29_16
bit 29_17
bit 29_30
bit 29_32
bit 29_33
bit 29_34
bit 29_38
bit 29_41
bit 29_44
bit 29_46
bit 29_48
bit 29_50
bit 29_51
bit 29_52
bit 29_55
bit 29_60
bit 29_63
bit 29_67
bit 29_71
bit 29_75
bit 29_78
bit 29_80
bit 29_85
bit 29_93
bit 29_94
bit 29_101
bit 29_103
bit 29_109
bit 29_113
bit 29_123
bit 29_125
bit 29_127
bit 30_01
bit 30_03
bit 30_04
bit 30_06
bit 30_07
bit 30_09
bit 30_11
bit 30_13
bit 30_16
bit 30_17
bit 30_21
bit 30_25
bit 30_27
bit 30_29
bit 30_30
bit 30_32
bit 30_34
bit 30_35
bit 30_37
bit 30_38
bit 30_41
bit 30_44
bit 30_46
bit 30_48
bit 30_50
bit 30_51
bit 30_52
bit 30_60
bit 30_67
bit 30_71
bit 30_75
bit 30_78
bit 30_79
bit 30_80
bit 30_85
bit 30_94
bit 30_95
bit 30_97
bit 30_99
bit 30_113
bit 30_121
bit 30_123
bit 30_125
bit 30_127
bit 31_00
bit 31_02
bit 31_04
bit 31_06
bit 31_14
bit 31_28
bit 31_30
bit 31_32
bit 31_33
bit 31_42
bit 31_47
bit 31_48
bit 31_49
bit 31_52
bit 31_56
bit 31_60
bit 31_67
bit 31_75
bit 31_76
bit 31_77
bit 31_79
bit 31_81
bit 31_83
bit 31_86
bit 31_89
bit 31_90
bit 31_92
bit 31_93
bit 31_95
bit 31_97
bit 31_98
bit 31_100
bit 31_102
bit 31_106
bit 31_110
bit 31_111
bit 31_114
bit 31_116
bit 31_118
bit 31_120
bit 31_121
bit 31_123
bit 31_124
bit 31_126
bit 32_16
bit 32_20
bit 32_30
bit 32_32
bit 32_34
bit 32_36
bit 32_38
bit 32_44
bit 32_46
bit 32_52
bit 32_54
bit 32_55
bit 32_58
bit 32_66
bit 32_70
bit 32_72
bit 32_73
bit 32_82
bit 32_90
bit 32_94
bit 32_108
bit 32_109
bit 32_112
bit 33_15
bit 33_18
bit 33_19
bit 33_33
bit 33_37
bit 33_45
bit 33_54
bit 33_55
bit 33_57
bit 33_61
bit 33_69
bit 33_72
bit 33_73
bit 33_75
bit 33_81
bit 33_83
bit 33_89
bit 33_91
bit 33_93
bit 33_95
bit 33_97
bit 33_107
bit 33_111
bit 34_08
bit 34_14
bit 34_38
bit 34_46
bit 34_55
bit 34_58
bit 34_72
bit 34_73
bit 34_88
bit 34_94
bit 34_96
bit 34_100
bit 34_102
bit 34_106
bit 34_108
bit 34_109
bit 34_110
bit 34_114
bit 34_116
bit 34_120
bit 34_122
bit 35_05
bit 35_07
bit 35_11
bit 35_13
bit 35_17
bit 35_18
bit 35_19
bit 35_21
bit 35_25
bit 35_27
bit 35_31
bit 35_33
bit 35_39
bit 35_54
bit 35_55
bit 35_69
bit 35_72
bit 35_81
bit 35_89
bit 35_113
bit 35_119
bit 36_08
bit 36_14
bit 36_38
bit 36_72
bit 36_88
bit 36_94
bit 36_96
bit 36_100
bit 36_102
bit 36_108
bit 36_110
bit 36_114
bit 36_116
bit 36_120
bit 36_122
bit 37_05
bit 37_07
bit 37_11
bit 37_13
bit 37_17
bit 37_19
bit 37_25
bit 37_27
bit 37_31
bit 37_33
bit 37_39
bit 37_55
bit 37_89
bit 37_113
bit 37_119
bit 38_00
bit 38_12
bit 38_24
bit 38_32
bit 38_34
bit 38_48
bit 38_52
bit 38_78
bit 38_80
bit 38_94
bit 38_126
bit 39_01
bit 39_33
bit 39_47
bit 39_49
bit 39_75
bit 39_79
bit 39_93
bit 39_95
bit 39_103
bit 39_115
bit 39_117
bit 39_127

364
zynq7/mask_rioi_tbytesrc.db Normal file
View File

@ -0,0 +1,364 @@
bit 25_07
bit 25_20
bit 25_21
bit 25_31
bit 25_32
bit 25_34
bit 25_35
bit 25_48
bit 25_51
bit 25_52
bit 25_58
bit 25_60
bit 25_71
bit 25_84
bit 25_85
bit 25_95
bit 25_98
bit 25_99
bit 25_112
bit 25_115
bit 25_116
bit 25_122
bit 25_124
bit 26_09
bit 26_15
bit 26_17
bit 26_19
bit 26_21
bit 26_25
bit 26_29
bit 26_47
bit 26_57
bit 26_71
bit 26_99
bit 26_101
bit 26_107
bit 26_109
bit 26_111
bit 26_115
bit 26_117
bit 26_119
bit 26_121
bit 27_06
bit 27_08
bit 27_10
bit 27_12
bit 27_16
bit 27_18
bit 27_20
bit 27_26
bit 27_28
bit 27_56
bit 27_70
bit 27_80
bit 27_98
bit 27_102
bit 27_106
bit 27_108
bit 27_110
bit 27_112
bit 27_118
bit 28_00
bit 28_02
bit 28_04
bit 28_14
bit 28_18
bit 28_24
bit 28_26
bit 28_33
bit 28_34
bit 28_42
bit 28_47
bit 28_49
bit 28_52
bit 28_56
bit 28_60
bit 28_64
bit 28_67
bit 28_72
bit 28_75
bit 28_76
bit 28_77
bit 28_79
bit 28_81
bit 28_83
bit 28_86
bit 28_89
bit 28_93
bit 28_94
bit 28_95
bit 28_97
bit 28_110
bit 28_111
bit 28_116
bit 28_121
bit 28_123
bit 28_124
bit 28_126
bit 29_01
bit 29_03
bit 29_04
bit 29_06
bit 29_11
bit 29_16
bit 29_17
bit 29_30
bit 29_32
bit 29_33
bit 29_34
bit 29_38
bit 29_41
bit 29_44
bit 29_46
bit 29_48
bit 29_50
bit 29_51
bit 29_52
bit 29_55
bit 29_60
bit 29_63
bit 29_67
bit 29_71
bit 29_75
bit 29_78
bit 29_80
bit 29_85
bit 29_93
bit 29_94
bit 29_101
bit 29_103
bit 29_109
bit 29_113
bit 29_123
bit 29_125
bit 29_127
bit 30_01
bit 30_03
bit 30_04
bit 30_06
bit 30_07
bit 30_09
bit 30_11
bit 30_13
bit 30_16
bit 30_17
bit 30_21
bit 30_25
bit 30_27
bit 30_29
bit 30_30
bit 30_32
bit 30_34
bit 30_35
bit 30_37
bit 30_38
bit 30_41
bit 30_44
bit 30_46
bit 30_48
bit 30_50
bit 30_51
bit 30_52
bit 30_60
bit 30_67
bit 30_71
bit 30_75
bit 30_78
bit 30_79
bit 30_80
bit 30_85
bit 30_94
bit 30_95
bit 30_97
bit 30_99
bit 30_113
bit 30_121
bit 30_123
bit 30_125
bit 30_127
bit 31_00
bit 31_02
bit 31_04
bit 31_06
bit 31_14
bit 31_28
bit 31_30
bit 31_32
bit 31_33
bit 31_42
bit 31_47
bit 31_48
bit 31_49
bit 31_52
bit 31_56
bit 31_60
bit 31_67
bit 31_75
bit 31_76
bit 31_77
bit 31_79
bit 31_81
bit 31_83
bit 31_86
bit 31_89
bit 31_90
bit 31_92
bit 31_93
bit 31_95
bit 31_97
bit 31_98
bit 31_100
bit 31_102
bit 31_106
bit 31_110
bit 31_111
bit 31_114
bit 31_116
bit 31_118
bit 31_120
bit 31_121
bit 31_123
bit 31_124
bit 31_126
bit 32_16
bit 32_20
bit 32_30
bit 32_32
bit 32_34
bit 32_36
bit 32_38
bit 32_44
bit 32_46
bit 32_52
bit 32_54
bit 32_55
bit 32_58
bit 32_66
bit 32_70
bit 32_72
bit 32_73
bit 32_82
bit 32_90
bit 32_94
bit 32_108
bit 32_109
bit 32_112
bit 33_15
bit 33_18
bit 33_19
bit 33_33
bit 33_37
bit 33_45
bit 33_54
bit 33_55
bit 33_57
bit 33_61
bit 33_69
bit 33_72
bit 33_73
bit 33_75
bit 33_81
bit 33_83
bit 33_89
bit 33_91
bit 33_93
bit 33_95
bit 33_97
bit 33_107
bit 33_111
bit 34_08
bit 34_14
bit 34_38
bit 34_46
bit 34_55
bit 34_58
bit 34_72
bit 34_73
bit 34_88
bit 34_94
bit 34_96
bit 34_100
bit 34_102
bit 34_106
bit 34_108
bit 34_109
bit 34_110
bit 34_114
bit 34_116
bit 34_120
bit 34_122
bit 35_05
bit 35_07
bit 35_11
bit 35_13
bit 35_17
bit 35_18
bit 35_19
bit 35_21
bit 35_25
bit 35_27
bit 35_31
bit 35_33
bit 35_39
bit 35_54
bit 35_55
bit 35_69
bit 35_72
bit 35_81
bit 35_89
bit 35_113
bit 35_119
bit 36_08
bit 36_14
bit 36_38
bit 36_72
bit 36_88
bit 36_94
bit 36_96
bit 36_100
bit 36_102
bit 36_108
bit 36_110
bit 36_114
bit 36_116
bit 36_120
bit 36_122
bit 37_05
bit 37_07
bit 37_11
bit 37_13
bit 37_17
bit 37_19
bit 37_25
bit 37_27
bit 37_31
bit 37_33
bit 37_39
bit 37_55
bit 37_89
bit 37_113
bit 37_119
bit 38_00
bit 38_12
bit 38_24
bit 38_32
bit 38_34
bit 38_48
bit 38_52
bit 38_78
bit 38_80
bit 38_94
bit 38_126
bit 39_01
bit 39_33
bit 39_47
bit 39_49
bit 39_75
bit 39_79
bit 39_93
bit 39_95
bit 39_103
bit 39_115
bit 39_117
bit 39_127

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@ -0,0 +1,364 @@
bit 25_07
bit 25_20
bit 25_21
bit 25_31
bit 25_32
bit 25_34
bit 25_35
bit 25_48
bit 25_51
bit 25_52
bit 25_58
bit 25_60
bit 25_71
bit 25_84
bit 25_85
bit 25_95
bit 25_98
bit 25_99
bit 25_112
bit 25_115
bit 25_116
bit 25_122
bit 25_124
bit 26_09
bit 26_15
bit 26_17
bit 26_19
bit 26_21
bit 26_25
bit 26_29
bit 26_47
bit 26_57
bit 26_71
bit 26_99
bit 26_101
bit 26_107
bit 26_109
bit 26_111
bit 26_115
bit 26_117
bit 26_119
bit 26_121
bit 27_06
bit 27_08
bit 27_10
bit 27_12
bit 27_16
bit 27_18
bit 27_20
bit 27_26
bit 27_28
bit 27_56
bit 27_70
bit 27_80
bit 27_98
bit 27_102
bit 27_106
bit 27_108
bit 27_110
bit 27_112
bit 27_118
bit 28_00
bit 28_02
bit 28_04
bit 28_14
bit 28_18
bit 28_24
bit 28_26
bit 28_33
bit 28_34
bit 28_42
bit 28_47
bit 28_49
bit 28_52
bit 28_56
bit 28_60
bit 28_64
bit 28_67
bit 28_72
bit 28_75
bit 28_76
bit 28_77
bit 28_79
bit 28_81
bit 28_83
bit 28_86
bit 28_89
bit 28_93
bit 28_94
bit 28_95
bit 28_97
bit 28_110
bit 28_111
bit 28_116
bit 28_121
bit 28_123
bit 28_124
bit 28_126
bit 29_01
bit 29_03
bit 29_04
bit 29_06
bit 29_11
bit 29_16
bit 29_17
bit 29_30
bit 29_32
bit 29_33
bit 29_34
bit 29_38
bit 29_41
bit 29_44
bit 29_46
bit 29_48
bit 29_50
bit 29_51
bit 29_52
bit 29_55
bit 29_60
bit 29_63
bit 29_67
bit 29_71
bit 29_75
bit 29_78
bit 29_80
bit 29_85
bit 29_93
bit 29_94
bit 29_101
bit 29_103
bit 29_109
bit 29_113
bit 29_123
bit 29_125
bit 29_127
bit 30_01
bit 30_03
bit 30_04
bit 30_06
bit 30_07
bit 30_09
bit 30_11
bit 30_13
bit 30_16
bit 30_17
bit 30_21
bit 30_25
bit 30_27
bit 30_29
bit 30_30
bit 30_32
bit 30_34
bit 30_35
bit 30_37
bit 30_38
bit 30_41
bit 30_44
bit 30_46
bit 30_48
bit 30_50
bit 30_51
bit 30_52
bit 30_60
bit 30_67
bit 30_71
bit 30_75
bit 30_78
bit 30_79
bit 30_80
bit 30_85
bit 30_94
bit 30_95
bit 30_97
bit 30_99
bit 30_113
bit 30_121
bit 30_123
bit 30_125
bit 30_127
bit 31_00
bit 31_02
bit 31_04
bit 31_06
bit 31_14
bit 31_28
bit 31_30
bit 31_32
bit 31_33
bit 31_42
bit 31_47
bit 31_48
bit 31_49
bit 31_52
bit 31_56
bit 31_60
bit 31_67
bit 31_75
bit 31_76
bit 31_77
bit 31_79
bit 31_81
bit 31_83
bit 31_86
bit 31_89
bit 31_90
bit 31_92
bit 31_93
bit 31_95
bit 31_97
bit 31_98
bit 31_100
bit 31_102
bit 31_106
bit 31_110
bit 31_111
bit 31_114
bit 31_116
bit 31_118
bit 31_120
bit 31_121
bit 31_123
bit 31_124
bit 31_126
bit 32_16
bit 32_20
bit 32_30
bit 32_32
bit 32_34
bit 32_36
bit 32_38
bit 32_44
bit 32_46
bit 32_52
bit 32_54
bit 32_55
bit 32_58
bit 32_66
bit 32_70
bit 32_72
bit 32_73
bit 32_82
bit 32_90
bit 32_94
bit 32_108
bit 32_109
bit 32_112
bit 33_15
bit 33_18
bit 33_19
bit 33_33
bit 33_37
bit 33_45
bit 33_54
bit 33_55
bit 33_57
bit 33_61
bit 33_69
bit 33_72
bit 33_73
bit 33_75
bit 33_81
bit 33_83
bit 33_89
bit 33_91
bit 33_93
bit 33_95
bit 33_97
bit 33_107
bit 33_111
bit 34_08
bit 34_14
bit 34_38
bit 34_46
bit 34_55
bit 34_58
bit 34_72
bit 34_73
bit 34_88
bit 34_94
bit 34_96
bit 34_100
bit 34_102
bit 34_106
bit 34_108
bit 34_109
bit 34_110
bit 34_114
bit 34_116
bit 34_120
bit 34_122
bit 35_05
bit 35_07
bit 35_11
bit 35_13
bit 35_17
bit 35_18
bit 35_19
bit 35_21
bit 35_25
bit 35_27
bit 35_31
bit 35_33
bit 35_39
bit 35_54
bit 35_55
bit 35_69
bit 35_72
bit 35_81
bit 35_89
bit 35_113
bit 35_119
bit 36_08
bit 36_14
bit 36_38
bit 36_72
bit 36_88
bit 36_94
bit 36_96
bit 36_100
bit 36_102
bit 36_108
bit 36_110
bit 36_114
bit 36_116
bit 36_120
bit 36_122
bit 37_05
bit 37_07
bit 37_11
bit 37_13
bit 37_17
bit 37_19
bit 37_25
bit 37_27
bit 37_31
bit 37_33
bit 37_39
bit 37_55
bit 37_89
bit 37_113
bit 37_119
bit 38_00
bit 38_12
bit 38_24
bit 38_32
bit 38_34
bit 38_48
bit 38_52
bit 38_78
bit 38_80
bit 38_94
bit 38_126
bit 39_01
bit 39_33
bit 39_47
bit 39_49
bit 39_75
bit 39_79
bit 39_93
bit 39_95
bit 39_103
bit 39_115
bit 39_117
bit 39_127

1736
zynq7/ppips_pcie_bot.db Normal file

File diff suppressed because it is too large Load Diff

View File

@ -0,0 +1,120 @@
PCIE_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L0.INT_INTERFACE_LOGIC_OUTS_L_B0 always
PCIE_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L1.INT_INTERFACE_LOGIC_OUTS_L_B1 always
PCIE_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L2.INT_INTERFACE_LOGIC_OUTS_L_B2 always
PCIE_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L3.INT_INTERFACE_LOGIC_OUTS_L_B3 always
PCIE_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L4.INT_INTERFACE_LOGIC_OUTS_L_B4 always
PCIE_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L5.INT_INTERFACE_LOGIC_OUTS_L_B5 always
PCIE_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L6.INT_INTERFACE_LOGIC_OUTS_L_B6 always
PCIE_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L7.INT_INTERFACE_LOGIC_OUTS_L_B7 always
PCIE_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L8.INT_INTERFACE_LOGIC_OUTS_L_B8 always
PCIE_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L9.INT_INTERFACE_LOGIC_OUTS_L_B9 always
PCIE_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L10.INT_INTERFACE_LOGIC_OUTS_L_B10 always
PCIE_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L11.INT_INTERFACE_LOGIC_OUTS_L_B11 always
PCIE_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L12.INT_INTERFACE_LOGIC_OUTS_L_B12 always
PCIE_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L13.INT_INTERFACE_LOGIC_OUTS_L_B13 always
PCIE_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L14.INT_INTERFACE_LOGIC_OUTS_L_B14 always
PCIE_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L15.INT_INTERFACE_LOGIC_OUTS_L_B15 always
PCIE_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L16.INT_INTERFACE_LOGIC_OUTS_L_B16 always
PCIE_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L17.INT_INTERFACE_LOGIC_OUTS_L_B17 always
PCIE_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L18.INT_INTERFACE_LOGIC_OUTS_L_B18 always
PCIE_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L19.INT_INTERFACE_LOGIC_OUTS_L_B19 always
PCIE_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L20.INT_INTERFACE_LOGIC_OUTS_L_B20 always
PCIE_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L21.INT_INTERFACE_LOGIC_OUTS_L_B21 always
PCIE_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L22.INT_INTERFACE_LOGIC_OUTS_L_B22 always
PCIE_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L23.INT_INTERFACE_LOGIC_OUTS_L_B23 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY0.PCIE_INT_INTERFACE_IMUX_L0 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY1.PCIE_INT_INTERFACE_IMUX_L1 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY2.PCIE_INT_INTERFACE_IMUX_L2 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY3.PCIE_INT_INTERFACE_IMUX_L3 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY4.PCIE_INT_INTERFACE_IMUX_L4 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY5.PCIE_INT_INTERFACE_IMUX_L5 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY6.PCIE_INT_INTERFACE_IMUX_L6 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY7.PCIE_INT_INTERFACE_IMUX_L7 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY8.PCIE_INT_INTERFACE_IMUX_L8 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY9.PCIE_INT_INTERFACE_IMUX_L9 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY10.PCIE_INT_INTERFACE_IMUX_L10 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY11.PCIE_INT_INTERFACE_IMUX_L11 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY12.PCIE_INT_INTERFACE_IMUX_L12 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY13.PCIE_INT_INTERFACE_IMUX_L13 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY14.PCIE_INT_INTERFACE_IMUX_L14 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY15.PCIE_INT_INTERFACE_IMUX_L15 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY16.PCIE_INT_INTERFACE_IMUX_L16 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY17.PCIE_INT_INTERFACE_IMUX_L17 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY18.PCIE_INT_INTERFACE_IMUX_L18 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY19.PCIE_INT_INTERFACE_IMUX_L19 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY20.PCIE_INT_INTERFACE_IMUX_L20 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY21.PCIE_INT_INTERFACE_IMUX_L21 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY22.PCIE_INT_INTERFACE_IMUX_L22 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY23.PCIE_INT_INTERFACE_IMUX_L23 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY24.PCIE_INT_INTERFACE_IMUX_L24 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY25.PCIE_INT_INTERFACE_IMUX_L25 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY26.PCIE_INT_INTERFACE_IMUX_L26 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY27.PCIE_INT_INTERFACE_IMUX_L27 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY28.PCIE_INT_INTERFACE_IMUX_L28 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY29.PCIE_INT_INTERFACE_IMUX_L29 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY30.PCIE_INT_INTERFACE_IMUX_L30 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY31.PCIE_INT_INTERFACE_IMUX_L31 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY32.PCIE_INT_INTERFACE_IMUX_L32 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY33.PCIE_INT_INTERFACE_IMUX_L33 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY34.PCIE_INT_INTERFACE_IMUX_L34 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY35.PCIE_INT_INTERFACE_IMUX_L35 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY36.PCIE_INT_INTERFACE_IMUX_L36 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY37.PCIE_INT_INTERFACE_IMUX_L37 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY38.PCIE_INT_INTERFACE_IMUX_L38 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY39.PCIE_INT_INTERFACE_IMUX_L39 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY40.PCIE_INT_INTERFACE_IMUX_L40 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY41.PCIE_INT_INTERFACE_IMUX_L41 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY42.PCIE_INT_INTERFACE_IMUX_L42 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY43.PCIE_INT_INTERFACE_IMUX_L43 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY44.PCIE_INT_INTERFACE_IMUX_L44 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY45.PCIE_INT_INTERFACE_IMUX_L45 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY46.PCIE_INT_INTERFACE_IMUX_L46 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_DELAY47.PCIE_INT_INTERFACE_IMUX_L47 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT0.PCIE_INT_INTERFACE_IMUX_L0 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT1.PCIE_INT_INTERFACE_IMUX_L1 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT2.PCIE_INT_INTERFACE_IMUX_L2 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT3.PCIE_INT_INTERFACE_IMUX_L3 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT4.PCIE_INT_INTERFACE_IMUX_L4 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT5.PCIE_INT_INTERFACE_IMUX_L5 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT6.PCIE_INT_INTERFACE_IMUX_L6 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT7.PCIE_INT_INTERFACE_IMUX_L7 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT8.PCIE_INT_INTERFACE_IMUX_L8 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT9.PCIE_INT_INTERFACE_IMUX_L9 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT10.PCIE_INT_INTERFACE_IMUX_L10 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT11.PCIE_INT_INTERFACE_IMUX_L11 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT12.PCIE_INT_INTERFACE_IMUX_L12 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT13.PCIE_INT_INTERFACE_IMUX_L13 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT14.PCIE_INT_INTERFACE_IMUX_L14 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT15.PCIE_INT_INTERFACE_IMUX_L15 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT16.PCIE_INT_INTERFACE_IMUX_L16 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT17.PCIE_INT_INTERFACE_IMUX_L17 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT18.PCIE_INT_INTERFACE_IMUX_L18 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT19.PCIE_INT_INTERFACE_IMUX_L19 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT20.PCIE_INT_INTERFACE_IMUX_L20 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT21.PCIE_INT_INTERFACE_IMUX_L21 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT22.PCIE_INT_INTERFACE_IMUX_L22 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT23.PCIE_INT_INTERFACE_IMUX_L23 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT24.PCIE_INT_INTERFACE_IMUX_L24 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT25.PCIE_INT_INTERFACE_IMUX_L25 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT26.PCIE_INT_INTERFACE_IMUX_L26 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT27.PCIE_INT_INTERFACE_IMUX_L27 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT28.PCIE_INT_INTERFACE_IMUX_L28 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT29.PCIE_INT_INTERFACE_IMUX_L29 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT30.PCIE_INT_INTERFACE_IMUX_L30 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT31.PCIE_INT_INTERFACE_IMUX_L31 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT32.PCIE_INT_INTERFACE_IMUX_L32 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT33.PCIE_INT_INTERFACE_IMUX_L33 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT34.PCIE_INT_INTERFACE_IMUX_L34 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT35.PCIE_INT_INTERFACE_IMUX_L35 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT36.PCIE_INT_INTERFACE_IMUX_L36 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT37.PCIE_INT_INTERFACE_IMUX_L37 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT38.PCIE_INT_INTERFACE_IMUX_L38 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT39.PCIE_INT_INTERFACE_IMUX_L39 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT40.PCIE_INT_INTERFACE_IMUX_L40 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT41.PCIE_INT_INTERFACE_IMUX_L41 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT42.PCIE_INT_INTERFACE_IMUX_L42 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT43.PCIE_INT_INTERFACE_IMUX_L43 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT44.PCIE_INT_INTERFACE_IMUX_L44 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT45.PCIE_INT_INTERFACE_IMUX_L45 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT46.PCIE_INT_INTERFACE_IMUX_L46 always
PCIE_INT_INTERFACE_L.PCIE_INT_INTERFACE_IMUX_L_OUT47.PCIE_INT_INTERFACE_IMUX_L47 always

View File

@ -0,0 +1,120 @@
PCIE_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS0.INT_INTERFACE_LOGIC_OUTS_B0 always
PCIE_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS1.INT_INTERFACE_LOGIC_OUTS_B1 always
PCIE_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS2.INT_INTERFACE_LOGIC_OUTS_B2 always
PCIE_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS3.INT_INTERFACE_LOGIC_OUTS_B3 always
PCIE_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS4.INT_INTERFACE_LOGIC_OUTS_B4 always
PCIE_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS5.INT_INTERFACE_LOGIC_OUTS_B5 always
PCIE_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS6.INT_INTERFACE_LOGIC_OUTS_B6 always
PCIE_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS7.INT_INTERFACE_LOGIC_OUTS_B7 always
PCIE_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS8.INT_INTERFACE_LOGIC_OUTS_B8 always
PCIE_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS9.INT_INTERFACE_LOGIC_OUTS_B9 always
PCIE_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS10.INT_INTERFACE_LOGIC_OUTS_B10 always
PCIE_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS11.INT_INTERFACE_LOGIC_OUTS_B11 always
PCIE_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS12.INT_INTERFACE_LOGIC_OUTS_B12 always
PCIE_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS13.INT_INTERFACE_LOGIC_OUTS_B13 always
PCIE_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS14.INT_INTERFACE_LOGIC_OUTS_B14 always
PCIE_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS15.INT_INTERFACE_LOGIC_OUTS_B15 always
PCIE_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS16.INT_INTERFACE_LOGIC_OUTS_B16 always
PCIE_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS17.INT_INTERFACE_LOGIC_OUTS_B17 always
PCIE_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS18.INT_INTERFACE_LOGIC_OUTS_B18 always
PCIE_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS19.INT_INTERFACE_LOGIC_OUTS_B19 always
PCIE_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS20.INT_INTERFACE_LOGIC_OUTS_B20 always
PCIE_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS21.INT_INTERFACE_LOGIC_OUTS_B21 always
PCIE_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS22.INT_INTERFACE_LOGIC_OUTS_B22 always
PCIE_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS23.INT_INTERFACE_LOGIC_OUTS_B23 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY0.PCIE_INT_INTERFACE_IMUX0 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY1.PCIE_INT_INTERFACE_IMUX1 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY2.PCIE_INT_INTERFACE_IMUX2 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY3.PCIE_INT_INTERFACE_IMUX3 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY4.PCIE_INT_INTERFACE_IMUX4 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY5.PCIE_INT_INTERFACE_IMUX5 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY6.PCIE_INT_INTERFACE_IMUX6 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY7.PCIE_INT_INTERFACE_IMUX7 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY8.PCIE_INT_INTERFACE_IMUX8 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY9.PCIE_INT_INTERFACE_IMUX9 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY10.PCIE_INT_INTERFACE_IMUX10 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY11.PCIE_INT_INTERFACE_IMUX11 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY12.PCIE_INT_INTERFACE_IMUX12 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY13.PCIE_INT_INTERFACE_IMUX13 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY14.PCIE_INT_INTERFACE_IMUX14 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY15.PCIE_INT_INTERFACE_IMUX15 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY16.PCIE_INT_INTERFACE_IMUX16 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY17.PCIE_INT_INTERFACE_IMUX17 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY18.PCIE_INT_INTERFACE_IMUX18 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY19.PCIE_INT_INTERFACE_IMUX19 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY20.PCIE_INT_INTERFACE_IMUX20 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY21.PCIE_INT_INTERFACE_IMUX21 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY22.PCIE_INT_INTERFACE_IMUX22 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY23.PCIE_INT_INTERFACE_IMUX23 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY24.PCIE_INT_INTERFACE_IMUX24 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY25.PCIE_INT_INTERFACE_IMUX25 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY26.PCIE_INT_INTERFACE_IMUX26 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY27.PCIE_INT_INTERFACE_IMUX27 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY28.PCIE_INT_INTERFACE_IMUX28 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY29.PCIE_INT_INTERFACE_IMUX29 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY30.PCIE_INT_INTERFACE_IMUX30 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY31.PCIE_INT_INTERFACE_IMUX31 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY32.PCIE_INT_INTERFACE_IMUX32 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY33.PCIE_INT_INTERFACE_IMUX33 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY34.PCIE_INT_INTERFACE_IMUX34 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY35.PCIE_INT_INTERFACE_IMUX35 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY36.PCIE_INT_INTERFACE_IMUX36 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY37.PCIE_INT_INTERFACE_IMUX37 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY38.PCIE_INT_INTERFACE_IMUX38 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY39.PCIE_INT_INTERFACE_IMUX39 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY40.PCIE_INT_INTERFACE_IMUX40 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY41.PCIE_INT_INTERFACE_IMUX41 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY42.PCIE_INT_INTERFACE_IMUX42 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY43.PCIE_INT_INTERFACE_IMUX43 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY44.PCIE_INT_INTERFACE_IMUX44 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY45.PCIE_INT_INTERFACE_IMUX45 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY46.PCIE_INT_INTERFACE_IMUX46 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_DELAY47.PCIE_INT_INTERFACE_IMUX47 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT0.PCIE_INT_INTERFACE_IMUX0 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT1.PCIE_INT_INTERFACE_IMUX1 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT2.PCIE_INT_INTERFACE_IMUX2 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT3.PCIE_INT_INTERFACE_IMUX3 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT4.PCIE_INT_INTERFACE_IMUX4 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT5.PCIE_INT_INTERFACE_IMUX5 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT6.PCIE_INT_INTERFACE_IMUX6 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT7.PCIE_INT_INTERFACE_IMUX7 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT8.PCIE_INT_INTERFACE_IMUX8 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT9.PCIE_INT_INTERFACE_IMUX9 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT10.PCIE_INT_INTERFACE_IMUX10 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT11.PCIE_INT_INTERFACE_IMUX11 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT12.PCIE_INT_INTERFACE_IMUX12 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT13.PCIE_INT_INTERFACE_IMUX13 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT14.PCIE_INT_INTERFACE_IMUX14 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT15.PCIE_INT_INTERFACE_IMUX15 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT16.PCIE_INT_INTERFACE_IMUX16 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT17.PCIE_INT_INTERFACE_IMUX17 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT18.PCIE_INT_INTERFACE_IMUX18 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT19.PCIE_INT_INTERFACE_IMUX19 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT20.PCIE_INT_INTERFACE_IMUX20 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT21.PCIE_INT_INTERFACE_IMUX21 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT22.PCIE_INT_INTERFACE_IMUX22 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT23.PCIE_INT_INTERFACE_IMUX23 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT24.PCIE_INT_INTERFACE_IMUX24 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT25.PCIE_INT_INTERFACE_IMUX25 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT26.PCIE_INT_INTERFACE_IMUX26 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT27.PCIE_INT_INTERFACE_IMUX27 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT28.PCIE_INT_INTERFACE_IMUX28 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT29.PCIE_INT_INTERFACE_IMUX29 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT30.PCIE_INT_INTERFACE_IMUX30 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT31.PCIE_INT_INTERFACE_IMUX31 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT32.PCIE_INT_INTERFACE_IMUX32 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT33.PCIE_INT_INTERFACE_IMUX33 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT34.PCIE_INT_INTERFACE_IMUX34 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT35.PCIE_INT_INTERFACE_IMUX35 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT36.PCIE_INT_INTERFACE_IMUX36 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT37.PCIE_INT_INTERFACE_IMUX37 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT38.PCIE_INT_INTERFACE_IMUX38 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT39.PCIE_INT_INTERFACE_IMUX39 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT40.PCIE_INT_INTERFACE_IMUX40 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT41.PCIE_INT_INTERFACE_IMUX41 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT42.PCIE_INT_INTERFACE_IMUX42 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT43.PCIE_INT_INTERFACE_IMUX43 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT44.PCIE_INT_INTERFACE_IMUX44 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT45.PCIE_INT_INTERFACE_IMUX45 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT46.PCIE_INT_INTERFACE_IMUX46 always
PCIE_INT_INTERFACE_R.PCIE_INT_INTERFACE_IMUX_OUT47.PCIE_INT_INTERFACE_IMUX47 always

441
zynq7/ppips_pcie_top.db Normal file
View File

@ -0,0 +1,441 @@
PCIE_TOP.PCIE_LOGIC_OUTS_B0_L_0.PCIE_TOP_TRNRD59 always
PCIE_TOP.PCIE_LOGIC_OUTS_B0_L_1.PCIE_TOP_TRNRD63 always
PCIE_TOP.PCIE_LOGIC_OUTS_B0_L_2.PCIE_TOP_TRNRD67 always
PCIE_TOP.PCIE_LOGIC_OUTS_B0_L_3.PCIE_TOP_TRNRD71 always
PCIE_TOP.PCIE_LOGIC_OUTS_B0_L_4.PCIE_TOP_TRNRD75 always
PCIE_TOP.PCIE_LOGIC_OUTS_B0_R_0.PCIE_TOP_MIMRXWDATA20 always
PCIE_TOP.PCIE_LOGIC_OUTS_B0_R_1.PCIE_TOP_MIMRXWDATA24 always
PCIE_TOP.PCIE_LOGIC_OUTS_B0_R_2.PCIE_TOP_MIMRXWADDR2 always
PCIE_TOP.PCIE_LOGIC_OUTS_B0_R_3.PCIE_TOP_TRNRD83 always
PCIE_TOP.PCIE_LOGIC_OUTS_B0_R_4.PCIE_TOP_TRNRD79 always
PCIE_TOP.PCIE_LOGIC_OUTS_B1_L_0.PCIE_TOP_TRNRD60 always
PCIE_TOP.PCIE_LOGIC_OUTS_B1_L_1.PCIE_TOP_TRNRD64 always
PCIE_TOP.PCIE_LOGIC_OUTS_B1_L_2.PCIE_TOP_TRNRD68 always
PCIE_TOP.PCIE_LOGIC_OUTS_B1_L_3.PCIE_TOP_TRNRD72 always
PCIE_TOP.PCIE_LOGIC_OUTS_B1_L_4.PCIE_TOP_TRNRD76 always
PCIE_TOP.PCIE_LOGIC_OUTS_B1_R_0.PCIE_TOP_MIMRXWADDR12 always
PCIE_TOP.PCIE_LOGIC_OUTS_B1_R_1.PCIE_TOP_TRNRD91 always
PCIE_TOP.PCIE_LOGIC_OUTS_B1_R_2.PCIE_TOP_MIMRXWDATA32 always
PCIE_TOP.PCIE_LOGIC_OUTS_B1_R_3.PCIE_TOP_TRNRD84 always
PCIE_TOP.PCIE_LOGIC_OUTS_B1_R_4.PCIE_TOP_TRNTDSTRDY3 always
PCIE_TOP.PCIE_LOGIC_OUTS_B2_L_0.PCIE_TOP_TRNRD61 always
PCIE_TOP.PCIE_LOGIC_OUTS_B2_L_1.PCIE_TOP_TRNRD65 always
PCIE_TOP.PCIE_LOGIC_OUTS_B2_L_2.PCIE_TOP_TRNRD69 always
PCIE_TOP.PCIE_LOGIC_OUTS_B2_L_3.PCIE_TOP_TRNRD73 always
PCIE_TOP.PCIE_LOGIC_OUTS_B2_L_4.PCIE_TOP_TRNRD77 always
PCIE_TOP.PCIE_LOGIC_OUTS_B2_R_0.PCIE_TOP_TRNRD95 always
PCIE_TOP.PCIE_LOGIC_OUTS_B2_R_1.PCIE_TOP_MIMRXWDATA12 always
PCIE_TOP.PCIE_LOGIC_OUTS_B2_R_2.PCIE_TOP_TRNRD87 always
PCIE_TOP.PCIE_LOGIC_OUTS_B2_R_3.PCIE_TOP_TRNRD85 always
PCIE_TOP.PCIE_LOGIC_OUTS_B2_R_4.PCIE_TOP_TRNRD80 always
PCIE_TOP.PCIE_LOGIC_OUTS_B3_L_0.PCIE_TOP_TRNRD62 always
PCIE_TOP.PCIE_LOGIC_OUTS_B3_L_1.PCIE_TOP_TRNRD66 always
PCIE_TOP.PCIE_LOGIC_OUTS_B3_L_2.PCIE_TOP_TRNRD70 always
PCIE_TOP.PCIE_LOGIC_OUTS_B3_L_3.PCIE_TOP_TRNRD74 always
PCIE_TOP.PCIE_LOGIC_OUTS_B3_L_4.PCIE_TOP_TRNRD78 always
PCIE_TOP.PCIE_LOGIC_OUTS_B3_R_0.PCIE_TOP_MIMRXRADDR10 always
PCIE_TOP.PCIE_LOGIC_OUTS_B3_R_1.PCIE_TOP_TRNRD92 always
PCIE_TOP.PCIE_LOGIC_OUTS_B3_R_2.PCIE_TOP_TRNRD88 always
PCIE_TOP.PCIE_LOGIC_OUTS_B3_R_3.PCIE_TOP_MIMRXWDATA9 always
PCIE_TOP.PCIE_LOGIC_OUTS_B3_R_4.PCIE_TOP_TRNRD81 always
PCIE_TOP.PCIE_LOGIC_OUTS_B4_L_0.PCIE_TOP_TRNRDLLPDATA32 always
PCIE_TOP.PCIE_LOGIC_OUTS_B4_L_1.PCIE_TOP_TRNRDLLPDATA36 always
PCIE_TOP.PCIE_LOGIC_OUTS_B4_L_2.PCIE_TOP_TRNRDLLPDATA40 always
PCIE_TOP.PCIE_LOGIC_OUTS_B4_L_3.PCIE_TOP_TRNRDLLPDATA44 always
PCIE_TOP.PCIE_LOGIC_OUTS_B4_L_4.PCIE_TOP_TRNRDLLPDATA48 always
PCIE_TOP.PCIE_LOGIC_OUTS_B4_R_0.PCIE_TOP_TRNRD96 always
PCIE_TOP.PCIE_LOGIC_OUTS_B4_R_1.PCIE_TOP_TRNRD93 always
PCIE_TOP.PCIE_LOGIC_OUTS_B4_R_2.PCIE_TOP_TRNRD89 always
PCIE_TOP.PCIE_LOGIC_OUTS_B4_R_3.PCIE_TOP_TRNRD86 always
PCIE_TOP.PCIE_LOGIC_OUTS_B4_R_4.PCIE_TOP_TRNRD82 always
PCIE_TOP.PCIE_LOGIC_OUTS_B5_L_0.PCIE_TOP_TRNRDLLPDATA33 always
PCIE_TOP.PCIE_LOGIC_OUTS_B5_L_1.PCIE_TOP_TRNRDLLPDATA37 always
PCIE_TOP.PCIE_LOGIC_OUTS_B5_L_2.PCIE_TOP_TRNRDLLPDATA41 always
PCIE_TOP.PCIE_LOGIC_OUTS_B5_L_3.PCIE_TOP_TRNRDLLPDATA45 always
PCIE_TOP.PCIE_LOGIC_OUTS_B5_L_4.PCIE_TOP_TRNRDLLPDATA49 always
PCIE_TOP.PCIE_LOGIC_OUTS_B5_R_0.PCIE_TOP_TRNRD97 always
PCIE_TOP.PCIE_LOGIC_OUTS_B5_R_1.PCIE_TOP_MIMRXWDATA49 always
PCIE_TOP.PCIE_LOGIC_OUTS_B5_R_2.PCIE_TOP_MIMRXRADDR4 always
PCIE_TOP.PCIE_LOGIC_OUTS_B5_R_3.PCIE_TOP_TRNRDLLPDATA56 always
PCIE_TOP.PCIE_LOGIC_OUTS_B5_R_4.PCIE_TOP_TRNRDLLPDATA52 always
PCIE_TOP.PCIE_LOGIC_OUTS_B6_L_0.PCIE_TOP_PIPETXMARGIN2 always
PCIE_TOP.PCIE_LOGIC_OUTS_B6_L_1.PCIE_TOP_TRNRDLLPDATA38 always
PCIE_TOP.PCIE_LOGIC_OUTS_B6_L_2.PCIE_TOP_TRNRDLLPDATA42 always
PCIE_TOP.PCIE_LOGIC_OUTS_B6_L_3.PCIE_TOP_TRNRDLLPDATA46 always
PCIE_TOP.PCIE_LOGIC_OUTS_B6_L_4.PCIE_TOP_TRNRDLLPDATA50 always
PCIE_TOP.PCIE_LOGIC_OUTS_B6_R_0.PCIE_TOP_TRNRD98 always
PCIE_TOP.PCIE_LOGIC_OUTS_B6_R_1.PCIE_TOP_TRNRD94 always
PCIE_TOP.PCIE_LOGIC_OUTS_B6_R_2.PCIE_TOP_TRNRD90 always
PCIE_TOP.PCIE_LOGIC_OUTS_B6_R_3.PCIE_TOP_TRNRDLLPDATA57 always
PCIE_TOP.PCIE_LOGIC_OUTS_B6_R_4.PCIE_TOP_TRNRDLLPDATA53 always
PCIE_TOP.PCIE_LOGIC_OUTS_B7_L_0.PCIE_TOP_TRNRDLLPDATA34 always
PCIE_TOP.PCIE_LOGIC_OUTS_B7_L_1.PCIE_TOP_TRNRDLLPDATA39 always
PCIE_TOP.PCIE_LOGIC_OUTS_B7_L_2.PCIE_TOP_TRNRDLLPDATA43 always
PCIE_TOP.PCIE_LOGIC_OUTS_B7_L_3.PCIE_TOP_TRNRDLLPDATA47 always
PCIE_TOP.PCIE_LOGIC_OUTS_B7_L_4.PCIE_TOP_TRNRDLLPDATA51 always
PCIE_TOP.PCIE_LOGIC_OUTS_B7_R_0.PCIE_TOP_PL2SUSPENDOK always
PCIE_TOP.PCIE_LOGIC_OUTS_B7_R_1.PCIE_TOP_MIMRXWDATA51 always
PCIE_TOP.PCIE_LOGIC_OUTS_B7_R_2.PCIE_TOP_TRNRDLLPDATA60 always
PCIE_TOP.PCIE_LOGIC_OUTS_B7_R_3.PCIE_TOP_TRNRDLLPDATA58 always
PCIE_TOP.PCIE_LOGIC_OUTS_B7_R_4.PCIE_TOP_TRNRDLLPDATA54 always
PCIE_TOP.PCIE_LOGIC_OUTS_B8_L_0.PCIE_TOP_TRNRDLLPDATA35 always
PCIE_TOP.PCIE_LOGIC_OUTS_B8_L_1.PCIE_TOP_CFGPMRCVENTERL23N always
PCIE_TOP.PCIE_LOGIC_OUTS_B8_L_2.PCIE_TOP_CFGPMCSRPMEEN always
PCIE_TOP.PCIE_LOGIC_OUTS_B8_L_3.PCIE_TOP_CFGTRANSACTIONADDR0 always
PCIE_TOP.PCIE_LOGIC_OUTS_B8_L_4.PCIE_TOP_CFGTRANSACTIONADDR4 always
PCIE_TOP.PCIE_LOGIC_OUTS_B8_R_0.PCIE_TOP_MIMRXRADDR9 always
PCIE_TOP.PCIE_LOGIC_OUTS_B8_R_1.PCIE_TOP_MIMRXWDATA8 always
PCIE_TOP.PCIE_LOGIC_OUTS_B8_R_2.PCIE_TOP_TRNRDLLPDATA61 always
PCIE_TOP.PCIE_LOGIC_OUTS_B8_R_3.PCIE_TOP_MIMRXWDATA19 always
PCIE_TOP.PCIE_LOGIC_OUTS_B8_R_4.PCIE_TOP_MIMRXWDATA29 always
PCIE_TOP.PCIE_LOGIC_OUTS_B9_L_0.PCIE_TOP_CFGPCIELINKSTATE1 always
PCIE_TOP.PCIE_LOGIC_OUTS_B9_L_1.PCIE_TOP_CFGPMRCVREQACKN always
PCIE_TOP.PCIE_LOGIC_OUTS_B9_L_2.PCIE_TOP_CFGPMCSRPMESTATUS always
PCIE_TOP.PCIE_LOGIC_OUTS_B9_L_3.PCIE_TOP_CFGTRANSACTIONADDR1 always
PCIE_TOP.PCIE_LOGIC_OUTS_B9_L_4.PCIE_TOP_CFGTRANSACTIONADDR5 always
PCIE_TOP.PCIE_LOGIC_OUTS_B9_R_0.PCIE_TOP_MIMRXWDATA4 always
PCIE_TOP.PCIE_LOGIC_OUTS_B9_R_1.PCIE_TOP_MIMRXWADDR5 always
PCIE_TOP.PCIE_LOGIC_OUTS_B9_R_2.PCIE_TOP_MIMRXWDATA17 always
PCIE_TOP.PCIE_LOGIC_OUTS_B9_R_3.PCIE_TOP_TRNRDLLPDATA59 always
PCIE_TOP.PCIE_LOGIC_OUTS_B9_R_4.PCIE_TOP_MIMRXWDATA13 always
PCIE_TOP.PCIE_LOGIC_OUTS_B10_L_0.PCIE_TOP_CFGPCIELINKSTATE2 always
PCIE_TOP.PCIE_LOGIC_OUTS_B10_L_1.PCIE_TOP_CFGPMCSRPOWERSTATE0 always
PCIE_TOP.PCIE_LOGIC_OUTS_B10_L_2.PCIE_TOP_CFGTRANSACTION always
PCIE_TOP.PCIE_LOGIC_OUTS_B10_L_3.PCIE_TOP_CFGTRANSACTIONADDR2 always
PCIE_TOP.PCIE_LOGIC_OUTS_B10_L_4.PCIE_TOP_CFGTRANSACTIONADDR6 always
PCIE_TOP.PCIE_LOGIC_OUTS_B10_R_0.PCIE_TOP_MIMRXRADDR11 always
PCIE_TOP.PCIE_LOGIC_OUTS_B10_R_1.PCIE_TOP_TRNRDLLPSRCRDY0 always
PCIE_TOP.PCIE_LOGIC_OUTS_B10_R_2.PCIE_TOP_TRNRDLLPDATA62 always
PCIE_TOP.PCIE_LOGIC_OUTS_B10_R_3.PCIE_TOP_MIMRXWDATA25 always
PCIE_TOP.PCIE_LOGIC_OUTS_B10_R_4.PCIE_TOP_MIMRXWDATA15 always
PCIE_TOP.PCIE_LOGIC_OUTS_B11_L_0.PCIE_TOP_CFGPMRCVASREQL1N always
PCIE_TOP.PCIE_LOGIC_OUTS_B11_L_1.PCIE_TOP_CFGPMCSRPOWERSTATE1 always
PCIE_TOP.PCIE_LOGIC_OUTS_B11_L_2.PCIE_TOP_CFGTRANSACTIONTYPE always
PCIE_TOP.PCIE_LOGIC_OUTS_B11_L_3.PCIE_TOP_CFGTRANSACTIONADDR3 always
PCIE_TOP.PCIE_LOGIC_OUTS_B11_L_4.PCIE_TOP_CFGCOMMANDIOENABLE always
PCIE_TOP.PCIE_LOGIC_OUTS_B11_R_0.PCIE_TOP_MIMRXWDATA0 always
PCIE_TOP.PCIE_LOGIC_OUTS_B11_R_1.PCIE_TOP_MIMRXRADDR1 always
PCIE_TOP.PCIE_LOGIC_OUTS_B11_R_2.PCIE_TOP_TRNRDLLPDATA63 always
PCIE_TOP.PCIE_LOGIC_OUTS_B11_R_3.PCIE_TOP_CFGMGMTDO20 always
PCIE_TOP.PCIE_LOGIC_OUTS_B11_R_4.PCIE_TOP_MIMRXWDATA35 always
PCIE_TOP.PCIE_LOGIC_OUTS_B12_L_0.PCIE_TOP_CFGPMRCVENTERL1N always
PCIE_TOP.PCIE_LOGIC_OUTS_B12_L_1.PCIE_TOP_CFGLINKCONTROLCOMMONCLOCK always
PCIE_TOP.PCIE_LOGIC_OUTS_B12_L_2.PCIE_TOP_CFGLINKCONTROLBANDWIDTHINTEN always
PCIE_TOP.PCIE_LOGIC_OUTS_B12_L_3.PCIE_TOP_CFGDEVCONTROL2CPLTIMEOUTVAL2 always
PCIE_TOP.PCIE_LOGIC_OUTS_B12_L_4.PCIE_TOP_CFGDEVCONTROL2ATOMICREQUESTEREN always
PCIE_TOP.PCIE_LOGIC_OUTS_B12_R_0.PCIE_TOP_PL2RECOVERY always
PCIE_TOP.PCIE_LOGIC_OUTS_B12_R_1.PCIE_TOP_MIMRXREN always
PCIE_TOP.PCIE_LOGIC_OUTS_B12_R_2.PCIE_TOP_MIMRXRADDR2 always
PCIE_TOP.PCIE_LOGIC_OUTS_B12_R_3.PCIE_TOP_CFGMGMTDO21 always
PCIE_TOP.PCIE_LOGIC_OUTS_B12_R_4.PCIE_TOP_TRNRDLLPDATA55 always
PCIE_TOP.PCIE_LOGIC_OUTS_B13_L_0.PCIE_TOP_CFGLINKCONTROLASPMCONTROL1 always
PCIE_TOP.PCIE_LOGIC_OUTS_B13_L_1.PCIE_TOP_CFGLINKCONTROLEXTENDEDSYNC always
PCIE_TOP.PCIE_LOGIC_OUTS_B13_L_2.PCIE_TOP_CFGLINKCONTROLAUTOBANDWIDTHINTEN always
PCIE_TOP.PCIE_LOGIC_OUTS_B13_L_3.PCIE_TOP_CFGDEVCONTROL2CPLTIMEOUTVAL3 always
PCIE_TOP.PCIE_LOGIC_OUTS_B13_L_4.PCIE_TOP_CFGDEVCONTROL2ATOMICEGRESSBLOCK always
PCIE_TOP.PCIE_LOGIC_OUTS_B13_R_0.PCIE_TOP_MIMRXWDATA1 always
PCIE_TOP.PCIE_LOGIC_OUTS_B13_R_1.PCIE_TOP_MIMRXWDATA26 always
PCIE_TOP.PCIE_LOGIC_OUTS_B13_R_2.PCIE_TOP_MIMRXRADDR0 always
PCIE_TOP.PCIE_LOGIC_OUTS_B13_R_3.PCIE_TOP_CFGMGMTDO22 always
PCIE_TOP.PCIE_LOGIC_OUTS_B13_R_4.PCIE_TOP_CFGMGMTDO24 always
PCIE_TOP.PCIE_LOGIC_OUTS_B14_L_0.PCIE_TOP_CFGLINKCONTROLRCB always
PCIE_TOP.PCIE_LOGIC_OUTS_B14_L_1.PCIE_TOP_CFGLINKCONTROLCLOCKPMEN always
PCIE_TOP.PCIE_LOGIC_OUTS_B14_L_2.PCIE_TOP_CFGDEVCONTROL2CPLTIMEOUTVAL0 always
PCIE_TOP.PCIE_LOGIC_OUTS_B14_L_3.PCIE_TOP_CFGDEVCONTROL2CPLTIMEOUTDIS always
PCIE_TOP.PCIE_LOGIC_OUTS_B14_L_4.PCIE_TOP_CFGDEVCONTROL2IDOREQEN always
PCIE_TOP.PCIE_LOGIC_OUTS_B14_R_0.PCIE_TOP_DBGVECA18 always
PCIE_TOP.PCIE_LOGIC_OUTS_B14_R_1.PCIE_TOP_TRNRDLLPSRCRDY1 always
PCIE_TOP.PCIE_LOGIC_OUTS_B14_R_2.PCIE_TOP_MIMRXWDATA28 always
PCIE_TOP.PCIE_LOGIC_OUTS_B14_R_3.PCIE_TOP_MIMRXWDATA23 always
PCIE_TOP.PCIE_LOGIC_OUTS_B14_R_4.PCIE_TOP_CFGMGMTDO25 always
PCIE_TOP.PCIE_LOGIC_OUTS_B15_L_0.PCIE_TOP_CFGLINKCONTROLLINKDISABLE always
PCIE_TOP.PCIE_LOGIC_OUTS_B15_L_1.PCIE_TOP_CFGLINKCONTROLHWAUTOWIDTHDIS always
PCIE_TOP.PCIE_LOGIC_OUTS_B15_L_2.PCIE_TOP_CFGDEVCONTROL2CPLTIMEOUTVAL1 always
PCIE_TOP.PCIE_LOGIC_OUTS_B15_L_3.PCIE_TOP_CFGDEVCONTROL2ARIFORWARDEN always
PCIE_TOP.PCIE_LOGIC_OUTS_B15_L_4.PCIE_TOP_CFGDEVCONTROL2IDOCPLEN always
PCIE_TOP.PCIE_LOGIC_OUTS_B15_R_0.PCIE_TOP_MIMRXWDATA22 always
PCIE_TOP.PCIE_LOGIC_OUTS_B15_R_1.PCIE_TOP_MIMRXWADDR1 always
PCIE_TOP.PCIE_LOGIC_OUTS_B15_R_2.PCIE_TOP_MIMRXWDATA3 always
PCIE_TOP.PCIE_LOGIC_OUTS_B15_R_3.PCIE_TOP_CFGMGMTDO23 always
PCIE_TOP.PCIE_LOGIC_OUTS_B15_R_4.PCIE_TOP_CFGMGMTDO26 always
PCIE_TOP.PCIE_LOGIC_OUTS_B16_L_0.PCIE_TOP_PIPETXMARGIN1 always
PCIE_TOP.PCIE_LOGIC_OUTS_B16_L_1.PCIE_TOP_CFGAERROOTERRFATALERRRECEIVED always
PCIE_TOP.PCIE_LOGIC_OUTS_B16_L_2.PCIE_TOP_CFGVCTCVCMAP3 always
PCIE_TOP.PCIE_LOGIC_OUTS_B16_L_3.PCIE_TOP_DRPRDY always
PCIE_TOP.PCIE_LOGIC_OUTS_B16_L_4.PCIE_TOP_DRPDO3 always
PCIE_TOP.PCIE_LOGIC_OUTS_B16_R_0.PCIE_TOP_MIMRXWDATA6 always
PCIE_TOP.PCIE_LOGIC_OUTS_B16_R_1.PCIE_TOP_LL2TFCINIT1SEQ always
PCIE_TOP.PCIE_LOGIC_OUTS_B16_R_2.PCIE_TOP_CFGMGMTDO17 always
PCIE_TOP.PCIE_LOGIC_OUTS_B16_R_3.PCIE_TOP_CFGMGMTDO28 always
PCIE_TOP.PCIE_LOGIC_OUTS_B16_R_4.PCIE_TOP_CFGMGMTDO27 always
PCIE_TOP.PCIE_LOGIC_OUTS_B17_L_0.PCIE_TOP_CFGLINKCONTROLRETRAINLINK always
PCIE_TOP.PCIE_LOGIC_OUTS_B17_L_1.PCIE_TOP_CFGVCTCVCMAP0 always
PCIE_TOP.PCIE_LOGIC_OUTS_B17_L_2.PCIE_TOP_CFGVCTCVCMAP4 always
PCIE_TOP.PCIE_LOGIC_OUTS_B17_L_3.PCIE_TOP_DRPDO0 always
PCIE_TOP.PCIE_LOGIC_OUTS_B17_L_4.PCIE_TOP_DRPDO4 always
PCIE_TOP.PCIE_LOGIC_OUTS_B17_R_0.PCIE_TOP_MIMRXRADDR8 always
PCIE_TOP.PCIE_LOGIC_OUTS_B17_R_1.PCIE_TOP_MIMRXWDATA34 always
PCIE_TOP.PCIE_LOGIC_OUTS_B17_R_2.PCIE_TOP_CFGMGMTDO18 always
PCIE_TOP.PCIE_LOGIC_OUTS_B17_R_3.PCIE_TOP_CFGMGMTDO29 always
PCIE_TOP.PCIE_LOGIC_OUTS_B17_R_4.PCIE_TOP_CFGCOMMANDMEMENABLE always
PCIE_TOP.PCIE_LOGIC_OUTS_B18_L_0.PCIE_TOP_PIPETXMARGIN0 always
PCIE_TOP.PCIE_LOGIC_OUTS_B18_L_1.PCIE_TOP_CFGVCTCVCMAP1 always
PCIE_TOP.PCIE_LOGIC_OUTS_B18_L_2.PCIE_TOP_CFGVCTCVCMAP5 always
PCIE_TOP.PCIE_LOGIC_OUTS_B18_L_3.PCIE_TOP_DRPDO1 always
PCIE_TOP.PCIE_LOGIC_OUTS_B18_L_4.PCIE_TOP_DRPDO5 always
PCIE_TOP.PCIE_LOGIC_OUTS_B18_R_0.PCIE_TOP_MIMRXWDATA2 always
PCIE_TOP.PCIE_LOGIC_OUTS_B18_R_1.PCIE_TOP_MIMRXWEN always
PCIE_TOP.PCIE_LOGIC_OUTS_B18_R_2.PCIE_TOP_MIMRXWDATA30 always
PCIE_TOP.PCIE_LOGIC_OUTS_B18_R_3.PCIE_TOP_CFGMGMTDO30 always
PCIE_TOP.PCIE_LOGIC_OUTS_B18_R_4.PCIE_TOP_MIMRXWDATA11 always
PCIE_TOP.PCIE_LOGIC_OUTS_B19_L_0.PCIE_TOP_CFGAERROOTERRNONFATALERRREPORTINGEN always
PCIE_TOP.PCIE_LOGIC_OUTS_B19_L_1.PCIE_TOP_CFGVCTCVCMAP2 always
PCIE_TOP.PCIE_LOGIC_OUTS_B19_L_2.PCIE_TOP_CFGVCTCVCMAP6 always
PCIE_TOP.PCIE_LOGIC_OUTS_B19_L_3.PCIE_TOP_DRPDO2 always
PCIE_TOP.PCIE_LOGIC_OUTS_B19_L_4.PCIE_TOP_DRPDO6 always
PCIE_TOP.PCIE_LOGIC_OUTS_B19_R_0.PCIE_TOP_DBGVECA19 always
PCIE_TOP.PCIE_LOGIC_OUTS_B19_R_1.PCIE_TOP_MIMRXWDATA10 always
PCIE_TOP.PCIE_LOGIC_OUTS_B19_R_2.PCIE_TOP_CFGMGMTDO19 always
PCIE_TOP.PCIE_LOGIC_OUTS_B19_R_3.PCIE_TOP_MIMRXWDATA21 always
PCIE_TOP.PCIE_LOGIC_OUTS_B19_R_4.PCIE_TOP_MIMRXWDATA27 always
PCIE_TOP.PCIE_LOGIC_OUTS_B20_L_0.PCIE_TOP_CFGAERROOTERRFATALERRREPORTINGEN always
PCIE_TOP.PCIE_LOGIC_OUTS_B20_L_1.PCIE_TOP_DRPDO11 always
PCIE_TOP.PCIE_LOGIC_OUTS_B20_L_2.PCIE_TOP_DRPDO15 always
PCIE_TOP.PCIE_LOGIC_OUTS_B20_L_3.PCIE_TOP_DBGVECA3 always
PCIE_TOP.PCIE_LOGIC_OUTS_B20_L_4.PCIE_TOP_DBGVECA7 always
PCIE_TOP.PCIE_LOGIC_OUTS_B20_R_0.PCIE_TOP_DBGVECA20 always
PCIE_TOP.PCIE_LOGIC_OUTS_B20_R_1.PCIE_TOP_LL2TFCINIT2SEQ always
PCIE_TOP.PCIE_LOGIC_OUTS_B20_R_2.PCIE_TOP_DBGVECA14 always
PCIE_TOP.PCIE_LOGIC_OUTS_B20_R_3.PCIE_TOP_DBGVECA12 always
PCIE_TOP.PCIE_LOGIC_OUTS_B20_R_4.PCIE_TOP_CFGCOMMANDBUSMASTERENABLE always
PCIE_TOP.PCIE_LOGIC_OUTS_B21_L_0.PCIE_TOP_CFGAERROOTERRCORRERRRECEIVED always
PCIE_TOP.PCIE_LOGIC_OUTS_B21_L_1.PCIE_TOP_DRPDO12 always
PCIE_TOP.PCIE_LOGIC_OUTS_B21_L_2.PCIE_TOP_DBGVECA0 always
PCIE_TOP.PCIE_LOGIC_OUTS_B21_L_3.PCIE_TOP_DBGVECA4 always
PCIE_TOP.PCIE_LOGIC_OUTS_B21_L_4.PCIE_TOP_DBGVECA8 always
PCIE_TOP.PCIE_LOGIC_OUTS_B21_R_0.PCIE_TOP_DBGVECA21 always
PCIE_TOP.PCIE_LOGIC_OUTS_B21_R_1.PCIE_TOP_CFGMGMTDO16 always
PCIE_TOP.PCIE_LOGIC_OUTS_B21_R_2.PCIE_TOP_MIMRXWDATA31 always
PCIE_TOP.PCIE_LOGIC_OUTS_B21_R_3.PCIE_TOP_DBGVECA13 always
PCIE_TOP.PCIE_LOGIC_OUTS_B21_R_4.PCIE_TOP_CFGCOMMANDINTERRUPTDISABLE always
PCIE_TOP.PCIE_LOGIC_OUTS_B22_L_0.PCIE_TOP_CFGAERROOTERRNONFATALERRRECEIVED always
PCIE_TOP.PCIE_LOGIC_OUTS_B22_L_1.PCIE_TOP_DRPDO13 always
PCIE_TOP.PCIE_LOGIC_OUTS_B22_L_2.PCIE_TOP_DBGVECA1 always
PCIE_TOP.PCIE_LOGIC_OUTS_B22_L_3.PCIE_TOP_DBGVECA5 always
PCIE_TOP.PCIE_LOGIC_OUTS_B22_L_4.PCIE_TOP_DBGVECA9 always
PCIE_TOP.PCIE_LOGIC_OUTS_B22_R_0.PCIE_TOP_DBGVECB10 always
PCIE_TOP.PCIE_LOGIC_OUTS_B22_R_1.PCIE_TOP_DBGVECA16 always
PCIE_TOP.PCIE_LOGIC_OUTS_B22_R_2.PCIE_TOP_MIMRXWDATA33 always
PCIE_TOP.PCIE_LOGIC_OUTS_B22_R_3.PCIE_TOP_MIMRXWDATA5 always
PCIE_TOP.PCIE_LOGIC_OUTS_B22_R_4.PCIE_TOP_DBGVECA11 always
PCIE_TOP.PCIE_LOGIC_OUTS_B23_L_0.PCIE_TOP_PLDBGVEC8 always
PCIE_TOP.PCIE_LOGIC_OUTS_B23_L_1.PCIE_TOP_DRPDO14 always
PCIE_TOP.PCIE_LOGIC_OUTS_B23_L_2.PCIE_TOP_DBGVECA2 always
PCIE_TOP.PCIE_LOGIC_OUTS_B23_L_3.PCIE_TOP_DBGVECA6 always
PCIE_TOP.PCIE_LOGIC_OUTS_B23_L_4.PCIE_TOP_DBGVECA10 always
PCIE_TOP.PCIE_LOGIC_OUTS_B23_R_1.PCIE_TOP_DBGVECA17 always
PCIE_TOP.PCIE_LOGIC_OUTS_B23_R_2.PCIE_TOP_DBGVECA15 always
PCIE_TOP.PCIE_LOGIC_OUTS_B23_R_3.PCIE_TOP_MIMRXWDATA7 always
PCIE_TOP.PCIE_LOGIC_OUTS_B23_R_4.PCIE_TOP_CFGDEVCONTROL2LTREN always
PCIE_TOP.PCIE_TOP_CFGERRLOCKEDN.PCIE_IMUX17_R_2 always
PCIE_TOP.PCIE_TOP_CFGERRNORECOVERYN.PCIE_IMUX18_R_2 always
PCIE_TOP.PCIE_TOP_CFGINTERRUPTN.PCIE_IMUX19_R_4 always
PCIE_TOP.PCIE_TOP_LL2SENDPMACK.PCIE_IMUX2_L_4 always
PCIE_TOP.PCIE_TOP_LL2SUSPENDNOW.PCIE_IMUX16_R_3 always
PCIE_TOP.PCIE_TOP_LL2TLPRCV.PCIE_IMUX2_L_3 always
PCIE_TOP.PCIE_TOP_PIPERX0CHANISALIGNED.PCIE_IMUX33_L_0 always
PCIE_TOP.PCIE_TOP_PIPERX0PHYSTATUS.PCIE_IMUX37_L_0 always
PCIE_TOP.PCIE_TOP_PIPERX0VALID.PCIE_IMUX36_L_0 always
PCIE_TOP.PCIE_TOP_PIPERX4CHANISALIGNED.PCIE_IMUX33_R_0 always
PCIE_TOP.PCIE_TOP_PIPERX4PHYSTATUS.PCIE_IMUX37_R_0 always
PCIE_TOP.PCIE_TOP_PIPERX4VALID.PCIE_IMUX36_R_0 always
PCIE_TOP.PCIE_TOP_TL2ASPMSUSPENDCREDITCHECK.PCIE_IMUX18_R_3 always
PCIE_TOP.PCIE_TOP_TL2PPMSUSPENDREQ.PCIE_IMUX17_R_3 always
PCIE_TOP.PCIE_TOP_TRNTDLLPSRCRDY.PCIE_IMUX1_L_3 always
PCIE_TOP.PCIE_TOP_CFGDEVID0.PCIE_IMUX11_L_1 always
PCIE_TOP.PCIE_TOP_CFGDEVID1.PCIE_IMUX8_L_2 always
PCIE_TOP.PCIE_TOP_CFGDEVID2.PCIE_IMUX9_L_2 always
PCIE_TOP.PCIE_TOP_CFGDEVID3.PCIE_IMUX10_L_2 always
PCIE_TOP.PCIE_TOP_CFGDEVID4.PCIE_IMUX11_L_2 always
PCIE_TOP.PCIE_TOP_CFGDEVID5.PCIE_IMUX8_L_3 always
PCIE_TOP.PCIE_TOP_CFGDEVID6.PCIE_IMUX9_L_3 always
PCIE_TOP.PCIE_TOP_CFGDEVID7.PCIE_IMUX10_L_3 always
PCIE_TOP.PCIE_TOP_CFGDEVID8.PCIE_IMUX11_L_3 always
PCIE_TOP.PCIE_TOP_CFGDEVID9.PCIE_IMUX8_L_4 always
PCIE_TOP.PCIE_TOP_CFGDEVID10.PCIE_IMUX9_L_4 always
PCIE_TOP.PCIE_TOP_CFGDEVID11.PCIE_IMUX10_L_4 always
PCIE_TOP.PCIE_TOP_CFGDEVID12.PCIE_IMUX11_L_4 always
PCIE_TOP.PCIE_TOP_CFGDEVID13.PCIE_IMUX21_R_4 always
PCIE_TOP.PCIE_TOP_CFGDEVID14.PCIE_IMUX22_R_4 always
PCIE_TOP.PCIE_TOP_CFGDEVID15.PCIE_IMUX23_R_4 always
PCIE_TOP.PCIE_TOP_CFGDSN57.PCIE_IMUX8_L_0 always
PCIE_TOP.PCIE_TOP_CFGDSN58.PCIE_IMUX9_L_0 always
PCIE_TOP.PCIE_TOP_CFGDSN59.PCIE_IMUX10_L_0 always
PCIE_TOP.PCIE_TOP_CFGDSN60.PCIE_IMUX11_L_0 always
PCIE_TOP.PCIE_TOP_CFGDSN61.PCIE_IMUX8_L_1 always
PCIE_TOP.PCIE_TOP_CFGDSN62.PCIE_IMUX9_L_1 always
PCIE_TOP.PCIE_TOP_CFGDSN63.PCIE_IMUX10_L_1 always
PCIE_TOP.PCIE_TOP_CFGERRAERHEADERLOG0.PCIE_IMUX19_R_2 always
PCIE_TOP.PCIE_TOP_CFGERRAERHEADERLOG1.PCIE_IMUX20_R_2 always
PCIE_TOP.PCIE_TOP_CFGERRAERHEADERLOG2.PCIE_IMUX20_R_3 always
PCIE_TOP.PCIE_TOP_CFGERRAERHEADERLOG3.PCIE_IMUX21_R_3 always
PCIE_TOP.PCIE_TOP_CFGERRAERHEADERLOG4.PCIE_IMUX22_R_3 always
PCIE_TOP.PCIE_TOP_CFGERRAERHEADERLOG5.PCIE_IMUX23_R_3 always
PCIE_TOP.PCIE_TOP_CFGERRAERHEADERLOG6.PCIE_IMUX13_R_4 always
PCIE_TOP.PCIE_TOP_CFGERRAERHEADERLOG7.PCIE_IMUX14_R_4 always
PCIE_TOP.PCIE_TOP_CFGERRAERHEADERLOG8.PCIE_IMUX15_R_4 always
PCIE_TOP.PCIE_TOP_CFGERRAERHEADERLOG9.PCIE_IMUX16_R_4 always
PCIE_TOP.PCIE_TOP_CFGERRAERHEADERLOG10.PCIE_IMUX24_R_3 always
PCIE_TOP.PCIE_TOP_CFGERRAERHEADERLOG11.PCIE_IMUX21_R_2 always
PCIE_TOP.PCIE_TOP_CFGERRTLPCPLHEADER26.PCIE_IMUX4_L_0 always
PCIE_TOP.PCIE_TOP_CFGERRTLPCPLHEADER27.PCIE_IMUX5_L_0 always
PCIE_TOP.PCIE_TOP_CFGERRTLPCPLHEADER28.PCIE_IMUX6_L_0 always
PCIE_TOP.PCIE_TOP_CFGERRTLPCPLHEADER29.PCIE_IMUX7_L_0 always
PCIE_TOP.PCIE_TOP_CFGERRTLPCPLHEADER30.PCIE_IMUX4_L_1 always
PCIE_TOP.PCIE_TOP_CFGERRTLPCPLHEADER31.PCIE_IMUX5_L_1 always
PCIE_TOP.PCIE_TOP_CFGERRTLPCPLHEADER32.PCIE_IMUX6_L_1 always
PCIE_TOP.PCIE_TOP_CFGERRTLPCPLHEADER33.PCIE_IMUX7_L_1 always
PCIE_TOP.PCIE_TOP_CFGERRTLPCPLHEADER34.PCIE_IMUX4_L_2 always
PCIE_TOP.PCIE_TOP_CFGERRTLPCPLHEADER35.PCIE_IMUX5_L_2 always
PCIE_TOP.PCIE_TOP_CFGERRTLPCPLHEADER36.PCIE_IMUX6_L_2 always
PCIE_TOP.PCIE_TOP_CFGERRTLPCPLHEADER37.PCIE_IMUX7_L_2 always
PCIE_TOP.PCIE_TOP_CFGERRTLPCPLHEADER38.PCIE_IMUX4_L_3 always
PCIE_TOP.PCIE_TOP_CFGERRTLPCPLHEADER39.PCIE_IMUX5_L_3 always
PCIE_TOP.PCIE_TOP_CFGERRTLPCPLHEADER40.PCIE_IMUX6_L_3 always
PCIE_TOP.PCIE_TOP_CFGERRTLPCPLHEADER41.PCIE_IMUX7_L_3 always
PCIE_TOP.PCIE_TOP_CFGERRTLPCPLHEADER42.PCIE_IMUX4_L_4 always
PCIE_TOP.PCIE_TOP_CFGERRTLPCPLHEADER43.PCIE_IMUX5_L_4 always
PCIE_TOP.PCIE_TOP_CFGERRTLPCPLHEADER44.PCIE_IMUX6_L_4 always
PCIE_TOP.PCIE_TOP_CFGERRTLPCPLHEADER45.PCIE_IMUX7_L_4 always
PCIE_TOP.PCIE_TOP_CFGERRTLPCPLHEADER46.PCIE_IMUX17_R_4 always
PCIE_TOP.PCIE_TOP_CFGERRTLPCPLHEADER47.PCIE_IMUX18_R_4 always
PCIE_TOP.PCIE_TOP_CFGINTERRUPTDI0.PCIE_IMUX20_R_4 always
PCIE_TOP.PCIE_TOP_CFGVENDID0.PCIE_IMUX24_R_4 always
PCIE_TOP.PCIE_TOP_DBGMODE0.PCIE_IMUX25_R_4 always
PCIE_TOP.PCIE_TOP_DRPADDR7.PCIE_IMUX12_L_0 always
PCIE_TOP.PCIE_TOP_DRPADDR8.PCIE_IMUX13_L_0 always
PCIE_TOP.PCIE_TOP_DRPDI0.PCIE_IMUX12_L_1 always
PCIE_TOP.PCIE_TOP_DRPDI1.PCIE_IMUX13_L_1 always
PCIE_TOP.PCIE_TOP_DRPDI2.PCIE_IMUX14_L_1 always
PCIE_TOP.PCIE_TOP_DRPDI3.PCIE_IMUX15_L_1 always
PCIE_TOP.PCIE_TOP_DRPDI4.PCIE_IMUX12_L_2 always
PCIE_TOP.PCIE_TOP_DRPDI5.PCIE_IMUX13_L_2 always
PCIE_TOP.PCIE_TOP_DRPDI6.PCIE_IMUX14_L_2 always
PCIE_TOP.PCIE_TOP_DRPDI7.PCIE_IMUX15_L_2 always
PCIE_TOP.PCIE_TOP_DRPDI8.PCIE_IMUX12_L_3 always
PCIE_TOP.PCIE_TOP_DRPDI9.PCIE_IMUX13_L_3 always
PCIE_TOP.PCIE_TOP_DRPDI10.PCIE_IMUX14_L_3 always
PCIE_TOP.PCIE_TOP_DRPDI11.PCIE_IMUX15_L_3 always
PCIE_TOP.PCIE_TOP_DRPDI12.PCIE_IMUX12_L_4 always
PCIE_TOP.PCIE_TOP_DRPDI13.PCIE_IMUX13_L_4 always
PCIE_TOP.PCIE_TOP_DRPDI14.PCIE_IMUX14_L_4 always
PCIE_TOP.PCIE_TOP_DRPDI15.PCIE_IMUX15_L_4 always
PCIE_TOP.PCIE_TOP_LL2SENDASREQL1.PCIE_IMUX1_L_4 always
PCIE_TOP.PCIE_TOP_LL2SENDENTERL1.PCIE_IMUX3_L_3 always
PCIE_TOP.PCIE_TOP_LL2SENDENTERL23.PCIE_IMUX0_L_4 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA20.PCIE_IMUX0_R_0 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA21.PCIE_IMUX1_R_0 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA22.PCIE_IMUX2_R_0 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA23.PCIE_IMUX3_R_0 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA24.PCIE_IMUX0_R_1 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA25.PCIE_IMUX1_R_1 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA26.PCIE_IMUX2_R_1 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA27.PCIE_IMUX3_R_1 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA28.PCIE_IMUX0_R_2 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA29.PCIE_IMUX1_R_2 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA30.PCIE_IMUX2_R_2 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA31.PCIE_IMUX3_R_2 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA32.PCIE_IMUX0_R_3 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA33.PCIE_IMUX1_R_3 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA34.PCIE_IMUX2_R_3 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA35.PCIE_IMUX3_R_3 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA36.PCIE_IMUX0_R_4 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA37.PCIE_IMUX1_R_4 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA38.PCIE_IMUX2_R_4 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA39.PCIE_IMUX3_R_4 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA40.PCIE_IMUX4_R_3 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA41.PCIE_IMUX5_R_3 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA42.PCIE_IMUX6_R_3 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA43.PCIE_IMUX7_R_3 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA44.PCIE_IMUX4_R_2 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA45.PCIE_IMUX5_R_2 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA46.PCIE_IMUX6_R_2 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA47.PCIE_IMUX7_R_2 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA48.PCIE_IMUX4_R_1 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA49.PCIE_IMUX5_R_1 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA50.PCIE_IMUX6_R_1 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA51.PCIE_IMUX7_R_1 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA52.PCIE_IMUX4_R_0 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA53.PCIE_IMUX5_R_0 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA54.PCIE_IMUX6_R_0 always
PCIE_TOP.PCIE_TOP_MIMRXRDATA55.PCIE_IMUX7_R_0 always
PCIE_TOP.PCIE_TOP_PIPERX0CHARISK0.PCIE_IMUX16_L_1 always
PCIE_TOP.PCIE_TOP_PIPERX0DATA0.PCIE_IMUX37_L_1 always
PCIE_TOP.PCIE_TOP_PIPERX0DATA1.PCIE_IMUX36_L_1 always
PCIE_TOP.PCIE_TOP_PIPERX0DATA2.PCIE_IMUX33_L_1 always
PCIE_TOP.PCIE_TOP_PIPERX0DATA3.PCIE_IMUX32_L_1 always
PCIE_TOP.PCIE_TOP_PIPERX0DATA4.PCIE_IMUX39_L_0 always
PCIE_TOP.PCIE_TOP_PIPERX0DATA5.PCIE_IMUX38_L_0 always
PCIE_TOP.PCIE_TOP_PIPERX0DATA6.PCIE_IMUX35_L_0 always
PCIE_TOP.PCIE_TOP_PIPERX0DATA7.PCIE_IMUX34_L_0 always
PCIE_TOP.PCIE_TOP_PIPERX4CHARISK0.PCIE_IMUX16_R_1 always
PCIE_TOP.PCIE_TOP_PIPERX4DATA0.PCIE_IMUX37_R_1 always
PCIE_TOP.PCIE_TOP_PIPERX4DATA1.PCIE_IMUX36_R_1 always
PCIE_TOP.PCIE_TOP_PIPERX4DATA2.PCIE_IMUX33_R_1 always
PCIE_TOP.PCIE_TOP_PIPERX4DATA3.PCIE_IMUX32_R_1 always
PCIE_TOP.PCIE_TOP_PIPERX4DATA4.PCIE_IMUX39_R_0 always
PCIE_TOP.PCIE_TOP_PIPERX4DATA5.PCIE_IMUX38_R_0 always
PCIE_TOP.PCIE_TOP_PIPERX4DATA6.PCIE_IMUX35_R_0 always
PCIE_TOP.PCIE_TOP_PIPERX4DATA7.PCIE_IMUX34_R_0 always
PCIE_TOP.PCIE_TOP_PL2DIRECTEDLSTATE0.PCIE_IMUX3_L_4 always
PCIE_TOP.PCIE_TOP_PL2DIRECTEDLSTATE1.PCIE_IMUX8_R_4 always
PCIE_TOP.PCIE_TOP_PL2DIRECTEDLSTATE2.PCIE_IMUX9_R_4 always
PCIE_TOP.PCIE_TOP_PL2DIRECTEDLSTATE3.PCIE_IMUX10_R_4 always
PCIE_TOP.PCIE_TOP_PL2DIRECTEDLSTATE4.PCIE_IMUX11_R_4 always
PCIE_TOP.PCIE_TOP_TRNTD8.PCIE_IMUX8_R_0 always
PCIE_TOP.PCIE_TOP_TRNTD9.PCIE_IMUX9_R_0 always
PCIE_TOP.PCIE_TOP_TRNTD10.PCIE_IMUX10_R_0 always
PCIE_TOP.PCIE_TOP_TRNTD11.PCIE_IMUX11_R_0 always
PCIE_TOP.PCIE_TOP_TRNTD12.PCIE_IMUX8_R_1 always
PCIE_TOP.PCIE_TOP_TRNTD13.PCIE_IMUX9_R_1 always
PCIE_TOP.PCIE_TOP_TRNTD14.PCIE_IMUX10_R_1 always
PCIE_TOP.PCIE_TOP_TRNTD15.PCIE_IMUX11_R_1 always
PCIE_TOP.PCIE_TOP_TRNTD16.PCIE_IMUX8_R_2 always
PCIE_TOP.PCIE_TOP_TRNTD17.PCIE_IMUX9_R_2 always
PCIE_TOP.PCIE_TOP_TRNTD18.PCIE_IMUX10_R_2 always
PCIE_TOP.PCIE_TOP_TRNTD19.PCIE_IMUX11_R_2 always
PCIE_TOP.PCIE_TOP_TRNTD20.PCIE_IMUX8_R_3 always
PCIE_TOP.PCIE_TOP_TRNTD21.PCIE_IMUX9_R_3 always
PCIE_TOP.PCIE_TOP_TRNTD22.PCIE_IMUX10_R_3 always
PCIE_TOP.PCIE_TOP_TRNTD23.PCIE_IMUX11_R_3 always
PCIE_TOP.PCIE_TOP_TRNTD24.PCIE_IMUX4_R_4 always
PCIE_TOP.PCIE_TOP_TRNTD25.PCIE_IMUX5_R_4 always
PCIE_TOP.PCIE_TOP_TRNTD26.PCIE_IMUX6_R_4 always
PCIE_TOP.PCIE_TOP_TRNTD27.PCIE_IMUX7_R_4 always
PCIE_TOP.PCIE_TOP_TRNTD28.PCIE_IMUX12_R_3 always
PCIE_TOP.PCIE_TOP_TRNTD29.PCIE_IMUX13_R_3 always
PCIE_TOP.PCIE_TOP_TRNTD30.PCIE_IMUX14_R_3 always
PCIE_TOP.PCIE_TOP_TRNTD31.PCIE_IMUX15_R_3 always
PCIE_TOP.PCIE_TOP_TRNTD32.PCIE_IMUX12_R_2 always
PCIE_TOP.PCIE_TOP_TRNTD33.PCIE_IMUX13_R_2 always
PCIE_TOP.PCIE_TOP_TRNTD34.PCIE_IMUX14_R_2 always
PCIE_TOP.PCIE_TOP_TRNTD35.PCIE_IMUX15_R_2 always
PCIE_TOP.PCIE_TOP_TRNTD36.PCIE_IMUX12_R_1 always
PCIE_TOP.PCIE_TOP_TRNTD37.PCIE_IMUX13_R_1 always
PCIE_TOP.PCIE_TOP_TRNTD38.PCIE_IMUX14_R_1 always
PCIE_TOP.PCIE_TOP_TRNTD39.PCIE_IMUX15_R_1 always
PCIE_TOP.PCIE_TOP_TRNTD40.PCIE_IMUX12_R_0 always
PCIE_TOP.PCIE_TOP_TRNTD41.PCIE_IMUX13_R_0 always
PCIE_TOP.PCIE_TOP_TRNTDLLPDATA19.PCIE_IMUX0_L_0 always
PCIE_TOP.PCIE_TOP_TRNTDLLPDATA20.PCIE_IMUX1_L_0 always
PCIE_TOP.PCIE_TOP_TRNTDLLPDATA21.PCIE_IMUX2_L_0 always
PCIE_TOP.PCIE_TOP_TRNTDLLPDATA22.PCIE_IMUX3_L_0 always
PCIE_TOP.PCIE_TOP_TRNTDLLPDATA23.PCIE_IMUX0_L_1 always
PCIE_TOP.PCIE_TOP_TRNTDLLPDATA24.PCIE_IMUX1_L_1 always
PCIE_TOP.PCIE_TOP_TRNTDLLPDATA25.PCIE_IMUX2_L_1 always
PCIE_TOP.PCIE_TOP_TRNTDLLPDATA26.PCIE_IMUX3_L_1 always
PCIE_TOP.PCIE_TOP_TRNTDLLPDATA27.PCIE_IMUX0_L_2 always
PCIE_TOP.PCIE_TOP_TRNTDLLPDATA28.PCIE_IMUX1_L_2 always
PCIE_TOP.PCIE_TOP_TRNTDLLPDATA29.PCIE_IMUX2_L_2 always
PCIE_TOP.PCIE_TOP_TRNTDLLPDATA30.PCIE_IMUX3_L_2 always
PCIE_TOP.PCIE_TOP_TRNTDLLPDATA31.PCIE_IMUX0_L_3 always

10
zynq7/ppips_riob18.db Normal file
View File

@ -0,0 +1,10 @@
RIOB18.IOB_DIFFI_IN0.IOB_PADOUT1 always
RIOB18.IOB_DIFFI_IN1.IOB_PADOUT0 always
RIOB18.IOB_DIFFO_IN1.IOB_DIFFO_OUT0 always
RIOB18.IOB_O_IN1.IOB_O_OUT0 always
RIOB18.IOB_O_OUT0.IOB_O0 hint
RIOB18.IOB_T_IN1.IOB_T_OUT0 always
RIOB18.IOB_T_OUT0.IOB_T0 hint
RIOB18.IOB_PADOUT1.IOB_DIFFO_IN1 hint
RIOB18.RIOB_MONITOR_N.IOB_PADOUT1 always
RIOB18.RIOB_MONITOR_P.IOB_PADOUT0 always

View File

209
zynq7/ppips_rioi.db Normal file
View File

@ -0,0 +1,209 @@
RIOI.IOI_IDELAYCTRL_RST.IOI_IMUX24_0 always
RIOI.IOI_IMUX_RC2.IOI_BYP4_1 always
RIOI.IOI_IMUX_RC3.IOI_BYP3_1 always
RIOI.IOI_LOGIC_OUTS0_0.IOI_ILOGIC1_Q1 always
RIOI.IOI_LOGIC_OUTS0_1.IOI_ILOGIC0_Q1 always
RIOI.IOI_LOGIC_OUTS1_0.IOI_IDELAY1_CNTVALUEOUT1 always
RIOI.IOI_LOGIC_OUTS1_1.IOI_IDELAY0_CNTVALUEOUT1 always
RIOI.IOI_LOGIC_OUTS2_0.RIOI_OLOGIC1_TFB_LOCAL always
RIOI.IOI_LOGIC_OUTS2_1.RIOI_OLOGIC0_TFB_LOCAL always
RIOI.IOI_LOGIC_OUTS3_0.IOI_ILOGIC1_Q6 always
RIOI.IOI_LOGIC_OUTS3_1.IOI_ILOGIC0_Q6 always
RIOI.IOI_LOGIC_OUTS4_0.IOI_ODELAY1_CNTVALUEOUT1 always
RIOI.IOI_LOGIC_OUTS4_1.IOI_ODELAY0_CNTVALUEOUT1 always
RIOI.IOI_LOGIC_OUTS5_0.IOI_OLOGIC1_IOCLKGLITCH always
RIOI.IOI_LOGIC_OUTS5_1.IOI_OLOGIC0_IOCLKGLITCH always
RIOI.IOI_LOGIC_OUTS6_0.IOI_ODELAY1_CNTVALUEOUT2 always
RIOI.IOI_LOGIC_OUTS6_1.IOI_ODELAY0_CNTVALUEOUT2 always
RIOI.IOI_LOGIC_OUTS7_0.IOI_ILOGIC1_Q7 always
RIOI.IOI_LOGIC_OUTS7_1.IOI_ILOGIC0_Q7 always
RIOI.IOI_LOGIC_OUTS8_0.IOI_ILOGIC1_Q8 always
RIOI.IOI_LOGIC_OUTS8_1.IOI_ILOGIC0_Q8 always
RIOI.IOI_LOGIC_OUTS9_0.IOI_ILOGIC1_Q3 always
RIOI.IOI_LOGIC_OUTS9_1.IOI_ILOGIC0_Q3 always
RIOI.IOI_LOGIC_OUTS10_0.IOI_ILOGIC1_Q4 always
RIOI.IOI_LOGIC_OUTS10_1.IOI_ILOGIC0_Q4 always
RIOI.IOI_LOGIC_OUTS11_0.IOI_IDELAY1_CNTVALUEOUT4 always
RIOI.IOI_LOGIC_OUTS11_1.IOI_IDELAY0_CNTVALUEOUT4 always
RIOI.IOI_LOGIC_OUTS12_0.IOI_ODELAY1_CNTVALUEOUT0 always
RIOI.IOI_LOGIC_OUTS12_1.IOI_ODELAY0_CNTVALUEOUT0 always
RIOI.IOI_LOGIC_OUTS13_0.IOI_IDELAYCTRL_DNPULSEOUT always
RIOI.IOI_LOGIC_OUTS13_1.IOI_IDELAYCTRL_OUTN1 always
RIOI.IOI_LOGIC_OUTS14_0.IOI_ILOGIC1_Q5 always
RIOI.IOI_LOGIC_OUTS14_1.IOI_ILOGIC0_Q5 always
RIOI.IOI_LOGIC_OUTS15_0.IOI_IDELAY1_CNTVALUEOUT3 always
RIOI.IOI_LOGIC_OUTS15_1.IOI_IDELAY0_CNTVALUEOUT3 always
RIOI.IOI_LOGIC_OUTS16_0.IOI_IDELAYCTRL_UPPULSEOUT always
RIOI.IOI_LOGIC_OUTS16_1.IOI_IDELAYCTRL_OUTN65 always
RIOI.IOI_LOGIC_OUTS17_0.IOI_ODELAY1_CNTVALUEOUT3 always
RIOI.IOI_LOGIC_OUTS17_1.IOI_ODELAY0_CNTVALUEOUT3 always
RIOI.IOI_LOGIC_OUTS18_0.IOI_ILOGIC1_O always
RIOI.IOI_LOGIC_OUTS18_1.IOI_ILOGIC0_O always
RIOI.IOI_LOGIC_OUTS19_0.IOI_IDELAY1_CNTVALUEOUT2 always
RIOI.IOI_LOGIC_OUTS19_1.IOI_IDELAY0_CNTVALUEOUT2 always
RIOI.IOI_LOGIC_OUTS20_0.IOI_IDELAY1_CNTVALUEOUT0 always
RIOI.IOI_LOGIC_OUTS20_1.IOI_IDELAY0_CNTVALUEOUT0 always
RIOI.IOI_LOGIC_OUTS21_0.IOI_ODELAY1_CNTVALUEOUT4 always
RIOI.IOI_LOGIC_OUTS21_1.IOI_ODELAY0_CNTVALUEOUT4 always
RIOI.IOI_LOGIC_OUTS22_1.IOI_IDELAYCTRL_RDY always
RIOI.IOI_LOGIC_OUTS23_0.IOI_ILOGIC1_Q2 always
RIOI.IOI_LOGIC_OUTS23_1.IOI_ILOGIC0_Q2 always
RIOI.IOI_RCLK_DIV_CE0.IOI_BYP3_1 always
RIOI.IOI_RCLK_DIV_CE1.IOI_BYP4_1 always
RIOI.IOI_RCLK_DIV_CE2_1.IOI_BYP4_1 always
RIOI.IOI_RCLK_DIV_CE3_1.IOI_BYP3_1 always
RIOI.IOI_RCLK_DIV_CLR0_1.IOI_BYP3_0 always
RIOI.IOI_RCLK_DIV_CLR1_1.IOI_BYP4_0 always
RIOI.IOI_RCLK_DIV_CLR2.IOI_BYP4_0 always
RIOI.IOI_RCLK_DIV_CLR3.IOI_BYP3_0 always
RIOI.IOI_IDELAY0_C.IOI_CLK1_1 always
RIOI.IOI_IDELAY0_CE.IOI_IMUX32_1 always
RIOI.IOI_IDELAY0_CINVCTRL.IOI_BYP6_1 always
RIOI.IOI_IDELAY0_DATAIN.IOI_IMUX25_1 always
RIOI.IOI_IDELAY0_INC.IOI_IMUX26_1 always
RIOI.IOI_IDELAY0_LD.IOI_IMUX30_1 always
RIOI.IOI_IDELAY0_LDPIPEEN.IOI_IMUX33_1 always
RIOI.IOI_IDELAY0_REGRST.IOI_IMUX12_1 always
RIOI.IOI_IDELAY0_CNTVALUEIN0.IOI_IMUX41_1 always
RIOI.IOI_IDELAY0_CNTVALUEIN1.IOI_IMUX36_1 always
RIOI.IOI_IDELAY0_CNTVALUEIN2.IOI_IMUX35_1 always
RIOI.IOI_IDELAY0_CNTVALUEIN3.IOI_IMUX38_1 always
RIOI.IOI_IDELAY0_CNTVALUEIN4.IOI_IMUX39_1 always
RIOI.IOI_IDELAY1_C.IOI_CLK1_0 always
RIOI.IOI_IDELAY1_CE.IOI_IMUX32_0 always
RIOI.IOI_IDELAY1_CINVCTRL.IOI_BYP6_0 always
RIOI.IOI_IDELAY1_DATAIN.IOI_IMUX25_0 always
RIOI.IOI_IDELAY1_INC.IOI_IMUX26_0 always
RIOI.IOI_IDELAY1_LD.IOI_IMUX30_0 always
RIOI.IOI_IDELAY1_LDPIPEEN.IOI_IMUX33_0 always
RIOI.IOI_IDELAY1_REGRST.IOI_IMUX12_0 always
RIOI.IOI_IDELAY1_CNTVALUEIN0.IOI_IMUX41_0 always
RIOI.IOI_IDELAY1_CNTVALUEIN1.IOI_IMUX36_0 always
RIOI.IOI_IDELAY1_CNTVALUEIN2.IOI_IMUX35_0 always
RIOI.IOI_IDELAY1_CNTVALUEIN3.IOI_IMUX38_0 always
RIOI.IOI_IDELAY1_CNTVALUEIN4.IOI_IMUX39_0 always
RIOI.IOI_ILOGIC0_BITSLIP.IOI_IMUX0_1 always
RIOI.IOI_ILOGIC0_CLKDIV.IOI_CLK0_1 always
RIOI.IOI_ILOGIC0_DYNCLKDIVPSEL.IOI_IMUX10_1 always
RIOI.IOI_ILOGIC0_DYNCLKDIVSEL.IOI_IMUX4_1 always
RIOI.IOI_ILOGIC0_DYNCLKSEL.IOI_IMUX37_1 always
RIOI.IOI_ILOGIC0_OCLK.IOI_OCLK_0 always
RIOI.IOI_ILOGIC0_SR.IOI_CTRL1_1 always
RIOI.IOI_ILOGIC0_CE1.IOI_IMUX5_1 always
RIOI.IOI_ILOGIC0_CE2.IOI_IMUX14_1 always
RIOI.IOI_ILOGIC1_BITSLIP.IOI_IMUX0_0 always
RIOI.IOI_ILOGIC1_CLKDIV.IOI_CLK0_0 always
RIOI.IOI_ILOGIC1_DYNCLKDIVPSEL.IOI_IMUX10_0 always
RIOI.IOI_ILOGIC1_DYNCLKDIVSEL.IOI_IMUX4_0 always
RIOI.IOI_ILOGIC1_DYNCLKSEL.IOI_IMUX37_0 always
RIOI.IOI_ILOGIC1_OCLK.IOI_OCLK_1 always
RIOI.IOI_ILOGIC1_SR.IOI_CTRL1_0 always
RIOI.IOI_ILOGIC1_CE1.IOI_IMUX5_0 always
RIOI.IOI_ILOGIC1_CE2.IOI_IMUX14_0 always
RIOI.IOI_ODELAY0_C.IOI_CLK1_1 always
RIOI.IOI_ODELAY0_CE.IOI_IMUX2_1 always
RIOI.IOI_ODELAY0_CINVCTRL.IOI_BYP2_1 always
RIOI.IOI_ODELAY0_CLKIN.IOI_OCLK_0 always
RIOI.IOI_ODELAY0_INC.IOI_IMUX3_1 always
RIOI.IOI_ODELAY0_LD.IOI_IMUX28_1 always
RIOI.IOI_ODELAY0_LDPIPEEN.IOI_IMUX27_1 always
RIOI.IOI_ODELAY0_REGRST.IOI_IMUX11_1 always
RIOI.IOI_ODELAY0_CNTVALUEIN0.IOI_IMUX23_1 always
RIOI.IOI_ODELAY0_CNTVALUEIN1.IOI_IMUX16_1 always
RIOI.IOI_ODELAY0_CNTVALUEIN2.IOI_IMUX17_1 always
RIOI.IOI_ODELAY0_CNTVALUEIN3.IOI_IMUX19_1 always
RIOI.IOI_ODELAY0_CNTVALUEIN4.IOI_IMUX18_1 always
RIOI.IOI_ODELAY1_C.IOI_CLK1_0 always
RIOI.IOI_ODELAY1_CE.IOI_IMUX2_0 always
RIOI.IOI_ODELAY1_CINVCTRL.IOI_BYP2_0 always
RIOI.IOI_ODELAY1_CLKIN.IOI_OCLK_1 always
RIOI.IOI_ODELAY1_INC.IOI_IMUX3_0 always
RIOI.IOI_ODELAY1_LD.IOI_IMUX28_0 always
RIOI.IOI_ODELAY1_LDPIPEEN.IOI_IMUX27_0 always
RIOI.IOI_ODELAY1_REGRST.IOI_IMUX11_0 always
RIOI.IOI_ODELAY1_CNTVALUEIN0.IOI_IMUX23_0 always
RIOI.IOI_ODELAY1_CNTVALUEIN1.IOI_IMUX16_0 always
RIOI.IOI_ODELAY1_CNTVALUEIN2.IOI_IMUX17_0 always
RIOI.IOI_ODELAY1_CNTVALUEIN3.IOI_IMUX19_0 always
RIOI.IOI_ODELAY1_CNTVALUEIN4.IOI_IMUX18_0 always
RIOI.IOI_OLOGIC0_CLK.IOI_OCLK_0 always
RIOI.IOI_OLOGIC0_OCE.IOI_IMUX29_1 always
RIOI.IOI_OLOGIC0_SR.IOI_CTRL0_1 always
RIOI.IOI_OLOGIC0_TBYTEIN.IOI_TBYTEIN always
RIOI.IOI_OLOGIC0_TCE.IOI_IMUX1_1 always
RIOI.IOI_OLOGIC0_D1.IOI_IMUX34_1 always
RIOI.IOI_OLOGIC0_D2.IOI_IMUX40_1 always
RIOI.IOI_OLOGIC0_D3.IOI_IMUX44_1 always
RIOI.IOI_OLOGIC0_D4.IOI_IMUX42_1 always
RIOI.IOI_OLOGIC0_D5.IOI_IMUX43_1 always
RIOI.IOI_OLOGIC0_D6.IOI_IMUX45_1 always
RIOI.IOI_OLOGIC0_D7.IOI_IMUX46_1 always
RIOI.IOI_OLOGIC0_D8.IOI_IMUX47_1 always
RIOI.IOI_OLOGIC0_T1.IOI_IMUX15_1 always
RIOI.IOI_OLOGIC0_T2.IOI_IMUX7_1 always
RIOI.IOI_OLOGIC0_T3.IOI_IMUX13_1 always
RIOI.IOI_OLOGIC0_T4.IOI_IMUX21_1 always
RIOI.IOI_OLOGIC1_CLK.IOI_OCLK_1 always
RIOI.IOI_OLOGIC1_OCE.IOI_IMUX29_0 always
RIOI.IOI_OLOGIC1_SR.IOI_CTRL0_0 always
RIOI.IOI_OLOGIC1_TBYTEIN.IOI_TBYTEIN always
RIOI.IOI_OLOGIC1_TCE.IOI_IMUX1_0 always
RIOI.IOI_OLOGIC1_D1.IOI_IMUX34_0 always
RIOI.IOI_OLOGIC1_D2.IOI_IMUX40_0 always
RIOI.IOI_OLOGIC1_D3.IOI_IMUX44_0 always
RIOI.IOI_OLOGIC1_D4.IOI_IMUX42_0 always
RIOI.IOI_OLOGIC1_D5.IOI_IMUX43_0 always
RIOI.IOI_OLOGIC1_D6.IOI_IMUX45_0 always
RIOI.IOI_OLOGIC1_D7.IOI_IMUX46_0 always
RIOI.IOI_OLOGIC1_D8.IOI_IMUX47_0 always
RIOI.IOI_OLOGIC1_T1.IOI_IMUX15_0 always
RIOI.IOI_OLOGIC1_T2.IOI_IMUX7_0 always
RIOI.IOI_OLOGIC1_T3.IOI_IMUX13_0 always
RIOI.IOI_OLOGIC1_T4.IOI_IMUX21_0 always
RIOI.RIOI_DCI_T_TERM0.IOI_IMUX6_1 always
RIOI.RIOI_DCI_T_TERM1.IOI_IMUX6_0 always
RIOI.RIOI_I2GCLK_TOP0.IOI_ILOGIC0_O always
RIOI.RIOI_IBUF_DISABLE0.IOI_IMUX9_1 always
RIOI.RIOI_IBUF_DISABLE1.IOI_IMUX9_0 always
RIOI.RIOI_I0.RIOI_IBUF0 always
RIOI.RIOI_I1.RIOI_IBUF1 always
RIOI.RIOI_IDELAY0_IDATAIN.RIOI_I0 always
RIOI.RIOI_IDELAY0_IFDLY0.IOI_FAN4_1 always
RIOI.RIOI_IDELAY0_IFDLY1.IOI_FAN5_1 always
RIOI.RIOI_IDELAY0_IFDLY2.IOI_BYP7_1 always
RIOI.RIOI_IDELAY1_IDATAIN.RIOI_I1 always
RIOI.RIOI_IDELAY1_IFDLY0.IOI_FAN4_0 always
RIOI.RIOI_IDELAY1_IFDLY1.IOI_FAN5_0 always
RIOI.RIOI_IDELAY1_IFDLY2.IOI_BYP7_0 always
RIOI.RIOI_ILOGIC0_D.RIOI_I0 always
RIOI.RIOI_ILOGIC0_DDLY.RIOI_IDELAY0_DATAOUT always
RIOI.RIOI_ILOGIC0_OFB.RIOI_OLOGIC0_OFB always
RIOI.RIOI_ILOGIC0_TFB.RIOI_OLOGIC0_TFB_LOCAL always
RIOI.RIOI_ILOGIC1_D.RIOI_I1 always
RIOI.RIOI_ILOGIC1_DDLY.RIOI_IDELAY1_DATAOUT always
RIOI.RIOI_ILOGIC1_OFB.RIOI_OLOGIC1_OFB always
RIOI.RIOI_ILOGIC1_TFB.RIOI_OLOGIC1_TFB_LOCAL always
RIOI.RIOI_ISIN11.RIOI_ISOUT10 always
RIOI.RIOI_ISIN21.RIOI_ISOUT20 always
RIOI.RIOI_O0.RIOI_ODELAY0_DATAOUT always
RIOI.RIOI_O0.RIOI_OLOGIC0_OQ always
RIOI.RIOI_O1.RIOI_ODELAY1_DATAOUT always
RIOI.RIOI_O1.RIOI_OLOGIC1_OQ always
RIOI.RIOI_ODELAY0_ODATAIN.RIOI_OLOGIC0_OFB always
RIOI.RIOI_ODELAY0_OFDLY0.IOI_BYP0_1 always
RIOI.RIOI_ODELAY0_OFDLY1.IOI_BYP1_1 always
RIOI.RIOI_ODELAY0_OFDLY2.IOI_BYP5_1 always
RIOI.RIOI_ODELAY1_ODATAIN.RIOI_OLOGIC1_OFB always
RIOI.RIOI_ODELAY1_OFDLY0.IOI_BYP0_0 always
RIOI.RIOI_ODELAY1_OFDLY1.IOI_BYP1_0 always
RIOI.RIOI_ODELAY1_OFDLY2.IOI_BYP5_0 always
RIOI.RIOI_OLOGIC0_OQ.IOI_OLOGIC0_D1 always
RIOI.RIOI_OLOGIC0_TFB_LOCAL.RIOI_OLOGIC0_TFB always
RIOI.RIOI_OLOGIC0_TQ.IOI_OLOGIC0_T1 always
RIOI.RIOI_OLOGIC1_OQ.IOI_OLOGIC1_D1 always
RIOI.RIOI_OLOGIC1_TFB_LOCAL.RIOI_OLOGIC1_TFB always
RIOI.RIOI_OLOGIC1_TQ.IOI_OLOGIC1_T1 always
RIOI.RIOI_OSIN10.RIOI_OSOUT11 always
RIOI.RIOI_OSIN20.RIOI_OSOUT21 always
RIOI.RIOI_T0.RIOI_OLOGIC0_TQ always
RIOI.RIOI_T1.RIOI_OLOGIC1_TQ always

94
zynq7/ppips_rioi_sing.db Normal file
View File

@ -0,0 +1,94 @@
RIOI_SING.IOI_LOGIC_OUTS0_0.IOI_ILOGIC0_Q1 always
RIOI_SING.IOI_LOGIC_OUTS1_0.IOI_IDELAY0_CNTVALUEOUT1 always
RIOI_SING.IOI_LOGIC_OUTS2_0.RIOI_OLOGIC0_TFB_LOCAL always
RIOI_SING.IOI_LOGIC_OUTS3_0.IOI_ILOGIC0_Q6 always
RIOI_SING.IOI_LOGIC_OUTS4_0.IOI_ODELAY0_CNTVALUEOUT1 always
RIOI_SING.IOI_LOGIC_OUTS5_0.IOI_OLOGIC0_IOCLKGLITCH always
RIOI_SING.IOI_LOGIC_OUTS6_0.IOI_ODELAY0_CNTVALUEOUT2 always
RIOI_SING.IOI_LOGIC_OUTS7_0.IOI_ILOGIC0_Q7 always
RIOI_SING.IOI_LOGIC_OUTS8_0.IOI_ILOGIC0_Q8 always
RIOI_SING.IOI_LOGIC_OUTS9_0.IOI_ILOGIC0_Q3 always
RIOI_SING.IOI_LOGIC_OUTS10_0.IOI_ILOGIC0_Q4 always
RIOI_SING.IOI_LOGIC_OUTS11_0.IOI_IDELAY0_CNTVALUEOUT4 always
RIOI_SING.IOI_LOGIC_OUTS12_0.IOI_ODELAY0_CNTVALUEOUT0 always
RIOI_SING.IOI_LOGIC_OUTS14_0.IOI_ILOGIC0_Q5 always
RIOI_SING.IOI_LOGIC_OUTS15_0.IOI_IDELAY0_CNTVALUEOUT3 always
RIOI_SING.IOI_LOGIC_OUTS17_0.IOI_ODELAY0_CNTVALUEOUT3 always
RIOI_SING.IOI_LOGIC_OUTS18_0.IOI_ILOGIC0_O always
RIOI_SING.IOI_LOGIC_OUTS19_0.IOI_IDELAY0_CNTVALUEOUT2 always
RIOI_SING.IOI_LOGIC_OUTS20_0.IOI_IDELAY0_CNTVALUEOUT0 always
RIOI_SING.IOI_LOGIC_OUTS21_0.IOI_ODELAY0_CNTVALUEOUT4 always
RIOI_SING.IOI_LOGIC_OUTS23_0.IOI_ILOGIC0_Q2 always
RIOI_SING.IOI_IDELAY0_C.IOI_CLK1_0 always
RIOI_SING.IOI_IDELAY0_CE.IOI_IMUX32_0 always
RIOI_SING.IOI_IDELAY0_CINVCTRL.IOI_BYP6_0 always
RIOI_SING.IOI_IDELAY0_DATAIN.IOI_IMUX25_0 always
RIOI_SING.IOI_IDELAY0_INC.IOI_IMUX26_0 always
RIOI_SING.IOI_IDELAY0_LD.IOI_IMUX30_0 always
RIOI_SING.IOI_IDELAY0_LDPIPEEN.IOI_IMUX33_0 always
RIOI_SING.IOI_IDELAY0_REGRST.IOI_IMUX12_0 always
RIOI_SING.IOI_IDELAY0_CNTVALUEIN0.IOI_IMUX41_0 always
RIOI_SING.IOI_IDELAY0_CNTVALUEIN1.IOI_IMUX36_0 always
RIOI_SING.IOI_IDELAY0_CNTVALUEIN2.IOI_IMUX35_0 always
RIOI_SING.IOI_IDELAY0_CNTVALUEIN3.IOI_IMUX38_0 always
RIOI_SING.IOI_IDELAY0_CNTVALUEIN4.IOI_IMUX39_0 always
RIOI_SING.IOI_ILOGIC0_BITSLIP.IOI_IMUX0_0 always
RIOI_SING.IOI_ILOGIC0_CLKDIV.IOI_CLK0_0 always
RIOI_SING.IOI_ILOGIC0_DYNCLKDIVPSEL.IOI_IMUX10_0 always
RIOI_SING.IOI_ILOGIC0_DYNCLKDIVSEL.IOI_IMUX4_0 always
RIOI_SING.IOI_ILOGIC0_DYNCLKSEL.IOI_IMUX37_0 always
RIOI_SING.IOI_ILOGIC0_OCLK.IOI_OCLK_0 always
RIOI_SING.IOI_ILOGIC0_SR.IOI_CTRL1_0 always
RIOI_SING.IOI_ILOGIC0_CE1.IOI_IMUX5_0 always
RIOI_SING.IOI_ILOGIC0_CE2.IOI_IMUX14_0 always
RIOI_SING.IOI_ODELAY0_C.IOI_CLK1_0 always
RIOI_SING.IOI_ODELAY0_CE.IOI_IMUX2_0 always
RIOI_SING.IOI_ODELAY0_CINVCTRL.IOI_BYP2_0 always
RIOI_SING.IOI_ODELAY0_CLKIN.IOI_OCLK_0 always
RIOI_SING.IOI_ODELAY0_INC.IOI_IMUX3_0 always
RIOI_SING.IOI_ODELAY0_LD.IOI_IMUX28_0 always
RIOI_SING.IOI_ODELAY0_LDPIPEEN.IOI_IMUX27_0 always
RIOI_SING.IOI_ODELAY0_REGRST.IOI_IMUX11_0 always
RIOI_SING.IOI_ODELAY0_CNTVALUEIN0.IOI_IMUX23_0 always
RIOI_SING.IOI_ODELAY0_CNTVALUEIN1.IOI_IMUX16_0 always
RIOI_SING.IOI_ODELAY0_CNTVALUEIN2.IOI_IMUX17_0 always
RIOI_SING.IOI_ODELAY0_CNTVALUEIN3.IOI_IMUX19_0 always
RIOI_SING.IOI_ODELAY0_CNTVALUEIN4.IOI_IMUX18_0 always
RIOI_SING.IOI_OLOGIC0_CLK.IOI_OCLK_0 always
RIOI_SING.IOI_OLOGIC0_OCE.IOI_IMUX29_0 always
RIOI_SING.IOI_OLOGIC0_SR.IOI_CTRL0_0 always
RIOI_SING.IOI_OLOGIC0_TBYTEIN.IOI_SING_TBYTEIN always
RIOI_SING.IOI_OLOGIC0_TCE.IOI_IMUX1_0 always
RIOI_SING.IOI_OLOGIC0_D1.IOI_IMUX34_0 always
RIOI_SING.IOI_OLOGIC0_D2.IOI_IMUX40_0 always
RIOI_SING.IOI_OLOGIC0_D3.IOI_IMUX44_0 always
RIOI_SING.IOI_OLOGIC0_D4.IOI_IMUX42_0 always
RIOI_SING.IOI_OLOGIC0_D5.IOI_IMUX43_0 always
RIOI_SING.IOI_OLOGIC0_D6.IOI_IMUX45_0 always
RIOI_SING.IOI_OLOGIC0_D7.IOI_IMUX46_0 always
RIOI_SING.IOI_OLOGIC0_D8.IOI_IMUX47_0 always
RIOI_SING.IOI_OLOGIC0_T1.IOI_IMUX15_0 always
RIOI_SING.IOI_OLOGIC0_T2.IOI_IMUX7_0 always
RIOI_SING.IOI_OLOGIC0_T3.IOI_IMUX13_0 always
RIOI_SING.IOI_OLOGIC0_T4.IOI_IMUX21_0 always
RIOI_SING.RIOI_DCI_T_TERM0.IOI_IMUX6_0 always
RIOI_SING.RIOI_IBUF_DISABLE0.IOI_IMUX9_0 always
RIOI_SING.RIOI_I0.RIOI_IBUF0 always
RIOI_SING.RIOI_IDELAY0_IDATAIN.RIOI_I0 always
RIOI_SING.RIOI_IDELAY0_IFDLY0.IOI_FAN4_0 always
RIOI_SING.RIOI_IDELAY0_IFDLY1.IOI_FAN5_0 always
RIOI_SING.RIOI_IDELAY0_IFDLY2.IOI_BYP7_0 always
RIOI_SING.RIOI_ILOGIC0_D.RIOI_I0 always
RIOI_SING.RIOI_ILOGIC0_DDLY.RIOI_IDELAY0_DATAOUT always
RIOI_SING.RIOI_ILOGIC0_OFB.RIOI_OLOGIC0_OFB always
RIOI_SING.RIOI_ILOGIC0_TFB.RIOI_OLOGIC0_TFB_LOCAL always
RIOI_SING.RIOI_O0.RIOI_ODELAY0_DATAOUT always
RIOI_SING.RIOI_O0.RIOI_OLOGIC0_OQ always
RIOI_SING.RIOI_ODELAY0_ODATAIN.RIOI_OLOGIC0_OFB always
RIOI_SING.RIOI_ODELAY0_OFDLY0.IOI_BYP0_0 always
RIOI_SING.RIOI_ODELAY0_OFDLY1.IOI_BYP1_0 always
RIOI_SING.RIOI_ODELAY0_OFDLY2.IOI_BYP5_0 always
RIOI_SING.RIOI_OLOGIC0_OQ.IOI_OLOGIC0_D1 always
RIOI_SING.RIOI_OLOGIC0_TFB_LOCAL.RIOI_OLOGIC0_TFB always
RIOI_SING.RIOI_OLOGIC0_TQ.IOI_OLOGIC0_T1 always
RIOI_SING.RIOI_T0.RIOI_OLOGIC0_TQ always

View File

@ -0,0 +1,202 @@
RIOI_TBYTESRC.IOI_LOGIC_OUTS0_0.IOI_ILOGIC1_Q1 always
RIOI_TBYTESRC.IOI_LOGIC_OUTS0_1.IOI_ILOGIC0_Q1 always
RIOI_TBYTESRC.IOI_LOGIC_OUTS1_0.IOI_IDELAY1_CNTVALUEOUT1 always
RIOI_TBYTESRC.IOI_LOGIC_OUTS1_1.IOI_IDELAY0_CNTVALUEOUT1 always
RIOI_TBYTESRC.IOI_LOGIC_OUTS2_0.RIOI_OLOGIC1_TFB_LOCAL always
RIOI_TBYTESRC.IOI_LOGIC_OUTS2_1.RIOI_OLOGIC0_TFB_LOCAL always
RIOI_TBYTESRC.IOI_LOGIC_OUTS3_0.IOI_ILOGIC1_Q6 always
RIOI_TBYTESRC.IOI_LOGIC_OUTS3_1.IOI_ILOGIC0_Q6 always
RIOI_TBYTESRC.IOI_LOGIC_OUTS4_0.IOI_ODELAY1_CNTVALUEOUT1 always
RIOI_TBYTESRC.IOI_LOGIC_OUTS4_1.IOI_ODELAY0_CNTVALUEOUT1 always
RIOI_TBYTESRC.IOI_LOGIC_OUTS5_0.IOI_OLOGIC1_IOCLKGLITCH always
RIOI_TBYTESRC.IOI_LOGIC_OUTS5_1.IOI_OLOGIC0_IOCLKGLITCH always
RIOI_TBYTESRC.IOI_LOGIC_OUTS6_0.IOI_ODELAY1_CNTVALUEOUT2 always
RIOI_TBYTESRC.IOI_LOGIC_OUTS6_1.IOI_ODELAY0_CNTVALUEOUT2 always
RIOI_TBYTESRC.IOI_LOGIC_OUTS7_0.IOI_ILOGIC1_Q7 always
RIOI_TBYTESRC.IOI_LOGIC_OUTS7_1.IOI_ILOGIC0_Q7 always
RIOI_TBYTESRC.IOI_LOGIC_OUTS8_0.IOI_ILOGIC1_Q8 always
RIOI_TBYTESRC.IOI_LOGIC_OUTS8_1.IOI_ILOGIC0_Q8 always
RIOI_TBYTESRC.IOI_LOGIC_OUTS9_0.IOI_ILOGIC1_Q3 always
RIOI_TBYTESRC.IOI_LOGIC_OUTS9_1.IOI_ILOGIC0_Q3 always
RIOI_TBYTESRC.IOI_LOGIC_OUTS10_0.IOI_ILOGIC1_Q4 always
RIOI_TBYTESRC.IOI_LOGIC_OUTS10_1.IOI_ILOGIC0_Q4 always
RIOI_TBYTESRC.IOI_LOGIC_OUTS11_0.IOI_IDELAY1_CNTVALUEOUT4 always
RIOI_TBYTESRC.IOI_LOGIC_OUTS11_1.IOI_IDELAY0_CNTVALUEOUT4 always
RIOI_TBYTESRC.IOI_LOGIC_OUTS12_0.IOI_ODELAY1_CNTVALUEOUT0 always
RIOI_TBYTESRC.IOI_LOGIC_OUTS12_1.IOI_ODELAY0_CNTVALUEOUT0 always
RIOI_TBYTESRC.IOI_LOGIC_OUTS14_0.IOI_ILOGIC1_Q5 always
RIOI_TBYTESRC.IOI_LOGIC_OUTS14_1.IOI_ILOGIC0_Q5 always
RIOI_TBYTESRC.IOI_LOGIC_OUTS15_0.IOI_IDELAY1_CNTVALUEOUT3 always
RIOI_TBYTESRC.IOI_LOGIC_OUTS15_1.IOI_IDELAY0_CNTVALUEOUT3 always
RIOI_TBYTESRC.IOI_LOGIC_OUTS17_0.IOI_ODELAY1_CNTVALUEOUT3 always
RIOI_TBYTESRC.IOI_LOGIC_OUTS17_1.IOI_ODELAY0_CNTVALUEOUT3 always
RIOI_TBYTESRC.IOI_LOGIC_OUTS18_0.IOI_ILOGIC1_O always
RIOI_TBYTESRC.IOI_LOGIC_OUTS18_1.IOI_ILOGIC0_O always
RIOI_TBYTESRC.IOI_LOGIC_OUTS19_0.IOI_IDELAY1_CNTVALUEOUT2 always
RIOI_TBYTESRC.IOI_LOGIC_OUTS19_1.IOI_IDELAY0_CNTVALUEOUT2 always
RIOI_TBYTESRC.IOI_LOGIC_OUTS20_0.IOI_IDELAY1_CNTVALUEOUT0 always
RIOI_TBYTESRC.IOI_LOGIC_OUTS20_1.IOI_IDELAY0_CNTVALUEOUT0 always
RIOI_TBYTESRC.IOI_LOGIC_OUTS21_0.IOI_ODELAY1_CNTVALUEOUT4 always
RIOI_TBYTESRC.IOI_LOGIC_OUTS21_1.IOI_ODELAY0_CNTVALUEOUT4 always
RIOI_TBYTESRC.IOI_LOGIC_OUTS23_0.IOI_ILOGIC1_Q2 always
RIOI_TBYTESRC.IOI_LOGIC_OUTS23_1.IOI_ILOGIC0_Q2 always
RIOI_TBYTESRC.IOI_RCLK_DIV_CE0.IOI_BYP3_1 always
RIOI_TBYTESRC.IOI_RCLK_DIV_CE1.IOI_BYP4_1 always
RIOI_TBYTESRC.IOI_RCLK_DIV_CE2_1.IOI_BYP4_1 always
RIOI_TBYTESRC.IOI_RCLK_DIV_CE3_1.IOI_BYP3_1 always
RIOI_TBYTESRC.IOI_RCLK_DIV_CLR0_1.IOI_BYP3_0 always
RIOI_TBYTESRC.IOI_RCLK_DIV_CLR1_1.IOI_BYP4_0 always
RIOI_TBYTESRC.IOI_RCLK_DIV_CLR2.IOI_BYP4_0 always
RIOI_TBYTESRC.IOI_RCLK_DIV_CLR3.IOI_BYP3_0 always
RIOI_TBYTESRC.IOI_TBYTEIN.IOI_OLOGIC1_TBYTEOUT always
RIOI_TBYTESRC.IOI_IDELAY0_C.IOI_CLK1_1 always
RIOI_TBYTESRC.IOI_IDELAY0_CE.IOI_IMUX32_1 always
RIOI_TBYTESRC.IOI_IDELAY0_CINVCTRL.IOI_BYP6_1 always
RIOI_TBYTESRC.IOI_IDELAY0_DATAIN.IOI_IMUX25_1 always
RIOI_TBYTESRC.IOI_IDELAY0_INC.IOI_IMUX26_1 always
RIOI_TBYTESRC.IOI_IDELAY0_LD.IOI_IMUX30_1 always
RIOI_TBYTESRC.IOI_IDELAY0_LDPIPEEN.IOI_IMUX33_1 always
RIOI_TBYTESRC.IOI_IDELAY0_REGRST.IOI_IMUX12_1 always
RIOI_TBYTESRC.IOI_IDELAY0_CNTVALUEIN0.IOI_IMUX41_1 always
RIOI_TBYTESRC.IOI_IDELAY0_CNTVALUEIN1.IOI_IMUX36_1 always
RIOI_TBYTESRC.IOI_IDELAY0_CNTVALUEIN2.IOI_IMUX35_1 always
RIOI_TBYTESRC.IOI_IDELAY0_CNTVALUEIN3.IOI_IMUX38_1 always
RIOI_TBYTESRC.IOI_IDELAY0_CNTVALUEIN4.IOI_IMUX39_1 always
RIOI_TBYTESRC.IOI_IDELAY1_C.IOI_CLK1_0 always
RIOI_TBYTESRC.IOI_IDELAY1_CE.IOI_IMUX32_0 always
RIOI_TBYTESRC.IOI_IDELAY1_CINVCTRL.IOI_BYP6_0 always
RIOI_TBYTESRC.IOI_IDELAY1_DATAIN.IOI_IMUX25_0 always
RIOI_TBYTESRC.IOI_IDELAY1_INC.IOI_IMUX26_0 always
RIOI_TBYTESRC.IOI_IDELAY1_LD.IOI_IMUX30_0 always
RIOI_TBYTESRC.IOI_IDELAY1_LDPIPEEN.IOI_IMUX33_0 always
RIOI_TBYTESRC.IOI_IDELAY1_REGRST.IOI_IMUX12_0 always
RIOI_TBYTESRC.IOI_IDELAY1_CNTVALUEIN0.IOI_IMUX41_0 always
RIOI_TBYTESRC.IOI_IDELAY1_CNTVALUEIN1.IOI_IMUX36_0 always
RIOI_TBYTESRC.IOI_IDELAY1_CNTVALUEIN2.IOI_IMUX35_0 always
RIOI_TBYTESRC.IOI_IDELAY1_CNTVALUEIN3.IOI_IMUX38_0 always
RIOI_TBYTESRC.IOI_IDELAY1_CNTVALUEIN4.IOI_IMUX39_0 always
RIOI_TBYTESRC.IOI_ILOGIC0_BITSLIP.IOI_IMUX0_1 always
RIOI_TBYTESRC.IOI_ILOGIC0_CLKDIV.IOI_CLK0_1 always
RIOI_TBYTESRC.IOI_ILOGIC0_DYNCLKDIVPSEL.IOI_IMUX10_1 always
RIOI_TBYTESRC.IOI_ILOGIC0_DYNCLKDIVSEL.IOI_IMUX4_1 always
RIOI_TBYTESRC.IOI_ILOGIC0_DYNCLKSEL.IOI_IMUX37_1 always
RIOI_TBYTESRC.IOI_ILOGIC0_OCLK.IOI_OCLK_0 always
RIOI_TBYTESRC.IOI_ILOGIC0_SR.IOI_CTRL1_1 always
RIOI_TBYTESRC.IOI_ILOGIC0_CE1.IOI_IMUX5_1 always
RIOI_TBYTESRC.IOI_ILOGIC0_CE2.IOI_IMUX14_1 always
RIOI_TBYTESRC.IOI_ILOGIC1_BITSLIP.IOI_IMUX0_0 always
RIOI_TBYTESRC.IOI_ILOGIC1_CLKDIV.IOI_CLK0_0 always
RIOI_TBYTESRC.IOI_ILOGIC1_DYNCLKDIVPSEL.IOI_IMUX10_0 always
RIOI_TBYTESRC.IOI_ILOGIC1_DYNCLKDIVSEL.IOI_IMUX4_0 always
RIOI_TBYTESRC.IOI_ILOGIC1_DYNCLKSEL.IOI_IMUX37_0 always
RIOI_TBYTESRC.IOI_ILOGIC1_OCLK.IOI_OCLK_1 always
RIOI_TBYTESRC.IOI_ILOGIC1_SR.IOI_CTRL1_0 always
RIOI_TBYTESRC.IOI_ILOGIC1_CE1.IOI_IMUX5_0 always
RIOI_TBYTESRC.IOI_ILOGIC1_CE2.IOI_IMUX14_0 always
RIOI_TBYTESRC.IOI_ODELAY0_C.IOI_CLK1_1 always
RIOI_TBYTESRC.IOI_ODELAY0_CE.IOI_IMUX2_1 always
RIOI_TBYTESRC.IOI_ODELAY0_CINVCTRL.IOI_BYP2_1 always
RIOI_TBYTESRC.IOI_ODELAY0_CLKIN.IOI_OCLK_0 always
RIOI_TBYTESRC.IOI_ODELAY0_INC.IOI_IMUX3_1 always
RIOI_TBYTESRC.IOI_ODELAY0_LD.IOI_IMUX28_1 always
RIOI_TBYTESRC.IOI_ODELAY0_LDPIPEEN.IOI_IMUX27_1 always
RIOI_TBYTESRC.IOI_ODELAY0_REGRST.IOI_IMUX11_1 always
RIOI_TBYTESRC.IOI_ODELAY0_CNTVALUEIN0.IOI_IMUX23_1 always
RIOI_TBYTESRC.IOI_ODELAY0_CNTVALUEIN1.IOI_IMUX16_1 always
RIOI_TBYTESRC.IOI_ODELAY0_CNTVALUEIN2.IOI_IMUX17_1 always
RIOI_TBYTESRC.IOI_ODELAY0_CNTVALUEIN3.IOI_IMUX19_1 always
RIOI_TBYTESRC.IOI_ODELAY0_CNTVALUEIN4.IOI_IMUX18_1 always
RIOI_TBYTESRC.IOI_ODELAY1_C.IOI_CLK1_0 always
RIOI_TBYTESRC.IOI_ODELAY1_CE.IOI_IMUX2_0 always
RIOI_TBYTESRC.IOI_ODELAY1_CINVCTRL.IOI_BYP2_0 always
RIOI_TBYTESRC.IOI_ODELAY1_CLKIN.IOI_OCLK_1 always
RIOI_TBYTESRC.IOI_ODELAY1_INC.IOI_IMUX3_0 always
RIOI_TBYTESRC.IOI_ODELAY1_LD.IOI_IMUX28_0 always
RIOI_TBYTESRC.IOI_ODELAY1_LDPIPEEN.IOI_IMUX27_0 always
RIOI_TBYTESRC.IOI_ODELAY1_REGRST.IOI_IMUX11_0 always
RIOI_TBYTESRC.IOI_ODELAY1_CNTVALUEIN0.IOI_IMUX23_0 always
RIOI_TBYTESRC.IOI_ODELAY1_CNTVALUEIN1.IOI_IMUX16_0 always
RIOI_TBYTESRC.IOI_ODELAY1_CNTVALUEIN2.IOI_IMUX17_0 always
RIOI_TBYTESRC.IOI_ODELAY1_CNTVALUEIN3.IOI_IMUX19_0 always
RIOI_TBYTESRC.IOI_ODELAY1_CNTVALUEIN4.IOI_IMUX18_0 always
RIOI_TBYTESRC.IOI_OLOGIC0_CLK.IOI_OCLK_0 always
RIOI_TBYTESRC.IOI_OLOGIC0_OCE.IOI_IMUX29_1 always
RIOI_TBYTESRC.IOI_OLOGIC0_SR.IOI_CTRL0_1 always
RIOI_TBYTESRC.IOI_OLOGIC0_TBYTEIN.IOI_TBYTEIN always
RIOI_TBYTESRC.IOI_OLOGIC0_TCE.IOI_IMUX1_1 always
RIOI_TBYTESRC.IOI_OLOGIC0_D1.IOI_IMUX34_1 always
RIOI_TBYTESRC.IOI_OLOGIC0_D2.IOI_IMUX40_1 always
RIOI_TBYTESRC.IOI_OLOGIC0_D3.IOI_IMUX44_1 always
RIOI_TBYTESRC.IOI_OLOGIC0_D4.IOI_IMUX42_1 always
RIOI_TBYTESRC.IOI_OLOGIC0_D5.IOI_IMUX43_1 always
RIOI_TBYTESRC.IOI_OLOGIC0_D6.IOI_IMUX45_1 always
RIOI_TBYTESRC.IOI_OLOGIC0_D7.IOI_IMUX46_1 always
RIOI_TBYTESRC.IOI_OLOGIC0_D8.IOI_IMUX47_1 always
RIOI_TBYTESRC.IOI_OLOGIC0_T1.IOI_IMUX15_1 always
RIOI_TBYTESRC.IOI_OLOGIC0_T2.IOI_IMUX7_1 always
RIOI_TBYTESRC.IOI_OLOGIC0_T3.IOI_IMUX13_1 always
RIOI_TBYTESRC.IOI_OLOGIC0_T4.IOI_IMUX21_1 always
RIOI_TBYTESRC.IOI_OLOGIC1_CLK.IOI_OCLK_1 always
RIOI_TBYTESRC.IOI_OLOGIC1_OCE.IOI_IMUX29_0 always
RIOI_TBYTESRC.IOI_OLOGIC1_SR.IOI_CTRL0_0 always
RIOI_TBYTESRC.IOI_OLOGIC1_TBYTEIN.IOI_TBYTEIN always
RIOI_TBYTESRC.IOI_OLOGIC1_TCE.IOI_IMUX1_0 always
RIOI_TBYTESRC.IOI_OLOGIC1_D1.IOI_IMUX34_0 always
RIOI_TBYTESRC.IOI_OLOGIC1_D2.IOI_IMUX40_0 always
RIOI_TBYTESRC.IOI_OLOGIC1_D3.IOI_IMUX44_0 always
RIOI_TBYTESRC.IOI_OLOGIC1_D4.IOI_IMUX42_0 always
RIOI_TBYTESRC.IOI_OLOGIC1_D5.IOI_IMUX43_0 always
RIOI_TBYTESRC.IOI_OLOGIC1_D6.IOI_IMUX45_0 always
RIOI_TBYTESRC.IOI_OLOGIC1_D7.IOI_IMUX46_0 always
RIOI_TBYTESRC.IOI_OLOGIC1_D8.IOI_IMUX47_0 always
RIOI_TBYTESRC.IOI_OLOGIC1_T1.IOI_IMUX15_0 always
RIOI_TBYTESRC.IOI_OLOGIC1_T2.IOI_IMUX7_0 always
RIOI_TBYTESRC.IOI_OLOGIC1_T3.IOI_IMUX13_0 always
RIOI_TBYTESRC.IOI_OLOGIC1_T4.IOI_IMUX21_0 always
RIOI_TBYTESRC.RIOI_DCI_T_TERM0.IOI_IMUX6_1 always
RIOI_TBYTESRC.RIOI_DCI_T_TERM1.IOI_IMUX6_0 always
RIOI_TBYTESRC.RIOI_I2GCLK_TOP0.IOI_ILOGIC0_O always
RIOI_TBYTESRC.RIOI_IBUF_DISABLE0.IOI_IMUX9_1 always
RIOI_TBYTESRC.RIOI_IBUF_DISABLE1.IOI_IMUX9_0 always
RIOI_TBYTESRC.RIOI_I0.RIOI_IBUF0 always
RIOI_TBYTESRC.RIOI_I1.RIOI_IBUF1 always
RIOI_TBYTESRC.RIOI_IDELAY0_IDATAIN.RIOI_I0 always
RIOI_TBYTESRC.RIOI_IDELAY0_IFDLY0.IOI_FAN4_1 always
RIOI_TBYTESRC.RIOI_IDELAY0_IFDLY1.IOI_FAN5_1 always
RIOI_TBYTESRC.RIOI_IDELAY0_IFDLY2.IOI_BYP7_1 always
RIOI_TBYTESRC.RIOI_IDELAY1_IDATAIN.RIOI_I1 always
RIOI_TBYTESRC.RIOI_IDELAY1_IFDLY0.IOI_FAN4_0 always
RIOI_TBYTESRC.RIOI_IDELAY1_IFDLY1.IOI_FAN5_0 always
RIOI_TBYTESRC.RIOI_IDELAY1_IFDLY2.IOI_BYP7_0 always
RIOI_TBYTESRC.RIOI_ILOGIC0_D.RIOI_I0 always
RIOI_TBYTESRC.RIOI_ILOGIC0_DDLY.RIOI_IDELAY0_DATAOUT always
RIOI_TBYTESRC.RIOI_ILOGIC0_OFB.RIOI_OLOGIC0_OFB always
RIOI_TBYTESRC.RIOI_ILOGIC0_TFB.RIOI_OLOGIC0_TFB_LOCAL always
RIOI_TBYTESRC.RIOI_ILOGIC1_D.RIOI_I1 always
RIOI_TBYTESRC.RIOI_ILOGIC1_DDLY.RIOI_IDELAY1_DATAOUT always
RIOI_TBYTESRC.RIOI_ILOGIC1_OFB.RIOI_OLOGIC1_OFB always
RIOI_TBYTESRC.RIOI_ILOGIC1_TFB.RIOI_OLOGIC1_TFB_LOCAL always
RIOI_TBYTESRC.RIOI_ISIN11.RIOI_ISOUT10 always
RIOI_TBYTESRC.RIOI_ISIN21.RIOI_ISOUT20 always
RIOI_TBYTESRC.RIOI_O0.RIOI_ODELAY0_DATAOUT always
RIOI_TBYTESRC.RIOI_O0.RIOI_OLOGIC0_OQ always
RIOI_TBYTESRC.RIOI_O1.RIOI_ODELAY1_DATAOUT always
RIOI_TBYTESRC.RIOI_O1.RIOI_OLOGIC1_OQ always
RIOI_TBYTESRC.RIOI_ODELAY0_ODATAIN.RIOI_OLOGIC0_OFB always
RIOI_TBYTESRC.RIOI_ODELAY0_OFDLY0.IOI_BYP0_1 always
RIOI_TBYTESRC.RIOI_ODELAY0_OFDLY1.IOI_BYP1_1 always
RIOI_TBYTESRC.RIOI_ODELAY0_OFDLY2.IOI_BYP5_1 always
RIOI_TBYTESRC.RIOI_ODELAY1_ODATAIN.RIOI_OLOGIC1_OFB always
RIOI_TBYTESRC.RIOI_ODELAY1_OFDLY0.IOI_BYP0_0 always
RIOI_TBYTESRC.RIOI_ODELAY1_OFDLY1.IOI_BYP1_0 always
RIOI_TBYTESRC.RIOI_ODELAY1_OFDLY2.IOI_BYP5_0 always
RIOI_TBYTESRC.RIOI_OLOGIC0_OQ.IOI_OLOGIC0_D1 always
RIOI_TBYTESRC.RIOI_OLOGIC0_TFB_LOCAL.RIOI_OLOGIC0_TFB always
RIOI_TBYTESRC.RIOI_OLOGIC0_TQ.IOI_OLOGIC0_T1 always
RIOI_TBYTESRC.RIOI_OLOGIC1_OQ.IOI_OLOGIC1_D1 always
RIOI_TBYTESRC.RIOI_OLOGIC1_TFB_LOCAL.RIOI_OLOGIC1_TFB always
RIOI_TBYTESRC.RIOI_OLOGIC1_TQ.IOI_OLOGIC1_T1 always
RIOI_TBYTESRC.RIOI_OSIN10.RIOI_OSOUT11 always
RIOI_TBYTESRC.RIOI_OSIN20.RIOI_OSOUT21 always
RIOI_TBYTESRC.RIOI_T0.RIOI_OLOGIC0_TQ always
RIOI_TBYTESRC.RIOI_T1.RIOI_OLOGIC1_TQ always

View File

@ -0,0 +1,200 @@
RIOI_TBYTETERM.IOI_LOGIC_OUTS0_0.IOI_ILOGIC1_Q1 always
RIOI_TBYTETERM.IOI_LOGIC_OUTS0_1.IOI_ILOGIC0_Q1 always
RIOI_TBYTETERM.IOI_LOGIC_OUTS1_0.IOI_IDELAY1_CNTVALUEOUT1 always
RIOI_TBYTETERM.IOI_LOGIC_OUTS1_1.IOI_IDELAY0_CNTVALUEOUT1 always
RIOI_TBYTETERM.IOI_LOGIC_OUTS2_0.RIOI_OLOGIC1_TFB_LOCAL always
RIOI_TBYTETERM.IOI_LOGIC_OUTS2_1.RIOI_OLOGIC0_TFB_LOCAL always
RIOI_TBYTETERM.IOI_LOGIC_OUTS3_0.IOI_ILOGIC1_Q6 always
RIOI_TBYTETERM.IOI_LOGIC_OUTS3_1.IOI_ILOGIC0_Q6 always
RIOI_TBYTETERM.IOI_LOGIC_OUTS4_0.IOI_ODELAY1_CNTVALUEOUT1 always
RIOI_TBYTETERM.IOI_LOGIC_OUTS4_1.IOI_ODELAY0_CNTVALUEOUT1 always
RIOI_TBYTETERM.IOI_LOGIC_OUTS5_0.IOI_OLOGIC1_IOCLKGLITCH always
RIOI_TBYTETERM.IOI_LOGIC_OUTS5_1.IOI_OLOGIC0_IOCLKGLITCH always
RIOI_TBYTETERM.IOI_LOGIC_OUTS6_0.IOI_ODELAY1_CNTVALUEOUT2 always
RIOI_TBYTETERM.IOI_LOGIC_OUTS6_1.IOI_ODELAY0_CNTVALUEOUT2 always
RIOI_TBYTETERM.IOI_LOGIC_OUTS7_0.IOI_ILOGIC1_Q7 always
RIOI_TBYTETERM.IOI_LOGIC_OUTS7_1.IOI_ILOGIC0_Q7 always
RIOI_TBYTETERM.IOI_LOGIC_OUTS8_0.IOI_ILOGIC1_Q8 always
RIOI_TBYTETERM.IOI_LOGIC_OUTS8_1.IOI_ILOGIC0_Q8 always
RIOI_TBYTETERM.IOI_LOGIC_OUTS9_0.IOI_ILOGIC1_Q3 always
RIOI_TBYTETERM.IOI_LOGIC_OUTS9_1.IOI_ILOGIC0_Q3 always
RIOI_TBYTETERM.IOI_LOGIC_OUTS10_0.IOI_ILOGIC1_Q4 always
RIOI_TBYTETERM.IOI_LOGIC_OUTS10_1.IOI_ILOGIC0_Q4 always
RIOI_TBYTETERM.IOI_LOGIC_OUTS11_0.IOI_IDELAY1_CNTVALUEOUT4 always
RIOI_TBYTETERM.IOI_LOGIC_OUTS11_1.IOI_IDELAY0_CNTVALUEOUT4 always
RIOI_TBYTETERM.IOI_LOGIC_OUTS12_0.IOI_ODELAY1_CNTVALUEOUT0 always
RIOI_TBYTETERM.IOI_LOGIC_OUTS12_1.IOI_ODELAY0_CNTVALUEOUT0 always
RIOI_TBYTETERM.IOI_LOGIC_OUTS14_0.IOI_ILOGIC1_Q5 always
RIOI_TBYTETERM.IOI_LOGIC_OUTS14_1.IOI_ILOGIC0_Q5 always
RIOI_TBYTETERM.IOI_LOGIC_OUTS15_0.IOI_IDELAY1_CNTVALUEOUT3 always
RIOI_TBYTETERM.IOI_LOGIC_OUTS15_1.IOI_IDELAY0_CNTVALUEOUT3 always
RIOI_TBYTETERM.IOI_LOGIC_OUTS17_0.IOI_ODELAY1_CNTVALUEOUT3 always
RIOI_TBYTETERM.IOI_LOGIC_OUTS17_1.IOI_ODELAY0_CNTVALUEOUT3 always
RIOI_TBYTETERM.IOI_LOGIC_OUTS18_0.IOI_ILOGIC1_O always
RIOI_TBYTETERM.IOI_LOGIC_OUTS18_1.IOI_ILOGIC0_O always
RIOI_TBYTETERM.IOI_LOGIC_OUTS19_0.IOI_IDELAY1_CNTVALUEOUT2 always
RIOI_TBYTETERM.IOI_LOGIC_OUTS19_1.IOI_IDELAY0_CNTVALUEOUT2 always
RIOI_TBYTETERM.IOI_LOGIC_OUTS20_0.IOI_IDELAY1_CNTVALUEOUT0 always
RIOI_TBYTETERM.IOI_LOGIC_OUTS20_1.IOI_IDELAY0_CNTVALUEOUT0 always
RIOI_TBYTETERM.IOI_LOGIC_OUTS21_0.IOI_ODELAY1_CNTVALUEOUT4 always
RIOI_TBYTETERM.IOI_LOGIC_OUTS21_1.IOI_ODELAY0_CNTVALUEOUT4 always
RIOI_TBYTETERM.IOI_LOGIC_OUTS23_0.IOI_ILOGIC1_Q2 always
RIOI_TBYTETERM.IOI_LOGIC_OUTS23_1.IOI_ILOGIC0_Q2 always
RIOI_TBYTETERM.IOI_RCLK_DIV_CE0.IOI_BYP3_1 always
RIOI_TBYTETERM.IOI_RCLK_DIV_CE1.IOI_BYP4_1 always
RIOI_TBYTETERM.IOI_RCLK_DIV_CE2_1.IOI_BYP4_1 always
RIOI_TBYTETERM.IOI_RCLK_DIV_CE3_1.IOI_BYP3_1 always
RIOI_TBYTETERM.IOI_RCLK_DIV_CLR0_1.IOI_BYP3_0 always
RIOI_TBYTETERM.IOI_RCLK_DIV_CLR1_1.IOI_BYP4_0 always
RIOI_TBYTETERM.IOI_RCLK_DIV_CLR2.IOI_BYP4_0 always
RIOI_TBYTETERM.IOI_RCLK_DIV_CLR3.IOI_BYP3_0 always
RIOI_TBYTETERM.IOI_IDELAY0_C.IOI_CLK1_1 always
RIOI_TBYTETERM.IOI_IDELAY0_CE.IOI_IMUX32_1 always
RIOI_TBYTETERM.IOI_IDELAY0_CINVCTRL.IOI_BYP6_1 always
RIOI_TBYTETERM.IOI_IDELAY0_DATAIN.IOI_IMUX25_1 always
RIOI_TBYTETERM.IOI_IDELAY0_INC.IOI_IMUX26_1 always
RIOI_TBYTETERM.IOI_IDELAY0_LD.IOI_IMUX30_1 always
RIOI_TBYTETERM.IOI_IDELAY0_LDPIPEEN.IOI_IMUX33_1 always
RIOI_TBYTETERM.IOI_IDELAY0_REGRST.IOI_IMUX12_1 always
RIOI_TBYTETERM.IOI_IDELAY0_CNTVALUEIN0.IOI_IMUX41_1 always
RIOI_TBYTETERM.IOI_IDELAY0_CNTVALUEIN1.IOI_IMUX36_1 always
RIOI_TBYTETERM.IOI_IDELAY0_CNTVALUEIN2.IOI_IMUX35_1 always
RIOI_TBYTETERM.IOI_IDELAY0_CNTVALUEIN3.IOI_IMUX38_1 always
RIOI_TBYTETERM.IOI_IDELAY0_CNTVALUEIN4.IOI_IMUX39_1 always
RIOI_TBYTETERM.IOI_IDELAY1_C.IOI_CLK1_0 always
RIOI_TBYTETERM.IOI_IDELAY1_CE.IOI_IMUX32_0 always
RIOI_TBYTETERM.IOI_IDELAY1_CINVCTRL.IOI_BYP6_0 always
RIOI_TBYTETERM.IOI_IDELAY1_DATAIN.IOI_IMUX25_0 always
RIOI_TBYTETERM.IOI_IDELAY1_INC.IOI_IMUX26_0 always
RIOI_TBYTETERM.IOI_IDELAY1_LD.IOI_IMUX30_0 always
RIOI_TBYTETERM.IOI_IDELAY1_LDPIPEEN.IOI_IMUX33_0 always
RIOI_TBYTETERM.IOI_IDELAY1_REGRST.IOI_IMUX12_0 always
RIOI_TBYTETERM.IOI_IDELAY1_CNTVALUEIN0.IOI_IMUX41_0 always
RIOI_TBYTETERM.IOI_IDELAY1_CNTVALUEIN1.IOI_IMUX36_0 always
RIOI_TBYTETERM.IOI_IDELAY1_CNTVALUEIN2.IOI_IMUX35_0 always
RIOI_TBYTETERM.IOI_IDELAY1_CNTVALUEIN3.IOI_IMUX38_0 always
RIOI_TBYTETERM.IOI_IDELAY1_CNTVALUEIN4.IOI_IMUX39_0 always
RIOI_TBYTETERM.IOI_ILOGIC0_BITSLIP.IOI_IMUX0_1 always
RIOI_TBYTETERM.IOI_ILOGIC0_CLKDIV.IOI_CLK0_1 always
RIOI_TBYTETERM.IOI_ILOGIC0_DYNCLKDIVPSEL.IOI_IMUX10_1 always
RIOI_TBYTETERM.IOI_ILOGIC0_DYNCLKDIVSEL.IOI_IMUX4_1 always
RIOI_TBYTETERM.IOI_ILOGIC0_DYNCLKSEL.IOI_IMUX37_1 always
RIOI_TBYTETERM.IOI_ILOGIC0_OCLK.IOI_OCLK_0 always
RIOI_TBYTETERM.IOI_ILOGIC0_SR.IOI_CTRL1_1 always
RIOI_TBYTETERM.IOI_ILOGIC0_CE1.IOI_IMUX5_1 always
RIOI_TBYTETERM.IOI_ILOGIC0_CE2.IOI_IMUX14_1 always
RIOI_TBYTETERM.IOI_ILOGIC1_BITSLIP.IOI_IMUX0_0 always
RIOI_TBYTETERM.IOI_ILOGIC1_CLKDIV.IOI_CLK0_0 always
RIOI_TBYTETERM.IOI_ILOGIC1_DYNCLKDIVPSEL.IOI_IMUX10_0 always
RIOI_TBYTETERM.IOI_ILOGIC1_DYNCLKDIVSEL.IOI_IMUX4_0 always
RIOI_TBYTETERM.IOI_ILOGIC1_DYNCLKSEL.IOI_IMUX37_0 always
RIOI_TBYTETERM.IOI_ILOGIC1_OCLK.IOI_OCLK_1 always
RIOI_TBYTETERM.IOI_ILOGIC1_SR.IOI_CTRL1_0 always
RIOI_TBYTETERM.IOI_ILOGIC1_CE1.IOI_IMUX5_0 always
RIOI_TBYTETERM.IOI_ILOGIC1_CE2.IOI_IMUX14_0 always
RIOI_TBYTETERM.IOI_ODELAY0_C.IOI_CLK1_1 always
RIOI_TBYTETERM.IOI_ODELAY0_CE.IOI_IMUX2_1 always
RIOI_TBYTETERM.IOI_ODELAY0_CINVCTRL.IOI_BYP2_1 always
RIOI_TBYTETERM.IOI_ODELAY0_CLKIN.IOI_OCLK_0 always
RIOI_TBYTETERM.IOI_ODELAY0_INC.IOI_IMUX3_1 always
RIOI_TBYTETERM.IOI_ODELAY0_LD.IOI_IMUX28_1 always
RIOI_TBYTETERM.IOI_ODELAY0_LDPIPEEN.IOI_IMUX27_1 always
RIOI_TBYTETERM.IOI_ODELAY0_REGRST.IOI_IMUX11_1 always
RIOI_TBYTETERM.IOI_ODELAY0_CNTVALUEIN0.IOI_IMUX23_1 always
RIOI_TBYTETERM.IOI_ODELAY0_CNTVALUEIN1.IOI_IMUX16_1 always
RIOI_TBYTETERM.IOI_ODELAY0_CNTVALUEIN2.IOI_IMUX17_1 always
RIOI_TBYTETERM.IOI_ODELAY0_CNTVALUEIN3.IOI_IMUX19_1 always
RIOI_TBYTETERM.IOI_ODELAY0_CNTVALUEIN4.IOI_IMUX18_1 always
RIOI_TBYTETERM.IOI_ODELAY1_C.IOI_CLK1_0 always
RIOI_TBYTETERM.IOI_ODELAY1_CE.IOI_IMUX2_0 always
RIOI_TBYTETERM.IOI_ODELAY1_CINVCTRL.IOI_BYP2_0 always
RIOI_TBYTETERM.IOI_ODELAY1_CLKIN.IOI_OCLK_1 always
RIOI_TBYTETERM.IOI_ODELAY1_INC.IOI_IMUX3_0 always
RIOI_TBYTETERM.IOI_ODELAY1_LD.IOI_IMUX28_0 always
RIOI_TBYTETERM.IOI_ODELAY1_LDPIPEEN.IOI_IMUX27_0 always
RIOI_TBYTETERM.IOI_ODELAY1_REGRST.IOI_IMUX11_0 always
RIOI_TBYTETERM.IOI_ODELAY1_CNTVALUEIN0.IOI_IMUX23_0 always
RIOI_TBYTETERM.IOI_ODELAY1_CNTVALUEIN1.IOI_IMUX16_0 always
RIOI_TBYTETERM.IOI_ODELAY1_CNTVALUEIN2.IOI_IMUX17_0 always
RIOI_TBYTETERM.IOI_ODELAY1_CNTVALUEIN3.IOI_IMUX19_0 always
RIOI_TBYTETERM.IOI_ODELAY1_CNTVALUEIN4.IOI_IMUX18_0 always
RIOI_TBYTETERM.IOI_OLOGIC0_CLK.IOI_OCLK_0 always
RIOI_TBYTETERM.IOI_OLOGIC0_OCE.IOI_IMUX29_1 always
RIOI_TBYTETERM.IOI_OLOGIC0_SR.IOI_CTRL0_1 always
RIOI_TBYTETERM.IOI_OLOGIC0_TBYTEIN.IOI_TBYTEIN_TERM always
RIOI_TBYTETERM.IOI_OLOGIC0_TCE.IOI_IMUX1_1 always
RIOI_TBYTETERM.IOI_OLOGIC0_D1.IOI_IMUX34_1 always
RIOI_TBYTETERM.IOI_OLOGIC0_D2.IOI_IMUX40_1 always
RIOI_TBYTETERM.IOI_OLOGIC0_D3.IOI_IMUX44_1 always
RIOI_TBYTETERM.IOI_OLOGIC0_D4.IOI_IMUX42_1 always
RIOI_TBYTETERM.IOI_OLOGIC0_D5.IOI_IMUX43_1 always
RIOI_TBYTETERM.IOI_OLOGIC0_D6.IOI_IMUX45_1 always
RIOI_TBYTETERM.IOI_OLOGIC0_D7.IOI_IMUX46_1 always
RIOI_TBYTETERM.IOI_OLOGIC0_D8.IOI_IMUX47_1 always
RIOI_TBYTETERM.IOI_OLOGIC0_T1.IOI_IMUX15_1 always
RIOI_TBYTETERM.IOI_OLOGIC0_T2.IOI_IMUX7_1 always
RIOI_TBYTETERM.IOI_OLOGIC0_T3.IOI_IMUX13_1 always
RIOI_TBYTETERM.IOI_OLOGIC0_T4.IOI_IMUX21_1 always
RIOI_TBYTETERM.IOI_OLOGIC1_CLK.IOI_OCLK_1 always
RIOI_TBYTETERM.IOI_OLOGIC1_OCE.IOI_IMUX29_0 always
RIOI_TBYTETERM.IOI_OLOGIC1_SR.IOI_CTRL0_0 always
RIOI_TBYTETERM.IOI_OLOGIC1_TBYTEIN.IOI_TBYTEIN_TERM always
RIOI_TBYTETERM.IOI_OLOGIC1_TCE.IOI_IMUX1_0 always
RIOI_TBYTETERM.IOI_OLOGIC1_D1.IOI_IMUX34_0 always
RIOI_TBYTETERM.IOI_OLOGIC1_D2.IOI_IMUX40_0 always
RIOI_TBYTETERM.IOI_OLOGIC1_D3.IOI_IMUX44_0 always
RIOI_TBYTETERM.IOI_OLOGIC1_D4.IOI_IMUX42_0 always
RIOI_TBYTETERM.IOI_OLOGIC1_D5.IOI_IMUX43_0 always
RIOI_TBYTETERM.IOI_OLOGIC1_D6.IOI_IMUX45_0 always
RIOI_TBYTETERM.IOI_OLOGIC1_D7.IOI_IMUX46_0 always
RIOI_TBYTETERM.IOI_OLOGIC1_D8.IOI_IMUX47_0 always
RIOI_TBYTETERM.IOI_OLOGIC1_T1.IOI_IMUX15_0 always
RIOI_TBYTETERM.IOI_OLOGIC1_T2.IOI_IMUX7_0 always
RIOI_TBYTETERM.IOI_OLOGIC1_T3.IOI_IMUX13_0 always
RIOI_TBYTETERM.IOI_OLOGIC1_T4.IOI_IMUX21_0 always
RIOI_TBYTETERM.RIOI_DCI_T_TERM0.IOI_IMUX6_1 always
RIOI_TBYTETERM.RIOI_DCI_T_TERM1.IOI_IMUX6_0 always
RIOI_TBYTETERM.RIOI_IBUF_DISABLE0.IOI_IMUX9_1 always
RIOI_TBYTETERM.RIOI_IBUF_DISABLE1.IOI_IMUX9_0 always
RIOI_TBYTETERM.RIOI_I0.RIOI_IBUF0 always
RIOI_TBYTETERM.RIOI_I1.RIOI_IBUF1 always
RIOI_TBYTETERM.RIOI_IDELAY0_IDATAIN.RIOI_I0 always
RIOI_TBYTETERM.RIOI_IDELAY0_IFDLY0.IOI_FAN4_1 always
RIOI_TBYTETERM.RIOI_IDELAY0_IFDLY1.IOI_FAN5_1 always
RIOI_TBYTETERM.RIOI_IDELAY0_IFDLY2.IOI_BYP7_1 always
RIOI_TBYTETERM.RIOI_IDELAY1_IDATAIN.RIOI_I1 always
RIOI_TBYTETERM.RIOI_IDELAY1_IFDLY0.IOI_FAN4_0 always
RIOI_TBYTETERM.RIOI_IDELAY1_IFDLY1.IOI_FAN5_0 always
RIOI_TBYTETERM.RIOI_IDELAY1_IFDLY2.IOI_BYP7_0 always
RIOI_TBYTETERM.RIOI_ILOGIC0_D.RIOI_I0 always
RIOI_TBYTETERM.RIOI_ILOGIC0_DDLY.RIOI_IDELAY0_DATAOUT always
RIOI_TBYTETERM.RIOI_ILOGIC0_OFB.RIOI_OLOGIC0_OFB always
RIOI_TBYTETERM.RIOI_ILOGIC0_TFB.RIOI_OLOGIC0_TFB_LOCAL always
RIOI_TBYTETERM.RIOI_ILOGIC1_D.RIOI_I1 always
RIOI_TBYTETERM.RIOI_ILOGIC1_DDLY.RIOI_IDELAY1_DATAOUT always
RIOI_TBYTETERM.RIOI_ILOGIC1_OFB.RIOI_OLOGIC1_OFB always
RIOI_TBYTETERM.RIOI_ILOGIC1_TFB.RIOI_OLOGIC1_TFB_LOCAL always
RIOI_TBYTETERM.RIOI_ISIN11.RIOI_ISOUT10 always
RIOI_TBYTETERM.RIOI_ISIN21.RIOI_ISOUT20 always
RIOI_TBYTETERM.RIOI_O0.RIOI_ODELAY0_DATAOUT always
RIOI_TBYTETERM.RIOI_O0.RIOI_OLOGIC0_OQ always
RIOI_TBYTETERM.RIOI_O1.RIOI_ODELAY1_DATAOUT always
RIOI_TBYTETERM.RIOI_O1.RIOI_OLOGIC1_OQ always
RIOI_TBYTETERM.RIOI_ODELAY0_ODATAIN.RIOI_OLOGIC0_OFB always
RIOI_TBYTETERM.RIOI_ODELAY0_OFDLY0.IOI_BYP0_1 always
RIOI_TBYTETERM.RIOI_ODELAY0_OFDLY1.IOI_BYP1_1 always
RIOI_TBYTETERM.RIOI_ODELAY0_OFDLY2.IOI_BYP5_1 always
RIOI_TBYTETERM.RIOI_ODELAY1_ODATAIN.RIOI_OLOGIC1_OFB always
RIOI_TBYTETERM.RIOI_ODELAY1_OFDLY0.IOI_BYP0_0 always
RIOI_TBYTETERM.RIOI_ODELAY1_OFDLY1.IOI_BYP1_0 always
RIOI_TBYTETERM.RIOI_ODELAY1_OFDLY2.IOI_BYP5_0 always
RIOI_TBYTETERM.RIOI_OLOGIC0_OQ.IOI_OLOGIC0_D1 always
RIOI_TBYTETERM.RIOI_OLOGIC0_TFB_LOCAL.RIOI_OLOGIC0_TFB always
RIOI_TBYTETERM.RIOI_OLOGIC0_TQ.IOI_OLOGIC0_T1 always
RIOI_TBYTETERM.RIOI_OLOGIC1_OQ.IOI_OLOGIC1_D1 always
RIOI_TBYTETERM.RIOI_OLOGIC1_TFB_LOCAL.RIOI_OLOGIC1_TFB always
RIOI_TBYTETERM.RIOI_OLOGIC1_TQ.IOI_OLOGIC1_T1 always
RIOI_TBYTETERM.RIOI_OSIN10.RIOI_OSOUT11 always
RIOI_TBYTETERM.RIOI_OSIN20.RIOI_OSOUT21 always
RIOI_TBYTETERM.RIOI_T0.RIOI_OLOGIC0_TQ always
RIOI_TBYTETERM.RIOI_T1.RIOI_OLOGIC1_TQ always

View File

@ -8,5 +8,5 @@ CFG_CENTER_MID.BSCAN.JTAG_CHAIN_4 27_2163
CFG_CENTER_MID.DCIRESET.ENABLED 26_2165 26_2166 27_2164
CFG_CENTER_MID.ICAP.ICAP_WIDTH_X8 26_2203 26_2204 27_2202
CFG_CENTER_MID.ICAP.ICAP_WIDTH_X16 26_2199 27_2200 27_2201
CFG_CENTER_MID_MID.STARTUP.USRCCLKO_CONNECTED 26_2196 27_2197 27_2198
CFG_CENTER_MID.STARTUP.PROG_USR 26_2197 26_2198 27_2196
CFG_CENTER_MID.STARTUP.USRCCLKO_CONNECTED 26_2196 27_2197 27_2198

View File

@ -8,5 +8,5 @@ CFG_CENTER_MID.BSCAN.JTAG_CHAIN_4 origin:038-cfg 27_2163
CFG_CENTER_MID.DCIRESET.ENABLED origin:038-cfg 26_2165 26_2166 27_2164
CFG_CENTER_MID.ICAP.ICAP_WIDTH_X8 origin:038-cfg 26_2203 26_2204 27_2202
CFG_CENTER_MID.ICAP.ICAP_WIDTH_X16 origin:038-cfg 26_2199 27_2200 27_2201
CFG_CENTER_MID_MID.STARTUP.USRCCLKO_CONNECTED origin:038-cfg-startup 26_2196 27_2197 27_2198
CFG_CENTER_MID.STARTUP.PROG_USR origin:038-cfg 26_2197 26_2198 27_2196
CFG_CENTER_MID.STARTUP.USRCCLKO_CONNECTED origin:038-cfg-startup 26_2196 27_2197 27_2198

View File

@ -1,9 +1,9 @@
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_L_LOWER_B_CLK_FREQ_BB0 !28_1012 28_1013 29_979 29_1012
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_L_LOWER_B_CLK_FREQ_BB1 !28_1012 !28_1013 29_979 29_1012
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_L_LOWER_B_CLK_FREQ_BB2 !28_1012 28_1013 29_979 !29_1012
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_L_LOWER_B_CLK_FREQ_BB3 !28_1012 !28_1013 29_979 !29_1012
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_L_LOWER_B_CLK_IN3_HCLK 28_1012 !28_1013 29_979 !29_1012
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_L_LOWER_B_CLK_IN3_INT 28_1012 28_1013 29_979 !29_1012
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_L_LOWER_B_CLK_FREQ_BB0 !28_1012 28_1013 !28_1015 29_979 29_1012
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_L_LOWER_B_CLK_FREQ_BB1 !28_1012 !28_1013 !28_1015 29_979 29_1012
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_L_LOWER_B_CLK_FREQ_BB2 !28_1012 28_1013 28_1015 29_979 !29_1012
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_L_LOWER_B_CLK_FREQ_BB3 !28_1012 !28_1013 !28_1015 29_979 !29_1012
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_L_LOWER_B_CLK_IN3_HCLK 28_1012 !28_1013 !28_1015 29_979 !29_1012
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_L_LOWER_B_CLK_IN3_INT 28_1012 28_1013 !28_1015 29_979 !29_1012
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_LR_LOWER_B_CLKFBOUT2IN 28_980 28_981 29_980
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB0 28_1014 !29_1013 29_1014
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB1 28_1014 !29_1013 !29_1014

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@ -1,9 +1,9 @@
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_L_LOWER_B_CLK_FREQ_BB0 origin:034b-cmt-mmcm-pips !28_1012 28_1013 29_1012 29_979
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_L_LOWER_B_CLK_FREQ_BB1 origin:034b-cmt-mmcm-pips !28_1012 !28_1013 29_1012 29_979
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_L_LOWER_B_CLK_FREQ_BB2 origin:034b-cmt-mmcm-pips !28_1012 !29_1012 28_1013 29_979
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_L_LOWER_B_CLK_FREQ_BB3 origin:034b-cmt-mmcm-pips !28_1012 !28_1013 !29_1012 29_979
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_L_LOWER_B_CLK_IN3_HCLK origin:034b-cmt-mmcm-pips !28_1013 !29_1012 28_1012 29_979
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_L_LOWER_B_CLK_IN3_INT origin:034b-cmt-mmcm-pips !29_1012 28_1012 28_1013 29_979
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_L_LOWER_B_CLK_FREQ_BB0 origin:034b-cmt-mmcm-pips !28_1012 !28_1015 28_1013 29_1012 29_979
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_L_LOWER_B_CLK_FREQ_BB1 origin:034b-cmt-mmcm-pips !28_1012 !28_1013 !28_1015 29_1012 29_979
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_L_LOWER_B_CLK_FREQ_BB2 origin:034b-cmt-mmcm-pips !28_1012 !29_1012 28_1013 28_1015 29_979
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_L_LOWER_B_CLK_FREQ_BB3 origin:034b-cmt-mmcm-pips !28_1012 !28_1013 !28_1015 !29_1012 29_979
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_L_LOWER_B_CLK_IN3_HCLK origin:034b-cmt-mmcm-pips !28_1013 !28_1015 !29_1012 28_1012 29_979
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_L_LOWER_B_CLK_IN3_INT origin:034b-cmt-mmcm-pips !28_1015 !29_1012 28_1012 28_1013 29_979
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_LR_LOWER_B_CLKFBOUT2IN origin:034b-cmt-mmcm-pips 28_980 28_981 29_980
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB0 origin:034b-cmt-mmcm-pips !29_1013 28_1014 29_1014
CMT_TOP_L_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_L_LOWER_B_CLK_FREQ_BB1 origin:034b-cmt-mmcm-pips !29_1013 !29_1014 28_1014

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@ -1,10 +1,10 @@
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_LR_LOWER_B_CLKFBOUT2IN 28_980 28_981 29_980
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_FREQ_BB0 !28_1012 28_1013 29_979 29_1012
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_FREQ_BB1 !28_1012 !28_1013 29_979 29_1012
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_FREQ_BB2 !28_1012 28_1013 29_979 !29_1012
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_FREQ_BB3 !28_1012 !28_1013 29_979 !29_1012
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_IN3_HCLK 28_1012 !28_1013 29_979 !29_1012
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_IN3_INT 28_1012 28_1013 29_979 !29_1012
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_FREQ_BB0 !28_1012 28_1013 !28_1015 29_979 29_1012
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_FREQ_BB1 !28_1012 !28_1013 !28_1015 29_979 29_1012
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_FREQ_BB2 !28_1012 28_1013 28_1015 29_979 !29_1012
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_FREQ_BB3 !28_1012 !28_1013 !28_1015 29_979 !29_1012
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_IN3_HCLK 28_1012 !28_1013 !28_1015 29_979 !29_1012
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_IN3_INT 28_1012 28_1013 !28_1015 29_979 !29_1012
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB0 28_1014 !29_1013 29_1014
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB1 28_1014 !29_1013 !29_1014
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB2 !28_1014 !29_1013 29_1014

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@ -1,10 +1,10 @@
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_LR_LOWER_B_CLKFBOUT2IN origin:034b-cmt-mmcm-pips 28_980 28_981 29_980
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_FREQ_BB0 origin:034b-cmt-mmcm-pips !28_1012 28_1013 29_1012 29_979
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_FREQ_BB1 origin:034b-cmt-mmcm-pips !28_1012 !28_1013 29_1012 29_979
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_FREQ_BB2 origin:034b-cmt-mmcm-pips !28_1012 !29_1012 28_1013 29_979
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_FREQ_BB3 origin:034b-cmt-mmcm-pips !28_1012 !28_1013 !29_1012 29_979
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_IN3_HCLK origin:034b-cmt-mmcm-pips !28_1013 !29_1012 28_1012 29_979
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_IN3_INT origin:034b-cmt-mmcm-pips !29_1012 28_1012 28_1013 29_979
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_FREQ_BB0 origin:034b-cmt-mmcm-pips !28_1012 !28_1015 28_1013 29_1012 29_979
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_FREQ_BB1 origin:034b-cmt-mmcm-pips !28_1012 !28_1013 !28_1015 29_1012 29_979
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_FREQ_BB2 origin:034b-cmt-mmcm-pips !28_1012 !29_1012 28_1013 28_1015 29_979
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_FREQ_BB3 origin:034b-cmt-mmcm-pips !28_1012 !28_1013 !28_1015 !29_1012 29_979
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_IN3_HCLK origin:034b-cmt-mmcm-pips !28_1013 !28_1015 !29_1012 28_1012 29_979
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKFBIN.CMT_R_LOWER_B_CLK_IN3_INT origin:034b-cmt-mmcm-pips !28_1015 !29_1012 28_1012 28_1013 29_979
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB0 origin:034b-cmt-mmcm-pips !29_1013 28_1014 29_1014
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB1 origin:034b-cmt-mmcm-pips !29_1013 !29_1014 28_1014
CMT_TOP_R_LOWER_B.CMT_LR_LOWER_B_MMCM_CLKIN1.CMT_R_LOWER_B_CLK_FREQ_BB2 origin:034b-cmt-mmcm-pips !28_1014 !29_1013 29_1014

208
zynq7/segbits_hclk_ioi.db Normal file
View File

@ -0,0 +1,208 @@
HCLK_IOI.HCLK_IOI_CK_IGCLK0.HCLK_IOI_CK_BUFHCLK0 28_15
HCLK_IOI.HCLK_IOI_CK_IGCLK1.HCLK_IOI_CK_BUFHCLK1 29_14
HCLK_IOI.HCLK_IOI_CK_IGCLK2.HCLK_IOI_CK_BUFHCLK2 29_16
HCLK_IOI.HCLK_IOI_CK_IGCLK3.HCLK_IOI_CK_BUFHCLK3 29_18
HCLK_IOI.HCLK_IOI_CK_IGCLK4.HCLK_IOI_CK_BUFHCLK4 29_23
HCLK_IOI.HCLK_IOI_CK_IGCLK5.HCLK_IOI_CK_BUFHCLK5 29_27
HCLK_IOI.HCLK_IOI_CK_IGCLK6.HCLK_IOI_CK_BUFHCLK6 29_30
HCLK_IOI.HCLK_IOI_CK_IGCLK7.HCLK_IOI_CK_BUFHCLK7 29_31
HCLK_IOI.HCLK_IOI_CK_IGCLK8.HCLK_IOI_CK_BUFHCLK8 28_14
HCLK_IOI.HCLK_IOI_CK_IGCLK9.HCLK_IOI_CK_BUFHCLK9 29_15
HCLK_IOI.HCLK_IOI_CK_IGCLK10.HCLK_IOI_CK_BUFHCLK10 29_17
HCLK_IOI.HCLK_IOI_CK_IGCLK11.HCLK_IOI_CK_BUFHCLK11 29_19
HCLK_IOI.HCLK_IOI_IDELAYCTRL_REFCLK.HCLK_IOI_LEAF_GCLK_BOT0 26_20 37_28 37_29
HCLK_IOI.HCLK_IOI_IDELAYCTRL_REFCLK.HCLK_IOI_LEAF_GCLK_BOT1 26_21 37_28 37_29
HCLK_IOI.HCLK_IOI_IDELAYCTRL_REFCLK.HCLK_IOI_LEAF_GCLK_BOT2 26_22 37_28 37_29
HCLK_IOI.HCLK_IOI_IDELAYCTRL_REFCLK.HCLK_IOI_LEAF_GCLK_BOT3 26_23 37_28 37_29
HCLK_IOI.HCLK_IOI_IDELAYCTRL_REFCLK.HCLK_IOI_LEAF_GCLK_BOT4 26_24 37_28 37_29
HCLK_IOI.HCLK_IOI_IDELAYCTRL_REFCLK.HCLK_IOI_LEAF_GCLK_BOT5 26_25 37_28 37_29
HCLK_IOI.HCLK_IOI_IDELAYCTRL_REFCLK.HCLK_IOI_LEAF_GCLK_TOP0 26_26 37_28 37_29
HCLK_IOI.HCLK_IOI_IDELAYCTRL_REFCLK.HCLK_IOI_LEAF_GCLK_TOP1 26_27 37_28 37_29
HCLK_IOI.HCLK_IOI_IDELAYCTRL_REFCLK.HCLK_IOI_LEAF_GCLK_TOP2 26_28 37_28 37_29
HCLK_IOI.HCLK_IOI_IDELAYCTRL_REFCLK.HCLK_IOI_LEAF_GCLK_TOP3 26_29 37_28 37_29
HCLK_IOI.HCLK_IOI_IDELAYCTRL_REFCLK.HCLK_IOI_LEAF_GCLK_TOP4 26_30 37_28 37_29
HCLK_IOI.HCLK_IOI_IDELAYCTRL_REFCLK.HCLK_IOI_LEAF_GCLK_TOP5 26_31 37_28 37_29
HCLK_IOI.HCLK_IOI_IO_PLL_CLK0_DMUX.HCLK_IOI_IOCLK_PLL0 36_28 36_29
HCLK_IOI.HCLK_IOI_IO_PLL_CLK1_DMUX.HCLK_IOI_IOCLK_PLL1 36_20 37_21
HCLK_IOI.HCLK_IOI_IO_PLL_CLK2_DMUX.HCLK_IOI_IOCLK_PLL2 36_14 36_17
HCLK_IOI.HCLK_IOI_IO_PLL_CLK3_DMUX.HCLK_IOI_IOCLK_PLL3 37_14 37_17
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK0 29_24 29_29
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK1 27_19 29_24
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK2 27_23 29_24
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK3 27_27 29_24
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK4 28_18 29_29
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK5 27_19 28_18
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK6 27_23 28_18
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK7 27_27 28_18
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK8 29_25 29_29
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK9 27_19 29_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK10 27_23 29_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK11 27_27 29_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK0 27_17 32_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK1 27_20 32_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK2 27_24 32_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK3 27_28 32_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK4 27_17 31_29
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK5 27_20 31_29
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK6 27_24 31_29
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK7 27_28 31_29
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK8 27_17 28_19
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK9 27_20 28_19
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK10 27_24 28_19
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK11 27_28 28_19
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK0 30_30 31_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK1 30_28 31_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK2 30_26 31_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK3 30_24 31_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK4 30_30 31_24
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK5 30_28 31_24
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK6 30_26 31_24
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK7 30_24 31_24
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK8 30_30 31_26
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK9 30_28 31_26
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK10 30_26 31_26
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK11 30_24 31_26
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK0 26_16 27_31
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK1 26_16 28_28
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK2 26_16 28_24
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK3 26_16 29_21
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK4 27_15 27_31
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK5 27_15 28_28
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK6 27_15 28_24
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK7 27_15 29_21
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK8 26_14 27_31
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK9 26_14 28_28
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK10 26_14 28_24
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK11 26_14 29_21
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK0 27_30 31_27
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK1 28_29 31_27
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK2 28_25 31_27
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK3 28_22 31_27
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK4 27_30 31_30
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK5 28_29 31_30
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK6 28_25 31_30
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK7 28_22 31_30
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK8 27_30 28_20
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK9 28_20 28_29
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK10 28_20 28_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK11 28_20 28_22
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK0 31_18 31_23
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK1 31_16 31_23
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK2 31_14 31_23
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK3 30_15 31_23
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK4 31_18 31_22
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK5 31_16 31_22
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK6 31_14 31_22
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK7 30_15 31_22
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK8 31_18 31_21
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK9 31_16 31_21
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK10 31_14 31_21
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK11 30_15 31_21
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK0 26_19 29_28
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK1 26_19 27_21
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK2 26_19 27_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK3 26_19 29_26
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK4 26_18 29_28
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK5 26_18 27_21
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK6 26_18 27_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK7 26_18 29_26
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK8 26_17 29_28
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK9 26_17 27_21
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK10 26_17 27_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK11 26_17 29_26
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK0 27_18 32_24
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK1 27_22 32_24
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK2 27_26 32_24
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK3 27_29 32_24
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK4 27_18 31_31
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK5 27_22 31_31
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK6 27_26 31_31
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK7 27_29 31_31
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK8 27_18 31_28
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK9 27_22 31_28
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK10 27_26 31_28
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK11 27_29 31_28
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK0 30_22 30_29
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK1 30_22 30_27
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK2 30_22 30_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK3 30_22 30_23
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK4 30_21 30_29
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK5 30_21 30_27
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK6 30_21 30_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK7 30_21 30_23
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK8 30_20 30_29
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK9 30_20 30_27
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK10 30_20 30_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK11 30_20 30_23
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK0 26_15 28_30
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK1 26_15 28_26
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK2 26_15 29_20
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK3 26_15 29_22
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK4 27_14 28_30
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK5 27_14 28_26
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK6 27_14 29_20
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK7 27_14 29_22
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK8 27_16 28_30
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK9 27_16 28_26
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK10 27_16 29_20
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK11 27_16 29_22
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK0 28_31 32_23
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK1 28_27 32_23
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK2 28_23 32_23
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK3 28_21 32_23
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK4 28_31 32_15
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK5 28_27 32_15
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK6 28_23 32_15
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK7 28_21 32_15
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK8 28_31 32_14
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK9 28_27 32_14
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK10 28_23 32_14
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK11 28_21 32_14
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK0 30_17 31_17
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK1 30_17 31_15
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK2 30_14 30_17
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK3 30_16 30_17
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK4 30_18 31_17
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK5 30_18 31_15
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK6 30_14 30_18
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK7 30_16 30_18
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK8 30_19 31_17
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK9 30_19 31_15
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK10 30_14 30_19
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK11 30_16 30_19
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV0.HCLK_IOI_RCLK_IMUX0 32_30 35_26
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV0.HCLK_IOI_RCLK_IMUX1 32_30 35_27
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV0.HCLK_IOI_RCLK_IMUX2 32_30 35_28
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV0.HCLK_IOI_RCLK_IMUX3 32_30 35_29
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV0.HCLK_IOI_RCLK0 32_30 35_23
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV0.HCLK_IOI_RCLK1 32_30 35_24
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV0.HCLK_IOI_RCLK2 32_30 34_31
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV0.HCLK_IOI_RCLK3 32_30 35_25
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV1.HCLK_IOI_RCLK_IMUX0 32_26 34_25
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV1.HCLK_IOI_RCLK_IMUX1 32_26 34_26
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV1.HCLK_IOI_RCLK_IMUX2 32_26 34_30
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV1.HCLK_IOI_RCLK_IMUX3 32_26 34_29
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV1.HCLK_IOI_RCLK0 32_26 36_26
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV1.HCLK_IOI_RCLK1 32_26 36_27
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV1.HCLK_IOI_RCLK2 32_26 34_23
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV1.HCLK_IOI_RCLK3 32_26 34_24
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV2.HCLK_IOI_RCLK_IMUX0 32_20 34_17
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV2.HCLK_IOI_RCLK_IMUX1 32_20 34_18
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV2.HCLK_IOI_RCLK_IMUX2 32_20 34_19
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV2.HCLK_IOI_RCLK_IMUX3 32_20 34_20
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV2.HCLK_IOI_RCLK0 32_20 36_24
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV2.HCLK_IOI_RCLK1 32_20 36_25
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV2.HCLK_IOI_RCLK2 32_20 34_15
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV2.HCLK_IOI_RCLK3 32_20 34_16
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK_IMUX0 32_19 35_18
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK_IMUX1 32_19 35_17
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK_IMUX2 32_19 35_16
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK_IMUX3 32_19 35_15
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK0 32_16 32_19
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK1 32_19 35_21
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK2 31_20 32_19
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK3 32_19 35_19
HCLK_IOI.ONLY_DIFF_IN_USE 40_31 41_15 41_30
HCLK_IOI.VREF.V_600_MV 40_19 40_27
HCLK_IOI.VREF.V_675_MV 40_19 40_28
HCLK_IOI.VREF.V_750_MV 40_19 40_26

View File

@ -0,0 +1,208 @@
HCLK_IOI.HCLK_IOI_CK_IGCLK0.HCLK_IOI_CK_BUFHCLK0 origin:047-hclk-ioi18-pips 28_15
HCLK_IOI.HCLK_IOI_CK_IGCLK1.HCLK_IOI_CK_BUFHCLK1 origin:047-hclk-ioi18-pips 29_14
HCLK_IOI.HCLK_IOI_CK_IGCLK2.HCLK_IOI_CK_BUFHCLK2 origin:047-hclk-ioi18-pips 29_16
HCLK_IOI.HCLK_IOI_CK_IGCLK3.HCLK_IOI_CK_BUFHCLK3 origin:047-hclk-ioi18-pips 29_18
HCLK_IOI.HCLK_IOI_CK_IGCLK4.HCLK_IOI_CK_BUFHCLK4 origin:047-hclk-ioi18-pips 29_23
HCLK_IOI.HCLK_IOI_CK_IGCLK5.HCLK_IOI_CK_BUFHCLK5 origin:047-hclk-ioi18-pips 29_27
HCLK_IOI.HCLK_IOI_CK_IGCLK6.HCLK_IOI_CK_BUFHCLK6 origin:047-hclk-ioi18-pips 29_30
HCLK_IOI.HCLK_IOI_CK_IGCLK7.HCLK_IOI_CK_BUFHCLK7 origin:047-hclk-ioi18-pips 29_31
HCLK_IOI.HCLK_IOI_CK_IGCLK8.HCLK_IOI_CK_BUFHCLK8 origin:047-hclk-ioi18-pips 28_14
HCLK_IOI.HCLK_IOI_CK_IGCLK9.HCLK_IOI_CK_BUFHCLK9 origin:047-hclk-ioi18-pips 29_15
HCLK_IOI.HCLK_IOI_CK_IGCLK10.HCLK_IOI_CK_BUFHCLK10 origin:047-hclk-ioi18-pips 29_17
HCLK_IOI.HCLK_IOI_CK_IGCLK11.HCLK_IOI_CK_BUFHCLK11 origin:047-hclk-ioi18-pips 29_19
HCLK_IOI.HCLK_IOI_IDELAYCTRL_REFCLK.HCLK_IOI_LEAF_GCLK_BOT0 origin:047-hclk-ioi18-pips 26_20 37_28 37_29
HCLK_IOI.HCLK_IOI_IDELAYCTRL_REFCLK.HCLK_IOI_LEAF_GCLK_BOT1 origin:047-hclk-ioi18-pips 26_21 37_28 37_29
HCLK_IOI.HCLK_IOI_IDELAYCTRL_REFCLK.HCLK_IOI_LEAF_GCLK_BOT2 origin:047-hclk-ioi18-pips 26_22 37_28 37_29
HCLK_IOI.HCLK_IOI_IDELAYCTRL_REFCLK.HCLK_IOI_LEAF_GCLK_BOT3 origin:047-hclk-ioi18-pips 26_23 37_28 37_29
HCLK_IOI.HCLK_IOI_IDELAYCTRL_REFCLK.HCLK_IOI_LEAF_GCLK_BOT4 origin:047-hclk-ioi18-pips 26_24 37_28 37_29
HCLK_IOI.HCLK_IOI_IDELAYCTRL_REFCLK.HCLK_IOI_LEAF_GCLK_BOT5 origin:047-hclk-ioi18-pips 26_25 37_28 37_29
HCLK_IOI.HCLK_IOI_IDELAYCTRL_REFCLK.HCLK_IOI_LEAF_GCLK_TOP0 origin:047-hclk-ioi18-pips 26_26 37_28 37_29
HCLK_IOI.HCLK_IOI_IDELAYCTRL_REFCLK.HCLK_IOI_LEAF_GCLK_TOP1 origin:047-hclk-ioi18-pips 26_27 37_28 37_29
HCLK_IOI.HCLK_IOI_IDELAYCTRL_REFCLK.HCLK_IOI_LEAF_GCLK_TOP2 origin:047-hclk-ioi18-pips 26_28 37_28 37_29
HCLK_IOI.HCLK_IOI_IDELAYCTRL_REFCLK.HCLK_IOI_LEAF_GCLK_TOP3 origin:047-hclk-ioi18-pips 26_29 37_28 37_29
HCLK_IOI.HCLK_IOI_IDELAYCTRL_REFCLK.HCLK_IOI_LEAF_GCLK_TOP4 origin:047-hclk-ioi18-pips 26_30 37_28 37_29
HCLK_IOI.HCLK_IOI_IDELAYCTRL_REFCLK.HCLK_IOI_LEAF_GCLK_TOP5 origin:047-hclk-ioi18-pips 26_31 37_28 37_29
HCLK_IOI.HCLK_IOI_IO_PLL_CLK0_DMUX.HCLK_IOI_IOCLK_PLL0 origin:047-hclk-ioi18-pips 36_28 36_29
HCLK_IOI.HCLK_IOI_IO_PLL_CLK1_DMUX.HCLK_IOI_IOCLK_PLL1 origin:047-hclk-ioi18-pips 36_20 37_21
HCLK_IOI.HCLK_IOI_IO_PLL_CLK2_DMUX.HCLK_IOI_IOCLK_PLL2 origin:047-hclk-ioi18-pips 36_14 36_17
HCLK_IOI.HCLK_IOI_IO_PLL_CLK3_DMUX.HCLK_IOI_IOCLK_PLL3 origin:047-hclk-ioi18-pips 37_14 37_17
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK0 origin:047-hclk-ioi18-pips 29_24 29_29
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK1 origin:047-hclk-ioi18-pips 27_19 29_24
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK2 origin:047-hclk-ioi18-pips 27_23 29_24
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK3 origin:047-hclk-ioi18-pips 27_27 29_24
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK4 origin:047-hclk-ioi18-pips 28_18 29_29
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK5 origin:047-hclk-ioi18-pips 27_19 28_18
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK6 origin:047-hclk-ioi18-pips 27_23 28_18
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK7 origin:047-hclk-ioi18-pips 27_27 28_18
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK8 origin:047-hclk-ioi18-pips 29_25 29_29
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK9 origin:047-hclk-ioi18-pips 27_19 29_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi18-pips 27_23 29_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT0.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi18-pips 27_27 29_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK0 origin:047-hclk-ioi18-pips 27_17 32_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK1 origin:047-hclk-ioi18-pips 27_20 32_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK2 origin:047-hclk-ioi18-pips 27_24 32_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK3 origin:047-hclk-ioi18-pips 27_28 32_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK4 origin:047-hclk-ioi18-pips 27_17 31_29
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK5 origin:047-hclk-ioi18-pips 27_20 31_29
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK6 origin:047-hclk-ioi18-pips 27_24 31_29
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK7 origin:047-hclk-ioi18-pips 27_28 31_29
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK8 origin:047-hclk-ioi18-pips 27_17 28_19
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK9 origin:047-hclk-ioi18-pips 27_20 28_19
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi18-pips 27_24 28_19
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT1.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi18-pips 27_28 28_19
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK0 origin:047-hclk-ioi18-pips 30_30 31_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK1 origin:047-hclk-ioi18-pips 30_28 31_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK2 origin:047-hclk-ioi18-pips 30_26 31_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK3 origin:047-hclk-ioi18-pips 30_24 31_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK4 origin:047-hclk-ioi18-pips 30_30 31_24
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK5 origin:047-hclk-ioi18-pips 30_28 31_24
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK6 origin:047-hclk-ioi18-pips 30_26 31_24
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK7 origin:047-hclk-ioi18-pips 30_24 31_24
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK8 origin:047-hclk-ioi18-pips 30_30 31_26
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK9 origin:047-hclk-ioi18-pips 30_28 31_26
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi18-pips 30_26 31_26
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT2.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi18-pips 30_24 31_26
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK0 origin:047-hclk-ioi18-pips 26_16 27_31
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK1 origin:047-hclk-ioi18-pips 26_16 28_28
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK2 origin:047-hclk-ioi18-pips 26_16 28_24
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK3 origin:047-hclk-ioi18-pips 26_16 29_21
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK4 origin:047-hclk-ioi18-pips 27_15 27_31
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK5 origin:047-hclk-ioi18-pips 27_15 28_28
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK6 origin:047-hclk-ioi18-pips 27_15 28_24
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK7 origin:047-hclk-ioi18-pips 27_15 29_21
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK8 origin:047-hclk-ioi18-pips 26_14 27_31
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK9 origin:047-hclk-ioi18-pips 26_14 28_28
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi18-pips 26_14 28_24
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT3.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi18-pips 26_14 29_21
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK0 origin:047-hclk-ioi18-pips 27_30 31_27
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK1 origin:047-hclk-ioi18-pips 28_29 31_27
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK2 origin:047-hclk-ioi18-pips 28_25 31_27
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK3 origin:047-hclk-ioi18-pips 28_22 31_27
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK4 origin:047-hclk-ioi18-pips 27_30 31_30
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK5 origin:047-hclk-ioi18-pips 28_29 31_30
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK6 origin:047-hclk-ioi18-pips 28_25 31_30
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK7 origin:047-hclk-ioi18-pips 28_22 31_30
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK8 origin:047-hclk-ioi18-pips 27_30 28_20
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK9 origin:047-hclk-ioi18-pips 28_20 28_29
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi18-pips 28_20 28_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT4.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi18-pips 28_20 28_22
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK0 origin:047-hclk-ioi18-pips 31_18 31_23
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK1 origin:047-hclk-ioi18-pips 31_16 31_23
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK2 origin:047-hclk-ioi18-pips 31_14 31_23
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK3 origin:047-hclk-ioi18-pips 30_15 31_23
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK4 origin:047-hclk-ioi18-pips 31_18 31_22
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK5 origin:047-hclk-ioi18-pips 31_16 31_22
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK6 origin:047-hclk-ioi18-pips 31_14 31_22
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK7 origin:047-hclk-ioi18-pips 30_15 31_22
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK8 origin:047-hclk-ioi18-pips 31_18 31_21
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK9 origin:047-hclk-ioi18-pips 31_16 31_21
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi18-pips 31_14 31_21
HCLK_IOI.HCLK_IOI_LEAF_GCLK_BOT5.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi18-pips 30_15 31_21
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK0 origin:047-hclk-ioi18-pips 26_19 29_28
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK1 origin:047-hclk-ioi18-pips 26_19 27_21
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK2 origin:047-hclk-ioi18-pips 26_19 27_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK3 origin:047-hclk-ioi18-pips 26_19 29_26
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK4 origin:047-hclk-ioi18-pips 26_18 29_28
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK5 origin:047-hclk-ioi18-pips 26_18 27_21
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK6 origin:047-hclk-ioi18-pips 26_18 27_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK7 origin:047-hclk-ioi18-pips 26_18 29_26
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK8 origin:047-hclk-ioi18-pips 26_17 29_28
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK9 origin:047-hclk-ioi18-pips 26_17 27_21
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi18-pips 26_17 27_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP0.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi18-pips 26_17 29_26
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK0 origin:047-hclk-ioi18-pips 27_18 32_24
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK1 origin:047-hclk-ioi18-pips 27_22 32_24
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK2 origin:047-hclk-ioi18-pips 27_26 32_24
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK3 origin:047-hclk-ioi18-pips 27_29 32_24
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK4 origin:047-hclk-ioi18-pips 27_18 31_31
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK5 origin:047-hclk-ioi18-pips 27_22 31_31
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK6 origin:047-hclk-ioi18-pips 27_26 31_31
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK7 origin:047-hclk-ioi18-pips 27_29 31_31
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK8 origin:047-hclk-ioi18-pips 27_18 31_28
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK9 origin:047-hclk-ioi18-pips 27_22 31_28
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi18-pips 27_26 31_28
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP1.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi18-pips 27_29 31_28
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK0 origin:047-hclk-ioi18-pips 30_22 30_29
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK1 origin:047-hclk-ioi18-pips 30_22 30_27
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK2 origin:047-hclk-ioi18-pips 30_22 30_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK3 origin:047-hclk-ioi18-pips 30_22 30_23
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK4 origin:047-hclk-ioi18-pips 30_21 30_29
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK5 origin:047-hclk-ioi18-pips 30_21 30_27
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK6 origin:047-hclk-ioi18-pips 30_21 30_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK7 origin:047-hclk-ioi18-pips 30_21 30_23
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK8 origin:047-hclk-ioi18-pips 30_20 30_29
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK9 origin:047-hclk-ioi18-pips 30_20 30_27
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi18-pips 30_20 30_25
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP2.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi18-pips 30_20 30_23
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK0 origin:047-hclk-ioi18-pips 26_15 28_30
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK1 origin:047-hclk-ioi18-pips 26_15 28_26
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK2 origin:047-hclk-ioi18-pips 26_15 29_20
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK3 origin:047-hclk-ioi18-pips 26_15 29_22
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK4 origin:047-hclk-ioi18-pips 27_14 28_30
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK5 origin:047-hclk-ioi18-pips 27_14 28_26
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK6 origin:047-hclk-ioi18-pips 27_14 29_20
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK7 origin:047-hclk-ioi18-pips 27_14 29_22
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK8 origin:047-hclk-ioi18-pips 27_16 28_30
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK9 origin:047-hclk-ioi18-pips 27_16 28_26
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi18-pips 27_16 29_20
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP3.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi18-pips 27_16 29_22
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK0 origin:047-hclk-ioi18-pips 28_31 32_23
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK1 origin:047-hclk-ioi18-pips 28_27 32_23
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK2 origin:047-hclk-ioi18-pips 28_23 32_23
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK3 origin:047-hclk-ioi18-pips 28_21 32_23
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK4 origin:047-hclk-ioi18-pips 28_31 32_15
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK5 origin:047-hclk-ioi18-pips 28_27 32_15
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK6 origin:047-hclk-ioi18-pips 28_23 32_15
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK7 origin:047-hclk-ioi18-pips 28_21 32_15
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK8 origin:047-hclk-ioi18-pips 28_31 32_14
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK9 origin:047-hclk-ioi18-pips 28_27 32_14
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi18-pips 28_23 32_14
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP4.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi18-pips 28_21 32_14
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK0 origin:047-hclk-ioi18-pips 30_17 31_17
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK1 origin:047-hclk-ioi18-pips 30_17 31_15
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK2 origin:047-hclk-ioi18-pips 30_14 30_17
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK3 origin:047-hclk-ioi18-pips 30_16 30_17
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK4 origin:047-hclk-ioi18-pips 30_18 31_17
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK5 origin:047-hclk-ioi18-pips 30_18 31_15
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK6 origin:047-hclk-ioi18-pips 30_14 30_18
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK7 origin:047-hclk-ioi18-pips 30_16 30_18
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK8 origin:047-hclk-ioi18-pips 30_19 31_17
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK9 origin:047-hclk-ioi18-pips 30_19 31_15
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK10 origin:047-hclk-ioi18-pips 30_14 30_19
HCLK_IOI.HCLK_IOI_LEAF_GCLK_TOP5.HCLK_IOI_CK_IGCLK11 origin:047-hclk-ioi18-pips 30_16 30_19
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV0.HCLK_IOI_RCLK_IMUX0 origin:047-hclk-ioi18-pips 32_30 35_26
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV0.HCLK_IOI_RCLK_IMUX1 origin:047-hclk-ioi18-pips 32_30 35_27
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV0.HCLK_IOI_RCLK_IMUX2 origin:047-hclk-ioi18-pips 32_30 35_28
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV0.HCLK_IOI_RCLK_IMUX3 origin:047-hclk-ioi18-pips 32_30 35_29
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV0.HCLK_IOI_RCLK0 origin:047-hclk-ioi18-pips 32_30 35_23
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV0.HCLK_IOI_RCLK1 origin:047-hclk-ioi18-pips 32_30 35_24
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV0.HCLK_IOI_RCLK2 origin:047-hclk-ioi18-pips 32_30 34_31
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV0.HCLK_IOI_RCLK3 origin:047-hclk-ioi18-pips 32_30 35_25
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV1.HCLK_IOI_RCLK_IMUX0 origin:047-hclk-ioi18-pips 32_26 34_25
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV1.HCLK_IOI_RCLK_IMUX1 origin:047-hclk-ioi18-pips 32_26 34_26
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV1.HCLK_IOI_RCLK_IMUX2 origin:047-hclk-ioi18-pips 32_26 34_30
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV1.HCLK_IOI_RCLK_IMUX3 origin:047-hclk-ioi18-pips 32_26 34_29
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV1.HCLK_IOI_RCLK0 origin:047-hclk-ioi18-pips 32_26 36_26
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV1.HCLK_IOI_RCLK1 origin:047-hclk-ioi18-pips 32_26 36_27
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV1.HCLK_IOI_RCLK2 origin:047-hclk-ioi18-pips 32_26 34_23
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV1.HCLK_IOI_RCLK3 origin:047-hclk-ioi18-pips 32_26 34_24
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV2.HCLK_IOI_RCLK_IMUX0 origin:047-hclk-ioi18-pips 32_20 34_17
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV2.HCLK_IOI_RCLK_IMUX1 origin:047-hclk-ioi18-pips 32_20 34_18
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV2.HCLK_IOI_RCLK_IMUX2 origin:047-hclk-ioi18-pips 32_20 34_19
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV2.HCLK_IOI_RCLK_IMUX3 origin:047-hclk-ioi18-pips 32_20 34_20
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV2.HCLK_IOI_RCLK0 origin:047-hclk-ioi18-pips 32_20 36_24
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV2.HCLK_IOI_RCLK1 origin:047-hclk-ioi18-pips 32_20 36_25
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV2.HCLK_IOI_RCLK2 origin:047-hclk-ioi18-pips 32_20 34_15
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV2.HCLK_IOI_RCLK3 origin:047-hclk-ioi18-pips 32_20 34_16
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK_IMUX0 origin:047-hclk-ioi18-pips 32_19 35_18
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK_IMUX1 origin:047-hclk-ioi18-pips 32_19 35_17
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK_IMUX2 origin:047-hclk-ioi18-pips 32_19 35_16
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK_IMUX3 origin:047-hclk-ioi18-pips 32_19 35_15
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK0 origin:047-hclk-ioi18-pips 32_16 32_19
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK1 origin:047-hclk-ioi18-pips 32_19 35_21
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK2 origin:047-hclk-ioi18-pips 31_20 32_19
HCLK_IOI.HCLK_IOI_RCLK_BEFORE_DIV3.HCLK_IOI_RCLK3 origin:047-hclk-ioi18-pips 32_19 35_19
HCLK_IOI.ONLY_DIFF_IN_USE origin:030-iob18 40_31 41_15 41_30
HCLK_IOI.VREF.V_600_MV origin:030-iob18 40_19 40_27
HCLK_IOI.VREF.V_675_MV origin:030-iob18 40_19 40_28
HCLK_IOI.VREF.V_750_MV origin:030-iob18 40_19 40_26

62
zynq7/segbits_riob18.db Normal file
View File

@ -0,0 +1,62 @@
RIOB18.DIFF.ZIBUF_LOW_PWR 38_124 39_03
RIOB18.IOB_Y0.DCITERMDISABLE.I 39_65
RIOB18.IOB_Y0.IBUFDISABLE.I 38_88
RIOB18.IOB_Y0.LVDS.DRIVE.I_FIXED 38_24 38_48 !38_72 38_78 38_80 38_86 38_94 !38_104 39_33 39_47 39_49 39_73 39_79 !39_83 39_93 39_95 !39_97 39_103
RIOB18.IOB_Y0.LVDS.IN_ONLY 38_24 38_48 !38_72 38_78 38_80 !38_86 38_94 !38_104 39_33 39_47 39_49 !39_73 39_79 !39_83 !39_93 !39_95 !39_97 39_103
RIOB18.IOB_Y0.LVDS.IN_USE 38_24 38_48 38_78 38_80 38_94 39_33 39_47 39_49 39_79 39_103
RIOB18.IOB_Y0.LVDS.OUT !38_72 !38_82 38_86 !38_104 39_73 !39_77 !39_81 !39_83 39_93 39_95 !39_97
RIOB18.IOB_Y0.LVDS_SSTL12_SSTL135_SSTL15.IN_DIFF 38_126 39_01 !39_127
RIOB18.IOB_Y0.PULLTYPE.KEEPER 39_115 !39_117 39_123
RIOB18.IOB_Y0.PULLTYPE.NONE 39_115 !39_117 !39_123
RIOB18.IOB_Y0.PULLTYPE.PULLDOWN !39_115 !39_117 !39_123
RIOB18.IOB_Y0.PULLTYPE.PULLUP 39_115 39_117 !39_123
RIOB18.IOB_Y0.ZIBUF_LOW_PWR 39_125
RIOB18.IOB_Y0.LVCMOS12.DRIVE.I2_I4_I6_I8 38_72 !38_86 !38_104 !39_73 !39_83 39_93 39_95 !39_97
RIOB18.IOB_Y0.LVCMOS12.SLEW.FAST !38_82 38_114 39_77 !39_81 !39_89 !39_101 39_105 39_111 39_113
RIOB18.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18.IN 38_126 39_127
RIOB18.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18.SLEW.SLOW !38_82 !38_114 !39_77 !39_81 !39_89 !39_101 !39_105 !39_111 !39_113
RIOB18.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL12_SSTL135_SSTL15.IN_ONLY !38_72 38_78 38_80 !38_86 38_94 !38_104 !39_73 39_79 !39_83 !39_93 !39_95 !39_97 39_103
RIOB18.IOB_Y0.LVCMOS15.SLEW.FAST !38_82 !38_114 !39_77 39_81 !39_89 !39_101 !39_105 !39_111 !39_113
RIOB18.IOB_Y0.LVCMOS15_LVCMOS18.DRIVE.I12_I16_I2_I4_I6_I8 !38_72 !38_86 !38_104 !39_73 !39_83 39_93 39_95 !39_97
RIOB18.IOB_Y0.LVCMOS18.SLEW.FAST 38_82 !38_114 !39_77 39_81 39_89 !39_101 39_105 !39_111 39_113
RIOB18.IOB_Y0.SSTL12.DRIVE.I_FIXED !38_72 !38_86 38_94 38_104 !39_73 39_79 39_83 39_93 39_95 39_97
RIOB18.IOB_Y0.SSTL12.IN_USE !38_78 !38_80 38_94 39_79 !39_103
RIOB18.IOB_Y0.SSTL12.SLEW.FAST 38_82 38_114 !39_77 39_81 39_89 !39_101 39_105 39_111 39_113
RIOB18.IOB_Y0.SSTL12_SSTL135.SLEW.SLOW 38_82 !38_114 39_77 39_81 !39_89 !39_101 !39_105 !39_111 !39_113
RIOB18.IOB_Y0.SSTL12_SSTL135_SSTL15.IN !38_126 39_127
RIOB18.IOB_Y0.SSTL15.DRIVE.I_FIXED 38_72 38_78 38_80 !38_86 !38_104 !39_73 39_79 39_83 39_93 39_95 39_97
RIOB18.IOB_Y0.SSTL15.IN_USE 38_78 38_80 !38_94 39_79 !39_103
RIOB18.IOB_Y0.SSTL15.SLEW.FAST 38_82 38_114 39_77 !39_81 !39_89 39_101 39_105 39_111 39_113
RIOB18.IOB_Y0.SSTL15.SLEW.SLOW 38_82 !38_114 39_77 39_81 39_89 !39_101 !39_105 !39_111 !39_113
RIOB18.IOB_Y0.SSTL135.DRIVE.I_FIXED !38_72 38_78 !38_86 38_94 38_104 !39_73 !39_83 39_93 39_95 39_97
RIOB18.IOB_Y0.SSTL135.IN_USE 38_78 !38_80 38_94 !39_79 !39_103
RIOB18.IOB_Y0.SSTL135.SLEW.FAST 38_82 38_114 !39_77 39_81 39_89 39_101 39_105 39_111 39_113
RIOB18.IOB_Y1.DCITERMDISABLE.I 38_62
RIOB18.IOB_Y1.IBUFDISABLE.I 39_39
RIOB18.IOB_Y1.LVDS_SSTL12_SSTL135_SSTL15.IN_DIFF 38_00 38_126 39_01
RIOB18.IOB_Y1.PULLTYPE.KEEPER 38_04 !38_10 38_12
RIOB18.IOB_Y1.PULLTYPE.NONE !38_04 !38_10 38_12
RIOB18.IOB_Y1.PULLTYPE.PULLDOWN !38_04 !38_10 !38_12
RIOB18.IOB_Y1.PULLTYPE.PULLUP !38_04 38_10 38_12
RIOB18.IOB_Y1.ZIBUF_LOW_PWR 38_02
RIOB18.IOB_Y1.LVCMOS12.DRIVE.I2_I4_I6_I8 !38_30 38_32 38_34 !38_44 !39_23 39_55
RIOB18.IOB_Y1.LVCMOS12.SLEW.FAST 38_14 38_16 38_22 !38_26 !38_38 !38_46 38_50 39_13 !39_45
RIOB18.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18.IN 38_00 39_01
RIOB18.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18.SLEW.SLOW !38_14 !38_16 !38_22 !38_26 !38_38 !38_46 !38_50 !39_13 !39_45
RIOB18.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL12_SSTL135_SSTL15.IN_ONLY 38_24 !38_30 !38_32 !38_34 !38_44 38_48 !39_23 39_33 39_47 39_49 !39_55
RIOB18.IOB_Y1.LVCMOS15.SLEW.FAST !38_14 !38_16 !38_22 !38_26 !38_38 38_46 !38_50 !39_13 !39_45
RIOB18.IOB_Y1.LVCMOS15_LVCMOS18.DRIVE.I12_I16_I2_I4_I6_I8 !38_30 38_32 38_34 !38_44 !39_23 !39_55
RIOB18.IOB_Y1.LVCMOS18.SLEW.FAST 38_14 !38_16 38_22 !38_26 38_38 38_46 !38_50 !39_13 39_45
RIOB18.IOB_Y1.SSTL12.DRIVE.I_FIXED 38_30 38_32 38_34 38_44 38_48 39_23 39_33 !39_55
RIOB18.IOB_Y1.SSTL12.IN_USE 38_48 39_33 !39_47 !39_49
RIOB18.IOB_Y1.SSTL12.SLEW.FAST 38_14 38_16 38_22 !38_26 38_38 38_46 !38_50 39_13 39_45
RIOB18.IOB_Y1.SSTL12_SSTL135.SLEW.SLOW !38_14 !38_16 !38_22 !38_26 !38_38 38_46 38_50 !39_13 39_45
RIOB18.IOB_Y1.SSTL12_SSTL135_SSTL15.IN 38_00 !38_126 !39_01
RIOB18.IOB_Y1.SSTL15.DRIVE.I_FIXED 38_30 38_32 38_34 38_44 38_48 !39_23 39_47 39_49 39_55
RIOB18.IOB_Y1.SSTL15.IN_USE 38_48 !39_33 39_47 39_49
RIOB18.IOB_Y1.SSTL15.SLEW.FAST 38_14 38_16 38_22 38_26 !38_38 !38_46 38_50 39_13 39_45
RIOB18.IOB_Y1.SSTL15.SLEW.SLOW !38_14 !38_16 !38_22 !38_26 38_38 38_46 38_50 !39_13 39_45
RIOB18.IOB_Y1.SSTL135.DRIVE.I_FIXED 38_30 38_32 38_34 !38_44 39_23 39_33 39_49 !39_55
RIOB18.IOB_Y1.SSTL135.IN_USE !38_48 39_33 !39_47 39_49
RIOB18.IOB_Y1.SSTL135.SLEW.FAST 38_14 38_16 38_22 38_26 38_38 38_46 !38_50 39_13 39_45
RIOB18.OUT_DIFF 39_17 39_43

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@ -0,0 +1,62 @@
RIOB18.DIFF.ZIBUF_LOW_PWR origin:030-iob18 38_124 39_03
RIOB18.IOB_Y0.DCITERMDISABLE.I origin:030-iob18 39_65
RIOB18.IOB_Y0.IBUFDISABLE.I origin:030-iob18 38_88
RIOB18.IOB_Y0.LVDS.DRIVE.I_FIXED origin:030-iob18 !38_104 !38_72 !39_83 !39_97 38_24 38_48 38_78 38_80 38_86 38_94 39_103 39_33 39_47 39_49 39_73 39_79 39_93 39_95
RIOB18.IOB_Y0.LVDS.IN_ONLY origin:030-iob18 !38_104 !38_72 !38_86 !39_73 !39_83 !39_93 !39_95 !39_97 38_24 38_48 38_78 38_80 38_94 39_103 39_33 39_47 39_49 39_79
RIOB18.IOB_Y0.LVDS.IN_USE origin:030-iob18 38_24 38_48 38_78 38_80 38_94 39_103 39_33 39_47 39_49 39_79
RIOB18.IOB_Y0.LVDS.OUT origin:030-iob18 !38_104 !38_72 !38_82 !39_77 !39_81 !39_83 !39_97 38_86 39_73 39_93 39_95
RIOB18.IOB_Y0.LVDS_SSTL12_SSTL135_SSTL15.IN_DIFF origin:030-iob18 !39_127 38_126 39_01
RIOB18.IOB_Y0.PULLTYPE.KEEPER origin:030-iob18 !39_117 39_115 39_123
RIOB18.IOB_Y0.PULLTYPE.NONE origin:030-iob18 !39_117 !39_123 39_115
RIOB18.IOB_Y0.PULLTYPE.PULLDOWN origin:030-iob18 !39_115 !39_117 !39_123
RIOB18.IOB_Y0.PULLTYPE.PULLUP origin:030-iob18 !39_123 39_115 39_117
RIOB18.IOB_Y0.ZIBUF_LOW_PWR origin:030-iob18 39_125
RIOB18.IOB_Y0.LVCMOS12.DRIVE.I2_I4_I6_I8 origin:030-iob18 !38_104 !38_86 !39_73 !39_83 !39_97 38_72 39_93 39_95
RIOB18.IOB_Y0.LVCMOS12.SLEW.FAST origin:030-iob18 !38_82 !39_101 !39_81 !39_89 38_114 39_105 39_111 39_113 39_77
RIOB18.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18.IN origin:030-iob18 38_126 39_127
RIOB18.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18.SLEW.SLOW origin:030-iob18 !38_114 !38_82 !39_101 !39_105 !39_111 !39_113 !39_77 !39_81 !39_89
RIOB18.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL12_SSTL135_SSTL15.IN_ONLY origin:030-iob18 !38_104 !38_72 !38_86 !39_73 !39_83 !39_93 !39_95 !39_97 38_78 38_80 38_94 39_103 39_79
RIOB18.IOB_Y0.LVCMOS15.SLEW.FAST origin:030-iob18 !38_114 !38_82 !39_101 !39_105 !39_111 !39_113 !39_77 !39_89 39_81
RIOB18.IOB_Y0.LVCMOS15_LVCMOS18.DRIVE.I12_I16_I2_I4_I6_I8 origin:030-iob18 !38_104 !38_72 !38_86 !39_73 !39_83 !39_97 39_93 39_95
RIOB18.IOB_Y0.LVCMOS18.SLEW.FAST origin:030-iob18 !38_114 !39_101 !39_111 !39_77 38_82 39_105 39_113 39_81 39_89
RIOB18.IOB_Y0.SSTL12.DRIVE.I_FIXED origin:030-iob18 !38_72 !38_86 !39_73 38_104 38_94 39_79 39_83 39_93 39_95 39_97
RIOB18.IOB_Y0.SSTL12.IN_USE origin:030-iob18 !38_78 !38_80 !39_103 38_94 39_79
RIOB18.IOB_Y0.SSTL12.SLEW.FAST origin:030-iob18 !39_101 !39_77 38_114 38_82 39_105 39_111 39_113 39_81 39_89
RIOB18.IOB_Y0.SSTL12_SSTL135.SLEW.SLOW origin:030-iob18 !38_114 !39_101 !39_105 !39_111 !39_113 !39_89 38_82 39_77 39_81
RIOB18.IOB_Y0.SSTL12_SSTL135_SSTL15.IN origin:030-iob18 !38_126 39_127
RIOB18.IOB_Y0.SSTL15.DRIVE.I_FIXED origin:030-iob18 !38_104 !38_86 !39_73 38_72 38_78 38_80 39_79 39_83 39_93 39_95 39_97
RIOB18.IOB_Y0.SSTL15.IN_USE origin:030-iob18 !38_94 !39_103 38_78 38_80 39_79
RIOB18.IOB_Y0.SSTL15.SLEW.FAST origin:030-iob18 !39_81 !39_89 38_114 38_82 39_101 39_105 39_111 39_113 39_77
RIOB18.IOB_Y0.SSTL15.SLEW.SLOW origin:030-iob18 !38_114 !39_101 !39_105 !39_111 !39_113 38_82 39_77 39_81 39_89
RIOB18.IOB_Y0.SSTL135.DRIVE.I_FIXED origin:030-iob18 !38_72 !38_86 !39_73 !39_83 38_104 38_78 38_94 39_93 39_95 39_97
RIOB18.IOB_Y0.SSTL135.IN_USE origin:030-iob18 !38_80 !39_103 !39_79 38_78 38_94
RIOB18.IOB_Y0.SSTL135.SLEW.FAST origin:030-iob18 !39_77 38_114 38_82 39_101 39_105 39_111 39_113 39_81 39_89
RIOB18.IOB_Y1.DCITERMDISABLE.I origin:030-iob18 38_62
RIOB18.IOB_Y1.IBUFDISABLE.I origin:030-iob18 39_39
RIOB18.IOB_Y1.LVDS_SSTL12_SSTL135_SSTL15.IN_DIFF origin:030-iob18 38_00 38_126 39_01
RIOB18.IOB_Y1.PULLTYPE.KEEPER origin:030-iob18 !38_10 38_04 38_12
RIOB18.IOB_Y1.PULLTYPE.NONE origin:030-iob18 !38_04 !38_10 38_12
RIOB18.IOB_Y1.PULLTYPE.PULLDOWN origin:030-iob18 !38_04 !38_10 !38_12
RIOB18.IOB_Y1.PULLTYPE.PULLUP origin:030-iob18 !38_04 38_10 38_12
RIOB18.IOB_Y1.ZIBUF_LOW_PWR origin:030-iob18 38_02
RIOB18.IOB_Y1.LVCMOS12.DRIVE.I2_I4_I6_I8 origin:030-iob18 !38_30 !38_44 !39_23 38_32 38_34 39_55
RIOB18.IOB_Y1.LVCMOS12.SLEW.FAST origin:030-iob18 !38_26 !38_38 !38_46 !39_45 38_14 38_16 38_22 38_50 39_13
RIOB18.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18.IN origin:030-iob18 38_00 39_01
RIOB18.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18.SLEW.SLOW origin:030-iob18 !38_14 !38_16 !38_22 !38_26 !38_38 !38_46 !38_50 !39_13 !39_45
RIOB18.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL12_SSTL135_SSTL15.IN_ONLY origin:030-iob18 !38_30 !38_32 !38_34 !38_44 !39_23 !39_55 38_24 38_48 39_33 39_47 39_49
RIOB18.IOB_Y1.LVCMOS15.SLEW.FAST origin:030-iob18 !38_14 !38_16 !38_22 !38_26 !38_38 !38_50 !39_13 !39_45 38_46
RIOB18.IOB_Y1.LVCMOS15_LVCMOS18.DRIVE.I12_I16_I2_I4_I6_I8 origin:030-iob18 !38_30 !38_44 !39_23 !39_55 38_32 38_34
RIOB18.IOB_Y1.LVCMOS18.SLEW.FAST origin:030-iob18 !38_16 !38_26 !38_50 !39_13 38_14 38_22 38_38 38_46 39_45
RIOB18.IOB_Y1.SSTL12.DRIVE.I_FIXED origin:030-iob18 !39_55 38_30 38_32 38_34 38_44 38_48 39_23 39_33
RIOB18.IOB_Y1.SSTL12.IN_USE origin:030-iob18 !39_47 !39_49 38_48 39_33
RIOB18.IOB_Y1.SSTL12.SLEW.FAST origin:030-iob18 !38_26 !38_50 38_14 38_16 38_22 38_38 38_46 39_13 39_45
RIOB18.IOB_Y1.SSTL12_SSTL135.SLEW.SLOW origin:030-iob18 !38_14 !38_16 !38_22 !38_26 !38_38 !39_13 38_46 38_50 39_45
RIOB18.IOB_Y1.SSTL12_SSTL135_SSTL15.IN origin:030-iob18 !38_126 !39_01 38_00
RIOB18.IOB_Y1.SSTL15.DRIVE.I_FIXED origin:030-iob18 !39_23 38_30 38_32 38_34 38_44 38_48 39_47 39_49 39_55
RIOB18.IOB_Y1.SSTL15.IN_USE origin:030-iob18 !39_33 38_48 39_47 39_49
RIOB18.IOB_Y1.SSTL15.SLEW.FAST origin:030-iob18 !38_38 !38_46 38_14 38_16 38_22 38_26 38_50 39_13 39_45
RIOB18.IOB_Y1.SSTL15.SLEW.SLOW origin:030-iob18 !38_14 !38_16 !38_22 !38_26 !39_13 38_38 38_46 38_50 39_45
RIOB18.IOB_Y1.SSTL135.DRIVE.I_FIXED origin:030-iob18 !38_44 !39_55 38_30 38_32 38_34 39_23 39_33 39_49
RIOB18.IOB_Y1.SSTL135.IN_USE origin:030-iob18 !38_48 !39_47 39_33 39_49
RIOB18.IOB_Y1.SSTL135.SLEW.FAST origin:030-iob18 !38_50 38_14 38_16 38_22 38_26 38_38 38_46 39_13 39_45
RIOB18.OUT_DIFF origin:030-iob18 39_17 39_43

398
zynq7/segbits_rioi.db Normal file
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@ -0,0 +1,398 @@
RIOI.IDELAY_Y0.CINVCTRL_SEL 35_89
RIOI.IDELAY_Y0.DELAY_SRC_DATAIN !34_72 35_69
RIOI.IDELAY_Y0.DELAY_SRC_IDATAIN 34_72 !35_69
RIOI.IDELAY_Y0.HIGH_PERFORMANCE_MODE 32_109
RIOI.IDELAY_Y0.IDELAY_TYPE_FIXED !35_113 !35_119
RIOI.IDELAY_Y0.IDELAY_TYPE_VAR_LOAD 35_113 35_119
RIOI.IDELAY_Y0.IDELAY_TYPE_VARIABLE !35_113 35_119
RIOI.IDELAY_Y0.IDELAY_VALUE[0] !34_120 34_122
RIOI.IDELAY_Y0.IDELAY_VALUE[1] !34_114 34_116
RIOI.IDELAY_Y0.IDELAY_VALUE[2] !34_108 34_110
RIOI.IDELAY_Y0.IDELAY_VALUE[3] !34_100 34_102
RIOI.IDELAY_Y0.IDELAY_VALUE[4] !34_94 34_96
RIOI.IDELAY_Y0.IN_USE 32_73
RIOI.IDELAY_Y0.IS_DATAIN_INVERTED 35_81
RIOI.IDELAY_Y0.IS_IDATAIN_INVERTED 33_72
RIOI.IDELAY_Y0.PIPE_SEL 34_106
RIOI.IDELAY_Y0.ZIDELAY_VALUE[0] 34_120 !34_122
RIOI.IDELAY_Y0.ZIDELAY_VALUE[1] 34_114 !34_116
RIOI.IDELAY_Y0.ZIDELAY_VALUE[2] 34_108 !34_110
RIOI.IDELAY_Y0.ZIDELAY_VALUE[3] 34_100 !34_102
RIOI.IDELAY_Y0.ZIDELAY_VALUE[4] 34_94 !34_96
RIOI.IDELAY_Y1.CINVCTRL_SEL 34_38
RIOI.IDELAY_Y1.DELAY_SRC_DATAIN 34_58 !35_55
RIOI.IDELAY_Y1.DELAY_SRC_IDATAIN !34_58 35_55
RIOI.IDELAY_Y1.HIGH_PERFORMANCE_MODE 33_18
RIOI.IDELAY_Y1.IDELAY_TYPE_FIXED !34_08 !34_14
RIOI.IDELAY_Y1.IDELAY_TYPE_VAR_LOAD 34_08 34_14
RIOI.IDELAY_Y1.IDELAY_TYPE_VARIABLE 34_08 !34_14
RIOI.IDELAY_Y1.IDELAY_VALUE[0] 35_05 !35_07
RIOI.IDELAY_Y1.IDELAY_VALUE[1] 35_11 !35_13
RIOI.IDELAY_Y1.IDELAY_VALUE[2] 35_17 !35_19
RIOI.IDELAY_Y1.IDELAY_VALUE[3] 35_25 !35_27
RIOI.IDELAY_Y1.IDELAY_VALUE[4] 35_31 !35_33
RIOI.IDELAY_Y1.IN_USE 33_54
RIOI.IDELAY_Y1.IS_DATAIN_INVERTED 34_46
RIOI.IDELAY_Y1.IS_IDATAIN_INVERTED 32_55
RIOI.IDELAY_Y1.PIPE_SEL 35_21
RIOI.IDELAY_Y1.ZIDELAY_VALUE[0] !35_05 35_07
RIOI.IDELAY_Y1.ZIDELAY_VALUE[1] !35_11 35_13
RIOI.IDELAY_Y1.ZIDELAY_VALUE[2] !35_17 35_19
RIOI.IDELAY_Y1.ZIDELAY_VALUE[3] !35_25 35_27
RIOI.IDELAY_Y1.ZIDELAY_VALUE[4] !35_31 35_33
RIOI.ILOGIC_Y0.IDDR.IN_USE 26_71 26_121 27_70
RIOI.ILOGIC_Y0.IDDR_OR_ISERDES.IN_USE 26_71 27_70
RIOI.ILOGIC_Y0.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE !26_99 27_98
RIOI.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE 26_99 !27_98
RIOI.ILOGIC_Y0.IFF.INV_OCLK 28_124
RIOI.ILOGIC_Y0.IFF.SRTYPE.ASYNC !29_67
RIOI.ILOGIC_Y0.IFF.SRTYPE.SYNC 29_67
RIOI.ILOGIC_Y0.IFF.ZINIT_Q1 28_72
RIOI.ILOGIC_Y0.IFF.ZINIT_Q2 28_76
RIOI.ILOGIC_Y0.IFF.ZINIT_Q3 28_86
RIOI.ILOGIC_Y0.IFF.ZINIT_Q4 28_94
RIOI.ILOGIC_Y0.IFF.ZINV_C 28_126 29_123 29_125
RIOI.ILOGIC_Y0.IFF.ZINV_OCLK 28_64
RIOI.ILOGIC_Y0.IFF.ZSRVAL_Q1 29_71
RIOI.ILOGIC_Y0.IFF.ZSRVAL_Q2 29_75
RIOI.ILOGIC_Y0.IFF.ZSRVAL_Q3 29_85
RIOI.ILOGIC_Y0.IFF.ZSRVAL_Q4 29_93
RIOI.ILOGIC_Y0.ISERDES.DYN_CLK_INV_EN 29_127
RIOI.ILOGIC_Y0.ISERDES.DYN_CLKDIV_INV_EN 27_118
RIOI.ILOGIC_Y0.ISERDES.IN_USE 27_102 28_110
RIOI.ILOGIC_Y0.ISERDES.MEMORY.DDR.W4 26_71 !26_101 !26_107 !26_109 !26_111 !26_115 !26_121 27_70 27_98 27_102 !27_108 27_110 !27_112 28_110 29_67
RIOI.ILOGIC_Y0.ISERDES.MEMORY_QDR.DDR.W4 26_71 !26_101 !26_107 !26_109 !26_111 !26_115 26_121 27_70 27_98 27_102 !27_108 27_110 !27_112 28_110 29_67
RIOI.ILOGIC_Y0.ISERDES.MEMORY_DDR3.DDR.W4 26_71 26_101 26_117 26_121 27_70 27_98 27_102 27_110 28_110 29_67
RIOI.ILOGIC_Y0.ISERDES.MODE.MASTER !27_106
RIOI.ILOGIC_Y0.ISERDES.MODE.SLAVE 27_106
RIOI.ILOGIC_Y0.ISERDES.NETWORKING.DDR.W4 26_71 !26_101 26_107 !26_109 !26_111 !26_115 26_121 27_70 27_98 27_102 !27_108 27_110 !27_112 28_110 29_67
RIOI.ILOGIC_Y0.ISERDES.NETWORKING.DDR.W6 26_71 !26_101 26_107 !26_109 26_111 !26_115 26_121 27_70 27_98 27_102 !27_108 27_110 !27_112 28_110 29_67
RIOI.ILOGIC_Y0.ISERDES.NETWORKING.DDR.W8 26_71 !26_101 26_107 26_109 !26_111 !26_115 26_121 27_70 27_98 27_102 !27_108 !27_110 !27_112 28_110 29_67
RIOI.ILOGIC_Y0.ISERDES.NETWORKING.DDR.W10 26_71 !26_101 26_107 26_109 26_111 !26_115 26_121 27_70 27_98 27_102 !27_108 !27_110 !27_112 28_110 29_67
RIOI.ILOGIC_Y0.ISERDES.NETWORKING.DDR.W14 26_71 !26_101 26_107 26_109 26_111 !26_115 26_121 27_70 27_98 27_102 !27_108 27_110 !27_112 28_110 29_67
RIOI.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W2 26_71 !26_101 26_107 !26_109 26_111 !26_115 26_121 27_70 27_98 27_102 27_108 !27_110 !27_112 28_110 29_67
RIOI.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W3 26_71 !26_101 26_107 !26_109 26_111 !26_115 26_121 27_70 27_98 27_102 27_108 !27_110 27_112 28_110 29_67
RIOI.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W4 26_71 !26_101 26_107 !26_109 !26_111 !26_115 26_121 27_70 27_98 27_102 27_108 27_110 !27_112 28_110 29_67
RIOI.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W5 26_71 !26_101 26_107 !26_109 !26_111 !26_115 26_121 27_70 27_98 27_102 27_108 27_110 27_112 28_110 29_67
RIOI.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W6 26_71 !26_101 26_107 !26_109 26_111 !26_115 26_121 27_70 27_98 27_102 27_108 27_110 !27_112 28_110 29_67
RIOI.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W7 26_71 !26_101 26_107 !26_109 26_111 !26_115 26_121 27_70 27_98 27_102 27_108 27_110 27_112 28_110 29_67
RIOI.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W8 26_71 !26_101 26_107 26_109 !26_111 !26_115 26_121 27_70 27_98 27_102 27_108 !27_110 !27_112 28_110 29_67
RIOI.ILOGIC_Y0.ISERDES.NUM_CE.N1 !27_80
RIOI.ILOGIC_Y0.ISERDES.NUM_CE.N2 27_80
RIOI.ILOGIC_Y0.ISERDES.OFB_USED 29_103 29_113
RIOI.ILOGIC_Y0.ISERDES.OVERSAMPLE.DDR.W4 26_71 26_101 26_107 !26_109 !26_111 26_115 26_121 27_70 27_98 27_102 !27_108 27_110 !27_112 28_110 29_67
RIOI.ILOGIC_Y0.ZINV_D 29_109
RIOI.ILOGIC_Y0.IDELMUXE3.P0 29_101
RIOI.ILOGIC_Y0.IDELMUXE3.P1 !29_101
RIOI.ILOGIC_Y0.IFFDELMUXE3.P0 28_116
RIOI.ILOGIC_Y1.IDDR.IN_USE 26_57 27_06 27_56
RIOI.ILOGIC_Y1.IDDR_OR_ISERDES.IN_USE 26_57 27_56
RIOI.ILOGIC_Y1.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE 26_29 !27_28
RIOI.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE !26_29 27_28
RIOI.ILOGIC_Y1.IFF.INV_OCLK 29_03
RIOI.ILOGIC_Y1.IFF.SRTYPE.ASYNC !28_60
RIOI.ILOGIC_Y1.IFF.SRTYPE.SYNC 28_60
RIOI.ILOGIC_Y1.IFF.ZINIT_Q1 29_55
RIOI.ILOGIC_Y1.IFF.ZINIT_Q2 29_51
RIOI.ILOGIC_Y1.IFF.ZINIT_Q3 29_41
RIOI.ILOGIC_Y1.IFF.ZINIT_Q4 29_33
RIOI.ILOGIC_Y1.IFF.ZINV_C 28_02 28_04 29_01
RIOI.ILOGIC_Y1.IFF.ZINV_OCLK 29_63
RIOI.ILOGIC_Y1.IFF.ZSRVAL_Q1 28_56
RIOI.ILOGIC_Y1.IFF.ZSRVAL_Q2 28_52
RIOI.ILOGIC_Y1.IFF.ZSRVAL_Q3 28_42
RIOI.ILOGIC_Y1.IFF.ZSRVAL_Q4 28_34
RIOI.ILOGIC_Y1.ISERDES.DYN_CLK_INV_EN 28_00
RIOI.ILOGIC_Y1.ISERDES.DYN_CLKDIV_INV_EN 26_09
RIOI.ILOGIC_Y1.ISERDES.IN_USE 26_25 29_17
RIOI.ILOGIC_Y1.ISERDES.MEMORY.DDR.W4 !26_15 26_17 !26_19 26_25 26_29 26_57 !27_06 !27_12 !27_16 !27_18 !27_20 !27_26 27_56 28_60 29_17
RIOI.ILOGIC_Y1.ISERDES.MEMORY_QDR.DDR.W4 !26_15 26_17 !26_19 26_25 26_29 26_57 27_06 !27_12 !27_16 !27_18 !27_20 !27_26 27_56 28_60 29_17
RIOI.ILOGIC_Y1.ISERDES.MEMORY_DDR3.DDR.W4 26_17 26_25 26_29 26_57 27_06 27_10 27_26 27_56 28_60 29_17
RIOI.ILOGIC_Y1.ISERDES.MODE.MASTER !26_21
RIOI.ILOGIC_Y1.ISERDES.MODE.SLAVE 26_21
RIOI.ILOGIC_Y1.ISERDES.NETWORKING.DDR.W4 !26_15 26_17 !26_19 26_25 26_29 26_57 27_06 !27_12 !27_16 !27_18 27_20 !27_26 27_56 28_60 29_17
RIOI.ILOGIC_Y1.ISERDES.NETWORKING.DDR.W6 !26_15 26_17 !26_19 26_25 26_29 26_57 27_06 !27_12 27_16 !27_18 27_20 !27_26 27_56 28_60 29_17
RIOI.ILOGIC_Y1.ISERDES.NETWORKING.DDR.W8 !26_15 !26_17 !26_19 26_25 26_29 26_57 27_06 !27_12 !27_16 27_18 27_20 !27_26 27_56 28_60 29_17
RIOI.ILOGIC_Y1.ISERDES.NETWORKING.DDR.W10 !26_15 !26_17 !26_19 26_25 26_29 26_57 27_06 !27_12 27_16 27_18 27_20 !27_26 27_56 28_60 29_17
RIOI.ILOGIC_Y1.ISERDES.NETWORKING.DDR.W14 !26_15 26_17 !26_19 26_25 26_29 26_57 27_06 !27_12 27_16 27_18 27_20 !27_26 27_56 28_60 29_17
RIOI.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W2 !26_15 !26_17 26_19 26_25 26_29 26_57 27_06 !27_12 27_16 !27_18 27_20 !27_26 27_56 28_60 29_17
RIOI.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W3 26_15 !26_17 26_19 26_25 26_29 26_57 27_06 !27_12 27_16 !27_18 27_20 !27_26 27_56 28_60 29_17
RIOI.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W4 !26_15 26_17 26_19 26_25 26_29 26_57 27_06 !27_12 !27_16 !27_18 27_20 !27_26 27_56 28_60 29_17
RIOI.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W5 26_15 26_17 26_19 26_25 26_29 26_57 27_06 !27_12 !27_16 !27_18 27_20 !27_26 27_56 28_60 29_17
RIOI.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W6 !26_15 26_17 26_19 26_25 26_29 26_57 27_06 !27_12 27_16 !27_18 27_20 !27_26 27_56 28_60 29_17
RIOI.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W7 26_15 26_17 26_19 26_25 26_29 26_57 27_06 !27_12 27_16 !27_18 27_20 !27_26 27_56 28_60 29_17
RIOI.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W8 !26_15 !26_17 26_19 26_25 26_29 26_57 27_06 !27_12 !27_16 27_18 27_20 !27_26 27_56 28_60 29_17
RIOI.ILOGIC_Y1.ISERDES.NUM_CE.N1 !26_47
RIOI.ILOGIC_Y1.ISERDES.NUM_CE.N2 26_47
RIOI.ILOGIC_Y1.ISERDES.OFB_USED 28_14 28_24
RIOI.ILOGIC_Y1.ISERDES.OVERSAMPLE.DDR.W4 !26_15 26_17 !26_19 26_25 26_29 26_57 27_06 27_12 !27_16 !27_18 27_20 27_26 27_56 28_60 29_17
RIOI.ILOGIC_Y1.ZINV_D 28_18
RIOI.ILOGIC_Y1.IDELMUXE3.P0 28_26
RIOI.ILOGIC_Y1.IDELMUXE3.P1 !28_26
RIOI.ILOGIC_Y1.IFFDELMUXE3.P0 29_11
RIOI.IOI_OCLK_0.IOI_LEAF_GCLK0 28_83 28_95 29_88
RIOI.IOI_OCLK_0.IOI_LEAF_GCLK1 28_83 28_97 29_88
RIOI.IOI_OCLK_0.IOI_LEAF_GCLK2 28_83 29_88 29_94
RIOI.IOI_OCLK_0.IOI_LEAF_GCLK3 28_83 29_88 29_96
RIOI.IOI_OCLK_0.IOI_LEAF_GCLK4 28_83 28_89 28_95
RIOI.IOI_OCLK_0.IOI_LEAF_GCLK5 28_83 28_89 28_97
RIOI.IOI_OCLK_0.IOI_RCLK_FORIO0 28_83 28_89 29_94
RIOI.IOI_OCLK_0.IOI_RCLK_FORIO1 28_83 28_89 29_96
RIOI.IOI_OCLK_0.IOI_RCLK_FORIO2 28_83 28_95 29_92
RIOI.IOI_OCLK_0.IOI_RCLK_FORIO3 28_83 28_97 29_92
RIOI.IOI_OCLK_0.IOI_IMUX31_1 28_83 28_93 29_94
RIOI.IOI_OCLK_0.IOI_IOCLK0 28_83 29_92 29_94
RIOI.IOI_OCLK_0.IOI_IOCLK1 28_83 29_92 29_96
RIOI.IOI_OCLK_0.IOI_IOCLK2 28_83 28_93 28_95
RIOI.IOI_OCLK_0.IOI_IOCLK3 28_83 28_93 28_97
RIOI.IOI_OCLK_1.IOI_LEAF_GCLK0 28_39 29_32 29_44
RIOI.IOI_OCLK_1.IOI_LEAF_GCLK1 28_39 29_30 29_44
RIOI.IOI_OCLK_1.IOI_LEAF_GCLK2 28_33 28_39 29_44
RIOI.IOI_OCLK_1.IOI_LEAF_GCLK3 28_31 28_39 29_44
RIOI.IOI_OCLK_1.IOI_LEAF_GCLK4 29_32 29_38 29_44
RIOI.IOI_OCLK_1.IOI_LEAF_GCLK5 29_30 29_38 29_44
RIOI.IOI_OCLK_1.IOI_RCLK_FORIO0 28_33 29_38 29_44
RIOI.IOI_OCLK_1.IOI_RCLK_FORIO1 28_31 29_38 29_44
RIOI.IOI_OCLK_1.IOI_RCLK_FORIO2 28_35 29_32 29_44
RIOI.IOI_OCLK_1.IOI_RCLK_FORIO3 28_35 29_30 29_44
RIOI.IOI_OCLK_1.IOI_IMUX31_0 28_33 29_34 29_44
RIOI.IOI_OCLK_1.IOI_IOCLK0 28_33 28_35 29_44
RIOI.IOI_OCLK_1.IOI_IOCLK1 28_31 28_35 29_44
RIOI.IOI_OCLK_1.IOI_IOCLK2 29_32 29_34 29_44
RIOI.IOI_OCLK_1.IOI_IOCLK3 29_30 29_34 29_44
RIOI.IOI_OCLKM_0.IOI_LEAF_GCLK0 30_88 31_83 31_95
RIOI.IOI_OCLKM_0.IOI_LEAF_GCLK1 30_88 31_83 31_97
RIOI.IOI_OCLKM_0.IOI_LEAF_GCLK2 30_88 30_94 31_83
RIOI.IOI_OCLKM_0.IOI_LEAF_GCLK3 30_88 30_96 31_83
RIOI.IOI_OCLKM_0.IOI_LEAF_GCLK4 31_83 31_89 31_95
RIOI.IOI_OCLKM_0.IOI_LEAF_GCLK5 31_83 31_89 31_97
RIOI.IOI_OCLKM_0.IOI_RCLK_FORIO0 30_94 31_83 31_89
RIOI.IOI_OCLKM_0.IOI_RCLK_FORIO1 30_96 31_83 31_89
RIOI.IOI_OCLKM_0.IOI_RCLK_FORIO2 30_92 31_83 31_95
RIOI.IOI_OCLKM_0.IOI_RCLK_FORIO3 30_92 31_83 31_97
RIOI.IOI_OCLKM_0.IOI_IOCLK0 30_92 30_94 31_83
RIOI.IOI_OCLKM_0.IOI_IOCLK1 30_92 30_96 31_83
RIOI.IOI_OCLKM_0.IOI_IOCLK2 31_83 31_93 31_95
RIOI.IOI_OCLKM_0.IOI_IOCLK3 31_83 31_93 31_97
RIOI.IOI_OCLKM_1.IOI_LEAF_GCLK0 30_32 30_44 31_39
RIOI.IOI_OCLKM_1.IOI_LEAF_GCLK1 30_30 30_44 31_39
RIOI.IOI_OCLKM_1.IOI_LEAF_GCLK2 30_44 31_33 31_39
RIOI.IOI_OCLKM_1.IOI_LEAF_GCLK3 30_44 31_31 31_39
RIOI.IOI_OCLKM_1.IOI_LEAF_GCLK4 30_32 30_38 30_44
RIOI.IOI_OCLKM_1.IOI_LEAF_GCLK5 30_30 30_38 30_44
RIOI.IOI_OCLKM_1.IOI_RCLK_FORIO0 30_38 30_44 31_33
RIOI.IOI_OCLKM_1.IOI_RCLK_FORIO1 30_38 30_44 31_31
RIOI.IOI_OCLKM_1.IOI_RCLK_FORIO2 30_32 30_44 31_35
RIOI.IOI_OCLKM_1.IOI_RCLK_FORIO3 30_30 30_44 31_35
RIOI.IOI_OCLKM_1.IOI_IOCLK0 30_44 31_33 31_35
RIOI.IOI_OCLKM_1.IOI_IOCLK1 30_44 31_31 31_35
RIOI.IOI_OCLKM_1.IOI_IOCLK2 30_32 30_34 30_44
RIOI.IOI_OCLKM_1.IOI_IOCLK3 30_30 30_34 30_44
RIOI.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK0 28_67 28_79 29_74
RIOI.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK1 28_67 28_81 29_74
RIOI.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK2 28_67 29_74 29_78
RIOI.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK3 28_67 29_74 29_80
RIOI.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK4 28_67 28_75 28_79
RIOI.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK5 28_67 28_75 28_81
RIOI.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO0 28_67 28_75 29_78
RIOI.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO1 28_67 28_75 29_80
RIOI.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO2 28_67 28_79 29_76
RIOI.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO3 28_67 28_81 29_76
RIOI.IOI_ILOGIC0_CLK.IOI_IMUX20_1 28_67 28_77 29_80
RIOI.IOI_ILOGIC0_CLK.IOI_IMUX22_1 28_67 28_77 29_78
RIOI.IOI_ILOGIC0_CLK.IOI_IOCLK0 28_67 29_76 29_78
RIOI.IOI_ILOGIC0_CLK.IOI_IOCLK1 28_67 29_76 29_80
RIOI.IOI_ILOGIC0_CLK.IOI_IOCLK2 28_67 28_77 28_79
RIOI.IOI_ILOGIC0_CLK.IOI_IOCLK3 28_67 28_77 28_81
RIOI.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK0 30_74 31_67 31_79
RIOI.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK1 30_74 31_67 31_81
RIOI.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK2 30_74 30_78 31_67
RIOI.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK3 30_74 30_80 31_67
RIOI.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK4 31_67 31_75 31_79
RIOI.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK5 31_67 31_75 31_81
RIOI.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO0 30_78 31_67 31_75
RIOI.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 30_80 31_67 31_75
RIOI.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 30_76 31_67 31_79
RIOI.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 30_76 31_67 31_81
RIOI.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 30_80 31_67 31_77
RIOI.IOI_ILOGIC0_CLKB.IOI_IMUX22_1 30_78 31_67 31_77
RIOI.IOI_ILOGIC0_CLKB.IOI_IOCLK0 30_76 30_78 31_67
RIOI.IOI_ILOGIC0_CLKB.IOI_IOCLK1 30_76 30_80 31_67
RIOI.IOI_ILOGIC0_CLKB.IOI_IOCLK2 31_67 31_77 31_79
RIOI.IOI_ILOGIC0_CLKB.IOI_IOCLK3 31_67 31_77 31_81
RIOI.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK0 28_53 29_48 29_60
RIOI.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK1 28_53 29_46 29_60
RIOI.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK2 28_49 28_53 29_60
RIOI.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK3 28_47 28_53 29_60
RIOI.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK4 29_48 29_52 29_60
RIOI.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK5 29_46 29_52 29_60
RIOI.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO0 28_49 29_52 29_60
RIOI.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO1 28_47 29_52 29_60
RIOI.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO2 28_51 29_48 29_60
RIOI.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO3 28_51 29_46 29_60
RIOI.IOI_ILOGIC1_CLK.IOI_IMUX20_0 28_47 29_50 29_60
RIOI.IOI_ILOGIC1_CLK.IOI_IMUX22_0 28_49 29_50 29_60
RIOI.IOI_ILOGIC1_CLK.IOI_IOCLK0 28_49 28_51 29_60
RIOI.IOI_ILOGIC1_CLK.IOI_IOCLK1 28_47 28_51 29_60
RIOI.IOI_ILOGIC1_CLK.IOI_IOCLK2 29_48 29_50 29_60
RIOI.IOI_ILOGIC1_CLK.IOI_IOCLK3 29_46 29_50 29_60
RIOI.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK0 30_48 30_60 31_53
RIOI.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK1 30_46 30_60 31_53
RIOI.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK2 30_60 31_49 31_53
RIOI.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK3 30_60 31_47 31_53
RIOI.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK4 30_48 30_52 30_60
RIOI.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK5 30_46 30_52 30_60
RIOI.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO0 30_52 30_60 31_49
RIOI.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO1 30_52 30_60 31_47
RIOI.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO2 30_48 30_60 31_51
RIOI.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO3 30_46 30_60 31_51
RIOI.IOI_ILOGIC1_CLKB.IOI_IMUX20_0 30_50 30_60 31_47
RIOI.IOI_ILOGIC1_CLKB.IOI_IMUX22_0 30_50 30_60 31_49
RIOI.IOI_ILOGIC1_CLKB.IOI_IOCLK0 30_60 31_49 31_51
RIOI.IOI_ILOGIC1_CLKB.IOI_IOCLK1 30_60 31_47 31_51
RIOI.IOI_ILOGIC1_CLKB.IOI_IOCLK2 30_48 30_50 30_60
RIOI.IOI_ILOGIC1_CLKB.IOI_IOCLK3 30_46 30_50 30_60
RIOI.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK0 28_111 29_118 29_124 30_118 30_124 31_111
RIOI.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK1 28_111 29_118 29_126 30_118 30_126 31_111
RIOI.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK2 28_111 28_123 29_118 30_118 31_111 31_123
RIOI.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK3 28_111 28_125 29_118 30_118 31_111 31_125
RIOI.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK4 28_111 28_119 29_124 30_124 31_111 31_119
RIOI.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK5 28_111 28_119 29_126 30_126 31_111 31_119
RIOI.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO0 28_111 28_119 28_123 31_111 31_119 31_123
RIOI.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO1 28_111 28_119 28_125 31_111 31_119 31_125
RIOI.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO2 28_111 28_121 29_124 30_124 31_111 31_121
RIOI.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO3 28_111 28_121 29_126 30_126 31_111 31_121
RIOI.IOI_OLOGIC0_CLKDIV.IOI_IMUX8_1 28_111 28_121 28_123 31_111 31_121 31_123
RIOI.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK0 28_03 28_09 29_16 30_16 31_03 31_09
RIOI.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK1 28_01 28_09 29_16 30_16 31_01 31_09
RIOI.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK2 28_09 29_04 29_16 30_04 30_16 31_09
RIOI.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK3 28_09 29_02 29_16 30_02 30_16 31_09
RIOI.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK4 28_03 29_08 29_16 30_08 30_16 31_03
RIOI.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK5 28_01 29_08 29_16 30_08 30_16 31_01
RIOI.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO0 29_04 29_08 29_16 30_04 30_08 30_16
RIOI.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO1 29_02 29_08 29_16 30_02 30_08 30_16
RIOI.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO2 28_03 29_06 29_16 30_06 30_16 31_03
RIOI.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO3 28_01 29_06 29_16 30_06 30_16 31_01
RIOI.IOI_OLOGIC1_CLKDIV.IOI_IMUX8_0 29_04 29_06 29_16 30_04 30_06 30_16
RIOI.ODELAY_Y0.CINVCTRL_SEL 37_89
RIOI.ODELAY_Y0.HIGH_PERFORMANCE_MODE 34_109
RIOI.ODELAY_Y0.IN_USE 34_73 36_72 39_75
RIOI.ODELAY_Y0.IS_C_INVERTED 36_88
RIOI.ODELAY_Y0.ODELAY_TYPE_VAR_LOAD 37_113 37_119
RIOI.ODELAY_Y0.ODELAY_TYPE_VARIABLE 37_119
RIOI.ODELAY_Y0.ODELAY_VALUE[0] 36_122
RIOI.ODELAY_Y0.ODELAY_VALUE[1] 36_116
RIOI.ODELAY_Y0.ODELAY_VALUE[2] 36_110
RIOI.ODELAY_Y0.ODELAY_VALUE[3] 36_102
RIOI.ODELAY_Y0.ODELAY_VALUE[4] 36_96
RIOI.ODELAY_Y0.ZINV_ODATAIN 35_72
RIOI.ODELAY_Y0.ZODELAY_VALUE[0] 36_120
RIOI.ODELAY_Y0.ZODELAY_VALUE[1] 36_114
RIOI.ODELAY_Y0.ZODELAY_VALUE[2] 36_108
RIOI.ODELAY_Y0.ZODELAY_VALUE[3] 36_100
RIOI.ODELAY_Y0.ZODELAY_VALUE[4] 36_94
RIOI.ODELAY_Y1.CINVCTRL_SEL 36_38
RIOI.ODELAY_Y1.HIGH_PERFORMANCE_MODE 35_18
RIOI.ODELAY_Y1.IN_USE 35_54 37_55 38_52
RIOI.ODELAY_Y1.IS_C_INVERTED 37_39
RIOI.ODELAY_Y1.ODELAY_TYPE_VAR_LOAD 36_08 36_14
RIOI.ODELAY_Y1.ODELAY_TYPE_VARIABLE 36_08
RIOI.ODELAY_Y1.ODELAY_VALUE[0] 37_05
RIOI.ODELAY_Y1.ODELAY_VALUE[1] 37_11
RIOI.ODELAY_Y1.ODELAY_VALUE[2] 37_17
RIOI.ODELAY_Y1.ODELAY_VALUE[3] 37_25
RIOI.ODELAY_Y1.ODELAY_VALUE[4] 37_31
RIOI.ODELAY_Y1.ZINV_ODATAIN 34_55
RIOI.ODELAY_Y1.ZODELAY_VALUE[0] 37_07
RIOI.ODELAY_Y1.ZODELAY_VALUE[1] 37_13
RIOI.ODELAY_Y1.ZODELAY_VALUE[2] 37_19
RIOI.ODELAY_Y1.ZODELAY_VALUE[3] 37_27
RIOI.ODELAY_Y1.ZODELAY_VALUE[4] 37_33
RIOI.OLOGIC_Y0.IS_CLKDIV_INVERTED 30_85
RIOI.OLOGIC_Y0.IS_D1_INVERTED 30_97
RIOI.OLOGIC_Y0.IS_D2_INVERTED 31_102
RIOI.OLOGIC_Y0.IS_D3_INVERTED 31_106
RIOI.OLOGIC_Y0.IS_D4_INVERTED 31_110
RIOI.OLOGIC_Y0.IS_D5_INVERTED 30_113
RIOI.OLOGIC_Y0.IS_D6_INVERTED 31_114
RIOI.OLOGIC_Y0.IS_D7_INVERTED 31_118
RIOI.OLOGIC_Y0.IS_D8_INVERTED 30_125
RIOI.OLOGIC_Y0.ODDR.DDR_CLK_EDGE.SAME_EDGE 31_92
RIOI.OLOGIC_Y0.ODDR.SRUSED 32_112
RIOI.OLOGIC_Y0.ODDR_TDDR.IN_USE 31_83
RIOI.OLOGIC_Y0.OMUX.D1 33_111
RIOI.OLOGIC_Y0.OQUSED 31_86
RIOI.OLOGIC_Y0.OSERDES.DATA_RATE_OQ.DDR 33_91 !33_93
RIOI.OLOGIC_Y0.OSERDES.DATA_RATE_OQ.SDR !33_91 33_93
RIOI.OLOGIC_Y0.OSERDES.DATA_RATE_TQ.BUF 32_66 !32_70 !33_69
RIOI.OLOGIC_Y0.OSERDES.DATA_RATE_TQ.DDR !32_66 32_70 !33_69
RIOI.OLOGIC_Y0.OSERDES.DATA_RATE_TQ.SDR !32_66 !32_70 33_69
RIOI.OLOGIC_Y0.OSERDES.DATA_WIDTH.DDR.W4 !30_95 30_99 !30_121 !30_123 !30_127 !31_100 !31_116 !31_120 31_124 !31_126 33_73
RIOI.OLOGIC_Y0.OSERDES.DATA_WIDTH.DDR.W6 30_95 !30_99 !30_121 !30_123 !30_127 !31_100 !31_116 31_120 !31_124 !31_126 33_73
RIOI.OLOGIC_Y0.OSERDES.DATA_WIDTH.DDR.W8 30_95 30_99 !30_121 !30_123 !30_127 !31_100 31_116 !31_120 !31_124 !31_126 33_73
RIOI.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W2 !30_95 30_99 !30_121 !30_123 30_127 !31_100 !31_116 !31_120 !31_124 !31_126 33_73 !33_91 33_93
RIOI.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W3 30_95 !30_99 !30_121 !30_123 !30_127 !31_100 !31_116 !31_120 !31_124 31_126 33_73 !33_91 33_93
RIOI.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W4 30_95 30_99 !30_121 !30_123 !30_127 !31_100 !31_116 !31_120 31_124 !31_126 33_73 !33_91 33_93
RIOI.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W5 !30_95 30_99 30_121 !30_123 !30_127 31_98 !31_100 !31_116 !31_120 !31_124 !31_126 33_73 !33_91 33_93
RIOI.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W6 !30_95 30_99 !30_121 !30_123 !30_127 31_98 31_100 !31_116 31_120 !31_124 !31_126 33_73 !33_91 33_93
RIOI.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W7 !30_95 !30_99 !30_121 30_123 !30_127 31_98 31_100 !31_116 !31_120 !31_124 !31_126 33_73 !33_91 33_93
RIOI.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W8 !30_95 !30_99 !30_121 !30_123 !30_127 31_98 31_100 31_116 !31_120 !31_124 !31_126 33_73 !33_91 33_93
RIOI.OLOGIC_Y0.OSERDES.IN_USE 33_73
RIOI.OLOGIC_Y0.OSERDES.SERDES_MODE.SLAVE 33_83
RIOI.OLOGIC_Y0.OSERDES.SRTYPE.SYNC 32_94
RIOI.OLOGIC_Y0.OSERDES.TRISTATE_WIDTH.W4 32_90
RIOI.OLOGIC_Y0.OSERDES.TSRTYPE.SYNC 32_72
RIOI.OLOGIC_Y0.TDDR.SRUSED 33_89
RIOI.OLOGIC_Y0.ZINIT_OQ 33_97
RIOI.OLOGIC_Y0.ZINIT_TQ 30_75
RIOI.OLOGIC_Y0.ZINV_CLK 31_90
RIOI.OLOGIC_Y0.ZINV_T1 30_67
RIOI.OLOGIC_Y0.ZINV_T2 30_71
RIOI.OLOGIC_Y0.ZINV_T3 31_76
RIOI.OLOGIC_Y0.ZINV_T4 30_79
RIOI.OLOGIC_Y0.ZSRVAL_OQ 32_108 33_95 33_107
RIOI.OLOGIC_Y0.ZSRVAL_TQ 32_82 33_75 33_81
RIOI.OLOGIC_Y1.IS_CLKDIV_INVERTED 31_42
RIOI.OLOGIC_Y1.IS_D1_INVERTED 31_30
RIOI.OLOGIC_Y1.IS_D2_INVERTED 30_25
RIOI.OLOGIC_Y1.IS_D3_INVERTED 30_21
RIOI.OLOGIC_Y1.IS_D4_INVERTED 30_17
RIOI.OLOGIC_Y1.IS_D5_INVERTED 31_14
RIOI.OLOGIC_Y1.IS_D6_INVERTED 30_13
RIOI.OLOGIC_Y1.IS_D7_INVERTED 30_09
RIOI.OLOGIC_Y1.IS_D8_INVERTED 31_02
RIOI.OLOGIC_Y1.ODDR.DDR_CLK_EDGE.SAME_EDGE 30_35
RIOI.OLOGIC_Y1.ODDR.SRUSED 33_15
RIOI.OLOGIC_Y1.ODDR_TDDR.IN_USE 30_44
RIOI.OLOGIC_Y1.OMUX.D1 32_16
RIOI.OLOGIC_Y1.OQUSED 30_41
RIOI.OLOGIC_Y1.OSERDES.DATA_RATE_OQ.DDR !32_34 32_36
RIOI.OLOGIC_Y1.OSERDES.DATA_RATE_OQ.SDR 32_34 !32_36
RIOI.OLOGIC_Y1.OSERDES.DATA_RATE_TQ.BUF !32_58 !33_57 33_61
RIOI.OLOGIC_Y1.OSERDES.DATA_RATE_TQ.DDR !32_58 33_57 !33_61
RIOI.OLOGIC_Y1.OSERDES.DATA_RATE_TQ.SDR 32_58 !33_57 !33_61
RIOI.OLOGIC_Y1.OSERDES.DATA_WIDTH.DDR.W4 !30_01 30_03 !30_07 !30_11 !30_27 !30_29 !31_00 !31_04 !31_06 31_28 !31_32 32_54
RIOI.OLOGIC_Y1.OSERDES.DATA_WIDTH.DDR.W6 !30_01 !30_03 30_07 !30_11 !30_27 !30_29 !31_00 !31_04 !31_06 !31_28 31_32 32_54
RIOI.OLOGIC_Y1.OSERDES.DATA_WIDTH.DDR.W8 !30_01 !30_03 !30_07 30_11 !30_27 !30_29 !31_00 !31_04 !31_06 31_28 31_32 32_54
RIOI.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W2 !30_01 !30_03 !30_07 !30_11 !30_27 !30_29 31_00 !31_04 !31_06 31_28 !31_32 32_34 !32_36 32_54
RIOI.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W3 30_01 !30_03 !30_07 !30_11 !30_27 !30_29 !31_00 !31_04 !31_06 !31_28 31_32 32_34 !32_36 32_54
RIOI.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W4 !30_01 30_03 !30_07 !30_11 !30_27 !30_29 !31_00 !31_04 !31_06 31_28 31_32 32_34 !32_36 32_54
RIOI.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W5 !30_01 !30_03 !30_07 !30_11 !30_27 30_29 !31_00 !31_04 31_06 31_28 !31_32 32_34 !32_36 32_54
RIOI.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W6 !30_01 !30_03 30_07 !30_11 30_27 30_29 !31_00 !31_04 !31_06 31_28 !31_32 32_34 !32_36 32_54
RIOI.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W7 !30_01 !30_03 !30_07 !30_11 30_27 30_29 !31_00 31_04 !31_06 !31_28 !31_32 32_34 !32_36 32_54
RIOI.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W8 !30_01 !30_03 !30_07 30_11 30_27 30_29 !31_00 !31_04 !31_06 !31_28 !31_32 32_34 !32_36 32_54
RIOI.OLOGIC_Y1.OSERDES.IN_USE 32_54
RIOI.OLOGIC_Y1.OSERDES.SERDES_MODE.SLAVE 32_44
RIOI.OLOGIC_Y1.OSERDES.SRTYPE.SYNC 33_33
RIOI.OLOGIC_Y1.OSERDES.TRISTATE_WIDTH.W4 33_37
RIOI.OLOGIC_Y1.OSERDES.TSRTYPE.SYNC 33_55
RIOI.OLOGIC_Y1.TDDR.SRUSED 32_38
RIOI.OLOGIC_Y1.ZINIT_OQ 32_30
RIOI.OLOGIC_Y1.ZINIT_TQ 31_52
RIOI.OLOGIC_Y1.ZINV_CLK 30_37
RIOI.OLOGIC_Y1.ZINV_T1 31_60
RIOI.OLOGIC_Y1.ZINV_T2 31_56
RIOI.OLOGIC_Y1.ZINV_T3 30_51
RIOI.OLOGIC_Y1.ZINV_T4 31_48
RIOI.OLOGIC_Y1.ZSRVAL_OQ 32_20 32_32 33_19
RIOI.OLOGIC_Y1.ZSRVAL_TQ 32_46 32_52 33_45

View File

@ -0,0 +1,398 @@
RIOI.IDELAY_Y0.CINVCTRL_SEL origin:035a-iob18-idelay 35_89
RIOI.IDELAY_Y0.DELAY_SRC_DATAIN origin:035a-iob18-idelay !34_72 35_69
RIOI.IDELAY_Y0.DELAY_SRC_IDATAIN origin:035a-iob18-idelay !35_69 34_72
RIOI.IDELAY_Y0.HIGH_PERFORMANCE_MODE origin:035a-iob18-idelay 32_109
RIOI.IDELAY_Y0.IDELAY_TYPE_FIXED origin:035a-iob18-idelay !35_113 !35_119
RIOI.IDELAY_Y0.IDELAY_TYPE_VAR_LOAD origin:035a-iob18-idelay 35_113 35_119
RIOI.IDELAY_Y0.IDELAY_TYPE_VARIABLE origin:035a-iob18-idelay !35_113 35_119
RIOI.IDELAY_Y0.IDELAY_VALUE[0] origin:035a-iob18-idelay !34_120 34_122
RIOI.IDELAY_Y0.IDELAY_VALUE[1] origin:035a-iob18-idelay !34_114 34_116
RIOI.IDELAY_Y0.IDELAY_VALUE[2] origin:035a-iob18-idelay !34_108 34_110
RIOI.IDELAY_Y0.IDELAY_VALUE[3] origin:035a-iob18-idelay !34_100 34_102
RIOI.IDELAY_Y0.IDELAY_VALUE[4] origin:035a-iob18-idelay !34_94 34_96
RIOI.IDELAY_Y0.IN_USE origin:035a-iob18-idelay 32_73
RIOI.IDELAY_Y0.IS_DATAIN_INVERTED origin:035a-iob18-idelay 35_81
RIOI.IDELAY_Y0.IS_IDATAIN_INVERTED origin:035a-iob18-idelay 33_72
RIOI.IDELAY_Y0.PIPE_SEL origin:035a-iob18-idelay 34_106
RIOI.IDELAY_Y0.ZIDELAY_VALUE[0] origin:035a-iob18-idelay !34_122 34_120
RIOI.IDELAY_Y0.ZIDELAY_VALUE[1] origin:035a-iob18-idelay !34_116 34_114
RIOI.IDELAY_Y0.ZIDELAY_VALUE[2] origin:035a-iob18-idelay !34_110 34_108
RIOI.IDELAY_Y0.ZIDELAY_VALUE[3] origin:035a-iob18-idelay !34_102 34_100
RIOI.IDELAY_Y0.ZIDELAY_VALUE[4] origin:035a-iob18-idelay !34_96 34_94
RIOI.IDELAY_Y1.CINVCTRL_SEL origin:035a-iob18-idelay 34_38
RIOI.IDELAY_Y1.DELAY_SRC_DATAIN origin:035a-iob18-idelay !35_55 34_58
RIOI.IDELAY_Y1.DELAY_SRC_IDATAIN origin:035a-iob18-idelay !34_58 35_55
RIOI.IDELAY_Y1.HIGH_PERFORMANCE_MODE origin:035a-iob18-idelay 33_18
RIOI.IDELAY_Y1.IDELAY_TYPE_FIXED origin:035a-iob18-idelay !34_08 !34_14
RIOI.IDELAY_Y1.IDELAY_TYPE_VAR_LOAD origin:035a-iob18-idelay 34_08 34_14
RIOI.IDELAY_Y1.IDELAY_TYPE_VARIABLE origin:035a-iob18-idelay !34_14 34_08
RIOI.IDELAY_Y1.IDELAY_VALUE[0] origin:035a-iob18-idelay !35_07 35_05
RIOI.IDELAY_Y1.IDELAY_VALUE[1] origin:035a-iob18-idelay !35_13 35_11
RIOI.IDELAY_Y1.IDELAY_VALUE[2] origin:035a-iob18-idelay !35_19 35_17
RIOI.IDELAY_Y1.IDELAY_VALUE[3] origin:035a-iob18-idelay !35_27 35_25
RIOI.IDELAY_Y1.IDELAY_VALUE[4] origin:035a-iob18-idelay !35_33 35_31
RIOI.IDELAY_Y1.IN_USE origin:035a-iob18-idelay 33_54
RIOI.IDELAY_Y1.IS_DATAIN_INVERTED origin:035a-iob18-idelay 34_46
RIOI.IDELAY_Y1.IS_IDATAIN_INVERTED origin:035a-iob18-idelay 32_55
RIOI.IDELAY_Y1.PIPE_SEL origin:035a-iob18-idelay 35_21
RIOI.IDELAY_Y1.ZIDELAY_VALUE[0] origin:035a-iob18-idelay !35_05 35_07
RIOI.IDELAY_Y1.ZIDELAY_VALUE[1] origin:035a-iob18-idelay !35_11 35_13
RIOI.IDELAY_Y1.ZIDELAY_VALUE[2] origin:035a-iob18-idelay !35_17 35_19
RIOI.IDELAY_Y1.ZIDELAY_VALUE[3] origin:035a-iob18-idelay !35_25 35_27
RIOI.IDELAY_Y1.ZIDELAY_VALUE[4] origin:035a-iob18-idelay !35_31 35_33
RIOI.ILOGIC_Y0.IDDR.IN_USE origin:035b-iob-iserdes 26_121 26_71 27_70
RIOI.ILOGIC_Y0.IDDR_OR_ISERDES.IN_USE origin:035b-iob-iserdes 26_71 27_70
RIOI.ILOGIC_Y0.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE origin:035-iob-ilogic !26_99 27_98
RIOI.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE origin:035-iob-ilogic !27_98 26_99
RIOI.ILOGIC_Y0.IFF.INV_OCLK origin:035-iob-ilogic 28_124
RIOI.ILOGIC_Y0.IFF.SRTYPE.ASYNC origin:035-iob-ilogic !29_67
RIOI.ILOGIC_Y0.IFF.SRTYPE.SYNC origin:035-iob-ilogic 29_67
RIOI.ILOGIC_Y0.IFF.ZINIT_Q1 origin:035-iob-ilogic 28_72
RIOI.ILOGIC_Y0.IFF.ZINIT_Q2 origin:035-iob-ilogic 28_76
RIOI.ILOGIC_Y0.IFF.ZINIT_Q3 origin:035-iob-ilogic 28_86
RIOI.ILOGIC_Y0.IFF.ZINIT_Q4 origin:035-iob-ilogic 28_94
RIOI.ILOGIC_Y0.IFF.ZINV_C origin:035-iob-ilogic 28_126 29_123 29_125
RIOI.ILOGIC_Y0.IFF.ZINV_OCLK origin:035-iob-ilogic 28_64
RIOI.ILOGIC_Y0.IFF.ZSRVAL_Q1 origin:035-iob-ilogic 29_71
RIOI.ILOGIC_Y0.IFF.ZSRVAL_Q2 origin:035-iob-ilogic 29_75
RIOI.ILOGIC_Y0.IFF.ZSRVAL_Q3 origin:035-iob-ilogic 29_85
RIOI.ILOGIC_Y0.IFF.ZSRVAL_Q4 origin:035-iob-ilogic 29_93
RIOI.ILOGIC_Y0.ISERDES.DYN_CLK_INV_EN origin:035b-iob-iserdes 29_127
RIOI.ILOGIC_Y0.ISERDES.DYN_CLKDIV_INV_EN origin:035b-iob-iserdes 27_118
RIOI.ILOGIC_Y0.ISERDES.IN_USE origin:035b-iob-iserdes 27_102 28_110
RIOI.ILOGIC_Y0.ISERDES.MEMORY.DDR.W4 origin:035b-iob-iserdes !26_101 !26_107 !26_109 !26_111 !26_115 !26_121 !27_108 !27_112 26_71 27_102 27_110 27_70 27_98 28_110 29_67
RIOI.ILOGIC_Y0.ISERDES.MEMORY_QDR.DDR.W4 origin:035b-iob-iserdes !26_101 !26_107 !26_109 !26_111 !26_115 !27_108 !27_112 26_121 26_71 27_102 27_110 27_70 27_98 28_110 29_67
RIOI.ILOGIC_Y0.ISERDES.MEMORY_DDR3.DDR.W4 origin:035b-iob-iserdes 26_101 26_117 26_121 26_71 27_102 27_110 27_70 27_98 28_110 29_67
RIOI.ILOGIC_Y0.ISERDES.MODE.MASTER origin:035b-iob-iserdes !27_106
RIOI.ILOGIC_Y0.ISERDES.MODE.SLAVE origin:035b-iob-iserdes 27_106
RIOI.ILOGIC_Y0.ISERDES.NETWORKING.DDR.W4 origin:035b-iob-iserdes !26_101 !26_109 !26_111 !26_115 !27_108 !27_112 26_107 26_121 26_71 27_102 27_110 27_70 27_98 28_110 29_67
RIOI.ILOGIC_Y0.ISERDES.NETWORKING.DDR.W6 origin:035b-iob-iserdes !26_101 !26_109 !26_115 !27_108 !27_112 26_107 26_111 26_121 26_71 27_102 27_110 27_70 27_98 28_110 29_67
RIOI.ILOGIC_Y0.ISERDES.NETWORKING.DDR.W8 origin:035b-iob-iserdes !26_101 !26_111 !26_115 !27_108 !27_110 !27_112 26_107 26_109 26_121 26_71 27_102 27_70 27_98 28_110 29_67
RIOI.ILOGIC_Y0.ISERDES.NETWORKING.DDR.W10 origin:035b-iob-iserdes !26_101 !26_115 !27_108 !27_110 !27_112 26_107 26_109 26_111 26_121 26_71 27_102 27_70 27_98 28_110 29_67
RIOI.ILOGIC_Y0.ISERDES.NETWORKING.DDR.W14 origin:035b-iob-iserdes !26_101 !26_115 !27_108 !27_112 26_107 26_109 26_111 26_121 26_71 27_102 27_110 27_70 27_98 28_110 29_67
RIOI.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W2 origin:035b-iob-iserdes !26_101 !26_109 !26_115 !27_110 !27_112 26_107 26_111 26_121 26_71 27_102 27_108 27_70 27_98 28_110 29_67
RIOI.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W3 origin:035b-iob-iserdes !26_101 !26_109 !26_115 !27_110 26_107 26_111 26_121 26_71 27_102 27_108 27_112 27_70 27_98 28_110 29_67
RIOI.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W4 origin:035b-iob-iserdes !26_101 !26_109 !26_111 !26_115 !27_112 26_107 26_121 26_71 27_102 27_108 27_110 27_70 27_98 28_110 29_67
RIOI.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W5 origin:035b-iob-iserdes !26_101 !26_109 !26_111 !26_115 26_107 26_121 26_71 27_102 27_108 27_110 27_112 27_70 27_98 28_110 29_67
RIOI.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W6 origin:035b-iob-iserdes !26_101 !26_109 !26_115 !27_112 26_107 26_111 26_121 26_71 27_102 27_108 27_110 27_70 27_98 28_110 29_67
RIOI.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W7 origin:035b-iob-iserdes !26_101 !26_109 !26_115 26_107 26_111 26_121 26_71 27_102 27_108 27_110 27_112 27_70 27_98 28_110 29_67
RIOI.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W8 origin:035b-iob-iserdes !26_101 !26_111 !26_115 !27_110 !27_112 26_107 26_109 26_121 26_71 27_102 27_108 27_70 27_98 28_110 29_67
RIOI.ILOGIC_Y0.ISERDES.NUM_CE.N1 origin:035b-iob-iserdes !27_80
RIOI.ILOGIC_Y0.ISERDES.NUM_CE.N2 origin:035b-iob-iserdes 27_80
RIOI.ILOGIC_Y0.ISERDES.OFB_USED origin:035b-iob-iserdes 29_103 29_113
RIOI.ILOGIC_Y0.ISERDES.OVERSAMPLE.DDR.W4 origin:035b-iob-iserdes !26_109 !26_111 !27_108 !27_112 26_101 26_107 26_115 26_121 26_71 27_102 27_110 27_70 27_98 28_110 29_67
RIOI.ILOGIC_Y0.ZINV_D origin:035-iob-ilogic 29_109
RIOI.ILOGIC_Y0.IDELMUXE3.P0 origin:035-iob-ilogic 29_101
RIOI.ILOGIC_Y0.IDELMUXE3.P1 origin:035-iob-ilogic !29_101
RIOI.ILOGIC_Y0.IFFDELMUXE3.P0 origin:035-iob-ilogic 28_116
RIOI.ILOGIC_Y1.IDDR.IN_USE origin:035b-iob-iserdes 26_57 27_06 27_56
RIOI.ILOGIC_Y1.IDDR_OR_ISERDES.IN_USE origin:035b-iob-iserdes 26_57 27_56
RIOI.ILOGIC_Y1.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE origin:035-iob-ilogic !27_28 26_29
RIOI.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE origin:035-iob-ilogic !26_29 27_28
RIOI.ILOGIC_Y1.IFF.INV_OCLK origin:035-iob-ilogic 29_03
RIOI.ILOGIC_Y1.IFF.SRTYPE.ASYNC origin:035-iob-ilogic !28_60
RIOI.ILOGIC_Y1.IFF.SRTYPE.SYNC origin:035-iob-ilogic 28_60
RIOI.ILOGIC_Y1.IFF.ZINIT_Q1 origin:035-iob-ilogic 29_55
RIOI.ILOGIC_Y1.IFF.ZINIT_Q2 origin:035-iob-ilogic 29_51
RIOI.ILOGIC_Y1.IFF.ZINIT_Q3 origin:035-iob-ilogic 29_41
RIOI.ILOGIC_Y1.IFF.ZINIT_Q4 origin:035-iob-ilogic 29_33
RIOI.ILOGIC_Y1.IFF.ZINV_C origin:035-iob-ilogic 28_02 28_04 29_01
RIOI.ILOGIC_Y1.IFF.ZINV_OCLK origin:035-iob-ilogic 29_63
RIOI.ILOGIC_Y1.IFF.ZSRVAL_Q1 origin:035-iob-ilogic 28_56
RIOI.ILOGIC_Y1.IFF.ZSRVAL_Q2 origin:035-iob-ilogic 28_52
RIOI.ILOGIC_Y1.IFF.ZSRVAL_Q3 origin:035-iob-ilogic 28_42
RIOI.ILOGIC_Y1.IFF.ZSRVAL_Q4 origin:035-iob-ilogic 28_34
RIOI.ILOGIC_Y1.ISERDES.DYN_CLK_INV_EN origin:035b-iob-iserdes 28_00
RIOI.ILOGIC_Y1.ISERDES.DYN_CLKDIV_INV_EN origin:035b-iob-iserdes 26_09
RIOI.ILOGIC_Y1.ISERDES.IN_USE origin:035b-iob-iserdes 26_25 29_17
RIOI.ILOGIC_Y1.ISERDES.MEMORY.DDR.W4 origin:035b-iob-iserdes !26_15 !26_19 !27_06 !27_12 !27_16 !27_18 !27_20 !27_26 26_17 26_25 26_29 26_57 27_56 28_60 29_17
RIOI.ILOGIC_Y1.ISERDES.MEMORY_QDR.DDR.W4 origin:035b-iob-iserdes !26_15 !26_19 !27_12 !27_16 !27_18 !27_20 !27_26 26_17 26_25 26_29 26_57 27_06 27_56 28_60 29_17
RIOI.ILOGIC_Y1.ISERDES.MEMORY_DDR3.DDR.W4 origin:035b-iob-iserdes 26_17 26_25 26_29 26_57 27_06 27_10 27_26 27_56 28_60 29_17
RIOI.ILOGIC_Y1.ISERDES.MODE.MASTER origin:035b-iob-iserdes !26_21
RIOI.ILOGIC_Y1.ISERDES.MODE.SLAVE origin:035b-iob-iserdes 26_21
RIOI.ILOGIC_Y1.ISERDES.NETWORKING.DDR.W4 origin:035b-iob-iserdes !26_15 !26_19 !27_12 !27_16 !27_18 !27_26 26_17 26_25 26_29 26_57 27_06 27_20 27_56 28_60 29_17
RIOI.ILOGIC_Y1.ISERDES.NETWORKING.DDR.W6 origin:035b-iob-iserdes !26_15 !26_19 !27_12 !27_18 !27_26 26_17 26_25 26_29 26_57 27_06 27_16 27_20 27_56 28_60 29_17
RIOI.ILOGIC_Y1.ISERDES.NETWORKING.DDR.W8 origin:035b-iob-iserdes !26_15 !26_17 !26_19 !27_12 !27_16 !27_26 26_25 26_29 26_57 27_06 27_18 27_20 27_56 28_60 29_17
RIOI.ILOGIC_Y1.ISERDES.NETWORKING.DDR.W10 origin:035b-iob-iserdes !26_15 !26_17 !26_19 !27_12 !27_26 26_25 26_29 26_57 27_06 27_16 27_18 27_20 27_56 28_60 29_17
RIOI.ILOGIC_Y1.ISERDES.NETWORKING.DDR.W14 origin:035b-iob-iserdes !26_15 !26_19 !27_12 !27_26 26_17 26_25 26_29 26_57 27_06 27_16 27_18 27_20 27_56 28_60 29_17
RIOI.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W2 origin:035b-iob-iserdes !26_15 !26_17 !27_12 !27_18 !27_26 26_19 26_25 26_29 26_57 27_06 27_16 27_20 27_56 28_60 29_17
RIOI.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W3 origin:035b-iob-iserdes !26_17 !27_12 !27_18 !27_26 26_15 26_19 26_25 26_29 26_57 27_06 27_16 27_20 27_56 28_60 29_17
RIOI.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W4 origin:035b-iob-iserdes !26_15 !27_12 !27_16 !27_18 !27_26 26_17 26_19 26_25 26_29 26_57 27_06 27_20 27_56 28_60 29_17
RIOI.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W5 origin:035b-iob-iserdes !27_12 !27_16 !27_18 !27_26 26_15 26_17 26_19 26_25 26_29 26_57 27_06 27_20 27_56 28_60 29_17
RIOI.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W6 origin:035b-iob-iserdes !26_15 !27_12 !27_18 !27_26 26_17 26_19 26_25 26_29 26_57 27_06 27_16 27_20 27_56 28_60 29_17
RIOI.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W7 origin:035b-iob-iserdes !27_12 !27_18 !27_26 26_15 26_17 26_19 26_25 26_29 26_57 27_06 27_16 27_20 27_56 28_60 29_17
RIOI.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W8 origin:035b-iob-iserdes !26_15 !26_17 !27_12 !27_16 !27_26 26_19 26_25 26_29 26_57 27_06 27_18 27_20 27_56 28_60 29_17
RIOI.ILOGIC_Y1.ISERDES.NUM_CE.N1 origin:035b-iob-iserdes !26_47
RIOI.ILOGIC_Y1.ISERDES.NUM_CE.N2 origin:035b-iob-iserdes 26_47
RIOI.ILOGIC_Y1.ISERDES.OFB_USED origin:035b-iob-iserdes 28_14 28_24
RIOI.ILOGIC_Y1.ISERDES.OVERSAMPLE.DDR.W4 origin:035b-iob-iserdes !26_15 !26_19 !27_16 !27_18 26_17 26_25 26_29 26_57 27_06 27_12 27_20 27_26 27_56 28_60 29_17
RIOI.ILOGIC_Y1.ZINV_D origin:035-iob-ilogic 28_18
RIOI.ILOGIC_Y1.IDELMUXE3.P0 origin:035-iob-ilogic 28_26
RIOI.ILOGIC_Y1.IDELMUXE3.P1 origin:035-iob-ilogic !28_26
RIOI.ILOGIC_Y1.IFFDELMUXE3.P0 origin:035-iob-ilogic 29_11
RIOI.IOI_OCLK_0.IOI_LEAF_GCLK0 origin:037-iob18-pips 28_83 28_95 29_88
RIOI.IOI_OCLK_0.IOI_LEAF_GCLK1 origin:037-iob18-pips 28_83 28_97 29_88
RIOI.IOI_OCLK_0.IOI_LEAF_GCLK2 origin:037-iob18-pips 28_83 29_88 29_94
RIOI.IOI_OCLK_0.IOI_LEAF_GCLK3 origin:037-iob18-pips 28_83 29_88 29_96
RIOI.IOI_OCLK_0.IOI_LEAF_GCLK4 origin:037-iob18-pips 28_83 28_89 28_95
RIOI.IOI_OCLK_0.IOI_LEAF_GCLK5 origin:037-iob18-pips 28_83 28_89 28_97
RIOI.IOI_OCLK_0.IOI_RCLK_FORIO0 origin:037-iob18-pips 28_83 28_89 29_94
RIOI.IOI_OCLK_0.IOI_RCLK_FORIO1 origin:037-iob18-pips 28_83 28_89 29_96
RIOI.IOI_OCLK_0.IOI_RCLK_FORIO2 origin:037-iob18-pips 28_83 28_95 29_92
RIOI.IOI_OCLK_0.IOI_RCLK_FORIO3 origin:037-iob18-pips 28_83 28_97 29_92
RIOI.IOI_OCLK_0.IOI_IMUX31_1 origin:037-iob18-pips 28_83 28_93 29_94
RIOI.IOI_OCLK_0.IOI_IOCLK0 origin:037-iob18-pips 28_83 29_92 29_94
RIOI.IOI_OCLK_0.IOI_IOCLK1 origin:037-iob18-pips 28_83 29_92 29_96
RIOI.IOI_OCLK_0.IOI_IOCLK2 origin:037-iob18-pips 28_83 28_93 28_95
RIOI.IOI_OCLK_0.IOI_IOCLK3 origin:037-iob18-pips 28_83 28_93 28_97
RIOI.IOI_OCLK_1.IOI_LEAF_GCLK0 origin:037-iob18-pips 28_39 29_32 29_44
RIOI.IOI_OCLK_1.IOI_LEAF_GCLK1 origin:037-iob18-pips 28_39 29_30 29_44
RIOI.IOI_OCLK_1.IOI_LEAF_GCLK2 origin:037-iob18-pips 28_33 28_39 29_44
RIOI.IOI_OCLK_1.IOI_LEAF_GCLK3 origin:037-iob18-pips 28_31 28_39 29_44
RIOI.IOI_OCLK_1.IOI_LEAF_GCLK4 origin:037-iob18-pips 29_32 29_38 29_44
RIOI.IOI_OCLK_1.IOI_LEAF_GCLK5 origin:037-iob18-pips 29_30 29_38 29_44
RIOI.IOI_OCLK_1.IOI_RCLK_FORIO0 origin:037-iob18-pips 28_33 29_38 29_44
RIOI.IOI_OCLK_1.IOI_RCLK_FORIO1 origin:037-iob18-pips 28_31 29_38 29_44
RIOI.IOI_OCLK_1.IOI_RCLK_FORIO2 origin:037-iob18-pips 28_35 29_32 29_44
RIOI.IOI_OCLK_1.IOI_RCLK_FORIO3 origin:037-iob18-pips 28_35 29_30 29_44
RIOI.IOI_OCLK_1.IOI_IMUX31_0 origin:037-iob18-pips 28_33 29_34 29_44
RIOI.IOI_OCLK_1.IOI_IOCLK0 origin:037-iob18-pips 28_33 28_35 29_44
RIOI.IOI_OCLK_1.IOI_IOCLK1 origin:037-iob18-pips 28_31 28_35 29_44
RIOI.IOI_OCLK_1.IOI_IOCLK2 origin:037-iob18-pips 29_32 29_34 29_44
RIOI.IOI_OCLK_1.IOI_IOCLK3 origin:037-iob18-pips 29_30 29_34 29_44
RIOI.IOI_OCLKM_0.IOI_LEAF_GCLK0 origin:037-iob18-pips 30_88 31_83 31_95
RIOI.IOI_OCLKM_0.IOI_LEAF_GCLK1 origin:037-iob18-pips 30_88 31_83 31_97
RIOI.IOI_OCLKM_0.IOI_LEAF_GCLK2 origin:037-iob18-pips 30_88 30_94 31_83
RIOI.IOI_OCLKM_0.IOI_LEAF_GCLK3 origin:037-iob18-pips 30_88 30_96 31_83
RIOI.IOI_OCLKM_0.IOI_LEAF_GCLK4 origin:037-iob18-pips 31_83 31_89 31_95
RIOI.IOI_OCLKM_0.IOI_LEAF_GCLK5 origin:037-iob18-pips 31_83 31_89 31_97
RIOI.IOI_OCLKM_0.IOI_RCLK_FORIO0 origin:037-iob18-pips 30_94 31_83 31_89
RIOI.IOI_OCLKM_0.IOI_RCLK_FORIO1 origin:037-iob18-pips 30_96 31_83 31_89
RIOI.IOI_OCLKM_0.IOI_RCLK_FORIO2 origin:037-iob18-pips 30_92 31_83 31_95
RIOI.IOI_OCLKM_0.IOI_RCLK_FORIO3 origin:037-iob18-pips 30_92 31_83 31_97
RIOI.IOI_OCLKM_0.IOI_IOCLK0 origin:037-iob18-pips 30_92 30_94 31_83
RIOI.IOI_OCLKM_0.IOI_IOCLK1 origin:037-iob18-pips 30_92 30_96 31_83
RIOI.IOI_OCLKM_0.IOI_IOCLK2 origin:037-iob18-pips 31_83 31_93 31_95
RIOI.IOI_OCLKM_0.IOI_IOCLK3 origin:037-iob18-pips 31_83 31_93 31_97
RIOI.IOI_OCLKM_1.IOI_LEAF_GCLK0 origin:037-iob18-pips 30_32 30_44 31_39
RIOI.IOI_OCLKM_1.IOI_LEAF_GCLK1 origin:037-iob18-pips 30_30 30_44 31_39
RIOI.IOI_OCLKM_1.IOI_LEAF_GCLK2 origin:037-iob18-pips 30_44 31_33 31_39
RIOI.IOI_OCLKM_1.IOI_LEAF_GCLK3 origin:037-iob18-pips 30_44 31_31 31_39
RIOI.IOI_OCLKM_1.IOI_LEAF_GCLK4 origin:037-iob18-pips 30_32 30_38 30_44
RIOI.IOI_OCLKM_1.IOI_LEAF_GCLK5 origin:037-iob18-pips 30_30 30_38 30_44
RIOI.IOI_OCLKM_1.IOI_RCLK_FORIO0 origin:037-iob18-pips 30_38 30_44 31_33
RIOI.IOI_OCLKM_1.IOI_RCLK_FORIO1 origin:037-iob18-pips 30_38 30_44 31_31
RIOI.IOI_OCLKM_1.IOI_RCLK_FORIO2 origin:037-iob18-pips 30_32 30_44 31_35
RIOI.IOI_OCLKM_1.IOI_RCLK_FORIO3 origin:037-iob18-pips 30_30 30_44 31_35
RIOI.IOI_OCLKM_1.IOI_IOCLK0 origin:037-iob18-pips 30_44 31_33 31_35
RIOI.IOI_OCLKM_1.IOI_IOCLK1 origin:037-iob18-pips 30_44 31_31 31_35
RIOI.IOI_OCLKM_1.IOI_IOCLK2 origin:037-iob18-pips 30_32 30_34 30_44
RIOI.IOI_OCLKM_1.IOI_IOCLK3 origin:037-iob18-pips 30_30 30_34 30_44
RIOI.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK0 origin:037-iob18-pips 28_67 28_79 29_74
RIOI.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK1 origin:037-iob18-pips 28_67 28_81 29_74
RIOI.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK2 origin:037-iob18-pips 28_67 29_74 29_78
RIOI.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK3 origin:037-iob18-pips 28_67 29_74 29_80
RIOI.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK4 origin:037-iob18-pips 28_67 28_75 28_79
RIOI.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK5 origin:037-iob18-pips 28_67 28_75 28_81
RIOI.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO0 origin:037-iob18-pips 28_67 28_75 29_78
RIOI.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO1 origin:037-iob18-pips 28_67 28_75 29_80
RIOI.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO2 origin:037-iob18-pips 28_67 28_79 29_76
RIOI.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO3 origin:037-iob18-pips 28_67 28_81 29_76
RIOI.IOI_ILOGIC0_CLK.IOI_IMUX20_1 origin:037-iob18-pips 28_67 28_77 29_80
RIOI.IOI_ILOGIC0_CLK.IOI_IMUX22_1 origin:037-iob18-pips 28_67 28_77 29_78
RIOI.IOI_ILOGIC0_CLK.IOI_IOCLK0 origin:037-iob18-pips 28_67 29_76 29_78
RIOI.IOI_ILOGIC0_CLK.IOI_IOCLK1 origin:037-iob18-pips 28_67 29_76 29_80
RIOI.IOI_ILOGIC0_CLK.IOI_IOCLK2 origin:037-iob18-pips 28_67 28_77 28_79
RIOI.IOI_ILOGIC0_CLK.IOI_IOCLK3 origin:037-iob18-pips 28_67 28_77 28_81
RIOI.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK0 origin:037-iob18-pips 30_74 31_67 31_79
RIOI.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK1 origin:037-iob18-pips 30_74 31_67 31_81
RIOI.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK2 origin:037-iob18-pips 30_74 30_78 31_67
RIOI.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK3 origin:037-iob18-pips 30_74 30_80 31_67
RIOI.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK4 origin:037-iob18-pips 31_67 31_75 31_79
RIOI.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK5 origin:037-iob18-pips 31_67 31_75 31_81
RIOI.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO0 origin:037-iob18-pips 30_78 31_67 31_75
RIOI.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 origin:037-iob18-pips 30_80 31_67 31_75
RIOI.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 origin:037-iob18-pips 30_76 31_67 31_79
RIOI.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 origin:037-iob18-pips 30_76 31_67 31_81
RIOI.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 origin:037-iob18-pips 30_80 31_67 31_77
RIOI.IOI_ILOGIC0_CLKB.IOI_IMUX22_1 origin:037-iob18-pips 30_78 31_67 31_77
RIOI.IOI_ILOGIC0_CLKB.IOI_IOCLK0 origin:037-iob18-pips 30_76 30_78 31_67
RIOI.IOI_ILOGIC0_CLKB.IOI_IOCLK1 origin:037-iob18-pips 30_76 30_80 31_67
RIOI.IOI_ILOGIC0_CLKB.IOI_IOCLK2 origin:037-iob18-pips 31_67 31_77 31_79
RIOI.IOI_ILOGIC0_CLKB.IOI_IOCLK3 origin:037-iob18-pips 31_67 31_77 31_81
RIOI.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK0 origin:037-iob18-pips 28_53 29_48 29_60
RIOI.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK1 origin:037-iob18-pips 28_53 29_46 29_60
RIOI.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK2 origin:037-iob18-pips 28_49 28_53 29_60
RIOI.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK3 origin:037-iob18-pips 28_47 28_53 29_60
RIOI.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK4 origin:037-iob18-pips 29_48 29_52 29_60
RIOI.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK5 origin:037-iob18-pips 29_46 29_52 29_60
RIOI.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO0 origin:037-iob18-pips 28_49 29_52 29_60
RIOI.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO1 origin:037-iob18-pips 28_47 29_52 29_60
RIOI.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO2 origin:037-iob18-pips 28_51 29_48 29_60
RIOI.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO3 origin:037-iob18-pips 28_51 29_46 29_60
RIOI.IOI_ILOGIC1_CLK.IOI_IMUX20_0 origin:037-iob18-pips 28_47 29_50 29_60
RIOI.IOI_ILOGIC1_CLK.IOI_IMUX22_0 origin:037-iob18-pips 28_49 29_50 29_60
RIOI.IOI_ILOGIC1_CLK.IOI_IOCLK0 origin:037-iob18-pips 28_49 28_51 29_60
RIOI.IOI_ILOGIC1_CLK.IOI_IOCLK1 origin:037-iob18-pips 28_47 28_51 29_60
RIOI.IOI_ILOGIC1_CLK.IOI_IOCLK2 origin:037-iob18-pips 29_48 29_50 29_60
RIOI.IOI_ILOGIC1_CLK.IOI_IOCLK3 origin:037-iob18-pips 29_46 29_50 29_60
RIOI.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK0 origin:037-iob18-pips 30_48 30_60 31_53
RIOI.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK1 origin:037-iob18-pips 30_46 30_60 31_53
RIOI.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK2 origin:037-iob18-pips 30_60 31_49 31_53
RIOI.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK3 origin:037-iob18-pips 30_60 31_47 31_53
RIOI.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK4 origin:037-iob18-pips 30_48 30_52 30_60
RIOI.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK5 origin:037-iob18-pips 30_46 30_52 30_60
RIOI.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO0 origin:037-iob18-pips 30_52 30_60 31_49
RIOI.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO1 origin:037-iob18-pips 30_52 30_60 31_47
RIOI.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO2 origin:037-iob18-pips 30_48 30_60 31_51
RIOI.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO3 origin:037-iob18-pips 30_46 30_60 31_51
RIOI.IOI_ILOGIC1_CLKB.IOI_IMUX20_0 origin:037-iob18-pips 30_50 30_60 31_47
RIOI.IOI_ILOGIC1_CLKB.IOI_IMUX22_0 origin:037-iob18-pips 30_50 30_60 31_49
RIOI.IOI_ILOGIC1_CLKB.IOI_IOCLK0 origin:037-iob18-pips 30_60 31_49 31_51
RIOI.IOI_ILOGIC1_CLKB.IOI_IOCLK1 origin:037-iob18-pips 30_60 31_47 31_51
RIOI.IOI_ILOGIC1_CLKB.IOI_IOCLK2 origin:037-iob18-pips 30_48 30_50 30_60
RIOI.IOI_ILOGIC1_CLKB.IOI_IOCLK3 origin:037-iob18-pips 30_46 30_50 30_60
RIOI.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK0 origin:037-iob18-pips 28_111 29_118 29_124 30_118 30_124 31_111
RIOI.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK1 origin:037-iob18-pips 28_111 29_118 29_126 30_118 30_126 31_111
RIOI.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK2 origin:037-iob18-pips 28_111 28_123 29_118 30_118 31_111 31_123
RIOI.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK3 origin:037-iob18-pips 28_111 28_125 29_118 30_118 31_111 31_125
RIOI.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK4 origin:037-iob18-pips 28_111 28_119 29_124 30_124 31_111 31_119
RIOI.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK5 origin:037-iob18-pips 28_111 28_119 29_126 30_126 31_111 31_119
RIOI.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO0 origin:037-iob18-pips 28_111 28_119 28_123 31_111 31_119 31_123
RIOI.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO1 origin:037-iob18-pips 28_111 28_119 28_125 31_111 31_119 31_125
RIOI.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO2 origin:037-iob18-pips 28_111 28_121 29_124 30_124 31_111 31_121
RIOI.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO3 origin:037-iob18-pips 28_111 28_121 29_126 30_126 31_111 31_121
RIOI.IOI_OLOGIC0_CLKDIV.IOI_IMUX8_1 origin:037-iob18-pips 28_111 28_121 28_123 31_111 31_121 31_123
RIOI.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK0 origin:037-iob18-pips 28_03 28_09 29_16 30_16 31_03 31_09
RIOI.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK1 origin:037-iob18-pips 28_01 28_09 29_16 30_16 31_01 31_09
RIOI.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK2 origin:037-iob18-pips 28_09 29_04 29_16 30_04 30_16 31_09
RIOI.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK3 origin:037-iob18-pips 28_09 29_02 29_16 30_02 30_16 31_09
RIOI.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK4 origin:037-iob18-pips 28_03 29_08 29_16 30_08 30_16 31_03
RIOI.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK5 origin:037-iob18-pips 28_01 29_08 29_16 30_08 30_16 31_01
RIOI.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO0 origin:037-iob18-pips 29_04 29_08 29_16 30_04 30_08 30_16
RIOI.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO1 origin:037-iob18-pips 29_02 29_08 29_16 30_02 30_08 30_16
RIOI.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO2 origin:037-iob18-pips 28_03 29_06 29_16 30_06 30_16 31_03
RIOI.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO3 origin:037-iob18-pips 28_01 29_06 29_16 30_06 30_16 31_01
RIOI.IOI_OLOGIC1_CLKDIV.IOI_IMUX8_0 origin:037-iob18-pips 29_04 29_06 29_16 30_04 30_06 30_16
RIOI.ODELAY_Y0.CINVCTRL_SEL origin:035a-iob18-odelay 37_89
RIOI.ODELAY_Y0.HIGH_PERFORMANCE_MODE origin:035a-iob18-odelay 34_109
RIOI.ODELAY_Y0.IN_USE origin:035a-iob18-odelay 34_73 36_72 39_75
RIOI.ODELAY_Y0.IS_C_INVERTED origin:035a-iob18-odelay 36_88
RIOI.ODELAY_Y0.ODELAY_TYPE_VAR_LOAD origin:035a-iob18-odelay 37_113 37_119
RIOI.ODELAY_Y0.ODELAY_TYPE_VARIABLE origin:035a-iob18-odelay 37_119
RIOI.ODELAY_Y0.ODELAY_VALUE[0] origin:035a-iob18-odelay 36_122
RIOI.ODELAY_Y0.ODELAY_VALUE[1] origin:035a-iob18-odelay 36_116
RIOI.ODELAY_Y0.ODELAY_VALUE[2] origin:035a-iob18-odelay 36_110
RIOI.ODELAY_Y0.ODELAY_VALUE[3] origin:035a-iob18-odelay 36_102
RIOI.ODELAY_Y0.ODELAY_VALUE[4] origin:035a-iob18-odelay 36_96
RIOI.ODELAY_Y0.ZINV_ODATAIN origin:035a-iob18-odelay 35_72
RIOI.ODELAY_Y0.ZODELAY_VALUE[0] origin:035a-iob18-odelay 36_120
RIOI.ODELAY_Y0.ZODELAY_VALUE[1] origin:035a-iob18-odelay 36_114
RIOI.ODELAY_Y0.ZODELAY_VALUE[2] origin:035a-iob18-odelay 36_108
RIOI.ODELAY_Y0.ZODELAY_VALUE[3] origin:035a-iob18-odelay 36_100
RIOI.ODELAY_Y0.ZODELAY_VALUE[4] origin:035a-iob18-odelay 36_94
RIOI.ODELAY_Y1.CINVCTRL_SEL origin:035a-iob18-odelay 36_38
RIOI.ODELAY_Y1.HIGH_PERFORMANCE_MODE origin:035a-iob18-odelay 35_18
RIOI.ODELAY_Y1.IN_USE origin:035a-iob18-odelay 35_54 37_55 38_52
RIOI.ODELAY_Y1.IS_C_INVERTED origin:035a-iob18-odelay 37_39
RIOI.ODELAY_Y1.ODELAY_TYPE_VAR_LOAD origin:035a-iob18-odelay 36_08 36_14
RIOI.ODELAY_Y1.ODELAY_TYPE_VARIABLE origin:035a-iob18-odelay 36_08
RIOI.ODELAY_Y1.ODELAY_VALUE[0] origin:035a-iob18-odelay 37_05
RIOI.ODELAY_Y1.ODELAY_VALUE[1] origin:035a-iob18-odelay 37_11
RIOI.ODELAY_Y1.ODELAY_VALUE[2] origin:035a-iob18-odelay 37_17
RIOI.ODELAY_Y1.ODELAY_VALUE[3] origin:035a-iob18-odelay 37_25
RIOI.ODELAY_Y1.ODELAY_VALUE[4] origin:035a-iob18-odelay 37_31
RIOI.ODELAY_Y1.ZINV_ODATAIN origin:035a-iob18-odelay 34_55
RIOI.ODELAY_Y1.ZODELAY_VALUE[0] origin:035a-iob18-odelay 37_07
RIOI.ODELAY_Y1.ZODELAY_VALUE[1] origin:035a-iob18-odelay 37_13
RIOI.ODELAY_Y1.ZODELAY_VALUE[2] origin:035a-iob18-odelay 37_19
RIOI.ODELAY_Y1.ZODELAY_VALUE[3] origin:035a-iob18-odelay 37_27
RIOI.ODELAY_Y1.ZODELAY_VALUE[4] origin:035a-iob18-odelay 37_33
RIOI.OLOGIC_Y0.IS_CLKDIV_INVERTED origin:036-iob18-ologic 30_85
RIOI.OLOGIC_Y0.IS_D1_INVERTED origin:036-iob18-ologic 30_97
RIOI.OLOGIC_Y0.IS_D2_INVERTED origin:036-iob18-ologic 31_102
RIOI.OLOGIC_Y0.IS_D3_INVERTED origin:036-iob18-ologic 31_106
RIOI.OLOGIC_Y0.IS_D4_INVERTED origin:036-iob18-ologic 31_110
RIOI.OLOGIC_Y0.IS_D5_INVERTED origin:036-iob18-ologic 30_113
RIOI.OLOGIC_Y0.IS_D6_INVERTED origin:036-iob18-ologic 31_114
RIOI.OLOGIC_Y0.IS_D7_INVERTED origin:036-iob18-ologic 31_118
RIOI.OLOGIC_Y0.IS_D8_INVERTED origin:036-iob18-ologic 30_125
RIOI.OLOGIC_Y0.ODDR.DDR_CLK_EDGE.SAME_EDGE origin:036-iob18-ologic 31_92
RIOI.OLOGIC_Y0.ODDR.SRUSED origin:036-iob18-ologic 32_112
RIOI.OLOGIC_Y0.ODDR_TDDR.IN_USE origin:036-iob18-ologic 31_83
RIOI.OLOGIC_Y0.OMUX.D1 origin:036-iob18-ologic 33_111
RIOI.OLOGIC_Y0.OQUSED origin:036-iob18-ologic 31_86
RIOI.OLOGIC_Y0.OSERDES.DATA_RATE_OQ.DDR origin:036-iob18-ologic !33_93 33_91
RIOI.OLOGIC_Y0.OSERDES.DATA_RATE_OQ.SDR origin:036-iob18-ologic !33_91 33_93
RIOI.OLOGIC_Y0.OSERDES.DATA_RATE_TQ.BUF origin:036-iob18-ologic !32_70 !33_69 32_66
RIOI.OLOGIC_Y0.OSERDES.DATA_RATE_TQ.DDR origin:036-iob18-ologic !32_66 !33_69 32_70
RIOI.OLOGIC_Y0.OSERDES.DATA_RATE_TQ.SDR origin:036-iob18-ologic !32_66 !32_70 33_69
RIOI.OLOGIC_Y0.OSERDES.DATA_WIDTH.DDR.W4 origin:036-iob18-ologic !30_121 !30_123 !30_127 !30_95 !31_100 !31_116 !31_120 !31_126 30_99 31_124 33_73
RIOI.OLOGIC_Y0.OSERDES.DATA_WIDTH.DDR.W6 origin:036-iob18-ologic !30_121 !30_123 !30_127 !30_99 !31_100 !31_116 !31_124 !31_126 30_95 31_120 33_73
RIOI.OLOGIC_Y0.OSERDES.DATA_WIDTH.DDR.W8 origin:036-iob18-ologic !30_121 !30_123 !30_127 !31_100 !31_120 !31_124 !31_126 30_95 30_99 31_116 33_73
RIOI.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W2 origin:036-iob18-ologic !30_121 !30_123 !30_95 !31_100 !31_116 !31_120 !31_124 !31_126 !33_91 30_127 30_99 33_73 33_93
RIOI.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W3 origin:036-iob18-ologic !30_121 !30_123 !30_127 !30_99 !31_100 !31_116 !31_120 !31_124 !33_91 30_95 31_126 33_73 33_93
RIOI.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W4 origin:036-iob18-ologic !30_121 !30_123 !30_127 !31_100 !31_116 !31_120 !31_126 !33_91 30_95 30_99 31_124 33_73 33_93
RIOI.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W5 origin:036-iob18-ologic !30_123 !30_127 !30_95 !31_100 !31_116 !31_120 !31_124 !31_126 !33_91 30_121 30_99 31_98 33_73 33_93
RIOI.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W6 origin:036-iob18-ologic !30_121 !30_123 !30_127 !30_95 !31_116 !31_124 !31_126 !33_91 30_99 31_100 31_120 31_98 33_73 33_93
RIOI.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W7 origin:036-iob18-ologic !30_121 !30_127 !30_95 !30_99 !31_116 !31_120 !31_124 !31_126 !33_91 30_123 31_100 31_98 33_73 33_93
RIOI.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W8 origin:036-iob18-ologic !30_121 !30_123 !30_127 !30_95 !30_99 !31_120 !31_124 !31_126 !33_91 31_100 31_116 31_98 33_73 33_93
RIOI.OLOGIC_Y0.OSERDES.IN_USE origin:036-iob18-ologic 33_73
RIOI.OLOGIC_Y0.OSERDES.SERDES_MODE.SLAVE origin:036-iob18-ologic 33_83
RIOI.OLOGIC_Y0.OSERDES.SRTYPE.SYNC origin:036-iob18-ologic 32_94
RIOI.OLOGIC_Y0.OSERDES.TRISTATE_WIDTH.W4 origin:036-iob18-ologic 32_90
RIOI.OLOGIC_Y0.OSERDES.TSRTYPE.SYNC origin:036-iob18-ologic 32_72
RIOI.OLOGIC_Y0.TDDR.SRUSED origin:036-iob18-ologic 33_89
RIOI.OLOGIC_Y0.ZINIT_OQ origin:036-iob18-ologic 33_97
RIOI.OLOGIC_Y0.ZINIT_TQ origin:036-iob18-ologic 30_75
RIOI.OLOGIC_Y0.ZINV_CLK origin:036-iob18-ologic 31_90
RIOI.OLOGIC_Y0.ZINV_T1 origin:036-iob18-ologic 30_67
RIOI.OLOGIC_Y0.ZINV_T2 origin:036-iob18-ologic 30_71
RIOI.OLOGIC_Y0.ZINV_T3 origin:036-iob18-ologic 31_76
RIOI.OLOGIC_Y0.ZINV_T4 origin:036-iob18-ologic 30_79
RIOI.OLOGIC_Y0.ZSRVAL_OQ origin:036-iob18-ologic 32_108 33_107 33_95
RIOI.OLOGIC_Y0.ZSRVAL_TQ origin:036-iob18-ologic 32_82 33_75 33_81
RIOI.OLOGIC_Y1.IS_CLKDIV_INVERTED origin:036-iob18-ologic 31_42
RIOI.OLOGIC_Y1.IS_D1_INVERTED origin:036-iob18-ologic 31_30
RIOI.OLOGIC_Y1.IS_D2_INVERTED origin:036-iob18-ologic 30_25
RIOI.OLOGIC_Y1.IS_D3_INVERTED origin:036-iob18-ologic 30_21
RIOI.OLOGIC_Y1.IS_D4_INVERTED origin:036-iob18-ologic 30_17
RIOI.OLOGIC_Y1.IS_D5_INVERTED origin:036-iob18-ologic 31_14
RIOI.OLOGIC_Y1.IS_D6_INVERTED origin:036-iob18-ologic 30_13
RIOI.OLOGIC_Y1.IS_D7_INVERTED origin:036-iob18-ologic 30_09
RIOI.OLOGIC_Y1.IS_D8_INVERTED origin:036-iob18-ologic 31_02
RIOI.OLOGIC_Y1.ODDR.DDR_CLK_EDGE.SAME_EDGE origin:036-iob18-ologic 30_35
RIOI.OLOGIC_Y1.ODDR.SRUSED origin:036-iob18-ologic 33_15
RIOI.OLOGIC_Y1.ODDR_TDDR.IN_USE origin:036-iob18-ologic 30_44
RIOI.OLOGIC_Y1.OMUX.D1 origin:036-iob18-ologic 32_16
RIOI.OLOGIC_Y1.OQUSED origin:036-iob18-ologic 30_41
RIOI.OLOGIC_Y1.OSERDES.DATA_RATE_OQ.DDR origin:036-iob18-ologic !32_34 32_36
RIOI.OLOGIC_Y1.OSERDES.DATA_RATE_OQ.SDR origin:036-iob18-ologic !32_36 32_34
RIOI.OLOGIC_Y1.OSERDES.DATA_RATE_TQ.BUF origin:036-iob18-ologic !32_58 !33_57 33_61
RIOI.OLOGIC_Y1.OSERDES.DATA_RATE_TQ.DDR origin:036-iob18-ologic !32_58 !33_61 33_57
RIOI.OLOGIC_Y1.OSERDES.DATA_RATE_TQ.SDR origin:036-iob18-ologic !33_57 !33_61 32_58
RIOI.OLOGIC_Y1.OSERDES.DATA_WIDTH.DDR.W4 origin:036-iob18-ologic !30_01 !30_07 !30_11 !30_27 !30_29 !31_00 !31_04 !31_06 !31_32 30_03 31_28 32_54
RIOI.OLOGIC_Y1.OSERDES.DATA_WIDTH.DDR.W6 origin:036-iob18-ologic !30_01 !30_03 !30_11 !30_27 !30_29 !31_00 !31_04 !31_06 !31_28 30_07 31_32 32_54
RIOI.OLOGIC_Y1.OSERDES.DATA_WIDTH.DDR.W8 origin:036-iob18-ologic !30_01 !30_03 !30_07 !30_27 !30_29 !31_00 !31_04 !31_06 30_11 31_28 31_32 32_54
RIOI.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W2 origin:036-iob18-ologic !30_01 !30_03 !30_07 !30_11 !30_27 !30_29 !31_04 !31_06 !31_32 !32_36 31_00 31_28 32_34 32_54
RIOI.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W3 origin:036-iob18-ologic !30_03 !30_07 !30_11 !30_27 !30_29 !31_00 !31_04 !31_06 !31_28 !32_36 30_01 31_32 32_34 32_54
RIOI.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W4 origin:036-iob18-ologic !30_01 !30_07 !30_11 !30_27 !30_29 !31_00 !31_04 !31_06 !32_36 30_03 31_28 31_32 32_34 32_54
RIOI.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W5 origin:036-iob18-ologic !30_01 !30_03 !30_07 !30_11 !30_27 !31_00 !31_04 !31_32 !32_36 30_29 31_06 31_28 32_34 32_54
RIOI.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W6 origin:036-iob18-ologic !30_01 !30_03 !30_11 !31_00 !31_04 !31_06 !31_32 !32_36 30_07 30_27 30_29 31_28 32_34 32_54
RIOI.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W7 origin:036-iob18-ologic !30_01 !30_03 !30_07 !30_11 !31_00 !31_06 !31_28 !31_32 !32_36 30_27 30_29 31_04 32_34 32_54
RIOI.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W8 origin:036-iob18-ologic !30_01 !30_03 !30_07 !31_00 !31_04 !31_06 !31_28 !31_32 !32_36 30_11 30_27 30_29 32_34 32_54
RIOI.OLOGIC_Y1.OSERDES.IN_USE origin:036-iob18-ologic 32_54
RIOI.OLOGIC_Y1.OSERDES.SERDES_MODE.SLAVE origin:036-iob18-ologic 32_44
RIOI.OLOGIC_Y1.OSERDES.SRTYPE.SYNC origin:036-iob18-ologic 33_33
RIOI.OLOGIC_Y1.OSERDES.TRISTATE_WIDTH.W4 origin:036-iob18-ologic 33_37
RIOI.OLOGIC_Y1.OSERDES.TSRTYPE.SYNC origin:036-iob18-ologic 33_55
RIOI.OLOGIC_Y1.TDDR.SRUSED origin:036-iob18-ologic 32_38
RIOI.OLOGIC_Y1.ZINIT_OQ origin:036-iob18-ologic 32_30
RIOI.OLOGIC_Y1.ZINIT_TQ origin:036-iob18-ologic 31_52
RIOI.OLOGIC_Y1.ZINV_CLK origin:036-iob18-ologic 30_37
RIOI.OLOGIC_Y1.ZINV_T1 origin:036-iob18-ologic 31_60
RIOI.OLOGIC_Y1.ZINV_T2 origin:036-iob18-ologic 31_56
RIOI.OLOGIC_Y1.ZINV_T3 origin:036-iob18-ologic 30_51
RIOI.OLOGIC_Y1.ZINV_T4 origin:036-iob18-ologic 31_48
RIOI.OLOGIC_Y1.ZSRVAL_OQ origin:036-iob18-ologic 32_20 32_32 33_19
RIOI.OLOGIC_Y1.ZSRVAL_TQ origin:036-iob18-ologic 32_46 32_52 33_45

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@ -0,0 +1,398 @@
RIOI_TBYTESRC.IDELAY_Y0.CINVCTRL_SEL 35_89
RIOI_TBYTESRC.IDELAY_Y0.DELAY_SRC_DATAIN !34_72 35_69
RIOI_TBYTESRC.IDELAY_Y0.DELAY_SRC_IDATAIN 34_72 !35_69
RIOI_TBYTESRC.IDELAY_Y0.HIGH_PERFORMANCE_MODE 32_109
RIOI_TBYTESRC.IDELAY_Y0.IDELAY_TYPE_FIXED !35_113 !35_119
RIOI_TBYTESRC.IDELAY_Y0.IDELAY_TYPE_VAR_LOAD 35_113 35_119
RIOI_TBYTESRC.IDELAY_Y0.IDELAY_TYPE_VARIABLE !35_113 35_119
RIOI_TBYTESRC.IDELAY_Y0.IDELAY_VALUE[0] !34_120 34_122
RIOI_TBYTESRC.IDELAY_Y0.IDELAY_VALUE[1] !34_114 34_116
RIOI_TBYTESRC.IDELAY_Y0.IDELAY_VALUE[2] !34_108 34_110
RIOI_TBYTESRC.IDELAY_Y0.IDELAY_VALUE[3] !34_100 34_102
RIOI_TBYTESRC.IDELAY_Y0.IDELAY_VALUE[4] !34_94 34_96
RIOI_TBYTESRC.IDELAY_Y0.IN_USE 32_73
RIOI_TBYTESRC.IDELAY_Y0.IS_DATAIN_INVERTED 35_81
RIOI_TBYTESRC.IDELAY_Y0.IS_IDATAIN_INVERTED 33_72
RIOI_TBYTESRC.IDELAY_Y0.PIPE_SEL 34_106
RIOI_TBYTESRC.IDELAY_Y0.ZIDELAY_VALUE[0] 34_120 !34_122
RIOI_TBYTESRC.IDELAY_Y0.ZIDELAY_VALUE[1] 34_114 !34_116
RIOI_TBYTESRC.IDELAY_Y0.ZIDELAY_VALUE[2] 34_108 !34_110
RIOI_TBYTESRC.IDELAY_Y0.ZIDELAY_VALUE[3] 34_100 !34_102
RIOI_TBYTESRC.IDELAY_Y0.ZIDELAY_VALUE[4] 34_94 !34_96
RIOI_TBYTESRC.IDELAY_Y1.CINVCTRL_SEL 34_38
RIOI_TBYTESRC.IDELAY_Y1.DELAY_SRC_DATAIN 34_58 !35_55
RIOI_TBYTESRC.IDELAY_Y1.DELAY_SRC_IDATAIN !34_58 35_55
RIOI_TBYTESRC.IDELAY_Y1.HIGH_PERFORMANCE_MODE 33_18
RIOI_TBYTESRC.IDELAY_Y1.IDELAY_TYPE_FIXED !34_08 !34_14
RIOI_TBYTESRC.IDELAY_Y1.IDELAY_TYPE_VAR_LOAD 34_08 34_14
RIOI_TBYTESRC.IDELAY_Y1.IDELAY_TYPE_VARIABLE 34_08 !34_14
RIOI_TBYTESRC.IDELAY_Y1.IDELAY_VALUE[0] 35_05 !35_07
RIOI_TBYTESRC.IDELAY_Y1.IDELAY_VALUE[1] 35_11 !35_13
RIOI_TBYTESRC.IDELAY_Y1.IDELAY_VALUE[2] 35_17 !35_19
RIOI_TBYTESRC.IDELAY_Y1.IDELAY_VALUE[3] 35_25 !35_27
RIOI_TBYTESRC.IDELAY_Y1.IDELAY_VALUE[4] 35_31 !35_33
RIOI_TBYTESRC.IDELAY_Y1.IN_USE 33_54
RIOI_TBYTESRC.IDELAY_Y1.IS_DATAIN_INVERTED 34_46
RIOI_TBYTESRC.IDELAY_Y1.IS_IDATAIN_INVERTED 32_55
RIOI_TBYTESRC.IDELAY_Y1.PIPE_SEL 35_21
RIOI_TBYTESRC.IDELAY_Y1.ZIDELAY_VALUE[0] !35_05 35_07
RIOI_TBYTESRC.IDELAY_Y1.ZIDELAY_VALUE[1] !35_11 35_13
RIOI_TBYTESRC.IDELAY_Y1.ZIDELAY_VALUE[2] !35_17 35_19
RIOI_TBYTESRC.IDELAY_Y1.ZIDELAY_VALUE[3] !35_25 35_27
RIOI_TBYTESRC.IDELAY_Y1.ZIDELAY_VALUE[4] !35_31 35_33
RIOI_TBYTESRC.ILOGIC_Y0.IDDR.IN_USE 26_71 26_121 27_70
RIOI_TBYTESRC.ILOGIC_Y0.IDDR_OR_ISERDES.IN_USE 26_71 27_70
RIOI_TBYTESRC.ILOGIC_Y0.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE !26_99 27_98
RIOI_TBYTESRC.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE 26_99 !27_98
RIOI_TBYTESRC.ILOGIC_Y0.IFF.INV_OCLK 28_124
RIOI_TBYTESRC.ILOGIC_Y0.IFF.SRTYPE.ASYNC !29_67
RIOI_TBYTESRC.ILOGIC_Y0.IFF.SRTYPE.SYNC 29_67
RIOI_TBYTESRC.ILOGIC_Y0.IFF.ZINIT_Q1 28_72
RIOI_TBYTESRC.ILOGIC_Y0.IFF.ZINIT_Q2 28_76
RIOI_TBYTESRC.ILOGIC_Y0.IFF.ZINIT_Q3 28_86
RIOI_TBYTESRC.ILOGIC_Y0.IFF.ZINIT_Q4 28_94
RIOI_TBYTESRC.ILOGIC_Y0.IFF.ZINV_C 28_126 29_123 29_125
RIOI_TBYTESRC.ILOGIC_Y0.IFF.ZINV_OCLK 28_64
RIOI_TBYTESRC.ILOGIC_Y0.IFF.ZSRVAL_Q1 29_71
RIOI_TBYTESRC.ILOGIC_Y0.IFF.ZSRVAL_Q2 29_75
RIOI_TBYTESRC.ILOGIC_Y0.IFF.ZSRVAL_Q3 29_85
RIOI_TBYTESRC.ILOGIC_Y0.IFF.ZSRVAL_Q4 29_93
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.DYN_CLK_INV_EN 29_127
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.DYN_CLKDIV_INV_EN 27_118
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.IN_USE 27_102 28_110
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.MEMORY.DDR.W4 26_71 !26_101 !26_107 !26_109 !26_111 !26_115 !26_121 27_70 27_98 27_102 !27_108 27_110 !27_112 28_110 29_67
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.MEMORY_QDR.DDR.W4 26_71 !26_101 !26_107 !26_109 !26_111 !26_115 26_121 27_70 27_98 27_102 !27_108 27_110 !27_112 28_110 29_67
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.MEMORY_DDR3.DDR.W4 26_71 26_101 26_117 26_121 27_70 27_98 27_102 27_110 28_110 29_67
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.MODE.MASTER !27_106
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.MODE.SLAVE 27_106
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.NETWORKING.DDR.W4 26_71 !26_101 26_107 !26_109 !26_111 !26_115 26_121 27_70 27_98 27_102 !27_108 27_110 !27_112 28_110 29_67
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.NETWORKING.DDR.W6 26_71 !26_101 26_107 !26_109 26_111 !26_115 26_121 27_70 27_98 27_102 !27_108 27_110 !27_112 28_110 29_67
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.NETWORKING.DDR.W8 26_71 !26_101 26_107 26_109 !26_111 !26_115 26_121 27_70 27_98 27_102 !27_108 !27_110 !27_112 28_110 29_67
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.NETWORKING.DDR.W10 26_71 !26_101 26_107 26_109 26_111 !26_115 26_121 27_70 27_98 27_102 !27_108 !27_110 !27_112 28_110 29_67
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.NETWORKING.DDR.W14 26_71 !26_101 26_107 26_109 26_111 !26_115 26_121 27_70 27_98 27_102 !27_108 27_110 !27_112 28_110 29_67
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W2 26_71 !26_101 26_107 !26_109 26_111 !26_115 26_121 27_70 27_98 27_102 27_108 !27_110 !27_112 28_110 29_67
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W3 26_71 !26_101 26_107 !26_109 26_111 !26_115 26_121 27_70 27_98 27_102 27_108 !27_110 27_112 28_110 29_67
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W4 26_71 !26_101 26_107 !26_109 !26_111 !26_115 26_121 27_70 27_98 27_102 27_108 27_110 !27_112 28_110 29_67
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W5 26_71 !26_101 26_107 !26_109 !26_111 !26_115 26_121 27_70 27_98 27_102 27_108 27_110 27_112 28_110 29_67
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W6 26_71 !26_101 26_107 !26_109 26_111 !26_115 26_121 27_70 27_98 27_102 27_108 27_110 !27_112 28_110 29_67
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W7 26_71 !26_101 26_107 !26_109 26_111 !26_115 26_121 27_70 27_98 27_102 27_108 27_110 27_112 28_110 29_67
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W8 26_71 !26_101 26_107 26_109 !26_111 !26_115 26_121 27_70 27_98 27_102 27_108 !27_110 !27_112 28_110 29_67
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.NUM_CE.N1 !27_80
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.NUM_CE.N2 27_80
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.OFB_USED 29_103 29_113
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.OVERSAMPLE.DDR.W4 26_71 26_101 26_107 !26_109 !26_111 26_115 26_121 27_70 27_98 27_102 !27_108 27_110 !27_112 28_110 29_67
RIOI_TBYTESRC.ILOGIC_Y0.ZINV_D 29_109
RIOI_TBYTESRC.ILOGIC_Y0.IDELMUXE3.P0 29_101
RIOI_TBYTESRC.ILOGIC_Y0.IDELMUXE3.P1 !29_101
RIOI_TBYTESRC.ILOGIC_Y0.IFFDELMUXE3.P0 28_116
RIOI_TBYTESRC.ILOGIC_Y1.IDDR.IN_USE 26_57 27_06 27_56
RIOI_TBYTESRC.ILOGIC_Y1.IDDR_OR_ISERDES.IN_USE 26_57 27_56
RIOI_TBYTESRC.ILOGIC_Y1.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE 26_29 !27_28
RIOI_TBYTESRC.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE !26_29 27_28
RIOI_TBYTESRC.ILOGIC_Y1.IFF.INV_OCLK 29_03
RIOI_TBYTESRC.ILOGIC_Y1.IFF.SRTYPE.ASYNC !28_60
RIOI_TBYTESRC.ILOGIC_Y1.IFF.SRTYPE.SYNC 28_60
RIOI_TBYTESRC.ILOGIC_Y1.IFF.ZINIT_Q1 29_55
RIOI_TBYTESRC.ILOGIC_Y1.IFF.ZINIT_Q2 29_51
RIOI_TBYTESRC.ILOGIC_Y1.IFF.ZINIT_Q3 29_41
RIOI_TBYTESRC.ILOGIC_Y1.IFF.ZINIT_Q4 29_33
RIOI_TBYTESRC.ILOGIC_Y1.IFF.ZINV_C 28_02 28_04 29_01
RIOI_TBYTESRC.ILOGIC_Y1.IFF.ZINV_OCLK 29_63
RIOI_TBYTESRC.ILOGIC_Y1.IFF.ZSRVAL_Q1 28_56
RIOI_TBYTESRC.ILOGIC_Y1.IFF.ZSRVAL_Q2 28_52
RIOI_TBYTESRC.ILOGIC_Y1.IFF.ZSRVAL_Q3 28_42
RIOI_TBYTESRC.ILOGIC_Y1.IFF.ZSRVAL_Q4 28_34
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.DYN_CLK_INV_EN 28_00
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.DYN_CLKDIV_INV_EN 26_09
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.IN_USE 26_25 29_17
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.MEMORY.DDR.W4 !26_15 26_17 !26_19 26_25 26_29 26_57 !27_06 !27_12 !27_16 !27_18 !27_20 !27_26 27_56 28_60 29_17
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.MEMORY_QDR.DDR.W4 !26_15 26_17 !26_19 26_25 26_29 26_57 27_06 !27_12 !27_16 !27_18 !27_20 !27_26 27_56 28_60 29_17
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.MEMORY_DDR3.DDR.W4 26_17 26_25 26_29 26_57 27_06 27_10 27_26 27_56 28_60 29_17
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.MODE.MASTER !26_21
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.MODE.SLAVE 26_21
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.NETWORKING.DDR.W4 !26_15 26_17 !26_19 26_25 26_29 26_57 27_06 !27_12 !27_16 !27_18 27_20 !27_26 27_56 28_60 29_17
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.NETWORKING.DDR.W6 !26_15 26_17 !26_19 26_25 26_29 26_57 27_06 !27_12 27_16 !27_18 27_20 !27_26 27_56 28_60 29_17
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.NETWORKING.DDR.W8 !26_15 !26_17 !26_19 26_25 26_29 26_57 27_06 !27_12 !27_16 27_18 27_20 !27_26 27_56 28_60 29_17
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.NETWORKING.DDR.W10 !26_15 !26_17 !26_19 26_25 26_29 26_57 27_06 !27_12 27_16 27_18 27_20 !27_26 27_56 28_60 29_17
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.NETWORKING.DDR.W14 !26_15 26_17 !26_19 26_25 26_29 26_57 27_06 !27_12 27_16 27_18 27_20 !27_26 27_56 28_60 29_17
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W2 !26_15 !26_17 26_19 26_25 26_29 26_57 27_06 !27_12 27_16 !27_18 27_20 !27_26 27_56 28_60 29_17
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W3 26_15 !26_17 26_19 26_25 26_29 26_57 27_06 !27_12 27_16 !27_18 27_20 !27_26 27_56 28_60 29_17
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W4 !26_15 26_17 26_19 26_25 26_29 26_57 27_06 !27_12 !27_16 !27_18 27_20 !27_26 27_56 28_60 29_17
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W5 26_15 26_17 26_19 26_25 26_29 26_57 27_06 !27_12 !27_16 !27_18 27_20 !27_26 27_56 28_60 29_17
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W6 !26_15 26_17 26_19 26_25 26_29 26_57 27_06 !27_12 27_16 !27_18 27_20 !27_26 27_56 28_60 29_17
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W7 26_15 26_17 26_19 26_25 26_29 26_57 27_06 !27_12 27_16 !27_18 27_20 !27_26 27_56 28_60 29_17
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W8 !26_15 !26_17 26_19 26_25 26_29 26_57 27_06 !27_12 !27_16 27_18 27_20 !27_26 27_56 28_60 29_17
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.NUM_CE.N1 !26_47
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.NUM_CE.N2 26_47
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.OFB_USED 28_14 28_24
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.OVERSAMPLE.DDR.W4 !26_15 26_17 !26_19 26_25 26_29 26_57 27_06 27_12 !27_16 !27_18 27_20 27_26 27_56 28_60 29_17
RIOI_TBYTESRC.ILOGIC_Y1.ZINV_D 28_18
RIOI_TBYTESRC.ILOGIC_Y1.IDELMUXE3.P0 28_26
RIOI_TBYTESRC.ILOGIC_Y1.IDELMUXE3.P1 !28_26
RIOI_TBYTESRC.ILOGIC_Y1.IFFDELMUXE3.P0 29_11
RIOI_TBYTESRC.IOI_OCLK_0.IOI_LEAF_GCLK0 28_83 28_95 29_88
RIOI_TBYTESRC.IOI_OCLK_0.IOI_LEAF_GCLK1 28_83 28_97 29_88
RIOI_TBYTESRC.IOI_OCLK_0.IOI_LEAF_GCLK2 28_83 29_88 29_94
RIOI_TBYTESRC.IOI_OCLK_0.IOI_LEAF_GCLK3 28_83 29_88 29_96
RIOI_TBYTESRC.IOI_OCLK_0.IOI_LEAF_GCLK4 28_83 28_89 28_95
RIOI_TBYTESRC.IOI_OCLK_0.IOI_LEAF_GCLK5 28_83 28_89 28_97
RIOI_TBYTESRC.IOI_OCLK_0.IOI_RCLK_FORIO0 28_83 28_89 29_94
RIOI_TBYTESRC.IOI_OCLK_0.IOI_RCLK_FORIO1 28_83 28_89 29_96
RIOI_TBYTESRC.IOI_OCLK_0.IOI_RCLK_FORIO2 28_83 28_95 29_92
RIOI_TBYTESRC.IOI_OCLK_0.IOI_RCLK_FORIO3 28_83 28_97 29_92
RIOI_TBYTESRC.IOI_OCLK_0.IOI_IMUX31_1 28_83 28_93 29_94
RIOI_TBYTESRC.IOI_OCLK_0.IOI_IOCLK0 28_83 29_92 29_94
RIOI_TBYTESRC.IOI_OCLK_0.IOI_IOCLK1 28_83 29_92 29_96
RIOI_TBYTESRC.IOI_OCLK_0.IOI_IOCLK2 28_83 28_93 28_95
RIOI_TBYTESRC.IOI_OCLK_0.IOI_IOCLK3 28_83 28_93 28_97
RIOI_TBYTESRC.IOI_OCLK_1.IOI_LEAF_GCLK0 28_39 29_32 29_44
RIOI_TBYTESRC.IOI_OCLK_1.IOI_LEAF_GCLK1 28_39 29_30 29_44
RIOI_TBYTESRC.IOI_OCLK_1.IOI_LEAF_GCLK2 28_33 28_39 29_44
RIOI_TBYTESRC.IOI_OCLK_1.IOI_LEAF_GCLK3 28_31 28_39 29_44
RIOI_TBYTESRC.IOI_OCLK_1.IOI_LEAF_GCLK4 29_32 29_38 29_44
RIOI_TBYTESRC.IOI_OCLK_1.IOI_LEAF_GCLK5 29_30 29_38 29_44
RIOI_TBYTESRC.IOI_OCLK_1.IOI_RCLK_FORIO0 28_33 29_38 29_44
RIOI_TBYTESRC.IOI_OCLK_1.IOI_RCLK_FORIO1 28_31 29_38 29_44
RIOI_TBYTESRC.IOI_OCLK_1.IOI_RCLK_FORIO2 28_35 29_32 29_44
RIOI_TBYTESRC.IOI_OCLK_1.IOI_RCLK_FORIO3 28_35 29_30 29_44
RIOI_TBYTESRC.IOI_OCLK_1.IOI_IMUX31_0 28_33 29_34 29_44
RIOI_TBYTESRC.IOI_OCLK_1.IOI_IOCLK0 28_33 28_35 29_44
RIOI_TBYTESRC.IOI_OCLK_1.IOI_IOCLK1 28_31 28_35 29_44
RIOI_TBYTESRC.IOI_OCLK_1.IOI_IOCLK2 29_32 29_34 29_44
RIOI_TBYTESRC.IOI_OCLK_1.IOI_IOCLK3 29_30 29_34 29_44
RIOI_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK0 30_88 31_83 31_95
RIOI_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK1 30_88 31_83 31_97
RIOI_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK2 30_88 30_94 31_83
RIOI_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK3 30_88 30_96 31_83
RIOI_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK4 31_83 31_89 31_95
RIOI_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK5 31_83 31_89 31_97
RIOI_TBYTESRC.IOI_OCLKM_0.IOI_RCLK_FORIO0 30_94 31_83 31_89
RIOI_TBYTESRC.IOI_OCLKM_0.IOI_RCLK_FORIO1 30_96 31_83 31_89
RIOI_TBYTESRC.IOI_OCLKM_0.IOI_RCLK_FORIO2 30_92 31_83 31_95
RIOI_TBYTESRC.IOI_OCLKM_0.IOI_RCLK_FORIO3 30_92 31_83 31_97
RIOI_TBYTESRC.IOI_OCLKM_0.IOI_IOCLK0 30_92 30_94 31_83
RIOI_TBYTESRC.IOI_OCLKM_0.IOI_IOCLK1 30_92 30_96 31_83
RIOI_TBYTESRC.IOI_OCLKM_0.IOI_IOCLK2 31_83 31_93 31_95
RIOI_TBYTESRC.IOI_OCLKM_0.IOI_IOCLK3 31_83 31_93 31_97
RIOI_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK0 30_32 30_44 31_39
RIOI_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK1 30_30 30_44 31_39
RIOI_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK2 30_44 31_33 31_39
RIOI_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK3 30_44 31_31 31_39
RIOI_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK4 30_32 30_38 30_44
RIOI_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK5 30_30 30_38 30_44
RIOI_TBYTESRC.IOI_OCLKM_1.IOI_RCLK_FORIO0 30_38 30_44 31_33
RIOI_TBYTESRC.IOI_OCLKM_1.IOI_RCLK_FORIO1 30_38 30_44 31_31
RIOI_TBYTESRC.IOI_OCLKM_1.IOI_RCLK_FORIO2 30_32 30_44 31_35
RIOI_TBYTESRC.IOI_OCLKM_1.IOI_RCLK_FORIO3 30_30 30_44 31_35
RIOI_TBYTESRC.IOI_OCLKM_1.IOI_IOCLK0 30_44 31_33 31_35
RIOI_TBYTESRC.IOI_OCLKM_1.IOI_IOCLK1 30_44 31_31 31_35
RIOI_TBYTESRC.IOI_OCLKM_1.IOI_IOCLK2 30_32 30_34 30_44
RIOI_TBYTESRC.IOI_OCLKM_1.IOI_IOCLK3 30_30 30_34 30_44
RIOI_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK0 28_67 28_79 29_74
RIOI_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK1 28_67 28_81 29_74
RIOI_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK2 28_67 29_74 29_78
RIOI_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK3 28_67 29_74 29_80
RIOI_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK4 28_67 28_75 28_79
RIOI_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK5 28_67 28_75 28_81
RIOI_TBYTESRC.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO0 28_67 28_75 29_78
RIOI_TBYTESRC.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO1 28_67 28_75 29_80
RIOI_TBYTESRC.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO2 28_67 28_79 29_76
RIOI_TBYTESRC.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO3 28_67 28_81 29_76
RIOI_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IMUX20_1 28_67 28_77 29_80
RIOI_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IMUX22_1 28_67 28_77 29_78
RIOI_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IOCLK0 28_67 29_76 29_78
RIOI_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IOCLK1 28_67 29_76 29_80
RIOI_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IOCLK2 28_67 28_77 28_79
RIOI_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IOCLK3 28_67 28_77 28_81
RIOI_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK0 30_74 31_67 31_79
RIOI_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK1 30_74 31_67 31_81
RIOI_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK2 30_74 30_78 31_67
RIOI_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK3 30_74 30_80 31_67
RIOI_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK4 31_67 31_75 31_79
RIOI_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK5 31_67 31_75 31_81
RIOI_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO0 30_78 31_67 31_75
RIOI_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 30_80 31_67 31_75
RIOI_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 30_76 31_67 31_79
RIOI_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 30_76 31_67 31_81
RIOI_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 30_80 31_67 31_77
RIOI_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IMUX22_1 30_78 31_67 31_77
RIOI_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK0 30_76 30_78 31_67
RIOI_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK1 30_76 30_80 31_67
RIOI_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK2 31_67 31_77 31_79
RIOI_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK3 31_67 31_77 31_81
RIOI_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK0 28_53 29_48 29_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK1 28_53 29_46 29_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK2 28_49 28_53 29_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK3 28_47 28_53 29_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK4 29_48 29_52 29_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK5 29_46 29_52 29_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO0 28_49 29_52 29_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO1 28_47 29_52 29_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO2 28_51 29_48 29_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO3 28_51 29_46 29_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IMUX20_0 28_47 29_50 29_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IMUX22_0 28_49 29_50 29_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IOCLK0 28_49 28_51 29_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IOCLK1 28_47 28_51 29_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IOCLK2 29_48 29_50 29_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IOCLK3 29_46 29_50 29_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK0 30_48 30_60 31_53
RIOI_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK1 30_46 30_60 31_53
RIOI_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK2 30_60 31_49 31_53
RIOI_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK3 30_60 31_47 31_53
RIOI_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK4 30_48 30_52 30_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK5 30_46 30_52 30_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO0 30_52 30_60 31_49
RIOI_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO1 30_52 30_60 31_47
RIOI_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO2 30_48 30_60 31_51
RIOI_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO3 30_46 30_60 31_51
RIOI_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IMUX20_0 30_50 30_60 31_47
RIOI_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IMUX22_0 30_50 30_60 31_49
RIOI_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK0 30_60 31_49 31_51
RIOI_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK1 30_60 31_47 31_51
RIOI_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK2 30_48 30_50 30_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK3 30_46 30_50 30_60
RIOI_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK0 28_111 29_118 29_124 30_118 30_124 31_111
RIOI_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK1 28_111 29_118 29_126 30_118 30_126 31_111
RIOI_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK2 28_111 28_123 29_118 30_118 31_111 31_123
RIOI_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK3 28_111 28_125 29_118 30_118 31_111 31_125
RIOI_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK4 28_111 28_119 29_124 30_124 31_111 31_119
RIOI_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK5 28_111 28_119 29_126 30_126 31_111 31_119
RIOI_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO0 28_111 28_119 28_123 31_111 31_119 31_123
RIOI_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO1 28_111 28_119 28_125 31_111 31_119 31_125
RIOI_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO2 28_111 28_121 29_124 30_124 31_111 31_121
RIOI_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO3 28_111 28_121 29_126 30_126 31_111 31_121
RIOI_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_IMUX8_1 28_111 28_121 28_123 31_111 31_121 31_123
RIOI_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK0 28_03 28_09 29_16 30_16 31_03 31_09
RIOI_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK1 28_01 28_09 29_16 30_16 31_01 31_09
RIOI_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK2 28_09 29_04 29_16 30_04 30_16 31_09
RIOI_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK3 28_09 29_02 29_16 30_02 30_16 31_09
RIOI_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK4 28_03 29_08 29_16 30_08 30_16 31_03
RIOI_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK5 28_01 29_08 29_16 30_08 30_16 31_01
RIOI_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO0 29_04 29_08 29_16 30_04 30_08 30_16
RIOI_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO1 29_02 29_08 29_16 30_02 30_08 30_16
RIOI_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO2 28_03 29_06 29_16 30_06 30_16 31_03
RIOI_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO3 28_01 29_06 29_16 30_06 30_16 31_01
RIOI_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_IMUX8_0 29_04 29_06 29_16 30_04 30_06 30_16
RIOI_TBYTESRC.ODELAY_Y0.CINVCTRL_SEL 37_89
RIOI_TBYTESRC.ODELAY_Y0.HIGH_PERFORMANCE_MODE 34_109
RIOI_TBYTESRC.ODELAY_Y0.IN_USE 34_73 36_72 39_75
RIOI_TBYTESRC.ODELAY_Y0.IS_C_INVERTED 36_88
RIOI_TBYTESRC.ODELAY_Y0.ODELAY_TYPE_VAR_LOAD 37_113 37_119
RIOI_TBYTESRC.ODELAY_Y0.ODELAY_TYPE_VARIABLE 37_119
RIOI_TBYTESRC.ODELAY_Y0.ODELAY_VALUE[0] 36_122
RIOI_TBYTESRC.ODELAY_Y0.ODELAY_VALUE[1] 36_116
RIOI_TBYTESRC.ODELAY_Y0.ODELAY_VALUE[2] 36_110
RIOI_TBYTESRC.ODELAY_Y0.ODELAY_VALUE[3] 36_102
RIOI_TBYTESRC.ODELAY_Y0.ODELAY_VALUE[4] 36_96
RIOI_TBYTESRC.ODELAY_Y0.ZINV_ODATAIN 35_72
RIOI_TBYTESRC.ODELAY_Y0.ZODELAY_VALUE[0] 36_120
RIOI_TBYTESRC.ODELAY_Y0.ZODELAY_VALUE[1] 36_114
RIOI_TBYTESRC.ODELAY_Y0.ZODELAY_VALUE[2] 36_108
RIOI_TBYTESRC.ODELAY_Y0.ZODELAY_VALUE[3] 36_100
RIOI_TBYTESRC.ODELAY_Y0.ZODELAY_VALUE[4] 36_94
RIOI_TBYTESRC.ODELAY_Y1.CINVCTRL_SEL 36_38
RIOI_TBYTESRC.ODELAY_Y1.HIGH_PERFORMANCE_MODE 35_18
RIOI_TBYTESRC.ODELAY_Y1.IN_USE 35_54 37_55 38_52
RIOI_TBYTESRC.ODELAY_Y1.IS_C_INVERTED 37_39
RIOI_TBYTESRC.ODELAY_Y1.ODELAY_TYPE_VAR_LOAD 36_08 36_14
RIOI_TBYTESRC.ODELAY_Y1.ODELAY_TYPE_VARIABLE 36_08
RIOI_TBYTESRC.ODELAY_Y1.ODELAY_VALUE[0] 37_05
RIOI_TBYTESRC.ODELAY_Y1.ODELAY_VALUE[1] 37_11
RIOI_TBYTESRC.ODELAY_Y1.ODELAY_VALUE[2] 37_17
RIOI_TBYTESRC.ODELAY_Y1.ODELAY_VALUE[3] 37_25
RIOI_TBYTESRC.ODELAY_Y1.ODELAY_VALUE[4] 37_31
RIOI_TBYTESRC.ODELAY_Y1.ZINV_ODATAIN 34_55
RIOI_TBYTESRC.ODELAY_Y1.ZODELAY_VALUE[0] 37_07
RIOI_TBYTESRC.ODELAY_Y1.ZODELAY_VALUE[1] 37_13
RIOI_TBYTESRC.ODELAY_Y1.ZODELAY_VALUE[2] 37_19
RIOI_TBYTESRC.ODELAY_Y1.ZODELAY_VALUE[3] 37_27
RIOI_TBYTESRC.ODELAY_Y1.ZODELAY_VALUE[4] 37_33
RIOI_TBYTESRC.OLOGIC_Y0.IS_CLKDIV_INVERTED 30_85
RIOI_TBYTESRC.OLOGIC_Y0.IS_D1_INVERTED 30_97
RIOI_TBYTESRC.OLOGIC_Y0.IS_D2_INVERTED 31_102
RIOI_TBYTESRC.OLOGIC_Y0.IS_D3_INVERTED 31_106
RIOI_TBYTESRC.OLOGIC_Y0.IS_D4_INVERTED 31_110
RIOI_TBYTESRC.OLOGIC_Y0.IS_D5_INVERTED 30_113
RIOI_TBYTESRC.OLOGIC_Y0.IS_D6_INVERTED 31_114
RIOI_TBYTESRC.OLOGIC_Y0.IS_D7_INVERTED 31_118
RIOI_TBYTESRC.OLOGIC_Y0.IS_D8_INVERTED 30_125
RIOI_TBYTESRC.OLOGIC_Y0.ODDR.DDR_CLK_EDGE.SAME_EDGE 31_92
RIOI_TBYTESRC.OLOGIC_Y0.ODDR.SRUSED 32_112
RIOI_TBYTESRC.OLOGIC_Y0.ODDR_TDDR.IN_USE 31_83
RIOI_TBYTESRC.OLOGIC_Y0.OMUX.D1 33_111
RIOI_TBYTESRC.OLOGIC_Y0.OQUSED 31_86
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.DATA_RATE_OQ.DDR 33_91 !33_93
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.DATA_RATE_OQ.SDR !33_91 33_93
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.DATA_RATE_TQ.BUF 32_66 !32_70 !33_69
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.DATA_RATE_TQ.DDR !32_66 32_70 !33_69
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.DATA_RATE_TQ.SDR !32_66 !32_70 33_69
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.DATA_WIDTH.DDR.W4 !30_95 30_99 !30_121 !30_123 !30_127 !31_100 !31_116 !31_120 31_124 !31_126 33_73
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.DATA_WIDTH.DDR.W6 30_95 !30_99 !30_121 !30_123 !30_127 !31_100 !31_116 31_120 !31_124 !31_126 33_73
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.DATA_WIDTH.DDR.W8 30_95 30_99 !30_121 !30_123 !30_127 !31_100 31_116 !31_120 !31_124 !31_126 33_73
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W2 !30_95 30_99 !30_121 !30_123 30_127 !31_100 !31_116 !31_120 !31_124 !31_126 33_73 !33_91 33_93
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W3 30_95 !30_99 !30_121 !30_123 !30_127 !31_100 !31_116 !31_120 !31_124 31_126 33_73 !33_91 33_93
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W4 30_95 30_99 !30_121 !30_123 !30_127 !31_100 !31_116 !31_120 31_124 !31_126 33_73 !33_91 33_93
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W5 !30_95 30_99 30_121 !30_123 !30_127 31_98 !31_100 !31_116 !31_120 !31_124 !31_126 33_73 !33_91 33_93
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W6 !30_95 30_99 !30_121 !30_123 !30_127 31_98 31_100 !31_116 31_120 !31_124 !31_126 33_73 !33_91 33_93
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W7 !30_95 !30_99 !30_121 30_123 !30_127 31_98 31_100 !31_116 !31_120 !31_124 !31_126 33_73 !33_91 33_93
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W8 !30_95 !30_99 !30_121 !30_123 !30_127 31_98 31_100 31_116 !31_120 !31_124 !31_126 33_73 !33_91 33_93
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.IN_USE 33_73
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.SERDES_MODE.SLAVE 33_83
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.SRTYPE.SYNC 32_94
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.TRISTATE_WIDTH.W4 32_90
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.TSRTYPE.SYNC 32_72
RIOI_TBYTESRC.OLOGIC_Y0.TDDR.SRUSED 33_89
RIOI_TBYTESRC.OLOGIC_Y0.ZINIT_OQ 33_97
RIOI_TBYTESRC.OLOGIC_Y0.ZINIT_TQ 30_75
RIOI_TBYTESRC.OLOGIC_Y0.ZINV_CLK 31_90
RIOI_TBYTESRC.OLOGIC_Y0.ZINV_T1 30_67
RIOI_TBYTESRC.OLOGIC_Y0.ZINV_T2 30_71
RIOI_TBYTESRC.OLOGIC_Y0.ZINV_T3 31_76
RIOI_TBYTESRC.OLOGIC_Y0.ZINV_T4 30_79
RIOI_TBYTESRC.OLOGIC_Y0.ZSRVAL_OQ 32_108 33_95 33_107
RIOI_TBYTESRC.OLOGIC_Y0.ZSRVAL_TQ 32_82 33_75 33_81
RIOI_TBYTESRC.OLOGIC_Y1.IS_CLKDIV_INVERTED 31_42
RIOI_TBYTESRC.OLOGIC_Y1.IS_D1_INVERTED 31_30
RIOI_TBYTESRC.OLOGIC_Y1.IS_D2_INVERTED 30_25
RIOI_TBYTESRC.OLOGIC_Y1.IS_D3_INVERTED 30_21
RIOI_TBYTESRC.OLOGIC_Y1.IS_D4_INVERTED 30_17
RIOI_TBYTESRC.OLOGIC_Y1.IS_D5_INVERTED 31_14
RIOI_TBYTESRC.OLOGIC_Y1.IS_D6_INVERTED 30_13
RIOI_TBYTESRC.OLOGIC_Y1.IS_D7_INVERTED 30_09
RIOI_TBYTESRC.OLOGIC_Y1.IS_D8_INVERTED 31_02
RIOI_TBYTESRC.OLOGIC_Y1.ODDR.DDR_CLK_EDGE.SAME_EDGE 30_35
RIOI_TBYTESRC.OLOGIC_Y1.ODDR.SRUSED 33_15
RIOI_TBYTESRC.OLOGIC_Y1.ODDR_TDDR.IN_USE 30_44
RIOI_TBYTESRC.OLOGIC_Y1.OMUX.D1 32_16
RIOI_TBYTESRC.OLOGIC_Y1.OQUSED 30_41
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.DATA_RATE_OQ.DDR !32_34 32_36
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.DATA_RATE_OQ.SDR 32_34 !32_36
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.DATA_RATE_TQ.BUF !32_58 !33_57 33_61
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.DATA_RATE_TQ.DDR !32_58 33_57 !33_61
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.DATA_RATE_TQ.SDR 32_58 !33_57 !33_61
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.DATA_WIDTH.DDR.W4 !30_01 30_03 !30_07 !30_11 !30_27 !30_29 !31_00 !31_04 !31_06 31_28 !31_32 32_54
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.DATA_WIDTH.DDR.W6 !30_01 !30_03 30_07 !30_11 !30_27 !30_29 !31_00 !31_04 !31_06 !31_28 31_32 32_54
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.DATA_WIDTH.DDR.W8 !30_01 !30_03 !30_07 30_11 !30_27 !30_29 !31_00 !31_04 !31_06 31_28 31_32 32_54
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W2 !30_01 !30_03 !30_07 !30_11 !30_27 !30_29 31_00 !31_04 !31_06 31_28 !31_32 32_34 !32_36 32_54
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W3 30_01 !30_03 !30_07 !30_11 !30_27 !30_29 !31_00 !31_04 !31_06 !31_28 31_32 32_34 !32_36 32_54
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W4 !30_01 30_03 !30_07 !30_11 !30_27 !30_29 !31_00 !31_04 !31_06 31_28 31_32 32_34 !32_36 32_54
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W5 !30_01 !30_03 !30_07 !30_11 !30_27 30_29 !31_00 !31_04 31_06 31_28 !31_32 32_34 !32_36 32_54
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W6 !30_01 !30_03 30_07 !30_11 30_27 30_29 !31_00 !31_04 !31_06 31_28 !31_32 32_34 !32_36 32_54
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W7 !30_01 !30_03 !30_07 !30_11 30_27 30_29 !31_00 31_04 !31_06 !31_28 !31_32 32_34 !32_36 32_54
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W8 !30_01 !30_03 !30_07 30_11 30_27 30_29 !31_00 !31_04 !31_06 !31_28 !31_32 32_34 !32_36 32_54
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.IN_USE 32_54
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.SERDES_MODE.SLAVE 32_44
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.SRTYPE.SYNC 33_33
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.TRISTATE_WIDTH.W4 33_37
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.TSRTYPE.SYNC 33_55
RIOI_TBYTESRC.OLOGIC_Y1.TDDR.SRUSED 32_38
RIOI_TBYTESRC.OLOGIC_Y1.ZINIT_OQ 32_30
RIOI_TBYTESRC.OLOGIC_Y1.ZINIT_TQ 31_52
RIOI_TBYTESRC.OLOGIC_Y1.ZINV_CLK 30_37
RIOI_TBYTESRC.OLOGIC_Y1.ZINV_T1 31_60
RIOI_TBYTESRC.OLOGIC_Y1.ZINV_T2 31_56
RIOI_TBYTESRC.OLOGIC_Y1.ZINV_T3 30_51
RIOI_TBYTESRC.OLOGIC_Y1.ZINV_T4 31_48
RIOI_TBYTESRC.OLOGIC_Y1.ZSRVAL_OQ 32_20 32_32 33_19
RIOI_TBYTESRC.OLOGIC_Y1.ZSRVAL_TQ 32_46 32_52 33_45

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@ -0,0 +1,398 @@
RIOI_TBYTESRC.IDELAY_Y0.CINVCTRL_SEL origin:035a-iob18-idelay 35_89
RIOI_TBYTESRC.IDELAY_Y0.DELAY_SRC_DATAIN origin:035a-iob18-idelay !34_72 35_69
RIOI_TBYTESRC.IDELAY_Y0.DELAY_SRC_IDATAIN origin:035a-iob18-idelay !35_69 34_72
RIOI_TBYTESRC.IDELAY_Y0.HIGH_PERFORMANCE_MODE origin:035a-iob18-idelay 32_109
RIOI_TBYTESRC.IDELAY_Y0.IDELAY_TYPE_FIXED origin:035a-iob18-idelay !35_113 !35_119
RIOI_TBYTESRC.IDELAY_Y0.IDELAY_TYPE_VAR_LOAD origin:035a-iob18-idelay 35_113 35_119
RIOI_TBYTESRC.IDELAY_Y0.IDELAY_TYPE_VARIABLE origin:035a-iob18-idelay !35_113 35_119
RIOI_TBYTESRC.IDELAY_Y0.IDELAY_VALUE[0] origin:035a-iob18-idelay !34_120 34_122
RIOI_TBYTESRC.IDELAY_Y0.IDELAY_VALUE[1] origin:035a-iob18-idelay !34_114 34_116
RIOI_TBYTESRC.IDELAY_Y0.IDELAY_VALUE[2] origin:035a-iob18-idelay !34_108 34_110
RIOI_TBYTESRC.IDELAY_Y0.IDELAY_VALUE[3] origin:035a-iob18-idelay !34_100 34_102
RIOI_TBYTESRC.IDELAY_Y0.IDELAY_VALUE[4] origin:035a-iob18-idelay !34_94 34_96
RIOI_TBYTESRC.IDELAY_Y0.IN_USE origin:035a-iob18-idelay 32_73
RIOI_TBYTESRC.IDELAY_Y0.IS_DATAIN_INVERTED origin:035a-iob18-idelay 35_81
RIOI_TBYTESRC.IDELAY_Y0.IS_IDATAIN_INVERTED origin:035a-iob18-idelay 33_72
RIOI_TBYTESRC.IDELAY_Y0.PIPE_SEL origin:035a-iob18-idelay 34_106
RIOI_TBYTESRC.IDELAY_Y0.ZIDELAY_VALUE[0] origin:035a-iob18-idelay !34_122 34_120
RIOI_TBYTESRC.IDELAY_Y0.ZIDELAY_VALUE[1] origin:035a-iob18-idelay !34_116 34_114
RIOI_TBYTESRC.IDELAY_Y0.ZIDELAY_VALUE[2] origin:035a-iob18-idelay !34_110 34_108
RIOI_TBYTESRC.IDELAY_Y0.ZIDELAY_VALUE[3] origin:035a-iob18-idelay !34_102 34_100
RIOI_TBYTESRC.IDELAY_Y0.ZIDELAY_VALUE[4] origin:035a-iob18-idelay !34_96 34_94
RIOI_TBYTESRC.IDELAY_Y1.CINVCTRL_SEL origin:035a-iob18-idelay 34_38
RIOI_TBYTESRC.IDELAY_Y1.DELAY_SRC_DATAIN origin:035a-iob18-idelay !35_55 34_58
RIOI_TBYTESRC.IDELAY_Y1.DELAY_SRC_IDATAIN origin:035a-iob18-idelay !34_58 35_55
RIOI_TBYTESRC.IDELAY_Y1.HIGH_PERFORMANCE_MODE origin:035a-iob18-idelay 33_18
RIOI_TBYTESRC.IDELAY_Y1.IDELAY_TYPE_FIXED origin:035a-iob18-idelay !34_08 !34_14
RIOI_TBYTESRC.IDELAY_Y1.IDELAY_TYPE_VAR_LOAD origin:035a-iob18-idelay 34_08 34_14
RIOI_TBYTESRC.IDELAY_Y1.IDELAY_TYPE_VARIABLE origin:035a-iob18-idelay !34_14 34_08
RIOI_TBYTESRC.IDELAY_Y1.IDELAY_VALUE[0] origin:035a-iob18-idelay !35_07 35_05
RIOI_TBYTESRC.IDELAY_Y1.IDELAY_VALUE[1] origin:035a-iob18-idelay !35_13 35_11
RIOI_TBYTESRC.IDELAY_Y1.IDELAY_VALUE[2] origin:035a-iob18-idelay !35_19 35_17
RIOI_TBYTESRC.IDELAY_Y1.IDELAY_VALUE[3] origin:035a-iob18-idelay !35_27 35_25
RIOI_TBYTESRC.IDELAY_Y1.IDELAY_VALUE[4] origin:035a-iob18-idelay !35_33 35_31
RIOI_TBYTESRC.IDELAY_Y1.IN_USE origin:035a-iob18-idelay 33_54
RIOI_TBYTESRC.IDELAY_Y1.IS_DATAIN_INVERTED origin:035a-iob18-idelay 34_46
RIOI_TBYTESRC.IDELAY_Y1.IS_IDATAIN_INVERTED origin:035a-iob18-idelay 32_55
RIOI_TBYTESRC.IDELAY_Y1.PIPE_SEL origin:035a-iob18-idelay 35_21
RIOI_TBYTESRC.IDELAY_Y1.ZIDELAY_VALUE[0] origin:035a-iob18-idelay !35_05 35_07
RIOI_TBYTESRC.IDELAY_Y1.ZIDELAY_VALUE[1] origin:035a-iob18-idelay !35_11 35_13
RIOI_TBYTESRC.IDELAY_Y1.ZIDELAY_VALUE[2] origin:035a-iob18-idelay !35_17 35_19
RIOI_TBYTESRC.IDELAY_Y1.ZIDELAY_VALUE[3] origin:035a-iob18-idelay !35_25 35_27
RIOI_TBYTESRC.IDELAY_Y1.ZIDELAY_VALUE[4] origin:035a-iob18-idelay !35_31 35_33
RIOI_TBYTESRC.ILOGIC_Y0.IDDR.IN_USE origin:035b-iob-iserdes 26_121 26_71 27_70
RIOI_TBYTESRC.ILOGIC_Y0.IDDR_OR_ISERDES.IN_USE origin:035b-iob-iserdes 26_71 27_70
RIOI_TBYTESRC.ILOGIC_Y0.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE origin:035-iob-ilogic !26_99 27_98
RIOI_TBYTESRC.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE origin:035-iob-ilogic !27_98 26_99
RIOI_TBYTESRC.ILOGIC_Y0.IFF.INV_OCLK origin:035-iob-ilogic 28_124
RIOI_TBYTESRC.ILOGIC_Y0.IFF.SRTYPE.ASYNC origin:035-iob-ilogic !29_67
RIOI_TBYTESRC.ILOGIC_Y0.IFF.SRTYPE.SYNC origin:035-iob-ilogic 29_67
RIOI_TBYTESRC.ILOGIC_Y0.IFF.ZINIT_Q1 origin:035-iob-ilogic 28_72
RIOI_TBYTESRC.ILOGIC_Y0.IFF.ZINIT_Q2 origin:035-iob-ilogic 28_76
RIOI_TBYTESRC.ILOGIC_Y0.IFF.ZINIT_Q3 origin:035-iob-ilogic 28_86
RIOI_TBYTESRC.ILOGIC_Y0.IFF.ZINIT_Q4 origin:035-iob-ilogic 28_94
RIOI_TBYTESRC.ILOGIC_Y0.IFF.ZINV_C origin:035-iob-ilogic 28_126 29_123 29_125
RIOI_TBYTESRC.ILOGIC_Y0.IFF.ZINV_OCLK origin:035-iob-ilogic 28_64
RIOI_TBYTESRC.ILOGIC_Y0.IFF.ZSRVAL_Q1 origin:035-iob-ilogic 29_71
RIOI_TBYTESRC.ILOGIC_Y0.IFF.ZSRVAL_Q2 origin:035-iob-ilogic 29_75
RIOI_TBYTESRC.ILOGIC_Y0.IFF.ZSRVAL_Q3 origin:035-iob-ilogic 29_85
RIOI_TBYTESRC.ILOGIC_Y0.IFF.ZSRVAL_Q4 origin:035-iob-ilogic 29_93
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.DYN_CLK_INV_EN origin:035b-iob-iserdes 29_127
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.DYN_CLKDIV_INV_EN origin:035b-iob-iserdes 27_118
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.IN_USE origin:035b-iob-iserdes 27_102 28_110
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.MEMORY.DDR.W4 origin:035b-iob-iserdes !26_101 !26_107 !26_109 !26_111 !26_115 !26_121 !27_108 !27_112 26_71 27_102 27_110 27_70 27_98 28_110 29_67
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.MEMORY_QDR.DDR.W4 origin:035b-iob-iserdes !26_101 !26_107 !26_109 !26_111 !26_115 !27_108 !27_112 26_121 26_71 27_102 27_110 27_70 27_98 28_110 29_67
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.MEMORY_DDR3.DDR.W4 origin:035b-iob-iserdes 26_101 26_117 26_121 26_71 27_102 27_110 27_70 27_98 28_110 29_67
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.MODE.MASTER origin:035b-iob-iserdes !27_106
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.MODE.SLAVE origin:035b-iob-iserdes 27_106
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.NETWORKING.DDR.W4 origin:035b-iob-iserdes !26_101 !26_109 !26_111 !26_115 !27_108 !27_112 26_107 26_121 26_71 27_102 27_110 27_70 27_98 28_110 29_67
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.NETWORKING.DDR.W6 origin:035b-iob-iserdes !26_101 !26_109 !26_115 !27_108 !27_112 26_107 26_111 26_121 26_71 27_102 27_110 27_70 27_98 28_110 29_67
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.NETWORKING.DDR.W8 origin:035b-iob-iserdes !26_101 !26_111 !26_115 !27_108 !27_110 !27_112 26_107 26_109 26_121 26_71 27_102 27_70 27_98 28_110 29_67
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.NETWORKING.DDR.W10 origin:035b-iob-iserdes !26_101 !26_115 !27_108 !27_110 !27_112 26_107 26_109 26_111 26_121 26_71 27_102 27_70 27_98 28_110 29_67
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.NETWORKING.DDR.W14 origin:035b-iob-iserdes !26_101 !26_115 !27_108 !27_112 26_107 26_109 26_111 26_121 26_71 27_102 27_110 27_70 27_98 28_110 29_67
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W2 origin:035b-iob-iserdes !26_101 !26_109 !26_115 !27_110 !27_112 26_107 26_111 26_121 26_71 27_102 27_108 27_70 27_98 28_110 29_67
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W3 origin:035b-iob-iserdes !26_101 !26_109 !26_115 !27_110 26_107 26_111 26_121 26_71 27_102 27_108 27_112 27_70 27_98 28_110 29_67
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W4 origin:035b-iob-iserdes !26_101 !26_109 !26_111 !26_115 !27_112 26_107 26_121 26_71 27_102 27_108 27_110 27_70 27_98 28_110 29_67
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W5 origin:035b-iob-iserdes !26_101 !26_109 !26_111 !26_115 26_107 26_121 26_71 27_102 27_108 27_110 27_112 27_70 27_98 28_110 29_67
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W6 origin:035b-iob-iserdes !26_101 !26_109 !26_115 !27_112 26_107 26_111 26_121 26_71 27_102 27_108 27_110 27_70 27_98 28_110 29_67
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W7 origin:035b-iob-iserdes !26_101 !26_109 !26_115 26_107 26_111 26_121 26_71 27_102 27_108 27_110 27_112 27_70 27_98 28_110 29_67
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W8 origin:035b-iob-iserdes !26_101 !26_111 !26_115 !27_110 !27_112 26_107 26_109 26_121 26_71 27_102 27_108 27_70 27_98 28_110 29_67
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.NUM_CE.N1 origin:035b-iob-iserdes !27_80
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.NUM_CE.N2 origin:035b-iob-iserdes 27_80
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.OFB_USED origin:035b-iob-iserdes 29_103 29_113
RIOI_TBYTESRC.ILOGIC_Y0.ISERDES.OVERSAMPLE.DDR.W4 origin:035b-iob-iserdes !26_109 !26_111 !27_108 !27_112 26_101 26_107 26_115 26_121 26_71 27_102 27_110 27_70 27_98 28_110 29_67
RIOI_TBYTESRC.ILOGIC_Y0.ZINV_D origin:035-iob-ilogic 29_109
RIOI_TBYTESRC.ILOGIC_Y0.IDELMUXE3.P0 origin:035-iob-ilogic 29_101
RIOI_TBYTESRC.ILOGIC_Y0.IDELMUXE3.P1 origin:035-iob-ilogic !29_101
RIOI_TBYTESRC.ILOGIC_Y0.IFFDELMUXE3.P0 origin:035-iob-ilogic 28_116
RIOI_TBYTESRC.ILOGIC_Y1.IDDR.IN_USE origin:035b-iob-iserdes 26_57 27_06 27_56
RIOI_TBYTESRC.ILOGIC_Y1.IDDR_OR_ISERDES.IN_USE origin:035b-iob-iserdes 26_57 27_56
RIOI_TBYTESRC.ILOGIC_Y1.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE origin:035-iob-ilogic !27_28 26_29
RIOI_TBYTESRC.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE origin:035-iob-ilogic !26_29 27_28
RIOI_TBYTESRC.ILOGIC_Y1.IFF.INV_OCLK origin:035-iob-ilogic 29_03
RIOI_TBYTESRC.ILOGIC_Y1.IFF.SRTYPE.ASYNC origin:035-iob-ilogic !28_60
RIOI_TBYTESRC.ILOGIC_Y1.IFF.SRTYPE.SYNC origin:035-iob-ilogic 28_60
RIOI_TBYTESRC.ILOGIC_Y1.IFF.ZINIT_Q1 origin:035-iob-ilogic 29_55
RIOI_TBYTESRC.ILOGIC_Y1.IFF.ZINIT_Q2 origin:035-iob-ilogic 29_51
RIOI_TBYTESRC.ILOGIC_Y1.IFF.ZINIT_Q3 origin:035-iob-ilogic 29_41
RIOI_TBYTESRC.ILOGIC_Y1.IFF.ZINIT_Q4 origin:035-iob-ilogic 29_33
RIOI_TBYTESRC.ILOGIC_Y1.IFF.ZINV_C origin:035-iob-ilogic 28_02 28_04 29_01
RIOI_TBYTESRC.ILOGIC_Y1.IFF.ZINV_OCLK origin:035-iob-ilogic 29_63
RIOI_TBYTESRC.ILOGIC_Y1.IFF.ZSRVAL_Q1 origin:035-iob-ilogic 28_56
RIOI_TBYTESRC.ILOGIC_Y1.IFF.ZSRVAL_Q2 origin:035-iob-ilogic 28_52
RIOI_TBYTESRC.ILOGIC_Y1.IFF.ZSRVAL_Q3 origin:035-iob-ilogic 28_42
RIOI_TBYTESRC.ILOGIC_Y1.IFF.ZSRVAL_Q4 origin:035-iob-ilogic 28_34
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.DYN_CLK_INV_EN origin:035b-iob-iserdes 28_00
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.DYN_CLKDIV_INV_EN origin:035b-iob-iserdes 26_09
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.IN_USE origin:035b-iob-iserdes 26_25 29_17
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.MEMORY.DDR.W4 origin:035b-iob-iserdes !26_15 !26_19 !27_06 !27_12 !27_16 !27_18 !27_20 !27_26 26_17 26_25 26_29 26_57 27_56 28_60 29_17
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.MEMORY_QDR.DDR.W4 origin:035b-iob-iserdes !26_15 !26_19 !27_12 !27_16 !27_18 !27_20 !27_26 26_17 26_25 26_29 26_57 27_06 27_56 28_60 29_17
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.MEMORY_DDR3.DDR.W4 origin:035b-iob-iserdes 26_17 26_25 26_29 26_57 27_06 27_10 27_26 27_56 28_60 29_17
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.MODE.MASTER origin:035b-iob-iserdes !26_21
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.MODE.SLAVE origin:035b-iob-iserdes 26_21
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.NETWORKING.DDR.W4 origin:035b-iob-iserdes !26_15 !26_19 !27_12 !27_16 !27_18 !27_26 26_17 26_25 26_29 26_57 27_06 27_20 27_56 28_60 29_17
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.NETWORKING.DDR.W6 origin:035b-iob-iserdes !26_15 !26_19 !27_12 !27_18 !27_26 26_17 26_25 26_29 26_57 27_06 27_16 27_20 27_56 28_60 29_17
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.NETWORKING.DDR.W8 origin:035b-iob-iserdes !26_15 !26_17 !26_19 !27_12 !27_16 !27_26 26_25 26_29 26_57 27_06 27_18 27_20 27_56 28_60 29_17
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.NETWORKING.DDR.W10 origin:035b-iob-iserdes !26_15 !26_17 !26_19 !27_12 !27_26 26_25 26_29 26_57 27_06 27_16 27_18 27_20 27_56 28_60 29_17
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.NETWORKING.DDR.W14 origin:035b-iob-iserdes !26_15 !26_19 !27_12 !27_26 26_17 26_25 26_29 26_57 27_06 27_16 27_18 27_20 27_56 28_60 29_17
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W2 origin:035b-iob-iserdes !26_15 !26_17 !27_12 !27_18 !27_26 26_19 26_25 26_29 26_57 27_06 27_16 27_20 27_56 28_60 29_17
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W3 origin:035b-iob-iserdes !26_17 !27_12 !27_18 !27_26 26_15 26_19 26_25 26_29 26_57 27_06 27_16 27_20 27_56 28_60 29_17
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W4 origin:035b-iob-iserdes !26_15 !27_12 !27_16 !27_18 !27_26 26_17 26_19 26_25 26_29 26_57 27_06 27_20 27_56 28_60 29_17
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W5 origin:035b-iob-iserdes !27_12 !27_16 !27_18 !27_26 26_15 26_17 26_19 26_25 26_29 26_57 27_06 27_20 27_56 28_60 29_17
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W6 origin:035b-iob-iserdes !26_15 !27_12 !27_18 !27_26 26_17 26_19 26_25 26_29 26_57 27_06 27_16 27_20 27_56 28_60 29_17
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W7 origin:035b-iob-iserdes !27_12 !27_18 !27_26 26_15 26_17 26_19 26_25 26_29 26_57 27_06 27_16 27_20 27_56 28_60 29_17
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W8 origin:035b-iob-iserdes !26_15 !26_17 !27_12 !27_16 !27_26 26_19 26_25 26_29 26_57 27_06 27_18 27_20 27_56 28_60 29_17
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.NUM_CE.N1 origin:035b-iob-iserdes !26_47
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.NUM_CE.N2 origin:035b-iob-iserdes 26_47
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.OFB_USED origin:035b-iob-iserdes 28_14 28_24
RIOI_TBYTESRC.ILOGIC_Y1.ISERDES.OVERSAMPLE.DDR.W4 origin:035b-iob-iserdes !26_15 !26_19 !27_16 !27_18 26_17 26_25 26_29 26_57 27_06 27_12 27_20 27_26 27_56 28_60 29_17
RIOI_TBYTESRC.ILOGIC_Y1.ZINV_D origin:035-iob-ilogic 28_18
RIOI_TBYTESRC.ILOGIC_Y1.IDELMUXE3.P0 origin:035-iob-ilogic 28_26
RIOI_TBYTESRC.ILOGIC_Y1.IDELMUXE3.P1 origin:035-iob-ilogic !28_26
RIOI_TBYTESRC.ILOGIC_Y1.IFFDELMUXE3.P0 origin:035-iob-ilogic 29_11
RIOI_TBYTESRC.IOI_OCLK_0.IOI_LEAF_GCLK0 origin:037-iob18-pips 28_83 28_95 29_88
RIOI_TBYTESRC.IOI_OCLK_0.IOI_LEAF_GCLK1 origin:037-iob18-pips 28_83 28_97 29_88
RIOI_TBYTESRC.IOI_OCLK_0.IOI_LEAF_GCLK2 origin:037-iob18-pips 28_83 29_88 29_94
RIOI_TBYTESRC.IOI_OCLK_0.IOI_LEAF_GCLK3 origin:037-iob18-pips 28_83 29_88 29_96
RIOI_TBYTESRC.IOI_OCLK_0.IOI_LEAF_GCLK4 origin:037-iob18-pips 28_83 28_89 28_95
RIOI_TBYTESRC.IOI_OCLK_0.IOI_LEAF_GCLK5 origin:037-iob18-pips 28_83 28_89 28_97
RIOI_TBYTESRC.IOI_OCLK_0.IOI_RCLK_FORIO0 origin:037-iob18-pips 28_83 28_89 29_94
RIOI_TBYTESRC.IOI_OCLK_0.IOI_RCLK_FORIO1 origin:037-iob18-pips 28_83 28_89 29_96
RIOI_TBYTESRC.IOI_OCLK_0.IOI_RCLK_FORIO2 origin:037-iob18-pips 28_83 28_95 29_92
RIOI_TBYTESRC.IOI_OCLK_0.IOI_RCLK_FORIO3 origin:037-iob18-pips 28_83 28_97 29_92
RIOI_TBYTESRC.IOI_OCLK_0.IOI_IMUX31_1 origin:037-iob18-pips 28_83 28_93 29_94
RIOI_TBYTESRC.IOI_OCLK_0.IOI_IOCLK0 origin:037-iob18-pips 28_83 29_92 29_94
RIOI_TBYTESRC.IOI_OCLK_0.IOI_IOCLK1 origin:037-iob18-pips 28_83 29_92 29_96
RIOI_TBYTESRC.IOI_OCLK_0.IOI_IOCLK2 origin:037-iob18-pips 28_83 28_93 28_95
RIOI_TBYTESRC.IOI_OCLK_0.IOI_IOCLK3 origin:037-iob18-pips 28_83 28_93 28_97
RIOI_TBYTESRC.IOI_OCLK_1.IOI_LEAF_GCLK0 origin:037-iob18-pips 28_39 29_32 29_44
RIOI_TBYTESRC.IOI_OCLK_1.IOI_LEAF_GCLK1 origin:037-iob18-pips 28_39 29_30 29_44
RIOI_TBYTESRC.IOI_OCLK_1.IOI_LEAF_GCLK2 origin:037-iob18-pips 28_33 28_39 29_44
RIOI_TBYTESRC.IOI_OCLK_1.IOI_LEAF_GCLK3 origin:037-iob18-pips 28_31 28_39 29_44
RIOI_TBYTESRC.IOI_OCLK_1.IOI_LEAF_GCLK4 origin:037-iob18-pips 29_32 29_38 29_44
RIOI_TBYTESRC.IOI_OCLK_1.IOI_LEAF_GCLK5 origin:037-iob18-pips 29_30 29_38 29_44
RIOI_TBYTESRC.IOI_OCLK_1.IOI_RCLK_FORIO0 origin:037-iob18-pips 28_33 29_38 29_44
RIOI_TBYTESRC.IOI_OCLK_1.IOI_RCLK_FORIO1 origin:037-iob18-pips 28_31 29_38 29_44
RIOI_TBYTESRC.IOI_OCLK_1.IOI_RCLK_FORIO2 origin:037-iob18-pips 28_35 29_32 29_44
RIOI_TBYTESRC.IOI_OCLK_1.IOI_RCLK_FORIO3 origin:037-iob18-pips 28_35 29_30 29_44
RIOI_TBYTESRC.IOI_OCLK_1.IOI_IMUX31_0 origin:037-iob18-pips 28_33 29_34 29_44
RIOI_TBYTESRC.IOI_OCLK_1.IOI_IOCLK0 origin:037-iob18-pips 28_33 28_35 29_44
RIOI_TBYTESRC.IOI_OCLK_1.IOI_IOCLK1 origin:037-iob18-pips 28_31 28_35 29_44
RIOI_TBYTESRC.IOI_OCLK_1.IOI_IOCLK2 origin:037-iob18-pips 29_32 29_34 29_44
RIOI_TBYTESRC.IOI_OCLK_1.IOI_IOCLK3 origin:037-iob18-pips 29_30 29_34 29_44
RIOI_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK0 origin:037-iob18-pips 30_88 31_83 31_95
RIOI_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK1 origin:037-iob18-pips 30_88 31_83 31_97
RIOI_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK2 origin:037-iob18-pips 30_88 30_94 31_83
RIOI_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK3 origin:037-iob18-pips 30_88 30_96 31_83
RIOI_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK4 origin:037-iob18-pips 31_83 31_89 31_95
RIOI_TBYTESRC.IOI_OCLKM_0.IOI_LEAF_GCLK5 origin:037-iob18-pips 31_83 31_89 31_97
RIOI_TBYTESRC.IOI_OCLKM_0.IOI_RCLK_FORIO0 origin:037-iob18-pips 30_94 31_83 31_89
RIOI_TBYTESRC.IOI_OCLKM_0.IOI_RCLK_FORIO1 origin:037-iob18-pips 30_96 31_83 31_89
RIOI_TBYTESRC.IOI_OCLKM_0.IOI_RCLK_FORIO2 origin:037-iob18-pips 30_92 31_83 31_95
RIOI_TBYTESRC.IOI_OCLKM_0.IOI_RCLK_FORIO3 origin:037-iob18-pips 30_92 31_83 31_97
RIOI_TBYTESRC.IOI_OCLKM_0.IOI_IOCLK0 origin:037-iob18-pips 30_92 30_94 31_83
RIOI_TBYTESRC.IOI_OCLKM_0.IOI_IOCLK1 origin:037-iob18-pips 30_92 30_96 31_83
RIOI_TBYTESRC.IOI_OCLKM_0.IOI_IOCLK2 origin:037-iob18-pips 31_83 31_93 31_95
RIOI_TBYTESRC.IOI_OCLKM_0.IOI_IOCLK3 origin:037-iob18-pips 31_83 31_93 31_97
RIOI_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK0 origin:037-iob18-pips 30_32 30_44 31_39
RIOI_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK1 origin:037-iob18-pips 30_30 30_44 31_39
RIOI_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK2 origin:037-iob18-pips 30_44 31_33 31_39
RIOI_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK3 origin:037-iob18-pips 30_44 31_31 31_39
RIOI_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK4 origin:037-iob18-pips 30_32 30_38 30_44
RIOI_TBYTESRC.IOI_OCLKM_1.IOI_LEAF_GCLK5 origin:037-iob18-pips 30_30 30_38 30_44
RIOI_TBYTESRC.IOI_OCLKM_1.IOI_RCLK_FORIO0 origin:037-iob18-pips 30_38 30_44 31_33
RIOI_TBYTESRC.IOI_OCLKM_1.IOI_RCLK_FORIO1 origin:037-iob18-pips 30_38 30_44 31_31
RIOI_TBYTESRC.IOI_OCLKM_1.IOI_RCLK_FORIO2 origin:037-iob18-pips 30_32 30_44 31_35
RIOI_TBYTESRC.IOI_OCLKM_1.IOI_RCLK_FORIO3 origin:037-iob18-pips 30_30 30_44 31_35
RIOI_TBYTESRC.IOI_OCLKM_1.IOI_IOCLK0 origin:037-iob18-pips 30_44 31_33 31_35
RIOI_TBYTESRC.IOI_OCLKM_1.IOI_IOCLK1 origin:037-iob18-pips 30_44 31_31 31_35
RIOI_TBYTESRC.IOI_OCLKM_1.IOI_IOCLK2 origin:037-iob18-pips 30_32 30_34 30_44
RIOI_TBYTESRC.IOI_OCLKM_1.IOI_IOCLK3 origin:037-iob18-pips 30_30 30_34 30_44
RIOI_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK0 origin:037-iob18-pips 28_67 28_79 29_74
RIOI_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK1 origin:037-iob18-pips 28_67 28_81 29_74
RIOI_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK2 origin:037-iob18-pips 28_67 29_74 29_78
RIOI_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK3 origin:037-iob18-pips 28_67 29_74 29_80
RIOI_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK4 origin:037-iob18-pips 28_67 28_75 28_79
RIOI_TBYTESRC.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK5 origin:037-iob18-pips 28_67 28_75 28_81
RIOI_TBYTESRC.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO0 origin:037-iob18-pips 28_67 28_75 29_78
RIOI_TBYTESRC.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO1 origin:037-iob18-pips 28_67 28_75 29_80
RIOI_TBYTESRC.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO2 origin:037-iob18-pips 28_67 28_79 29_76
RIOI_TBYTESRC.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO3 origin:037-iob18-pips 28_67 28_81 29_76
RIOI_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IMUX20_1 origin:037-iob18-pips 28_67 28_77 29_80
RIOI_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IMUX22_1 origin:037-iob18-pips 28_67 28_77 29_78
RIOI_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IOCLK0 origin:037-iob18-pips 28_67 29_76 29_78
RIOI_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IOCLK1 origin:037-iob18-pips 28_67 29_76 29_80
RIOI_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IOCLK2 origin:037-iob18-pips 28_67 28_77 28_79
RIOI_TBYTESRC.IOI_ILOGIC0_CLK.IOI_IOCLK3 origin:037-iob18-pips 28_67 28_77 28_81
RIOI_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK0 origin:037-iob18-pips 30_74 31_67 31_79
RIOI_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK1 origin:037-iob18-pips 30_74 31_67 31_81
RIOI_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK2 origin:037-iob18-pips 30_74 30_78 31_67
RIOI_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK3 origin:037-iob18-pips 30_74 30_80 31_67
RIOI_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK4 origin:037-iob18-pips 31_67 31_75 31_79
RIOI_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK5 origin:037-iob18-pips 31_67 31_75 31_81
RIOI_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO0 origin:037-iob18-pips 30_78 31_67 31_75
RIOI_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 origin:037-iob18-pips 30_80 31_67 31_75
RIOI_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 origin:037-iob18-pips 30_76 31_67 31_79
RIOI_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 origin:037-iob18-pips 30_76 31_67 31_81
RIOI_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 origin:037-iob18-pips 30_80 31_67 31_77
RIOI_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IMUX22_1 origin:037-iob18-pips 30_78 31_67 31_77
RIOI_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK0 origin:037-iob18-pips 30_76 30_78 31_67
RIOI_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK1 origin:037-iob18-pips 30_76 30_80 31_67
RIOI_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK2 origin:037-iob18-pips 31_67 31_77 31_79
RIOI_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK3 origin:037-iob18-pips 31_67 31_77 31_81
RIOI_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK0 origin:037-iob18-pips 28_53 29_48 29_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK1 origin:037-iob18-pips 28_53 29_46 29_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK2 origin:037-iob18-pips 28_49 28_53 29_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK3 origin:037-iob18-pips 28_47 28_53 29_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK4 origin:037-iob18-pips 29_48 29_52 29_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK5 origin:037-iob18-pips 29_46 29_52 29_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO0 origin:037-iob18-pips 28_49 29_52 29_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO1 origin:037-iob18-pips 28_47 29_52 29_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO2 origin:037-iob18-pips 28_51 29_48 29_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO3 origin:037-iob18-pips 28_51 29_46 29_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IMUX20_0 origin:037-iob18-pips 28_47 29_50 29_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IMUX22_0 origin:037-iob18-pips 28_49 29_50 29_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IOCLK0 origin:037-iob18-pips 28_49 28_51 29_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IOCLK1 origin:037-iob18-pips 28_47 28_51 29_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IOCLK2 origin:037-iob18-pips 29_48 29_50 29_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLK.IOI_IOCLK3 origin:037-iob18-pips 29_46 29_50 29_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK0 origin:037-iob18-pips 30_48 30_60 31_53
RIOI_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK1 origin:037-iob18-pips 30_46 30_60 31_53
RIOI_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK2 origin:037-iob18-pips 30_60 31_49 31_53
RIOI_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK3 origin:037-iob18-pips 30_60 31_47 31_53
RIOI_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK4 origin:037-iob18-pips 30_48 30_52 30_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK5 origin:037-iob18-pips 30_46 30_52 30_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO0 origin:037-iob18-pips 30_52 30_60 31_49
RIOI_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO1 origin:037-iob18-pips 30_52 30_60 31_47
RIOI_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO2 origin:037-iob18-pips 30_48 30_60 31_51
RIOI_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO3 origin:037-iob18-pips 30_46 30_60 31_51
RIOI_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IMUX20_0 origin:037-iob18-pips 30_50 30_60 31_47
RIOI_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IMUX22_0 origin:037-iob18-pips 30_50 30_60 31_49
RIOI_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK0 origin:037-iob18-pips 30_60 31_49 31_51
RIOI_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK1 origin:037-iob18-pips 30_60 31_47 31_51
RIOI_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK2 origin:037-iob18-pips 30_48 30_50 30_60
RIOI_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK3 origin:037-iob18-pips 30_46 30_50 30_60
RIOI_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK0 origin:037-iob18-pips 28_111 29_118 29_124 30_118 30_124 31_111
RIOI_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK1 origin:037-iob18-pips 28_111 29_118 29_126 30_118 30_126 31_111
RIOI_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK2 origin:037-iob18-pips 28_111 28_123 29_118 30_118 31_111 31_123
RIOI_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK3 origin:037-iob18-pips 28_111 28_125 29_118 30_118 31_111 31_125
RIOI_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK4 origin:037-iob18-pips 28_111 28_119 29_124 30_124 31_111 31_119
RIOI_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK5 origin:037-iob18-pips 28_111 28_119 29_126 30_126 31_111 31_119
RIOI_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO0 origin:037-iob18-pips 28_111 28_119 28_123 31_111 31_119 31_123
RIOI_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO1 origin:037-iob18-pips 28_111 28_119 28_125 31_111 31_119 31_125
RIOI_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO2 origin:037-iob18-pips 28_111 28_121 29_124 30_124 31_111 31_121
RIOI_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO3 origin:037-iob18-pips 28_111 28_121 29_126 30_126 31_111 31_121
RIOI_TBYTESRC.IOI_OLOGIC0_CLKDIV.IOI_IMUX8_1 origin:037-iob18-pips 28_111 28_121 28_123 31_111 31_121 31_123
RIOI_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK0 origin:037-iob18-pips 28_03 28_09 29_16 30_16 31_03 31_09
RIOI_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK1 origin:037-iob18-pips 28_01 28_09 29_16 30_16 31_01 31_09
RIOI_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK2 origin:037-iob18-pips 28_09 29_04 29_16 30_04 30_16 31_09
RIOI_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK3 origin:037-iob18-pips 28_09 29_02 29_16 30_02 30_16 31_09
RIOI_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK4 origin:037-iob18-pips 28_03 29_08 29_16 30_08 30_16 31_03
RIOI_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK5 origin:037-iob18-pips 28_01 29_08 29_16 30_08 30_16 31_01
RIOI_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO0 origin:037-iob18-pips 29_04 29_08 29_16 30_04 30_08 30_16
RIOI_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO1 origin:037-iob18-pips 29_02 29_08 29_16 30_02 30_08 30_16
RIOI_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO2 origin:037-iob18-pips 28_03 29_06 29_16 30_06 30_16 31_03
RIOI_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO3 origin:037-iob18-pips 28_01 29_06 29_16 30_06 30_16 31_01
RIOI_TBYTESRC.IOI_OLOGIC1_CLKDIV.IOI_IMUX8_0 origin:037-iob18-pips 29_04 29_06 29_16 30_04 30_06 30_16
RIOI_TBYTESRC.ODELAY_Y0.CINVCTRL_SEL origin:035a-iob18-odelay 37_89
RIOI_TBYTESRC.ODELAY_Y0.HIGH_PERFORMANCE_MODE origin:035a-iob18-odelay 34_109
RIOI_TBYTESRC.ODELAY_Y0.IN_USE origin:035a-iob18-odelay 34_73 36_72 39_75
RIOI_TBYTESRC.ODELAY_Y0.IS_C_INVERTED origin:035a-iob18-odelay 36_88
RIOI_TBYTESRC.ODELAY_Y0.ODELAY_TYPE_VAR_LOAD origin:035a-iob18-odelay 37_113 37_119
RIOI_TBYTESRC.ODELAY_Y0.ODELAY_TYPE_VARIABLE origin:035a-iob18-odelay 37_119
RIOI_TBYTESRC.ODELAY_Y0.ODELAY_VALUE[0] origin:035a-iob18-odelay 36_122
RIOI_TBYTESRC.ODELAY_Y0.ODELAY_VALUE[1] origin:035a-iob18-odelay 36_116
RIOI_TBYTESRC.ODELAY_Y0.ODELAY_VALUE[2] origin:035a-iob18-odelay 36_110
RIOI_TBYTESRC.ODELAY_Y0.ODELAY_VALUE[3] origin:035a-iob18-odelay 36_102
RIOI_TBYTESRC.ODELAY_Y0.ODELAY_VALUE[4] origin:035a-iob18-odelay 36_96
RIOI_TBYTESRC.ODELAY_Y0.ZINV_ODATAIN origin:035a-iob18-odelay 35_72
RIOI_TBYTESRC.ODELAY_Y0.ZODELAY_VALUE[0] origin:035a-iob18-odelay 36_120
RIOI_TBYTESRC.ODELAY_Y0.ZODELAY_VALUE[1] origin:035a-iob18-odelay 36_114
RIOI_TBYTESRC.ODELAY_Y0.ZODELAY_VALUE[2] origin:035a-iob18-odelay 36_108
RIOI_TBYTESRC.ODELAY_Y0.ZODELAY_VALUE[3] origin:035a-iob18-odelay 36_100
RIOI_TBYTESRC.ODELAY_Y0.ZODELAY_VALUE[4] origin:035a-iob18-odelay 36_94
RIOI_TBYTESRC.ODELAY_Y1.CINVCTRL_SEL origin:035a-iob18-odelay 36_38
RIOI_TBYTESRC.ODELAY_Y1.HIGH_PERFORMANCE_MODE origin:035a-iob18-odelay 35_18
RIOI_TBYTESRC.ODELAY_Y1.IN_USE origin:035a-iob18-odelay 35_54 37_55 38_52
RIOI_TBYTESRC.ODELAY_Y1.IS_C_INVERTED origin:035a-iob18-odelay 37_39
RIOI_TBYTESRC.ODELAY_Y1.ODELAY_TYPE_VAR_LOAD origin:035a-iob18-odelay 36_08 36_14
RIOI_TBYTESRC.ODELAY_Y1.ODELAY_TYPE_VARIABLE origin:035a-iob18-odelay 36_08
RIOI_TBYTESRC.ODELAY_Y1.ODELAY_VALUE[0] origin:035a-iob18-odelay 37_05
RIOI_TBYTESRC.ODELAY_Y1.ODELAY_VALUE[1] origin:035a-iob18-odelay 37_11
RIOI_TBYTESRC.ODELAY_Y1.ODELAY_VALUE[2] origin:035a-iob18-odelay 37_17
RIOI_TBYTESRC.ODELAY_Y1.ODELAY_VALUE[3] origin:035a-iob18-odelay 37_25
RIOI_TBYTESRC.ODELAY_Y1.ODELAY_VALUE[4] origin:035a-iob18-odelay 37_31
RIOI_TBYTESRC.ODELAY_Y1.ZINV_ODATAIN origin:035a-iob18-odelay 34_55
RIOI_TBYTESRC.ODELAY_Y1.ZODELAY_VALUE[0] origin:035a-iob18-odelay 37_07
RIOI_TBYTESRC.ODELAY_Y1.ZODELAY_VALUE[1] origin:035a-iob18-odelay 37_13
RIOI_TBYTESRC.ODELAY_Y1.ZODELAY_VALUE[2] origin:035a-iob18-odelay 37_19
RIOI_TBYTESRC.ODELAY_Y1.ZODELAY_VALUE[3] origin:035a-iob18-odelay 37_27
RIOI_TBYTESRC.ODELAY_Y1.ZODELAY_VALUE[4] origin:035a-iob18-odelay 37_33
RIOI_TBYTESRC.OLOGIC_Y0.IS_CLKDIV_INVERTED origin:036-iob18-ologic 30_85
RIOI_TBYTESRC.OLOGIC_Y0.IS_D1_INVERTED origin:036-iob18-ologic 30_97
RIOI_TBYTESRC.OLOGIC_Y0.IS_D2_INVERTED origin:036-iob18-ologic 31_102
RIOI_TBYTESRC.OLOGIC_Y0.IS_D3_INVERTED origin:036-iob18-ologic 31_106
RIOI_TBYTESRC.OLOGIC_Y0.IS_D4_INVERTED origin:036-iob18-ologic 31_110
RIOI_TBYTESRC.OLOGIC_Y0.IS_D5_INVERTED origin:036-iob18-ologic 30_113
RIOI_TBYTESRC.OLOGIC_Y0.IS_D6_INVERTED origin:036-iob18-ologic 31_114
RIOI_TBYTESRC.OLOGIC_Y0.IS_D7_INVERTED origin:036-iob18-ologic 31_118
RIOI_TBYTESRC.OLOGIC_Y0.IS_D8_INVERTED origin:036-iob18-ologic 30_125
RIOI_TBYTESRC.OLOGIC_Y0.ODDR.DDR_CLK_EDGE.SAME_EDGE origin:036-iob18-ologic 31_92
RIOI_TBYTESRC.OLOGIC_Y0.ODDR.SRUSED origin:036-iob18-ologic 32_112
RIOI_TBYTESRC.OLOGIC_Y0.ODDR_TDDR.IN_USE origin:036-iob18-ologic 31_83
RIOI_TBYTESRC.OLOGIC_Y0.OMUX.D1 origin:036-iob18-ologic 33_111
RIOI_TBYTESRC.OLOGIC_Y0.OQUSED origin:036-iob18-ologic 31_86
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.DATA_RATE_OQ.DDR origin:036-iob18-ologic !33_93 33_91
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.DATA_RATE_OQ.SDR origin:036-iob18-ologic !33_91 33_93
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.DATA_RATE_TQ.BUF origin:036-iob18-ologic !32_70 !33_69 32_66
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.DATA_RATE_TQ.DDR origin:036-iob18-ologic !32_66 !33_69 32_70
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.DATA_RATE_TQ.SDR origin:036-iob18-ologic !32_66 !32_70 33_69
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.DATA_WIDTH.DDR.W4 origin:036-iob18-ologic !30_121 !30_123 !30_127 !30_95 !31_100 !31_116 !31_120 !31_126 30_99 31_124 33_73
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.DATA_WIDTH.DDR.W6 origin:036-iob18-ologic !30_121 !30_123 !30_127 !30_99 !31_100 !31_116 !31_124 !31_126 30_95 31_120 33_73
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.DATA_WIDTH.DDR.W8 origin:036-iob18-ologic !30_121 !30_123 !30_127 !31_100 !31_120 !31_124 !31_126 30_95 30_99 31_116 33_73
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W2 origin:036-iob18-ologic !30_121 !30_123 !30_95 !31_100 !31_116 !31_120 !31_124 !31_126 !33_91 30_127 30_99 33_73 33_93
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W3 origin:036-iob18-ologic !30_121 !30_123 !30_127 !30_99 !31_100 !31_116 !31_120 !31_124 !33_91 30_95 31_126 33_73 33_93
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W4 origin:036-iob18-ologic !30_121 !30_123 !30_127 !31_100 !31_116 !31_120 !31_126 !33_91 30_95 30_99 31_124 33_73 33_93
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W5 origin:036-iob18-ologic !30_123 !30_127 !30_95 !31_100 !31_116 !31_120 !31_124 !31_126 !33_91 30_121 30_99 31_98 33_73 33_93
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W6 origin:036-iob18-ologic !30_121 !30_123 !30_127 !30_95 !31_116 !31_124 !31_126 !33_91 30_99 31_100 31_120 31_98 33_73 33_93
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W7 origin:036-iob18-ologic !30_121 !30_127 !30_95 !30_99 !31_116 !31_120 !31_124 !31_126 !33_91 30_123 31_100 31_98 33_73 33_93
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W8 origin:036-iob18-ologic !30_121 !30_123 !30_127 !30_95 !30_99 !31_120 !31_124 !31_126 !33_91 31_100 31_116 31_98 33_73 33_93
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.IN_USE origin:036-iob18-ologic 33_73
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.SERDES_MODE.SLAVE origin:036-iob18-ologic 33_83
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.SRTYPE.SYNC origin:036-iob18-ologic 32_94
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.TRISTATE_WIDTH.W4 origin:036-iob18-ologic 32_90
RIOI_TBYTESRC.OLOGIC_Y0.OSERDES.TSRTYPE.SYNC origin:036-iob18-ologic 32_72
RIOI_TBYTESRC.OLOGIC_Y0.TDDR.SRUSED origin:036-iob18-ologic 33_89
RIOI_TBYTESRC.OLOGIC_Y0.ZINIT_OQ origin:036-iob18-ologic 33_97
RIOI_TBYTESRC.OLOGIC_Y0.ZINIT_TQ origin:036-iob18-ologic 30_75
RIOI_TBYTESRC.OLOGIC_Y0.ZINV_CLK origin:036-iob18-ologic 31_90
RIOI_TBYTESRC.OLOGIC_Y0.ZINV_T1 origin:036-iob18-ologic 30_67
RIOI_TBYTESRC.OLOGIC_Y0.ZINV_T2 origin:036-iob18-ologic 30_71
RIOI_TBYTESRC.OLOGIC_Y0.ZINV_T3 origin:036-iob18-ologic 31_76
RIOI_TBYTESRC.OLOGIC_Y0.ZINV_T4 origin:036-iob18-ologic 30_79
RIOI_TBYTESRC.OLOGIC_Y0.ZSRVAL_OQ origin:036-iob18-ologic 32_108 33_107 33_95
RIOI_TBYTESRC.OLOGIC_Y0.ZSRVAL_TQ origin:036-iob18-ologic 32_82 33_75 33_81
RIOI_TBYTESRC.OLOGIC_Y1.IS_CLKDIV_INVERTED origin:036-iob18-ologic 31_42
RIOI_TBYTESRC.OLOGIC_Y1.IS_D1_INVERTED origin:036-iob18-ologic 31_30
RIOI_TBYTESRC.OLOGIC_Y1.IS_D2_INVERTED origin:036-iob18-ologic 30_25
RIOI_TBYTESRC.OLOGIC_Y1.IS_D3_INVERTED origin:036-iob18-ologic 30_21
RIOI_TBYTESRC.OLOGIC_Y1.IS_D4_INVERTED origin:036-iob18-ologic 30_17
RIOI_TBYTESRC.OLOGIC_Y1.IS_D5_INVERTED origin:036-iob18-ologic 31_14
RIOI_TBYTESRC.OLOGIC_Y1.IS_D6_INVERTED origin:036-iob18-ologic 30_13
RIOI_TBYTESRC.OLOGIC_Y1.IS_D7_INVERTED origin:036-iob18-ologic 30_09
RIOI_TBYTESRC.OLOGIC_Y1.IS_D8_INVERTED origin:036-iob18-ologic 31_02
RIOI_TBYTESRC.OLOGIC_Y1.ODDR.DDR_CLK_EDGE.SAME_EDGE origin:036-iob18-ologic 30_35
RIOI_TBYTESRC.OLOGIC_Y1.ODDR.SRUSED origin:036-iob18-ologic 33_15
RIOI_TBYTESRC.OLOGIC_Y1.ODDR_TDDR.IN_USE origin:036-iob18-ologic 30_44
RIOI_TBYTESRC.OLOGIC_Y1.OMUX.D1 origin:036-iob18-ologic 32_16
RIOI_TBYTESRC.OLOGIC_Y1.OQUSED origin:036-iob18-ologic 30_41
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.DATA_RATE_OQ.DDR origin:036-iob18-ologic !32_34 32_36
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.DATA_RATE_OQ.SDR origin:036-iob18-ologic !32_36 32_34
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.DATA_RATE_TQ.BUF origin:036-iob18-ologic !32_58 !33_57 33_61
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.DATA_RATE_TQ.DDR origin:036-iob18-ologic !32_58 !33_61 33_57
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.DATA_RATE_TQ.SDR origin:036-iob18-ologic !33_57 !33_61 32_58
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.DATA_WIDTH.DDR.W4 origin:036-iob18-ologic !30_01 !30_07 !30_11 !30_27 !30_29 !31_00 !31_04 !31_06 !31_32 30_03 31_28 32_54
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.DATA_WIDTH.DDR.W6 origin:036-iob18-ologic !30_01 !30_03 !30_11 !30_27 !30_29 !31_00 !31_04 !31_06 !31_28 30_07 31_32 32_54
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.DATA_WIDTH.DDR.W8 origin:036-iob18-ologic !30_01 !30_03 !30_07 !30_27 !30_29 !31_00 !31_04 !31_06 30_11 31_28 31_32 32_54
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W2 origin:036-iob18-ologic !30_01 !30_03 !30_07 !30_11 !30_27 !30_29 !31_04 !31_06 !31_32 !32_36 31_00 31_28 32_34 32_54
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W3 origin:036-iob18-ologic !30_03 !30_07 !30_11 !30_27 !30_29 !31_00 !31_04 !31_06 !31_28 !32_36 30_01 31_32 32_34 32_54
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W4 origin:036-iob18-ologic !30_01 !30_07 !30_11 !30_27 !30_29 !31_00 !31_04 !31_06 !32_36 30_03 31_28 31_32 32_34 32_54
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W5 origin:036-iob18-ologic !30_01 !30_03 !30_07 !30_11 !30_27 !31_00 !31_04 !31_32 !32_36 30_29 31_06 31_28 32_34 32_54
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W6 origin:036-iob18-ologic !30_01 !30_03 !30_11 !31_00 !31_04 !31_06 !31_32 !32_36 30_07 30_27 30_29 31_28 32_34 32_54
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W7 origin:036-iob18-ologic !30_01 !30_03 !30_07 !30_11 !31_00 !31_06 !31_28 !31_32 !32_36 30_27 30_29 31_04 32_34 32_54
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W8 origin:036-iob18-ologic !30_01 !30_03 !30_07 !31_00 !31_04 !31_06 !31_28 !31_32 !32_36 30_11 30_27 30_29 32_34 32_54
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.IN_USE origin:036-iob18-ologic 32_54
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.SERDES_MODE.SLAVE origin:036-iob18-ologic 32_44
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.SRTYPE.SYNC origin:036-iob18-ologic 33_33
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.TRISTATE_WIDTH.W4 origin:036-iob18-ologic 33_37
RIOI_TBYTESRC.OLOGIC_Y1.OSERDES.TSRTYPE.SYNC origin:036-iob18-ologic 33_55
RIOI_TBYTESRC.OLOGIC_Y1.TDDR.SRUSED origin:036-iob18-ologic 32_38
RIOI_TBYTESRC.OLOGIC_Y1.ZINIT_OQ origin:036-iob18-ologic 32_30
RIOI_TBYTESRC.OLOGIC_Y1.ZINIT_TQ origin:036-iob18-ologic 31_52
RIOI_TBYTESRC.OLOGIC_Y1.ZINV_CLK origin:036-iob18-ologic 30_37
RIOI_TBYTESRC.OLOGIC_Y1.ZINV_T1 origin:036-iob18-ologic 31_60
RIOI_TBYTESRC.OLOGIC_Y1.ZINV_T2 origin:036-iob18-ologic 31_56
RIOI_TBYTESRC.OLOGIC_Y1.ZINV_T3 origin:036-iob18-ologic 30_51
RIOI_TBYTESRC.OLOGIC_Y1.ZINV_T4 origin:036-iob18-ologic 31_48
RIOI_TBYTESRC.OLOGIC_Y1.ZSRVAL_OQ origin:036-iob18-ologic 32_20 32_32 33_19
RIOI_TBYTESRC.OLOGIC_Y1.ZSRVAL_TQ origin:036-iob18-ologic 32_46 32_52 33_45

View File

@ -0,0 +1,398 @@
RIOI_TBYTETERM.IDELAY_Y0.CINVCTRL_SEL 35_89
RIOI_TBYTETERM.IDELAY_Y0.DELAY_SRC_DATAIN !34_72 35_69
RIOI_TBYTETERM.IDELAY_Y0.DELAY_SRC_IDATAIN 34_72 !35_69
RIOI_TBYTETERM.IDELAY_Y0.HIGH_PERFORMANCE_MODE 32_109
RIOI_TBYTETERM.IDELAY_Y0.IDELAY_TYPE_FIXED !35_113 !35_119
RIOI_TBYTETERM.IDELAY_Y0.IDELAY_TYPE_VAR_LOAD 35_113 35_119
RIOI_TBYTETERM.IDELAY_Y0.IDELAY_TYPE_VARIABLE !35_113 35_119
RIOI_TBYTETERM.IDELAY_Y0.IDELAY_VALUE[0] !34_120 34_122
RIOI_TBYTETERM.IDELAY_Y0.IDELAY_VALUE[1] !34_114 34_116
RIOI_TBYTETERM.IDELAY_Y0.IDELAY_VALUE[2] !34_108 34_110
RIOI_TBYTETERM.IDELAY_Y0.IDELAY_VALUE[3] !34_100 34_102
RIOI_TBYTETERM.IDELAY_Y0.IDELAY_VALUE[4] !34_94 34_96
RIOI_TBYTETERM.IDELAY_Y0.IN_USE 32_73
RIOI_TBYTETERM.IDELAY_Y0.IS_DATAIN_INVERTED 35_81
RIOI_TBYTETERM.IDELAY_Y0.IS_IDATAIN_INVERTED 33_72
RIOI_TBYTETERM.IDELAY_Y0.PIPE_SEL 34_106
RIOI_TBYTETERM.IDELAY_Y0.ZIDELAY_VALUE[0] 34_120 !34_122
RIOI_TBYTETERM.IDELAY_Y0.ZIDELAY_VALUE[1] 34_114 !34_116
RIOI_TBYTETERM.IDELAY_Y0.ZIDELAY_VALUE[2] 34_108 !34_110
RIOI_TBYTETERM.IDELAY_Y0.ZIDELAY_VALUE[3] 34_100 !34_102
RIOI_TBYTETERM.IDELAY_Y0.ZIDELAY_VALUE[4] 34_94 !34_96
RIOI_TBYTETERM.IDELAY_Y1.CINVCTRL_SEL 34_38
RIOI_TBYTETERM.IDELAY_Y1.DELAY_SRC_DATAIN 34_58 !35_55
RIOI_TBYTETERM.IDELAY_Y1.DELAY_SRC_IDATAIN !34_58 35_55
RIOI_TBYTETERM.IDELAY_Y1.HIGH_PERFORMANCE_MODE 33_18
RIOI_TBYTETERM.IDELAY_Y1.IDELAY_TYPE_FIXED !34_08 !34_14
RIOI_TBYTETERM.IDELAY_Y1.IDELAY_TYPE_VAR_LOAD 34_08 34_14
RIOI_TBYTETERM.IDELAY_Y1.IDELAY_TYPE_VARIABLE 34_08 !34_14
RIOI_TBYTETERM.IDELAY_Y1.IDELAY_VALUE[0] 35_05 !35_07
RIOI_TBYTETERM.IDELAY_Y1.IDELAY_VALUE[1] 35_11 !35_13
RIOI_TBYTETERM.IDELAY_Y1.IDELAY_VALUE[2] 35_17 !35_19
RIOI_TBYTETERM.IDELAY_Y1.IDELAY_VALUE[3] 35_25 !35_27
RIOI_TBYTETERM.IDELAY_Y1.IDELAY_VALUE[4] 35_31 !35_33
RIOI_TBYTETERM.IDELAY_Y1.IN_USE 33_54
RIOI_TBYTETERM.IDELAY_Y1.IS_DATAIN_INVERTED 34_46
RIOI_TBYTETERM.IDELAY_Y1.IS_IDATAIN_INVERTED 32_55
RIOI_TBYTETERM.IDELAY_Y1.PIPE_SEL 35_21
RIOI_TBYTETERM.IDELAY_Y1.ZIDELAY_VALUE[0] !35_05 35_07
RIOI_TBYTETERM.IDELAY_Y1.ZIDELAY_VALUE[1] !35_11 35_13
RIOI_TBYTETERM.IDELAY_Y1.ZIDELAY_VALUE[2] !35_17 35_19
RIOI_TBYTETERM.IDELAY_Y1.ZIDELAY_VALUE[3] !35_25 35_27
RIOI_TBYTETERM.IDELAY_Y1.ZIDELAY_VALUE[4] !35_31 35_33
RIOI_TBYTETERM.ILOGIC_Y0.IDDR.IN_USE 26_71 26_121 27_70
RIOI_TBYTETERM.ILOGIC_Y0.IDDR_OR_ISERDES.IN_USE 26_71 27_70
RIOI_TBYTETERM.ILOGIC_Y0.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE !26_99 27_98
RIOI_TBYTETERM.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE 26_99 !27_98
RIOI_TBYTETERM.ILOGIC_Y0.IFF.INV_OCLK 28_124
RIOI_TBYTETERM.ILOGIC_Y0.IFF.SRTYPE.ASYNC !29_67
RIOI_TBYTETERM.ILOGIC_Y0.IFF.SRTYPE.SYNC 29_67
RIOI_TBYTETERM.ILOGIC_Y0.IFF.ZINIT_Q1 28_72
RIOI_TBYTETERM.ILOGIC_Y0.IFF.ZINIT_Q2 28_76
RIOI_TBYTETERM.ILOGIC_Y0.IFF.ZINIT_Q3 28_86
RIOI_TBYTETERM.ILOGIC_Y0.IFF.ZINIT_Q4 28_94
RIOI_TBYTETERM.ILOGIC_Y0.IFF.ZINV_C 28_126 29_123 29_125
RIOI_TBYTETERM.ILOGIC_Y0.IFF.ZINV_OCLK 28_64
RIOI_TBYTETERM.ILOGIC_Y0.IFF.ZSRVAL_Q1 29_71
RIOI_TBYTETERM.ILOGIC_Y0.IFF.ZSRVAL_Q2 29_75
RIOI_TBYTETERM.ILOGIC_Y0.IFF.ZSRVAL_Q3 29_85
RIOI_TBYTETERM.ILOGIC_Y0.IFF.ZSRVAL_Q4 29_93
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.DYN_CLK_INV_EN 29_127
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.DYN_CLKDIV_INV_EN 27_118
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.IN_USE 27_102 28_110
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.MEMORY.DDR.W4 26_71 !26_101 !26_107 !26_109 !26_111 !26_115 !26_121 27_70 27_98 27_102 !27_108 27_110 !27_112 28_110 29_67
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.MEMORY_QDR.DDR.W4 26_71 !26_101 !26_107 !26_109 !26_111 !26_115 26_121 27_70 27_98 27_102 !27_108 27_110 !27_112 28_110 29_67
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.MEMORY_DDR3.DDR.W4 26_71 26_101 26_117 26_121 27_70 27_98 27_102 27_110 28_110 29_67
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.MODE.MASTER !27_106
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.MODE.SLAVE 27_106
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.NETWORKING.DDR.W4 26_71 !26_101 26_107 !26_109 !26_111 !26_115 26_121 27_70 27_98 27_102 !27_108 27_110 !27_112 28_110 29_67
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.NETWORKING.DDR.W6 26_71 !26_101 26_107 !26_109 26_111 !26_115 26_121 27_70 27_98 27_102 !27_108 27_110 !27_112 28_110 29_67
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.NETWORKING.DDR.W8 26_71 !26_101 26_107 26_109 !26_111 !26_115 26_121 27_70 27_98 27_102 !27_108 !27_110 !27_112 28_110 29_67
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.NETWORKING.DDR.W10 26_71 !26_101 26_107 26_109 26_111 !26_115 26_121 27_70 27_98 27_102 !27_108 !27_110 !27_112 28_110 29_67
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.NETWORKING.DDR.W14 26_71 !26_101 26_107 26_109 26_111 !26_115 26_121 27_70 27_98 27_102 !27_108 27_110 !27_112 28_110 29_67
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W2 26_71 !26_101 26_107 !26_109 26_111 !26_115 26_121 27_70 27_98 27_102 27_108 !27_110 !27_112 28_110 29_67
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W3 26_71 !26_101 26_107 !26_109 26_111 !26_115 26_121 27_70 27_98 27_102 27_108 !27_110 27_112 28_110 29_67
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W4 26_71 !26_101 26_107 !26_109 !26_111 !26_115 26_121 27_70 27_98 27_102 27_108 27_110 !27_112 28_110 29_67
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W5 26_71 !26_101 26_107 !26_109 !26_111 !26_115 26_121 27_70 27_98 27_102 27_108 27_110 27_112 28_110 29_67
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W6 26_71 !26_101 26_107 !26_109 26_111 !26_115 26_121 27_70 27_98 27_102 27_108 27_110 !27_112 28_110 29_67
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W7 26_71 !26_101 26_107 !26_109 26_111 !26_115 26_121 27_70 27_98 27_102 27_108 27_110 27_112 28_110 29_67
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W8 26_71 !26_101 26_107 26_109 !26_111 !26_115 26_121 27_70 27_98 27_102 27_108 !27_110 !27_112 28_110 29_67
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.NUM_CE.N1 !27_80
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.NUM_CE.N2 27_80
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.OFB_USED 29_103 29_113
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.OVERSAMPLE.DDR.W4 26_71 26_101 26_107 !26_109 !26_111 26_115 26_121 27_70 27_98 27_102 !27_108 27_110 !27_112 28_110 29_67
RIOI_TBYTETERM.ILOGIC_Y0.ZINV_D 29_109
RIOI_TBYTETERM.ILOGIC_Y0.IDELMUXE3.P0 29_101
RIOI_TBYTETERM.ILOGIC_Y0.IDELMUXE3.P1 !29_101
RIOI_TBYTETERM.ILOGIC_Y0.IFFDELMUXE3.P0 28_116
RIOI_TBYTETERM.ILOGIC_Y1.IDDR.IN_USE 26_57 27_06 27_56
RIOI_TBYTETERM.ILOGIC_Y1.IDDR_OR_ISERDES.IN_USE 26_57 27_56
RIOI_TBYTETERM.ILOGIC_Y1.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE 26_29 !27_28
RIOI_TBYTETERM.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE !26_29 27_28
RIOI_TBYTETERM.ILOGIC_Y1.IFF.INV_OCLK 29_03
RIOI_TBYTETERM.ILOGIC_Y1.IFF.SRTYPE.ASYNC !28_60
RIOI_TBYTETERM.ILOGIC_Y1.IFF.SRTYPE.SYNC 28_60
RIOI_TBYTETERM.ILOGIC_Y1.IFF.ZINIT_Q1 29_55
RIOI_TBYTETERM.ILOGIC_Y1.IFF.ZINIT_Q2 29_51
RIOI_TBYTETERM.ILOGIC_Y1.IFF.ZINIT_Q3 29_41
RIOI_TBYTETERM.ILOGIC_Y1.IFF.ZINIT_Q4 29_33
RIOI_TBYTETERM.ILOGIC_Y1.IFF.ZINV_C 28_02 28_04 29_01
RIOI_TBYTETERM.ILOGIC_Y1.IFF.ZINV_OCLK 29_63
RIOI_TBYTETERM.ILOGIC_Y1.IFF.ZSRVAL_Q1 28_56
RIOI_TBYTETERM.ILOGIC_Y1.IFF.ZSRVAL_Q2 28_52
RIOI_TBYTETERM.ILOGIC_Y1.IFF.ZSRVAL_Q3 28_42
RIOI_TBYTETERM.ILOGIC_Y1.IFF.ZSRVAL_Q4 28_34
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.DYN_CLK_INV_EN 28_00
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.DYN_CLKDIV_INV_EN 26_09
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.IN_USE 26_25 29_17
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.MEMORY.DDR.W4 !26_15 26_17 !26_19 26_25 26_29 26_57 !27_06 !27_12 !27_16 !27_18 !27_20 !27_26 27_56 28_60 29_17
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.MEMORY_QDR.DDR.W4 !26_15 26_17 !26_19 26_25 26_29 26_57 27_06 !27_12 !27_16 !27_18 !27_20 !27_26 27_56 28_60 29_17
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.MEMORY_DDR3.DDR.W4 26_17 26_25 26_29 26_57 27_06 27_10 27_26 27_56 28_60 29_17
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.MODE.MASTER !26_21
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.MODE.SLAVE 26_21
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.NETWORKING.DDR.W4 !26_15 26_17 !26_19 26_25 26_29 26_57 27_06 !27_12 !27_16 !27_18 27_20 !27_26 27_56 28_60 29_17
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.NETWORKING.DDR.W6 !26_15 26_17 !26_19 26_25 26_29 26_57 27_06 !27_12 27_16 !27_18 27_20 !27_26 27_56 28_60 29_17
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.NETWORKING.DDR.W8 !26_15 !26_17 !26_19 26_25 26_29 26_57 27_06 !27_12 !27_16 27_18 27_20 !27_26 27_56 28_60 29_17
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.NETWORKING.DDR.W10 !26_15 !26_17 !26_19 26_25 26_29 26_57 27_06 !27_12 27_16 27_18 27_20 !27_26 27_56 28_60 29_17
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.NETWORKING.DDR.W14 !26_15 26_17 !26_19 26_25 26_29 26_57 27_06 !27_12 27_16 27_18 27_20 !27_26 27_56 28_60 29_17
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W2 !26_15 !26_17 26_19 26_25 26_29 26_57 27_06 !27_12 27_16 !27_18 27_20 !27_26 27_56 28_60 29_17
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W3 26_15 !26_17 26_19 26_25 26_29 26_57 27_06 !27_12 27_16 !27_18 27_20 !27_26 27_56 28_60 29_17
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W4 !26_15 26_17 26_19 26_25 26_29 26_57 27_06 !27_12 !27_16 !27_18 27_20 !27_26 27_56 28_60 29_17
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W5 26_15 26_17 26_19 26_25 26_29 26_57 27_06 !27_12 !27_16 !27_18 27_20 !27_26 27_56 28_60 29_17
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W6 !26_15 26_17 26_19 26_25 26_29 26_57 27_06 !27_12 27_16 !27_18 27_20 !27_26 27_56 28_60 29_17
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W7 26_15 26_17 26_19 26_25 26_29 26_57 27_06 !27_12 27_16 !27_18 27_20 !27_26 27_56 28_60 29_17
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W8 !26_15 !26_17 26_19 26_25 26_29 26_57 27_06 !27_12 !27_16 27_18 27_20 !27_26 27_56 28_60 29_17
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.NUM_CE.N1 !26_47
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.NUM_CE.N2 26_47
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.OFB_USED 28_14 28_24
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.OVERSAMPLE.DDR.W4 !26_15 26_17 !26_19 26_25 26_29 26_57 27_06 27_12 !27_16 !27_18 27_20 27_26 27_56 28_60 29_17
RIOI_TBYTETERM.ILOGIC_Y1.ZINV_D 28_18
RIOI_TBYTETERM.ILOGIC_Y1.IDELMUXE3.P0 28_26
RIOI_TBYTETERM.ILOGIC_Y1.IDELMUXE3.P1 !28_26
RIOI_TBYTETERM.ILOGIC_Y1.IFFDELMUXE3.P0 29_11
RIOI_TBYTETERM.IOI_OCLK_0.IOI_LEAF_GCLK0 28_83 28_95 29_88
RIOI_TBYTETERM.IOI_OCLK_0.IOI_LEAF_GCLK1 28_83 28_97 29_88
RIOI_TBYTETERM.IOI_OCLK_0.IOI_LEAF_GCLK2 28_83 29_88 29_94
RIOI_TBYTETERM.IOI_OCLK_0.IOI_LEAF_GCLK3 28_83 29_88 29_96
RIOI_TBYTETERM.IOI_OCLK_0.IOI_LEAF_GCLK4 28_83 28_89 28_95
RIOI_TBYTETERM.IOI_OCLK_0.IOI_LEAF_GCLK5 28_83 28_89 28_97
RIOI_TBYTETERM.IOI_OCLK_0.IOI_RCLK_FORIO0 28_83 28_89 29_94
RIOI_TBYTETERM.IOI_OCLK_0.IOI_RCLK_FORIO1 28_83 28_89 29_96
RIOI_TBYTETERM.IOI_OCLK_0.IOI_RCLK_FORIO2 28_83 28_95 29_92
RIOI_TBYTETERM.IOI_OCLK_0.IOI_RCLK_FORIO3 28_83 28_97 29_92
RIOI_TBYTETERM.IOI_OCLK_0.IOI_IMUX31_1 28_83 28_93 29_94
RIOI_TBYTETERM.IOI_OCLK_0.IOI_IOCLK0 28_83 29_92 29_94
RIOI_TBYTETERM.IOI_OCLK_0.IOI_IOCLK1 28_83 29_92 29_96
RIOI_TBYTETERM.IOI_OCLK_0.IOI_IOCLK2 28_83 28_93 28_95
RIOI_TBYTETERM.IOI_OCLK_0.IOI_IOCLK3 28_83 28_93 28_97
RIOI_TBYTETERM.IOI_OCLK_1.IOI_LEAF_GCLK0 28_39 29_32 29_44
RIOI_TBYTETERM.IOI_OCLK_1.IOI_LEAF_GCLK1 28_39 29_30 29_44
RIOI_TBYTETERM.IOI_OCLK_1.IOI_LEAF_GCLK2 28_33 28_39 29_44
RIOI_TBYTETERM.IOI_OCLK_1.IOI_LEAF_GCLK3 28_31 28_39 29_44
RIOI_TBYTETERM.IOI_OCLK_1.IOI_LEAF_GCLK4 29_32 29_38 29_44
RIOI_TBYTETERM.IOI_OCLK_1.IOI_LEAF_GCLK5 29_30 29_38 29_44
RIOI_TBYTETERM.IOI_OCLK_1.IOI_RCLK_FORIO0 28_33 29_38 29_44
RIOI_TBYTETERM.IOI_OCLK_1.IOI_RCLK_FORIO1 28_31 29_38 29_44
RIOI_TBYTETERM.IOI_OCLK_1.IOI_RCLK_FORIO2 28_35 29_32 29_44
RIOI_TBYTETERM.IOI_OCLK_1.IOI_RCLK_FORIO3 28_35 29_30 29_44
RIOI_TBYTETERM.IOI_OCLK_1.IOI_IMUX31_0 28_33 29_34 29_44
RIOI_TBYTETERM.IOI_OCLK_1.IOI_IOCLK0 28_33 28_35 29_44
RIOI_TBYTETERM.IOI_OCLK_1.IOI_IOCLK1 28_31 28_35 29_44
RIOI_TBYTETERM.IOI_OCLK_1.IOI_IOCLK2 29_32 29_34 29_44
RIOI_TBYTETERM.IOI_OCLK_1.IOI_IOCLK3 29_30 29_34 29_44
RIOI_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK0 30_88 31_83 31_95
RIOI_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK1 30_88 31_83 31_97
RIOI_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK2 30_88 30_94 31_83
RIOI_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK3 30_88 30_96 31_83
RIOI_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK4 31_83 31_89 31_95
RIOI_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK5 31_83 31_89 31_97
RIOI_TBYTETERM.IOI_OCLKM_0.IOI_RCLK_FORIO0 30_94 31_83 31_89
RIOI_TBYTETERM.IOI_OCLKM_0.IOI_RCLK_FORIO1 30_96 31_83 31_89
RIOI_TBYTETERM.IOI_OCLKM_0.IOI_RCLK_FORIO2 30_92 31_83 31_95
RIOI_TBYTETERM.IOI_OCLKM_0.IOI_RCLK_FORIO3 30_92 31_83 31_97
RIOI_TBYTETERM.IOI_OCLKM_0.IOI_IOCLK0 30_92 30_94 31_83
RIOI_TBYTETERM.IOI_OCLKM_0.IOI_IOCLK1 30_92 30_96 31_83
RIOI_TBYTETERM.IOI_OCLKM_0.IOI_IOCLK2 31_83 31_93 31_95
RIOI_TBYTETERM.IOI_OCLKM_0.IOI_IOCLK3 31_83 31_93 31_97
RIOI_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK0 30_32 30_44 31_39
RIOI_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK1 30_30 30_44 31_39
RIOI_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK2 30_44 31_33 31_39
RIOI_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK3 30_44 31_31 31_39
RIOI_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK4 30_32 30_38 30_44
RIOI_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK5 30_30 30_38 30_44
RIOI_TBYTETERM.IOI_OCLKM_1.IOI_RCLK_FORIO0 30_38 30_44 31_33
RIOI_TBYTETERM.IOI_OCLKM_1.IOI_RCLK_FORIO1 30_38 30_44 31_31
RIOI_TBYTETERM.IOI_OCLKM_1.IOI_RCLK_FORIO2 30_32 30_44 31_35
RIOI_TBYTETERM.IOI_OCLKM_1.IOI_RCLK_FORIO3 30_30 30_44 31_35
RIOI_TBYTETERM.IOI_OCLKM_1.IOI_IOCLK0 30_44 31_33 31_35
RIOI_TBYTETERM.IOI_OCLKM_1.IOI_IOCLK1 30_44 31_31 31_35
RIOI_TBYTETERM.IOI_OCLKM_1.IOI_IOCLK2 30_32 30_34 30_44
RIOI_TBYTETERM.IOI_OCLKM_1.IOI_IOCLK3 30_30 30_34 30_44
RIOI_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK0 28_67 28_79 29_74
RIOI_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK1 28_67 28_81 29_74
RIOI_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK2 28_67 29_74 29_78
RIOI_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK3 28_67 29_74 29_80
RIOI_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK4 28_67 28_75 28_79
RIOI_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK5 28_67 28_75 28_81
RIOI_TBYTETERM.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO0 28_67 28_75 29_78
RIOI_TBYTETERM.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO1 28_67 28_75 29_80
RIOI_TBYTETERM.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO2 28_67 28_79 29_76
RIOI_TBYTETERM.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO3 28_67 28_81 29_76
RIOI_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IMUX20_1 28_67 28_77 29_80
RIOI_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IMUX22_1 28_67 28_77 29_78
RIOI_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IOCLK0 28_67 29_76 29_78
RIOI_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IOCLK1 28_67 29_76 29_80
RIOI_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IOCLK2 28_67 28_77 28_79
RIOI_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IOCLK3 28_67 28_77 28_81
RIOI_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK0 30_74 31_67 31_79
RIOI_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK1 30_74 31_67 31_81
RIOI_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK2 30_74 30_78 31_67
RIOI_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK3 30_74 30_80 31_67
RIOI_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK4 31_67 31_75 31_79
RIOI_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK5 31_67 31_75 31_81
RIOI_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO0 30_78 31_67 31_75
RIOI_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 30_80 31_67 31_75
RIOI_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 30_76 31_67 31_79
RIOI_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 30_76 31_67 31_81
RIOI_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 30_80 31_67 31_77
RIOI_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IMUX22_1 30_78 31_67 31_77
RIOI_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK0 30_76 30_78 31_67
RIOI_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK1 30_76 30_80 31_67
RIOI_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK2 31_67 31_77 31_79
RIOI_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK3 31_67 31_77 31_81
RIOI_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK0 28_53 29_48 29_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK1 28_53 29_46 29_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK2 28_49 28_53 29_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK3 28_47 28_53 29_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK4 29_48 29_52 29_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK5 29_46 29_52 29_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO0 28_49 29_52 29_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO1 28_47 29_52 29_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO2 28_51 29_48 29_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO3 28_51 29_46 29_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IMUX20_0 28_47 29_50 29_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IMUX22_0 28_49 29_50 29_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IOCLK0 28_49 28_51 29_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IOCLK1 28_47 28_51 29_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IOCLK2 29_48 29_50 29_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IOCLK3 29_46 29_50 29_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK0 30_48 30_60 31_53
RIOI_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK1 30_46 30_60 31_53
RIOI_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK2 30_60 31_49 31_53
RIOI_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK3 30_60 31_47 31_53
RIOI_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK4 30_48 30_52 30_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK5 30_46 30_52 30_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO0 30_52 30_60 31_49
RIOI_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO1 30_52 30_60 31_47
RIOI_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO2 30_48 30_60 31_51
RIOI_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO3 30_46 30_60 31_51
RIOI_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IMUX20_0 30_50 30_60 31_47
RIOI_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IMUX22_0 30_50 30_60 31_49
RIOI_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK0 30_60 31_49 31_51
RIOI_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK1 30_60 31_47 31_51
RIOI_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK2 30_48 30_50 30_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK3 30_46 30_50 30_60
RIOI_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK0 28_111 29_118 29_124 30_118 30_124 31_111
RIOI_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK1 28_111 29_118 29_126 30_118 30_126 31_111
RIOI_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK2 28_111 28_123 29_118 30_118 31_111 31_123
RIOI_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK3 28_111 28_125 29_118 30_118 31_111 31_125
RIOI_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK4 28_111 28_119 29_124 30_124 31_111 31_119
RIOI_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK5 28_111 28_119 29_126 30_126 31_111 31_119
RIOI_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO0 28_111 28_119 28_123 31_111 31_119 31_123
RIOI_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO1 28_111 28_119 28_125 31_111 31_119 31_125
RIOI_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO2 28_111 28_121 29_124 30_124 31_111 31_121
RIOI_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO3 28_111 28_121 29_126 30_126 31_111 31_121
RIOI_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_IMUX8_1 28_111 28_121 28_123 31_111 31_121 31_123
RIOI_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK0 28_03 28_09 29_16 30_16 31_03 31_09
RIOI_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK1 28_01 28_09 29_16 30_16 31_01 31_09
RIOI_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK2 28_09 29_04 29_16 30_04 30_16 31_09
RIOI_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK3 28_09 29_02 29_16 30_02 30_16 31_09
RIOI_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK4 28_03 29_08 29_16 30_08 30_16 31_03
RIOI_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK5 28_01 29_08 29_16 30_08 30_16 31_01
RIOI_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO0 29_04 29_08 29_16 30_04 30_08 30_16
RIOI_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO1 29_02 29_08 29_16 30_02 30_08 30_16
RIOI_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO2 28_03 29_06 29_16 30_06 30_16 31_03
RIOI_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO3 28_01 29_06 29_16 30_06 30_16 31_01
RIOI_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_IMUX8_0 29_04 29_06 29_16 30_04 30_06 30_16
RIOI_TBYTETERM.ODELAY_Y0.CINVCTRL_SEL 37_89
RIOI_TBYTETERM.ODELAY_Y0.HIGH_PERFORMANCE_MODE 34_109
RIOI_TBYTETERM.ODELAY_Y0.IN_USE 34_73 36_72 39_75
RIOI_TBYTETERM.ODELAY_Y0.IS_C_INVERTED 36_88
RIOI_TBYTETERM.ODELAY_Y0.ODELAY_TYPE_VAR_LOAD 37_113 37_119
RIOI_TBYTETERM.ODELAY_Y0.ODELAY_TYPE_VARIABLE 37_119
RIOI_TBYTETERM.ODELAY_Y0.ODELAY_VALUE[0] 36_122
RIOI_TBYTETERM.ODELAY_Y0.ODELAY_VALUE[1] 36_116
RIOI_TBYTETERM.ODELAY_Y0.ODELAY_VALUE[2] 36_110
RIOI_TBYTETERM.ODELAY_Y0.ODELAY_VALUE[3] 36_102
RIOI_TBYTETERM.ODELAY_Y0.ODELAY_VALUE[4] 36_96
RIOI_TBYTETERM.ODELAY_Y0.ZINV_ODATAIN 35_72
RIOI_TBYTETERM.ODELAY_Y0.ZODELAY_VALUE[0] 36_120
RIOI_TBYTETERM.ODELAY_Y0.ZODELAY_VALUE[1] 36_114
RIOI_TBYTETERM.ODELAY_Y0.ZODELAY_VALUE[2] 36_108
RIOI_TBYTETERM.ODELAY_Y0.ZODELAY_VALUE[3] 36_100
RIOI_TBYTETERM.ODELAY_Y0.ZODELAY_VALUE[4] 36_94
RIOI_TBYTETERM.ODELAY_Y1.CINVCTRL_SEL 36_38
RIOI_TBYTETERM.ODELAY_Y1.HIGH_PERFORMANCE_MODE 35_18
RIOI_TBYTETERM.ODELAY_Y1.IN_USE 35_54 37_55 38_52
RIOI_TBYTETERM.ODELAY_Y1.IS_C_INVERTED 37_39
RIOI_TBYTETERM.ODELAY_Y1.ODELAY_TYPE_VAR_LOAD 36_08 36_14
RIOI_TBYTETERM.ODELAY_Y1.ODELAY_TYPE_VARIABLE 36_08
RIOI_TBYTETERM.ODELAY_Y1.ODELAY_VALUE[0] 37_05
RIOI_TBYTETERM.ODELAY_Y1.ODELAY_VALUE[1] 37_11
RIOI_TBYTETERM.ODELAY_Y1.ODELAY_VALUE[2] 37_17
RIOI_TBYTETERM.ODELAY_Y1.ODELAY_VALUE[3] 37_25
RIOI_TBYTETERM.ODELAY_Y1.ODELAY_VALUE[4] 37_31
RIOI_TBYTETERM.ODELAY_Y1.ZINV_ODATAIN 34_55
RIOI_TBYTETERM.ODELAY_Y1.ZODELAY_VALUE[0] 37_07
RIOI_TBYTETERM.ODELAY_Y1.ZODELAY_VALUE[1] 37_13
RIOI_TBYTETERM.ODELAY_Y1.ZODELAY_VALUE[2] 37_19
RIOI_TBYTETERM.ODELAY_Y1.ZODELAY_VALUE[3] 37_27
RIOI_TBYTETERM.ODELAY_Y1.ZODELAY_VALUE[4] 37_33
RIOI_TBYTETERM.OLOGIC_Y0.IS_CLKDIV_INVERTED 30_85
RIOI_TBYTETERM.OLOGIC_Y0.IS_D1_INVERTED 30_97
RIOI_TBYTETERM.OLOGIC_Y0.IS_D2_INVERTED 31_102
RIOI_TBYTETERM.OLOGIC_Y0.IS_D3_INVERTED 31_106
RIOI_TBYTETERM.OLOGIC_Y0.IS_D4_INVERTED 31_110
RIOI_TBYTETERM.OLOGIC_Y0.IS_D5_INVERTED 30_113
RIOI_TBYTETERM.OLOGIC_Y0.IS_D6_INVERTED 31_114
RIOI_TBYTETERM.OLOGIC_Y0.IS_D7_INVERTED 31_118
RIOI_TBYTETERM.OLOGIC_Y0.IS_D8_INVERTED 30_125
RIOI_TBYTETERM.OLOGIC_Y0.ODDR.DDR_CLK_EDGE.SAME_EDGE 31_92
RIOI_TBYTETERM.OLOGIC_Y0.ODDR.SRUSED 32_112
RIOI_TBYTETERM.OLOGIC_Y0.ODDR_TDDR.IN_USE 31_83
RIOI_TBYTETERM.OLOGIC_Y0.OMUX.D1 33_111
RIOI_TBYTETERM.OLOGIC_Y0.OQUSED 31_86
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.DATA_RATE_OQ.DDR 33_91 !33_93
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.DATA_RATE_OQ.SDR !33_91 33_93
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.DATA_RATE_TQ.BUF 32_66 !32_70 !33_69
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.DATA_RATE_TQ.DDR !32_66 32_70 !33_69
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.DATA_RATE_TQ.SDR !32_66 !32_70 33_69
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.DATA_WIDTH.DDR.W4 !30_95 30_99 !30_121 !30_123 !30_127 !31_100 !31_116 !31_120 31_124 !31_126 33_73
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.DATA_WIDTH.DDR.W6 30_95 !30_99 !30_121 !30_123 !30_127 !31_100 !31_116 31_120 !31_124 !31_126 33_73
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.DATA_WIDTH.DDR.W8 30_95 30_99 !30_121 !30_123 !30_127 !31_100 31_116 !31_120 !31_124 !31_126 33_73
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W2 !30_95 30_99 !30_121 !30_123 30_127 !31_100 !31_116 !31_120 !31_124 !31_126 33_73 !33_91 33_93
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W3 30_95 !30_99 !30_121 !30_123 !30_127 !31_100 !31_116 !31_120 !31_124 31_126 33_73 !33_91 33_93
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W4 30_95 30_99 !30_121 !30_123 !30_127 !31_100 !31_116 !31_120 31_124 !31_126 33_73 !33_91 33_93
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W5 !30_95 30_99 30_121 !30_123 !30_127 31_98 !31_100 !31_116 !31_120 !31_124 !31_126 33_73 !33_91 33_93
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W6 !30_95 30_99 !30_121 !30_123 !30_127 31_98 31_100 !31_116 31_120 !31_124 !31_126 33_73 !33_91 33_93
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W7 !30_95 !30_99 !30_121 30_123 !30_127 31_98 31_100 !31_116 !31_120 !31_124 !31_126 33_73 !33_91 33_93
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W8 !30_95 !30_99 !30_121 !30_123 !30_127 31_98 31_100 31_116 !31_120 !31_124 !31_126 33_73 !33_91 33_93
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.IN_USE 33_73
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.SERDES_MODE.SLAVE 33_83
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.SRTYPE.SYNC 32_94
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.TRISTATE_WIDTH.W4 32_90
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.TSRTYPE.SYNC 32_72
RIOI_TBYTETERM.OLOGIC_Y0.TDDR.SRUSED 33_89
RIOI_TBYTETERM.OLOGIC_Y0.ZINIT_OQ 33_97
RIOI_TBYTETERM.OLOGIC_Y0.ZINIT_TQ 30_75
RIOI_TBYTETERM.OLOGIC_Y0.ZINV_CLK 31_90
RIOI_TBYTETERM.OLOGIC_Y0.ZINV_T1 30_67
RIOI_TBYTETERM.OLOGIC_Y0.ZINV_T2 30_71
RIOI_TBYTETERM.OLOGIC_Y0.ZINV_T3 31_76
RIOI_TBYTETERM.OLOGIC_Y0.ZINV_T4 30_79
RIOI_TBYTETERM.OLOGIC_Y0.ZSRVAL_OQ 32_108 33_95 33_107
RIOI_TBYTETERM.OLOGIC_Y0.ZSRVAL_TQ 32_82 33_75 33_81
RIOI_TBYTETERM.OLOGIC_Y1.IS_CLKDIV_INVERTED 31_42
RIOI_TBYTETERM.OLOGIC_Y1.IS_D1_INVERTED 31_30
RIOI_TBYTETERM.OLOGIC_Y1.IS_D2_INVERTED 30_25
RIOI_TBYTETERM.OLOGIC_Y1.IS_D3_INVERTED 30_21
RIOI_TBYTETERM.OLOGIC_Y1.IS_D4_INVERTED 30_17
RIOI_TBYTETERM.OLOGIC_Y1.IS_D5_INVERTED 31_14
RIOI_TBYTETERM.OLOGIC_Y1.IS_D6_INVERTED 30_13
RIOI_TBYTETERM.OLOGIC_Y1.IS_D7_INVERTED 30_09
RIOI_TBYTETERM.OLOGIC_Y1.IS_D8_INVERTED 31_02
RIOI_TBYTETERM.OLOGIC_Y1.ODDR.DDR_CLK_EDGE.SAME_EDGE 30_35
RIOI_TBYTETERM.OLOGIC_Y1.ODDR.SRUSED 33_15
RIOI_TBYTETERM.OLOGIC_Y1.ODDR_TDDR.IN_USE 30_44
RIOI_TBYTETERM.OLOGIC_Y1.OMUX.D1 32_16
RIOI_TBYTETERM.OLOGIC_Y1.OQUSED 30_41
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.DATA_RATE_OQ.DDR !32_34 32_36
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.DATA_RATE_OQ.SDR 32_34 !32_36
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.DATA_RATE_TQ.BUF !32_58 !33_57 33_61
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.DATA_RATE_TQ.DDR !32_58 33_57 !33_61
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.DATA_RATE_TQ.SDR 32_58 !33_57 !33_61
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.DATA_WIDTH.DDR.W4 !30_01 30_03 !30_07 !30_11 !30_27 !30_29 !31_00 !31_04 !31_06 31_28 !31_32 32_54
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.DATA_WIDTH.DDR.W6 !30_01 !30_03 30_07 !30_11 !30_27 !30_29 !31_00 !31_04 !31_06 !31_28 31_32 32_54
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.DATA_WIDTH.DDR.W8 !30_01 !30_03 !30_07 30_11 !30_27 !30_29 !31_00 !31_04 !31_06 31_28 31_32 32_54
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W2 !30_01 !30_03 !30_07 !30_11 !30_27 !30_29 31_00 !31_04 !31_06 31_28 !31_32 32_34 !32_36 32_54
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W3 30_01 !30_03 !30_07 !30_11 !30_27 !30_29 !31_00 !31_04 !31_06 !31_28 31_32 32_34 !32_36 32_54
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W4 !30_01 30_03 !30_07 !30_11 !30_27 !30_29 !31_00 !31_04 !31_06 31_28 31_32 32_34 !32_36 32_54
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W5 !30_01 !30_03 !30_07 !30_11 !30_27 30_29 !31_00 !31_04 31_06 31_28 !31_32 32_34 !32_36 32_54
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W6 !30_01 !30_03 30_07 !30_11 30_27 30_29 !31_00 !31_04 !31_06 31_28 !31_32 32_34 !32_36 32_54
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W7 !30_01 !30_03 !30_07 !30_11 30_27 30_29 !31_00 31_04 !31_06 !31_28 !31_32 32_34 !32_36 32_54
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W8 !30_01 !30_03 !30_07 30_11 30_27 30_29 !31_00 !31_04 !31_06 !31_28 !31_32 32_34 !32_36 32_54
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.IN_USE 32_54
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.SERDES_MODE.SLAVE 32_44
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.SRTYPE.SYNC 33_33
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.TRISTATE_WIDTH.W4 33_37
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.TSRTYPE.SYNC 33_55
RIOI_TBYTETERM.OLOGIC_Y1.TDDR.SRUSED 32_38
RIOI_TBYTETERM.OLOGIC_Y1.ZINIT_OQ 32_30
RIOI_TBYTETERM.OLOGIC_Y1.ZINIT_TQ 31_52
RIOI_TBYTETERM.OLOGIC_Y1.ZINV_CLK 30_37
RIOI_TBYTETERM.OLOGIC_Y1.ZINV_T1 31_60
RIOI_TBYTETERM.OLOGIC_Y1.ZINV_T2 31_56
RIOI_TBYTETERM.OLOGIC_Y1.ZINV_T3 30_51
RIOI_TBYTETERM.OLOGIC_Y1.ZINV_T4 31_48
RIOI_TBYTETERM.OLOGIC_Y1.ZSRVAL_OQ 32_20 32_32 33_19
RIOI_TBYTETERM.OLOGIC_Y1.ZSRVAL_TQ 32_46 32_52 33_45

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@ -0,0 +1,398 @@
RIOI_TBYTETERM.IDELAY_Y0.CINVCTRL_SEL origin:035a-iob18-idelay 35_89
RIOI_TBYTETERM.IDELAY_Y0.DELAY_SRC_DATAIN origin:035a-iob18-idelay !34_72 35_69
RIOI_TBYTETERM.IDELAY_Y0.DELAY_SRC_IDATAIN origin:035a-iob18-idelay !35_69 34_72
RIOI_TBYTETERM.IDELAY_Y0.HIGH_PERFORMANCE_MODE origin:035a-iob18-idelay 32_109
RIOI_TBYTETERM.IDELAY_Y0.IDELAY_TYPE_FIXED origin:035a-iob18-idelay !35_113 !35_119
RIOI_TBYTETERM.IDELAY_Y0.IDELAY_TYPE_VAR_LOAD origin:035a-iob18-idelay 35_113 35_119
RIOI_TBYTETERM.IDELAY_Y0.IDELAY_TYPE_VARIABLE origin:035a-iob18-idelay !35_113 35_119
RIOI_TBYTETERM.IDELAY_Y0.IDELAY_VALUE[0] origin:035a-iob18-idelay !34_120 34_122
RIOI_TBYTETERM.IDELAY_Y0.IDELAY_VALUE[1] origin:035a-iob18-idelay !34_114 34_116
RIOI_TBYTETERM.IDELAY_Y0.IDELAY_VALUE[2] origin:035a-iob18-idelay !34_108 34_110
RIOI_TBYTETERM.IDELAY_Y0.IDELAY_VALUE[3] origin:035a-iob18-idelay !34_100 34_102
RIOI_TBYTETERM.IDELAY_Y0.IDELAY_VALUE[4] origin:035a-iob18-idelay !34_94 34_96
RIOI_TBYTETERM.IDELAY_Y0.IN_USE origin:035a-iob18-idelay 32_73
RIOI_TBYTETERM.IDELAY_Y0.IS_DATAIN_INVERTED origin:035a-iob18-idelay 35_81
RIOI_TBYTETERM.IDELAY_Y0.IS_IDATAIN_INVERTED origin:035a-iob18-idelay 33_72
RIOI_TBYTETERM.IDELAY_Y0.PIPE_SEL origin:035a-iob18-idelay 34_106
RIOI_TBYTETERM.IDELAY_Y0.ZIDELAY_VALUE[0] origin:035a-iob18-idelay !34_122 34_120
RIOI_TBYTETERM.IDELAY_Y0.ZIDELAY_VALUE[1] origin:035a-iob18-idelay !34_116 34_114
RIOI_TBYTETERM.IDELAY_Y0.ZIDELAY_VALUE[2] origin:035a-iob18-idelay !34_110 34_108
RIOI_TBYTETERM.IDELAY_Y0.ZIDELAY_VALUE[3] origin:035a-iob18-idelay !34_102 34_100
RIOI_TBYTETERM.IDELAY_Y0.ZIDELAY_VALUE[4] origin:035a-iob18-idelay !34_96 34_94
RIOI_TBYTETERM.IDELAY_Y1.CINVCTRL_SEL origin:035a-iob18-idelay 34_38
RIOI_TBYTETERM.IDELAY_Y1.DELAY_SRC_DATAIN origin:035a-iob18-idelay !35_55 34_58
RIOI_TBYTETERM.IDELAY_Y1.DELAY_SRC_IDATAIN origin:035a-iob18-idelay !34_58 35_55
RIOI_TBYTETERM.IDELAY_Y1.HIGH_PERFORMANCE_MODE origin:035a-iob18-idelay 33_18
RIOI_TBYTETERM.IDELAY_Y1.IDELAY_TYPE_FIXED origin:035a-iob18-idelay !34_08 !34_14
RIOI_TBYTETERM.IDELAY_Y1.IDELAY_TYPE_VAR_LOAD origin:035a-iob18-idelay 34_08 34_14
RIOI_TBYTETERM.IDELAY_Y1.IDELAY_TYPE_VARIABLE origin:035a-iob18-idelay !34_14 34_08
RIOI_TBYTETERM.IDELAY_Y1.IDELAY_VALUE[0] origin:035a-iob18-idelay !35_07 35_05
RIOI_TBYTETERM.IDELAY_Y1.IDELAY_VALUE[1] origin:035a-iob18-idelay !35_13 35_11
RIOI_TBYTETERM.IDELAY_Y1.IDELAY_VALUE[2] origin:035a-iob18-idelay !35_19 35_17
RIOI_TBYTETERM.IDELAY_Y1.IDELAY_VALUE[3] origin:035a-iob18-idelay !35_27 35_25
RIOI_TBYTETERM.IDELAY_Y1.IDELAY_VALUE[4] origin:035a-iob18-idelay !35_33 35_31
RIOI_TBYTETERM.IDELAY_Y1.IN_USE origin:035a-iob18-idelay 33_54
RIOI_TBYTETERM.IDELAY_Y1.IS_DATAIN_INVERTED origin:035a-iob18-idelay 34_46
RIOI_TBYTETERM.IDELAY_Y1.IS_IDATAIN_INVERTED origin:035a-iob18-idelay 32_55
RIOI_TBYTETERM.IDELAY_Y1.PIPE_SEL origin:035a-iob18-idelay 35_21
RIOI_TBYTETERM.IDELAY_Y1.ZIDELAY_VALUE[0] origin:035a-iob18-idelay !35_05 35_07
RIOI_TBYTETERM.IDELAY_Y1.ZIDELAY_VALUE[1] origin:035a-iob18-idelay !35_11 35_13
RIOI_TBYTETERM.IDELAY_Y1.ZIDELAY_VALUE[2] origin:035a-iob18-idelay !35_17 35_19
RIOI_TBYTETERM.IDELAY_Y1.ZIDELAY_VALUE[3] origin:035a-iob18-idelay !35_25 35_27
RIOI_TBYTETERM.IDELAY_Y1.ZIDELAY_VALUE[4] origin:035a-iob18-idelay !35_31 35_33
RIOI_TBYTETERM.ILOGIC_Y0.IDDR.IN_USE origin:035b-iob-iserdes 26_121 26_71 27_70
RIOI_TBYTETERM.ILOGIC_Y0.IDDR_OR_ISERDES.IN_USE origin:035b-iob-iserdes 26_71 27_70
RIOI_TBYTETERM.ILOGIC_Y0.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE origin:035-iob-ilogic !26_99 27_98
RIOI_TBYTETERM.ILOGIC_Y0.IFF.DDR_CLK_EDGE.SAME_EDGE origin:035-iob-ilogic !27_98 26_99
RIOI_TBYTETERM.ILOGIC_Y0.IFF.INV_OCLK origin:035-iob-ilogic 28_124
RIOI_TBYTETERM.ILOGIC_Y0.IFF.SRTYPE.ASYNC origin:035-iob-ilogic !29_67
RIOI_TBYTETERM.ILOGIC_Y0.IFF.SRTYPE.SYNC origin:035-iob-ilogic 29_67
RIOI_TBYTETERM.ILOGIC_Y0.IFF.ZINIT_Q1 origin:035-iob-ilogic 28_72
RIOI_TBYTETERM.ILOGIC_Y0.IFF.ZINIT_Q2 origin:035-iob-ilogic 28_76
RIOI_TBYTETERM.ILOGIC_Y0.IFF.ZINIT_Q3 origin:035-iob-ilogic 28_86
RIOI_TBYTETERM.ILOGIC_Y0.IFF.ZINIT_Q4 origin:035-iob-ilogic 28_94
RIOI_TBYTETERM.ILOGIC_Y0.IFF.ZINV_C origin:035-iob-ilogic 28_126 29_123 29_125
RIOI_TBYTETERM.ILOGIC_Y0.IFF.ZINV_OCLK origin:035-iob-ilogic 28_64
RIOI_TBYTETERM.ILOGIC_Y0.IFF.ZSRVAL_Q1 origin:035-iob-ilogic 29_71
RIOI_TBYTETERM.ILOGIC_Y0.IFF.ZSRVAL_Q2 origin:035-iob-ilogic 29_75
RIOI_TBYTETERM.ILOGIC_Y0.IFF.ZSRVAL_Q3 origin:035-iob-ilogic 29_85
RIOI_TBYTETERM.ILOGIC_Y0.IFF.ZSRVAL_Q4 origin:035-iob-ilogic 29_93
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.DYN_CLK_INV_EN origin:035b-iob-iserdes 29_127
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.DYN_CLKDIV_INV_EN origin:035b-iob-iserdes 27_118
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.IN_USE origin:035b-iob-iserdes 27_102 28_110
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.MEMORY.DDR.W4 origin:035b-iob-iserdes !26_101 !26_107 !26_109 !26_111 !26_115 !26_121 !27_108 !27_112 26_71 27_102 27_110 27_70 27_98 28_110 29_67
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.MEMORY_QDR.DDR.W4 origin:035b-iob-iserdes !26_101 !26_107 !26_109 !26_111 !26_115 !27_108 !27_112 26_121 26_71 27_102 27_110 27_70 27_98 28_110 29_67
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.MEMORY_DDR3.DDR.W4 origin:035b-iob-iserdes 26_101 26_117 26_121 26_71 27_102 27_110 27_70 27_98 28_110 29_67
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.MODE.MASTER origin:035b-iob-iserdes !27_106
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.MODE.SLAVE origin:035b-iob-iserdes 27_106
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.NETWORKING.DDR.W4 origin:035b-iob-iserdes !26_101 !26_109 !26_111 !26_115 !27_108 !27_112 26_107 26_121 26_71 27_102 27_110 27_70 27_98 28_110 29_67
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.NETWORKING.DDR.W6 origin:035b-iob-iserdes !26_101 !26_109 !26_115 !27_108 !27_112 26_107 26_111 26_121 26_71 27_102 27_110 27_70 27_98 28_110 29_67
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.NETWORKING.DDR.W8 origin:035b-iob-iserdes !26_101 !26_111 !26_115 !27_108 !27_110 !27_112 26_107 26_109 26_121 26_71 27_102 27_70 27_98 28_110 29_67
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.NETWORKING.DDR.W10 origin:035b-iob-iserdes !26_101 !26_115 !27_108 !27_110 !27_112 26_107 26_109 26_111 26_121 26_71 27_102 27_70 27_98 28_110 29_67
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.NETWORKING.DDR.W14 origin:035b-iob-iserdes !26_101 !26_115 !27_108 !27_112 26_107 26_109 26_111 26_121 26_71 27_102 27_110 27_70 27_98 28_110 29_67
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W2 origin:035b-iob-iserdes !26_101 !26_109 !26_115 !27_110 !27_112 26_107 26_111 26_121 26_71 27_102 27_108 27_70 27_98 28_110 29_67
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W3 origin:035b-iob-iserdes !26_101 !26_109 !26_115 !27_110 26_107 26_111 26_121 26_71 27_102 27_108 27_112 27_70 27_98 28_110 29_67
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W4 origin:035b-iob-iserdes !26_101 !26_109 !26_111 !26_115 !27_112 26_107 26_121 26_71 27_102 27_108 27_110 27_70 27_98 28_110 29_67
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W5 origin:035b-iob-iserdes !26_101 !26_109 !26_111 !26_115 26_107 26_121 26_71 27_102 27_108 27_110 27_112 27_70 27_98 28_110 29_67
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W6 origin:035b-iob-iserdes !26_101 !26_109 !26_115 !27_112 26_107 26_111 26_121 26_71 27_102 27_108 27_110 27_70 27_98 28_110 29_67
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W7 origin:035b-iob-iserdes !26_101 !26_109 !26_115 26_107 26_111 26_121 26_71 27_102 27_108 27_110 27_112 27_70 27_98 28_110 29_67
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.NETWORKING.SDR.W8 origin:035b-iob-iserdes !26_101 !26_111 !26_115 !27_110 !27_112 26_107 26_109 26_121 26_71 27_102 27_108 27_70 27_98 28_110 29_67
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.NUM_CE.N1 origin:035b-iob-iserdes !27_80
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.NUM_CE.N2 origin:035b-iob-iserdes 27_80
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.OFB_USED origin:035b-iob-iserdes 29_103 29_113
RIOI_TBYTETERM.ILOGIC_Y0.ISERDES.OVERSAMPLE.DDR.W4 origin:035b-iob-iserdes !26_109 !26_111 !27_108 !27_112 26_101 26_107 26_115 26_121 26_71 27_102 27_110 27_70 27_98 28_110 29_67
RIOI_TBYTETERM.ILOGIC_Y0.ZINV_D origin:035-iob-ilogic 29_109
RIOI_TBYTETERM.ILOGIC_Y0.IDELMUXE3.P0 origin:035-iob-ilogic 29_101
RIOI_TBYTETERM.ILOGIC_Y0.IDELMUXE3.P1 origin:035-iob-ilogic !29_101
RIOI_TBYTETERM.ILOGIC_Y0.IFFDELMUXE3.P0 origin:035-iob-ilogic 28_116
RIOI_TBYTETERM.ILOGIC_Y1.IDDR.IN_USE origin:035b-iob-iserdes 26_57 27_06 27_56
RIOI_TBYTETERM.ILOGIC_Y1.IDDR_OR_ISERDES.IN_USE origin:035b-iob-iserdes 26_57 27_56
RIOI_TBYTETERM.ILOGIC_Y1.IFF.DDR_CLK_EDGE.OPPOSITE_EDGE origin:035-iob-ilogic !27_28 26_29
RIOI_TBYTETERM.ILOGIC_Y1.IFF.DDR_CLK_EDGE.SAME_EDGE origin:035-iob-ilogic !26_29 27_28
RIOI_TBYTETERM.ILOGIC_Y1.IFF.INV_OCLK origin:035-iob-ilogic 29_03
RIOI_TBYTETERM.ILOGIC_Y1.IFF.SRTYPE.ASYNC origin:035-iob-ilogic !28_60
RIOI_TBYTETERM.ILOGIC_Y1.IFF.SRTYPE.SYNC origin:035-iob-ilogic 28_60
RIOI_TBYTETERM.ILOGIC_Y1.IFF.ZINIT_Q1 origin:035-iob-ilogic 29_55
RIOI_TBYTETERM.ILOGIC_Y1.IFF.ZINIT_Q2 origin:035-iob-ilogic 29_51
RIOI_TBYTETERM.ILOGIC_Y1.IFF.ZINIT_Q3 origin:035-iob-ilogic 29_41
RIOI_TBYTETERM.ILOGIC_Y1.IFF.ZINIT_Q4 origin:035-iob-ilogic 29_33
RIOI_TBYTETERM.ILOGIC_Y1.IFF.ZINV_C origin:035-iob-ilogic 28_02 28_04 29_01
RIOI_TBYTETERM.ILOGIC_Y1.IFF.ZINV_OCLK origin:035-iob-ilogic 29_63
RIOI_TBYTETERM.ILOGIC_Y1.IFF.ZSRVAL_Q1 origin:035-iob-ilogic 28_56
RIOI_TBYTETERM.ILOGIC_Y1.IFF.ZSRVAL_Q2 origin:035-iob-ilogic 28_52
RIOI_TBYTETERM.ILOGIC_Y1.IFF.ZSRVAL_Q3 origin:035-iob-ilogic 28_42
RIOI_TBYTETERM.ILOGIC_Y1.IFF.ZSRVAL_Q4 origin:035-iob-ilogic 28_34
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.DYN_CLK_INV_EN origin:035b-iob-iserdes 28_00
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.DYN_CLKDIV_INV_EN origin:035b-iob-iserdes 26_09
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.IN_USE origin:035b-iob-iserdes 26_25 29_17
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.MEMORY.DDR.W4 origin:035b-iob-iserdes !26_15 !26_19 !27_06 !27_12 !27_16 !27_18 !27_20 !27_26 26_17 26_25 26_29 26_57 27_56 28_60 29_17
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.MEMORY_QDR.DDR.W4 origin:035b-iob-iserdes !26_15 !26_19 !27_12 !27_16 !27_18 !27_20 !27_26 26_17 26_25 26_29 26_57 27_06 27_56 28_60 29_17
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.MEMORY_DDR3.DDR.W4 origin:035b-iob-iserdes 26_17 26_25 26_29 26_57 27_06 27_10 27_26 27_56 28_60 29_17
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.MODE.MASTER origin:035b-iob-iserdes !26_21
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.MODE.SLAVE origin:035b-iob-iserdes 26_21
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.NETWORKING.DDR.W4 origin:035b-iob-iserdes !26_15 !26_19 !27_12 !27_16 !27_18 !27_26 26_17 26_25 26_29 26_57 27_06 27_20 27_56 28_60 29_17
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.NETWORKING.DDR.W6 origin:035b-iob-iserdes !26_15 !26_19 !27_12 !27_18 !27_26 26_17 26_25 26_29 26_57 27_06 27_16 27_20 27_56 28_60 29_17
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.NETWORKING.DDR.W8 origin:035b-iob-iserdes !26_15 !26_17 !26_19 !27_12 !27_16 !27_26 26_25 26_29 26_57 27_06 27_18 27_20 27_56 28_60 29_17
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.NETWORKING.DDR.W10 origin:035b-iob-iserdes !26_15 !26_17 !26_19 !27_12 !27_26 26_25 26_29 26_57 27_06 27_16 27_18 27_20 27_56 28_60 29_17
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.NETWORKING.DDR.W14 origin:035b-iob-iserdes !26_15 !26_19 !27_12 !27_26 26_17 26_25 26_29 26_57 27_06 27_16 27_18 27_20 27_56 28_60 29_17
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W2 origin:035b-iob-iserdes !26_15 !26_17 !27_12 !27_18 !27_26 26_19 26_25 26_29 26_57 27_06 27_16 27_20 27_56 28_60 29_17
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W3 origin:035b-iob-iserdes !26_17 !27_12 !27_18 !27_26 26_15 26_19 26_25 26_29 26_57 27_06 27_16 27_20 27_56 28_60 29_17
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W4 origin:035b-iob-iserdes !26_15 !27_12 !27_16 !27_18 !27_26 26_17 26_19 26_25 26_29 26_57 27_06 27_20 27_56 28_60 29_17
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W5 origin:035b-iob-iserdes !27_12 !27_16 !27_18 !27_26 26_15 26_17 26_19 26_25 26_29 26_57 27_06 27_20 27_56 28_60 29_17
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W6 origin:035b-iob-iserdes !26_15 !27_12 !27_18 !27_26 26_17 26_19 26_25 26_29 26_57 27_06 27_16 27_20 27_56 28_60 29_17
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W7 origin:035b-iob-iserdes !27_12 !27_18 !27_26 26_15 26_17 26_19 26_25 26_29 26_57 27_06 27_16 27_20 27_56 28_60 29_17
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.NETWORKING.SDR.W8 origin:035b-iob-iserdes !26_15 !26_17 !27_12 !27_16 !27_26 26_19 26_25 26_29 26_57 27_06 27_18 27_20 27_56 28_60 29_17
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.NUM_CE.N1 origin:035b-iob-iserdes !26_47
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.NUM_CE.N2 origin:035b-iob-iserdes 26_47
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.OFB_USED origin:035b-iob-iserdes 28_14 28_24
RIOI_TBYTETERM.ILOGIC_Y1.ISERDES.OVERSAMPLE.DDR.W4 origin:035b-iob-iserdes !26_15 !26_19 !27_16 !27_18 26_17 26_25 26_29 26_57 27_06 27_12 27_20 27_26 27_56 28_60 29_17
RIOI_TBYTETERM.ILOGIC_Y1.ZINV_D origin:035-iob-ilogic 28_18
RIOI_TBYTETERM.ILOGIC_Y1.IDELMUXE3.P0 origin:035-iob-ilogic 28_26
RIOI_TBYTETERM.ILOGIC_Y1.IDELMUXE3.P1 origin:035-iob-ilogic !28_26
RIOI_TBYTETERM.ILOGIC_Y1.IFFDELMUXE3.P0 origin:035-iob-ilogic 29_11
RIOI_TBYTETERM.IOI_OCLK_0.IOI_LEAF_GCLK0 origin:037-iob18-pips 28_83 28_95 29_88
RIOI_TBYTETERM.IOI_OCLK_0.IOI_LEAF_GCLK1 origin:037-iob18-pips 28_83 28_97 29_88
RIOI_TBYTETERM.IOI_OCLK_0.IOI_LEAF_GCLK2 origin:037-iob18-pips 28_83 29_88 29_94
RIOI_TBYTETERM.IOI_OCLK_0.IOI_LEAF_GCLK3 origin:037-iob18-pips 28_83 29_88 29_96
RIOI_TBYTETERM.IOI_OCLK_0.IOI_LEAF_GCLK4 origin:037-iob18-pips 28_83 28_89 28_95
RIOI_TBYTETERM.IOI_OCLK_0.IOI_LEAF_GCLK5 origin:037-iob18-pips 28_83 28_89 28_97
RIOI_TBYTETERM.IOI_OCLK_0.IOI_RCLK_FORIO0 origin:037-iob18-pips 28_83 28_89 29_94
RIOI_TBYTETERM.IOI_OCLK_0.IOI_RCLK_FORIO1 origin:037-iob18-pips 28_83 28_89 29_96
RIOI_TBYTETERM.IOI_OCLK_0.IOI_RCLK_FORIO2 origin:037-iob18-pips 28_83 28_95 29_92
RIOI_TBYTETERM.IOI_OCLK_0.IOI_RCLK_FORIO3 origin:037-iob18-pips 28_83 28_97 29_92
RIOI_TBYTETERM.IOI_OCLK_0.IOI_IMUX31_1 origin:037-iob18-pips 28_83 28_93 29_94
RIOI_TBYTETERM.IOI_OCLK_0.IOI_IOCLK0 origin:037-iob18-pips 28_83 29_92 29_94
RIOI_TBYTETERM.IOI_OCLK_0.IOI_IOCLK1 origin:037-iob18-pips 28_83 29_92 29_96
RIOI_TBYTETERM.IOI_OCLK_0.IOI_IOCLK2 origin:037-iob18-pips 28_83 28_93 28_95
RIOI_TBYTETERM.IOI_OCLK_0.IOI_IOCLK3 origin:037-iob18-pips 28_83 28_93 28_97
RIOI_TBYTETERM.IOI_OCLK_1.IOI_LEAF_GCLK0 origin:037-iob18-pips 28_39 29_32 29_44
RIOI_TBYTETERM.IOI_OCLK_1.IOI_LEAF_GCLK1 origin:037-iob18-pips 28_39 29_30 29_44
RIOI_TBYTETERM.IOI_OCLK_1.IOI_LEAF_GCLK2 origin:037-iob18-pips 28_33 28_39 29_44
RIOI_TBYTETERM.IOI_OCLK_1.IOI_LEAF_GCLK3 origin:037-iob18-pips 28_31 28_39 29_44
RIOI_TBYTETERM.IOI_OCLK_1.IOI_LEAF_GCLK4 origin:037-iob18-pips 29_32 29_38 29_44
RIOI_TBYTETERM.IOI_OCLK_1.IOI_LEAF_GCLK5 origin:037-iob18-pips 29_30 29_38 29_44
RIOI_TBYTETERM.IOI_OCLK_1.IOI_RCLK_FORIO0 origin:037-iob18-pips 28_33 29_38 29_44
RIOI_TBYTETERM.IOI_OCLK_1.IOI_RCLK_FORIO1 origin:037-iob18-pips 28_31 29_38 29_44
RIOI_TBYTETERM.IOI_OCLK_1.IOI_RCLK_FORIO2 origin:037-iob18-pips 28_35 29_32 29_44
RIOI_TBYTETERM.IOI_OCLK_1.IOI_RCLK_FORIO3 origin:037-iob18-pips 28_35 29_30 29_44
RIOI_TBYTETERM.IOI_OCLK_1.IOI_IMUX31_0 origin:037-iob18-pips 28_33 29_34 29_44
RIOI_TBYTETERM.IOI_OCLK_1.IOI_IOCLK0 origin:037-iob18-pips 28_33 28_35 29_44
RIOI_TBYTETERM.IOI_OCLK_1.IOI_IOCLK1 origin:037-iob18-pips 28_31 28_35 29_44
RIOI_TBYTETERM.IOI_OCLK_1.IOI_IOCLK2 origin:037-iob18-pips 29_32 29_34 29_44
RIOI_TBYTETERM.IOI_OCLK_1.IOI_IOCLK3 origin:037-iob18-pips 29_30 29_34 29_44
RIOI_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK0 origin:037-iob18-pips 30_88 31_83 31_95
RIOI_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK1 origin:037-iob18-pips 30_88 31_83 31_97
RIOI_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK2 origin:037-iob18-pips 30_88 30_94 31_83
RIOI_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK3 origin:037-iob18-pips 30_88 30_96 31_83
RIOI_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK4 origin:037-iob18-pips 31_83 31_89 31_95
RIOI_TBYTETERM.IOI_OCLKM_0.IOI_LEAF_GCLK5 origin:037-iob18-pips 31_83 31_89 31_97
RIOI_TBYTETERM.IOI_OCLKM_0.IOI_RCLK_FORIO0 origin:037-iob18-pips 30_94 31_83 31_89
RIOI_TBYTETERM.IOI_OCLKM_0.IOI_RCLK_FORIO1 origin:037-iob18-pips 30_96 31_83 31_89
RIOI_TBYTETERM.IOI_OCLKM_0.IOI_RCLK_FORIO2 origin:037-iob18-pips 30_92 31_83 31_95
RIOI_TBYTETERM.IOI_OCLKM_0.IOI_RCLK_FORIO3 origin:037-iob18-pips 30_92 31_83 31_97
RIOI_TBYTETERM.IOI_OCLKM_0.IOI_IOCLK0 origin:037-iob18-pips 30_92 30_94 31_83
RIOI_TBYTETERM.IOI_OCLKM_0.IOI_IOCLK1 origin:037-iob18-pips 30_92 30_96 31_83
RIOI_TBYTETERM.IOI_OCLKM_0.IOI_IOCLK2 origin:037-iob18-pips 31_83 31_93 31_95
RIOI_TBYTETERM.IOI_OCLKM_0.IOI_IOCLK3 origin:037-iob18-pips 31_83 31_93 31_97
RIOI_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK0 origin:037-iob18-pips 30_32 30_44 31_39
RIOI_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK1 origin:037-iob18-pips 30_30 30_44 31_39
RIOI_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK2 origin:037-iob18-pips 30_44 31_33 31_39
RIOI_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK3 origin:037-iob18-pips 30_44 31_31 31_39
RIOI_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK4 origin:037-iob18-pips 30_32 30_38 30_44
RIOI_TBYTETERM.IOI_OCLKM_1.IOI_LEAF_GCLK5 origin:037-iob18-pips 30_30 30_38 30_44
RIOI_TBYTETERM.IOI_OCLKM_1.IOI_RCLK_FORIO0 origin:037-iob18-pips 30_38 30_44 31_33
RIOI_TBYTETERM.IOI_OCLKM_1.IOI_RCLK_FORIO1 origin:037-iob18-pips 30_38 30_44 31_31
RIOI_TBYTETERM.IOI_OCLKM_1.IOI_RCLK_FORIO2 origin:037-iob18-pips 30_32 30_44 31_35
RIOI_TBYTETERM.IOI_OCLKM_1.IOI_RCLK_FORIO3 origin:037-iob18-pips 30_30 30_44 31_35
RIOI_TBYTETERM.IOI_OCLKM_1.IOI_IOCLK0 origin:037-iob18-pips 30_44 31_33 31_35
RIOI_TBYTETERM.IOI_OCLKM_1.IOI_IOCLK1 origin:037-iob18-pips 30_44 31_31 31_35
RIOI_TBYTETERM.IOI_OCLKM_1.IOI_IOCLK2 origin:037-iob18-pips 30_32 30_34 30_44
RIOI_TBYTETERM.IOI_OCLKM_1.IOI_IOCLK3 origin:037-iob18-pips 30_30 30_34 30_44
RIOI_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK0 origin:037-iob18-pips 28_67 28_79 29_74
RIOI_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK1 origin:037-iob18-pips 28_67 28_81 29_74
RIOI_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK2 origin:037-iob18-pips 28_67 29_74 29_78
RIOI_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK3 origin:037-iob18-pips 28_67 29_74 29_80
RIOI_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK4 origin:037-iob18-pips 28_67 28_75 28_79
RIOI_TBYTETERM.IOI_ILOGIC0_CLK.IOI_LEAF_GCLK5 origin:037-iob18-pips 28_67 28_75 28_81
RIOI_TBYTETERM.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO0 origin:037-iob18-pips 28_67 28_75 29_78
RIOI_TBYTETERM.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO1 origin:037-iob18-pips 28_67 28_75 29_80
RIOI_TBYTETERM.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO2 origin:037-iob18-pips 28_67 28_79 29_76
RIOI_TBYTETERM.IOI_ILOGIC0_CLK.IOI_RCLK_FORIO3 origin:037-iob18-pips 28_67 28_81 29_76
RIOI_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IMUX20_1 origin:037-iob18-pips 28_67 28_77 29_80
RIOI_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IMUX22_1 origin:037-iob18-pips 28_67 28_77 29_78
RIOI_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IOCLK0 origin:037-iob18-pips 28_67 29_76 29_78
RIOI_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IOCLK1 origin:037-iob18-pips 28_67 29_76 29_80
RIOI_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IOCLK2 origin:037-iob18-pips 28_67 28_77 28_79
RIOI_TBYTETERM.IOI_ILOGIC0_CLK.IOI_IOCLK3 origin:037-iob18-pips 28_67 28_77 28_81
RIOI_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK0 origin:037-iob18-pips 30_74 31_67 31_79
RIOI_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK1 origin:037-iob18-pips 30_74 31_67 31_81
RIOI_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK2 origin:037-iob18-pips 30_74 30_78 31_67
RIOI_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK3 origin:037-iob18-pips 30_74 30_80 31_67
RIOI_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK4 origin:037-iob18-pips 31_67 31_75 31_79
RIOI_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_LEAF_GCLK5 origin:037-iob18-pips 31_67 31_75 31_81
RIOI_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO0 origin:037-iob18-pips 30_78 31_67 31_75
RIOI_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 origin:037-iob18-pips 30_80 31_67 31_75
RIOI_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 origin:037-iob18-pips 30_76 31_67 31_79
RIOI_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 origin:037-iob18-pips 30_76 31_67 31_81
RIOI_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 origin:037-iob18-pips 30_80 31_67 31_77
RIOI_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IMUX22_1 origin:037-iob18-pips 30_78 31_67 31_77
RIOI_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK0 origin:037-iob18-pips 30_76 30_78 31_67
RIOI_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK1 origin:037-iob18-pips 30_76 30_80 31_67
RIOI_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK2 origin:037-iob18-pips 31_67 31_77 31_79
RIOI_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK3 origin:037-iob18-pips 31_67 31_77 31_81
RIOI_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK0 origin:037-iob18-pips 28_53 29_48 29_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK1 origin:037-iob18-pips 28_53 29_46 29_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK2 origin:037-iob18-pips 28_49 28_53 29_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK3 origin:037-iob18-pips 28_47 28_53 29_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK4 origin:037-iob18-pips 29_48 29_52 29_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLK.IOI_LEAF_GCLK5 origin:037-iob18-pips 29_46 29_52 29_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO0 origin:037-iob18-pips 28_49 29_52 29_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO1 origin:037-iob18-pips 28_47 29_52 29_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO2 origin:037-iob18-pips 28_51 29_48 29_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLK.IOI_RCLK_FORIO3 origin:037-iob18-pips 28_51 29_46 29_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IMUX20_0 origin:037-iob18-pips 28_47 29_50 29_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IMUX22_0 origin:037-iob18-pips 28_49 29_50 29_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IOCLK0 origin:037-iob18-pips 28_49 28_51 29_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IOCLK1 origin:037-iob18-pips 28_47 28_51 29_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IOCLK2 origin:037-iob18-pips 29_48 29_50 29_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLK.IOI_IOCLK3 origin:037-iob18-pips 29_46 29_50 29_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK0 origin:037-iob18-pips 30_48 30_60 31_53
RIOI_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK1 origin:037-iob18-pips 30_46 30_60 31_53
RIOI_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK2 origin:037-iob18-pips 30_60 31_49 31_53
RIOI_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK3 origin:037-iob18-pips 30_60 31_47 31_53
RIOI_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK4 origin:037-iob18-pips 30_48 30_52 30_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_LEAF_GCLK5 origin:037-iob18-pips 30_46 30_52 30_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO0 origin:037-iob18-pips 30_52 30_60 31_49
RIOI_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO1 origin:037-iob18-pips 30_52 30_60 31_47
RIOI_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO2 origin:037-iob18-pips 30_48 30_60 31_51
RIOI_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO3 origin:037-iob18-pips 30_46 30_60 31_51
RIOI_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IMUX20_0 origin:037-iob18-pips 30_50 30_60 31_47
RIOI_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IMUX22_0 origin:037-iob18-pips 30_50 30_60 31_49
RIOI_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK0 origin:037-iob18-pips 30_60 31_49 31_51
RIOI_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK1 origin:037-iob18-pips 30_60 31_47 31_51
RIOI_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK2 origin:037-iob18-pips 30_48 30_50 30_60
RIOI_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK3 origin:037-iob18-pips 30_46 30_50 30_60
RIOI_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK0 origin:037-iob18-pips 28_111 29_118 29_124 30_118 30_124 31_111
RIOI_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK1 origin:037-iob18-pips 28_111 29_118 29_126 30_118 30_126 31_111
RIOI_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK2 origin:037-iob18-pips 28_111 28_123 29_118 30_118 31_111 31_123
RIOI_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK3 origin:037-iob18-pips 28_111 28_125 29_118 30_118 31_111 31_125
RIOI_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK4 origin:037-iob18-pips 28_111 28_119 29_124 30_124 31_111 31_119
RIOI_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_LEAF_GCLK5 origin:037-iob18-pips 28_111 28_119 29_126 30_126 31_111 31_119
RIOI_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO0 origin:037-iob18-pips 28_111 28_119 28_123 31_111 31_119 31_123
RIOI_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO1 origin:037-iob18-pips 28_111 28_119 28_125 31_111 31_119 31_125
RIOI_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO2 origin:037-iob18-pips 28_111 28_121 29_124 30_124 31_111 31_121
RIOI_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_RCLK_FORIO3 origin:037-iob18-pips 28_111 28_121 29_126 30_126 31_111 31_121
RIOI_TBYTETERM.IOI_OLOGIC0_CLKDIV.IOI_IMUX8_1 origin:037-iob18-pips 28_111 28_121 28_123 31_111 31_121 31_123
RIOI_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK0 origin:037-iob18-pips 28_03 28_09 29_16 30_16 31_03 31_09
RIOI_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK1 origin:037-iob18-pips 28_01 28_09 29_16 30_16 31_01 31_09
RIOI_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK2 origin:037-iob18-pips 28_09 29_04 29_16 30_04 30_16 31_09
RIOI_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK3 origin:037-iob18-pips 28_09 29_02 29_16 30_02 30_16 31_09
RIOI_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK4 origin:037-iob18-pips 28_03 29_08 29_16 30_08 30_16 31_03
RIOI_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_LEAF_GCLK5 origin:037-iob18-pips 28_01 29_08 29_16 30_08 30_16 31_01
RIOI_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO0 origin:037-iob18-pips 29_04 29_08 29_16 30_04 30_08 30_16
RIOI_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO1 origin:037-iob18-pips 29_02 29_08 29_16 30_02 30_08 30_16
RIOI_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO2 origin:037-iob18-pips 28_03 29_06 29_16 30_06 30_16 31_03
RIOI_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_RCLK_FORIO3 origin:037-iob18-pips 28_01 29_06 29_16 30_06 30_16 31_01
RIOI_TBYTETERM.IOI_OLOGIC1_CLKDIV.IOI_IMUX8_0 origin:037-iob18-pips 29_04 29_06 29_16 30_04 30_06 30_16
RIOI_TBYTETERM.ODELAY_Y0.CINVCTRL_SEL origin:035a-iob18-odelay 37_89
RIOI_TBYTETERM.ODELAY_Y0.HIGH_PERFORMANCE_MODE origin:035a-iob18-odelay 34_109
RIOI_TBYTETERM.ODELAY_Y0.IN_USE origin:035a-iob18-odelay 34_73 36_72 39_75
RIOI_TBYTETERM.ODELAY_Y0.IS_C_INVERTED origin:035a-iob18-odelay 36_88
RIOI_TBYTETERM.ODELAY_Y0.ODELAY_TYPE_VAR_LOAD origin:035a-iob18-odelay 37_113 37_119
RIOI_TBYTETERM.ODELAY_Y0.ODELAY_TYPE_VARIABLE origin:035a-iob18-odelay 37_119
RIOI_TBYTETERM.ODELAY_Y0.ODELAY_VALUE[0] origin:035a-iob18-odelay 36_122
RIOI_TBYTETERM.ODELAY_Y0.ODELAY_VALUE[1] origin:035a-iob18-odelay 36_116
RIOI_TBYTETERM.ODELAY_Y0.ODELAY_VALUE[2] origin:035a-iob18-odelay 36_110
RIOI_TBYTETERM.ODELAY_Y0.ODELAY_VALUE[3] origin:035a-iob18-odelay 36_102
RIOI_TBYTETERM.ODELAY_Y0.ODELAY_VALUE[4] origin:035a-iob18-odelay 36_96
RIOI_TBYTETERM.ODELAY_Y0.ZINV_ODATAIN origin:035a-iob18-odelay 35_72
RIOI_TBYTETERM.ODELAY_Y0.ZODELAY_VALUE[0] origin:035a-iob18-odelay 36_120
RIOI_TBYTETERM.ODELAY_Y0.ZODELAY_VALUE[1] origin:035a-iob18-odelay 36_114
RIOI_TBYTETERM.ODELAY_Y0.ZODELAY_VALUE[2] origin:035a-iob18-odelay 36_108
RIOI_TBYTETERM.ODELAY_Y0.ZODELAY_VALUE[3] origin:035a-iob18-odelay 36_100
RIOI_TBYTETERM.ODELAY_Y0.ZODELAY_VALUE[4] origin:035a-iob18-odelay 36_94
RIOI_TBYTETERM.ODELAY_Y1.CINVCTRL_SEL origin:035a-iob18-odelay 36_38
RIOI_TBYTETERM.ODELAY_Y1.HIGH_PERFORMANCE_MODE origin:035a-iob18-odelay 35_18
RIOI_TBYTETERM.ODELAY_Y1.IN_USE origin:035a-iob18-odelay 35_54 37_55 38_52
RIOI_TBYTETERM.ODELAY_Y1.IS_C_INVERTED origin:035a-iob18-odelay 37_39
RIOI_TBYTETERM.ODELAY_Y1.ODELAY_TYPE_VAR_LOAD origin:035a-iob18-odelay 36_08 36_14
RIOI_TBYTETERM.ODELAY_Y1.ODELAY_TYPE_VARIABLE origin:035a-iob18-odelay 36_08
RIOI_TBYTETERM.ODELAY_Y1.ODELAY_VALUE[0] origin:035a-iob18-odelay 37_05
RIOI_TBYTETERM.ODELAY_Y1.ODELAY_VALUE[1] origin:035a-iob18-odelay 37_11
RIOI_TBYTETERM.ODELAY_Y1.ODELAY_VALUE[2] origin:035a-iob18-odelay 37_17
RIOI_TBYTETERM.ODELAY_Y1.ODELAY_VALUE[3] origin:035a-iob18-odelay 37_25
RIOI_TBYTETERM.ODELAY_Y1.ODELAY_VALUE[4] origin:035a-iob18-odelay 37_31
RIOI_TBYTETERM.ODELAY_Y1.ZINV_ODATAIN origin:035a-iob18-odelay 34_55
RIOI_TBYTETERM.ODELAY_Y1.ZODELAY_VALUE[0] origin:035a-iob18-odelay 37_07
RIOI_TBYTETERM.ODELAY_Y1.ZODELAY_VALUE[1] origin:035a-iob18-odelay 37_13
RIOI_TBYTETERM.ODELAY_Y1.ZODELAY_VALUE[2] origin:035a-iob18-odelay 37_19
RIOI_TBYTETERM.ODELAY_Y1.ZODELAY_VALUE[3] origin:035a-iob18-odelay 37_27
RIOI_TBYTETERM.ODELAY_Y1.ZODELAY_VALUE[4] origin:035a-iob18-odelay 37_33
RIOI_TBYTETERM.OLOGIC_Y0.IS_CLKDIV_INVERTED origin:036-iob18-ologic 30_85
RIOI_TBYTETERM.OLOGIC_Y0.IS_D1_INVERTED origin:036-iob18-ologic 30_97
RIOI_TBYTETERM.OLOGIC_Y0.IS_D2_INVERTED origin:036-iob18-ologic 31_102
RIOI_TBYTETERM.OLOGIC_Y0.IS_D3_INVERTED origin:036-iob18-ologic 31_106
RIOI_TBYTETERM.OLOGIC_Y0.IS_D4_INVERTED origin:036-iob18-ologic 31_110
RIOI_TBYTETERM.OLOGIC_Y0.IS_D5_INVERTED origin:036-iob18-ologic 30_113
RIOI_TBYTETERM.OLOGIC_Y0.IS_D6_INVERTED origin:036-iob18-ologic 31_114
RIOI_TBYTETERM.OLOGIC_Y0.IS_D7_INVERTED origin:036-iob18-ologic 31_118
RIOI_TBYTETERM.OLOGIC_Y0.IS_D8_INVERTED origin:036-iob18-ologic 30_125
RIOI_TBYTETERM.OLOGIC_Y0.ODDR.DDR_CLK_EDGE.SAME_EDGE origin:036-iob18-ologic 31_92
RIOI_TBYTETERM.OLOGIC_Y0.ODDR.SRUSED origin:036-iob18-ologic 32_112
RIOI_TBYTETERM.OLOGIC_Y0.ODDR_TDDR.IN_USE origin:036-iob18-ologic 31_83
RIOI_TBYTETERM.OLOGIC_Y0.OMUX.D1 origin:036-iob18-ologic 33_111
RIOI_TBYTETERM.OLOGIC_Y0.OQUSED origin:036-iob18-ologic 31_86
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.DATA_RATE_OQ.DDR origin:036-iob18-ologic !33_93 33_91
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.DATA_RATE_OQ.SDR origin:036-iob18-ologic !33_91 33_93
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.DATA_RATE_TQ.BUF origin:036-iob18-ologic !32_70 !33_69 32_66
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.DATA_RATE_TQ.DDR origin:036-iob18-ologic !32_66 !33_69 32_70
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.DATA_RATE_TQ.SDR origin:036-iob18-ologic !32_66 !32_70 33_69
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.DATA_WIDTH.DDR.W4 origin:036-iob18-ologic !30_121 !30_123 !30_127 !30_95 !31_100 !31_116 !31_120 !31_126 30_99 31_124 33_73
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.DATA_WIDTH.DDR.W6 origin:036-iob18-ologic !30_121 !30_123 !30_127 !30_99 !31_100 !31_116 !31_124 !31_126 30_95 31_120 33_73
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.DATA_WIDTH.DDR.W8 origin:036-iob18-ologic !30_121 !30_123 !30_127 !31_100 !31_120 !31_124 !31_126 30_95 30_99 31_116 33_73
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W2 origin:036-iob18-ologic !30_121 !30_123 !30_95 !31_100 !31_116 !31_120 !31_124 !31_126 !33_91 30_127 30_99 33_73 33_93
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W3 origin:036-iob18-ologic !30_121 !30_123 !30_127 !30_99 !31_100 !31_116 !31_120 !31_124 !33_91 30_95 31_126 33_73 33_93
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W4 origin:036-iob18-ologic !30_121 !30_123 !30_127 !31_100 !31_116 !31_120 !31_126 !33_91 30_95 30_99 31_124 33_73 33_93
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W5 origin:036-iob18-ologic !30_123 !30_127 !30_95 !31_100 !31_116 !31_120 !31_124 !31_126 !33_91 30_121 30_99 31_98 33_73 33_93
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W6 origin:036-iob18-ologic !30_121 !30_123 !30_127 !30_95 !31_116 !31_124 !31_126 !33_91 30_99 31_100 31_120 31_98 33_73 33_93
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W7 origin:036-iob18-ologic !30_121 !30_127 !30_95 !30_99 !31_116 !31_120 !31_124 !31_126 !33_91 30_123 31_100 31_98 33_73 33_93
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.DATA_WIDTH.SDR.W8 origin:036-iob18-ologic !30_121 !30_123 !30_127 !30_95 !30_99 !31_120 !31_124 !31_126 !33_91 31_100 31_116 31_98 33_73 33_93
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.IN_USE origin:036-iob18-ologic 33_73
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.SERDES_MODE.SLAVE origin:036-iob18-ologic 33_83
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.SRTYPE.SYNC origin:036-iob18-ologic 32_94
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.TRISTATE_WIDTH.W4 origin:036-iob18-ologic 32_90
RIOI_TBYTETERM.OLOGIC_Y0.OSERDES.TSRTYPE.SYNC origin:036-iob18-ologic 32_72
RIOI_TBYTETERM.OLOGIC_Y0.TDDR.SRUSED origin:036-iob18-ologic 33_89
RIOI_TBYTETERM.OLOGIC_Y0.ZINIT_OQ origin:036-iob18-ologic 33_97
RIOI_TBYTETERM.OLOGIC_Y0.ZINIT_TQ origin:036-iob18-ologic 30_75
RIOI_TBYTETERM.OLOGIC_Y0.ZINV_CLK origin:036-iob18-ologic 31_90
RIOI_TBYTETERM.OLOGIC_Y0.ZINV_T1 origin:036-iob18-ologic 30_67
RIOI_TBYTETERM.OLOGIC_Y0.ZINV_T2 origin:036-iob18-ologic 30_71
RIOI_TBYTETERM.OLOGIC_Y0.ZINV_T3 origin:036-iob18-ologic 31_76
RIOI_TBYTETERM.OLOGIC_Y0.ZINV_T4 origin:036-iob18-ologic 30_79
RIOI_TBYTETERM.OLOGIC_Y0.ZSRVAL_OQ origin:036-iob18-ologic 32_108 33_107 33_95
RIOI_TBYTETERM.OLOGIC_Y0.ZSRVAL_TQ origin:036-iob18-ologic 32_82 33_75 33_81
RIOI_TBYTETERM.OLOGIC_Y1.IS_CLKDIV_INVERTED origin:036-iob18-ologic 31_42
RIOI_TBYTETERM.OLOGIC_Y1.IS_D1_INVERTED origin:036-iob18-ologic 31_30
RIOI_TBYTETERM.OLOGIC_Y1.IS_D2_INVERTED origin:036-iob18-ologic 30_25
RIOI_TBYTETERM.OLOGIC_Y1.IS_D3_INVERTED origin:036-iob18-ologic 30_21
RIOI_TBYTETERM.OLOGIC_Y1.IS_D4_INVERTED origin:036-iob18-ologic 30_17
RIOI_TBYTETERM.OLOGIC_Y1.IS_D5_INVERTED origin:036-iob18-ologic 31_14
RIOI_TBYTETERM.OLOGIC_Y1.IS_D6_INVERTED origin:036-iob18-ologic 30_13
RIOI_TBYTETERM.OLOGIC_Y1.IS_D7_INVERTED origin:036-iob18-ologic 30_09
RIOI_TBYTETERM.OLOGIC_Y1.IS_D8_INVERTED origin:036-iob18-ologic 31_02
RIOI_TBYTETERM.OLOGIC_Y1.ODDR.DDR_CLK_EDGE.SAME_EDGE origin:036-iob18-ologic 30_35
RIOI_TBYTETERM.OLOGIC_Y1.ODDR.SRUSED origin:036-iob18-ologic 33_15
RIOI_TBYTETERM.OLOGIC_Y1.ODDR_TDDR.IN_USE origin:036-iob18-ologic 30_44
RIOI_TBYTETERM.OLOGIC_Y1.OMUX.D1 origin:036-iob18-ologic 32_16
RIOI_TBYTETERM.OLOGIC_Y1.OQUSED origin:036-iob18-ologic 30_41
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.DATA_RATE_OQ.DDR origin:036-iob18-ologic !32_34 32_36
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.DATA_RATE_OQ.SDR origin:036-iob18-ologic !32_36 32_34
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.DATA_RATE_TQ.BUF origin:036-iob18-ologic !32_58 !33_57 33_61
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.DATA_RATE_TQ.DDR origin:036-iob18-ologic !32_58 !33_61 33_57
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.DATA_RATE_TQ.SDR origin:036-iob18-ologic !33_57 !33_61 32_58
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.DATA_WIDTH.DDR.W4 origin:036-iob18-ologic !30_01 !30_07 !30_11 !30_27 !30_29 !31_00 !31_04 !31_06 !31_32 30_03 31_28 32_54
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.DATA_WIDTH.DDR.W6 origin:036-iob18-ologic !30_01 !30_03 !30_11 !30_27 !30_29 !31_00 !31_04 !31_06 !31_28 30_07 31_32 32_54
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.DATA_WIDTH.DDR.W8 origin:036-iob18-ologic !30_01 !30_03 !30_07 !30_27 !30_29 !31_00 !31_04 !31_06 30_11 31_28 31_32 32_54
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W2 origin:036-iob18-ologic !30_01 !30_03 !30_07 !30_11 !30_27 !30_29 !31_04 !31_06 !31_32 !32_36 31_00 31_28 32_34 32_54
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W3 origin:036-iob18-ologic !30_03 !30_07 !30_11 !30_27 !30_29 !31_00 !31_04 !31_06 !31_28 !32_36 30_01 31_32 32_34 32_54
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W4 origin:036-iob18-ologic !30_01 !30_07 !30_11 !30_27 !30_29 !31_00 !31_04 !31_06 !32_36 30_03 31_28 31_32 32_34 32_54
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W5 origin:036-iob18-ologic !30_01 !30_03 !30_07 !30_11 !30_27 !31_00 !31_04 !31_32 !32_36 30_29 31_06 31_28 32_34 32_54
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W6 origin:036-iob18-ologic !30_01 !30_03 !30_11 !31_00 !31_04 !31_06 !31_32 !32_36 30_07 30_27 30_29 31_28 32_34 32_54
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W7 origin:036-iob18-ologic !30_01 !30_03 !30_07 !30_11 !31_00 !31_06 !31_28 !31_32 !32_36 30_27 30_29 31_04 32_34 32_54
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.DATA_WIDTH.SDR.W8 origin:036-iob18-ologic !30_01 !30_03 !30_07 !31_00 !31_04 !31_06 !31_28 !31_32 !32_36 30_11 30_27 30_29 32_34 32_54
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.IN_USE origin:036-iob18-ologic 32_54
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.SERDES_MODE.SLAVE origin:036-iob18-ologic 32_44
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.SRTYPE.SYNC origin:036-iob18-ologic 33_33
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.TRISTATE_WIDTH.W4 origin:036-iob18-ologic 33_37
RIOI_TBYTETERM.OLOGIC_Y1.OSERDES.TSRTYPE.SYNC origin:036-iob18-ologic 33_55
RIOI_TBYTETERM.OLOGIC_Y1.TDDR.SRUSED origin:036-iob18-ologic 32_38
RIOI_TBYTETERM.OLOGIC_Y1.ZINIT_OQ origin:036-iob18-ologic 32_30
RIOI_TBYTETERM.OLOGIC_Y1.ZINIT_TQ origin:036-iob18-ologic 31_52
RIOI_TBYTETERM.OLOGIC_Y1.ZINV_CLK origin:036-iob18-ologic 30_37
RIOI_TBYTETERM.OLOGIC_Y1.ZINV_T1 origin:036-iob18-ologic 31_60
RIOI_TBYTETERM.OLOGIC_Y1.ZINV_T2 origin:036-iob18-ologic 31_56
RIOI_TBYTETERM.OLOGIC_Y1.ZINV_T3 origin:036-iob18-ologic 30_51
RIOI_TBYTETERM.OLOGIC_Y1.ZINV_T4 origin:036-iob18-ologic 31_48
RIOI_TBYTETERM.OLOGIC_Y1.ZSRVAL_OQ origin:036-iob18-ologic 32_20 32_32 33_19
RIOI_TBYTETERM.OLOGIC_Y1.ZSRVAL_TQ origin:036-iob18-ologic 32_46 32_52 33_45

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{
"site_pins": {
"BGBYPASSB": {
"direction": "IN"
},
"BGMONITORENB": {
"direction": "IN"
},
"BGPDB": {
"direction": "IN"
},
"BGRCALOVRD0": {
"direction": "IN"
},
"BGRCALOVRD1": {
"direction": "IN"
},
"BGRCALOVRD2": {
"direction": "IN"
},
"BGRCALOVRD3": {
"direction": "IN"
},
"BGRCALOVRD4": {
"direction": "IN"
},
"DRPADDR0": {
"direction": "IN"
},
"DRPADDR1": {
"direction": "IN"
},
"DRPADDR2": {
"direction": "IN"
},
"DRPADDR3": {
"direction": "IN"
},
"DRPADDR4": {
"direction": "IN"
},
"DRPADDR5": {
"direction": "IN"
},
"DRPADDR6": {
"direction": "IN"
},
"DRPADDR7": {
"direction": "IN"
},
"DRPCLK": {
"direction": "IN"
},
"DRPDI0": {
"direction": "IN"
},
"DRPDI1": {
"direction": "IN"
},
"DRPDI2": {
"direction": "IN"
},
"DRPDI3": {
"direction": "IN"
},
"DRPDI4": {
"direction": "IN"
},
"DRPDI5": {
"direction": "IN"
},
"DRPDI6": {
"direction": "IN"
},
"DRPDI7": {
"direction": "IN"
},
"DRPDI8": {
"direction": "IN"
},
"DRPDI9": {
"direction": "IN"
},
"DRPDI10": {
"direction": "IN"
},
"DRPDI11": {
"direction": "IN"
},
"DRPDI12": {
"direction": "IN"
},
"DRPDI13": {
"direction": "IN"
},
"DRPDI14": {
"direction": "IN"
},
"DRPDI15": {
"direction": "IN"
},
"DRPDO0": {
"direction": "OUT"
},
"DRPDO1": {
"direction": "OUT"
},
"DRPDO2": {
"direction": "OUT"
},
"DRPDO3": {
"direction": "OUT"
},
"DRPDO4": {
"direction": "OUT"
},
"DRPDO5": {
"direction": "OUT"
},
"DRPDO6": {
"direction": "OUT"
},
"DRPDO7": {
"direction": "OUT"
},
"DRPDO8": {
"direction": "OUT"
},
"DRPDO9": {
"direction": "OUT"
},
"DRPDO10": {
"direction": "OUT"
},
"DRPDO11": {
"direction": "OUT"
},
"DRPDO12": {
"direction": "OUT"
},
"DRPDO13": {
"direction": "OUT"
},
"DRPDO14": {
"direction": "OUT"
},
"DRPDO15": {
"direction": "OUT"
},
"DRPEN": {
"direction": "IN"
},
"DRPRDY": {
"direction": "OUT"
},
"DRPWE": {
"direction": "IN"
},
"GTGREFCLK": {
"direction": "IN"
},
"GTNORTHREFCLK0": {
"direction": "IN"
},
"GTNORTHREFCLK1": {
"direction": "IN"
},
"GTREFCLK0": {
"direction": "IN"
},
"GTREFCLK1": {
"direction": "IN"
},
"GTSOUTHREFCLK0": {
"direction": "IN"
},
"GTSOUTHREFCLK1": {
"direction": "IN"
},
"PMARSVD0": {
"direction": "IN"
},
"PMARSVD1": {
"direction": "IN"
},
"PMARSVD2": {
"direction": "IN"
},
"PMARSVD3": {
"direction": "IN"
},
"PMARSVD4": {
"direction": "IN"
},
"PMARSVD5": {
"direction": "IN"
},
"PMARSVD6": {
"direction": "IN"
},
"PMARSVD7": {
"direction": "IN"
},
"PMASCANCLK0": {
"direction": "IN"
},
"PMASCANCLK1": {
"direction": "IN"
},
"PMASCANENB": {
"direction": "IN"
},
"PMASCANIN0": {
"direction": "IN"
},
"PMASCANIN1": {
"direction": "IN"
},
"PMASCANIN2": {
"direction": "IN"
},
"PMASCANIN3": {
"direction": "IN"
},
"PMASCANIN4": {
"direction": "IN"
},
"PMASCANOUT0": {
"direction": "OUT"
},
"PMASCANOUT1": {
"direction": "OUT"
},
"PMASCANOUT2": {
"direction": "OUT"
},
"PMASCANOUT3": {
"direction": "OUT"
},
"PMASCANOUT4": {
"direction": "OUT"
},
"QDPMASCANMODEB": {
"direction": "IN"
},
"QDPMASCANRSTEN": {
"direction": "IN"
},
"QPLLCLKSPARE0": {
"direction": "IN"
},
"QPLLCLKSPARE1": {
"direction": "IN"
},
"QPLLDMONITOR0": {
"direction": "OUT"
},
"QPLLDMONITOR1": {
"direction": "OUT"
},
"QPLLDMONITOR2": {
"direction": "OUT"
},
"QPLLDMONITOR3": {
"direction": "OUT"
},
"QPLLDMONITOR4": {
"direction": "OUT"
},
"QPLLDMONITOR5": {
"direction": "OUT"
},
"QPLLDMONITOR6": {
"direction": "OUT"
},
"QPLLDMONITOR7": {
"direction": "OUT"
},
"QPLLFBCLKLOST": {
"direction": "OUT"
},
"QPLLLOCK": {
"direction": "OUT"
},
"QPLLLOCKDETCLK": {
"direction": "IN"
},
"QPLLLOCKEN": {
"direction": "IN"
},
"QPLLOUTCLK": {
"direction": "OUT"
},
"QPLLOUTREFCLK": {
"direction": "OUT"
},
"QPLLOUTRESET": {
"direction": "IN"
},
"QPLLPD": {
"direction": "IN"
},
"QPLLREFCLKLOST": {
"direction": "OUT"
},
"QPLLREFCLKSEL0": {
"direction": "IN"
},
"QPLLREFCLKSEL1": {
"direction": "IN"
},
"QPLLREFCLKSEL2": {
"direction": "IN"
},
"QPLLRESET": {
"direction": "IN"
},
"QPLLRSVD10": {
"direction": "IN"
},
"QPLLRSVD11": {
"direction": "IN"
},
"QPLLRSVD12": {
"direction": "IN"
},
"QPLLRSVD13": {
"direction": "IN"
},
"QPLLRSVD14": {
"direction": "IN"
},
"QPLLRSVD15": {
"direction": "IN"
},
"QPLLRSVD16": {
"direction": "IN"
},
"QPLLRSVD17": {
"direction": "IN"
},
"QPLLRSVD18": {
"direction": "IN"
},
"QPLLRSVD19": {
"direction": "IN"
},
"QPLLRSVD20": {
"direction": "IN"
},
"QPLLRSVD21": {
"direction": "IN"
},
"QPLLRSVD22": {
"direction": "IN"
},
"QPLLRSVD23": {
"direction": "IN"
},
"QPLLRSVD24": {
"direction": "IN"
},
"QPLLRSVD110": {
"direction": "IN"
},
"QPLLRSVD111": {
"direction": "IN"
},
"QPLLRSVD112": {
"direction": "IN"
},
"QPLLRSVD113": {
"direction": "IN"
},
"QPLLRSVD114": {
"direction": "IN"
},
"QPLLRSVD115": {
"direction": "IN"
},
"RCALENB": {
"direction": "IN"
},
"REFCLKOUTMONITOR": {
"direction": "OUT"
}
},
"site_pips": {
"DRPCLKINV:DRPCLK": {
"from_pin": "DRPCLK",
"to_pin": "OUT"
},
"DRPCLKINV:DRPCLK_B": {
"from_pin": "DRPCLK_B",
"to_pin": "OUT"
},
"GTGREFCLKINV:GTGREFCLK": {
"from_pin": "GTGREFCLK",
"to_pin": "OUT"
},
"GTGREFCLKINV:GTGREFCLK_B": {
"from_pin": "GTGREFCLK_B",
"to_pin": "OUT"
},
"PMASCANCLK0INV:PMASCANCLK0": {
"from_pin": "PMASCANCLK0",
"to_pin": "OUT"
},
"PMASCANCLK0INV:PMASCANCLK0_B": {
"from_pin": "PMASCANCLK0_B",
"to_pin": "OUT"
},
"PMASCANCLK1INV:PMASCANCLK1": {
"from_pin": "PMASCANCLK1",
"to_pin": "OUT"
},
"PMASCANCLK1INV:PMASCANCLK1_B": {
"from_pin": "PMASCANCLK1_B",
"to_pin": "OUT"
},
"QPLLCLKSPARE0INV:QPLLCLKSPARE0": {
"from_pin": "QPLLCLKSPARE0",
"to_pin": "OUT"
},
"QPLLCLKSPARE0INV:QPLLCLKSPARE0_B": {
"from_pin": "QPLLCLKSPARE0_B",
"to_pin": "OUT"
},
"QPLLCLKSPARE1INV:QPLLCLKSPARE1": {
"from_pin": "QPLLCLKSPARE1",
"to_pin": "OUT"
},
"QPLLCLKSPARE1INV:QPLLCLKSPARE1_B": {
"from_pin": "QPLLCLKSPARE1_B",
"to_pin": "OUT"
},
"QPLLLOCKDETCLKINV:QPLLLOCKDETCLK": {
"from_pin": "QPLLLOCKDETCLK",
"to_pin": "OUT"
},
"QPLLLOCKDETCLKINV:QPLLLOCKDETCLK_B": {
"from_pin": "QPLLLOCKDETCLK_B",
"to_pin": "OUT"
}
},
"type": "GTXE2_COMMON"
}

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@ -0,0 +1,33 @@
{
"site_pins": {
"CEB": {
"direction": "IN"
},
"CLKTESTSIG": {
"direction": "IN"
},
"I": {
"direction": "IN"
},
"IB": {
"direction": "IN"
},
"O": {
"direction": "OUT"
},
"ODIV2": {
"direction": "OUT"
}
},
"site_pips": {
"CLKTESTSIGINV:CLKTESTSIG": {
"from_pin": "CLKTESTSIG",
"to_pin": "OUT"
},
"CLKTESTSIGINV:CLKTESTSIG_B": {
"from_pin": "CLKTESTSIG_B",
"to_pin": "OUT"
}
},
"type": "IBUFDS_GTE2"
}

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@ -0,0 +1,100 @@
{
"site_pins": {
"C": {
"direction": "IN"
},
"CE": {
"direction": "IN"
},
"CINVCTRL": {
"direction": "IN"
},
"CNTVALUEIN0": {
"direction": "IN"
},
"CNTVALUEIN1": {
"direction": "IN"
},
"CNTVALUEIN2": {
"direction": "IN"
},
"CNTVALUEIN3": {
"direction": "IN"
},
"CNTVALUEIN4": {
"direction": "IN"
},
"CNTVALUEOUT0": {
"direction": "OUT"
},
"CNTVALUEOUT1": {
"direction": "OUT"
},
"CNTVALUEOUT2": {
"direction": "OUT"
},
"CNTVALUEOUT3": {
"direction": "OUT"
},
"CNTVALUEOUT4": {
"direction": "OUT"
},
"DATAIN": {
"direction": "IN"
},
"DATAOUT": {
"direction": "OUT"
},
"IDATAIN": {
"direction": "IN"
},
"IFDLY0": {
"direction": "IN"
},
"IFDLY1": {
"direction": "IN"
},
"IFDLY2": {
"direction": "IN"
},
"INC": {
"direction": "IN"
},
"LD": {
"direction": "IN"
},
"LDPIPEEN": {
"direction": "IN"
},
"REGRST": {
"direction": "IN"
}
},
"site_pips": {
"CINV:C": {
"from_pin": "C",
"to_pin": "OUT"
},
"CINV:C_B": {
"from_pin": "C_B",
"to_pin": "OUT"
},
"DATAININV:DATAIN": {
"from_pin": "DATAIN",
"to_pin": "OUT"
},
"DATAININV:DATAIN_B": {
"from_pin": "DATAIN_B",
"to_pin": "OUT"
},
"IDATAININV:IDATAIN": {
"from_pin": "IDATAIN",
"to_pin": "OUT"
},
"IDATAININV:IDATAIN_B": {
"from_pin": "IDATAIN_B",
"to_pin": "OUT"
}
},
"type": "IDELAYE2_FINEDELAY"
}

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@ -0,0 +1,184 @@
{
"site_pins": {
"BITSLIP": {
"direction": "IN"
},
"CE1": {
"direction": "IN"
},
"CE2": {
"direction": "IN"
},
"CLK": {
"direction": "IN"
},
"CLKB": {
"direction": "IN"
},
"CLKDIV": {
"direction": "IN"
},
"CLKDIVP": {
"direction": "IN"
},
"D": {
"direction": "IN"
},
"DDLY": {
"direction": "IN"
},
"DYNCLKDIVPSEL": {
"direction": "IN"
},
"DYNCLKDIVSEL": {
"direction": "IN"
},
"DYNCLKSEL": {
"direction": "IN"
},
"O": {
"direction": "OUT"
},
"OCLK": {
"direction": "IN"
},
"OCLKB": {
"direction": "IN"
},
"OFB": {
"direction": "IN"
},
"Q1": {
"direction": "OUT"
},
"Q2": {
"direction": "OUT"
},
"Q3": {
"direction": "OUT"
},
"Q4": {
"direction": "OUT"
},
"Q5": {
"direction": "OUT"
},
"Q6": {
"direction": "OUT"
},
"Q7": {
"direction": "OUT"
},
"Q8": {
"direction": "OUT"
},
"REV": {
"direction": "IN"
},
"SHIFTIN1": {
"direction": "IN"
},
"SHIFTIN2": {
"direction": "IN"
},
"SHIFTOUT1": {
"direction": "OUT"
},
"SHIFTOUT2": {
"direction": "OUT"
},
"SR": {
"direction": "IN"
},
"TFB": {
"direction": "IN"
}
},
"site_pips": {
"CE1USED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"CLKBINV:CLKB": {
"from_pin": "CLKB",
"to_pin": "OUT"
},
"CLKBINV:CLKB_B": {
"from_pin": "CLKB_B",
"to_pin": "OUT"
},
"CLKINV:CLK": {
"from_pin": "CLK",
"to_pin": "OUT"
},
"CLKINV:CLK_B": {
"from_pin": "CLK_B",
"to_pin": "OUT"
},
"D2OBYP_SEL:GND": {
"from_pin": "GND",
"to_pin": "OUT"
},
"D2OBYP_SEL:T": {
"from_pin": "T",
"to_pin": "OUT"
},
"D2OFFBYP_SEL:GND": {
"from_pin": "GND",
"to_pin": "OUT"
},
"D2OFFBYP_SEL:T": {
"from_pin": "T",
"to_pin": "OUT"
},
"DINV:D": {
"from_pin": "D",
"to_pin": "OUT"
},
"DINV:D_B": {
"from_pin": "D_B",
"to_pin": "OUT"
},
"IDELMUX:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"IDELMUX:1": {
"from_pin": "1",
"to_pin": "OUT"
},
"IFFDELMUX:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"IFFDELMUX:1": {
"from_pin": "1",
"to_pin": "OUT"
},
"IFFMUX:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"IFFMUX:1": {
"from_pin": "1",
"to_pin": "OUT"
},
"IMUX:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"IMUX:1": {
"from_pin": "1",
"to_pin": "OUT"
},
"REVUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"SRUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
}
},
"type": "ILOGICE2"
}

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@ -0,0 +1,94 @@
{
"site_pins": {
"DCITERMDISABLE": {
"direction": "IN"
},
"DIFFI_IN": {
"direction": "IN"
},
"DIFFO_IN": {
"direction": "IN"
},
"DIFFO_OUT": {
"direction": "OUT"
},
"DIFF_TERM_INT_EN": {
"direction": "IN"
},
"I": {
"direction": "OUT"
},
"IBUFDISABLE": {
"direction": "IN"
},
"KEEPER_INT_EN": {
"direction": "IN"
},
"O": {
"direction": "IN"
},
"O_IN": {
"direction": "IN"
},
"O_OUT": {
"direction": "OUT"
},
"PADOUT": {
"direction": "OUT"
},
"PD_INT_EN": {
"direction": "IN"
},
"PU_INT_EN": {
"direction": "IN"
},
"T": {
"direction": "IN"
},
"T_IN": {
"direction": "IN"
},
"T_OUT": {
"direction": "OUT"
}
},
"site_pips": {
"DCITERMDISABLE_SEL:GND": {
"from_pin": "GND",
"to_pin": "OUT"
},
"DCITERMDISABLE_SEL:I": {
"from_pin": "I",
"to_pin": "OUT"
},
"DIFFI_INUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"IBUFDISABLE_SEL:GND": {
"from_pin": "GND",
"to_pin": "OUT"
},
"IBUFDISABLE_SEL:I": {
"from_pin": "I",
"to_pin": "OUT"
},
"IUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"OUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"PADOUTUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"TUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
}
},
"type": "IOB18"
}

106
zynq7/site_type_IOB18M.json Normal file
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@ -0,0 +1,106 @@
{
"site_pins": {
"DCITERMDISABLE": {
"direction": "IN"
},
"DIFFI_IN": {
"direction": "IN"
},
"DIFFO_IN": {
"direction": "IN"
},
"DIFFO_OUT": {
"direction": "OUT"
},
"DIFF_TERM_INT_EN": {
"direction": "IN"
},
"I": {
"direction": "OUT"
},
"IBUFDISABLE": {
"direction": "IN"
},
"KEEPER_INT_EN": {
"direction": "IN"
},
"O": {
"direction": "IN"
},
"O_IN": {
"direction": "IN"
},
"O_OUT": {
"direction": "OUT"
},
"PADOUT": {
"direction": "OUT"
},
"PD_INT_EN": {
"direction": "IN"
},
"PU_INT_EN": {
"direction": "IN"
},
"T": {
"direction": "IN"
},
"T_IN": {
"direction": "IN"
},
"T_OUT": {
"direction": "OUT"
}
},
"site_pips": {
"DCITERMDISABLE_SEL:GND": {
"from_pin": "GND",
"to_pin": "OUT"
},
"DCITERMDISABLE_SEL:I": {
"from_pin": "I",
"to_pin": "OUT"
},
"DIFFI_INUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"DIFFO_OUTUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"IBUFDISABLE_SEL:GND": {
"from_pin": "GND",
"to_pin": "OUT"
},
"IBUFDISABLE_SEL:I": {
"from_pin": "I",
"to_pin": "OUT"
},
"IUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"OUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"O_OUTUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"PADOUTUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"TUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"T_OUTUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
}
},
"type": "IOB18M"
}

114
zynq7/site_type_IOB18S.json Normal file
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@ -0,0 +1,114 @@
{
"site_pins": {
"DCITERMDISABLE": {
"direction": "IN"
},
"DIFFI_IN": {
"direction": "IN"
},
"DIFFO_IN": {
"direction": "IN"
},
"DIFFO_OUT": {
"direction": "OUT"
},
"DIFF_TERM_INT_EN": {
"direction": "IN"
},
"I": {
"direction": "OUT"
},
"IBUFDISABLE": {
"direction": "IN"
},
"KEEPER_INT_EN": {
"direction": "IN"
},
"O": {
"direction": "IN"
},
"O_IN": {
"direction": "IN"
},
"O_OUT": {
"direction": "OUT"
},
"PADOUT": {
"direction": "OUT"
},
"PD_INT_EN": {
"direction": "IN"
},
"PU_INT_EN": {
"direction": "IN"
},
"T": {
"direction": "IN"
},
"T_IN": {
"direction": "IN"
},
"T_OUT": {
"direction": "OUT"
}
},
"site_pips": {
"DCITERMDISABLE_SEL:GND": {
"from_pin": "GND",
"to_pin": "OUT"
},
"DCITERMDISABLE_SEL:I": {
"from_pin": "I",
"to_pin": "OUT"
},
"DIFFI_INUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"DIFFO_INUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"IBUFDISABLE_SEL:GND": {
"from_pin": "GND",
"to_pin": "OUT"
},
"IBUFDISABLE_SEL:I": {
"from_pin": "I",
"to_pin": "OUT"
},
"IUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"OINMUX:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"OINMUX:1": {
"from_pin": "1",
"to_pin": "OUT"
},
"OUTMUX:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"OUTMUX:1": {
"from_pin": "1",
"to_pin": "OUT"
},
"PADOUTUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"TINMUX:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"TINMUX:1": {
"from_pin": "1",
"to_pin": "OUT"
}
},
"type": "IOB18S"
}

View File

@ -0,0 +1,92 @@
{
"site_pins": {
"C": {
"direction": "IN"
},
"CE": {
"direction": "IN"
},
"CINVCTRL": {
"direction": "IN"
},
"CLKIN": {
"direction": "IN"
},
"CNTVALUEIN0": {
"direction": "IN"
},
"CNTVALUEIN1": {
"direction": "IN"
},
"CNTVALUEIN2": {
"direction": "IN"
},
"CNTVALUEIN3": {
"direction": "IN"
},
"CNTVALUEIN4": {
"direction": "IN"
},
"CNTVALUEOUT0": {
"direction": "OUT"
},
"CNTVALUEOUT1": {
"direction": "OUT"
},
"CNTVALUEOUT2": {
"direction": "OUT"
},
"CNTVALUEOUT3": {
"direction": "OUT"
},
"CNTVALUEOUT4": {
"direction": "OUT"
},
"DATAOUT": {
"direction": "OUT"
},
"INC": {
"direction": "IN"
},
"LD": {
"direction": "IN"
},
"LDPIPEEN": {
"direction": "IN"
},
"ODATAIN": {
"direction": "IN"
},
"OFDLY0": {
"direction": "IN"
},
"OFDLY1": {
"direction": "IN"
},
"OFDLY2": {
"direction": "IN"
},
"REGRST": {
"direction": "IN"
}
},
"site_pips": {
"CINV:C": {
"from_pin": "C",
"to_pin": "OUT"
},
"CINV:C_B": {
"from_pin": "C_B",
"to_pin": "OUT"
},
"ODATAININV:ODATAIN": {
"from_pin": "ODATAIN",
"to_pin": "OUT"
},
"ODATAININV:ODATAIN_B": {
"from_pin": "ODATAIN_B",
"to_pin": "OUT"
}
},
"type": "ODELAYE2"
}

View File

@ -0,0 +1,210 @@
{
"site_pins": {
"CLK": {
"direction": "IN"
},
"CLKB": {
"direction": "IN"
},
"CLKDIV": {
"direction": "IN"
},
"CLKDIVB": {
"direction": "IN"
},
"CLKDIVF": {
"direction": "IN"
},
"CLKDIVFB": {
"direction": "IN"
},
"D1": {
"direction": "IN"
},
"D2": {
"direction": "IN"
},
"D3": {
"direction": "IN"
},
"D4": {
"direction": "IN"
},
"D5": {
"direction": "IN"
},
"D6": {
"direction": "IN"
},
"D7": {
"direction": "IN"
},
"D8": {
"direction": "IN"
},
"IOCLKGLITCH": {
"direction": "OUT"
},
"OCE": {
"direction": "IN"
},
"OFB": {
"direction": "OUT"
},
"OQ": {
"direction": "OUT"
},
"REV": {
"direction": "IN"
},
"SHIFTIN1": {
"direction": "IN"
},
"SHIFTIN2": {
"direction": "IN"
},
"SHIFTOUT1": {
"direction": "OUT"
},
"SHIFTOUT2": {
"direction": "OUT"
},
"SR": {
"direction": "IN"
},
"T1": {
"direction": "IN"
},
"T2": {
"direction": "IN"
},
"T3": {
"direction": "IN"
},
"T4": {
"direction": "IN"
},
"TBYTEIN": {
"direction": "IN"
},
"TBYTEOUT": {
"direction": "OUT"
},
"TCE": {
"direction": "IN"
},
"TFB": {
"direction": "OUT"
},
"TQ": {
"direction": "OUT"
}
},
"site_pips": {
"CLKINV:CLK": {
"from_pin": "CLK",
"to_pin": "OUT"
},
"CLKINV:CLK_B": {
"from_pin": "CLK_B",
"to_pin": "OUT"
},
"D1INV:D1": {
"from_pin": "D1",
"to_pin": "OUT"
},
"D1INV:D1_B": {
"from_pin": "D1_B",
"to_pin": "OUT"
},
"D2INV:D2": {
"from_pin": "D2",
"to_pin": "OUT"
},
"D2INV:D2_B": {
"from_pin": "D2_B",
"to_pin": "OUT"
},
"O1USED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"OCEUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"OFBUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"OMUX:D1": {
"from_pin": "D1",
"to_pin": "OUT"
},
"OMUX:OUTFF": {
"from_pin": "OUTFF",
"to_pin": "OUT"
},
"OQUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"OREVUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"OSRUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"T1INV:T1": {
"from_pin": "T1",
"to_pin": "OUT"
},
"T1INV:T1_B": {
"from_pin": "T1_B",
"to_pin": "OUT"
},
"T1USED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"T2INV:T2": {
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View File

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View File

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View File

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{
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@ -0,0 +1,21 @@
{
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@ -0,0 +1,21 @@
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76045
zynq7/tile_type_PCIE_BOT.json Normal file

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13403
zynq7/tile_type_PCIE_TOP.json Normal file

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1569
zynq7/tile_type_RIOB18.json Normal file

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@ -0,0 +1,655 @@
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}

13939
zynq7/tile_type_RIOI.json Normal file

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"R_TERM_INT_WL1END2": {
"cap": "4.200",
"res": "87.290"
},
"R_TERM_INT_WL1END3": {
"cap": "4.200",
"res": "87.290"
},
"R_TERM_INT_WR1END0": {
"cap": "4.200",
"res": "87.290"
},
"R_TERM_INT_WR1END1": {
"cap": "4.200",
"res": "87.290"
},
"R_TERM_INT_WR1END2": {
"cap": "4.200",
"res": "87.290"
},
"R_TERM_INT_WR1END3": {
"cap": "4.200",
"res": "87.290"
},
"R_TERM_INT_WW2A0": {
"cap": "4.200",
"res": "87.290"
},
"R_TERM_INT_WW2A1": {
"cap": "4.200",
"res": "87.290"
},
"R_TERM_INT_WW2A2": {
"cap": "4.200",
"res": "87.290"
},
"R_TERM_INT_WW2A3": {
"cap": "4.200",
"res": "87.290"
},
"R_TERM_INT_WW2END0": {
"cap": "4.200",
"res": "87.290"
},
"R_TERM_INT_WW2END1": {
"cap": "4.200",
"res": "87.290"
},
"R_TERM_INT_WW2END2": {
"cap": "4.200",
"res": "87.290"
},
"R_TERM_INT_WW2END3": {
"cap": "4.200",
"res": "87.290"
},
"R_TERM_INT_WW4A0": {
"cap": "4.200",
"res": "87.290"
},
"R_TERM_INT_WW4A1": {
"cap": "4.200",
"res": "87.290"
},
"R_TERM_INT_WW4A2": {
"cap": "4.200",
"res": "87.290"
},
"R_TERM_INT_WW4A3": {
"cap": "4.200",
"res": "87.290"
},
"R_TERM_INT_WW4B0": {
"cap": "4.200",
"res": "87.290"
},
"R_TERM_INT_WW4B1": {
"cap": "4.200",
"res": "87.290"
},
"R_TERM_INT_WW4B2": {
"cap": "4.200",
"res": "87.290"
},
"R_TERM_INT_WW4B3": {
"cap": "4.200",
"res": "87.290"
},
"R_TERM_INT_WW4C0": {
"cap": "4.200",
"res": "87.290"
},
"R_TERM_INT_WW4C1": {
"cap": "4.200",
"res": "87.290"
},
"R_TERM_INT_WW4C2": {
"cap": "4.200",
"res": "87.290"
},
"R_TERM_INT_WW4C3": {
"cap": "4.200",
"res": "87.290"
},
"R_TERM_INT_WW4END0": {
"cap": "4.200",
"res": "87.290"
},
"R_TERM_INT_WW4END1": {
"cap": "4.200",
"res": "87.290"
},
"R_TERM_INT_WW4END2": {
"cap": "4.200",
"res": "87.290"
},
"R_TERM_INT_WW4END3": {
"cap": "4.200",
"res": "87.290"
}
}
}

View File

@ -0,0 +1,99 @@
{
"pips": {},
"sites": [],
"tile_type": "VBRK_EXT",
"wires": {
"VBRK_EXT_BYP0": null,
"VBRK_EXT_BYP1": null,
"VBRK_EXT_BYP2": null,
"VBRK_EXT_BYP3": null,
"VBRK_EXT_BYP4": null,
"VBRK_EXT_BYP5": null,
"VBRK_EXT_BYP6": null,
"VBRK_EXT_BYP7": null,
"VBRK_EXT_CLK0": null,
"VBRK_EXT_CLK1": null,
"VBRK_EXT_CTRL0": null,
"VBRK_EXT_CTRL1": null,
"VBRK_EXT_FAN0": null,
"VBRK_EXT_FAN1": null,
"VBRK_EXT_FAN2": null,
"VBRK_EXT_FAN3": null,
"VBRK_EXT_FAN4": null,
"VBRK_EXT_FAN5": null,
"VBRK_EXT_FAN6": null,
"VBRK_EXT_FAN7": null,
"VBRK_EXT_IMUX0": null,
"VBRK_EXT_IMUX1": null,
"VBRK_EXT_IMUX2": null,
"VBRK_EXT_IMUX3": null,
"VBRK_EXT_IMUX4": null,
"VBRK_EXT_IMUX5": null,
"VBRK_EXT_IMUX6": null,
"VBRK_EXT_IMUX7": null,
"VBRK_EXT_IMUX8": null,
"VBRK_EXT_IMUX9": null,
"VBRK_EXT_IMUX10": null,
"VBRK_EXT_IMUX11": null,
"VBRK_EXT_IMUX12": null,
"VBRK_EXT_IMUX13": null,
"VBRK_EXT_IMUX14": null,
"VBRK_EXT_IMUX15": null,
"VBRK_EXT_IMUX16": null,
"VBRK_EXT_IMUX17": null,
"VBRK_EXT_IMUX18": null,
"VBRK_EXT_IMUX19": null,
"VBRK_EXT_IMUX20": null,
"VBRK_EXT_IMUX21": null,
"VBRK_EXT_IMUX22": null,
"VBRK_EXT_IMUX23": null,
"VBRK_EXT_IMUX24": null,
"VBRK_EXT_IMUX25": null,
"VBRK_EXT_IMUX26": null,
"VBRK_EXT_IMUX27": null,
"VBRK_EXT_IMUX28": null,
"VBRK_EXT_IMUX29": null,
"VBRK_EXT_IMUX30": null,
"VBRK_EXT_IMUX31": null,
"VBRK_EXT_IMUX32": null,
"VBRK_EXT_IMUX33": null,
"VBRK_EXT_IMUX34": null,
"VBRK_EXT_IMUX35": null,
"VBRK_EXT_IMUX36": null,
"VBRK_EXT_IMUX37": null,
"VBRK_EXT_IMUX38": null,
"VBRK_EXT_IMUX39": null,
"VBRK_EXT_IMUX40": null,
"VBRK_EXT_IMUX41": null,
"VBRK_EXT_IMUX42": null,
"VBRK_EXT_IMUX43": null,
"VBRK_EXT_IMUX44": null,
"VBRK_EXT_IMUX45": null,
"VBRK_EXT_IMUX46": null,
"VBRK_EXT_IMUX47": null,
"VBRK_EXT_LOGIC_OUTS_B0": null,
"VBRK_EXT_LOGIC_OUTS_B1": null,
"VBRK_EXT_LOGIC_OUTS_B2": null,
"VBRK_EXT_LOGIC_OUTS_B3": null,
"VBRK_EXT_LOGIC_OUTS_B4": null,
"VBRK_EXT_LOGIC_OUTS_B5": null,
"VBRK_EXT_LOGIC_OUTS_B6": null,
"VBRK_EXT_LOGIC_OUTS_B7": null,
"VBRK_EXT_LOGIC_OUTS_B8": null,
"VBRK_EXT_LOGIC_OUTS_B9": null,
"VBRK_EXT_LOGIC_OUTS_B10": null,
"VBRK_EXT_LOGIC_OUTS_B11": null,
"VBRK_EXT_LOGIC_OUTS_B12": null,
"VBRK_EXT_LOGIC_OUTS_B13": null,
"VBRK_EXT_LOGIC_OUTS_B14": null,
"VBRK_EXT_LOGIC_OUTS_B15": null,
"VBRK_EXT_LOGIC_OUTS_B16": null,
"VBRK_EXT_LOGIC_OUTS_B17": null,
"VBRK_EXT_LOGIC_OUTS_B18": null,
"VBRK_EXT_LOGIC_OUTS_B19": null,
"VBRK_EXT_LOGIC_OUTS_B20": null,
"VBRK_EXT_LOGIC_OUTS_B21": null,
"VBRK_EXT_LOGIC_OUTS_B22": null,
"VBRK_EXT_LOGIC_OUTS_B23": null
}
}

58831
zynq7/xc7z030/node_wires.json Normal file

File diff suppressed because it is too large Load Diff

582586
zynq7/xc7z030/tileconn.json Normal file

File diff suppressed because it is too large Load Diff

638335
zynq7/xc7z030/tilegrid.json Normal file

File diff suppressed because it is too large Load Diff

View File

@ -0,0 +1,403 @@
pin,bank,site,tile,pin_function
A2,34,IOB_X1Y101,RIOB18_X79Y101,IO_L24N_T3_34
A3,34,IOB_X1Y105,RIOB18_X79Y105,IO_L22N_T3_34
A4,34,IOB_X1Y106,RIOB18_X79Y105,IO_L22P_T3_34
A5,34,IOB_X1Y107,RIOB18_X79Y107,IO_L21N_T3_DQS_34
A7,34,IOB_X1Y113,RIOB18_X79Y113,IO_L18N_T2_34
A8,34,IOB_X1Y115,RIOB18_X79Y115,IO_L17N_T2_34
A9,34,IOB_X1Y116,RIOB18_X79Y115,IO_L17P_T2_34
A10,34,IOB_X1Y117,RIOB18_X79Y117,IO_L16N_T2_34
A12,35,IOB_X1Y151,RIOB18_X79Y151,IO_L24N_T3_AD15N_35
A13,35,IOB_X1Y152,RIOB18_X79Y151,IO_L24P_T3_AD15P_35
A14,35,IOB_X1Y157,RIOB18_X79Y157,IO_L21N_T3_DQS_AD14N_35
A15,35,IOB_X1Y158,RIOB18_X79Y157,IO_L21P_T3_DQS_AD14P_35
A17,35,IOB_X1Y163,RIOB18_X79Y163,IO_L18N_T2_AD13N_35
A18,501,IOPAD_X1Y126,PSS2_X32Y157,PS_MIO49_501
A19,501,IOPAD_X1Y130,PSS2_X32Y157,PS_MIO53_501
A20,501,IOPAD_X1Y129,PSS2_X32Y157,PS_MIO52_501
A22,501,IOPAD_X1Y134,PSS2_X32Y157,PS_SRST_B_501
A23,500,IOPAD_X1Y89,PSS2_X32Y157,PS_MIO12_500
A24,500,IOPAD_X1Y85,PSS2_X32Y157,PS_MIO8_500
A25,500,IOPAD_X1Y87,PSS2_X32Y157,PS_MIO10_500
AA1,112,OPAD_X0Y0,GTX_CHANNEL_0_X186Y6,MGTXTXN0_112
AA2,112,OPAD_X0Y1,GTX_CHANNEL_0_X186Y6,MGTXTXP0_112
AA10,12,IOB_X0Y43,LIOB33_X0Y43,IO_L3N_T0_DQS_12
AA12,12,IOB_X0Y37,LIOB33_X0Y37,IO_L6N_T0_VREF_12
AA13,12,IOB_X0Y38,LIOB33_X0Y37,IO_L6P_T0_12
AA14,12,IOB_X0Y5,LIOB33_X0Y5,IO_L22N_T3_12
AA15,12,IOB_X0Y6,LIOB33_X0Y5,IO_L22P_T3_12
AA17,12,IOB_X0Y11,LIOB33_X0Y11,IO_L19N_T3_VREF_12
AA18,13,IOB_X0Y51,LIOB33_X0Y51,IO_L24N_T3_13
AA19,13,IOB_X0Y56,LIOB33_X0Y55,IO_L22P_T3_13
AA20,13,IOB_X0Y60,LIOB33_X0Y59,IO_L20P_T3_13
AA22,13,IOB_X0Y80,LIOB33_X0Y79,IO_L10P_T1_13
AA23,13,IOB_X0Y79,LIOB33_X0Y79,IO_L10N_T1_13
AA24,13,IOB_X0Y88,LIOB33_X0Y87,IO_L6P_T0_13
AA25,13,IOB_X0Y98,LIOB33_X0Y97,IO_L1P_T0_13
AB3,112,IPAD_X1Y0,GTX_CHANNEL_0_X186Y6,MGTXRXN0_112
AB4,112,IPAD_X1Y1,GTX_CHANNEL_0_X186Y6,MGTXRXP0_112
AB10,12,IOB_X0Y41,LIOB33_X0Y41,IO_L4N_T0_12
AB11,12,IOB_X0Y42,LIOB33_X0Y41,IO_L4P_T0_12
AB12,12,IOB_X0Y46,LIOB33_X0Y45,IO_L2P_T0_12
AB14,12,IOB_X0Y21,LIOB33_X0Y21,IO_L14N_T2_SRCC_12
AB15,12,IOB_X0Y22,LIOB33_X0Y21,IO_L14P_T2_SRCC_12
AB16,12,IOB_X0Y9,LIOB33_X0Y9,IO_L20N_T3_12
AB17,12,IOB_X0Y10,LIOB33_X0Y9,IO_L20P_T3_12
AB19,13,IOB_X0Y55,LIOB33_X0Y55,IO_L22N_T3_13
AB20,13,IOB_X0Y59,LIOB33_X0Y59,IO_L20N_T3_13
AB21,13,IOB_X0Y82,LIOB33_X0Y81,IO_L9P_T1_DQS_13
AB22,13,IOB_X0Y81,LIOB33_X0Y81,IO_L9N_T1_DQS_13
AB24,13,IOB_X0Y87,LIOB33_X0Y87,IO_L6N_T0_VREF_13
AB25,13,IOB_X0Y97,LIOB33_X0Y97,IO_L1N_T0_13
AB26,13,IOB_X0Y96,LIOB33_X0Y95,IO_L2P_T0_13
AC11,12,IOB_X0Y45,LIOB33_X0Y45,IO_L2N_T0_12
AC12,12,IOB_X0Y28,LIOB33_X0Y27,IO_L11P_T1_SRCC_12
AC13,12,IOB_X0Y26,LIOB33_X0Y25,IO_L12P_T1_MRCC_12
AC14,12,IOB_X0Y24,LIOB33_X0Y23,IO_L13P_T2_MRCC_12
AC16,12,IOB_X0Y7,LIOB33_X0Y7,IO_L21N_T3_DQS_12
AC17,12,IOB_X0Y8,LIOB33_X0Y7,IO_L21P_T3_DQS_12
AC18,13,IOB_X0Y58,LIOB33_X0Y57,IO_L21P_T3_DQS_13
AC19,13,IOB_X0Y57,LIOB33_X0Y57,IO_L21N_T3_DQS_13
AC21,13,IOB_X0Y72,LIOB33_X0Y71,IO_L14P_T2_SRCC_13
AC22,13,IOB_X0Y71,LIOB33_X0Y71,IO_L14N_T2_SRCC_13
AC23,13,IOB_X0Y76,LIOB33_X0Y75,IO_L12P_T1_MRCC_13
AC24,13,IOB_X0Y75,LIOB33_X0Y75,IO_L12N_T1_MRCC_13
AC26,13,IOB_X0Y95,LIOB33_X0Y95,IO_L2N_T0_13
AD10,12,IOB_X0Y35,LIOB33_X0Y35,IO_L7N_T1_12
AD11,12,IOB_X0Y27,LIOB33_X0Y27,IO_L11N_T1_SRCC_12
AD13,12,IOB_X0Y25,LIOB33_X0Y25,IO_L12N_T1_MRCC_12
AD14,12,IOB_X0Y23,LIOB33_X0Y23,IO_L13N_T2_MRCC_12
AD15,12,IOB_X0Y19,LIOB33_X0Y19,IO_L15N_T2_DQS_12
AD16,12,IOB_X0Y20,LIOB33_X0Y19,IO_L15P_T2_DQS_12
AD18,13,IOB_X0Y66,LIOB33_X0Y65,IO_L17P_T2_13
AD19,13,IOB_X0Y65,LIOB33_X0Y65,IO_L17N_T2_13
AD20,13,IOB_X0Y74,LIOB33_X0Y73,IO_L13P_T2_MRCC_13
AD21,13,IOB_X0Y73,LIOB33_X0Y73,IO_L13N_T2_MRCC_13
AD23,13,IOB_X0Y78,LIOB33_X0Y77,IO_L11P_T1_SRCC_13
AD24,13,IOB_X0Y77,LIOB33_X0Y77,IO_L11N_T1_SRCC_13
AD25,13,IOB_X0Y92,LIOB33_X0Y91,IO_L4P_T0_13
AD26,13,IOB_X0Y91,LIOB33_X0Y91,IO_L4N_T0_13
AE10,12,IOB_X0Y36,LIOB33_X0Y35,IO_L7P_T1_12
AE11,12,IOB_X0Y32,LIOB33_X0Y31,IO_L9P_T1_DQS_12
AE12,12,IOB_X0Y34,LIOB33_X0Y33,IO_L8P_T1_12
AE13,12,IOB_X0Y30,LIOB33_X0Y29,IO_L10P_T1_12
AE15,12,IOB_X0Y15,LIOB33_X0Y15,IO_L17N_T2_12
AE16,12,IOB_X0Y16,LIOB33_X0Y15,IO_L17P_T2_12
AE17,12,IOB_X0Y14,LIOB33_X0Y13,IO_L18P_T2_12
AE18,13,IOB_X0Y64,LIOB33_X0Y63,IO_L18P_T2_13
AE20,13,IOB_X0Y68,LIOB33_X0Y67,IO_L16P_T2_13
AE21,13,IOB_X0Y67,LIOB33_X0Y67,IO_L16N_T2_13
AE22,13,IOB_X0Y86,LIOB33_X0Y85,IO_L7P_T1_13
AE23,13,IOB_X0Y84,LIOB33_X0Y83,IO_L8P_T1_13
AE25,13,IOB_X0Y94,LIOB33_X0Y93,IO_L3P_T0_DQS_13
AE26,13,IOB_X0Y93,LIOB33_X0Y93,IO_L3N_T0_DQS_13
AF10,12,IOB_X0Y31,LIOB33_X0Y31,IO_L9N_T1_DQS_12
AF12,12,IOB_X0Y33,LIOB33_X0Y33,IO_L8N_T1_12
AF13,12,IOB_X0Y29,LIOB33_X0Y29,IO_L10N_T1_12
AF14,12,IOB_X0Y17,LIOB33_X0Y17,IO_L16N_T2_12
AF15,12,IOB_X0Y18,LIOB33_X0Y17,IO_L16P_T2_12
AF17,12,IOB_X0Y13,LIOB33_X0Y13,IO_L18N_T2_12
AF18,13,IOB_X0Y63,LIOB33_X0Y63,IO_L18N_T2_13
AF19,13,IOB_X0Y70,LIOB33_X0Y69,IO_L15P_T2_DQS_13
AF20,13,IOB_X0Y69,LIOB33_X0Y69,IO_L15N_T2_DQS_13
AF22,13,IOB_X0Y85,LIOB33_X0Y85,IO_L7N_T1_13
AF23,13,IOB_X0Y83,LIOB33_X0Y83,IO_L8N_T1_13
AF24,13,IOB_X0Y90,LIOB33_X0Y89,IO_L5P_T0_13
AF25,13,IOB_X0Y89,LIOB33_X0Y89,IO_L5N_T0_13
B1,34,IOB_X1Y103,RIOB18_X79Y103,IO_L23N_T3_34
B2,34,IOB_X1Y102,RIOB18_X79Y101,IO_L24P_T3_34
B4,34,IOB_X1Y109,RIOB18_X79Y109,IO_L20N_T3_34
B5,34,IOB_X1Y110,RIOB18_X79Y109,IO_L20P_T3_34
B6,34,IOB_X1Y108,RIOB18_X79Y107,IO_L21P_T3_DQS_34
B7,34,IOB_X1Y114,RIOB18_X79Y113,IO_L18P_T2_34
B9,34,IOB_X1Y119,RIOB18_X79Y119,IO_L15N_T2_DQS_34
B10,34,IOB_X1Y118,RIOB18_X79Y117,IO_L16P_T2_34
B11,35,IOB_X1Y153,RIOB18_X79Y153,IO_L23N_T3_35
B12,35,IOB_X1Y155,RIOB18_X79Y155,IO_L22N_T3_AD7N_35
B14,35,IOB_X1Y159,RIOB18_X79Y159,IO_L20N_T3_AD6N_35
B15,35,IOB_X1Y165,RIOB18_X79Y165,IO_L17N_T2_AD5N_35
B16,35,IOB_X1Y166,RIOB18_X79Y165,IO_L17P_T2_AD5P_35
B17,35,IOB_X1Y164,RIOB18_X79Y163,IO_L18P_T2_AD13P_35
B19,501,IOPAD_X1Y124,PSS2_X32Y157,PS_MIO47_501
B20,501,IOPAD_X1Y128,PSS2_X32Y157,PS_MIO51_501
B21,501,IOPAD_X1Y125,PSS2_X32Y157,PS_MIO48_501
B22,501,IOPAD_X1Y127,PSS2_X32Y157,PS_MIO50_501
B24,500,IOPAD_X1Y26,PSS2_X32Y157,PS_CLK_500
B25,500,IOPAD_X1Y90,PSS2_X32Y157,PS_MIO13_500
B26,500,IOPAD_X1Y88,PSS2_X32Y157,PS_MIO11_500
C1,33,IOB_X1Y91,RIOB18_X79Y91,IO_L4N_T0_33
C2,34,IOB_X1Y104,RIOB18_X79Y103,IO_L23P_T3_34
C3,34,IOB_X1Y111,RIOB18_X79Y111,IO_L19N_T3_VREF_34
C4,34,IOB_X1Y112,RIOB18_X79Y111,IO_L19P_T3_34
C6,34,IOB_X1Y121,RIOB18_X79Y121,IO_L14N_T2_SRCC_34
C7,34,IOB_X1Y123,RIOB18_X79Y123,IO_L13N_T2_MRCC_34
C8,34,IOB_X1Y124,RIOB18_X79Y123,IO_L13P_T2_MRCC_34
C9,34,IOB_X1Y120,RIOB18_X79Y119,IO_L15P_T2_DQS_34
C11,35,IOB_X1Y154,RIOB18_X79Y153,IO_L23P_T3_35
C12,35,IOB_X1Y156,RIOB18_X79Y155,IO_L22P_T3_AD7P_35
C13,35,IOB_X1Y161,RIOB18_X79Y161,IO_L19N_T3_VREF_35
C14,35,IOB_X1Y160,RIOB18_X79Y159,IO_L20P_T3_AD6P_35
C16,35,IOB_X1Y169,RIOB18_X79Y169,IO_L15N_T2_DQS_AD12N_35
C17,35,IOB_X1Y170,RIOB18_X79Y169,IO_L15P_T2_DQS_AD12P_35
C18,501,IOPAD_X1Y122,PSS2_X32Y157,PS_MIO45_501
C19,501,IOPAD_X1Y118,PSS2_X32Y157,PS_MIO41_501
C21,501,IOPAD_X1Y116,PSS2_X32Y157,PS_MIO39_501
C22,501,IOPAD_X1Y117,PSS2_X32Y157,PS_MIO40_501
C23,500,IOPAD_X1Y132,PSS2_X32Y157,PS_POR_B_500
C24,500,IOPAD_X1Y92,PSS2_X32Y157,PS_MIO15_500
C26,500,IOPAD_X1Y82,PSS2_X32Y157,PS_MIO5_500
D1,33,IOB_X1Y92,RIOB18_X79Y91,IO_L4P_T0_33
D3,33,IOB_X1Y95,RIOB18_X79Y95,IO_L2N_T0_33
D4,33,IOB_X1Y96,RIOB18_X79Y95,IO_L2P_T0_33
D5,34,IOB_X1Y129,RIOB18_X79Y129,IO_L10N_T1_34
D6,34,IOB_X1Y122,RIOB18_X79Y121,IO_L14P_T2_SRCC_34
D8,34,IOB_X1Y133,RIOB18_X79Y133,IO_L8N_T1_34
D9,34,IOB_X1Y134,RIOB18_X79Y133,IO_L8P_T1_34
D10,35,IOB_X1Y195,RIOB18_X79Y195,IO_L2N_T0_AD8N_35
D11,35,IOB_X1Y191,RIOB18_X79Y191,IO_L4N_T0_35
D13,35,IOB_X1Y162,RIOB18_X79Y161,IO_L19P_T3_35
D14,35,IOB_X1Y173,RIOB18_X79Y173,IO_L13N_T2_MRCC_35
D15,35,IOB_X1Y174,RIOB18_X79Y173,IO_L13P_T2_MRCC_35
D16,35,IOB_X1Y167,RIOB18_X79Y167,IO_L16N_T2_35
D18,501,IOPAD_X1Y120,PSS2_X32Y157,PS_MIO43_501
D19,501,IOPAD_X1Y112,PSS2_X32Y157,PS_MIO35_501
D20,501,IOPAD_X1Y114,PSS2_X32Y157,PS_MIO37_501
D21,501,IOPAD_X1Y115,PSS2_X32Y157,PS_MIO38_501
D23,500,IOPAD_X1Y91,PSS2_X32Y157,PS_MIO14_500
D24,500,IOPAD_X1Y86,PSS2_X32Y157,PS_MIO9_500
D25,500,IOPAD_X1Y80,PSS2_X32Y157,PS_MIO3_500
D26,500,IOPAD_X1Y78,PSS2_X32Y157,PS_MIO1_500
E1,33,IOB_X1Y89,RIOB18_X79Y89,IO_L5N_T0_33
E2,33,IOB_X1Y90,RIOB18_X79Y89,IO_L5P_T0_33
E3,33,IOB_X1Y87,RIOB18_X79Y87,IO_L6N_T0_VREF_33
E5,34,IOB_X1Y135,RIOB18_X79Y135,IO_L7N_T1_34
E6,34,IOB_X1Y130,RIOB18_X79Y129,IO_L10P_T1_34
E7,34,IOB_X1Y127,RIOB18_X79Y127,IO_L11N_T1_SRCC_34
E8,34,IOB_X1Y131,RIOB18_X79Y131,IO_L9N_T1_DQS_34
E10,35,IOB_X1Y196,RIOB18_X79Y195,IO_L2P_T0_AD8P_35
E11,35,IOB_X1Y192,RIOB18_X79Y191,IO_L4P_T0_35
E12,35,IOB_X1Y197,RIOB18_X79Y197,IO_L1N_T0_AD0N_35
E13,35,IOB_X1Y187,RIOB18_X79Y187,IO_L6N_T0_VREF_35
E15,35,IOB_X1Y171,RIOB18_X79Y171,IO_L14N_T2_AD4N_SRCC_35
E16,35,IOB_X1Y168,RIOB18_X79Y167,IO_L16P_T2_35
E17,501,IOPAD_X1Y123,PSS2_X32Y157,PS_MIO46_501
E18,501,IOPAD_X1Y121,PSS2_X32Y157,PS_MIO44_501
E20,501,IOPAD_X1Y106,PSS2_X32Y157,PS_MIO29_501
E21,501,IOPAD_X1Y108,PSS2_X32Y157,PS_MIO31_501
E22,501,IOPAD_X1Y110,PSS2_X32Y157,PS_MIO33_501
E23,500,IOPAD_X1Y84,PSS2_X32Y157,PS_MIO7_500
E25,500,IOPAD_X1Y79,PSS2_X32Y157,PS_MIO2_500
E26,500,IOPAD_X1Y77,PSS2_X32Y157,PS_MIO0_500
F2,33,IOB_X1Y93,RIOB18_X79Y93,IO_L3N_T0_DQS_33
F3,33,IOB_X1Y88,RIOB18_X79Y87,IO_L6P_T0_33
F4,33,IOB_X1Y97,RIOB18_X79Y97,IO_L1N_T0_33
F5,34,IOB_X1Y136,RIOB18_X79Y135,IO_L7P_T1_34
F7,34,IOB_X1Y125,RIOB18_X79Y125,IO_L12N_T1_MRCC_34
F8,34,IOB_X1Y128,RIOB18_X79Y127,IO_L11P_T1_SRCC_34
F9,34,IOB_X1Y132,RIOB18_X79Y131,IO_L9P_T1_DQS_34
F10,35,IOB_X1Y193,RIOB18_X79Y193,IO_L3N_T0_DQS_AD1N_35
F12,35,IOB_X1Y198,RIOB18_X79Y197,IO_L1P_T0_AD0P_35
F13,35,IOB_X1Y188,RIOB18_X79Y187,IO_L6P_T0_35
F14,35,IOB_X1Y177,RIOB18_X79Y177,IO_L11N_T1_SRCC_35
F15,35,IOB_X1Y172,RIOB18_X79Y171,IO_L14P_T2_AD4P_SRCC_35
F17,501,IOPAD_X1Y119,PSS2_X32Y157,PS_MIO42_501
F18,501,IOPAD_X1Y104,PSS2_X32Y157,PS_MIO27_501
F19,501,IOPAD_X1Y102,PSS2_X32Y157,PS_MIO25_501
F20,501,IOPAD_X1Y100,PSS2_X32Y157,PS_MIO23_501
F22,501,IOPAD_X1Y98,PSS2_X32Y157,PS_MIO21_501
F23,500,IOPAD_X1Y83,PSS2_X32Y157,PS_MIO6_500
F24,500,IOPAD_X1Y81,PSS2_X32Y157,PS_MIO4_500
F25,502,IOPAD_X1Y33,PSS2_X32Y157,PS_DDR_DQ1_502
G1,33,IOB_X1Y79,RIOB18_X79Y79,IO_L10N_T1_33
G2,33,IOB_X1Y94,RIOB18_X79Y93,IO_L3P_T0_DQS_33
G4,33,IOB_X1Y98,RIOB18_X79Y97,IO_L1P_T0_33
G5,34,IOB_X1Y145,RIOB18_X79Y145,IO_L2N_T0_34
G6,34,IOB_X1Y146,RIOB18_X79Y145,IO_L2P_T0_34
G7,34,IOB_X1Y126,RIOB18_X79Y125,IO_L12P_T1_MRCC_34
G9,34,IOB_X1Y143,RIOB18_X79Y143,IO_L3N_T0_DQS_34
G10,35,IOB_X1Y194,RIOB18_X79Y193,IO_L3P_T0_DQS_AD1P_35
G11,35,IOB_X1Y189,RIOB18_X79Y189,IO_L5N_T0_AD9N_35
G12,35,IOB_X1Y190,RIOB18_X79Y189,IO_L5P_T0_AD9P_35
G14,35,IOB_X1Y178,RIOB18_X79Y177,IO_L11P_T1_SRCC_35
G15,35,IOB_X1Y179,RIOB18_X79Y179,IO_L10N_T1_AD11N_35
G16,35,IOB_X1Y180,RIOB18_X79Y179,IO_L10P_T1_AD11P_35
G17,501,IOPAD_X1Y94,PSS2_X32Y157,PS_MIO17_501
G19,501,IOPAD_X1Y96,PSS2_X32Y157,PS_MIO19_501
G20,501,IOPAD_X1Y95,PSS2_X32Y157,PS_MIO18_501
G21,501,IOPAD_X1Y93,PSS2_X32Y157,PS_MIO16_501
G22,501,IOPAD_X1Y99,PSS2_X32Y157,PS_MIO22_501
G24,502,IOPAD_X1Y28,PSS2_X32Y157,PS_DDR_DM0_502
G25,502,IOPAD_X1Y64,PSS2_X32Y157,PS_DDR_DQS_N0_502
G26,502,IOPAD_X1Y35,PSS2_X32Y157,PS_DDR_DQ3_502
H1,33,IOB_X1Y85,RIOB18_X79Y85,IO_L7N_T1_33
H2,33,IOB_X1Y80,RIOB18_X79Y79,IO_L10P_T1_33
H3,33,IOB_X1Y83,RIOB18_X79Y83,IO_L8N_T1_33
H4,33,IOB_X1Y84,RIOB18_X79Y83,IO_L8P_T1_33
H6,34,IOB_X1Y141,RIOB18_X79Y141,IO_L4N_T0_34
H7,34,IOB_X1Y142,RIOB18_X79Y141,IO_L4P_T0_34
H8,34,IOB_X1Y137,RIOB18_X79Y137,IO_L6N_T0_VREF_34
H9,34,IOB_X1Y144,RIOB18_X79Y143,IO_L3P_T0_DQS_PUDC_B_34
H11,34,IOB_X1Y147,RIOB18_X79Y147,IO_L1N_T0_34
H12,35,IOB_X1Y185,RIOB18_X79Y185,IO_L7N_T1_AD2N_35
H13,35,IOB_X1Y186,RIOB18_X79Y185,IO_L7P_T1_AD2P_35
H14,35,IOB_X1Y175,RIOB18_X79Y175,IO_L12N_T1_MRCC_35
H16,35,IOB_X1Y199,RIOB18_SING_X79Y199,IO_0_VRN_35
H17,501,IOPAD_X1Y103,PSS2_X32Y157,PS_MIO26_501
H19,501,IOPAD_X1Y97,PSS2_X32Y157,PS_MIO20_501
H21,502,IOPAD_X1Y15,PSS2_X32Y157,PS_DDR_A11_502
H22,502,IOPAD_X1Y72,PSS2_X32Y157,PS_DDR_DRST_B_502
H23,502,IOPAD_X1Y37,PSS2_X32Y157,PS_DDR_DQ5_502
H24,502,IOPAD_X1Y68,PSS2_X32Y157,PS_DDR_DQS_P0_502
H26,502,IOPAD_X1Y36,PSS2_X32Y157,PS_DDR_DQ4_502
J1,33,IOB_X1Y86,RIOB18_X79Y85,IO_L7P_T1_33
J3,33,IOB_X1Y75,RIOB18_X79Y75,IO_L12N_T1_MRCC_33
J4,33,IOB_X1Y76,RIOB18_X79Y75,IO_L12P_T1_MRCC_33
J5,33,IOB_X1Y59,RIOB18_X79Y59,IO_L20N_T3_33
J6,33,IOB_X1Y55,RIOB18_X79Y55,IO_L22N_T3_33
J8,34,IOB_X1Y138,RIOB18_X79Y137,IO_L6P_T0_34
J9,34,IOB_X1Y139,RIOB18_X79Y139,IO_L5N_T0_34
J10,34,IOB_X1Y140,RIOB18_X79Y139,IO_L5P_T0_34
J11,34,IOB_X1Y148,RIOB18_X79Y147,IO_L1P_T0_34
J13,35,IOB_X1Y183,RIOB18_X79Y183,IO_L8N_T1_AD10N_35
J14,35,IOB_X1Y176,RIOB18_X79Y175,IO_L12P_T1_MRCC_35
J15,35,IOB_X1Y181,RIOB18_X79Y181,IO_L9N_T1_DQS_AD3N_35
J16,501,IOPAD_X1Y111,PSS2_X32Y157,PS_MIO34_501
J18,501,IOPAD_X1Y105,PSS2_X32Y157,PS_MIO28_501
J19,501,IOPAD_X1Y101,PSS2_X32Y157,PS_MIO24_501
J20,502,IOPAD_X1Y18,PSS2_X32Y157,PS_DDR_A13_502
J21,502,IOPAD_X1Y11,PSS2_X32Y157,PS_DDR_A7_502
J23,502,IOPAD_X1Y39,PSS2_X32Y157,PS_DDR_DQ7_502
J24,502,IOPAD_X1Y38,PSS2_X32Y157,PS_DDR_DQ6_502
J25,502,IOPAD_X1Y34,PSS2_X32Y157,PS_DDR_DQ2_502
J26,502,IOPAD_X1Y32,PSS2_X32Y157,PS_DDR_DQ0_502
K1,33,IOB_X1Y81,RIOB18_X79Y81,IO_L9N_T1_DQS_33
K2,33,IOB_X1Y82,RIOB18_X79Y81,IO_L9P_T1_DQS_33
K3,33,IOB_X1Y77,RIOB18_X79Y77,IO_L11N_T1_SRCC_33
K5,33,IOB_X1Y60,RIOB18_X79Y59,IO_L20P_T3_33
K6,33,IOB_X1Y56,RIOB18_X79Y55,IO_L22P_T3_33
K7,33,IOB_X1Y51,RIOB18_X79Y51,IO_L24N_T3_33
K8,33,IOB_X1Y52,RIOB18_X79Y51,IO_L24P_T3_33
K10,34,IOB_X1Y100,RIOB18_SING_X79Y100,IO_25_VRP_34
K11,34,IOB_X1Y149,RIOB18_SING_X79Y149,IO_0_VRN_34
K12,35,IOB_X1Y150,RIOB18_SING_X79Y150,IO_25_VRP_35
K13,35,IOB_X1Y184,RIOB18_X79Y183,IO_L8P_T1_AD10P_35
K15,35,IOB_X1Y182,RIOB18_X79Y181,IO_L9P_T1_DQS_AD3P_35
K16,501,IOPAD_X1Y113,PSS2_X32Y157,PS_MIO36_501
K17,501,IOPAD_X1Y109,PSS2_X32Y157,PS_MIO32_501
K19,501,IOPAD_X1Y107,PSS2_X32Y157,PS_MIO30_501
K20,502,IOPAD_X1Y5,PSS2_X32Y157,PS_DDR_A1_502
K22,502,IOPAD_X1Y4,PSS2_X32Y157,PS_DDR_A0_502
K23,502,IOPAD_X1Y43,PSS2_X32Y157,PS_DDR_DQ11_502
K25,502,IOPAD_X1Y29,PSS2_X32Y157,PS_DDR_DM1_502
K26,502,IOPAD_X1Y40,PSS2_X32Y157,PS_DDR_DQ8_502
L2,33,IOB_X1Y67,RIOB18_X79Y67,IO_L16N_T2_33
L3,33,IOB_X1Y78,RIOB18_X79Y77,IO_L11P_T1_SRCC_33
L4,33,IOB_X1Y71,RIOB18_X79Y71,IO_L14N_T2_SRCC_33
L5,33,IOB_X1Y72,RIOB18_X79Y71,IO_L14P_T2_SRCC_33
L7,33,IOB_X1Y61,RIOB18_X79Y61,IO_L19N_T3_VREF_33
L8,33,IOB_X1Y57,RIOB18_X79Y57,IO_L21N_T3_DQS_33
L9,33,IOB_X1Y99,RIOB18_SING_X79Y99,IO_0_VRN_33
L20,502,IOPAD_X1Y10,PSS2_X32Y157,PS_DDR_A6_502
L22,502,IOPAD_X1Y7,PSS2_X32Y157,PS_DDR_A3_502
L23,502,IOPAD_X1Y41,PSS2_X32Y157,PS_DDR_DQ9_502
L24,502,IOPAD_X1Y69,PSS2_X32Y157,PS_DDR_DQS_P1_502
L25,502,IOPAD_X1Y65,PSS2_X32Y157,PS_DDR_DQS_N1_502
M1,33,IOB_X1Y63,RIOB18_X79Y63,IO_L18N_T2_33
M2,33,IOB_X1Y68,RIOB18_X79Y67,IO_L16P_T2_33
M4,33,IOB_X1Y65,RIOB18_X79Y65,IO_L17N_T2_33
M5,33,IOB_X1Y73,RIOB18_X79Y73,IO_L13N_T2_MRCC_33
M6,33,IOB_X1Y74,RIOB18_X79Y73,IO_L13P_T2_MRCC_33
M7,33,IOB_X1Y62,RIOB18_X79Y61,IO_L19P_T3_33
M8,33,IOB_X1Y58,RIOB18_X79Y57,IO_L21P_T3_DQS_33
M20,502,IOPAD_X1Y8,PSS2_X32Y157,PS_DDR_A4_502
M22,502,IOPAD_X1Y14,PSS2_X32Y157,PS_DDR_A10_502
M24,502,IOPAD_X1Y46,PSS2_X32Y157,PS_DDR_DQ14_502
M25,502,IOPAD_X1Y44,PSS2_X32Y157,PS_DDR_DQ12_502
M26,502,IOPAD_X1Y42,PSS2_X32Y157,PS_DDR_DQ10_502
N1,33,IOB_X1Y64,RIOB18_X79Y63,IO_L18P_T2_33
N2,33,IOB_X1Y69,RIOB18_X79Y69,IO_L15N_T2_DQS_33
N3,33,IOB_X1Y70,RIOB18_X79Y69,IO_L15P_T2_DQS_33
N4,33,IOB_X1Y66,RIOB18_X79Y65,IO_L17P_T2_33
N6,33,IOB_X1Y53,RIOB18_X79Y53,IO_L23N_T3_33
N7,33,IOB_X1Y54,RIOB18_X79Y53,IO_L23P_T3_33
N8,33,IOB_X1Y50,RIOB18_SING_X79Y50,IO_25_VRP_33
N14,0,IPAD_X0Y30,MONITOR_BOT_PELE1_X134Y183,VP_0
N21,502,IOPAD_X1Y6,PSS2_X32Y157,PS_DDR_A2_502
N22,502,IOPAD_X1Y9,PSS2_X32Y157,PS_DDR_A5_502
N23,502,IOPAD_X1Y47,PSS2_X32Y157,PS_DDR_DQ15_502
N24,502,IOPAD_X1Y45,PSS2_X32Y157,PS_DDR_DQ13_502
N26,502,IOPAD_X1Y50,PSS2_X32Y157,PS_DDR_DQ18_502
P13,0,IPAD_X0Y31,MONITOR_BOT_PELE1_X134Y183,VN_0
P20,502,IOPAD_X1Y16,PSS2_X32Y157,PS_DDR_A12_502
P21,502,IOPAD_X1Y24,PSS2_X32Y157,PS_DDR_CKN_502
P23,502,IOPAD_X1Y51,PSS2_X32Y157,PS_DDR_DQ19_502
P24,502,IOPAD_X1Y49,PSS2_X32Y157,PS_DDR_DQ17_502
P25,502,IOPAD_X1Y70,PSS2_X32Y157,PS_DDR_DQS_P2_502
P26,502,IOPAD_X1Y30,PSS2_X32Y157,PS_DDR_DM2_502
R1,112,OPAD_X0Y6,GTX_CHANNEL_3_X186Y46,MGTXTXN3_112
R2,112,OPAD_X0Y7,GTX_CHANNEL_3_X186Y46,MGTXTXP3_112
R5,112,IPAD_X1Y9,GTX_COMMON_X186Y23,MGTREFCLK0N_112
R6,112,IPAD_X1Y8,GTX_COMMON_X186Y23,MGTREFCLK0P_112
R20,502,IOPAD_X1Y17,PSS2_X32Y157,PS_DDR_A14_502
R21,502,IOPAD_X1Y25,PSS2_X32Y157,PS_DDR_CKP_502
R22,502,IOPAD_X1Y21,PSS2_X32Y157,PS_DDR_BA2_502
R23,502,IOPAD_X1Y55,PSS2_X32Y157,PS_DDR_DQ23_502
R25,502,IOPAD_X1Y66,PSS2_X32Y157,PS_DDR_DQS_N2_502
R26,502,IOPAD_X1Y48,PSS2_X32Y157,PS_DDR_DQ16_502
T3,112,IPAD_X1Y24,GTX_CHANNEL_3_X186Y46,MGTXRXN3_112
T4,112,IPAD_X1Y25,GTX_CHANNEL_3_X186Y46,MGTXRXP3_112
T20,502,IOPAD_X1Y12,PSS2_X32Y157,PS_DDR_A8_502
T22,502,IOPAD_X1Y20,PSS2_X32Y157,PS_DDR_BA1_502
T23,502,IOPAD_X1Y54,PSS2_X32Y157,PS_DDR_DQ22_502
T24,502,IOPAD_X1Y52,PSS2_X32Y157,PS_DDR_DQ20_502
T25,502,IOPAD_X1Y53,PSS2_X32Y157,PS_DDR_DQ21_502
U1,112,OPAD_X0Y4,GTX_CHANNEL_2_X186Y35,MGTXTXN2_112
U2,112,OPAD_X0Y5,GTX_CHANNEL_2_X186Y35,MGTXTXP2_112
U5,112,IPAD_X1Y11,GTX_COMMON_X186Y23,MGTREFCLK1N_112
U6,112,IPAD_X1Y10,GTX_COMMON_X186Y23,MGTREFCLK1P_112
U20,502,IOPAD_X1Y13,PSS2_X32Y157,PS_DDR_A9_502
U21,502,IOPAD_X1Y23,PSS2_X32Y157,PS_DDR_CKE_502
U22,502,IOPAD_X1Y19,PSS2_X32Y157,PS_DDR_BA0_502
U24,502,IOPAD_X1Y58,PSS2_X32Y157,PS_DDR_DQ26_502
U25,502,IOPAD_X1Y59,PSS2_X32Y157,PS_DDR_DQ27_502
U26,502,IOPAD_X1Y57,PSS2_X32Y157,PS_DDR_DQ25_502
V3,112,IPAD_X1Y18,GTX_CHANNEL_2_X186Y35,MGTXRXN2_112
V4,112,IPAD_X1Y19,GTX_CHANNEL_2_X186Y35,MGTXRXP2_112
V18,13,IOB_X0Y50,LIOB33_SING_X0Y50,IO_25_13
V19,13,IOB_X0Y99,LIOB33_SING_X0Y99,IO_0_13
V21,502,IOPAD_X1Y2,PSS2_X32Y157,PS_DDR_VRN_502
V22,502,IOPAD_X1Y1,PSS2_X32Y157,PS_DDR_WE_B_502
V23,502,IOPAD_X1Y133,PSS2_X32Y157,PS_DDR_RAS_B_502
V24,502,IOPAD_X1Y56,PSS2_X32Y157,PS_DDR_DQ24_502
V26,502,IOPAD_X1Y31,PSS2_X32Y157,PS_DDR_DM3_502
W1,112,OPAD_X0Y2,GTX_CHANNEL_1_X186Y17,MGTXTXN1_112
W2,112,OPAD_X0Y3,GTX_CHANNEL_1_X186Y17,MGTXTXP1_112
W13,12,IOB_X0Y40,LIOB33_X0Y39,IO_L5P_T0_12
W14,12,IOB_X0Y49,LIOB33_SING_X0Y49,IO_0_12
W15,12,IOB_X0Y1,LIOB33_X0Y1,IO_L24N_T3_12
W16,12,IOB_X0Y2,LIOB33_X0Y1,IO_L24P_T3_12
W17,12,IOB_X0Y0,LIOB33_SING_X0Y0,IO_25_12
W18,13,IOB_X0Y54,LIOB33_X0Y53,IO_L23P_T3_13
W19,13,IOB_X0Y53,LIOB33_X0Y53,IO_L23N_T3_13
W20,13,IOB_X0Y62,LIOB33_X0Y61,IO_L19P_T3_13
W21,502,IOPAD_X1Y3,PSS2_X32Y157,PS_DDR_VRP_502
W23,502,IOPAD_X1Y63,PSS2_X32Y157,PS_DDR_DQ31_502
W24,502,IOPAD_X1Y71,PSS2_X32Y157,PS_DDR_DQS_P3_502
W25,502,IOPAD_X1Y67,PSS2_X32Y157,PS_DDR_DQS_N3_502
W26,502,IOPAD_X1Y60,PSS2_X32Y157,PS_DDR_DQ28_502
Y3,112,IPAD_X1Y6,GTX_CHANNEL_1_X186Y17,MGTXRXN1_112
Y4,112,IPAD_X1Y7,GTX_CHANNEL_1_X186Y17,MGTXRXP1_112
Y10,12,IOB_X0Y44,LIOB33_X0Y43,IO_L3P_T0_DQS_12
Y11,12,IOB_X0Y47,LIOB33_X0Y47,IO_L1N_T0_12
Y12,12,IOB_X0Y48,LIOB33_X0Y47,IO_L1P_T0_12
Y13,12,IOB_X0Y39,LIOB33_X0Y39,IO_L5N_T0_12
Y15,12,IOB_X0Y3,LIOB33_X0Y3,IO_L23N_T3_12
Y16,12,IOB_X0Y4,LIOB33_X0Y3,IO_L23P_T3_12
Y17,12,IOB_X0Y12,LIOB33_X0Y11,IO_L19P_T3_12
Y18,13,IOB_X0Y52,LIOB33_X0Y51,IO_L24P_T3_13
Y20,13,IOB_X0Y61,LIOB33_X0Y61,IO_L19N_T3_VREF_13
Y21,502,IOPAD_X1Y27,PSS2_X32Y157,PS_DDR_CS_B_502
Y22,502,IOPAD_X1Y131,PSS2_X32Y157,PS_DDR_ODT_502
Y23,502,IOPAD_X1Y22,PSS2_X32Y157,PS_DDR_CAS_B_502
Y25,502,IOPAD_X1Y61,PSS2_X32Y157,PS_DDR_DQ29_502
Y26,502,IOPAD_X1Y62,PSS2_X32Y157,PS_DDR_DQ30_502
1 pin bank site tile pin_function
2 A2 34 IOB_X1Y101 RIOB18_X79Y101 IO_L24N_T3_34
3 A3 34 IOB_X1Y105 RIOB18_X79Y105 IO_L22N_T3_34
4 A4 34 IOB_X1Y106 RIOB18_X79Y105 IO_L22P_T3_34
5 A5 34 IOB_X1Y107 RIOB18_X79Y107 IO_L21N_T3_DQS_34
6 A7 34 IOB_X1Y113 RIOB18_X79Y113 IO_L18N_T2_34
7 A8 34 IOB_X1Y115 RIOB18_X79Y115 IO_L17N_T2_34
8 A9 34 IOB_X1Y116 RIOB18_X79Y115 IO_L17P_T2_34
9 A10 34 IOB_X1Y117 RIOB18_X79Y117 IO_L16N_T2_34
10 A12 35 IOB_X1Y151 RIOB18_X79Y151 IO_L24N_T3_AD15N_35
11 A13 35 IOB_X1Y152 RIOB18_X79Y151 IO_L24P_T3_AD15P_35
12 A14 35 IOB_X1Y157 RIOB18_X79Y157 IO_L21N_T3_DQS_AD14N_35
13 A15 35 IOB_X1Y158 RIOB18_X79Y157 IO_L21P_T3_DQS_AD14P_35
14 A17 35 IOB_X1Y163 RIOB18_X79Y163 IO_L18N_T2_AD13N_35
15 A18 501 IOPAD_X1Y126 PSS2_X32Y157 PS_MIO49_501
16 A19 501 IOPAD_X1Y130 PSS2_X32Y157 PS_MIO53_501
17 A20 501 IOPAD_X1Y129 PSS2_X32Y157 PS_MIO52_501
18 A22 501 IOPAD_X1Y134 PSS2_X32Y157 PS_SRST_B_501
19 A23 500 IOPAD_X1Y89 PSS2_X32Y157 PS_MIO12_500
20 A24 500 IOPAD_X1Y85 PSS2_X32Y157 PS_MIO8_500
21 A25 500 IOPAD_X1Y87 PSS2_X32Y157 PS_MIO10_500
22 AA1 112 OPAD_X0Y0 GTX_CHANNEL_0_X186Y6 MGTXTXN0_112
23 AA2 112 OPAD_X0Y1 GTX_CHANNEL_0_X186Y6 MGTXTXP0_112
24 AA10 12 IOB_X0Y43 LIOB33_X0Y43 IO_L3N_T0_DQS_12
25 AA12 12 IOB_X0Y37 LIOB33_X0Y37 IO_L6N_T0_VREF_12
26 AA13 12 IOB_X0Y38 LIOB33_X0Y37 IO_L6P_T0_12
27 AA14 12 IOB_X0Y5 LIOB33_X0Y5 IO_L22N_T3_12
28 AA15 12 IOB_X0Y6 LIOB33_X0Y5 IO_L22P_T3_12
29 AA17 12 IOB_X0Y11 LIOB33_X0Y11 IO_L19N_T3_VREF_12
30 AA18 13 IOB_X0Y51 LIOB33_X0Y51 IO_L24N_T3_13
31 AA19 13 IOB_X0Y56 LIOB33_X0Y55 IO_L22P_T3_13
32 AA20 13 IOB_X0Y60 LIOB33_X0Y59 IO_L20P_T3_13
33 AA22 13 IOB_X0Y80 LIOB33_X0Y79 IO_L10P_T1_13
34 AA23 13 IOB_X0Y79 LIOB33_X0Y79 IO_L10N_T1_13
35 AA24 13 IOB_X0Y88 LIOB33_X0Y87 IO_L6P_T0_13
36 AA25 13 IOB_X0Y98 LIOB33_X0Y97 IO_L1P_T0_13
37 AB3 112 IPAD_X1Y0 GTX_CHANNEL_0_X186Y6 MGTXRXN0_112
38 AB4 112 IPAD_X1Y1 GTX_CHANNEL_0_X186Y6 MGTXRXP0_112
39 AB10 12 IOB_X0Y41 LIOB33_X0Y41 IO_L4N_T0_12
40 AB11 12 IOB_X0Y42 LIOB33_X0Y41 IO_L4P_T0_12
41 AB12 12 IOB_X0Y46 LIOB33_X0Y45 IO_L2P_T0_12
42 AB14 12 IOB_X0Y21 LIOB33_X0Y21 IO_L14N_T2_SRCC_12
43 AB15 12 IOB_X0Y22 LIOB33_X0Y21 IO_L14P_T2_SRCC_12
44 AB16 12 IOB_X0Y9 LIOB33_X0Y9 IO_L20N_T3_12
45 AB17 12 IOB_X0Y10 LIOB33_X0Y9 IO_L20P_T3_12
46 AB19 13 IOB_X0Y55 LIOB33_X0Y55 IO_L22N_T3_13
47 AB20 13 IOB_X0Y59 LIOB33_X0Y59 IO_L20N_T3_13
48 AB21 13 IOB_X0Y82 LIOB33_X0Y81 IO_L9P_T1_DQS_13
49 AB22 13 IOB_X0Y81 LIOB33_X0Y81 IO_L9N_T1_DQS_13
50 AB24 13 IOB_X0Y87 LIOB33_X0Y87 IO_L6N_T0_VREF_13
51 AB25 13 IOB_X0Y97 LIOB33_X0Y97 IO_L1N_T0_13
52 AB26 13 IOB_X0Y96 LIOB33_X0Y95 IO_L2P_T0_13
53 AC11 12 IOB_X0Y45 LIOB33_X0Y45 IO_L2N_T0_12
54 AC12 12 IOB_X0Y28 LIOB33_X0Y27 IO_L11P_T1_SRCC_12
55 AC13 12 IOB_X0Y26 LIOB33_X0Y25 IO_L12P_T1_MRCC_12
56 AC14 12 IOB_X0Y24 LIOB33_X0Y23 IO_L13P_T2_MRCC_12
57 AC16 12 IOB_X0Y7 LIOB33_X0Y7 IO_L21N_T3_DQS_12
58 AC17 12 IOB_X0Y8 LIOB33_X0Y7 IO_L21P_T3_DQS_12
59 AC18 13 IOB_X0Y58 LIOB33_X0Y57 IO_L21P_T3_DQS_13
60 AC19 13 IOB_X0Y57 LIOB33_X0Y57 IO_L21N_T3_DQS_13
61 AC21 13 IOB_X0Y72 LIOB33_X0Y71 IO_L14P_T2_SRCC_13
62 AC22 13 IOB_X0Y71 LIOB33_X0Y71 IO_L14N_T2_SRCC_13
63 AC23 13 IOB_X0Y76 LIOB33_X0Y75 IO_L12P_T1_MRCC_13
64 AC24 13 IOB_X0Y75 LIOB33_X0Y75 IO_L12N_T1_MRCC_13
65 AC26 13 IOB_X0Y95 LIOB33_X0Y95 IO_L2N_T0_13
66 AD10 12 IOB_X0Y35 LIOB33_X0Y35 IO_L7N_T1_12
67 AD11 12 IOB_X0Y27 LIOB33_X0Y27 IO_L11N_T1_SRCC_12
68 AD13 12 IOB_X0Y25 LIOB33_X0Y25 IO_L12N_T1_MRCC_12
69 AD14 12 IOB_X0Y23 LIOB33_X0Y23 IO_L13N_T2_MRCC_12
70 AD15 12 IOB_X0Y19 LIOB33_X0Y19 IO_L15N_T2_DQS_12
71 AD16 12 IOB_X0Y20 LIOB33_X0Y19 IO_L15P_T2_DQS_12
72 AD18 13 IOB_X0Y66 LIOB33_X0Y65 IO_L17P_T2_13
73 AD19 13 IOB_X0Y65 LIOB33_X0Y65 IO_L17N_T2_13
74 AD20 13 IOB_X0Y74 LIOB33_X0Y73 IO_L13P_T2_MRCC_13
75 AD21 13 IOB_X0Y73 LIOB33_X0Y73 IO_L13N_T2_MRCC_13
76 AD23 13 IOB_X0Y78 LIOB33_X0Y77 IO_L11P_T1_SRCC_13
77 AD24 13 IOB_X0Y77 LIOB33_X0Y77 IO_L11N_T1_SRCC_13
78 AD25 13 IOB_X0Y92 LIOB33_X0Y91 IO_L4P_T0_13
79 AD26 13 IOB_X0Y91 LIOB33_X0Y91 IO_L4N_T0_13
80 AE10 12 IOB_X0Y36 LIOB33_X0Y35 IO_L7P_T1_12
81 AE11 12 IOB_X0Y32 LIOB33_X0Y31 IO_L9P_T1_DQS_12
82 AE12 12 IOB_X0Y34 LIOB33_X0Y33 IO_L8P_T1_12
83 AE13 12 IOB_X0Y30 LIOB33_X0Y29 IO_L10P_T1_12
84 AE15 12 IOB_X0Y15 LIOB33_X0Y15 IO_L17N_T2_12
85 AE16 12 IOB_X0Y16 LIOB33_X0Y15 IO_L17P_T2_12
86 AE17 12 IOB_X0Y14 LIOB33_X0Y13 IO_L18P_T2_12
87 AE18 13 IOB_X0Y64 LIOB33_X0Y63 IO_L18P_T2_13
88 AE20 13 IOB_X0Y68 LIOB33_X0Y67 IO_L16P_T2_13
89 AE21 13 IOB_X0Y67 LIOB33_X0Y67 IO_L16N_T2_13
90 AE22 13 IOB_X0Y86 LIOB33_X0Y85 IO_L7P_T1_13
91 AE23 13 IOB_X0Y84 LIOB33_X0Y83 IO_L8P_T1_13
92 AE25 13 IOB_X0Y94 LIOB33_X0Y93 IO_L3P_T0_DQS_13
93 AE26 13 IOB_X0Y93 LIOB33_X0Y93 IO_L3N_T0_DQS_13
94 AF10 12 IOB_X0Y31 LIOB33_X0Y31 IO_L9N_T1_DQS_12
95 AF12 12 IOB_X0Y33 LIOB33_X0Y33 IO_L8N_T1_12
96 AF13 12 IOB_X0Y29 LIOB33_X0Y29 IO_L10N_T1_12
97 AF14 12 IOB_X0Y17 LIOB33_X0Y17 IO_L16N_T2_12
98 AF15 12 IOB_X0Y18 LIOB33_X0Y17 IO_L16P_T2_12
99 AF17 12 IOB_X0Y13 LIOB33_X0Y13 IO_L18N_T2_12
100 AF18 13 IOB_X0Y63 LIOB33_X0Y63 IO_L18N_T2_13
101 AF19 13 IOB_X0Y70 LIOB33_X0Y69 IO_L15P_T2_DQS_13
102 AF20 13 IOB_X0Y69 LIOB33_X0Y69 IO_L15N_T2_DQS_13
103 AF22 13 IOB_X0Y85 LIOB33_X0Y85 IO_L7N_T1_13
104 AF23 13 IOB_X0Y83 LIOB33_X0Y83 IO_L8N_T1_13
105 AF24 13 IOB_X0Y90 LIOB33_X0Y89 IO_L5P_T0_13
106 AF25 13 IOB_X0Y89 LIOB33_X0Y89 IO_L5N_T0_13
107 B1 34 IOB_X1Y103 RIOB18_X79Y103 IO_L23N_T3_34
108 B2 34 IOB_X1Y102 RIOB18_X79Y101 IO_L24P_T3_34
109 B4 34 IOB_X1Y109 RIOB18_X79Y109 IO_L20N_T3_34
110 B5 34 IOB_X1Y110 RIOB18_X79Y109 IO_L20P_T3_34
111 B6 34 IOB_X1Y108 RIOB18_X79Y107 IO_L21P_T3_DQS_34
112 B7 34 IOB_X1Y114 RIOB18_X79Y113 IO_L18P_T2_34
113 B9 34 IOB_X1Y119 RIOB18_X79Y119 IO_L15N_T2_DQS_34
114 B10 34 IOB_X1Y118 RIOB18_X79Y117 IO_L16P_T2_34
115 B11 35 IOB_X1Y153 RIOB18_X79Y153 IO_L23N_T3_35
116 B12 35 IOB_X1Y155 RIOB18_X79Y155 IO_L22N_T3_AD7N_35
117 B14 35 IOB_X1Y159 RIOB18_X79Y159 IO_L20N_T3_AD6N_35
118 B15 35 IOB_X1Y165 RIOB18_X79Y165 IO_L17N_T2_AD5N_35
119 B16 35 IOB_X1Y166 RIOB18_X79Y165 IO_L17P_T2_AD5P_35
120 B17 35 IOB_X1Y164 RIOB18_X79Y163 IO_L18P_T2_AD13P_35
121 B19 501 IOPAD_X1Y124 PSS2_X32Y157 PS_MIO47_501
122 B20 501 IOPAD_X1Y128 PSS2_X32Y157 PS_MIO51_501
123 B21 501 IOPAD_X1Y125 PSS2_X32Y157 PS_MIO48_501
124 B22 501 IOPAD_X1Y127 PSS2_X32Y157 PS_MIO50_501
125 B24 500 IOPAD_X1Y26 PSS2_X32Y157 PS_CLK_500
126 B25 500 IOPAD_X1Y90 PSS2_X32Y157 PS_MIO13_500
127 B26 500 IOPAD_X1Y88 PSS2_X32Y157 PS_MIO11_500
128 C1 33 IOB_X1Y91 RIOB18_X79Y91 IO_L4N_T0_33
129 C2 34 IOB_X1Y104 RIOB18_X79Y103 IO_L23P_T3_34
130 C3 34 IOB_X1Y111 RIOB18_X79Y111 IO_L19N_T3_VREF_34
131 C4 34 IOB_X1Y112 RIOB18_X79Y111 IO_L19P_T3_34
132 C6 34 IOB_X1Y121 RIOB18_X79Y121 IO_L14N_T2_SRCC_34
133 C7 34 IOB_X1Y123 RIOB18_X79Y123 IO_L13N_T2_MRCC_34
134 C8 34 IOB_X1Y124 RIOB18_X79Y123 IO_L13P_T2_MRCC_34
135 C9 34 IOB_X1Y120 RIOB18_X79Y119 IO_L15P_T2_DQS_34
136 C11 35 IOB_X1Y154 RIOB18_X79Y153 IO_L23P_T3_35
137 C12 35 IOB_X1Y156 RIOB18_X79Y155 IO_L22P_T3_AD7P_35
138 C13 35 IOB_X1Y161 RIOB18_X79Y161 IO_L19N_T3_VREF_35
139 C14 35 IOB_X1Y160 RIOB18_X79Y159 IO_L20P_T3_AD6P_35
140 C16 35 IOB_X1Y169 RIOB18_X79Y169 IO_L15N_T2_DQS_AD12N_35
141 C17 35 IOB_X1Y170 RIOB18_X79Y169 IO_L15P_T2_DQS_AD12P_35
142 C18 501 IOPAD_X1Y122 PSS2_X32Y157 PS_MIO45_501
143 C19 501 IOPAD_X1Y118 PSS2_X32Y157 PS_MIO41_501
144 C21 501 IOPAD_X1Y116 PSS2_X32Y157 PS_MIO39_501
145 C22 501 IOPAD_X1Y117 PSS2_X32Y157 PS_MIO40_501
146 C23 500 IOPAD_X1Y132 PSS2_X32Y157 PS_POR_B_500
147 C24 500 IOPAD_X1Y92 PSS2_X32Y157 PS_MIO15_500
148 C26 500 IOPAD_X1Y82 PSS2_X32Y157 PS_MIO5_500
149 D1 33 IOB_X1Y92 RIOB18_X79Y91 IO_L4P_T0_33
150 D3 33 IOB_X1Y95 RIOB18_X79Y95 IO_L2N_T0_33
151 D4 33 IOB_X1Y96 RIOB18_X79Y95 IO_L2P_T0_33
152 D5 34 IOB_X1Y129 RIOB18_X79Y129 IO_L10N_T1_34
153 D6 34 IOB_X1Y122 RIOB18_X79Y121 IO_L14P_T2_SRCC_34
154 D8 34 IOB_X1Y133 RIOB18_X79Y133 IO_L8N_T1_34
155 D9 34 IOB_X1Y134 RIOB18_X79Y133 IO_L8P_T1_34
156 D10 35 IOB_X1Y195 RIOB18_X79Y195 IO_L2N_T0_AD8N_35
157 D11 35 IOB_X1Y191 RIOB18_X79Y191 IO_L4N_T0_35
158 D13 35 IOB_X1Y162 RIOB18_X79Y161 IO_L19P_T3_35
159 D14 35 IOB_X1Y173 RIOB18_X79Y173 IO_L13N_T2_MRCC_35
160 D15 35 IOB_X1Y174 RIOB18_X79Y173 IO_L13P_T2_MRCC_35
161 D16 35 IOB_X1Y167 RIOB18_X79Y167 IO_L16N_T2_35
162 D18 501 IOPAD_X1Y120 PSS2_X32Y157 PS_MIO43_501
163 D19 501 IOPAD_X1Y112 PSS2_X32Y157 PS_MIO35_501
164 D20 501 IOPAD_X1Y114 PSS2_X32Y157 PS_MIO37_501
165 D21 501 IOPAD_X1Y115 PSS2_X32Y157 PS_MIO38_501
166 D23 500 IOPAD_X1Y91 PSS2_X32Y157 PS_MIO14_500
167 D24 500 IOPAD_X1Y86 PSS2_X32Y157 PS_MIO9_500
168 D25 500 IOPAD_X1Y80 PSS2_X32Y157 PS_MIO3_500
169 D26 500 IOPAD_X1Y78 PSS2_X32Y157 PS_MIO1_500
170 E1 33 IOB_X1Y89 RIOB18_X79Y89 IO_L5N_T0_33
171 E2 33 IOB_X1Y90 RIOB18_X79Y89 IO_L5P_T0_33
172 E3 33 IOB_X1Y87 RIOB18_X79Y87 IO_L6N_T0_VREF_33
173 E5 34 IOB_X1Y135 RIOB18_X79Y135 IO_L7N_T1_34
174 E6 34 IOB_X1Y130 RIOB18_X79Y129 IO_L10P_T1_34
175 E7 34 IOB_X1Y127 RIOB18_X79Y127 IO_L11N_T1_SRCC_34
176 E8 34 IOB_X1Y131 RIOB18_X79Y131 IO_L9N_T1_DQS_34
177 E10 35 IOB_X1Y196 RIOB18_X79Y195 IO_L2P_T0_AD8P_35
178 E11 35 IOB_X1Y192 RIOB18_X79Y191 IO_L4P_T0_35
179 E12 35 IOB_X1Y197 RIOB18_X79Y197 IO_L1N_T0_AD0N_35
180 E13 35 IOB_X1Y187 RIOB18_X79Y187 IO_L6N_T0_VREF_35
181 E15 35 IOB_X1Y171 RIOB18_X79Y171 IO_L14N_T2_AD4N_SRCC_35
182 E16 35 IOB_X1Y168 RIOB18_X79Y167 IO_L16P_T2_35
183 E17 501 IOPAD_X1Y123 PSS2_X32Y157 PS_MIO46_501
184 E18 501 IOPAD_X1Y121 PSS2_X32Y157 PS_MIO44_501
185 E20 501 IOPAD_X1Y106 PSS2_X32Y157 PS_MIO29_501
186 E21 501 IOPAD_X1Y108 PSS2_X32Y157 PS_MIO31_501
187 E22 501 IOPAD_X1Y110 PSS2_X32Y157 PS_MIO33_501
188 E23 500 IOPAD_X1Y84 PSS2_X32Y157 PS_MIO7_500
189 E25 500 IOPAD_X1Y79 PSS2_X32Y157 PS_MIO2_500
190 E26 500 IOPAD_X1Y77 PSS2_X32Y157 PS_MIO0_500
191 F2 33 IOB_X1Y93 RIOB18_X79Y93 IO_L3N_T0_DQS_33
192 F3 33 IOB_X1Y88 RIOB18_X79Y87 IO_L6P_T0_33
193 F4 33 IOB_X1Y97 RIOB18_X79Y97 IO_L1N_T0_33
194 F5 34 IOB_X1Y136 RIOB18_X79Y135 IO_L7P_T1_34
195 F7 34 IOB_X1Y125 RIOB18_X79Y125 IO_L12N_T1_MRCC_34
196 F8 34 IOB_X1Y128 RIOB18_X79Y127 IO_L11P_T1_SRCC_34
197 F9 34 IOB_X1Y132 RIOB18_X79Y131 IO_L9P_T1_DQS_34
198 F10 35 IOB_X1Y193 RIOB18_X79Y193 IO_L3N_T0_DQS_AD1N_35
199 F12 35 IOB_X1Y198 RIOB18_X79Y197 IO_L1P_T0_AD0P_35
200 F13 35 IOB_X1Y188 RIOB18_X79Y187 IO_L6P_T0_35
201 F14 35 IOB_X1Y177 RIOB18_X79Y177 IO_L11N_T1_SRCC_35
202 F15 35 IOB_X1Y172 RIOB18_X79Y171 IO_L14P_T2_AD4P_SRCC_35
203 F17 501 IOPAD_X1Y119 PSS2_X32Y157 PS_MIO42_501
204 F18 501 IOPAD_X1Y104 PSS2_X32Y157 PS_MIO27_501
205 F19 501 IOPAD_X1Y102 PSS2_X32Y157 PS_MIO25_501
206 F20 501 IOPAD_X1Y100 PSS2_X32Y157 PS_MIO23_501
207 F22 501 IOPAD_X1Y98 PSS2_X32Y157 PS_MIO21_501
208 F23 500 IOPAD_X1Y83 PSS2_X32Y157 PS_MIO6_500
209 F24 500 IOPAD_X1Y81 PSS2_X32Y157 PS_MIO4_500
210 F25 502 IOPAD_X1Y33 PSS2_X32Y157 PS_DDR_DQ1_502
211 G1 33 IOB_X1Y79 RIOB18_X79Y79 IO_L10N_T1_33
212 G2 33 IOB_X1Y94 RIOB18_X79Y93 IO_L3P_T0_DQS_33
213 G4 33 IOB_X1Y98 RIOB18_X79Y97 IO_L1P_T0_33
214 G5 34 IOB_X1Y145 RIOB18_X79Y145 IO_L2N_T0_34
215 G6 34 IOB_X1Y146 RIOB18_X79Y145 IO_L2P_T0_34
216 G7 34 IOB_X1Y126 RIOB18_X79Y125 IO_L12P_T1_MRCC_34
217 G9 34 IOB_X1Y143 RIOB18_X79Y143 IO_L3N_T0_DQS_34
218 G10 35 IOB_X1Y194 RIOB18_X79Y193 IO_L3P_T0_DQS_AD1P_35
219 G11 35 IOB_X1Y189 RIOB18_X79Y189 IO_L5N_T0_AD9N_35
220 G12 35 IOB_X1Y190 RIOB18_X79Y189 IO_L5P_T0_AD9P_35
221 G14 35 IOB_X1Y178 RIOB18_X79Y177 IO_L11P_T1_SRCC_35
222 G15 35 IOB_X1Y179 RIOB18_X79Y179 IO_L10N_T1_AD11N_35
223 G16 35 IOB_X1Y180 RIOB18_X79Y179 IO_L10P_T1_AD11P_35
224 G17 501 IOPAD_X1Y94 PSS2_X32Y157 PS_MIO17_501
225 G19 501 IOPAD_X1Y96 PSS2_X32Y157 PS_MIO19_501
226 G20 501 IOPAD_X1Y95 PSS2_X32Y157 PS_MIO18_501
227 G21 501 IOPAD_X1Y93 PSS2_X32Y157 PS_MIO16_501
228 G22 501 IOPAD_X1Y99 PSS2_X32Y157 PS_MIO22_501
229 G24 502 IOPAD_X1Y28 PSS2_X32Y157 PS_DDR_DM0_502
230 G25 502 IOPAD_X1Y64 PSS2_X32Y157 PS_DDR_DQS_N0_502
231 G26 502 IOPAD_X1Y35 PSS2_X32Y157 PS_DDR_DQ3_502
232 H1 33 IOB_X1Y85 RIOB18_X79Y85 IO_L7N_T1_33
233 H2 33 IOB_X1Y80 RIOB18_X79Y79 IO_L10P_T1_33
234 H3 33 IOB_X1Y83 RIOB18_X79Y83 IO_L8N_T1_33
235 H4 33 IOB_X1Y84 RIOB18_X79Y83 IO_L8P_T1_33
236 H6 34 IOB_X1Y141 RIOB18_X79Y141 IO_L4N_T0_34
237 H7 34 IOB_X1Y142 RIOB18_X79Y141 IO_L4P_T0_34
238 H8 34 IOB_X1Y137 RIOB18_X79Y137 IO_L6N_T0_VREF_34
239 H9 34 IOB_X1Y144 RIOB18_X79Y143 IO_L3P_T0_DQS_PUDC_B_34
240 H11 34 IOB_X1Y147 RIOB18_X79Y147 IO_L1N_T0_34
241 H12 35 IOB_X1Y185 RIOB18_X79Y185 IO_L7N_T1_AD2N_35
242 H13 35 IOB_X1Y186 RIOB18_X79Y185 IO_L7P_T1_AD2P_35
243 H14 35 IOB_X1Y175 RIOB18_X79Y175 IO_L12N_T1_MRCC_35
244 H16 35 IOB_X1Y199 RIOB18_SING_X79Y199 IO_0_VRN_35
245 H17 501 IOPAD_X1Y103 PSS2_X32Y157 PS_MIO26_501
246 H19 501 IOPAD_X1Y97 PSS2_X32Y157 PS_MIO20_501
247 H21 502 IOPAD_X1Y15 PSS2_X32Y157 PS_DDR_A11_502
248 H22 502 IOPAD_X1Y72 PSS2_X32Y157 PS_DDR_DRST_B_502
249 H23 502 IOPAD_X1Y37 PSS2_X32Y157 PS_DDR_DQ5_502
250 H24 502 IOPAD_X1Y68 PSS2_X32Y157 PS_DDR_DQS_P0_502
251 H26 502 IOPAD_X1Y36 PSS2_X32Y157 PS_DDR_DQ4_502
252 J1 33 IOB_X1Y86 RIOB18_X79Y85 IO_L7P_T1_33
253 J3 33 IOB_X1Y75 RIOB18_X79Y75 IO_L12N_T1_MRCC_33
254 J4 33 IOB_X1Y76 RIOB18_X79Y75 IO_L12P_T1_MRCC_33
255 J5 33 IOB_X1Y59 RIOB18_X79Y59 IO_L20N_T3_33
256 J6 33 IOB_X1Y55 RIOB18_X79Y55 IO_L22N_T3_33
257 J8 34 IOB_X1Y138 RIOB18_X79Y137 IO_L6P_T0_34
258 J9 34 IOB_X1Y139 RIOB18_X79Y139 IO_L5N_T0_34
259 J10 34 IOB_X1Y140 RIOB18_X79Y139 IO_L5P_T0_34
260 J11 34 IOB_X1Y148 RIOB18_X79Y147 IO_L1P_T0_34
261 J13 35 IOB_X1Y183 RIOB18_X79Y183 IO_L8N_T1_AD10N_35
262 J14 35 IOB_X1Y176 RIOB18_X79Y175 IO_L12P_T1_MRCC_35
263 J15 35 IOB_X1Y181 RIOB18_X79Y181 IO_L9N_T1_DQS_AD3N_35
264 J16 501 IOPAD_X1Y111 PSS2_X32Y157 PS_MIO34_501
265 J18 501 IOPAD_X1Y105 PSS2_X32Y157 PS_MIO28_501
266 J19 501 IOPAD_X1Y101 PSS2_X32Y157 PS_MIO24_501
267 J20 502 IOPAD_X1Y18 PSS2_X32Y157 PS_DDR_A13_502
268 J21 502 IOPAD_X1Y11 PSS2_X32Y157 PS_DDR_A7_502
269 J23 502 IOPAD_X1Y39 PSS2_X32Y157 PS_DDR_DQ7_502
270 J24 502 IOPAD_X1Y38 PSS2_X32Y157 PS_DDR_DQ6_502
271 J25 502 IOPAD_X1Y34 PSS2_X32Y157 PS_DDR_DQ2_502
272 J26 502 IOPAD_X1Y32 PSS2_X32Y157 PS_DDR_DQ0_502
273 K1 33 IOB_X1Y81 RIOB18_X79Y81 IO_L9N_T1_DQS_33
274 K2 33 IOB_X1Y82 RIOB18_X79Y81 IO_L9P_T1_DQS_33
275 K3 33 IOB_X1Y77 RIOB18_X79Y77 IO_L11N_T1_SRCC_33
276 K5 33 IOB_X1Y60 RIOB18_X79Y59 IO_L20P_T3_33
277 K6 33 IOB_X1Y56 RIOB18_X79Y55 IO_L22P_T3_33
278 K7 33 IOB_X1Y51 RIOB18_X79Y51 IO_L24N_T3_33
279 K8 33 IOB_X1Y52 RIOB18_X79Y51 IO_L24P_T3_33
280 K10 34 IOB_X1Y100 RIOB18_SING_X79Y100 IO_25_VRP_34
281 K11 34 IOB_X1Y149 RIOB18_SING_X79Y149 IO_0_VRN_34
282 K12 35 IOB_X1Y150 RIOB18_SING_X79Y150 IO_25_VRP_35
283 K13 35 IOB_X1Y184 RIOB18_X79Y183 IO_L8P_T1_AD10P_35
284 K15 35 IOB_X1Y182 RIOB18_X79Y181 IO_L9P_T1_DQS_AD3P_35
285 K16 501 IOPAD_X1Y113 PSS2_X32Y157 PS_MIO36_501
286 K17 501 IOPAD_X1Y109 PSS2_X32Y157 PS_MIO32_501
287 K19 501 IOPAD_X1Y107 PSS2_X32Y157 PS_MIO30_501
288 K20 502 IOPAD_X1Y5 PSS2_X32Y157 PS_DDR_A1_502
289 K22 502 IOPAD_X1Y4 PSS2_X32Y157 PS_DDR_A0_502
290 K23 502 IOPAD_X1Y43 PSS2_X32Y157 PS_DDR_DQ11_502
291 K25 502 IOPAD_X1Y29 PSS2_X32Y157 PS_DDR_DM1_502
292 K26 502 IOPAD_X1Y40 PSS2_X32Y157 PS_DDR_DQ8_502
293 L2 33 IOB_X1Y67 RIOB18_X79Y67 IO_L16N_T2_33
294 L3 33 IOB_X1Y78 RIOB18_X79Y77 IO_L11P_T1_SRCC_33
295 L4 33 IOB_X1Y71 RIOB18_X79Y71 IO_L14N_T2_SRCC_33
296 L5 33 IOB_X1Y72 RIOB18_X79Y71 IO_L14P_T2_SRCC_33
297 L7 33 IOB_X1Y61 RIOB18_X79Y61 IO_L19N_T3_VREF_33
298 L8 33 IOB_X1Y57 RIOB18_X79Y57 IO_L21N_T3_DQS_33
299 L9 33 IOB_X1Y99 RIOB18_SING_X79Y99 IO_0_VRN_33
300 L20 502 IOPAD_X1Y10 PSS2_X32Y157 PS_DDR_A6_502
301 L22 502 IOPAD_X1Y7 PSS2_X32Y157 PS_DDR_A3_502
302 L23 502 IOPAD_X1Y41 PSS2_X32Y157 PS_DDR_DQ9_502
303 L24 502 IOPAD_X1Y69 PSS2_X32Y157 PS_DDR_DQS_P1_502
304 L25 502 IOPAD_X1Y65 PSS2_X32Y157 PS_DDR_DQS_N1_502
305 M1 33 IOB_X1Y63 RIOB18_X79Y63 IO_L18N_T2_33
306 M2 33 IOB_X1Y68 RIOB18_X79Y67 IO_L16P_T2_33
307 M4 33 IOB_X1Y65 RIOB18_X79Y65 IO_L17N_T2_33
308 M5 33 IOB_X1Y73 RIOB18_X79Y73 IO_L13N_T2_MRCC_33
309 M6 33 IOB_X1Y74 RIOB18_X79Y73 IO_L13P_T2_MRCC_33
310 M7 33 IOB_X1Y62 RIOB18_X79Y61 IO_L19P_T3_33
311 M8 33 IOB_X1Y58 RIOB18_X79Y57 IO_L21P_T3_DQS_33
312 M20 502 IOPAD_X1Y8 PSS2_X32Y157 PS_DDR_A4_502
313 M22 502 IOPAD_X1Y14 PSS2_X32Y157 PS_DDR_A10_502
314 M24 502 IOPAD_X1Y46 PSS2_X32Y157 PS_DDR_DQ14_502
315 M25 502 IOPAD_X1Y44 PSS2_X32Y157 PS_DDR_DQ12_502
316 M26 502 IOPAD_X1Y42 PSS2_X32Y157 PS_DDR_DQ10_502
317 N1 33 IOB_X1Y64 RIOB18_X79Y63 IO_L18P_T2_33
318 N2 33 IOB_X1Y69 RIOB18_X79Y69 IO_L15N_T2_DQS_33
319 N3 33 IOB_X1Y70 RIOB18_X79Y69 IO_L15P_T2_DQS_33
320 N4 33 IOB_X1Y66 RIOB18_X79Y65 IO_L17P_T2_33
321 N6 33 IOB_X1Y53 RIOB18_X79Y53 IO_L23N_T3_33
322 N7 33 IOB_X1Y54 RIOB18_X79Y53 IO_L23P_T3_33
323 N8 33 IOB_X1Y50 RIOB18_SING_X79Y50 IO_25_VRP_33
324 N14 0 IPAD_X0Y30 MONITOR_BOT_PELE1_X134Y183 VP_0
325 N21 502 IOPAD_X1Y6 PSS2_X32Y157 PS_DDR_A2_502
326 N22 502 IOPAD_X1Y9 PSS2_X32Y157 PS_DDR_A5_502
327 N23 502 IOPAD_X1Y47 PSS2_X32Y157 PS_DDR_DQ15_502
328 N24 502 IOPAD_X1Y45 PSS2_X32Y157 PS_DDR_DQ13_502
329 N26 502 IOPAD_X1Y50 PSS2_X32Y157 PS_DDR_DQ18_502
330 P13 0 IPAD_X0Y31 MONITOR_BOT_PELE1_X134Y183 VN_0
331 P20 502 IOPAD_X1Y16 PSS2_X32Y157 PS_DDR_A12_502
332 P21 502 IOPAD_X1Y24 PSS2_X32Y157 PS_DDR_CKN_502
333 P23 502 IOPAD_X1Y51 PSS2_X32Y157 PS_DDR_DQ19_502
334 P24 502 IOPAD_X1Y49 PSS2_X32Y157 PS_DDR_DQ17_502
335 P25 502 IOPAD_X1Y70 PSS2_X32Y157 PS_DDR_DQS_P2_502
336 P26 502 IOPAD_X1Y30 PSS2_X32Y157 PS_DDR_DM2_502
337 R1 112 OPAD_X0Y6 GTX_CHANNEL_3_X186Y46 MGTXTXN3_112
338 R2 112 OPAD_X0Y7 GTX_CHANNEL_3_X186Y46 MGTXTXP3_112
339 R5 112 IPAD_X1Y9 GTX_COMMON_X186Y23 MGTREFCLK0N_112
340 R6 112 IPAD_X1Y8 GTX_COMMON_X186Y23 MGTREFCLK0P_112
341 R20 502 IOPAD_X1Y17 PSS2_X32Y157 PS_DDR_A14_502
342 R21 502 IOPAD_X1Y25 PSS2_X32Y157 PS_DDR_CKP_502
343 R22 502 IOPAD_X1Y21 PSS2_X32Y157 PS_DDR_BA2_502
344 R23 502 IOPAD_X1Y55 PSS2_X32Y157 PS_DDR_DQ23_502
345 R25 502 IOPAD_X1Y66 PSS2_X32Y157 PS_DDR_DQS_N2_502
346 R26 502 IOPAD_X1Y48 PSS2_X32Y157 PS_DDR_DQ16_502
347 T3 112 IPAD_X1Y24 GTX_CHANNEL_3_X186Y46 MGTXRXN3_112
348 T4 112 IPAD_X1Y25 GTX_CHANNEL_3_X186Y46 MGTXRXP3_112
349 T20 502 IOPAD_X1Y12 PSS2_X32Y157 PS_DDR_A8_502
350 T22 502 IOPAD_X1Y20 PSS2_X32Y157 PS_DDR_BA1_502
351 T23 502 IOPAD_X1Y54 PSS2_X32Y157 PS_DDR_DQ22_502
352 T24 502 IOPAD_X1Y52 PSS2_X32Y157 PS_DDR_DQ20_502
353 T25 502 IOPAD_X1Y53 PSS2_X32Y157 PS_DDR_DQ21_502
354 U1 112 OPAD_X0Y4 GTX_CHANNEL_2_X186Y35 MGTXTXN2_112
355 U2 112 OPAD_X0Y5 GTX_CHANNEL_2_X186Y35 MGTXTXP2_112
356 U5 112 IPAD_X1Y11 GTX_COMMON_X186Y23 MGTREFCLK1N_112
357 U6 112 IPAD_X1Y10 GTX_COMMON_X186Y23 MGTREFCLK1P_112
358 U20 502 IOPAD_X1Y13 PSS2_X32Y157 PS_DDR_A9_502
359 U21 502 IOPAD_X1Y23 PSS2_X32Y157 PS_DDR_CKE_502
360 U22 502 IOPAD_X1Y19 PSS2_X32Y157 PS_DDR_BA0_502
361 U24 502 IOPAD_X1Y58 PSS2_X32Y157 PS_DDR_DQ26_502
362 U25 502 IOPAD_X1Y59 PSS2_X32Y157 PS_DDR_DQ27_502
363 U26 502 IOPAD_X1Y57 PSS2_X32Y157 PS_DDR_DQ25_502
364 V3 112 IPAD_X1Y18 GTX_CHANNEL_2_X186Y35 MGTXRXN2_112
365 V4 112 IPAD_X1Y19 GTX_CHANNEL_2_X186Y35 MGTXRXP2_112
366 V18 13 IOB_X0Y50 LIOB33_SING_X0Y50 IO_25_13
367 V19 13 IOB_X0Y99 LIOB33_SING_X0Y99 IO_0_13
368 V21 502 IOPAD_X1Y2 PSS2_X32Y157 PS_DDR_VRN_502
369 V22 502 IOPAD_X1Y1 PSS2_X32Y157 PS_DDR_WE_B_502
370 V23 502 IOPAD_X1Y133 PSS2_X32Y157 PS_DDR_RAS_B_502
371 V24 502 IOPAD_X1Y56 PSS2_X32Y157 PS_DDR_DQ24_502
372 V26 502 IOPAD_X1Y31 PSS2_X32Y157 PS_DDR_DM3_502
373 W1 112 OPAD_X0Y2 GTX_CHANNEL_1_X186Y17 MGTXTXN1_112
374 W2 112 OPAD_X0Y3 GTX_CHANNEL_1_X186Y17 MGTXTXP1_112
375 W13 12 IOB_X0Y40 LIOB33_X0Y39 IO_L5P_T0_12
376 W14 12 IOB_X0Y49 LIOB33_SING_X0Y49 IO_0_12
377 W15 12 IOB_X0Y1 LIOB33_X0Y1 IO_L24N_T3_12
378 W16 12 IOB_X0Y2 LIOB33_X0Y1 IO_L24P_T3_12
379 W17 12 IOB_X0Y0 LIOB33_SING_X0Y0 IO_25_12
380 W18 13 IOB_X0Y54 LIOB33_X0Y53 IO_L23P_T3_13
381 W19 13 IOB_X0Y53 LIOB33_X0Y53 IO_L23N_T3_13
382 W20 13 IOB_X0Y62 LIOB33_X0Y61 IO_L19P_T3_13
383 W21 502 IOPAD_X1Y3 PSS2_X32Y157 PS_DDR_VRP_502
384 W23 502 IOPAD_X1Y63 PSS2_X32Y157 PS_DDR_DQ31_502
385 W24 502 IOPAD_X1Y71 PSS2_X32Y157 PS_DDR_DQS_P3_502
386 W25 502 IOPAD_X1Y67 PSS2_X32Y157 PS_DDR_DQS_N3_502
387 W26 502 IOPAD_X1Y60 PSS2_X32Y157 PS_DDR_DQ28_502
388 Y3 112 IPAD_X1Y6 GTX_CHANNEL_1_X186Y17 MGTXRXN1_112
389 Y4 112 IPAD_X1Y7 GTX_CHANNEL_1_X186Y17 MGTXRXP1_112
390 Y10 12 IOB_X0Y44 LIOB33_X0Y43 IO_L3P_T0_DQS_12
391 Y11 12 IOB_X0Y47 LIOB33_X0Y47 IO_L1N_T0_12
392 Y12 12 IOB_X0Y48 LIOB33_X0Y47 IO_L1P_T0_12
393 Y13 12 IOB_X0Y39 LIOB33_X0Y39 IO_L5N_T0_12
394 Y15 12 IOB_X0Y3 LIOB33_X0Y3 IO_L23N_T3_12
395 Y16 12 IOB_X0Y4 LIOB33_X0Y3 IO_L23P_T3_12
396 Y17 12 IOB_X0Y12 LIOB33_X0Y11 IO_L19P_T3_12
397 Y18 13 IOB_X0Y52 LIOB33_X0Y51 IO_L24P_T3_13
398 Y20 13 IOB_X0Y61 LIOB33_X0Y61 IO_L19N_T3_VREF_13
399 Y21 502 IOPAD_X1Y27 PSS2_X32Y157 PS_DDR_CS_B_502
400 Y22 502 IOPAD_X1Y131 PSS2_X32Y157 PS_DDR_ODT_502
401 Y23 502 IOPAD_X1Y22 PSS2_X32Y157 PS_DDR_CAS_B_502
402 Y25 502 IOPAD_X1Y61 PSS2_X32Y157 PS_DDR_DQ29_502
403 Y26 502 IOPAD_X1Y62 PSS2_X32Y157 PS_DDR_DQ30_502

File diff suppressed because it is too large Load Diff

View File

@ -0,0 +1,721 @@
!<xilinx/xc7series/part>
idcode: 0x372c093
global_clock_regions:
top: !<xilinx/xc7series/global_clock_region>
rows:
0: !<xilinx/xc7series/row>
configuration_buses:
CLB_IO_CLK: !<xilinx/xc7series/configuration_bus>
configuration_columns:
0: !<xilinx/xc7series/configuration_column>
frame_count: 42
1: !<xilinx/xc7series/configuration_column>
frame_count: 30
2: !<xilinx/xc7series/configuration_column>
frame_count: 36
3: !<xilinx/xc7series/configuration_column>
frame_count: 36
4: !<xilinx/xc7series/configuration_column>
frame_count: 36
5: !<xilinx/xc7series/configuration_column>
frame_count: 36
6: !<xilinx/xc7series/configuration_column>
frame_count: 28
7: !<xilinx/xc7series/configuration_column>
frame_count: 36
8: !<xilinx/xc7series/configuration_column>
frame_count: 36
9: !<xilinx/xc7series/configuration_column>
frame_count: 28
10: !<xilinx/xc7series/configuration_column>
frame_count: 36
11: !<xilinx/xc7series/configuration_column>
frame_count: 36
12: !<xilinx/xc7series/configuration_column>
frame_count: 36
13: !<xilinx/xc7series/configuration_column>
frame_count: 36
14: !<xilinx/xc7series/configuration_column>
frame_count: 28
15: !<xilinx/xc7series/configuration_column>
frame_count: 36
16: !<xilinx/xc7series/configuration_column>
frame_count: 36
17: !<xilinx/xc7series/configuration_column>
frame_count: 28
18: !<xilinx/xc7series/configuration_column>
frame_count: 36
19: !<xilinx/xc7series/configuration_column>
frame_count: 36
20: !<xilinx/xc7series/configuration_column>
frame_count: 36
21: !<xilinx/xc7series/configuration_column>
frame_count: 36
22: !<xilinx/xc7series/configuration_column>
frame_count: 28
23: !<xilinx/xc7series/configuration_column>
frame_count: 36
24: !<xilinx/xc7series/configuration_column>
frame_count: 36
25: !<xilinx/xc7series/configuration_column>
frame_count: 28
26: !<xilinx/xc7series/configuration_column>
frame_count: 36
27: !<xilinx/xc7series/configuration_column>
frame_count: 36
28: !<xilinx/xc7series/configuration_column>
frame_count: 36
29: !<xilinx/xc7series/configuration_column>
frame_count: 36
30: !<xilinx/xc7series/configuration_column>
frame_count: 36
31: !<xilinx/xc7series/configuration_column>
frame_count: 36
32: !<xilinx/xc7series/configuration_column>
frame_count: 36
33: !<xilinx/xc7series/configuration_column>
frame_count: 36
34: !<xilinx/xc7series/configuration_column>
frame_count: 28
35: !<xilinx/xc7series/configuration_column>
frame_count: 36
36: !<xilinx/xc7series/configuration_column>
frame_count: 36
37: !<xilinx/xc7series/configuration_column>
frame_count: 28
38: !<xilinx/xc7series/configuration_column>
frame_count: 36
39: !<xilinx/xc7series/configuration_column>
frame_count: 30
40: !<xilinx/xc7series/configuration_column>
frame_count: 36
41: !<xilinx/xc7series/configuration_column>
frame_count: 36
42: !<xilinx/xc7series/configuration_column>
frame_count: 36
43: !<xilinx/xc7series/configuration_column>
frame_count: 36
44: !<xilinx/xc7series/configuration_column>
frame_count: 36
45: !<xilinx/xc7series/configuration_column>
frame_count: 36
46: !<xilinx/xc7series/configuration_column>
frame_count: 36
47: !<xilinx/xc7series/configuration_column>
frame_count: 28
48: !<xilinx/xc7series/configuration_column>
frame_count: 36
49: !<xilinx/xc7series/configuration_column>
frame_count: 36
50: !<xilinx/xc7series/configuration_column>
frame_count: 36
51: !<xilinx/xc7series/configuration_column>
frame_count: 36
52: !<xilinx/xc7series/configuration_column>
frame_count: 36
53: !<xilinx/xc7series/configuration_column>
frame_count: 36
54: !<xilinx/xc7series/configuration_column>
frame_count: 30
55: !<xilinx/xc7series/configuration_column>
frame_count: 36
56: !<xilinx/xc7series/configuration_column>
frame_count: 36
57: !<xilinx/xc7series/configuration_column>
frame_count: 28
58: !<xilinx/xc7series/configuration_column>
frame_count: 36
59: !<xilinx/xc7series/configuration_column>
frame_count: 36
60: !<xilinx/xc7series/configuration_column>
frame_count: 28
61: !<xilinx/xc7series/configuration_column>
frame_count: 36
62: !<xilinx/xc7series/configuration_column>
frame_count: 36
63: !<xilinx/xc7series/configuration_column>
frame_count: 36
64: !<xilinx/xc7series/configuration_column>
frame_count: 36
65: !<xilinx/xc7series/configuration_column>
frame_count: 36
66: !<xilinx/xc7series/configuration_column>
frame_count: 28
67: !<xilinx/xc7series/configuration_column>
frame_count: 36
68: !<xilinx/xc7series/configuration_column>
frame_count: 36
69: !<xilinx/xc7series/configuration_column>
frame_count: 28
70: !<xilinx/xc7series/configuration_column>
frame_count: 36
71: !<xilinx/xc7series/configuration_column>
frame_count: 36
72: !<xilinx/xc7series/configuration_column>
frame_count: 36
73: !<xilinx/xc7series/configuration_column>
frame_count: 28
74: !<xilinx/xc7series/configuration_column>
frame_count: 36
75: !<xilinx/xc7series/configuration_column>
frame_count: 36
76: !<xilinx/xc7series/configuration_column>
frame_count: 36
77: !<xilinx/xc7series/configuration_column>
frame_count: 36
78: !<xilinx/xc7series/configuration_column>
frame_count: 30
79: !<xilinx/xc7series/configuration_column>
frame_count: 42
BLOCK_RAM: !<xilinx/xc7series/configuration_bus>
configuration_columns:
0: !<xilinx/xc7series/configuration_column>
frame_count: 128
1: !<xilinx/xc7series/configuration_column>
frame_count: 128
2: !<xilinx/xc7series/configuration_column>
frame_count: 128
3: !<xilinx/xc7series/configuration_column>
frame_count: 128
4: !<xilinx/xc7series/configuration_column>
frame_count: 128
5: !<xilinx/xc7series/configuration_column>
frame_count: 128
6: !<xilinx/xc7series/configuration_column>
frame_count: 128
7: !<xilinx/xc7series/configuration_column>
frame_count: 128
bottom: !<xilinx/xc7series/global_clock_region>
rows:
0: !<xilinx/xc7series/row>
configuration_buses:
CLB_IO_CLK: !<xilinx/xc7series/configuration_bus>
configuration_columns:
0: !<xilinx/xc7series/configuration_column>
frame_count: 42
1: !<xilinx/xc7series/configuration_column>
frame_count: 30
2: !<xilinx/xc7series/configuration_column>
frame_count: 36
3: !<xilinx/xc7series/configuration_column>
frame_count: 36
4: !<xilinx/xc7series/configuration_column>
frame_count: 36
5: !<xilinx/xc7series/configuration_column>
frame_count: 36
6: !<xilinx/xc7series/configuration_column>
frame_count: 28
7: !<xilinx/xc7series/configuration_column>
frame_count: 36
8: !<xilinx/xc7series/configuration_column>
frame_count: 36
9: !<xilinx/xc7series/configuration_column>
frame_count: 28
10: !<xilinx/xc7series/configuration_column>
frame_count: 36
11: !<xilinx/xc7series/configuration_column>
frame_count: 36
12: !<xilinx/xc7series/configuration_column>
frame_count: 36
13: !<xilinx/xc7series/configuration_column>
frame_count: 36
14: !<xilinx/xc7series/configuration_column>
frame_count: 28
15: !<xilinx/xc7series/configuration_column>
frame_count: 36
16: !<xilinx/xc7series/configuration_column>
frame_count: 36
17: !<xilinx/xc7series/configuration_column>
frame_count: 28
18: !<xilinx/xc7series/configuration_column>
frame_count: 36
19: !<xilinx/xc7series/configuration_column>
frame_count: 36
20: !<xilinx/xc7series/configuration_column>
frame_count: 36
21: !<xilinx/xc7series/configuration_column>
frame_count: 36
22: !<xilinx/xc7series/configuration_column>
frame_count: 28
23: !<xilinx/xc7series/configuration_column>
frame_count: 36
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frame_count: 36
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36: !<xilinx/xc7series/configuration_column>
frame_count: 36
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49: !<xilinx/xc7series/configuration_column>
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50: !<xilinx/xc7series/configuration_column>
frame_count: 36
51: !<xilinx/xc7series/configuration_column>
frame_count: 36
52: !<xilinx/xc7series/configuration_column>
frame_count: 36
53: !<xilinx/xc7series/configuration_column>
frame_count: 36
54: !<xilinx/xc7series/configuration_column>
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55: !<xilinx/xc7series/configuration_column>
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56: !<xilinx/xc7series/configuration_column>
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57: !<xilinx/xc7series/configuration_column>
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62: !<xilinx/xc7series/configuration_column>
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63: !<xilinx/xc7series/configuration_column>
frame_count: 36
64: !<xilinx/xc7series/configuration_column>
frame_count: 36
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frame_count: 36
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67: !<xilinx/xc7series/configuration_column>
frame_count: 36
68: !<xilinx/xc7series/configuration_column>
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70: !<xilinx/xc7series/configuration_column>
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71: !<xilinx/xc7series/configuration_column>
frame_count: 36
72: !<xilinx/xc7series/configuration_column>
frame_count: 36
73: !<xilinx/xc7series/configuration_column>
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74: !<xilinx/xc7series/configuration_column>
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76: !<xilinx/xc7series/configuration_column>
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77: !<xilinx/xc7series/configuration_column>
frame_count: 36
78: !<xilinx/xc7series/configuration_column>
frame_count: 30
79: !<xilinx/xc7series/configuration_column>
frame_count: 42
BLOCK_RAM: !<xilinx/xc7series/configuration_bus>
configuration_columns:
0: !<xilinx/xc7series/configuration_column>
frame_count: 128
1: !<xilinx/xc7series/configuration_column>
frame_count: 128
2: !<xilinx/xc7series/configuration_column>
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3: !<xilinx/xc7series/configuration_column>
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frame_count: 128
7: !<xilinx/xc7series/configuration_column>
frame_count: 128
1: !<xilinx/xc7series/row>
configuration_buses:
CLB_IO_CLK: !<xilinx/xc7series/configuration_bus>
configuration_columns:
0: !<xilinx/xc7series/configuration_column>
frame_count: 42
1: !<xilinx/xc7series/configuration_column>
frame_count: 30
2: !<xilinx/xc7series/configuration_column>
frame_count: 36
3: !<xilinx/xc7series/configuration_column>
frame_count: 36
4: !<xilinx/xc7series/configuration_column>
frame_count: 36
5: !<xilinx/xc7series/configuration_column>
frame_count: 36
6: !<xilinx/xc7series/configuration_column>
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7: !<xilinx/xc7series/configuration_column>
frame_count: 36
8: !<xilinx/xc7series/configuration_column>
frame_count: 36
9: !<xilinx/xc7series/configuration_column>
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10: !<xilinx/xc7series/configuration_column>
frame_count: 36
11: !<xilinx/xc7series/configuration_column>
frame_count: 36
12: !<xilinx/xc7series/configuration_column>
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13: !<xilinx/xc7series/configuration_column>
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14: !<xilinx/xc7series/configuration_column>
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15: !<xilinx/xc7series/configuration_column>
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16: !<xilinx/xc7series/configuration_column>
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17: !<xilinx/xc7series/configuration_column>
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18: !<xilinx/xc7series/configuration_column>
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19: !<xilinx/xc7series/configuration_column>
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20: !<xilinx/xc7series/configuration_column>
frame_count: 36
21: !<xilinx/xc7series/configuration_column>
frame_count: 36
22: !<xilinx/xc7series/configuration_column>
frame_count: 28
23: !<xilinx/xc7series/configuration_column>
frame_count: 36
24: !<xilinx/xc7series/configuration_column>
frame_count: 36
25: !<xilinx/xc7series/configuration_column>
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26: !<xilinx/xc7series/configuration_column>
frame_count: 36
27: !<xilinx/xc7series/configuration_column>
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29: !<xilinx/xc7series/configuration_column>
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30: !<xilinx/xc7series/configuration_column>
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31: !<xilinx/xc7series/configuration_column>
frame_count: 36
32: !<xilinx/xc7series/configuration_column>
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33: !<xilinx/xc7series/configuration_column>
frame_count: 36
34: !<xilinx/xc7series/configuration_column>
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35: !<xilinx/xc7series/configuration_column>
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36: !<xilinx/xc7series/configuration_column>
frame_count: 36
37: !<xilinx/xc7series/configuration_column>
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38: !<xilinx/xc7series/configuration_column>
frame_count: 36
39: !<xilinx/xc7series/configuration_column>
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frame_count: 36
42: !<xilinx/xc7series/configuration_column>
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45: !<xilinx/xc7series/configuration_column>
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46: !<xilinx/xc7series/configuration_column>
frame_count: 36
47: !<xilinx/xc7series/configuration_column>
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48: !<xilinx/xc7series/configuration_column>
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49: !<xilinx/xc7series/configuration_column>
frame_count: 36
50: !<xilinx/xc7series/configuration_column>
frame_count: 36
51: !<xilinx/xc7series/configuration_column>
frame_count: 36
52: !<xilinx/xc7series/configuration_column>
frame_count: 36
53: !<xilinx/xc7series/configuration_column>
frame_count: 36
54: !<xilinx/xc7series/configuration_column>
frame_count: 30
55: !<xilinx/xc7series/configuration_column>
frame_count: 36
56: !<xilinx/xc7series/configuration_column>
frame_count: 36
57: !<xilinx/xc7series/configuration_column>
frame_count: 28
58: !<xilinx/xc7series/configuration_column>
frame_count: 36
59: !<xilinx/xc7series/configuration_column>
frame_count: 36
60: !<xilinx/xc7series/configuration_column>
frame_count: 28
61: !<xilinx/xc7series/configuration_column>
frame_count: 36
62: !<xilinx/xc7series/configuration_column>
frame_count: 36
63: !<xilinx/xc7series/configuration_column>
frame_count: 36
64: !<xilinx/xc7series/configuration_column>
frame_count: 36
65: !<xilinx/xc7series/configuration_column>
frame_count: 36
66: !<xilinx/xc7series/configuration_column>
frame_count: 28
67: !<xilinx/xc7series/configuration_column>
frame_count: 36
68: !<xilinx/xc7series/configuration_column>
frame_count: 36
69: !<xilinx/xc7series/configuration_column>
frame_count: 28
70: !<xilinx/xc7series/configuration_column>
frame_count: 36
71: !<xilinx/xc7series/configuration_column>
frame_count: 36
72: !<xilinx/xc7series/configuration_column>
frame_count: 36
73: !<xilinx/xc7series/configuration_column>
frame_count: 28
74: !<xilinx/xc7series/configuration_column>
frame_count: 36
75: !<xilinx/xc7series/configuration_column>
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76: !<xilinx/xc7series/configuration_column>
frame_count: 36
77: !<xilinx/xc7series/configuration_column>
frame_count: 36
78: !<xilinx/xc7series/configuration_column>
frame_count: 30
79: !<xilinx/xc7series/configuration_column>
frame_count: 42
BLOCK_RAM: !<xilinx/xc7series/configuration_bus>
configuration_columns:
0: !<xilinx/xc7series/configuration_column>
frame_count: 128
1: !<xilinx/xc7series/configuration_column>
frame_count: 128
2: !<xilinx/xc7series/configuration_column>
frame_count: 128
3: !<xilinx/xc7series/configuration_column>
frame_count: 128
4: !<xilinx/xc7series/configuration_column>
frame_count: 128
5: !<xilinx/xc7series/configuration_column>
frame_count: 128
6: !<xilinx/xc7series/configuration_column>
frame_count: 128
7: !<xilinx/xc7series/configuration_column>
frame_count: 128
2: !<xilinx/xc7series/row>
configuration_buses:
CLB_IO_CLK: !<xilinx/xc7series/configuration_bus>
configuration_columns:
0: !<xilinx/xc7series/configuration_column>
frame_count: 42
1: !<xilinx/xc7series/configuration_column>
frame_count: 30
2: !<xilinx/xc7series/configuration_column>
frame_count: 36
3: !<xilinx/xc7series/configuration_column>
frame_count: 36
4: !<xilinx/xc7series/configuration_column>
frame_count: 36
5: !<xilinx/xc7series/configuration_column>
frame_count: 36
6: !<xilinx/xc7series/configuration_column>
frame_count: 28
7: !<xilinx/xc7series/configuration_column>
frame_count: 36
8: !<xilinx/xc7series/configuration_column>
frame_count: 36
9: !<xilinx/xc7series/configuration_column>
frame_count: 28
10: !<xilinx/xc7series/configuration_column>
frame_count: 36
11: !<xilinx/xc7series/configuration_column>
frame_count: 36
12: !<xilinx/xc7series/configuration_column>
frame_count: 36
13: !<xilinx/xc7series/configuration_column>
frame_count: 36
14: !<xilinx/xc7series/configuration_column>
frame_count: 28
15: !<xilinx/xc7series/configuration_column>
frame_count: 36
16: !<xilinx/xc7series/configuration_column>
frame_count: 36
17: !<xilinx/xc7series/configuration_column>
frame_count: 28
18: !<xilinx/xc7series/configuration_column>
frame_count: 36
19: !<xilinx/xc7series/configuration_column>
frame_count: 36
20: !<xilinx/xc7series/configuration_column>
frame_count: 36
21: !<xilinx/xc7series/configuration_column>
frame_count: 36
22: !<xilinx/xc7series/configuration_column>
frame_count: 28
23: !<xilinx/xc7series/configuration_column>
frame_count: 36
24: !<xilinx/xc7series/configuration_column>
frame_count: 36
25: !<xilinx/xc7series/configuration_column>
frame_count: 28
26: !<xilinx/xc7series/configuration_column>
frame_count: 36
27: !<xilinx/xc7series/configuration_column>
frame_count: 36
28: !<xilinx/xc7series/configuration_column>
frame_count: 36
29: !<xilinx/xc7series/configuration_column>
frame_count: 36
30: !<xilinx/xc7series/configuration_column>
frame_count: 36
31: !<xilinx/xc7series/configuration_column>
frame_count: 36
32: !<xilinx/xc7series/configuration_column>
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33: !<xilinx/xc7series/configuration_column>
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34: !<xilinx/xc7series/configuration_column>
frame_count: 28
35: !<xilinx/xc7series/configuration_column>
frame_count: 36
36: !<xilinx/xc7series/configuration_column>
frame_count: 36
37: !<xilinx/xc7series/configuration_column>
frame_count: 28
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39: !<xilinx/xc7series/configuration_column>
frame_count: 30
40: !<xilinx/xc7series/configuration_column>
frame_count: 36
41: !<xilinx/xc7series/configuration_column>
frame_count: 36
42: !<xilinx/xc7series/configuration_column>
frame_count: 36
43: !<xilinx/xc7series/configuration_column>
frame_count: 36
44: !<xilinx/xc7series/configuration_column>
frame_count: 36
45: !<xilinx/xc7series/configuration_column>
frame_count: 36
46: !<xilinx/xc7series/configuration_column>
frame_count: 36
47: !<xilinx/xc7series/configuration_column>
frame_count: 28
48: !<xilinx/xc7series/configuration_column>
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49: !<xilinx/xc7series/configuration_column>
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50: !<xilinx/xc7series/configuration_column>
frame_count: 36
51: !<xilinx/xc7series/configuration_column>
frame_count: 36
52: !<xilinx/xc7series/configuration_column>
frame_count: 36
53: !<xilinx/xc7series/configuration_column>
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54: !<xilinx/xc7series/configuration_column>
frame_count: 30
55: !<xilinx/xc7series/configuration_column>
frame_count: 36
56: !<xilinx/xc7series/configuration_column>
frame_count: 36
57: !<xilinx/xc7series/configuration_column>
frame_count: 28
58: !<xilinx/xc7series/configuration_column>
frame_count: 36
59: !<xilinx/xc7series/configuration_column>
frame_count: 36
60: !<xilinx/xc7series/configuration_column>
frame_count: 28
61: !<xilinx/xc7series/configuration_column>
frame_count: 36
62: !<xilinx/xc7series/configuration_column>
frame_count: 36
63: !<xilinx/xc7series/configuration_column>
frame_count: 36
64: !<xilinx/xc7series/configuration_column>
frame_count: 36
65: !<xilinx/xc7series/configuration_column>
frame_count: 36
66: !<xilinx/xc7series/configuration_column>
frame_count: 28
67: !<xilinx/xc7series/configuration_column>
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68: !<xilinx/xc7series/configuration_column>
frame_count: 36
69: !<xilinx/xc7series/configuration_column>
frame_count: 28
70: !<xilinx/xc7series/configuration_column>
frame_count: 36
71: !<xilinx/xc7series/configuration_column>
frame_count: 36
72: !<xilinx/xc7series/configuration_column>
frame_count: 36
73: !<xilinx/xc7series/configuration_column>
frame_count: 32
BLOCK_RAM: !<xilinx/xc7series/configuration_bus>
configuration_columns:
0: !<xilinx/xc7series/configuration_column>
frame_count: 128
1: !<xilinx/xc7series/configuration_column>
frame_count: 128
2: !<xilinx/xc7series/configuration_column>
frame_count: 128
3: !<xilinx/xc7series/configuration_column>
frame_count: 128
4: !<xilinx/xc7series/configuration_column>
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5: !<xilinx/xc7series/configuration_column>
frame_count: 128
6: !<xilinx/xc7series/configuration_column>
frame_count: 128

View File

@ -0,0 +1,423 @@
pin,bank,site,tile,pin_function
A2,34,IOB_X1Y251,RIOB18_X107Y251,IO_L24N_T3_34
A3,34,IOB_X1Y255,RIOB18_X107Y255,IO_L22N_T3_34
A4,34,IOB_X1Y256,RIOB18_X107Y255,IO_L22P_T3_34
A5,34,IOB_X1Y257,RIOB18_X107Y257,IO_L21N_T3_DQS_34
A7,34,IOB_X1Y263,RIOB18_X107Y263,IO_L18N_T2_34
A8,34,IOB_X1Y265,RIOB18_X107Y265,IO_L17N_T2_34
A9,34,IOB_X1Y266,RIOB18_X107Y265,IO_L17P_T2_34
A10,34,IOB_X1Y267,RIOB18_X107Y267,IO_L16N_T2_34
A12,35,IOB_X1Y301,RIOB18_X107Y301,IO_L24N_T3_AD15N_35
A13,35,IOB_X1Y302,RIOB18_X107Y301,IO_L24P_T3_AD15P_35
A14,35,IOB_X1Y307,RIOB18_X107Y307,IO_L21N_T3_DQS_AD14N_35
A15,35,IOB_X1Y308,RIOB18_X107Y307,IO_L21P_T3_DQS_AD14P_35
A17,35,IOB_X1Y313,RIOB18_X107Y313,IO_L18N_T2_AD13N_35
A18,501,IOPAD_X1Y126,PSS2_X32Y313,PS_MIO49_501
A19,501,IOPAD_X1Y130,PSS2_X32Y313,PS_MIO53_501
A20,501,IOPAD_X1Y129,PSS2_X32Y313,PS_MIO52_501
A22,501,IOPAD_X1Y134,PSS2_X32Y313,PS_SRST_B_501
A23,500,IOPAD_X1Y89,PSS2_X32Y313,PS_MIO12_500
A24,500,IOPAD_X1Y85,PSS2_X32Y313,PS_MIO8_500
A25,500,IOPAD_X1Y87,PSS2_X32Y313,PS_MIO10_500
AA1,112,OPAD_X0Y24,GTX_CHANNEL_0_X249Y162,MGTXTXN0_112
AA2,112,OPAD_X0Y25,GTX_CHANNEL_0_X249Y162,MGTXTXP0_112
AA5,111,IPAD_X1Y71,GTX_COMMON_X249Y127,MGTREFCLK1N_111
AA6,111,IPAD_X1Y70,GTX_COMMON_X249Y127,MGTREFCLK1P_111
AA10,12,IOB_X0Y193,LIOB33_X0Y193,IO_L3N_T0_DQS_12
AA12,12,IOB_X0Y187,LIOB33_X0Y187,IO_L6N_T0_VREF_12
AA13,12,IOB_X0Y188,LIOB33_X0Y187,IO_L6P_T0_12
AA14,12,IOB_X0Y155,LIOB33_X0Y155,IO_L22N_T3_12
AA15,12,IOB_X0Y156,LIOB33_X0Y155,IO_L22P_T3_12
AA17,12,IOB_X0Y161,LIOB33_X0Y161,IO_L19N_T3_VREF_12
AA18,13,IOB_X0Y201,LIOB33_X0Y201,IO_L24N_T3_13
AA19,13,IOB_X0Y206,LIOB33_X0Y205,IO_L22P_T3_13
AA20,13,IOB_X0Y210,LIOB33_X0Y209,IO_L20P_T3_13
AA22,13,IOB_X0Y230,LIOB33_X0Y229,IO_L10P_T1_13
AA23,13,IOB_X0Y229,LIOB33_X0Y229,IO_L10N_T1_13
AA24,13,IOB_X0Y238,LIOB33_X0Y237,IO_L6P_T0_13
AA25,13,IOB_X0Y248,LIOB33_X0Y247,IO_L1P_T0_13
AB3,112,IPAD_X1Y90,GTX_CHANNEL_0_X249Y162,MGTXRXN0_112
AB4,112,IPAD_X1Y91,GTX_CHANNEL_0_X249Y162,MGTXRXP0_112
AB10,12,IOB_X0Y191,LIOB33_X0Y191,IO_L4N_T0_12
AB11,12,IOB_X0Y192,LIOB33_X0Y191,IO_L4P_T0_12
AB12,12,IOB_X0Y196,LIOB33_X0Y195,IO_L2P_T0_12
AB14,12,IOB_X0Y171,LIOB33_X0Y171,IO_L14N_T2_SRCC_12
AB15,12,IOB_X0Y172,LIOB33_X0Y171,IO_L14P_T2_SRCC_12
AB16,12,IOB_X0Y159,LIOB33_X0Y159,IO_L20N_T3_12
AB17,12,IOB_X0Y160,LIOB33_X0Y159,IO_L20P_T3_12
AB19,13,IOB_X0Y205,LIOB33_X0Y205,IO_L22N_T3_13
AB20,13,IOB_X0Y209,LIOB33_X0Y209,IO_L20N_T3_13
AB21,13,IOB_X0Y232,LIOB33_X0Y231,IO_L9P_T1_DQS_13
AB22,13,IOB_X0Y231,LIOB33_X0Y231,IO_L9N_T1_DQS_13
AB24,13,IOB_X0Y237,LIOB33_X0Y237,IO_L6N_T0_VREF_13
AB25,13,IOB_X0Y247,LIOB33_X0Y247,IO_L1N_T0_13
AB26,13,IOB_X0Y246,LIOB33_X0Y245,IO_L2P_T0_13
AC1,111,OPAD_X0Y22,GTX_CHANNEL_3_X249Y150,MGTXTXN3_111
AC2,111,OPAD_X0Y23,GTX_CHANNEL_3_X249Y150,MGTXTXP3_111
AC5,111,IPAD_X1Y78,GTX_CHANNEL_2_X249Y139,MGTXRXN2_111
AC6,111,IPAD_X1Y79,GTX_CHANNEL_2_X249Y139,MGTXRXP2_111
AC11,12,IOB_X0Y195,LIOB33_X0Y195,IO_L2N_T0_12
AC12,12,IOB_X0Y178,LIOB33_X0Y177,IO_L11P_T1_SRCC_12
AC13,12,IOB_X0Y176,LIOB33_X0Y175,IO_L12P_T1_MRCC_12
AC14,12,IOB_X0Y174,LIOB33_X0Y173,IO_L13P_T2_MRCC_12
AC16,12,IOB_X0Y157,LIOB33_X0Y157,IO_L21N_T3_DQS_12
AC17,12,IOB_X0Y158,LIOB33_X0Y157,IO_L21P_T3_DQS_12
AC18,13,IOB_X0Y208,LIOB33_X0Y207,IO_L21P_T3_DQS_13
AC19,13,IOB_X0Y207,LIOB33_X0Y207,IO_L21N_T3_DQS_13
AC21,13,IOB_X0Y222,LIOB33_X0Y221,IO_L14P_T2_SRCC_13
AC22,13,IOB_X0Y221,LIOB33_X0Y221,IO_L14N_T2_SRCC_13
AC23,13,IOB_X0Y226,LIOB33_X0Y225,IO_L12P_T1_MRCC_13
AC24,13,IOB_X0Y225,LIOB33_X0Y225,IO_L12N_T1_MRCC_13
AC26,13,IOB_X0Y245,LIOB33_X0Y245,IO_L2N_T0_13
AD3,111,IPAD_X1Y84,GTX_CHANNEL_3_X249Y150,MGTXRXN3_111
AD4,111,IPAD_X1Y85,GTX_CHANNEL_3_X249Y150,MGTXRXP3_111
AD7,111,IPAD_X1Y60,GTX_CHANNEL_0_X249Y110,MGTXRXN0_111
AD8,111,IPAD_X1Y61,GTX_CHANNEL_0_X249Y110,MGTXRXP0_111
AD10,12,IOB_X0Y185,LIOB33_X0Y185,IO_L7N_T1_12
AD11,12,IOB_X0Y177,LIOB33_X0Y177,IO_L11N_T1_SRCC_12
AD13,12,IOB_X0Y175,LIOB33_X0Y175,IO_L12N_T1_MRCC_12
AD14,12,IOB_X0Y173,LIOB33_X0Y173,IO_L13N_T2_MRCC_12
AD15,12,IOB_X0Y169,LIOB33_X0Y169,IO_L15N_T2_DQS_12
AD16,12,IOB_X0Y170,LIOB33_X0Y169,IO_L15P_T2_DQS_12
AD18,13,IOB_X0Y216,LIOB33_X0Y215,IO_L17P_T2_13
AD19,13,IOB_X0Y215,LIOB33_X0Y215,IO_L17N_T2_13
AD20,13,IOB_X0Y224,LIOB33_X0Y223,IO_L13P_T2_MRCC_13
AD21,13,IOB_X0Y223,LIOB33_X0Y223,IO_L13N_T2_MRCC_13
AD23,13,IOB_X0Y228,LIOB33_X0Y227,IO_L11P_T1_SRCC_13
AD24,13,IOB_X0Y227,LIOB33_X0Y227,IO_L11N_T1_SRCC_13
AD25,13,IOB_X0Y242,LIOB33_X0Y241,IO_L4P_T0_13
AD26,13,IOB_X0Y241,LIOB33_X0Y241,IO_L4N_T0_13
AE1,111,OPAD_X0Y20,GTX_CHANNEL_2_X249Y139,MGTXTXN2_111
AE2,111,OPAD_X0Y21,GTX_CHANNEL_2_X249Y139,MGTXTXP2_111
AE5,111,IPAD_X1Y66,GTX_CHANNEL_1_X249Y121,MGTXRXN1_111
AE6,111,IPAD_X1Y67,GTX_CHANNEL_1_X249Y121,MGTXRXP1_111
AE10,12,IOB_X0Y186,LIOB33_X0Y185,IO_L7P_T1_12
AE11,12,IOB_X0Y182,LIOB33_X0Y181,IO_L9P_T1_DQS_12
AE12,12,IOB_X0Y184,LIOB33_X0Y183,IO_L8P_T1_12
AE13,12,IOB_X0Y180,LIOB33_X0Y179,IO_L10P_T1_12
AE15,12,IOB_X0Y165,LIOB33_X0Y165,IO_L17N_T2_12
AE16,12,IOB_X0Y166,LIOB33_X0Y165,IO_L17P_T2_12
AE17,12,IOB_X0Y164,LIOB33_X0Y163,IO_L18P_T2_12
AE18,13,IOB_X0Y214,LIOB33_X0Y213,IO_L18P_T2_13
AE20,13,IOB_X0Y218,LIOB33_X0Y217,IO_L16P_T2_13
AE21,13,IOB_X0Y217,LIOB33_X0Y217,IO_L16N_T2_13
AE22,13,IOB_X0Y236,LIOB33_X0Y235,IO_L7P_T1_13
AE23,13,IOB_X0Y234,LIOB33_X0Y233,IO_L8P_T1_13
AE25,13,IOB_X0Y244,LIOB33_X0Y243,IO_L3P_T0_DQS_13
AE26,13,IOB_X0Y243,LIOB33_X0Y243,IO_L3N_T0_DQS_13
AF3,111,OPAD_X0Y18,GTX_CHANNEL_1_X249Y121,MGTXTXN1_111
AF4,111,OPAD_X0Y19,GTX_CHANNEL_1_X249Y121,MGTXTXP1_111
AF7,111,OPAD_X0Y16,GTX_CHANNEL_0_X249Y110,MGTXTXN0_111
AF8,111,OPAD_X0Y17,GTX_CHANNEL_0_X249Y110,MGTXTXP0_111
AF10,12,IOB_X0Y181,LIOB33_X0Y181,IO_L9N_T1_DQS_12
AF12,12,IOB_X0Y183,LIOB33_X0Y183,IO_L8N_T1_12
AF13,12,IOB_X0Y179,LIOB33_X0Y179,IO_L10N_T1_12
AF14,12,IOB_X0Y167,LIOB33_X0Y167,IO_L16N_T2_12
AF15,12,IOB_X0Y168,LIOB33_X0Y167,IO_L16P_T2_12
AF17,12,IOB_X0Y163,LIOB33_X0Y163,IO_L18N_T2_12
AF18,13,IOB_X0Y213,LIOB33_X0Y213,IO_L18N_T2_13
AF19,13,IOB_X0Y220,LIOB33_X0Y219,IO_L15P_T2_DQS_13
AF20,13,IOB_X0Y219,LIOB33_X0Y219,IO_L15N_T2_DQS_13
AF22,13,IOB_X0Y235,LIOB33_X0Y235,IO_L7N_T1_13
AF23,13,IOB_X0Y233,LIOB33_X0Y233,IO_L8N_T1_13
AF24,13,IOB_X0Y240,LIOB33_X0Y239,IO_L5P_T0_13
AF25,13,IOB_X0Y239,LIOB33_X0Y239,IO_L5N_T0_13
B1,34,IOB_X1Y253,RIOB18_X107Y253,IO_L23N_T3_34
B2,34,IOB_X1Y252,RIOB18_X107Y251,IO_L24P_T3_34
B4,34,IOB_X1Y259,RIOB18_X107Y259,IO_L20N_T3_34
B5,34,IOB_X1Y260,RIOB18_X107Y259,IO_L20P_T3_34
B6,34,IOB_X1Y258,RIOB18_X107Y257,IO_L21P_T3_DQS_34
B7,34,IOB_X1Y264,RIOB18_X107Y263,IO_L18P_T2_34
B9,34,IOB_X1Y269,RIOB18_X107Y269,IO_L15N_T2_DQS_34
B10,34,IOB_X1Y268,RIOB18_X107Y267,IO_L16P_T2_34
B11,35,IOB_X1Y303,RIOB18_X107Y303,IO_L23N_T3_35
B12,35,IOB_X1Y305,RIOB18_X107Y305,IO_L22N_T3_AD7N_35
B14,35,IOB_X1Y309,RIOB18_X107Y309,IO_L20N_T3_AD6N_35
B15,35,IOB_X1Y315,RIOB18_X107Y315,IO_L17N_T2_AD5N_35
B16,35,IOB_X1Y316,RIOB18_X107Y315,IO_L17P_T2_AD5P_35
B17,35,IOB_X1Y314,RIOB18_X107Y313,IO_L18P_T2_AD13P_35
B19,501,IOPAD_X1Y124,PSS2_X32Y313,PS_MIO47_501
B20,501,IOPAD_X1Y128,PSS2_X32Y313,PS_MIO51_501
B21,501,IOPAD_X1Y125,PSS2_X32Y313,PS_MIO48_501
B22,501,IOPAD_X1Y127,PSS2_X32Y313,PS_MIO50_501
B24,500,IOPAD_X1Y26,PSS2_X32Y313,PS_CLK_500
B25,500,IOPAD_X1Y90,PSS2_X32Y313,PS_MIO13_500
B26,500,IOPAD_X1Y88,PSS2_X32Y313,PS_MIO11_500
C1,33,IOB_X1Y241,RIOB18_X107Y241,IO_L4N_T0_33
C2,34,IOB_X1Y254,RIOB18_X107Y253,IO_L23P_T3_34
C3,34,IOB_X1Y261,RIOB18_X107Y261,IO_L19N_T3_VREF_34
C4,34,IOB_X1Y262,RIOB18_X107Y261,IO_L19P_T3_34
C6,34,IOB_X1Y271,RIOB18_X107Y271,IO_L14N_T2_SRCC_34
C7,34,IOB_X1Y273,RIOB18_X107Y273,IO_L13N_T2_MRCC_34
C8,34,IOB_X1Y274,RIOB18_X107Y273,IO_L13P_T2_MRCC_34
C9,34,IOB_X1Y270,RIOB18_X107Y269,IO_L15P_T2_DQS_34
C11,35,IOB_X1Y304,RIOB18_X107Y303,IO_L23P_T3_35
C12,35,IOB_X1Y306,RIOB18_X107Y305,IO_L22P_T3_AD7P_35
C13,35,IOB_X1Y311,RIOB18_X107Y311,IO_L19N_T3_VREF_35
C14,35,IOB_X1Y310,RIOB18_X107Y309,IO_L20P_T3_AD6P_35
C16,35,IOB_X1Y319,RIOB18_X107Y319,IO_L15N_T2_DQS_AD12N_35
C17,35,IOB_X1Y320,RIOB18_X107Y319,IO_L15P_T2_DQS_AD12P_35
C18,501,IOPAD_X1Y122,PSS2_X32Y313,PS_MIO45_501
C19,501,IOPAD_X1Y118,PSS2_X32Y313,PS_MIO41_501
C21,501,IOPAD_X1Y116,PSS2_X32Y313,PS_MIO39_501
C22,501,IOPAD_X1Y117,PSS2_X32Y313,PS_MIO40_501
C23,500,IOPAD_X1Y132,PSS2_X32Y313,PS_POR_B_500
C24,500,IOPAD_X1Y92,PSS2_X32Y313,PS_MIO15_500
C26,500,IOPAD_X1Y82,PSS2_X32Y313,PS_MIO5_500
D1,33,IOB_X1Y242,RIOB18_X107Y241,IO_L4P_T0_33
D3,33,IOB_X1Y245,RIOB18_X107Y245,IO_L2N_T0_33
D4,33,IOB_X1Y246,RIOB18_X107Y245,IO_L2P_T0_33
D5,34,IOB_X1Y279,RIOB18_X107Y279,IO_L10N_T1_34
D6,34,IOB_X1Y272,RIOB18_X107Y271,IO_L14P_T2_SRCC_34
D8,34,IOB_X1Y283,RIOB18_X107Y283,IO_L8N_T1_34
D9,34,IOB_X1Y284,RIOB18_X107Y283,IO_L8P_T1_34
D10,35,IOB_X1Y345,RIOB18_X107Y345,IO_L2N_T0_AD8N_35
D11,35,IOB_X1Y341,RIOB18_X107Y341,IO_L4N_T0_35
D13,35,IOB_X1Y312,RIOB18_X107Y311,IO_L19P_T3_35
D14,35,IOB_X1Y323,RIOB18_X107Y323,IO_L13N_T2_MRCC_35
D15,35,IOB_X1Y324,RIOB18_X107Y323,IO_L13P_T2_MRCC_35
D16,35,IOB_X1Y317,RIOB18_X107Y317,IO_L16N_T2_35
D18,501,IOPAD_X1Y120,PSS2_X32Y313,PS_MIO43_501
D19,501,IOPAD_X1Y112,PSS2_X32Y313,PS_MIO35_501
D20,501,IOPAD_X1Y114,PSS2_X32Y313,PS_MIO37_501
D21,501,IOPAD_X1Y115,PSS2_X32Y313,PS_MIO38_501
D23,500,IOPAD_X1Y91,PSS2_X32Y313,PS_MIO14_500
D24,500,IOPAD_X1Y86,PSS2_X32Y313,PS_MIO9_500
D25,500,IOPAD_X1Y80,PSS2_X32Y313,PS_MIO3_500
D26,500,IOPAD_X1Y78,PSS2_X32Y313,PS_MIO1_500
E1,33,IOB_X1Y239,RIOB18_X107Y239,IO_L5N_T0_33
E2,33,IOB_X1Y240,RIOB18_X107Y239,IO_L5P_T0_33
E3,33,IOB_X1Y237,RIOB18_X107Y237,IO_L6N_T0_VREF_33
E5,34,IOB_X1Y285,RIOB18_X107Y285,IO_L7N_T1_34
E6,34,IOB_X1Y280,RIOB18_X107Y279,IO_L10P_T1_34
E7,34,IOB_X1Y277,RIOB18_X107Y277,IO_L11N_T1_SRCC_34
E8,34,IOB_X1Y281,RIOB18_X107Y281,IO_L9N_T1_DQS_34
E10,35,IOB_X1Y346,RIOB18_X107Y345,IO_L2P_T0_AD8P_35
E11,35,IOB_X1Y342,RIOB18_X107Y341,IO_L4P_T0_35
E12,35,IOB_X1Y347,RIOB18_X107Y347,IO_L1N_T0_AD0N_35
E13,35,IOB_X1Y337,RIOB18_X107Y337,IO_L6N_T0_VREF_35
E15,35,IOB_X1Y321,RIOB18_X107Y321,IO_L14N_T2_AD4N_SRCC_35
E16,35,IOB_X1Y318,RIOB18_X107Y317,IO_L16P_T2_35
E17,501,IOPAD_X1Y123,PSS2_X32Y313,PS_MIO46_501
E18,501,IOPAD_X1Y121,PSS2_X32Y313,PS_MIO44_501
E20,501,IOPAD_X1Y106,PSS2_X32Y313,PS_MIO29_501
E21,501,IOPAD_X1Y108,PSS2_X32Y313,PS_MIO31_501
E22,501,IOPAD_X1Y110,PSS2_X32Y313,PS_MIO33_501
E23,500,IOPAD_X1Y84,PSS2_X32Y313,PS_MIO7_500
E25,500,IOPAD_X1Y79,PSS2_X32Y313,PS_MIO2_500
E26,500,IOPAD_X1Y77,PSS2_X32Y313,PS_MIO0_500
F2,33,IOB_X1Y243,RIOB18_X107Y243,IO_L3N_T0_DQS_33
F3,33,IOB_X1Y238,RIOB18_X107Y237,IO_L6P_T0_33
F4,33,IOB_X1Y247,RIOB18_X107Y247,IO_L1N_T0_33
F5,34,IOB_X1Y286,RIOB18_X107Y285,IO_L7P_T1_34
F7,34,IOB_X1Y275,RIOB18_X107Y275,IO_L12N_T1_MRCC_34
F8,34,IOB_X1Y278,RIOB18_X107Y277,IO_L11P_T1_SRCC_34
F9,34,IOB_X1Y282,RIOB18_X107Y281,IO_L9P_T1_DQS_34
F10,35,IOB_X1Y343,RIOB18_X107Y343,IO_L3N_T0_DQS_AD1N_35
F12,35,IOB_X1Y348,RIOB18_X107Y347,IO_L1P_T0_AD0P_35
F13,35,IOB_X1Y338,RIOB18_X107Y337,IO_L6P_T0_35
F14,35,IOB_X1Y327,RIOB18_X107Y327,IO_L11N_T1_SRCC_35
F15,35,IOB_X1Y322,RIOB18_X107Y321,IO_L14P_T2_AD4P_SRCC_35
F17,501,IOPAD_X1Y119,PSS2_X32Y313,PS_MIO42_501
F18,501,IOPAD_X1Y104,PSS2_X32Y313,PS_MIO27_501
F19,501,IOPAD_X1Y102,PSS2_X32Y313,PS_MIO25_501
F20,501,IOPAD_X1Y100,PSS2_X32Y313,PS_MIO23_501
F22,501,IOPAD_X1Y98,PSS2_X32Y313,PS_MIO21_501
F23,500,IOPAD_X1Y83,PSS2_X32Y313,PS_MIO6_500
F24,500,IOPAD_X1Y81,PSS2_X32Y313,PS_MIO4_500
F25,502,IOPAD_X1Y33,PSS2_X32Y313,PS_DDR_DQ1_502
G1,33,IOB_X1Y229,RIOB18_X107Y229,IO_L10N_T1_33
G2,33,IOB_X1Y244,RIOB18_X107Y243,IO_L3P_T0_DQS_33
G4,33,IOB_X1Y248,RIOB18_X107Y247,IO_L1P_T0_33
G5,34,IOB_X1Y295,RIOB18_X107Y295,IO_L2N_T0_34
G6,34,IOB_X1Y296,RIOB18_X107Y295,IO_L2P_T0_34
G7,34,IOB_X1Y276,RIOB18_X107Y275,IO_L12P_T1_MRCC_34
G9,34,IOB_X1Y293,RIOB18_X107Y293,IO_L3N_T0_DQS_34
G10,35,IOB_X1Y344,RIOB18_X107Y343,IO_L3P_T0_DQS_AD1P_35
G11,35,IOB_X1Y339,RIOB18_X107Y339,IO_L5N_T0_AD9N_35
G12,35,IOB_X1Y340,RIOB18_X107Y339,IO_L5P_T0_AD9P_35
G14,35,IOB_X1Y328,RIOB18_X107Y327,IO_L11P_T1_SRCC_35
G15,35,IOB_X1Y329,RIOB18_X107Y329,IO_L10N_T1_AD11N_35
G16,35,IOB_X1Y330,RIOB18_X107Y329,IO_L10P_T1_AD11P_35
G17,501,IOPAD_X1Y94,PSS2_X32Y313,PS_MIO17_501
G19,501,IOPAD_X1Y96,PSS2_X32Y313,PS_MIO19_501
G20,501,IOPAD_X1Y95,PSS2_X32Y313,PS_MIO18_501
G21,501,IOPAD_X1Y93,PSS2_X32Y313,PS_MIO16_501
G22,501,IOPAD_X1Y99,PSS2_X32Y313,PS_MIO22_501
G24,502,IOPAD_X1Y28,PSS2_X32Y313,PS_DDR_DM0_502
G25,502,IOPAD_X1Y64,PSS2_X32Y313,PS_DDR_DQS_N0_502
G26,502,IOPAD_X1Y35,PSS2_X32Y313,PS_DDR_DQ3_502
H1,33,IOB_X1Y235,RIOB18_X107Y235,IO_L7N_T1_33
H2,33,IOB_X1Y230,RIOB18_X107Y229,IO_L10P_T1_33
H3,33,IOB_X1Y233,RIOB18_X107Y233,IO_L8N_T1_33
H4,33,IOB_X1Y234,RIOB18_X107Y233,IO_L8P_T1_33
H6,34,IOB_X1Y291,RIOB18_X107Y291,IO_L4N_T0_34
H7,34,IOB_X1Y292,RIOB18_X107Y291,IO_L4P_T0_34
H8,34,IOB_X1Y287,RIOB18_X107Y287,IO_L6N_T0_VREF_34
H9,34,IOB_X1Y294,RIOB18_X107Y293,IO_L3P_T0_DQS_PUDC_B_34
H11,34,IOB_X1Y297,RIOB18_X107Y297,IO_L1N_T0_34
H12,35,IOB_X1Y335,RIOB18_X107Y335,IO_L7N_T1_AD2N_35
H13,35,IOB_X1Y336,RIOB18_X107Y335,IO_L7P_T1_AD2P_35
H14,35,IOB_X1Y325,RIOB18_X107Y325,IO_L12N_T1_MRCC_35
H16,35,IOB_X1Y349,RIOB18_SING_X107Y349,IO_0_VRN_35
H17,501,IOPAD_X1Y103,PSS2_X32Y313,PS_MIO26_501
H19,501,IOPAD_X1Y97,PSS2_X32Y313,PS_MIO20_501
H21,502,IOPAD_X1Y15,PSS2_X32Y313,PS_DDR_A11_502
H22,502,IOPAD_X1Y72,PSS2_X32Y313,PS_DDR_DRST_B_502
H23,502,IOPAD_X1Y37,PSS2_X32Y313,PS_DDR_DQ5_502
H24,502,IOPAD_X1Y68,PSS2_X32Y313,PS_DDR_DQS_P0_502
H26,502,IOPAD_X1Y36,PSS2_X32Y313,PS_DDR_DQ4_502
J1,33,IOB_X1Y236,RIOB18_X107Y235,IO_L7P_T1_33
J3,33,IOB_X1Y225,RIOB18_X107Y225,IO_L12N_T1_MRCC_33
J4,33,IOB_X1Y226,RIOB18_X107Y225,IO_L12P_T1_MRCC_33
J5,33,IOB_X1Y209,RIOB18_X107Y209,IO_L20N_T3_33
J6,33,IOB_X1Y205,RIOB18_X107Y205,IO_L22N_T3_33
J8,34,IOB_X1Y288,RIOB18_X107Y287,IO_L6P_T0_34
J9,34,IOB_X1Y289,RIOB18_X107Y289,IO_L5N_T0_34
J10,34,IOB_X1Y290,RIOB18_X107Y289,IO_L5P_T0_34
J11,34,IOB_X1Y298,RIOB18_X107Y297,IO_L1P_T0_34
J13,35,IOB_X1Y333,RIOB18_X107Y333,IO_L8N_T1_AD10N_35
J14,35,IOB_X1Y326,RIOB18_X107Y325,IO_L12P_T1_MRCC_35
J15,35,IOB_X1Y331,RIOB18_X107Y331,IO_L9N_T1_DQS_AD3N_35
J16,501,IOPAD_X1Y111,PSS2_X32Y313,PS_MIO34_501
J18,501,IOPAD_X1Y105,PSS2_X32Y313,PS_MIO28_501
J19,501,IOPAD_X1Y101,PSS2_X32Y313,PS_MIO24_501
J20,502,IOPAD_X1Y18,PSS2_X32Y313,PS_DDR_A13_502
J21,502,IOPAD_X1Y11,PSS2_X32Y313,PS_DDR_A7_502
J23,502,IOPAD_X1Y39,PSS2_X32Y313,PS_DDR_DQ7_502
J24,502,IOPAD_X1Y38,PSS2_X32Y313,PS_DDR_DQ6_502
J25,502,IOPAD_X1Y34,PSS2_X32Y313,PS_DDR_DQ2_502
J26,502,IOPAD_X1Y32,PSS2_X32Y313,PS_DDR_DQ0_502
K1,33,IOB_X1Y231,RIOB18_X107Y231,IO_L9N_T1_DQS_33
K2,33,IOB_X1Y232,RIOB18_X107Y231,IO_L9P_T1_DQS_33
K3,33,IOB_X1Y227,RIOB18_X107Y227,IO_L11N_T1_SRCC_33
K5,33,IOB_X1Y210,RIOB18_X107Y209,IO_L20P_T3_33
K6,33,IOB_X1Y206,RIOB18_X107Y205,IO_L22P_T3_33
K7,33,IOB_X1Y201,RIOB18_X107Y201,IO_L24N_T3_33
K8,33,IOB_X1Y202,RIOB18_X107Y201,IO_L24P_T3_33
K10,34,IOB_X1Y250,RIOB18_SING_X107Y250,IO_25_VRP_34
K11,34,IOB_X1Y299,RIOB18_SING_X107Y299,IO_0_VRN_34
K12,35,IOB_X1Y300,RIOB18_SING_X107Y300,IO_25_VRP_35
K13,35,IOB_X1Y334,RIOB18_X107Y333,IO_L8P_T1_AD10P_35
K15,35,IOB_X1Y332,RIOB18_X107Y331,IO_L9P_T1_DQS_AD3P_35
K16,501,IOPAD_X1Y113,PSS2_X32Y313,PS_MIO36_501
K17,501,IOPAD_X1Y109,PSS2_X32Y313,PS_MIO32_501
K19,501,IOPAD_X1Y107,PSS2_X32Y313,PS_MIO30_501
K20,502,IOPAD_X1Y5,PSS2_X32Y313,PS_DDR_A1_502
K22,502,IOPAD_X1Y4,PSS2_X32Y313,PS_DDR_A0_502
K23,502,IOPAD_X1Y43,PSS2_X32Y313,PS_DDR_DQ11_502
K25,502,IOPAD_X1Y29,PSS2_X32Y313,PS_DDR_DM1_502
K26,502,IOPAD_X1Y40,PSS2_X32Y313,PS_DDR_DQ8_502
L2,33,IOB_X1Y217,RIOB18_X107Y217,IO_L16N_T2_33
L3,33,IOB_X1Y228,RIOB18_X107Y227,IO_L11P_T1_SRCC_33
L4,33,IOB_X1Y221,RIOB18_X107Y221,IO_L14N_T2_SRCC_33
L5,33,IOB_X1Y222,RIOB18_X107Y221,IO_L14P_T2_SRCC_33
L7,33,IOB_X1Y211,RIOB18_X107Y211,IO_L19N_T3_VREF_33
L8,33,IOB_X1Y207,RIOB18_X107Y207,IO_L21N_T3_DQS_33
L9,33,IOB_X1Y249,RIOB18_SING_X107Y249,IO_0_VRN_33
L20,502,IOPAD_X1Y10,PSS2_X32Y313,PS_DDR_A6_502
L22,502,IOPAD_X1Y7,PSS2_X32Y313,PS_DDR_A3_502
L23,502,IOPAD_X1Y41,PSS2_X32Y313,PS_DDR_DQ9_502
L24,502,IOPAD_X1Y69,PSS2_X32Y313,PS_DDR_DQS_P1_502
L25,502,IOPAD_X1Y65,PSS2_X32Y313,PS_DDR_DQS_N1_502
M1,33,IOB_X1Y213,RIOB18_X107Y213,IO_L18N_T2_33
M2,33,IOB_X1Y218,RIOB18_X107Y217,IO_L16P_T2_33
M4,33,IOB_X1Y215,RIOB18_X107Y215,IO_L17N_T2_33
M5,33,IOB_X1Y223,RIOB18_X107Y223,IO_L13N_T2_MRCC_33
M6,33,IOB_X1Y224,RIOB18_X107Y223,IO_L13P_T2_MRCC_33
M7,33,IOB_X1Y212,RIOB18_X107Y211,IO_L19P_T3_33
M8,33,IOB_X1Y208,RIOB18_X107Y207,IO_L21P_T3_DQS_33
M20,502,IOPAD_X1Y8,PSS2_X32Y313,PS_DDR_A4_502
M22,502,IOPAD_X1Y14,PSS2_X32Y313,PS_DDR_A10_502
M24,502,IOPAD_X1Y46,PSS2_X32Y313,PS_DDR_DQ14_502
M25,502,IOPAD_X1Y44,PSS2_X32Y313,PS_DDR_DQ12_502
M26,502,IOPAD_X1Y42,PSS2_X32Y313,PS_DDR_DQ10_502
N1,33,IOB_X1Y214,RIOB18_X107Y213,IO_L18P_T2_33
N2,33,IOB_X1Y219,RIOB18_X107Y219,IO_L15N_T2_DQS_33
N3,33,IOB_X1Y220,RIOB18_X107Y219,IO_L15P_T2_DQS_33
N4,33,IOB_X1Y216,RIOB18_X107Y215,IO_L17P_T2_33
N6,33,IOB_X1Y203,RIOB18_X107Y203,IO_L23N_T3_33
N7,33,IOB_X1Y204,RIOB18_X107Y203,IO_L23P_T3_33
N8,33,IOB_X1Y200,RIOB18_SING_X107Y200,IO_25_VRP_33
N14,0,IPAD_X0Y120,MONITOR_BOT_PELE1_X197Y339,VP_0
N21,502,IOPAD_X1Y6,PSS2_X32Y313,PS_DDR_A2_502
N22,502,IOPAD_X1Y9,PSS2_X32Y313,PS_DDR_A5_502
N23,502,IOPAD_X1Y47,PSS2_X32Y313,PS_DDR_DQ15_502
N24,502,IOPAD_X1Y45,PSS2_X32Y313,PS_DDR_DQ13_502
N26,502,IOPAD_X1Y50,PSS2_X32Y313,PS_DDR_DQ18_502
P13,0,IPAD_X0Y121,MONITOR_BOT_PELE1_X197Y339,VN_0
P20,502,IOPAD_X1Y16,PSS2_X32Y313,PS_DDR_A12_502
P21,502,IOPAD_X1Y24,PSS2_X32Y313,PS_DDR_CKN_502
P23,502,IOPAD_X1Y51,PSS2_X32Y313,PS_DDR_DQ19_502
P24,502,IOPAD_X1Y49,PSS2_X32Y313,PS_DDR_DQ17_502
P25,502,IOPAD_X1Y70,PSS2_X32Y313,PS_DDR_DQS_P2_502
P26,502,IOPAD_X1Y30,PSS2_X32Y313,PS_DDR_DM2_502
R1,112,OPAD_X0Y30,GTX_CHANNEL_3_X249Y202,MGTXTXN3_112
R2,112,OPAD_X0Y31,GTX_CHANNEL_3_X249Y202,MGTXTXP3_112
R5,112,IPAD_X1Y99,GTX_COMMON_X249Y179,MGTREFCLK0N_112
R6,112,IPAD_X1Y98,GTX_COMMON_X249Y179,MGTREFCLK0P_112
R20,502,IOPAD_X1Y17,PSS2_X32Y313,PS_DDR_A14_502
R21,502,IOPAD_X1Y25,PSS2_X32Y313,PS_DDR_CKP_502
R22,502,IOPAD_X1Y21,PSS2_X32Y313,PS_DDR_BA2_502
R23,502,IOPAD_X1Y55,PSS2_X32Y313,PS_DDR_DQ23_502
R25,502,IOPAD_X1Y66,PSS2_X32Y313,PS_DDR_DQS_N2_502
R26,502,IOPAD_X1Y48,PSS2_X32Y313,PS_DDR_DQ16_502
T3,112,IPAD_X1Y114,GTX_CHANNEL_3_X249Y202,MGTXRXN3_112
T4,112,IPAD_X1Y115,GTX_CHANNEL_3_X249Y202,MGTXRXP3_112
T20,502,IOPAD_X1Y12,PSS2_X32Y313,PS_DDR_A8_502
T22,502,IOPAD_X1Y20,PSS2_X32Y313,PS_DDR_BA1_502
T23,502,IOPAD_X1Y54,PSS2_X32Y313,PS_DDR_DQ22_502
T24,502,IOPAD_X1Y52,PSS2_X32Y313,PS_DDR_DQ20_502
T25,502,IOPAD_X1Y53,PSS2_X32Y313,PS_DDR_DQ21_502
U1,112,OPAD_X0Y28,GTX_CHANNEL_2_X249Y191,MGTXTXN2_112
U2,112,OPAD_X0Y29,GTX_CHANNEL_2_X249Y191,MGTXTXP2_112
U5,112,IPAD_X1Y101,GTX_COMMON_X249Y179,MGTREFCLK1N_112
U6,112,IPAD_X1Y100,GTX_COMMON_X249Y179,MGTREFCLK1P_112
U20,502,IOPAD_X1Y13,PSS2_X32Y313,PS_DDR_A9_502
U21,502,IOPAD_X1Y23,PSS2_X32Y313,PS_DDR_CKE_502
U22,502,IOPAD_X1Y19,PSS2_X32Y313,PS_DDR_BA0_502
U24,502,IOPAD_X1Y58,PSS2_X32Y313,PS_DDR_DQ26_502
U25,502,IOPAD_X1Y59,PSS2_X32Y313,PS_DDR_DQ27_502
U26,502,IOPAD_X1Y57,PSS2_X32Y313,PS_DDR_DQ25_502
V3,112,IPAD_X1Y108,GTX_CHANNEL_2_X249Y191,MGTXRXN2_112
V4,112,IPAD_X1Y109,GTX_CHANNEL_2_X249Y191,MGTXRXP2_112
V18,13,IOB_X0Y200,LIOB33_SING_X0Y200,IO_25_13
V19,13,IOB_X0Y249,LIOB33_SING_X0Y249,IO_0_13
V21,502,IOPAD_X1Y2,PSS2_X32Y313,PS_DDR_VRN_502
V22,502,IOPAD_X1Y1,PSS2_X32Y313,PS_DDR_WE_B_502
V23,502,IOPAD_X1Y133,PSS2_X32Y313,PS_DDR_RAS_B_502
V24,502,IOPAD_X1Y56,PSS2_X32Y313,PS_DDR_DQ24_502
V26,502,IOPAD_X1Y31,PSS2_X32Y313,PS_DDR_DM3_502
W1,112,OPAD_X0Y26,GTX_CHANNEL_1_X249Y173,MGTXTXN1_112
W2,112,OPAD_X0Y27,GTX_CHANNEL_1_X249Y173,MGTXTXP1_112
W5,111,IPAD_X1Y69,GTX_COMMON_X249Y127,MGTREFCLK0N_111
W6,111,IPAD_X1Y68,GTX_COMMON_X249Y127,MGTREFCLK0P_111
W13,12,IOB_X0Y190,LIOB33_X0Y189,IO_L5P_T0_12
W14,12,IOB_X0Y199,LIOB33_SING_X0Y199,IO_0_12
W15,12,IOB_X0Y151,LIOB33_X0Y151,IO_L24N_T3_12
W16,12,IOB_X0Y152,LIOB33_X0Y151,IO_L24P_T3_12
W17,12,IOB_X0Y150,LIOB33_SING_X0Y150,IO_25_12
W18,13,IOB_X0Y204,LIOB33_X0Y203,IO_L23P_T3_13
W19,13,IOB_X0Y203,LIOB33_X0Y203,IO_L23N_T3_13
W20,13,IOB_X0Y212,LIOB33_X0Y211,IO_L19P_T3_13
W21,502,IOPAD_X1Y3,PSS2_X32Y313,PS_DDR_VRP_502
W23,502,IOPAD_X1Y63,PSS2_X32Y313,PS_DDR_DQ31_502
W24,502,IOPAD_X1Y71,PSS2_X32Y313,PS_DDR_DQS_P3_502
W25,502,IOPAD_X1Y67,PSS2_X32Y313,PS_DDR_DQS_N3_502
W26,502,IOPAD_X1Y60,PSS2_X32Y313,PS_DDR_DQ28_502
Y3,112,IPAD_X1Y96,GTX_CHANNEL_1_X249Y173,MGTXRXN1_112
Y4,112,IPAD_X1Y97,GTX_CHANNEL_1_X249Y173,MGTXRXP1_112
Y10,12,IOB_X0Y194,LIOB33_X0Y193,IO_L3P_T0_DQS_12
Y11,12,IOB_X0Y197,LIOB33_X0Y197,IO_L1N_T0_12
Y12,12,IOB_X0Y198,LIOB33_X0Y197,IO_L1P_T0_12
Y13,12,IOB_X0Y189,LIOB33_X0Y189,IO_L5N_T0_12
Y15,12,IOB_X0Y153,LIOB33_X0Y153,IO_L23N_T3_12
Y16,12,IOB_X0Y154,LIOB33_X0Y153,IO_L23P_T3_12
Y17,12,IOB_X0Y162,LIOB33_X0Y161,IO_L19P_T3_12
Y18,13,IOB_X0Y202,LIOB33_X0Y201,IO_L24P_T3_13
Y20,13,IOB_X0Y211,LIOB33_X0Y211,IO_L19N_T3_VREF_13
Y21,502,IOPAD_X1Y27,PSS2_X32Y313,PS_DDR_CS_B_502
Y22,502,IOPAD_X1Y131,PSS2_X32Y313,PS_DDR_ODT_502
Y23,502,IOPAD_X1Y22,PSS2_X32Y313,PS_DDR_CAS_B_502
Y25,502,IOPAD_X1Y61,PSS2_X32Y313,PS_DDR_DQ29_502
Y26,502,IOPAD_X1Y62,PSS2_X32Y313,PS_DDR_DQ30_502
1 pin bank site tile pin_function
2 A2 34 IOB_X1Y251 RIOB18_X107Y251 IO_L24N_T3_34
3 A3 34 IOB_X1Y255 RIOB18_X107Y255 IO_L22N_T3_34
4 A4 34 IOB_X1Y256 RIOB18_X107Y255 IO_L22P_T3_34
5 A5 34 IOB_X1Y257 RIOB18_X107Y257 IO_L21N_T3_DQS_34
6 A7 34 IOB_X1Y263 RIOB18_X107Y263 IO_L18N_T2_34
7 A8 34 IOB_X1Y265 RIOB18_X107Y265 IO_L17N_T2_34
8 A9 34 IOB_X1Y266 RIOB18_X107Y265 IO_L17P_T2_34
9 A10 34 IOB_X1Y267 RIOB18_X107Y267 IO_L16N_T2_34
10 A12 35 IOB_X1Y301 RIOB18_X107Y301 IO_L24N_T3_AD15N_35
11 A13 35 IOB_X1Y302 RIOB18_X107Y301 IO_L24P_T3_AD15P_35
12 A14 35 IOB_X1Y307 RIOB18_X107Y307 IO_L21N_T3_DQS_AD14N_35
13 A15 35 IOB_X1Y308 RIOB18_X107Y307 IO_L21P_T3_DQS_AD14P_35
14 A17 35 IOB_X1Y313 RIOB18_X107Y313 IO_L18N_T2_AD13N_35
15 A18 501 IOPAD_X1Y126 PSS2_X32Y313 PS_MIO49_501
16 A19 501 IOPAD_X1Y130 PSS2_X32Y313 PS_MIO53_501
17 A20 501 IOPAD_X1Y129 PSS2_X32Y313 PS_MIO52_501
18 A22 501 IOPAD_X1Y134 PSS2_X32Y313 PS_SRST_B_501
19 A23 500 IOPAD_X1Y89 PSS2_X32Y313 PS_MIO12_500
20 A24 500 IOPAD_X1Y85 PSS2_X32Y313 PS_MIO8_500
21 A25 500 IOPAD_X1Y87 PSS2_X32Y313 PS_MIO10_500
22 AA1 112 OPAD_X0Y24 GTX_CHANNEL_0_X249Y162 MGTXTXN0_112
23 AA2 112 OPAD_X0Y25 GTX_CHANNEL_0_X249Y162 MGTXTXP0_112
24 AA5 111 IPAD_X1Y71 GTX_COMMON_X249Y127 MGTREFCLK1N_111
25 AA6 111 IPAD_X1Y70 GTX_COMMON_X249Y127 MGTREFCLK1P_111
26 AA10 12 IOB_X0Y193 LIOB33_X0Y193 IO_L3N_T0_DQS_12
27 AA12 12 IOB_X0Y187 LIOB33_X0Y187 IO_L6N_T0_VREF_12
28 AA13 12 IOB_X0Y188 LIOB33_X0Y187 IO_L6P_T0_12
29 AA14 12 IOB_X0Y155 LIOB33_X0Y155 IO_L22N_T3_12
30 AA15 12 IOB_X0Y156 LIOB33_X0Y155 IO_L22P_T3_12
31 AA17 12 IOB_X0Y161 LIOB33_X0Y161 IO_L19N_T3_VREF_12
32 AA18 13 IOB_X0Y201 LIOB33_X0Y201 IO_L24N_T3_13
33 AA19 13 IOB_X0Y206 LIOB33_X0Y205 IO_L22P_T3_13
34 AA20 13 IOB_X0Y210 LIOB33_X0Y209 IO_L20P_T3_13
35 AA22 13 IOB_X0Y230 LIOB33_X0Y229 IO_L10P_T1_13
36 AA23 13 IOB_X0Y229 LIOB33_X0Y229 IO_L10N_T1_13
37 AA24 13 IOB_X0Y238 LIOB33_X0Y237 IO_L6P_T0_13
38 AA25 13 IOB_X0Y248 LIOB33_X0Y247 IO_L1P_T0_13
39 AB3 112 IPAD_X1Y90 GTX_CHANNEL_0_X249Y162 MGTXRXN0_112
40 AB4 112 IPAD_X1Y91 GTX_CHANNEL_0_X249Y162 MGTXRXP0_112
41 AB10 12 IOB_X0Y191 LIOB33_X0Y191 IO_L4N_T0_12
42 AB11 12 IOB_X0Y192 LIOB33_X0Y191 IO_L4P_T0_12
43 AB12 12 IOB_X0Y196 LIOB33_X0Y195 IO_L2P_T0_12
44 AB14 12 IOB_X0Y171 LIOB33_X0Y171 IO_L14N_T2_SRCC_12
45 AB15 12 IOB_X0Y172 LIOB33_X0Y171 IO_L14P_T2_SRCC_12
46 AB16 12 IOB_X0Y159 LIOB33_X0Y159 IO_L20N_T3_12
47 AB17 12 IOB_X0Y160 LIOB33_X0Y159 IO_L20P_T3_12
48 AB19 13 IOB_X0Y205 LIOB33_X0Y205 IO_L22N_T3_13
49 AB20 13 IOB_X0Y209 LIOB33_X0Y209 IO_L20N_T3_13
50 AB21 13 IOB_X0Y232 LIOB33_X0Y231 IO_L9P_T1_DQS_13
51 AB22 13 IOB_X0Y231 LIOB33_X0Y231 IO_L9N_T1_DQS_13
52 AB24 13 IOB_X0Y237 LIOB33_X0Y237 IO_L6N_T0_VREF_13
53 AB25 13 IOB_X0Y247 LIOB33_X0Y247 IO_L1N_T0_13
54 AB26 13 IOB_X0Y246 LIOB33_X0Y245 IO_L2P_T0_13
55 AC1 111 OPAD_X0Y22 GTX_CHANNEL_3_X249Y150 MGTXTXN3_111
56 AC2 111 OPAD_X0Y23 GTX_CHANNEL_3_X249Y150 MGTXTXP3_111
57 AC5 111 IPAD_X1Y78 GTX_CHANNEL_2_X249Y139 MGTXRXN2_111
58 AC6 111 IPAD_X1Y79 GTX_CHANNEL_2_X249Y139 MGTXRXP2_111
59 AC11 12 IOB_X0Y195 LIOB33_X0Y195 IO_L2N_T0_12
60 AC12 12 IOB_X0Y178 LIOB33_X0Y177 IO_L11P_T1_SRCC_12
61 AC13 12 IOB_X0Y176 LIOB33_X0Y175 IO_L12P_T1_MRCC_12
62 AC14 12 IOB_X0Y174 LIOB33_X0Y173 IO_L13P_T2_MRCC_12
63 AC16 12 IOB_X0Y157 LIOB33_X0Y157 IO_L21N_T3_DQS_12
64 AC17 12 IOB_X0Y158 LIOB33_X0Y157 IO_L21P_T3_DQS_12
65 AC18 13 IOB_X0Y208 LIOB33_X0Y207 IO_L21P_T3_DQS_13
66 AC19 13 IOB_X0Y207 LIOB33_X0Y207 IO_L21N_T3_DQS_13
67 AC21 13 IOB_X0Y222 LIOB33_X0Y221 IO_L14P_T2_SRCC_13
68 AC22 13 IOB_X0Y221 LIOB33_X0Y221 IO_L14N_T2_SRCC_13
69 AC23 13 IOB_X0Y226 LIOB33_X0Y225 IO_L12P_T1_MRCC_13
70 AC24 13 IOB_X0Y225 LIOB33_X0Y225 IO_L12N_T1_MRCC_13
71 AC26 13 IOB_X0Y245 LIOB33_X0Y245 IO_L2N_T0_13
72 AD3 111 IPAD_X1Y84 GTX_CHANNEL_3_X249Y150 MGTXRXN3_111
73 AD4 111 IPAD_X1Y85 GTX_CHANNEL_3_X249Y150 MGTXRXP3_111
74 AD7 111 IPAD_X1Y60 GTX_CHANNEL_0_X249Y110 MGTXRXN0_111
75 AD8 111 IPAD_X1Y61 GTX_CHANNEL_0_X249Y110 MGTXRXP0_111
76 AD10 12 IOB_X0Y185 LIOB33_X0Y185 IO_L7N_T1_12
77 AD11 12 IOB_X0Y177 LIOB33_X0Y177 IO_L11N_T1_SRCC_12
78 AD13 12 IOB_X0Y175 LIOB33_X0Y175 IO_L12N_T1_MRCC_12
79 AD14 12 IOB_X0Y173 LIOB33_X0Y173 IO_L13N_T2_MRCC_12
80 AD15 12 IOB_X0Y169 LIOB33_X0Y169 IO_L15N_T2_DQS_12
81 AD16 12 IOB_X0Y170 LIOB33_X0Y169 IO_L15P_T2_DQS_12
82 AD18 13 IOB_X0Y216 LIOB33_X0Y215 IO_L17P_T2_13
83 AD19 13 IOB_X0Y215 LIOB33_X0Y215 IO_L17N_T2_13
84 AD20 13 IOB_X0Y224 LIOB33_X0Y223 IO_L13P_T2_MRCC_13
85 AD21 13 IOB_X0Y223 LIOB33_X0Y223 IO_L13N_T2_MRCC_13
86 AD23 13 IOB_X0Y228 LIOB33_X0Y227 IO_L11P_T1_SRCC_13
87 AD24 13 IOB_X0Y227 LIOB33_X0Y227 IO_L11N_T1_SRCC_13
88 AD25 13 IOB_X0Y242 LIOB33_X0Y241 IO_L4P_T0_13
89 AD26 13 IOB_X0Y241 LIOB33_X0Y241 IO_L4N_T0_13
90 AE1 111 OPAD_X0Y20 GTX_CHANNEL_2_X249Y139 MGTXTXN2_111
91 AE2 111 OPAD_X0Y21 GTX_CHANNEL_2_X249Y139 MGTXTXP2_111
92 AE5 111 IPAD_X1Y66 GTX_CHANNEL_1_X249Y121 MGTXRXN1_111
93 AE6 111 IPAD_X1Y67 GTX_CHANNEL_1_X249Y121 MGTXRXP1_111
94 AE10 12 IOB_X0Y186 LIOB33_X0Y185 IO_L7P_T1_12
95 AE11 12 IOB_X0Y182 LIOB33_X0Y181 IO_L9P_T1_DQS_12
96 AE12 12 IOB_X0Y184 LIOB33_X0Y183 IO_L8P_T1_12
97 AE13 12 IOB_X0Y180 LIOB33_X0Y179 IO_L10P_T1_12
98 AE15 12 IOB_X0Y165 LIOB33_X0Y165 IO_L17N_T2_12
99 AE16 12 IOB_X0Y166 LIOB33_X0Y165 IO_L17P_T2_12
100 AE17 12 IOB_X0Y164 LIOB33_X0Y163 IO_L18P_T2_12
101 AE18 13 IOB_X0Y214 LIOB33_X0Y213 IO_L18P_T2_13
102 AE20 13 IOB_X0Y218 LIOB33_X0Y217 IO_L16P_T2_13
103 AE21 13 IOB_X0Y217 LIOB33_X0Y217 IO_L16N_T2_13
104 AE22 13 IOB_X0Y236 LIOB33_X0Y235 IO_L7P_T1_13
105 AE23 13 IOB_X0Y234 LIOB33_X0Y233 IO_L8P_T1_13
106 AE25 13 IOB_X0Y244 LIOB33_X0Y243 IO_L3P_T0_DQS_13
107 AE26 13 IOB_X0Y243 LIOB33_X0Y243 IO_L3N_T0_DQS_13
108 AF3 111 OPAD_X0Y18 GTX_CHANNEL_1_X249Y121 MGTXTXN1_111
109 AF4 111 OPAD_X0Y19 GTX_CHANNEL_1_X249Y121 MGTXTXP1_111
110 AF7 111 OPAD_X0Y16 GTX_CHANNEL_0_X249Y110 MGTXTXN0_111
111 AF8 111 OPAD_X0Y17 GTX_CHANNEL_0_X249Y110 MGTXTXP0_111
112 AF10 12 IOB_X0Y181 LIOB33_X0Y181 IO_L9N_T1_DQS_12
113 AF12 12 IOB_X0Y183 LIOB33_X0Y183 IO_L8N_T1_12
114 AF13 12 IOB_X0Y179 LIOB33_X0Y179 IO_L10N_T1_12
115 AF14 12 IOB_X0Y167 LIOB33_X0Y167 IO_L16N_T2_12
116 AF15 12 IOB_X0Y168 LIOB33_X0Y167 IO_L16P_T2_12
117 AF17 12 IOB_X0Y163 LIOB33_X0Y163 IO_L18N_T2_12
118 AF18 13 IOB_X0Y213 LIOB33_X0Y213 IO_L18N_T2_13
119 AF19 13 IOB_X0Y220 LIOB33_X0Y219 IO_L15P_T2_DQS_13
120 AF20 13 IOB_X0Y219 LIOB33_X0Y219 IO_L15N_T2_DQS_13
121 AF22 13 IOB_X0Y235 LIOB33_X0Y235 IO_L7N_T1_13
122 AF23 13 IOB_X0Y233 LIOB33_X0Y233 IO_L8N_T1_13
123 AF24 13 IOB_X0Y240 LIOB33_X0Y239 IO_L5P_T0_13
124 AF25 13 IOB_X0Y239 LIOB33_X0Y239 IO_L5N_T0_13
125 B1 34 IOB_X1Y253 RIOB18_X107Y253 IO_L23N_T3_34
126 B2 34 IOB_X1Y252 RIOB18_X107Y251 IO_L24P_T3_34
127 B4 34 IOB_X1Y259 RIOB18_X107Y259 IO_L20N_T3_34
128 B5 34 IOB_X1Y260 RIOB18_X107Y259 IO_L20P_T3_34
129 B6 34 IOB_X1Y258 RIOB18_X107Y257 IO_L21P_T3_DQS_34
130 B7 34 IOB_X1Y264 RIOB18_X107Y263 IO_L18P_T2_34
131 B9 34 IOB_X1Y269 RIOB18_X107Y269 IO_L15N_T2_DQS_34
132 B10 34 IOB_X1Y268 RIOB18_X107Y267 IO_L16P_T2_34
133 B11 35 IOB_X1Y303 RIOB18_X107Y303 IO_L23N_T3_35
134 B12 35 IOB_X1Y305 RIOB18_X107Y305 IO_L22N_T3_AD7N_35
135 B14 35 IOB_X1Y309 RIOB18_X107Y309 IO_L20N_T3_AD6N_35
136 B15 35 IOB_X1Y315 RIOB18_X107Y315 IO_L17N_T2_AD5N_35
137 B16 35 IOB_X1Y316 RIOB18_X107Y315 IO_L17P_T2_AD5P_35
138 B17 35 IOB_X1Y314 RIOB18_X107Y313 IO_L18P_T2_AD13P_35
139 B19 501 IOPAD_X1Y124 PSS2_X32Y313 PS_MIO47_501
140 B20 501 IOPAD_X1Y128 PSS2_X32Y313 PS_MIO51_501
141 B21 501 IOPAD_X1Y125 PSS2_X32Y313 PS_MIO48_501
142 B22 501 IOPAD_X1Y127 PSS2_X32Y313 PS_MIO50_501
143 B24 500 IOPAD_X1Y26 PSS2_X32Y313 PS_CLK_500
144 B25 500 IOPAD_X1Y90 PSS2_X32Y313 PS_MIO13_500
145 B26 500 IOPAD_X1Y88 PSS2_X32Y313 PS_MIO11_500
146 C1 33 IOB_X1Y241 RIOB18_X107Y241 IO_L4N_T0_33
147 C2 34 IOB_X1Y254 RIOB18_X107Y253 IO_L23P_T3_34
148 C3 34 IOB_X1Y261 RIOB18_X107Y261 IO_L19N_T3_VREF_34
149 C4 34 IOB_X1Y262 RIOB18_X107Y261 IO_L19P_T3_34
150 C6 34 IOB_X1Y271 RIOB18_X107Y271 IO_L14N_T2_SRCC_34
151 C7 34 IOB_X1Y273 RIOB18_X107Y273 IO_L13N_T2_MRCC_34
152 C8 34 IOB_X1Y274 RIOB18_X107Y273 IO_L13P_T2_MRCC_34
153 C9 34 IOB_X1Y270 RIOB18_X107Y269 IO_L15P_T2_DQS_34
154 C11 35 IOB_X1Y304 RIOB18_X107Y303 IO_L23P_T3_35
155 C12 35 IOB_X1Y306 RIOB18_X107Y305 IO_L22P_T3_AD7P_35
156 C13 35 IOB_X1Y311 RIOB18_X107Y311 IO_L19N_T3_VREF_35
157 C14 35 IOB_X1Y310 RIOB18_X107Y309 IO_L20P_T3_AD6P_35
158 C16 35 IOB_X1Y319 RIOB18_X107Y319 IO_L15N_T2_DQS_AD12N_35
159 C17 35 IOB_X1Y320 RIOB18_X107Y319 IO_L15P_T2_DQS_AD12P_35
160 C18 501 IOPAD_X1Y122 PSS2_X32Y313 PS_MIO45_501
161 C19 501 IOPAD_X1Y118 PSS2_X32Y313 PS_MIO41_501
162 C21 501 IOPAD_X1Y116 PSS2_X32Y313 PS_MIO39_501
163 C22 501 IOPAD_X1Y117 PSS2_X32Y313 PS_MIO40_501
164 C23 500 IOPAD_X1Y132 PSS2_X32Y313 PS_POR_B_500
165 C24 500 IOPAD_X1Y92 PSS2_X32Y313 PS_MIO15_500
166 C26 500 IOPAD_X1Y82 PSS2_X32Y313 PS_MIO5_500
167 D1 33 IOB_X1Y242 RIOB18_X107Y241 IO_L4P_T0_33
168 D3 33 IOB_X1Y245 RIOB18_X107Y245 IO_L2N_T0_33
169 D4 33 IOB_X1Y246 RIOB18_X107Y245 IO_L2P_T0_33
170 D5 34 IOB_X1Y279 RIOB18_X107Y279 IO_L10N_T1_34
171 D6 34 IOB_X1Y272 RIOB18_X107Y271 IO_L14P_T2_SRCC_34
172 D8 34 IOB_X1Y283 RIOB18_X107Y283 IO_L8N_T1_34
173 D9 34 IOB_X1Y284 RIOB18_X107Y283 IO_L8P_T1_34
174 D10 35 IOB_X1Y345 RIOB18_X107Y345 IO_L2N_T0_AD8N_35
175 D11 35 IOB_X1Y341 RIOB18_X107Y341 IO_L4N_T0_35
176 D13 35 IOB_X1Y312 RIOB18_X107Y311 IO_L19P_T3_35
177 D14 35 IOB_X1Y323 RIOB18_X107Y323 IO_L13N_T2_MRCC_35
178 D15 35 IOB_X1Y324 RIOB18_X107Y323 IO_L13P_T2_MRCC_35
179 D16 35 IOB_X1Y317 RIOB18_X107Y317 IO_L16N_T2_35
180 D18 501 IOPAD_X1Y120 PSS2_X32Y313 PS_MIO43_501
181 D19 501 IOPAD_X1Y112 PSS2_X32Y313 PS_MIO35_501
182 D20 501 IOPAD_X1Y114 PSS2_X32Y313 PS_MIO37_501
183 D21 501 IOPAD_X1Y115 PSS2_X32Y313 PS_MIO38_501
184 D23 500 IOPAD_X1Y91 PSS2_X32Y313 PS_MIO14_500
185 D24 500 IOPAD_X1Y86 PSS2_X32Y313 PS_MIO9_500
186 D25 500 IOPAD_X1Y80 PSS2_X32Y313 PS_MIO3_500
187 D26 500 IOPAD_X1Y78 PSS2_X32Y313 PS_MIO1_500
188 E1 33 IOB_X1Y239 RIOB18_X107Y239 IO_L5N_T0_33
189 E2 33 IOB_X1Y240 RIOB18_X107Y239 IO_L5P_T0_33
190 E3 33 IOB_X1Y237 RIOB18_X107Y237 IO_L6N_T0_VREF_33
191 E5 34 IOB_X1Y285 RIOB18_X107Y285 IO_L7N_T1_34
192 E6 34 IOB_X1Y280 RIOB18_X107Y279 IO_L10P_T1_34
193 E7 34 IOB_X1Y277 RIOB18_X107Y277 IO_L11N_T1_SRCC_34
194 E8 34 IOB_X1Y281 RIOB18_X107Y281 IO_L9N_T1_DQS_34
195 E10 35 IOB_X1Y346 RIOB18_X107Y345 IO_L2P_T0_AD8P_35
196 E11 35 IOB_X1Y342 RIOB18_X107Y341 IO_L4P_T0_35
197 E12 35 IOB_X1Y347 RIOB18_X107Y347 IO_L1N_T0_AD0N_35
198 E13 35 IOB_X1Y337 RIOB18_X107Y337 IO_L6N_T0_VREF_35
199 E15 35 IOB_X1Y321 RIOB18_X107Y321 IO_L14N_T2_AD4N_SRCC_35
200 E16 35 IOB_X1Y318 RIOB18_X107Y317 IO_L16P_T2_35
201 E17 501 IOPAD_X1Y123 PSS2_X32Y313 PS_MIO46_501
202 E18 501 IOPAD_X1Y121 PSS2_X32Y313 PS_MIO44_501
203 E20 501 IOPAD_X1Y106 PSS2_X32Y313 PS_MIO29_501
204 E21 501 IOPAD_X1Y108 PSS2_X32Y313 PS_MIO31_501
205 E22 501 IOPAD_X1Y110 PSS2_X32Y313 PS_MIO33_501
206 E23 500 IOPAD_X1Y84 PSS2_X32Y313 PS_MIO7_500
207 E25 500 IOPAD_X1Y79 PSS2_X32Y313 PS_MIO2_500
208 E26 500 IOPAD_X1Y77 PSS2_X32Y313 PS_MIO0_500
209 F2 33 IOB_X1Y243 RIOB18_X107Y243 IO_L3N_T0_DQS_33
210 F3 33 IOB_X1Y238 RIOB18_X107Y237 IO_L6P_T0_33
211 F4 33 IOB_X1Y247 RIOB18_X107Y247 IO_L1N_T0_33
212 F5 34 IOB_X1Y286 RIOB18_X107Y285 IO_L7P_T1_34
213 F7 34 IOB_X1Y275 RIOB18_X107Y275 IO_L12N_T1_MRCC_34
214 F8 34 IOB_X1Y278 RIOB18_X107Y277 IO_L11P_T1_SRCC_34
215 F9 34 IOB_X1Y282 RIOB18_X107Y281 IO_L9P_T1_DQS_34
216 F10 35 IOB_X1Y343 RIOB18_X107Y343 IO_L3N_T0_DQS_AD1N_35
217 F12 35 IOB_X1Y348 RIOB18_X107Y347 IO_L1P_T0_AD0P_35
218 F13 35 IOB_X1Y338 RIOB18_X107Y337 IO_L6P_T0_35
219 F14 35 IOB_X1Y327 RIOB18_X107Y327 IO_L11N_T1_SRCC_35
220 F15 35 IOB_X1Y322 RIOB18_X107Y321 IO_L14P_T2_AD4P_SRCC_35
221 F17 501 IOPAD_X1Y119 PSS2_X32Y313 PS_MIO42_501
222 F18 501 IOPAD_X1Y104 PSS2_X32Y313 PS_MIO27_501
223 F19 501 IOPAD_X1Y102 PSS2_X32Y313 PS_MIO25_501
224 F20 501 IOPAD_X1Y100 PSS2_X32Y313 PS_MIO23_501
225 F22 501 IOPAD_X1Y98 PSS2_X32Y313 PS_MIO21_501
226 F23 500 IOPAD_X1Y83 PSS2_X32Y313 PS_MIO6_500
227 F24 500 IOPAD_X1Y81 PSS2_X32Y313 PS_MIO4_500
228 F25 502 IOPAD_X1Y33 PSS2_X32Y313 PS_DDR_DQ1_502
229 G1 33 IOB_X1Y229 RIOB18_X107Y229 IO_L10N_T1_33
230 G2 33 IOB_X1Y244 RIOB18_X107Y243 IO_L3P_T0_DQS_33
231 G4 33 IOB_X1Y248 RIOB18_X107Y247 IO_L1P_T0_33
232 G5 34 IOB_X1Y295 RIOB18_X107Y295 IO_L2N_T0_34
233 G6 34 IOB_X1Y296 RIOB18_X107Y295 IO_L2P_T0_34
234 G7 34 IOB_X1Y276 RIOB18_X107Y275 IO_L12P_T1_MRCC_34
235 G9 34 IOB_X1Y293 RIOB18_X107Y293 IO_L3N_T0_DQS_34
236 G10 35 IOB_X1Y344 RIOB18_X107Y343 IO_L3P_T0_DQS_AD1P_35
237 G11 35 IOB_X1Y339 RIOB18_X107Y339 IO_L5N_T0_AD9N_35
238 G12 35 IOB_X1Y340 RIOB18_X107Y339 IO_L5P_T0_AD9P_35
239 G14 35 IOB_X1Y328 RIOB18_X107Y327 IO_L11P_T1_SRCC_35
240 G15 35 IOB_X1Y329 RIOB18_X107Y329 IO_L10N_T1_AD11N_35
241 G16 35 IOB_X1Y330 RIOB18_X107Y329 IO_L10P_T1_AD11P_35
242 G17 501 IOPAD_X1Y94 PSS2_X32Y313 PS_MIO17_501
243 G19 501 IOPAD_X1Y96 PSS2_X32Y313 PS_MIO19_501
244 G20 501 IOPAD_X1Y95 PSS2_X32Y313 PS_MIO18_501
245 G21 501 IOPAD_X1Y93 PSS2_X32Y313 PS_MIO16_501
246 G22 501 IOPAD_X1Y99 PSS2_X32Y313 PS_MIO22_501
247 G24 502 IOPAD_X1Y28 PSS2_X32Y313 PS_DDR_DM0_502
248 G25 502 IOPAD_X1Y64 PSS2_X32Y313 PS_DDR_DQS_N0_502
249 G26 502 IOPAD_X1Y35 PSS2_X32Y313 PS_DDR_DQ3_502
250 H1 33 IOB_X1Y235 RIOB18_X107Y235 IO_L7N_T1_33
251 H2 33 IOB_X1Y230 RIOB18_X107Y229 IO_L10P_T1_33
252 H3 33 IOB_X1Y233 RIOB18_X107Y233 IO_L8N_T1_33
253 H4 33 IOB_X1Y234 RIOB18_X107Y233 IO_L8P_T1_33
254 H6 34 IOB_X1Y291 RIOB18_X107Y291 IO_L4N_T0_34
255 H7 34 IOB_X1Y292 RIOB18_X107Y291 IO_L4P_T0_34
256 H8 34 IOB_X1Y287 RIOB18_X107Y287 IO_L6N_T0_VREF_34
257 H9 34 IOB_X1Y294 RIOB18_X107Y293 IO_L3P_T0_DQS_PUDC_B_34
258 H11 34 IOB_X1Y297 RIOB18_X107Y297 IO_L1N_T0_34
259 H12 35 IOB_X1Y335 RIOB18_X107Y335 IO_L7N_T1_AD2N_35
260 H13 35 IOB_X1Y336 RIOB18_X107Y335 IO_L7P_T1_AD2P_35
261 H14 35 IOB_X1Y325 RIOB18_X107Y325 IO_L12N_T1_MRCC_35
262 H16 35 IOB_X1Y349 RIOB18_SING_X107Y349 IO_0_VRN_35
263 H17 501 IOPAD_X1Y103 PSS2_X32Y313 PS_MIO26_501
264 H19 501 IOPAD_X1Y97 PSS2_X32Y313 PS_MIO20_501
265 H21 502 IOPAD_X1Y15 PSS2_X32Y313 PS_DDR_A11_502
266 H22 502 IOPAD_X1Y72 PSS2_X32Y313 PS_DDR_DRST_B_502
267 H23 502 IOPAD_X1Y37 PSS2_X32Y313 PS_DDR_DQ5_502
268 H24 502 IOPAD_X1Y68 PSS2_X32Y313 PS_DDR_DQS_P0_502
269 H26 502 IOPAD_X1Y36 PSS2_X32Y313 PS_DDR_DQ4_502
270 J1 33 IOB_X1Y236 RIOB18_X107Y235 IO_L7P_T1_33
271 J3 33 IOB_X1Y225 RIOB18_X107Y225 IO_L12N_T1_MRCC_33
272 J4 33 IOB_X1Y226 RIOB18_X107Y225 IO_L12P_T1_MRCC_33
273 J5 33 IOB_X1Y209 RIOB18_X107Y209 IO_L20N_T3_33
274 J6 33 IOB_X1Y205 RIOB18_X107Y205 IO_L22N_T3_33
275 J8 34 IOB_X1Y288 RIOB18_X107Y287 IO_L6P_T0_34
276 J9 34 IOB_X1Y289 RIOB18_X107Y289 IO_L5N_T0_34
277 J10 34 IOB_X1Y290 RIOB18_X107Y289 IO_L5P_T0_34
278 J11 34 IOB_X1Y298 RIOB18_X107Y297 IO_L1P_T0_34
279 J13 35 IOB_X1Y333 RIOB18_X107Y333 IO_L8N_T1_AD10N_35
280 J14 35 IOB_X1Y326 RIOB18_X107Y325 IO_L12P_T1_MRCC_35
281 J15 35 IOB_X1Y331 RIOB18_X107Y331 IO_L9N_T1_DQS_AD3N_35
282 J16 501 IOPAD_X1Y111 PSS2_X32Y313 PS_MIO34_501
283 J18 501 IOPAD_X1Y105 PSS2_X32Y313 PS_MIO28_501
284 J19 501 IOPAD_X1Y101 PSS2_X32Y313 PS_MIO24_501
285 J20 502 IOPAD_X1Y18 PSS2_X32Y313 PS_DDR_A13_502
286 J21 502 IOPAD_X1Y11 PSS2_X32Y313 PS_DDR_A7_502
287 J23 502 IOPAD_X1Y39 PSS2_X32Y313 PS_DDR_DQ7_502
288 J24 502 IOPAD_X1Y38 PSS2_X32Y313 PS_DDR_DQ6_502
289 J25 502 IOPAD_X1Y34 PSS2_X32Y313 PS_DDR_DQ2_502
290 J26 502 IOPAD_X1Y32 PSS2_X32Y313 PS_DDR_DQ0_502
291 K1 33 IOB_X1Y231 RIOB18_X107Y231 IO_L9N_T1_DQS_33
292 K2 33 IOB_X1Y232 RIOB18_X107Y231 IO_L9P_T1_DQS_33
293 K3 33 IOB_X1Y227 RIOB18_X107Y227 IO_L11N_T1_SRCC_33
294 K5 33 IOB_X1Y210 RIOB18_X107Y209 IO_L20P_T3_33
295 K6 33 IOB_X1Y206 RIOB18_X107Y205 IO_L22P_T3_33
296 K7 33 IOB_X1Y201 RIOB18_X107Y201 IO_L24N_T3_33
297 K8 33 IOB_X1Y202 RIOB18_X107Y201 IO_L24P_T3_33
298 K10 34 IOB_X1Y250 RIOB18_SING_X107Y250 IO_25_VRP_34
299 K11 34 IOB_X1Y299 RIOB18_SING_X107Y299 IO_0_VRN_34
300 K12 35 IOB_X1Y300 RIOB18_SING_X107Y300 IO_25_VRP_35
301 K13 35 IOB_X1Y334 RIOB18_X107Y333 IO_L8P_T1_AD10P_35
302 K15 35 IOB_X1Y332 RIOB18_X107Y331 IO_L9P_T1_DQS_AD3P_35
303 K16 501 IOPAD_X1Y113 PSS2_X32Y313 PS_MIO36_501
304 K17 501 IOPAD_X1Y109 PSS2_X32Y313 PS_MIO32_501
305 K19 501 IOPAD_X1Y107 PSS2_X32Y313 PS_MIO30_501
306 K20 502 IOPAD_X1Y5 PSS2_X32Y313 PS_DDR_A1_502
307 K22 502 IOPAD_X1Y4 PSS2_X32Y313 PS_DDR_A0_502
308 K23 502 IOPAD_X1Y43 PSS2_X32Y313 PS_DDR_DQ11_502
309 K25 502 IOPAD_X1Y29 PSS2_X32Y313 PS_DDR_DM1_502
310 K26 502 IOPAD_X1Y40 PSS2_X32Y313 PS_DDR_DQ8_502
311 L2 33 IOB_X1Y217 RIOB18_X107Y217 IO_L16N_T2_33
312 L3 33 IOB_X1Y228 RIOB18_X107Y227 IO_L11P_T1_SRCC_33
313 L4 33 IOB_X1Y221 RIOB18_X107Y221 IO_L14N_T2_SRCC_33
314 L5 33 IOB_X1Y222 RIOB18_X107Y221 IO_L14P_T2_SRCC_33
315 L7 33 IOB_X1Y211 RIOB18_X107Y211 IO_L19N_T3_VREF_33
316 L8 33 IOB_X1Y207 RIOB18_X107Y207 IO_L21N_T3_DQS_33
317 L9 33 IOB_X1Y249 RIOB18_SING_X107Y249 IO_0_VRN_33
318 L20 502 IOPAD_X1Y10 PSS2_X32Y313 PS_DDR_A6_502
319 L22 502 IOPAD_X1Y7 PSS2_X32Y313 PS_DDR_A3_502
320 L23 502 IOPAD_X1Y41 PSS2_X32Y313 PS_DDR_DQ9_502
321 L24 502 IOPAD_X1Y69 PSS2_X32Y313 PS_DDR_DQS_P1_502
322 L25 502 IOPAD_X1Y65 PSS2_X32Y313 PS_DDR_DQS_N1_502
323 M1 33 IOB_X1Y213 RIOB18_X107Y213 IO_L18N_T2_33
324 M2 33 IOB_X1Y218 RIOB18_X107Y217 IO_L16P_T2_33
325 M4 33 IOB_X1Y215 RIOB18_X107Y215 IO_L17N_T2_33
326 M5 33 IOB_X1Y223 RIOB18_X107Y223 IO_L13N_T2_MRCC_33
327 M6 33 IOB_X1Y224 RIOB18_X107Y223 IO_L13P_T2_MRCC_33
328 M7 33 IOB_X1Y212 RIOB18_X107Y211 IO_L19P_T3_33
329 M8 33 IOB_X1Y208 RIOB18_X107Y207 IO_L21P_T3_DQS_33
330 M20 502 IOPAD_X1Y8 PSS2_X32Y313 PS_DDR_A4_502
331 M22 502 IOPAD_X1Y14 PSS2_X32Y313 PS_DDR_A10_502
332 M24 502 IOPAD_X1Y46 PSS2_X32Y313 PS_DDR_DQ14_502
333 M25 502 IOPAD_X1Y44 PSS2_X32Y313 PS_DDR_DQ12_502
334 M26 502 IOPAD_X1Y42 PSS2_X32Y313 PS_DDR_DQ10_502
335 N1 33 IOB_X1Y214 RIOB18_X107Y213 IO_L18P_T2_33
336 N2 33 IOB_X1Y219 RIOB18_X107Y219 IO_L15N_T2_DQS_33
337 N3 33 IOB_X1Y220 RIOB18_X107Y219 IO_L15P_T2_DQS_33
338 N4 33 IOB_X1Y216 RIOB18_X107Y215 IO_L17P_T2_33
339 N6 33 IOB_X1Y203 RIOB18_X107Y203 IO_L23N_T3_33
340 N7 33 IOB_X1Y204 RIOB18_X107Y203 IO_L23P_T3_33
341 N8 33 IOB_X1Y200 RIOB18_SING_X107Y200 IO_25_VRP_33
342 N14 0 IPAD_X0Y120 MONITOR_BOT_PELE1_X197Y339 VP_0
343 N21 502 IOPAD_X1Y6 PSS2_X32Y313 PS_DDR_A2_502
344 N22 502 IOPAD_X1Y9 PSS2_X32Y313 PS_DDR_A5_502
345 N23 502 IOPAD_X1Y47 PSS2_X32Y313 PS_DDR_DQ15_502
346 N24 502 IOPAD_X1Y45 PSS2_X32Y313 PS_DDR_DQ13_502
347 N26 502 IOPAD_X1Y50 PSS2_X32Y313 PS_DDR_DQ18_502
348 P13 0 IPAD_X0Y121 MONITOR_BOT_PELE1_X197Y339 VN_0
349 P20 502 IOPAD_X1Y16 PSS2_X32Y313 PS_DDR_A12_502
350 P21 502 IOPAD_X1Y24 PSS2_X32Y313 PS_DDR_CKN_502
351 P23 502 IOPAD_X1Y51 PSS2_X32Y313 PS_DDR_DQ19_502
352 P24 502 IOPAD_X1Y49 PSS2_X32Y313 PS_DDR_DQ17_502
353 P25 502 IOPAD_X1Y70 PSS2_X32Y313 PS_DDR_DQS_P2_502
354 P26 502 IOPAD_X1Y30 PSS2_X32Y313 PS_DDR_DM2_502
355 R1 112 OPAD_X0Y30 GTX_CHANNEL_3_X249Y202 MGTXTXN3_112
356 R2 112 OPAD_X0Y31 GTX_CHANNEL_3_X249Y202 MGTXTXP3_112
357 R5 112 IPAD_X1Y99 GTX_COMMON_X249Y179 MGTREFCLK0N_112
358 R6 112 IPAD_X1Y98 GTX_COMMON_X249Y179 MGTREFCLK0P_112
359 R20 502 IOPAD_X1Y17 PSS2_X32Y313 PS_DDR_A14_502
360 R21 502 IOPAD_X1Y25 PSS2_X32Y313 PS_DDR_CKP_502
361 R22 502 IOPAD_X1Y21 PSS2_X32Y313 PS_DDR_BA2_502
362 R23 502 IOPAD_X1Y55 PSS2_X32Y313 PS_DDR_DQ23_502
363 R25 502 IOPAD_X1Y66 PSS2_X32Y313 PS_DDR_DQS_N2_502
364 R26 502 IOPAD_X1Y48 PSS2_X32Y313 PS_DDR_DQ16_502
365 T3 112 IPAD_X1Y114 GTX_CHANNEL_3_X249Y202 MGTXRXN3_112
366 T4 112 IPAD_X1Y115 GTX_CHANNEL_3_X249Y202 MGTXRXP3_112
367 T20 502 IOPAD_X1Y12 PSS2_X32Y313 PS_DDR_A8_502
368 T22 502 IOPAD_X1Y20 PSS2_X32Y313 PS_DDR_BA1_502
369 T23 502 IOPAD_X1Y54 PSS2_X32Y313 PS_DDR_DQ22_502
370 T24 502 IOPAD_X1Y52 PSS2_X32Y313 PS_DDR_DQ20_502
371 T25 502 IOPAD_X1Y53 PSS2_X32Y313 PS_DDR_DQ21_502
372 U1 112 OPAD_X0Y28 GTX_CHANNEL_2_X249Y191 MGTXTXN2_112
373 U2 112 OPAD_X0Y29 GTX_CHANNEL_2_X249Y191 MGTXTXP2_112
374 U5 112 IPAD_X1Y101 GTX_COMMON_X249Y179 MGTREFCLK1N_112
375 U6 112 IPAD_X1Y100 GTX_COMMON_X249Y179 MGTREFCLK1P_112
376 U20 502 IOPAD_X1Y13 PSS2_X32Y313 PS_DDR_A9_502
377 U21 502 IOPAD_X1Y23 PSS2_X32Y313 PS_DDR_CKE_502
378 U22 502 IOPAD_X1Y19 PSS2_X32Y313 PS_DDR_BA0_502
379 U24 502 IOPAD_X1Y58 PSS2_X32Y313 PS_DDR_DQ26_502
380 U25 502 IOPAD_X1Y59 PSS2_X32Y313 PS_DDR_DQ27_502
381 U26 502 IOPAD_X1Y57 PSS2_X32Y313 PS_DDR_DQ25_502
382 V3 112 IPAD_X1Y108 GTX_CHANNEL_2_X249Y191 MGTXRXN2_112
383 V4 112 IPAD_X1Y109 GTX_CHANNEL_2_X249Y191 MGTXRXP2_112
384 V18 13 IOB_X0Y200 LIOB33_SING_X0Y200 IO_25_13
385 V19 13 IOB_X0Y249 LIOB33_SING_X0Y249 IO_0_13
386 V21 502 IOPAD_X1Y2 PSS2_X32Y313 PS_DDR_VRN_502
387 V22 502 IOPAD_X1Y1 PSS2_X32Y313 PS_DDR_WE_B_502
388 V23 502 IOPAD_X1Y133 PSS2_X32Y313 PS_DDR_RAS_B_502
389 V24 502 IOPAD_X1Y56 PSS2_X32Y313 PS_DDR_DQ24_502
390 V26 502 IOPAD_X1Y31 PSS2_X32Y313 PS_DDR_DM3_502
391 W1 112 OPAD_X0Y26 GTX_CHANNEL_1_X249Y173 MGTXTXN1_112
392 W2 112 OPAD_X0Y27 GTX_CHANNEL_1_X249Y173 MGTXTXP1_112
393 W5 111 IPAD_X1Y69 GTX_COMMON_X249Y127 MGTREFCLK0N_111
394 W6 111 IPAD_X1Y68 GTX_COMMON_X249Y127 MGTREFCLK0P_111
395 W13 12 IOB_X0Y190 LIOB33_X0Y189 IO_L5P_T0_12
396 W14 12 IOB_X0Y199 LIOB33_SING_X0Y199 IO_0_12
397 W15 12 IOB_X0Y151 LIOB33_X0Y151 IO_L24N_T3_12
398 W16 12 IOB_X0Y152 LIOB33_X0Y151 IO_L24P_T3_12
399 W17 12 IOB_X0Y150 LIOB33_SING_X0Y150 IO_25_12
400 W18 13 IOB_X0Y204 LIOB33_X0Y203 IO_L23P_T3_13
401 W19 13 IOB_X0Y203 LIOB33_X0Y203 IO_L23N_T3_13
402 W20 13 IOB_X0Y212 LIOB33_X0Y211 IO_L19P_T3_13
403 W21 502 IOPAD_X1Y3 PSS2_X32Y313 PS_DDR_VRP_502
404 W23 502 IOPAD_X1Y63 PSS2_X32Y313 PS_DDR_DQ31_502
405 W24 502 IOPAD_X1Y71 PSS2_X32Y313 PS_DDR_DQS_P3_502
406 W25 502 IOPAD_X1Y67 PSS2_X32Y313 PS_DDR_DQS_N3_502
407 W26 502 IOPAD_X1Y60 PSS2_X32Y313 PS_DDR_DQ28_502
408 Y3 112 IPAD_X1Y96 GTX_CHANNEL_1_X249Y173 MGTXRXN1_112
409 Y4 112 IPAD_X1Y97 GTX_CHANNEL_1_X249Y173 MGTXRXP1_112
410 Y10 12 IOB_X0Y194 LIOB33_X0Y193 IO_L3P_T0_DQS_12
411 Y11 12 IOB_X0Y197 LIOB33_X0Y197 IO_L1N_T0_12
412 Y12 12 IOB_X0Y198 LIOB33_X0Y197 IO_L1P_T0_12
413 Y13 12 IOB_X0Y189 LIOB33_X0Y189 IO_L5N_T0_12
414 Y15 12 IOB_X0Y153 LIOB33_X0Y153 IO_L23N_T3_12
415 Y16 12 IOB_X0Y154 LIOB33_X0Y153 IO_L23P_T3_12
416 Y17 12 IOB_X0Y162 LIOB33_X0Y161 IO_L19P_T3_12
417 Y18 13 IOB_X0Y202 LIOB33_X0Y201 IO_L24P_T3_13
418 Y20 13 IOB_X0Y211 LIOB33_X0Y211 IO_L19N_T3_VREF_13
419 Y21 502 IOPAD_X1Y27 PSS2_X32Y313 PS_DDR_CS_B_502
420 Y22 502 IOPAD_X1Y131 PSS2_X32Y313 PS_DDR_ODT_502
421 Y23 502 IOPAD_X1Y22 PSS2_X32Y313 PS_DDR_CAS_B_502
422 Y25 502 IOPAD_X1Y61 PSS2_X32Y313 PS_DDR_DQ29_502
423 Y26 502 IOPAD_X1Y62 PSS2_X32Y313 PS_DDR_DQ30_502

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File diff suppressed because it is too large Load Diff

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@ -0,0 +1,423 @@
pin,bank,site,tile,pin_function
A2,34,IOB_X1Y251,RIOB18_X107Y251,IO_L24N_T3_34
A3,34,IOB_X1Y255,RIOB18_X107Y255,IO_L22N_T3_34
A4,34,IOB_X1Y256,RIOB18_X107Y255,IO_L22P_T3_34
A5,34,IOB_X1Y257,RIOB18_X107Y257,IO_L21N_T3_DQS_34
A7,34,IOB_X1Y263,RIOB18_X107Y263,IO_L18N_T2_34
A8,34,IOB_X1Y265,RIOB18_X107Y265,IO_L17N_T2_34
A9,34,IOB_X1Y266,RIOB18_X107Y265,IO_L17P_T2_34
A10,34,IOB_X1Y267,RIOB18_X107Y267,IO_L16N_T2_34
A12,35,IOB_X1Y301,RIOB18_X107Y301,IO_L24N_T3_AD15N_35
A13,35,IOB_X1Y302,RIOB18_X107Y301,IO_L24P_T3_AD15P_35
A14,35,IOB_X1Y307,RIOB18_X107Y307,IO_L21N_T3_DQS_AD14N_35
A15,35,IOB_X1Y308,RIOB18_X107Y307,IO_L21P_T3_DQS_AD14P_35
A17,35,IOB_X1Y313,RIOB18_X107Y313,IO_L18N_T2_AD13N_35
A18,501,IOPAD_X1Y126,PSS2_X32Y313,PS_MIO49_501
A19,501,IOPAD_X1Y130,PSS2_X32Y313,PS_MIO53_501
A20,501,IOPAD_X1Y129,PSS2_X32Y313,PS_MIO52_501
A22,501,IOPAD_X1Y134,PSS2_X32Y313,PS_SRST_B_501
A23,500,IOPAD_X1Y89,PSS2_X32Y313,PS_MIO12_500
A24,500,IOPAD_X1Y85,PSS2_X32Y313,PS_MIO8_500
A25,500,IOPAD_X1Y87,PSS2_X32Y313,PS_MIO10_500
AA1,112,OPAD_X0Y24,GTX_CHANNEL_0_X249Y162,MGTXTXN0_112
AA2,112,OPAD_X0Y25,GTX_CHANNEL_0_X249Y162,MGTXTXP0_112
AA5,111,IPAD_X1Y71,GTX_COMMON_X249Y127,MGTREFCLK1N_111
AA6,111,IPAD_X1Y70,GTX_COMMON_X249Y127,MGTREFCLK1P_111
AA10,12,IOB_X0Y193,LIOB33_X0Y193,IO_L3N_T0_DQS_12
AA12,12,IOB_X0Y187,LIOB33_X0Y187,IO_L6N_T0_VREF_12
AA13,12,IOB_X0Y188,LIOB33_X0Y187,IO_L6P_T0_12
AA14,12,IOB_X0Y155,LIOB33_X0Y155,IO_L22N_T3_12
AA15,12,IOB_X0Y156,LIOB33_X0Y155,IO_L22P_T3_12
AA17,12,IOB_X0Y161,LIOB33_X0Y161,IO_L19N_T3_VREF_12
AA18,13,IOB_X0Y201,LIOB33_X0Y201,IO_L24N_T3_13
AA19,13,IOB_X0Y206,LIOB33_X0Y205,IO_L22P_T3_13
AA20,13,IOB_X0Y210,LIOB33_X0Y209,IO_L20P_T3_13
AA22,13,IOB_X0Y230,LIOB33_X0Y229,IO_L10P_T1_13
AA23,13,IOB_X0Y229,LIOB33_X0Y229,IO_L10N_T1_13
AA24,13,IOB_X0Y238,LIOB33_X0Y237,IO_L6P_T0_13
AA25,13,IOB_X0Y248,LIOB33_X0Y247,IO_L1P_T0_13
AB3,112,IPAD_X1Y90,GTX_CHANNEL_0_X249Y162,MGTXRXN0_112
AB4,112,IPAD_X1Y91,GTX_CHANNEL_0_X249Y162,MGTXRXP0_112
AB10,12,IOB_X0Y191,LIOB33_X0Y191,IO_L4N_T0_12
AB11,12,IOB_X0Y192,LIOB33_X0Y191,IO_L4P_T0_12
AB12,12,IOB_X0Y196,LIOB33_X0Y195,IO_L2P_T0_12
AB14,12,IOB_X0Y171,LIOB33_X0Y171,IO_L14N_T2_SRCC_12
AB15,12,IOB_X0Y172,LIOB33_X0Y171,IO_L14P_T2_SRCC_12
AB16,12,IOB_X0Y159,LIOB33_X0Y159,IO_L20N_T3_12
AB17,12,IOB_X0Y160,LIOB33_X0Y159,IO_L20P_T3_12
AB19,13,IOB_X0Y205,LIOB33_X0Y205,IO_L22N_T3_13
AB20,13,IOB_X0Y209,LIOB33_X0Y209,IO_L20N_T3_13
AB21,13,IOB_X0Y232,LIOB33_X0Y231,IO_L9P_T1_DQS_13
AB22,13,IOB_X0Y231,LIOB33_X0Y231,IO_L9N_T1_DQS_13
AB24,13,IOB_X0Y237,LIOB33_X0Y237,IO_L6N_T0_VREF_13
AB25,13,IOB_X0Y247,LIOB33_X0Y247,IO_L1N_T0_13
AB26,13,IOB_X0Y246,LIOB33_X0Y245,IO_L2P_T0_13
AC1,111,OPAD_X0Y22,GTX_CHANNEL_3_X249Y150,MGTXTXN3_111
AC2,111,OPAD_X0Y23,GTX_CHANNEL_3_X249Y150,MGTXTXP3_111
AC5,111,IPAD_X1Y78,GTX_CHANNEL_2_X249Y139,MGTXRXN2_111
AC6,111,IPAD_X1Y79,GTX_CHANNEL_2_X249Y139,MGTXRXP2_111
AC11,12,IOB_X0Y195,LIOB33_X0Y195,IO_L2N_T0_12
AC12,12,IOB_X0Y178,LIOB33_X0Y177,IO_L11P_T1_SRCC_12
AC13,12,IOB_X0Y176,LIOB33_X0Y175,IO_L12P_T1_MRCC_12
AC14,12,IOB_X0Y174,LIOB33_X0Y173,IO_L13P_T2_MRCC_12
AC16,12,IOB_X0Y157,LIOB33_X0Y157,IO_L21N_T3_DQS_12
AC17,12,IOB_X0Y158,LIOB33_X0Y157,IO_L21P_T3_DQS_12
AC18,13,IOB_X0Y208,LIOB33_X0Y207,IO_L21P_T3_DQS_13
AC19,13,IOB_X0Y207,LIOB33_X0Y207,IO_L21N_T3_DQS_13
AC21,13,IOB_X0Y222,LIOB33_X0Y221,IO_L14P_T2_SRCC_13
AC22,13,IOB_X0Y221,LIOB33_X0Y221,IO_L14N_T2_SRCC_13
AC23,13,IOB_X0Y226,LIOB33_X0Y225,IO_L12P_T1_MRCC_13
AC24,13,IOB_X0Y225,LIOB33_X0Y225,IO_L12N_T1_MRCC_13
AC26,13,IOB_X0Y245,LIOB33_X0Y245,IO_L2N_T0_13
AD3,111,IPAD_X1Y84,GTX_CHANNEL_3_X249Y150,MGTXRXN3_111
AD4,111,IPAD_X1Y85,GTX_CHANNEL_3_X249Y150,MGTXRXP3_111
AD7,111,IPAD_X1Y60,GTX_CHANNEL_0_X249Y110,MGTXRXN0_111
AD8,111,IPAD_X1Y61,GTX_CHANNEL_0_X249Y110,MGTXRXP0_111
AD10,12,IOB_X0Y185,LIOB33_X0Y185,IO_L7N_T1_12
AD11,12,IOB_X0Y177,LIOB33_X0Y177,IO_L11N_T1_SRCC_12
AD13,12,IOB_X0Y175,LIOB33_X0Y175,IO_L12N_T1_MRCC_12
AD14,12,IOB_X0Y173,LIOB33_X0Y173,IO_L13N_T2_MRCC_12
AD15,12,IOB_X0Y169,LIOB33_X0Y169,IO_L15N_T2_DQS_12
AD16,12,IOB_X0Y170,LIOB33_X0Y169,IO_L15P_T2_DQS_12
AD18,13,IOB_X0Y216,LIOB33_X0Y215,IO_L17P_T2_13
AD19,13,IOB_X0Y215,LIOB33_X0Y215,IO_L17N_T2_13
AD20,13,IOB_X0Y224,LIOB33_X0Y223,IO_L13P_T2_MRCC_13
AD21,13,IOB_X0Y223,LIOB33_X0Y223,IO_L13N_T2_MRCC_13
AD23,13,IOB_X0Y228,LIOB33_X0Y227,IO_L11P_T1_SRCC_13
AD24,13,IOB_X0Y227,LIOB33_X0Y227,IO_L11N_T1_SRCC_13
AD25,13,IOB_X0Y242,LIOB33_X0Y241,IO_L4P_T0_13
AD26,13,IOB_X0Y241,LIOB33_X0Y241,IO_L4N_T0_13
AE1,111,OPAD_X0Y20,GTX_CHANNEL_2_X249Y139,MGTXTXN2_111
AE2,111,OPAD_X0Y21,GTX_CHANNEL_2_X249Y139,MGTXTXP2_111
AE5,111,IPAD_X1Y66,GTX_CHANNEL_1_X249Y121,MGTXRXN1_111
AE6,111,IPAD_X1Y67,GTX_CHANNEL_1_X249Y121,MGTXRXP1_111
AE10,12,IOB_X0Y186,LIOB33_X0Y185,IO_L7P_T1_12
AE11,12,IOB_X0Y182,LIOB33_X0Y181,IO_L9P_T1_DQS_12
AE12,12,IOB_X0Y184,LIOB33_X0Y183,IO_L8P_T1_12
AE13,12,IOB_X0Y180,LIOB33_X0Y179,IO_L10P_T1_12
AE15,12,IOB_X0Y165,LIOB33_X0Y165,IO_L17N_T2_12
AE16,12,IOB_X0Y166,LIOB33_X0Y165,IO_L17P_T2_12
AE17,12,IOB_X0Y164,LIOB33_X0Y163,IO_L18P_T2_12
AE18,13,IOB_X0Y214,LIOB33_X0Y213,IO_L18P_T2_13
AE20,13,IOB_X0Y218,LIOB33_X0Y217,IO_L16P_T2_13
AE21,13,IOB_X0Y217,LIOB33_X0Y217,IO_L16N_T2_13
AE22,13,IOB_X0Y236,LIOB33_X0Y235,IO_L7P_T1_13
AE23,13,IOB_X0Y234,LIOB33_X0Y233,IO_L8P_T1_13
AE25,13,IOB_X0Y244,LIOB33_X0Y243,IO_L3P_T0_DQS_13
AE26,13,IOB_X0Y243,LIOB33_X0Y243,IO_L3N_T0_DQS_13
AF3,111,OPAD_X0Y18,GTX_CHANNEL_1_X249Y121,MGTXTXN1_111
AF4,111,OPAD_X0Y19,GTX_CHANNEL_1_X249Y121,MGTXTXP1_111
AF7,111,OPAD_X0Y16,GTX_CHANNEL_0_X249Y110,MGTXTXN0_111
AF8,111,OPAD_X0Y17,GTX_CHANNEL_0_X249Y110,MGTXTXP0_111
AF10,12,IOB_X0Y181,LIOB33_X0Y181,IO_L9N_T1_DQS_12
AF12,12,IOB_X0Y183,LIOB33_X0Y183,IO_L8N_T1_12
AF13,12,IOB_X0Y179,LIOB33_X0Y179,IO_L10N_T1_12
AF14,12,IOB_X0Y167,LIOB33_X0Y167,IO_L16N_T2_12
AF15,12,IOB_X0Y168,LIOB33_X0Y167,IO_L16P_T2_12
AF17,12,IOB_X0Y163,LIOB33_X0Y163,IO_L18N_T2_12
AF18,13,IOB_X0Y213,LIOB33_X0Y213,IO_L18N_T2_13
AF19,13,IOB_X0Y220,LIOB33_X0Y219,IO_L15P_T2_DQS_13
AF20,13,IOB_X0Y219,LIOB33_X0Y219,IO_L15N_T2_DQS_13
AF22,13,IOB_X0Y235,LIOB33_X0Y235,IO_L7N_T1_13
AF23,13,IOB_X0Y233,LIOB33_X0Y233,IO_L8N_T1_13
AF24,13,IOB_X0Y240,LIOB33_X0Y239,IO_L5P_T0_13
AF25,13,IOB_X0Y239,LIOB33_X0Y239,IO_L5N_T0_13
B1,34,IOB_X1Y253,RIOB18_X107Y253,IO_L23N_T3_34
B2,34,IOB_X1Y252,RIOB18_X107Y251,IO_L24P_T3_34
B4,34,IOB_X1Y259,RIOB18_X107Y259,IO_L20N_T3_34
B5,34,IOB_X1Y260,RIOB18_X107Y259,IO_L20P_T3_34
B6,34,IOB_X1Y258,RIOB18_X107Y257,IO_L21P_T3_DQS_34
B7,34,IOB_X1Y264,RIOB18_X107Y263,IO_L18P_T2_34
B9,34,IOB_X1Y269,RIOB18_X107Y269,IO_L15N_T2_DQS_34
B10,34,IOB_X1Y268,RIOB18_X107Y267,IO_L16P_T2_34
B11,35,IOB_X1Y303,RIOB18_X107Y303,IO_L23N_T3_35
B12,35,IOB_X1Y305,RIOB18_X107Y305,IO_L22N_T3_AD7N_35
B14,35,IOB_X1Y309,RIOB18_X107Y309,IO_L20N_T3_AD6N_35
B15,35,IOB_X1Y315,RIOB18_X107Y315,IO_L17N_T2_AD5N_35
B16,35,IOB_X1Y316,RIOB18_X107Y315,IO_L17P_T2_AD5P_35
B17,35,IOB_X1Y314,RIOB18_X107Y313,IO_L18P_T2_AD13P_35
B19,501,IOPAD_X1Y124,PSS2_X32Y313,PS_MIO47_501
B20,501,IOPAD_X1Y128,PSS2_X32Y313,PS_MIO51_501
B21,501,IOPAD_X1Y125,PSS2_X32Y313,PS_MIO48_501
B22,501,IOPAD_X1Y127,PSS2_X32Y313,PS_MIO50_501
B24,500,IOPAD_X1Y26,PSS2_X32Y313,PS_CLK_500
B25,500,IOPAD_X1Y90,PSS2_X32Y313,PS_MIO13_500
B26,500,IOPAD_X1Y88,PSS2_X32Y313,PS_MIO11_500
C1,33,IOB_X1Y241,RIOB18_X107Y241,IO_L4N_T0_33
C2,34,IOB_X1Y254,RIOB18_X107Y253,IO_L23P_T3_34
C3,34,IOB_X1Y261,RIOB18_X107Y261,IO_L19N_T3_VREF_34
C4,34,IOB_X1Y262,RIOB18_X107Y261,IO_L19P_T3_34
C6,34,IOB_X1Y271,RIOB18_X107Y271,IO_L14N_T2_SRCC_34
C7,34,IOB_X1Y273,RIOB18_X107Y273,IO_L13N_T2_MRCC_34
C8,34,IOB_X1Y274,RIOB18_X107Y273,IO_L13P_T2_MRCC_34
C9,34,IOB_X1Y270,RIOB18_X107Y269,IO_L15P_T2_DQS_34
C11,35,IOB_X1Y304,RIOB18_X107Y303,IO_L23P_T3_35
C12,35,IOB_X1Y306,RIOB18_X107Y305,IO_L22P_T3_AD7P_35
C13,35,IOB_X1Y311,RIOB18_X107Y311,IO_L19N_T3_VREF_35
C14,35,IOB_X1Y310,RIOB18_X107Y309,IO_L20P_T3_AD6P_35
C16,35,IOB_X1Y319,RIOB18_X107Y319,IO_L15N_T2_DQS_AD12N_35
C17,35,IOB_X1Y320,RIOB18_X107Y319,IO_L15P_T2_DQS_AD12P_35
C18,501,IOPAD_X1Y122,PSS2_X32Y313,PS_MIO45_501
C19,501,IOPAD_X1Y118,PSS2_X32Y313,PS_MIO41_501
C21,501,IOPAD_X1Y116,PSS2_X32Y313,PS_MIO39_501
C22,501,IOPAD_X1Y117,PSS2_X32Y313,PS_MIO40_501
C23,500,IOPAD_X1Y132,PSS2_X32Y313,PS_POR_B_500
C24,500,IOPAD_X1Y92,PSS2_X32Y313,PS_MIO15_500
C26,500,IOPAD_X1Y82,PSS2_X32Y313,PS_MIO5_500
D1,33,IOB_X1Y242,RIOB18_X107Y241,IO_L4P_T0_33
D3,33,IOB_X1Y245,RIOB18_X107Y245,IO_L2N_T0_33
D4,33,IOB_X1Y246,RIOB18_X107Y245,IO_L2P_T0_33
D5,34,IOB_X1Y279,RIOB18_X107Y279,IO_L10N_T1_34
D6,34,IOB_X1Y272,RIOB18_X107Y271,IO_L14P_T2_SRCC_34
D8,34,IOB_X1Y283,RIOB18_X107Y283,IO_L8N_T1_34
D9,34,IOB_X1Y284,RIOB18_X107Y283,IO_L8P_T1_34
D10,35,IOB_X1Y345,RIOB18_X107Y345,IO_L2N_T0_AD8N_35
D11,35,IOB_X1Y341,RIOB18_X107Y341,IO_L4N_T0_35
D13,35,IOB_X1Y312,RIOB18_X107Y311,IO_L19P_T3_35
D14,35,IOB_X1Y323,RIOB18_X107Y323,IO_L13N_T2_MRCC_35
D15,35,IOB_X1Y324,RIOB18_X107Y323,IO_L13P_T2_MRCC_35
D16,35,IOB_X1Y317,RIOB18_X107Y317,IO_L16N_T2_35
D18,501,IOPAD_X1Y120,PSS2_X32Y313,PS_MIO43_501
D19,501,IOPAD_X1Y112,PSS2_X32Y313,PS_MIO35_501
D20,501,IOPAD_X1Y114,PSS2_X32Y313,PS_MIO37_501
D21,501,IOPAD_X1Y115,PSS2_X32Y313,PS_MIO38_501
D23,500,IOPAD_X1Y91,PSS2_X32Y313,PS_MIO14_500
D24,500,IOPAD_X1Y86,PSS2_X32Y313,PS_MIO9_500
D25,500,IOPAD_X1Y80,PSS2_X32Y313,PS_MIO3_500
D26,500,IOPAD_X1Y78,PSS2_X32Y313,PS_MIO1_500
E1,33,IOB_X1Y239,RIOB18_X107Y239,IO_L5N_T0_33
E2,33,IOB_X1Y240,RIOB18_X107Y239,IO_L5P_T0_33
E3,33,IOB_X1Y237,RIOB18_X107Y237,IO_L6N_T0_VREF_33
E5,34,IOB_X1Y285,RIOB18_X107Y285,IO_L7N_T1_34
E6,34,IOB_X1Y280,RIOB18_X107Y279,IO_L10P_T1_34
E7,34,IOB_X1Y277,RIOB18_X107Y277,IO_L11N_T1_SRCC_34
E8,34,IOB_X1Y281,RIOB18_X107Y281,IO_L9N_T1_DQS_34
E10,35,IOB_X1Y346,RIOB18_X107Y345,IO_L2P_T0_AD8P_35
E11,35,IOB_X1Y342,RIOB18_X107Y341,IO_L4P_T0_35
E12,35,IOB_X1Y347,RIOB18_X107Y347,IO_L1N_T0_AD0N_35
E13,35,IOB_X1Y337,RIOB18_X107Y337,IO_L6N_T0_VREF_35
E15,35,IOB_X1Y321,RIOB18_X107Y321,IO_L14N_T2_AD4N_SRCC_35
E16,35,IOB_X1Y318,RIOB18_X107Y317,IO_L16P_T2_35
E17,501,IOPAD_X1Y123,PSS2_X32Y313,PS_MIO46_501
E18,501,IOPAD_X1Y121,PSS2_X32Y313,PS_MIO44_501
E20,501,IOPAD_X1Y106,PSS2_X32Y313,PS_MIO29_501
E21,501,IOPAD_X1Y108,PSS2_X32Y313,PS_MIO31_501
E22,501,IOPAD_X1Y110,PSS2_X32Y313,PS_MIO33_501
E23,500,IOPAD_X1Y84,PSS2_X32Y313,PS_MIO7_500
E25,500,IOPAD_X1Y79,PSS2_X32Y313,PS_MIO2_500
E26,500,IOPAD_X1Y77,PSS2_X32Y313,PS_MIO0_500
F2,33,IOB_X1Y243,RIOB18_X107Y243,IO_L3N_T0_DQS_33
F3,33,IOB_X1Y238,RIOB18_X107Y237,IO_L6P_T0_33
F4,33,IOB_X1Y247,RIOB18_X107Y247,IO_L1N_T0_33
F5,34,IOB_X1Y286,RIOB18_X107Y285,IO_L7P_T1_34
F7,34,IOB_X1Y275,RIOB18_X107Y275,IO_L12N_T1_MRCC_34
F8,34,IOB_X1Y278,RIOB18_X107Y277,IO_L11P_T1_SRCC_34
F9,34,IOB_X1Y282,RIOB18_X107Y281,IO_L9P_T1_DQS_34
F10,35,IOB_X1Y343,RIOB18_X107Y343,IO_L3N_T0_DQS_AD1N_35
F12,35,IOB_X1Y348,RIOB18_X107Y347,IO_L1P_T0_AD0P_35
F13,35,IOB_X1Y338,RIOB18_X107Y337,IO_L6P_T0_35
F14,35,IOB_X1Y327,RIOB18_X107Y327,IO_L11N_T1_SRCC_35
F15,35,IOB_X1Y322,RIOB18_X107Y321,IO_L14P_T2_AD4P_SRCC_35
F17,501,IOPAD_X1Y119,PSS2_X32Y313,PS_MIO42_501
F18,501,IOPAD_X1Y104,PSS2_X32Y313,PS_MIO27_501
F19,501,IOPAD_X1Y102,PSS2_X32Y313,PS_MIO25_501
F20,501,IOPAD_X1Y100,PSS2_X32Y313,PS_MIO23_501
F22,501,IOPAD_X1Y98,PSS2_X32Y313,PS_MIO21_501
F23,500,IOPAD_X1Y83,PSS2_X32Y313,PS_MIO6_500
F24,500,IOPAD_X1Y81,PSS2_X32Y313,PS_MIO4_500
F25,502,IOPAD_X1Y33,PSS2_X32Y313,PS_DDR_DQ1_502
G1,33,IOB_X1Y229,RIOB18_X107Y229,IO_L10N_T1_33
G2,33,IOB_X1Y244,RIOB18_X107Y243,IO_L3P_T0_DQS_33
G4,33,IOB_X1Y248,RIOB18_X107Y247,IO_L1P_T0_33
G5,34,IOB_X1Y295,RIOB18_X107Y295,IO_L2N_T0_34
G6,34,IOB_X1Y296,RIOB18_X107Y295,IO_L2P_T0_34
G7,34,IOB_X1Y276,RIOB18_X107Y275,IO_L12P_T1_MRCC_34
G9,34,IOB_X1Y293,RIOB18_X107Y293,IO_L3N_T0_DQS_34
G10,35,IOB_X1Y344,RIOB18_X107Y343,IO_L3P_T0_DQS_AD1P_35
G11,35,IOB_X1Y339,RIOB18_X107Y339,IO_L5N_T0_AD9N_35
G12,35,IOB_X1Y340,RIOB18_X107Y339,IO_L5P_T0_AD9P_35
G14,35,IOB_X1Y328,RIOB18_X107Y327,IO_L11P_T1_SRCC_35
G15,35,IOB_X1Y329,RIOB18_X107Y329,IO_L10N_T1_AD11N_35
G16,35,IOB_X1Y330,RIOB18_X107Y329,IO_L10P_T1_AD11P_35
G17,501,IOPAD_X1Y94,PSS2_X32Y313,PS_MIO17_501
G19,501,IOPAD_X1Y96,PSS2_X32Y313,PS_MIO19_501
G20,501,IOPAD_X1Y95,PSS2_X32Y313,PS_MIO18_501
G21,501,IOPAD_X1Y93,PSS2_X32Y313,PS_MIO16_501
G22,501,IOPAD_X1Y99,PSS2_X32Y313,PS_MIO22_501
G24,502,IOPAD_X1Y28,PSS2_X32Y313,PS_DDR_DM0_502
G25,502,IOPAD_X1Y64,PSS2_X32Y313,PS_DDR_DQS_N0_502
G26,502,IOPAD_X1Y35,PSS2_X32Y313,PS_DDR_DQ3_502
H1,33,IOB_X1Y235,RIOB18_X107Y235,IO_L7N_T1_33
H2,33,IOB_X1Y230,RIOB18_X107Y229,IO_L10P_T1_33
H3,33,IOB_X1Y233,RIOB18_X107Y233,IO_L8N_T1_33
H4,33,IOB_X1Y234,RIOB18_X107Y233,IO_L8P_T1_33
H6,34,IOB_X1Y291,RIOB18_X107Y291,IO_L4N_T0_34
H7,34,IOB_X1Y292,RIOB18_X107Y291,IO_L4P_T0_34
H8,34,IOB_X1Y287,RIOB18_X107Y287,IO_L6N_T0_VREF_34
H9,34,IOB_X1Y294,RIOB18_X107Y293,IO_L3P_T0_DQS_PUDC_B_34
H11,34,IOB_X1Y297,RIOB18_X107Y297,IO_L1N_T0_34
H12,35,IOB_X1Y335,RIOB18_X107Y335,IO_L7N_T1_AD2N_35
H13,35,IOB_X1Y336,RIOB18_X107Y335,IO_L7P_T1_AD2P_35
H14,35,IOB_X1Y325,RIOB18_X107Y325,IO_L12N_T1_MRCC_35
H16,35,IOB_X1Y349,RIOB18_SING_X107Y349,IO_0_VRN_35
H17,501,IOPAD_X1Y103,PSS2_X32Y313,PS_MIO26_501
H19,501,IOPAD_X1Y97,PSS2_X32Y313,PS_MIO20_501
H21,502,IOPAD_X1Y15,PSS2_X32Y313,PS_DDR_A11_502
H22,502,IOPAD_X1Y72,PSS2_X32Y313,PS_DDR_DRST_B_502
H23,502,IOPAD_X1Y37,PSS2_X32Y313,PS_DDR_DQ5_502
H24,502,IOPAD_X1Y68,PSS2_X32Y313,PS_DDR_DQS_P0_502
H26,502,IOPAD_X1Y36,PSS2_X32Y313,PS_DDR_DQ4_502
J1,33,IOB_X1Y236,RIOB18_X107Y235,IO_L7P_T1_33
J3,33,IOB_X1Y225,RIOB18_X107Y225,IO_L12N_T1_MRCC_33
J4,33,IOB_X1Y226,RIOB18_X107Y225,IO_L12P_T1_MRCC_33
J5,33,IOB_X1Y209,RIOB18_X107Y209,IO_L20N_T3_33
J6,33,IOB_X1Y205,RIOB18_X107Y205,IO_L22N_T3_33
J8,34,IOB_X1Y288,RIOB18_X107Y287,IO_L6P_T0_34
J9,34,IOB_X1Y289,RIOB18_X107Y289,IO_L5N_T0_34
J10,34,IOB_X1Y290,RIOB18_X107Y289,IO_L5P_T0_34
J11,34,IOB_X1Y298,RIOB18_X107Y297,IO_L1P_T0_34
J13,35,IOB_X1Y333,RIOB18_X107Y333,IO_L8N_T1_AD10N_35
J14,35,IOB_X1Y326,RIOB18_X107Y325,IO_L12P_T1_MRCC_35
J15,35,IOB_X1Y331,RIOB18_X107Y331,IO_L9N_T1_DQS_AD3N_35
J16,501,IOPAD_X1Y111,PSS2_X32Y313,PS_MIO34_501
J18,501,IOPAD_X1Y105,PSS2_X32Y313,PS_MIO28_501
J19,501,IOPAD_X1Y101,PSS2_X32Y313,PS_MIO24_501
J20,502,IOPAD_X1Y18,PSS2_X32Y313,PS_DDR_A13_502
J21,502,IOPAD_X1Y11,PSS2_X32Y313,PS_DDR_A7_502
J23,502,IOPAD_X1Y39,PSS2_X32Y313,PS_DDR_DQ7_502
J24,502,IOPAD_X1Y38,PSS2_X32Y313,PS_DDR_DQ6_502
J25,502,IOPAD_X1Y34,PSS2_X32Y313,PS_DDR_DQ2_502
J26,502,IOPAD_X1Y32,PSS2_X32Y313,PS_DDR_DQ0_502
K1,33,IOB_X1Y231,RIOB18_X107Y231,IO_L9N_T1_DQS_33
K2,33,IOB_X1Y232,RIOB18_X107Y231,IO_L9P_T1_DQS_33
K3,33,IOB_X1Y227,RIOB18_X107Y227,IO_L11N_T1_SRCC_33
K5,33,IOB_X1Y210,RIOB18_X107Y209,IO_L20P_T3_33
K6,33,IOB_X1Y206,RIOB18_X107Y205,IO_L22P_T3_33
K7,33,IOB_X1Y201,RIOB18_X107Y201,IO_L24N_T3_33
K8,33,IOB_X1Y202,RIOB18_X107Y201,IO_L24P_T3_33
K10,34,IOB_X1Y250,RIOB18_SING_X107Y250,IO_25_VRP_34
K11,34,IOB_X1Y299,RIOB18_SING_X107Y299,IO_0_VRN_34
K12,35,IOB_X1Y300,RIOB18_SING_X107Y300,IO_25_VRP_35
K13,35,IOB_X1Y334,RIOB18_X107Y333,IO_L8P_T1_AD10P_35
K15,35,IOB_X1Y332,RIOB18_X107Y331,IO_L9P_T1_DQS_AD3P_35
K16,501,IOPAD_X1Y113,PSS2_X32Y313,PS_MIO36_501
K17,501,IOPAD_X1Y109,PSS2_X32Y313,PS_MIO32_501
K19,501,IOPAD_X1Y107,PSS2_X32Y313,PS_MIO30_501
K20,502,IOPAD_X1Y5,PSS2_X32Y313,PS_DDR_A1_502
K22,502,IOPAD_X1Y4,PSS2_X32Y313,PS_DDR_A0_502
K23,502,IOPAD_X1Y43,PSS2_X32Y313,PS_DDR_DQ11_502
K25,502,IOPAD_X1Y29,PSS2_X32Y313,PS_DDR_DM1_502
K26,502,IOPAD_X1Y40,PSS2_X32Y313,PS_DDR_DQ8_502
L2,33,IOB_X1Y217,RIOB18_X107Y217,IO_L16N_T2_33
L3,33,IOB_X1Y228,RIOB18_X107Y227,IO_L11P_T1_SRCC_33
L4,33,IOB_X1Y221,RIOB18_X107Y221,IO_L14N_T2_SRCC_33
L5,33,IOB_X1Y222,RIOB18_X107Y221,IO_L14P_T2_SRCC_33
L7,33,IOB_X1Y211,RIOB18_X107Y211,IO_L19N_T3_VREF_33
L8,33,IOB_X1Y207,RIOB18_X107Y207,IO_L21N_T3_DQS_33
L9,33,IOB_X1Y249,RIOB18_SING_X107Y249,IO_0_VRN_33
L20,502,IOPAD_X1Y10,PSS2_X32Y313,PS_DDR_A6_502
L22,502,IOPAD_X1Y7,PSS2_X32Y313,PS_DDR_A3_502
L23,502,IOPAD_X1Y41,PSS2_X32Y313,PS_DDR_DQ9_502
L24,502,IOPAD_X1Y69,PSS2_X32Y313,PS_DDR_DQS_P1_502
L25,502,IOPAD_X1Y65,PSS2_X32Y313,PS_DDR_DQS_N1_502
M1,33,IOB_X1Y213,RIOB18_X107Y213,IO_L18N_T2_33
M2,33,IOB_X1Y218,RIOB18_X107Y217,IO_L16P_T2_33
M4,33,IOB_X1Y215,RIOB18_X107Y215,IO_L17N_T2_33
M5,33,IOB_X1Y223,RIOB18_X107Y223,IO_L13N_T2_MRCC_33
M6,33,IOB_X1Y224,RIOB18_X107Y223,IO_L13P_T2_MRCC_33
M7,33,IOB_X1Y212,RIOB18_X107Y211,IO_L19P_T3_33
M8,33,IOB_X1Y208,RIOB18_X107Y207,IO_L21P_T3_DQS_33
M20,502,IOPAD_X1Y8,PSS2_X32Y313,PS_DDR_A4_502
M22,502,IOPAD_X1Y14,PSS2_X32Y313,PS_DDR_A10_502
M24,502,IOPAD_X1Y46,PSS2_X32Y313,PS_DDR_DQ14_502
M25,502,IOPAD_X1Y44,PSS2_X32Y313,PS_DDR_DQ12_502
M26,502,IOPAD_X1Y42,PSS2_X32Y313,PS_DDR_DQ10_502
N1,33,IOB_X1Y214,RIOB18_X107Y213,IO_L18P_T2_33
N2,33,IOB_X1Y219,RIOB18_X107Y219,IO_L15N_T2_DQS_33
N3,33,IOB_X1Y220,RIOB18_X107Y219,IO_L15P_T2_DQS_33
N4,33,IOB_X1Y216,RIOB18_X107Y215,IO_L17P_T2_33
N6,33,IOB_X1Y203,RIOB18_X107Y203,IO_L23N_T3_33
N7,33,IOB_X1Y204,RIOB18_X107Y203,IO_L23P_T3_33
N8,33,IOB_X1Y200,RIOB18_SING_X107Y200,IO_25_VRP_33
N14,0,IPAD_X0Y120,MONITOR_BOT_PELE1_X197Y339,VP_0
N21,502,IOPAD_X1Y6,PSS2_X32Y313,PS_DDR_A2_502
N22,502,IOPAD_X1Y9,PSS2_X32Y313,PS_DDR_A5_502
N23,502,IOPAD_X1Y47,PSS2_X32Y313,PS_DDR_DQ15_502
N24,502,IOPAD_X1Y45,PSS2_X32Y313,PS_DDR_DQ13_502
N26,502,IOPAD_X1Y50,PSS2_X32Y313,PS_DDR_DQ18_502
P13,0,IPAD_X0Y121,MONITOR_BOT_PELE1_X197Y339,VN_0
P20,502,IOPAD_X1Y16,PSS2_X32Y313,PS_DDR_A12_502
P21,502,IOPAD_X1Y24,PSS2_X32Y313,PS_DDR_CKN_502
P23,502,IOPAD_X1Y51,PSS2_X32Y313,PS_DDR_DQ19_502
P24,502,IOPAD_X1Y49,PSS2_X32Y313,PS_DDR_DQ17_502
P25,502,IOPAD_X1Y70,PSS2_X32Y313,PS_DDR_DQS_P2_502
P26,502,IOPAD_X1Y30,PSS2_X32Y313,PS_DDR_DM2_502
R1,112,OPAD_X0Y30,GTX_CHANNEL_3_X249Y202,MGTXTXN3_112
R2,112,OPAD_X0Y31,GTX_CHANNEL_3_X249Y202,MGTXTXP3_112
R5,112,IPAD_X1Y99,GTX_COMMON_X249Y179,MGTREFCLK0N_112
R6,112,IPAD_X1Y98,GTX_COMMON_X249Y179,MGTREFCLK0P_112
R20,502,IOPAD_X1Y17,PSS2_X32Y313,PS_DDR_A14_502
R21,502,IOPAD_X1Y25,PSS2_X32Y313,PS_DDR_CKP_502
R22,502,IOPAD_X1Y21,PSS2_X32Y313,PS_DDR_BA2_502
R23,502,IOPAD_X1Y55,PSS2_X32Y313,PS_DDR_DQ23_502
R25,502,IOPAD_X1Y66,PSS2_X32Y313,PS_DDR_DQS_N2_502
R26,502,IOPAD_X1Y48,PSS2_X32Y313,PS_DDR_DQ16_502
T3,112,IPAD_X1Y114,GTX_CHANNEL_3_X249Y202,MGTXRXN3_112
T4,112,IPAD_X1Y115,GTX_CHANNEL_3_X249Y202,MGTXRXP3_112
T20,502,IOPAD_X1Y12,PSS2_X32Y313,PS_DDR_A8_502
T22,502,IOPAD_X1Y20,PSS2_X32Y313,PS_DDR_BA1_502
T23,502,IOPAD_X1Y54,PSS2_X32Y313,PS_DDR_DQ22_502
T24,502,IOPAD_X1Y52,PSS2_X32Y313,PS_DDR_DQ20_502
T25,502,IOPAD_X1Y53,PSS2_X32Y313,PS_DDR_DQ21_502
U1,112,OPAD_X0Y28,GTX_CHANNEL_2_X249Y191,MGTXTXN2_112
U2,112,OPAD_X0Y29,GTX_CHANNEL_2_X249Y191,MGTXTXP2_112
U5,112,IPAD_X1Y101,GTX_COMMON_X249Y179,MGTREFCLK1N_112
U6,112,IPAD_X1Y100,GTX_COMMON_X249Y179,MGTREFCLK1P_112
U20,502,IOPAD_X1Y13,PSS2_X32Y313,PS_DDR_A9_502
U21,502,IOPAD_X1Y23,PSS2_X32Y313,PS_DDR_CKE_502
U22,502,IOPAD_X1Y19,PSS2_X32Y313,PS_DDR_BA0_502
U24,502,IOPAD_X1Y58,PSS2_X32Y313,PS_DDR_DQ26_502
U25,502,IOPAD_X1Y59,PSS2_X32Y313,PS_DDR_DQ27_502
U26,502,IOPAD_X1Y57,PSS2_X32Y313,PS_DDR_DQ25_502
V3,112,IPAD_X1Y108,GTX_CHANNEL_2_X249Y191,MGTXRXN2_112
V4,112,IPAD_X1Y109,GTX_CHANNEL_2_X249Y191,MGTXRXP2_112
V18,13,IOB_X0Y200,LIOB33_SING_X0Y200,IO_25_13
V19,13,IOB_X0Y249,LIOB33_SING_X0Y249,IO_0_13
V21,502,IOPAD_X1Y2,PSS2_X32Y313,PS_DDR_VRN_502
V22,502,IOPAD_X1Y1,PSS2_X32Y313,PS_DDR_WE_B_502
V23,502,IOPAD_X1Y133,PSS2_X32Y313,PS_DDR_RAS_B_502
V24,502,IOPAD_X1Y56,PSS2_X32Y313,PS_DDR_DQ24_502
V26,502,IOPAD_X1Y31,PSS2_X32Y313,PS_DDR_DM3_502
W1,112,OPAD_X0Y26,GTX_CHANNEL_1_X249Y173,MGTXTXN1_112
W2,112,OPAD_X0Y27,GTX_CHANNEL_1_X249Y173,MGTXTXP1_112
W5,111,IPAD_X1Y69,GTX_COMMON_X249Y127,MGTREFCLK0N_111
W6,111,IPAD_X1Y68,GTX_COMMON_X249Y127,MGTREFCLK0P_111
W13,12,IOB_X0Y190,LIOB33_X0Y189,IO_L5P_T0_12
W14,12,IOB_X0Y199,LIOB33_SING_X0Y199,IO_0_12
W15,12,IOB_X0Y151,LIOB33_X0Y151,IO_L24N_T3_12
W16,12,IOB_X0Y152,LIOB33_X0Y151,IO_L24P_T3_12
W17,12,IOB_X0Y150,LIOB33_SING_X0Y150,IO_25_12
W18,13,IOB_X0Y204,LIOB33_X0Y203,IO_L23P_T3_13
W19,13,IOB_X0Y203,LIOB33_X0Y203,IO_L23N_T3_13
W20,13,IOB_X0Y212,LIOB33_X0Y211,IO_L19P_T3_13
W21,502,IOPAD_X1Y3,PSS2_X32Y313,PS_DDR_VRP_502
W23,502,IOPAD_X1Y63,PSS2_X32Y313,PS_DDR_DQ31_502
W24,502,IOPAD_X1Y71,PSS2_X32Y313,PS_DDR_DQS_P3_502
W25,502,IOPAD_X1Y67,PSS2_X32Y313,PS_DDR_DQS_N3_502
W26,502,IOPAD_X1Y60,PSS2_X32Y313,PS_DDR_DQ28_502
Y3,112,IPAD_X1Y96,GTX_CHANNEL_1_X249Y173,MGTXRXN1_112
Y4,112,IPAD_X1Y97,GTX_CHANNEL_1_X249Y173,MGTXRXP1_112
Y10,12,IOB_X0Y194,LIOB33_X0Y193,IO_L3P_T0_DQS_12
Y11,12,IOB_X0Y197,LIOB33_X0Y197,IO_L1N_T0_12
Y12,12,IOB_X0Y198,LIOB33_X0Y197,IO_L1P_T0_12
Y13,12,IOB_X0Y189,LIOB33_X0Y189,IO_L5N_T0_12
Y15,12,IOB_X0Y153,LIOB33_X0Y153,IO_L23N_T3_12
Y16,12,IOB_X0Y154,LIOB33_X0Y153,IO_L23P_T3_12
Y17,12,IOB_X0Y162,LIOB33_X0Y161,IO_L19P_T3_12
Y18,13,IOB_X0Y202,LIOB33_X0Y201,IO_L24P_T3_13
Y20,13,IOB_X0Y211,LIOB33_X0Y211,IO_L19N_T3_VREF_13
Y21,502,IOPAD_X1Y27,PSS2_X32Y313,PS_DDR_CS_B_502
Y22,502,IOPAD_X1Y131,PSS2_X32Y313,PS_DDR_ODT_502
Y23,502,IOPAD_X1Y22,PSS2_X32Y313,PS_DDR_CAS_B_502
Y25,502,IOPAD_X1Y61,PSS2_X32Y313,PS_DDR_DQ29_502
Y26,502,IOPAD_X1Y62,PSS2_X32Y313,PS_DDR_DQ30_502
1 pin bank site tile pin_function
2 A2 34 IOB_X1Y251 RIOB18_X107Y251 IO_L24N_T3_34
3 A3 34 IOB_X1Y255 RIOB18_X107Y255 IO_L22N_T3_34
4 A4 34 IOB_X1Y256 RIOB18_X107Y255 IO_L22P_T3_34
5 A5 34 IOB_X1Y257 RIOB18_X107Y257 IO_L21N_T3_DQS_34
6 A7 34 IOB_X1Y263 RIOB18_X107Y263 IO_L18N_T2_34
7 A8 34 IOB_X1Y265 RIOB18_X107Y265 IO_L17N_T2_34
8 A9 34 IOB_X1Y266 RIOB18_X107Y265 IO_L17P_T2_34
9 A10 34 IOB_X1Y267 RIOB18_X107Y267 IO_L16N_T2_34
10 A12 35 IOB_X1Y301 RIOB18_X107Y301 IO_L24N_T3_AD15N_35
11 A13 35 IOB_X1Y302 RIOB18_X107Y301 IO_L24P_T3_AD15P_35
12 A14 35 IOB_X1Y307 RIOB18_X107Y307 IO_L21N_T3_DQS_AD14N_35
13 A15 35 IOB_X1Y308 RIOB18_X107Y307 IO_L21P_T3_DQS_AD14P_35
14 A17 35 IOB_X1Y313 RIOB18_X107Y313 IO_L18N_T2_AD13N_35
15 A18 501 IOPAD_X1Y126 PSS2_X32Y313 PS_MIO49_501
16 A19 501 IOPAD_X1Y130 PSS2_X32Y313 PS_MIO53_501
17 A20 501 IOPAD_X1Y129 PSS2_X32Y313 PS_MIO52_501
18 A22 501 IOPAD_X1Y134 PSS2_X32Y313 PS_SRST_B_501
19 A23 500 IOPAD_X1Y89 PSS2_X32Y313 PS_MIO12_500
20 A24 500 IOPAD_X1Y85 PSS2_X32Y313 PS_MIO8_500
21 A25 500 IOPAD_X1Y87 PSS2_X32Y313 PS_MIO10_500
22 AA1 112 OPAD_X0Y24 GTX_CHANNEL_0_X249Y162 MGTXTXN0_112
23 AA2 112 OPAD_X0Y25 GTX_CHANNEL_0_X249Y162 MGTXTXP0_112
24 AA5 111 IPAD_X1Y71 GTX_COMMON_X249Y127 MGTREFCLK1N_111
25 AA6 111 IPAD_X1Y70 GTX_COMMON_X249Y127 MGTREFCLK1P_111
26 AA10 12 IOB_X0Y193 LIOB33_X0Y193 IO_L3N_T0_DQS_12
27 AA12 12 IOB_X0Y187 LIOB33_X0Y187 IO_L6N_T0_VREF_12
28 AA13 12 IOB_X0Y188 LIOB33_X0Y187 IO_L6P_T0_12
29 AA14 12 IOB_X0Y155 LIOB33_X0Y155 IO_L22N_T3_12
30 AA15 12 IOB_X0Y156 LIOB33_X0Y155 IO_L22P_T3_12
31 AA17 12 IOB_X0Y161 LIOB33_X0Y161 IO_L19N_T3_VREF_12
32 AA18 13 IOB_X0Y201 LIOB33_X0Y201 IO_L24N_T3_13
33 AA19 13 IOB_X0Y206 LIOB33_X0Y205 IO_L22P_T3_13
34 AA20 13 IOB_X0Y210 LIOB33_X0Y209 IO_L20P_T3_13
35 AA22 13 IOB_X0Y230 LIOB33_X0Y229 IO_L10P_T1_13
36 AA23 13 IOB_X0Y229 LIOB33_X0Y229 IO_L10N_T1_13
37 AA24 13 IOB_X0Y238 LIOB33_X0Y237 IO_L6P_T0_13
38 AA25 13 IOB_X0Y248 LIOB33_X0Y247 IO_L1P_T0_13
39 AB3 112 IPAD_X1Y90 GTX_CHANNEL_0_X249Y162 MGTXRXN0_112
40 AB4 112 IPAD_X1Y91 GTX_CHANNEL_0_X249Y162 MGTXRXP0_112
41 AB10 12 IOB_X0Y191 LIOB33_X0Y191 IO_L4N_T0_12
42 AB11 12 IOB_X0Y192 LIOB33_X0Y191 IO_L4P_T0_12
43 AB12 12 IOB_X0Y196 LIOB33_X0Y195 IO_L2P_T0_12
44 AB14 12 IOB_X0Y171 LIOB33_X0Y171 IO_L14N_T2_SRCC_12
45 AB15 12 IOB_X0Y172 LIOB33_X0Y171 IO_L14P_T2_SRCC_12
46 AB16 12 IOB_X0Y159 LIOB33_X0Y159 IO_L20N_T3_12
47 AB17 12 IOB_X0Y160 LIOB33_X0Y159 IO_L20P_T3_12
48 AB19 13 IOB_X0Y205 LIOB33_X0Y205 IO_L22N_T3_13
49 AB20 13 IOB_X0Y209 LIOB33_X0Y209 IO_L20N_T3_13
50 AB21 13 IOB_X0Y232 LIOB33_X0Y231 IO_L9P_T1_DQS_13
51 AB22 13 IOB_X0Y231 LIOB33_X0Y231 IO_L9N_T1_DQS_13
52 AB24 13 IOB_X0Y237 LIOB33_X0Y237 IO_L6N_T0_VREF_13
53 AB25 13 IOB_X0Y247 LIOB33_X0Y247 IO_L1N_T0_13
54 AB26 13 IOB_X0Y246 LIOB33_X0Y245 IO_L2P_T0_13
55 AC1 111 OPAD_X0Y22 GTX_CHANNEL_3_X249Y150 MGTXTXN3_111
56 AC2 111 OPAD_X0Y23 GTX_CHANNEL_3_X249Y150 MGTXTXP3_111
57 AC5 111 IPAD_X1Y78 GTX_CHANNEL_2_X249Y139 MGTXRXN2_111
58 AC6 111 IPAD_X1Y79 GTX_CHANNEL_2_X249Y139 MGTXRXP2_111
59 AC11 12 IOB_X0Y195 LIOB33_X0Y195 IO_L2N_T0_12
60 AC12 12 IOB_X0Y178 LIOB33_X0Y177 IO_L11P_T1_SRCC_12
61 AC13 12 IOB_X0Y176 LIOB33_X0Y175 IO_L12P_T1_MRCC_12
62 AC14 12 IOB_X0Y174 LIOB33_X0Y173 IO_L13P_T2_MRCC_12
63 AC16 12 IOB_X0Y157 LIOB33_X0Y157 IO_L21N_T3_DQS_12
64 AC17 12 IOB_X0Y158 LIOB33_X0Y157 IO_L21P_T3_DQS_12
65 AC18 13 IOB_X0Y208 LIOB33_X0Y207 IO_L21P_T3_DQS_13
66 AC19 13 IOB_X0Y207 LIOB33_X0Y207 IO_L21N_T3_DQS_13
67 AC21 13 IOB_X0Y222 LIOB33_X0Y221 IO_L14P_T2_SRCC_13
68 AC22 13 IOB_X0Y221 LIOB33_X0Y221 IO_L14N_T2_SRCC_13
69 AC23 13 IOB_X0Y226 LIOB33_X0Y225 IO_L12P_T1_MRCC_13
70 AC24 13 IOB_X0Y225 LIOB33_X0Y225 IO_L12N_T1_MRCC_13
71 AC26 13 IOB_X0Y245 LIOB33_X0Y245 IO_L2N_T0_13
72 AD3 111 IPAD_X1Y84 GTX_CHANNEL_3_X249Y150 MGTXRXN3_111
73 AD4 111 IPAD_X1Y85 GTX_CHANNEL_3_X249Y150 MGTXRXP3_111
74 AD7 111 IPAD_X1Y60 GTX_CHANNEL_0_X249Y110 MGTXRXN0_111
75 AD8 111 IPAD_X1Y61 GTX_CHANNEL_0_X249Y110 MGTXRXP0_111
76 AD10 12 IOB_X0Y185 LIOB33_X0Y185 IO_L7N_T1_12
77 AD11 12 IOB_X0Y177 LIOB33_X0Y177 IO_L11N_T1_SRCC_12
78 AD13 12 IOB_X0Y175 LIOB33_X0Y175 IO_L12N_T1_MRCC_12
79 AD14 12 IOB_X0Y173 LIOB33_X0Y173 IO_L13N_T2_MRCC_12
80 AD15 12 IOB_X0Y169 LIOB33_X0Y169 IO_L15N_T2_DQS_12
81 AD16 12 IOB_X0Y170 LIOB33_X0Y169 IO_L15P_T2_DQS_12
82 AD18 13 IOB_X0Y216 LIOB33_X0Y215 IO_L17P_T2_13
83 AD19 13 IOB_X0Y215 LIOB33_X0Y215 IO_L17N_T2_13
84 AD20 13 IOB_X0Y224 LIOB33_X0Y223 IO_L13P_T2_MRCC_13
85 AD21 13 IOB_X0Y223 LIOB33_X0Y223 IO_L13N_T2_MRCC_13
86 AD23 13 IOB_X0Y228 LIOB33_X0Y227 IO_L11P_T1_SRCC_13
87 AD24 13 IOB_X0Y227 LIOB33_X0Y227 IO_L11N_T1_SRCC_13
88 AD25 13 IOB_X0Y242 LIOB33_X0Y241 IO_L4P_T0_13
89 AD26 13 IOB_X0Y241 LIOB33_X0Y241 IO_L4N_T0_13
90 AE1 111 OPAD_X0Y20 GTX_CHANNEL_2_X249Y139 MGTXTXN2_111
91 AE2 111 OPAD_X0Y21 GTX_CHANNEL_2_X249Y139 MGTXTXP2_111
92 AE5 111 IPAD_X1Y66 GTX_CHANNEL_1_X249Y121 MGTXRXN1_111
93 AE6 111 IPAD_X1Y67 GTX_CHANNEL_1_X249Y121 MGTXRXP1_111
94 AE10 12 IOB_X0Y186 LIOB33_X0Y185 IO_L7P_T1_12
95 AE11 12 IOB_X0Y182 LIOB33_X0Y181 IO_L9P_T1_DQS_12
96 AE12 12 IOB_X0Y184 LIOB33_X0Y183 IO_L8P_T1_12
97 AE13 12 IOB_X0Y180 LIOB33_X0Y179 IO_L10P_T1_12
98 AE15 12 IOB_X0Y165 LIOB33_X0Y165 IO_L17N_T2_12
99 AE16 12 IOB_X0Y166 LIOB33_X0Y165 IO_L17P_T2_12
100 AE17 12 IOB_X0Y164 LIOB33_X0Y163 IO_L18P_T2_12
101 AE18 13 IOB_X0Y214 LIOB33_X0Y213 IO_L18P_T2_13
102 AE20 13 IOB_X0Y218 LIOB33_X0Y217 IO_L16P_T2_13
103 AE21 13 IOB_X0Y217 LIOB33_X0Y217 IO_L16N_T2_13
104 AE22 13 IOB_X0Y236 LIOB33_X0Y235 IO_L7P_T1_13
105 AE23 13 IOB_X0Y234 LIOB33_X0Y233 IO_L8P_T1_13
106 AE25 13 IOB_X0Y244 LIOB33_X0Y243 IO_L3P_T0_DQS_13
107 AE26 13 IOB_X0Y243 LIOB33_X0Y243 IO_L3N_T0_DQS_13
108 AF3 111 OPAD_X0Y18 GTX_CHANNEL_1_X249Y121 MGTXTXN1_111
109 AF4 111 OPAD_X0Y19 GTX_CHANNEL_1_X249Y121 MGTXTXP1_111
110 AF7 111 OPAD_X0Y16 GTX_CHANNEL_0_X249Y110 MGTXTXN0_111
111 AF8 111 OPAD_X0Y17 GTX_CHANNEL_0_X249Y110 MGTXTXP0_111
112 AF10 12 IOB_X0Y181 LIOB33_X0Y181 IO_L9N_T1_DQS_12
113 AF12 12 IOB_X0Y183 LIOB33_X0Y183 IO_L8N_T1_12
114 AF13 12 IOB_X0Y179 LIOB33_X0Y179 IO_L10N_T1_12
115 AF14 12 IOB_X0Y167 LIOB33_X0Y167 IO_L16N_T2_12
116 AF15 12 IOB_X0Y168 LIOB33_X0Y167 IO_L16P_T2_12
117 AF17 12 IOB_X0Y163 LIOB33_X0Y163 IO_L18N_T2_12
118 AF18 13 IOB_X0Y213 LIOB33_X0Y213 IO_L18N_T2_13
119 AF19 13 IOB_X0Y220 LIOB33_X0Y219 IO_L15P_T2_DQS_13
120 AF20 13 IOB_X0Y219 LIOB33_X0Y219 IO_L15N_T2_DQS_13
121 AF22 13 IOB_X0Y235 LIOB33_X0Y235 IO_L7N_T1_13
122 AF23 13 IOB_X0Y233 LIOB33_X0Y233 IO_L8N_T1_13
123 AF24 13 IOB_X0Y240 LIOB33_X0Y239 IO_L5P_T0_13
124 AF25 13 IOB_X0Y239 LIOB33_X0Y239 IO_L5N_T0_13
125 B1 34 IOB_X1Y253 RIOB18_X107Y253 IO_L23N_T3_34
126 B2 34 IOB_X1Y252 RIOB18_X107Y251 IO_L24P_T3_34
127 B4 34 IOB_X1Y259 RIOB18_X107Y259 IO_L20N_T3_34
128 B5 34 IOB_X1Y260 RIOB18_X107Y259 IO_L20P_T3_34
129 B6 34 IOB_X1Y258 RIOB18_X107Y257 IO_L21P_T3_DQS_34
130 B7 34 IOB_X1Y264 RIOB18_X107Y263 IO_L18P_T2_34
131 B9 34 IOB_X1Y269 RIOB18_X107Y269 IO_L15N_T2_DQS_34
132 B10 34 IOB_X1Y268 RIOB18_X107Y267 IO_L16P_T2_34
133 B11 35 IOB_X1Y303 RIOB18_X107Y303 IO_L23N_T3_35
134 B12 35 IOB_X1Y305 RIOB18_X107Y305 IO_L22N_T3_AD7N_35
135 B14 35 IOB_X1Y309 RIOB18_X107Y309 IO_L20N_T3_AD6N_35
136 B15 35 IOB_X1Y315 RIOB18_X107Y315 IO_L17N_T2_AD5N_35
137 B16 35 IOB_X1Y316 RIOB18_X107Y315 IO_L17P_T2_AD5P_35
138 B17 35 IOB_X1Y314 RIOB18_X107Y313 IO_L18P_T2_AD13P_35
139 B19 501 IOPAD_X1Y124 PSS2_X32Y313 PS_MIO47_501
140 B20 501 IOPAD_X1Y128 PSS2_X32Y313 PS_MIO51_501
141 B21 501 IOPAD_X1Y125 PSS2_X32Y313 PS_MIO48_501
142 B22 501 IOPAD_X1Y127 PSS2_X32Y313 PS_MIO50_501
143 B24 500 IOPAD_X1Y26 PSS2_X32Y313 PS_CLK_500
144 B25 500 IOPAD_X1Y90 PSS2_X32Y313 PS_MIO13_500
145 B26 500 IOPAD_X1Y88 PSS2_X32Y313 PS_MIO11_500
146 C1 33 IOB_X1Y241 RIOB18_X107Y241 IO_L4N_T0_33
147 C2 34 IOB_X1Y254 RIOB18_X107Y253 IO_L23P_T3_34
148 C3 34 IOB_X1Y261 RIOB18_X107Y261 IO_L19N_T3_VREF_34
149 C4 34 IOB_X1Y262 RIOB18_X107Y261 IO_L19P_T3_34
150 C6 34 IOB_X1Y271 RIOB18_X107Y271 IO_L14N_T2_SRCC_34
151 C7 34 IOB_X1Y273 RIOB18_X107Y273 IO_L13N_T2_MRCC_34
152 C8 34 IOB_X1Y274 RIOB18_X107Y273 IO_L13P_T2_MRCC_34
153 C9 34 IOB_X1Y270 RIOB18_X107Y269 IO_L15P_T2_DQS_34
154 C11 35 IOB_X1Y304 RIOB18_X107Y303 IO_L23P_T3_35
155 C12 35 IOB_X1Y306 RIOB18_X107Y305 IO_L22P_T3_AD7P_35
156 C13 35 IOB_X1Y311 RIOB18_X107Y311 IO_L19N_T3_VREF_35
157 C14 35 IOB_X1Y310 RIOB18_X107Y309 IO_L20P_T3_AD6P_35
158 C16 35 IOB_X1Y319 RIOB18_X107Y319 IO_L15N_T2_DQS_AD12N_35
159 C17 35 IOB_X1Y320 RIOB18_X107Y319 IO_L15P_T2_DQS_AD12P_35
160 C18 501 IOPAD_X1Y122 PSS2_X32Y313 PS_MIO45_501
161 C19 501 IOPAD_X1Y118 PSS2_X32Y313 PS_MIO41_501
162 C21 501 IOPAD_X1Y116 PSS2_X32Y313 PS_MIO39_501
163 C22 501 IOPAD_X1Y117 PSS2_X32Y313 PS_MIO40_501
164 C23 500 IOPAD_X1Y132 PSS2_X32Y313 PS_POR_B_500
165 C24 500 IOPAD_X1Y92 PSS2_X32Y313 PS_MIO15_500
166 C26 500 IOPAD_X1Y82 PSS2_X32Y313 PS_MIO5_500
167 D1 33 IOB_X1Y242 RIOB18_X107Y241 IO_L4P_T0_33
168 D3 33 IOB_X1Y245 RIOB18_X107Y245 IO_L2N_T0_33
169 D4 33 IOB_X1Y246 RIOB18_X107Y245 IO_L2P_T0_33
170 D5 34 IOB_X1Y279 RIOB18_X107Y279 IO_L10N_T1_34
171 D6 34 IOB_X1Y272 RIOB18_X107Y271 IO_L14P_T2_SRCC_34
172 D8 34 IOB_X1Y283 RIOB18_X107Y283 IO_L8N_T1_34
173 D9 34 IOB_X1Y284 RIOB18_X107Y283 IO_L8P_T1_34
174 D10 35 IOB_X1Y345 RIOB18_X107Y345 IO_L2N_T0_AD8N_35
175 D11 35 IOB_X1Y341 RIOB18_X107Y341 IO_L4N_T0_35
176 D13 35 IOB_X1Y312 RIOB18_X107Y311 IO_L19P_T3_35
177 D14 35 IOB_X1Y323 RIOB18_X107Y323 IO_L13N_T2_MRCC_35
178 D15 35 IOB_X1Y324 RIOB18_X107Y323 IO_L13P_T2_MRCC_35
179 D16 35 IOB_X1Y317 RIOB18_X107Y317 IO_L16N_T2_35
180 D18 501 IOPAD_X1Y120 PSS2_X32Y313 PS_MIO43_501
181 D19 501 IOPAD_X1Y112 PSS2_X32Y313 PS_MIO35_501
182 D20 501 IOPAD_X1Y114 PSS2_X32Y313 PS_MIO37_501
183 D21 501 IOPAD_X1Y115 PSS2_X32Y313 PS_MIO38_501
184 D23 500 IOPAD_X1Y91 PSS2_X32Y313 PS_MIO14_500
185 D24 500 IOPAD_X1Y86 PSS2_X32Y313 PS_MIO9_500
186 D25 500 IOPAD_X1Y80 PSS2_X32Y313 PS_MIO3_500
187 D26 500 IOPAD_X1Y78 PSS2_X32Y313 PS_MIO1_500
188 E1 33 IOB_X1Y239 RIOB18_X107Y239 IO_L5N_T0_33
189 E2 33 IOB_X1Y240 RIOB18_X107Y239 IO_L5P_T0_33
190 E3 33 IOB_X1Y237 RIOB18_X107Y237 IO_L6N_T0_VREF_33
191 E5 34 IOB_X1Y285 RIOB18_X107Y285 IO_L7N_T1_34
192 E6 34 IOB_X1Y280 RIOB18_X107Y279 IO_L10P_T1_34
193 E7 34 IOB_X1Y277 RIOB18_X107Y277 IO_L11N_T1_SRCC_34
194 E8 34 IOB_X1Y281 RIOB18_X107Y281 IO_L9N_T1_DQS_34
195 E10 35 IOB_X1Y346 RIOB18_X107Y345 IO_L2P_T0_AD8P_35
196 E11 35 IOB_X1Y342 RIOB18_X107Y341 IO_L4P_T0_35
197 E12 35 IOB_X1Y347 RIOB18_X107Y347 IO_L1N_T0_AD0N_35
198 E13 35 IOB_X1Y337 RIOB18_X107Y337 IO_L6N_T0_VREF_35
199 E15 35 IOB_X1Y321 RIOB18_X107Y321 IO_L14N_T2_AD4N_SRCC_35
200 E16 35 IOB_X1Y318 RIOB18_X107Y317 IO_L16P_T2_35
201 E17 501 IOPAD_X1Y123 PSS2_X32Y313 PS_MIO46_501
202 E18 501 IOPAD_X1Y121 PSS2_X32Y313 PS_MIO44_501
203 E20 501 IOPAD_X1Y106 PSS2_X32Y313 PS_MIO29_501
204 E21 501 IOPAD_X1Y108 PSS2_X32Y313 PS_MIO31_501
205 E22 501 IOPAD_X1Y110 PSS2_X32Y313 PS_MIO33_501
206 E23 500 IOPAD_X1Y84 PSS2_X32Y313 PS_MIO7_500
207 E25 500 IOPAD_X1Y79 PSS2_X32Y313 PS_MIO2_500
208 E26 500 IOPAD_X1Y77 PSS2_X32Y313 PS_MIO0_500
209 F2 33 IOB_X1Y243 RIOB18_X107Y243 IO_L3N_T0_DQS_33
210 F3 33 IOB_X1Y238 RIOB18_X107Y237 IO_L6P_T0_33
211 F4 33 IOB_X1Y247 RIOB18_X107Y247 IO_L1N_T0_33
212 F5 34 IOB_X1Y286 RIOB18_X107Y285 IO_L7P_T1_34
213 F7 34 IOB_X1Y275 RIOB18_X107Y275 IO_L12N_T1_MRCC_34
214 F8 34 IOB_X1Y278 RIOB18_X107Y277 IO_L11P_T1_SRCC_34
215 F9 34 IOB_X1Y282 RIOB18_X107Y281 IO_L9P_T1_DQS_34
216 F10 35 IOB_X1Y343 RIOB18_X107Y343 IO_L3N_T0_DQS_AD1N_35
217 F12 35 IOB_X1Y348 RIOB18_X107Y347 IO_L1P_T0_AD0P_35
218 F13 35 IOB_X1Y338 RIOB18_X107Y337 IO_L6P_T0_35
219 F14 35 IOB_X1Y327 RIOB18_X107Y327 IO_L11N_T1_SRCC_35
220 F15 35 IOB_X1Y322 RIOB18_X107Y321 IO_L14P_T2_AD4P_SRCC_35
221 F17 501 IOPAD_X1Y119 PSS2_X32Y313 PS_MIO42_501
222 F18 501 IOPAD_X1Y104 PSS2_X32Y313 PS_MIO27_501
223 F19 501 IOPAD_X1Y102 PSS2_X32Y313 PS_MIO25_501
224 F20 501 IOPAD_X1Y100 PSS2_X32Y313 PS_MIO23_501
225 F22 501 IOPAD_X1Y98 PSS2_X32Y313 PS_MIO21_501
226 F23 500 IOPAD_X1Y83 PSS2_X32Y313 PS_MIO6_500
227 F24 500 IOPAD_X1Y81 PSS2_X32Y313 PS_MIO4_500
228 F25 502 IOPAD_X1Y33 PSS2_X32Y313 PS_DDR_DQ1_502
229 G1 33 IOB_X1Y229 RIOB18_X107Y229 IO_L10N_T1_33
230 G2 33 IOB_X1Y244 RIOB18_X107Y243 IO_L3P_T0_DQS_33
231 G4 33 IOB_X1Y248 RIOB18_X107Y247 IO_L1P_T0_33
232 G5 34 IOB_X1Y295 RIOB18_X107Y295 IO_L2N_T0_34
233 G6 34 IOB_X1Y296 RIOB18_X107Y295 IO_L2P_T0_34
234 G7 34 IOB_X1Y276 RIOB18_X107Y275 IO_L12P_T1_MRCC_34
235 G9 34 IOB_X1Y293 RIOB18_X107Y293 IO_L3N_T0_DQS_34
236 G10 35 IOB_X1Y344 RIOB18_X107Y343 IO_L3P_T0_DQS_AD1P_35
237 G11 35 IOB_X1Y339 RIOB18_X107Y339 IO_L5N_T0_AD9N_35
238 G12 35 IOB_X1Y340 RIOB18_X107Y339 IO_L5P_T0_AD9P_35
239 G14 35 IOB_X1Y328 RIOB18_X107Y327 IO_L11P_T1_SRCC_35
240 G15 35 IOB_X1Y329 RIOB18_X107Y329 IO_L10N_T1_AD11N_35
241 G16 35 IOB_X1Y330 RIOB18_X107Y329 IO_L10P_T1_AD11P_35
242 G17 501 IOPAD_X1Y94 PSS2_X32Y313 PS_MIO17_501
243 G19 501 IOPAD_X1Y96 PSS2_X32Y313 PS_MIO19_501
244 G20 501 IOPAD_X1Y95 PSS2_X32Y313 PS_MIO18_501
245 G21 501 IOPAD_X1Y93 PSS2_X32Y313 PS_MIO16_501
246 G22 501 IOPAD_X1Y99 PSS2_X32Y313 PS_MIO22_501
247 G24 502 IOPAD_X1Y28 PSS2_X32Y313 PS_DDR_DM0_502
248 G25 502 IOPAD_X1Y64 PSS2_X32Y313 PS_DDR_DQS_N0_502
249 G26 502 IOPAD_X1Y35 PSS2_X32Y313 PS_DDR_DQ3_502
250 H1 33 IOB_X1Y235 RIOB18_X107Y235 IO_L7N_T1_33
251 H2 33 IOB_X1Y230 RIOB18_X107Y229 IO_L10P_T1_33
252 H3 33 IOB_X1Y233 RIOB18_X107Y233 IO_L8N_T1_33
253 H4 33 IOB_X1Y234 RIOB18_X107Y233 IO_L8P_T1_33
254 H6 34 IOB_X1Y291 RIOB18_X107Y291 IO_L4N_T0_34
255 H7 34 IOB_X1Y292 RIOB18_X107Y291 IO_L4P_T0_34
256 H8 34 IOB_X1Y287 RIOB18_X107Y287 IO_L6N_T0_VREF_34
257 H9 34 IOB_X1Y294 RIOB18_X107Y293 IO_L3P_T0_DQS_PUDC_B_34
258 H11 34 IOB_X1Y297 RIOB18_X107Y297 IO_L1N_T0_34
259 H12 35 IOB_X1Y335 RIOB18_X107Y335 IO_L7N_T1_AD2N_35
260 H13 35 IOB_X1Y336 RIOB18_X107Y335 IO_L7P_T1_AD2P_35
261 H14 35 IOB_X1Y325 RIOB18_X107Y325 IO_L12N_T1_MRCC_35
262 H16 35 IOB_X1Y349 RIOB18_SING_X107Y349 IO_0_VRN_35
263 H17 501 IOPAD_X1Y103 PSS2_X32Y313 PS_MIO26_501
264 H19 501 IOPAD_X1Y97 PSS2_X32Y313 PS_MIO20_501
265 H21 502 IOPAD_X1Y15 PSS2_X32Y313 PS_DDR_A11_502
266 H22 502 IOPAD_X1Y72 PSS2_X32Y313 PS_DDR_DRST_B_502
267 H23 502 IOPAD_X1Y37 PSS2_X32Y313 PS_DDR_DQ5_502
268 H24 502 IOPAD_X1Y68 PSS2_X32Y313 PS_DDR_DQS_P0_502
269 H26 502 IOPAD_X1Y36 PSS2_X32Y313 PS_DDR_DQ4_502
270 J1 33 IOB_X1Y236 RIOB18_X107Y235 IO_L7P_T1_33
271 J3 33 IOB_X1Y225 RIOB18_X107Y225 IO_L12N_T1_MRCC_33
272 J4 33 IOB_X1Y226 RIOB18_X107Y225 IO_L12P_T1_MRCC_33
273 J5 33 IOB_X1Y209 RIOB18_X107Y209 IO_L20N_T3_33
274 J6 33 IOB_X1Y205 RIOB18_X107Y205 IO_L22N_T3_33
275 J8 34 IOB_X1Y288 RIOB18_X107Y287 IO_L6P_T0_34
276 J9 34 IOB_X1Y289 RIOB18_X107Y289 IO_L5N_T0_34
277 J10 34 IOB_X1Y290 RIOB18_X107Y289 IO_L5P_T0_34
278 J11 34 IOB_X1Y298 RIOB18_X107Y297 IO_L1P_T0_34
279 J13 35 IOB_X1Y333 RIOB18_X107Y333 IO_L8N_T1_AD10N_35
280 J14 35 IOB_X1Y326 RIOB18_X107Y325 IO_L12P_T1_MRCC_35
281 J15 35 IOB_X1Y331 RIOB18_X107Y331 IO_L9N_T1_DQS_AD3N_35
282 J16 501 IOPAD_X1Y111 PSS2_X32Y313 PS_MIO34_501
283 J18 501 IOPAD_X1Y105 PSS2_X32Y313 PS_MIO28_501
284 J19 501 IOPAD_X1Y101 PSS2_X32Y313 PS_MIO24_501
285 J20 502 IOPAD_X1Y18 PSS2_X32Y313 PS_DDR_A13_502
286 J21 502 IOPAD_X1Y11 PSS2_X32Y313 PS_DDR_A7_502
287 J23 502 IOPAD_X1Y39 PSS2_X32Y313 PS_DDR_DQ7_502
288 J24 502 IOPAD_X1Y38 PSS2_X32Y313 PS_DDR_DQ6_502
289 J25 502 IOPAD_X1Y34 PSS2_X32Y313 PS_DDR_DQ2_502
290 J26 502 IOPAD_X1Y32 PSS2_X32Y313 PS_DDR_DQ0_502
291 K1 33 IOB_X1Y231 RIOB18_X107Y231 IO_L9N_T1_DQS_33
292 K2 33 IOB_X1Y232 RIOB18_X107Y231 IO_L9P_T1_DQS_33
293 K3 33 IOB_X1Y227 RIOB18_X107Y227 IO_L11N_T1_SRCC_33
294 K5 33 IOB_X1Y210 RIOB18_X107Y209 IO_L20P_T3_33
295 K6 33 IOB_X1Y206 RIOB18_X107Y205 IO_L22P_T3_33
296 K7 33 IOB_X1Y201 RIOB18_X107Y201 IO_L24N_T3_33
297 K8 33 IOB_X1Y202 RIOB18_X107Y201 IO_L24P_T3_33
298 K10 34 IOB_X1Y250 RIOB18_SING_X107Y250 IO_25_VRP_34
299 K11 34 IOB_X1Y299 RIOB18_SING_X107Y299 IO_0_VRN_34
300 K12 35 IOB_X1Y300 RIOB18_SING_X107Y300 IO_25_VRP_35
301 K13 35 IOB_X1Y334 RIOB18_X107Y333 IO_L8P_T1_AD10P_35
302 K15 35 IOB_X1Y332 RIOB18_X107Y331 IO_L9P_T1_DQS_AD3P_35
303 K16 501 IOPAD_X1Y113 PSS2_X32Y313 PS_MIO36_501
304 K17 501 IOPAD_X1Y109 PSS2_X32Y313 PS_MIO32_501
305 K19 501 IOPAD_X1Y107 PSS2_X32Y313 PS_MIO30_501
306 K20 502 IOPAD_X1Y5 PSS2_X32Y313 PS_DDR_A1_502
307 K22 502 IOPAD_X1Y4 PSS2_X32Y313 PS_DDR_A0_502
308 K23 502 IOPAD_X1Y43 PSS2_X32Y313 PS_DDR_DQ11_502
309 K25 502 IOPAD_X1Y29 PSS2_X32Y313 PS_DDR_DM1_502
310 K26 502 IOPAD_X1Y40 PSS2_X32Y313 PS_DDR_DQ8_502
311 L2 33 IOB_X1Y217 RIOB18_X107Y217 IO_L16N_T2_33
312 L3 33 IOB_X1Y228 RIOB18_X107Y227 IO_L11P_T1_SRCC_33
313 L4 33 IOB_X1Y221 RIOB18_X107Y221 IO_L14N_T2_SRCC_33
314 L5 33 IOB_X1Y222 RIOB18_X107Y221 IO_L14P_T2_SRCC_33
315 L7 33 IOB_X1Y211 RIOB18_X107Y211 IO_L19N_T3_VREF_33
316 L8 33 IOB_X1Y207 RIOB18_X107Y207 IO_L21N_T3_DQS_33
317 L9 33 IOB_X1Y249 RIOB18_SING_X107Y249 IO_0_VRN_33
318 L20 502 IOPAD_X1Y10 PSS2_X32Y313 PS_DDR_A6_502
319 L22 502 IOPAD_X1Y7 PSS2_X32Y313 PS_DDR_A3_502
320 L23 502 IOPAD_X1Y41 PSS2_X32Y313 PS_DDR_DQ9_502
321 L24 502 IOPAD_X1Y69 PSS2_X32Y313 PS_DDR_DQS_P1_502
322 L25 502 IOPAD_X1Y65 PSS2_X32Y313 PS_DDR_DQS_N1_502
323 M1 33 IOB_X1Y213 RIOB18_X107Y213 IO_L18N_T2_33
324 M2 33 IOB_X1Y218 RIOB18_X107Y217 IO_L16P_T2_33
325 M4 33 IOB_X1Y215 RIOB18_X107Y215 IO_L17N_T2_33
326 M5 33 IOB_X1Y223 RIOB18_X107Y223 IO_L13N_T2_MRCC_33
327 M6 33 IOB_X1Y224 RIOB18_X107Y223 IO_L13P_T2_MRCC_33
328 M7 33 IOB_X1Y212 RIOB18_X107Y211 IO_L19P_T3_33
329 M8 33 IOB_X1Y208 RIOB18_X107Y207 IO_L21P_T3_DQS_33
330 M20 502 IOPAD_X1Y8 PSS2_X32Y313 PS_DDR_A4_502
331 M22 502 IOPAD_X1Y14 PSS2_X32Y313 PS_DDR_A10_502
332 M24 502 IOPAD_X1Y46 PSS2_X32Y313 PS_DDR_DQ14_502
333 M25 502 IOPAD_X1Y44 PSS2_X32Y313 PS_DDR_DQ12_502
334 M26 502 IOPAD_X1Y42 PSS2_X32Y313 PS_DDR_DQ10_502
335 N1 33 IOB_X1Y214 RIOB18_X107Y213 IO_L18P_T2_33
336 N2 33 IOB_X1Y219 RIOB18_X107Y219 IO_L15N_T2_DQS_33
337 N3 33 IOB_X1Y220 RIOB18_X107Y219 IO_L15P_T2_DQS_33
338 N4 33 IOB_X1Y216 RIOB18_X107Y215 IO_L17P_T2_33
339 N6 33 IOB_X1Y203 RIOB18_X107Y203 IO_L23N_T3_33
340 N7 33 IOB_X1Y204 RIOB18_X107Y203 IO_L23P_T3_33
341 N8 33 IOB_X1Y200 RIOB18_SING_X107Y200 IO_25_VRP_33
342 N14 0 IPAD_X0Y120 MONITOR_BOT_PELE1_X197Y339 VP_0
343 N21 502 IOPAD_X1Y6 PSS2_X32Y313 PS_DDR_A2_502
344 N22 502 IOPAD_X1Y9 PSS2_X32Y313 PS_DDR_A5_502
345 N23 502 IOPAD_X1Y47 PSS2_X32Y313 PS_DDR_DQ15_502
346 N24 502 IOPAD_X1Y45 PSS2_X32Y313 PS_DDR_DQ13_502
347 N26 502 IOPAD_X1Y50 PSS2_X32Y313 PS_DDR_DQ18_502
348 P13 0 IPAD_X0Y121 MONITOR_BOT_PELE1_X197Y339 VN_0
349 P20 502 IOPAD_X1Y16 PSS2_X32Y313 PS_DDR_A12_502
350 P21 502 IOPAD_X1Y24 PSS2_X32Y313 PS_DDR_CKN_502
351 P23 502 IOPAD_X1Y51 PSS2_X32Y313 PS_DDR_DQ19_502
352 P24 502 IOPAD_X1Y49 PSS2_X32Y313 PS_DDR_DQ17_502
353 P25 502 IOPAD_X1Y70 PSS2_X32Y313 PS_DDR_DQS_P2_502
354 P26 502 IOPAD_X1Y30 PSS2_X32Y313 PS_DDR_DM2_502
355 R1 112 OPAD_X0Y30 GTX_CHANNEL_3_X249Y202 MGTXTXN3_112
356 R2 112 OPAD_X0Y31 GTX_CHANNEL_3_X249Y202 MGTXTXP3_112
357 R5 112 IPAD_X1Y99 GTX_COMMON_X249Y179 MGTREFCLK0N_112
358 R6 112 IPAD_X1Y98 GTX_COMMON_X249Y179 MGTREFCLK0P_112
359 R20 502 IOPAD_X1Y17 PSS2_X32Y313 PS_DDR_A14_502
360 R21 502 IOPAD_X1Y25 PSS2_X32Y313 PS_DDR_CKP_502
361 R22 502 IOPAD_X1Y21 PSS2_X32Y313 PS_DDR_BA2_502
362 R23 502 IOPAD_X1Y55 PSS2_X32Y313 PS_DDR_DQ23_502
363 R25 502 IOPAD_X1Y66 PSS2_X32Y313 PS_DDR_DQS_N2_502
364 R26 502 IOPAD_X1Y48 PSS2_X32Y313 PS_DDR_DQ16_502
365 T3 112 IPAD_X1Y114 GTX_CHANNEL_3_X249Y202 MGTXRXN3_112
366 T4 112 IPAD_X1Y115 GTX_CHANNEL_3_X249Y202 MGTXRXP3_112
367 T20 502 IOPAD_X1Y12 PSS2_X32Y313 PS_DDR_A8_502
368 T22 502 IOPAD_X1Y20 PSS2_X32Y313 PS_DDR_BA1_502
369 T23 502 IOPAD_X1Y54 PSS2_X32Y313 PS_DDR_DQ22_502
370 T24 502 IOPAD_X1Y52 PSS2_X32Y313 PS_DDR_DQ20_502
371 T25 502 IOPAD_X1Y53 PSS2_X32Y313 PS_DDR_DQ21_502
372 U1 112 OPAD_X0Y28 GTX_CHANNEL_2_X249Y191 MGTXTXN2_112
373 U2 112 OPAD_X0Y29 GTX_CHANNEL_2_X249Y191 MGTXTXP2_112
374 U5 112 IPAD_X1Y101 GTX_COMMON_X249Y179 MGTREFCLK1N_112
375 U6 112 IPAD_X1Y100 GTX_COMMON_X249Y179 MGTREFCLK1P_112
376 U20 502 IOPAD_X1Y13 PSS2_X32Y313 PS_DDR_A9_502
377 U21 502 IOPAD_X1Y23 PSS2_X32Y313 PS_DDR_CKE_502
378 U22 502 IOPAD_X1Y19 PSS2_X32Y313 PS_DDR_BA0_502
379 U24 502 IOPAD_X1Y58 PSS2_X32Y313 PS_DDR_DQ26_502
380 U25 502 IOPAD_X1Y59 PSS2_X32Y313 PS_DDR_DQ27_502
381 U26 502 IOPAD_X1Y57 PSS2_X32Y313 PS_DDR_DQ25_502
382 V3 112 IPAD_X1Y108 GTX_CHANNEL_2_X249Y191 MGTXRXN2_112
383 V4 112 IPAD_X1Y109 GTX_CHANNEL_2_X249Y191 MGTXRXP2_112
384 V18 13 IOB_X0Y200 LIOB33_SING_X0Y200 IO_25_13
385 V19 13 IOB_X0Y249 LIOB33_SING_X0Y249 IO_0_13
386 V21 502 IOPAD_X1Y2 PSS2_X32Y313 PS_DDR_VRN_502
387 V22 502 IOPAD_X1Y1 PSS2_X32Y313 PS_DDR_WE_B_502
388 V23 502 IOPAD_X1Y133 PSS2_X32Y313 PS_DDR_RAS_B_502
389 V24 502 IOPAD_X1Y56 PSS2_X32Y313 PS_DDR_DQ24_502
390 V26 502 IOPAD_X1Y31 PSS2_X32Y313 PS_DDR_DM3_502
391 W1 112 OPAD_X0Y26 GTX_CHANNEL_1_X249Y173 MGTXTXN1_112
392 W2 112 OPAD_X0Y27 GTX_CHANNEL_1_X249Y173 MGTXTXP1_112
393 W5 111 IPAD_X1Y69 GTX_COMMON_X249Y127 MGTREFCLK0N_111
394 W6 111 IPAD_X1Y68 GTX_COMMON_X249Y127 MGTREFCLK0P_111
395 W13 12 IOB_X0Y190 LIOB33_X0Y189 IO_L5P_T0_12
396 W14 12 IOB_X0Y199 LIOB33_SING_X0Y199 IO_0_12
397 W15 12 IOB_X0Y151 LIOB33_X0Y151 IO_L24N_T3_12
398 W16 12 IOB_X0Y152 LIOB33_X0Y151 IO_L24P_T3_12
399 W17 12 IOB_X0Y150 LIOB33_SING_X0Y150 IO_25_12
400 W18 13 IOB_X0Y204 LIOB33_X0Y203 IO_L23P_T3_13
401 W19 13 IOB_X0Y203 LIOB33_X0Y203 IO_L23N_T3_13
402 W20 13 IOB_X0Y212 LIOB33_X0Y211 IO_L19P_T3_13
403 W21 502 IOPAD_X1Y3 PSS2_X32Y313 PS_DDR_VRP_502
404 W23 502 IOPAD_X1Y63 PSS2_X32Y313 PS_DDR_DQ31_502
405 W24 502 IOPAD_X1Y71 PSS2_X32Y313 PS_DDR_DQS_P3_502
406 W25 502 IOPAD_X1Y67 PSS2_X32Y313 PS_DDR_DQS_N3_502
407 W26 502 IOPAD_X1Y60 PSS2_X32Y313 PS_DDR_DQ28_502
408 Y3 112 IPAD_X1Y96 GTX_CHANNEL_1_X249Y173 MGTXRXN1_112
409 Y4 112 IPAD_X1Y97 GTX_CHANNEL_1_X249Y173 MGTXRXP1_112
410 Y10 12 IOB_X0Y194 LIOB33_X0Y193 IO_L3P_T0_DQS_12
411 Y11 12 IOB_X0Y197 LIOB33_X0Y197 IO_L1N_T0_12
412 Y12 12 IOB_X0Y198 LIOB33_X0Y197 IO_L1P_T0_12
413 Y13 12 IOB_X0Y189 LIOB33_X0Y189 IO_L5N_T0_12
414 Y15 12 IOB_X0Y153 LIOB33_X0Y153 IO_L23N_T3_12
415 Y16 12 IOB_X0Y154 LIOB33_X0Y153 IO_L23P_T3_12
416 Y17 12 IOB_X0Y162 LIOB33_X0Y161 IO_L19P_T3_12
417 Y18 13 IOB_X0Y202 LIOB33_X0Y201 IO_L24P_T3_13
418 Y20 13 IOB_X0Y211 LIOB33_X0Y211 IO_L19N_T3_VREF_13
419 Y21 502 IOPAD_X1Y27 PSS2_X32Y313 PS_DDR_CS_B_502
420 Y22 502 IOPAD_X1Y131 PSS2_X32Y313 PS_DDR_ODT_502
421 Y23 502 IOPAD_X1Y22 PSS2_X32Y313 PS_DDR_CAS_B_502
422 Y25 502 IOPAD_X1Y61 PSS2_X32Y313 PS_DDR_DQ29_502
423 Y26 502 IOPAD_X1Y62 PSS2_X32Y313 PS_DDR_DQ30_502

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File diff suppressed because it is too large Load Diff

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@ -0,0 +1,423 @@
pin,bank,site,tile,pin_function
A2,34,IOB_X1Y251,RIOB18_X107Y251,IO_L24N_T3_34
A3,34,IOB_X1Y255,RIOB18_X107Y255,IO_L22N_T3_34
A4,34,IOB_X1Y256,RIOB18_X107Y255,IO_L22P_T3_34
A5,34,IOB_X1Y257,RIOB18_X107Y257,IO_L21N_T3_DQS_34
A7,34,IOB_X1Y263,RIOB18_X107Y263,IO_L18N_T2_34
A8,34,IOB_X1Y265,RIOB18_X107Y265,IO_L17N_T2_34
A9,34,IOB_X1Y266,RIOB18_X107Y265,IO_L17P_T2_34
A10,34,IOB_X1Y267,RIOB18_X107Y267,IO_L16N_T2_34
A12,35,IOB_X1Y301,RIOB18_X107Y301,IO_L24N_T3_AD15N_35
A13,35,IOB_X1Y302,RIOB18_X107Y301,IO_L24P_T3_AD15P_35
A14,35,IOB_X1Y307,RIOB18_X107Y307,IO_L21N_T3_DQS_AD14N_35
A15,35,IOB_X1Y308,RIOB18_X107Y307,IO_L21P_T3_DQS_AD14P_35
A17,35,IOB_X1Y313,RIOB18_X107Y313,IO_L18N_T2_AD13N_35
A18,501,IOPAD_X1Y126,PSS2_X32Y313,PS_MIO49_501
A19,501,IOPAD_X1Y130,PSS2_X32Y313,PS_MIO53_501
A20,501,IOPAD_X1Y129,PSS2_X32Y313,PS_MIO52_501
A22,501,IOPAD_X1Y134,PSS2_X32Y313,PS_SRST_B_501
A23,500,IOPAD_X1Y89,PSS2_X32Y313,PS_MIO12_500
A24,500,IOPAD_X1Y85,PSS2_X32Y313,PS_MIO8_500
A25,500,IOPAD_X1Y87,PSS2_X32Y313,PS_MIO10_500
AA1,112,OPAD_X0Y24,GTX_CHANNEL_0_X249Y162,MGTXTXN0_112
AA2,112,OPAD_X0Y25,GTX_CHANNEL_0_X249Y162,MGTXTXP0_112
AA5,111,IPAD_X1Y71,GTX_COMMON_X249Y127,MGTREFCLK1N_111
AA6,111,IPAD_X1Y70,GTX_COMMON_X249Y127,MGTREFCLK1P_111
AA10,12,IOB_X0Y193,LIOB33_X0Y193,IO_L3N_T0_DQS_12
AA12,12,IOB_X0Y187,LIOB33_X0Y187,IO_L6N_T0_VREF_12
AA13,12,IOB_X0Y188,LIOB33_X0Y187,IO_L6P_T0_12
AA14,12,IOB_X0Y155,LIOB33_X0Y155,IO_L22N_T3_12
AA15,12,IOB_X0Y156,LIOB33_X0Y155,IO_L22P_T3_12
AA17,12,IOB_X0Y161,LIOB33_X0Y161,IO_L19N_T3_VREF_12
AA18,13,IOB_X0Y201,LIOB33_X0Y201,IO_L24N_T3_13
AA19,13,IOB_X0Y206,LIOB33_X0Y205,IO_L22P_T3_13
AA20,13,IOB_X0Y210,LIOB33_X0Y209,IO_L20P_T3_13
AA22,13,IOB_X0Y230,LIOB33_X0Y229,IO_L10P_T1_13
AA23,13,IOB_X0Y229,LIOB33_X0Y229,IO_L10N_T1_13
AA24,13,IOB_X0Y238,LIOB33_X0Y237,IO_L6P_T0_13
AA25,13,IOB_X0Y248,LIOB33_X0Y247,IO_L1P_T0_13
AB3,112,IPAD_X1Y90,GTX_CHANNEL_0_X249Y162,MGTXRXN0_112
AB4,112,IPAD_X1Y91,GTX_CHANNEL_0_X249Y162,MGTXRXP0_112
AB10,12,IOB_X0Y191,LIOB33_X0Y191,IO_L4N_T0_12
AB11,12,IOB_X0Y192,LIOB33_X0Y191,IO_L4P_T0_12
AB12,12,IOB_X0Y196,LIOB33_X0Y195,IO_L2P_T0_12
AB14,12,IOB_X0Y171,LIOB33_X0Y171,IO_L14N_T2_SRCC_12
AB15,12,IOB_X0Y172,LIOB33_X0Y171,IO_L14P_T2_SRCC_12
AB16,12,IOB_X0Y159,LIOB33_X0Y159,IO_L20N_T3_12
AB17,12,IOB_X0Y160,LIOB33_X0Y159,IO_L20P_T3_12
AB19,13,IOB_X0Y205,LIOB33_X0Y205,IO_L22N_T3_13
AB20,13,IOB_X0Y209,LIOB33_X0Y209,IO_L20N_T3_13
AB21,13,IOB_X0Y232,LIOB33_X0Y231,IO_L9P_T1_DQS_13
AB22,13,IOB_X0Y231,LIOB33_X0Y231,IO_L9N_T1_DQS_13
AB24,13,IOB_X0Y237,LIOB33_X0Y237,IO_L6N_T0_VREF_13
AB25,13,IOB_X0Y247,LIOB33_X0Y247,IO_L1N_T0_13
AB26,13,IOB_X0Y246,LIOB33_X0Y245,IO_L2P_T0_13
AC1,111,OPAD_X0Y22,GTX_CHANNEL_3_X249Y150,MGTXTXN3_111
AC2,111,OPAD_X0Y23,GTX_CHANNEL_3_X249Y150,MGTXTXP3_111
AC5,111,IPAD_X1Y78,GTX_CHANNEL_2_X249Y139,MGTXRXN2_111
AC6,111,IPAD_X1Y79,GTX_CHANNEL_2_X249Y139,MGTXRXP2_111
AC11,12,IOB_X0Y195,LIOB33_X0Y195,IO_L2N_T0_12
AC12,12,IOB_X0Y178,LIOB33_X0Y177,IO_L11P_T1_SRCC_12
AC13,12,IOB_X0Y176,LIOB33_X0Y175,IO_L12P_T1_MRCC_12
AC14,12,IOB_X0Y174,LIOB33_X0Y173,IO_L13P_T2_MRCC_12
AC16,12,IOB_X0Y157,LIOB33_X0Y157,IO_L21N_T3_DQS_12
AC17,12,IOB_X0Y158,LIOB33_X0Y157,IO_L21P_T3_DQS_12
AC18,13,IOB_X0Y208,LIOB33_X0Y207,IO_L21P_T3_DQS_13
AC19,13,IOB_X0Y207,LIOB33_X0Y207,IO_L21N_T3_DQS_13
AC21,13,IOB_X0Y222,LIOB33_X0Y221,IO_L14P_T2_SRCC_13
AC22,13,IOB_X0Y221,LIOB33_X0Y221,IO_L14N_T2_SRCC_13
AC23,13,IOB_X0Y226,LIOB33_X0Y225,IO_L12P_T1_MRCC_13
AC24,13,IOB_X0Y225,LIOB33_X0Y225,IO_L12N_T1_MRCC_13
AC26,13,IOB_X0Y245,LIOB33_X0Y245,IO_L2N_T0_13
AD3,111,IPAD_X1Y84,GTX_CHANNEL_3_X249Y150,MGTXRXN3_111
AD4,111,IPAD_X1Y85,GTX_CHANNEL_3_X249Y150,MGTXRXP3_111
AD7,111,IPAD_X1Y60,GTX_CHANNEL_0_X249Y110,MGTXRXN0_111
AD8,111,IPAD_X1Y61,GTX_CHANNEL_0_X249Y110,MGTXRXP0_111
AD10,12,IOB_X0Y185,LIOB33_X0Y185,IO_L7N_T1_12
AD11,12,IOB_X0Y177,LIOB33_X0Y177,IO_L11N_T1_SRCC_12
AD13,12,IOB_X0Y175,LIOB33_X0Y175,IO_L12N_T1_MRCC_12
AD14,12,IOB_X0Y173,LIOB33_X0Y173,IO_L13N_T2_MRCC_12
AD15,12,IOB_X0Y169,LIOB33_X0Y169,IO_L15N_T2_DQS_12
AD16,12,IOB_X0Y170,LIOB33_X0Y169,IO_L15P_T2_DQS_12
AD18,13,IOB_X0Y216,LIOB33_X0Y215,IO_L17P_T2_13
AD19,13,IOB_X0Y215,LIOB33_X0Y215,IO_L17N_T2_13
AD20,13,IOB_X0Y224,LIOB33_X0Y223,IO_L13P_T2_MRCC_13
AD21,13,IOB_X0Y223,LIOB33_X0Y223,IO_L13N_T2_MRCC_13
AD23,13,IOB_X0Y228,LIOB33_X0Y227,IO_L11P_T1_SRCC_13
AD24,13,IOB_X0Y227,LIOB33_X0Y227,IO_L11N_T1_SRCC_13
AD25,13,IOB_X0Y242,LIOB33_X0Y241,IO_L4P_T0_13
AD26,13,IOB_X0Y241,LIOB33_X0Y241,IO_L4N_T0_13
AE1,111,OPAD_X0Y20,GTX_CHANNEL_2_X249Y139,MGTXTXN2_111
AE2,111,OPAD_X0Y21,GTX_CHANNEL_2_X249Y139,MGTXTXP2_111
AE5,111,IPAD_X1Y66,GTX_CHANNEL_1_X249Y121,MGTXRXN1_111
AE6,111,IPAD_X1Y67,GTX_CHANNEL_1_X249Y121,MGTXRXP1_111
AE10,12,IOB_X0Y186,LIOB33_X0Y185,IO_L7P_T1_12
AE11,12,IOB_X0Y182,LIOB33_X0Y181,IO_L9P_T1_DQS_12
AE12,12,IOB_X0Y184,LIOB33_X0Y183,IO_L8P_T1_12
AE13,12,IOB_X0Y180,LIOB33_X0Y179,IO_L10P_T1_12
AE15,12,IOB_X0Y165,LIOB33_X0Y165,IO_L17N_T2_12
AE16,12,IOB_X0Y166,LIOB33_X0Y165,IO_L17P_T2_12
AE17,12,IOB_X0Y164,LIOB33_X0Y163,IO_L18P_T2_12
AE18,13,IOB_X0Y214,LIOB33_X0Y213,IO_L18P_T2_13
AE20,13,IOB_X0Y218,LIOB33_X0Y217,IO_L16P_T2_13
AE21,13,IOB_X0Y217,LIOB33_X0Y217,IO_L16N_T2_13
AE22,13,IOB_X0Y236,LIOB33_X0Y235,IO_L7P_T1_13
AE23,13,IOB_X0Y234,LIOB33_X0Y233,IO_L8P_T1_13
AE25,13,IOB_X0Y244,LIOB33_X0Y243,IO_L3P_T0_DQS_13
AE26,13,IOB_X0Y243,LIOB33_X0Y243,IO_L3N_T0_DQS_13
AF3,111,OPAD_X0Y18,GTX_CHANNEL_1_X249Y121,MGTXTXN1_111
AF4,111,OPAD_X0Y19,GTX_CHANNEL_1_X249Y121,MGTXTXP1_111
AF7,111,OPAD_X0Y16,GTX_CHANNEL_0_X249Y110,MGTXTXN0_111
AF8,111,OPAD_X0Y17,GTX_CHANNEL_0_X249Y110,MGTXTXP0_111
AF10,12,IOB_X0Y181,LIOB33_X0Y181,IO_L9N_T1_DQS_12
AF12,12,IOB_X0Y183,LIOB33_X0Y183,IO_L8N_T1_12
AF13,12,IOB_X0Y179,LIOB33_X0Y179,IO_L10N_T1_12
AF14,12,IOB_X0Y167,LIOB33_X0Y167,IO_L16N_T2_12
AF15,12,IOB_X0Y168,LIOB33_X0Y167,IO_L16P_T2_12
AF17,12,IOB_X0Y163,LIOB33_X0Y163,IO_L18N_T2_12
AF18,13,IOB_X0Y213,LIOB33_X0Y213,IO_L18N_T2_13
AF19,13,IOB_X0Y220,LIOB33_X0Y219,IO_L15P_T2_DQS_13
AF20,13,IOB_X0Y219,LIOB33_X0Y219,IO_L15N_T2_DQS_13
AF22,13,IOB_X0Y235,LIOB33_X0Y235,IO_L7N_T1_13
AF23,13,IOB_X0Y233,LIOB33_X0Y233,IO_L8N_T1_13
AF24,13,IOB_X0Y240,LIOB33_X0Y239,IO_L5P_T0_13
AF25,13,IOB_X0Y239,LIOB33_X0Y239,IO_L5N_T0_13
B1,34,IOB_X1Y253,RIOB18_X107Y253,IO_L23N_T3_34
B2,34,IOB_X1Y252,RIOB18_X107Y251,IO_L24P_T3_34
B4,34,IOB_X1Y259,RIOB18_X107Y259,IO_L20N_T3_34
B5,34,IOB_X1Y260,RIOB18_X107Y259,IO_L20P_T3_34
B6,34,IOB_X1Y258,RIOB18_X107Y257,IO_L21P_T3_DQS_34
B7,34,IOB_X1Y264,RIOB18_X107Y263,IO_L18P_T2_34
B9,34,IOB_X1Y269,RIOB18_X107Y269,IO_L15N_T2_DQS_34
B10,34,IOB_X1Y268,RIOB18_X107Y267,IO_L16P_T2_34
B11,35,IOB_X1Y303,RIOB18_X107Y303,IO_L23N_T3_35
B12,35,IOB_X1Y305,RIOB18_X107Y305,IO_L22N_T3_AD7N_35
B14,35,IOB_X1Y309,RIOB18_X107Y309,IO_L20N_T3_AD6N_35
B15,35,IOB_X1Y315,RIOB18_X107Y315,IO_L17N_T2_AD5N_35
B16,35,IOB_X1Y316,RIOB18_X107Y315,IO_L17P_T2_AD5P_35
B17,35,IOB_X1Y314,RIOB18_X107Y313,IO_L18P_T2_AD13P_35
B19,501,IOPAD_X1Y124,PSS2_X32Y313,PS_MIO47_501
B20,501,IOPAD_X1Y128,PSS2_X32Y313,PS_MIO51_501
B21,501,IOPAD_X1Y125,PSS2_X32Y313,PS_MIO48_501
B22,501,IOPAD_X1Y127,PSS2_X32Y313,PS_MIO50_501
B24,500,IOPAD_X1Y26,PSS2_X32Y313,PS_CLK_500
B25,500,IOPAD_X1Y90,PSS2_X32Y313,PS_MIO13_500
B26,500,IOPAD_X1Y88,PSS2_X32Y313,PS_MIO11_500
C1,33,IOB_X1Y241,RIOB18_X107Y241,IO_L4N_T0_33
C2,34,IOB_X1Y254,RIOB18_X107Y253,IO_L23P_T3_34
C3,34,IOB_X1Y261,RIOB18_X107Y261,IO_L19N_T3_VREF_34
C4,34,IOB_X1Y262,RIOB18_X107Y261,IO_L19P_T3_34
C6,34,IOB_X1Y271,RIOB18_X107Y271,IO_L14N_T2_SRCC_34
C7,34,IOB_X1Y273,RIOB18_X107Y273,IO_L13N_T2_MRCC_34
C8,34,IOB_X1Y274,RIOB18_X107Y273,IO_L13P_T2_MRCC_34
C9,34,IOB_X1Y270,RIOB18_X107Y269,IO_L15P_T2_DQS_34
C11,35,IOB_X1Y304,RIOB18_X107Y303,IO_L23P_T3_35
C12,35,IOB_X1Y306,RIOB18_X107Y305,IO_L22P_T3_AD7P_35
C13,35,IOB_X1Y311,RIOB18_X107Y311,IO_L19N_T3_VREF_35
C14,35,IOB_X1Y310,RIOB18_X107Y309,IO_L20P_T3_AD6P_35
C16,35,IOB_X1Y319,RIOB18_X107Y319,IO_L15N_T2_DQS_AD12N_35
C17,35,IOB_X1Y320,RIOB18_X107Y319,IO_L15P_T2_DQS_AD12P_35
C18,501,IOPAD_X1Y122,PSS2_X32Y313,PS_MIO45_501
C19,501,IOPAD_X1Y118,PSS2_X32Y313,PS_MIO41_501
C21,501,IOPAD_X1Y116,PSS2_X32Y313,PS_MIO39_501
C22,501,IOPAD_X1Y117,PSS2_X32Y313,PS_MIO40_501
C23,500,IOPAD_X1Y132,PSS2_X32Y313,PS_POR_B_500
C24,500,IOPAD_X1Y92,PSS2_X32Y313,PS_MIO15_500
C26,500,IOPAD_X1Y82,PSS2_X32Y313,PS_MIO5_500
D1,33,IOB_X1Y242,RIOB18_X107Y241,IO_L4P_T0_33
D3,33,IOB_X1Y245,RIOB18_X107Y245,IO_L2N_T0_33
D4,33,IOB_X1Y246,RIOB18_X107Y245,IO_L2P_T0_33
D5,34,IOB_X1Y279,RIOB18_X107Y279,IO_L10N_T1_34
D6,34,IOB_X1Y272,RIOB18_X107Y271,IO_L14P_T2_SRCC_34
D8,34,IOB_X1Y283,RIOB18_X107Y283,IO_L8N_T1_34
D9,34,IOB_X1Y284,RIOB18_X107Y283,IO_L8P_T1_34
D10,35,IOB_X1Y345,RIOB18_X107Y345,IO_L2N_T0_AD8N_35
D11,35,IOB_X1Y341,RIOB18_X107Y341,IO_L4N_T0_35
D13,35,IOB_X1Y312,RIOB18_X107Y311,IO_L19P_T3_35
D14,35,IOB_X1Y323,RIOB18_X107Y323,IO_L13N_T2_MRCC_35
D15,35,IOB_X1Y324,RIOB18_X107Y323,IO_L13P_T2_MRCC_35
D16,35,IOB_X1Y317,RIOB18_X107Y317,IO_L16N_T2_35
D18,501,IOPAD_X1Y120,PSS2_X32Y313,PS_MIO43_501
D19,501,IOPAD_X1Y112,PSS2_X32Y313,PS_MIO35_501
D20,501,IOPAD_X1Y114,PSS2_X32Y313,PS_MIO37_501
D21,501,IOPAD_X1Y115,PSS2_X32Y313,PS_MIO38_501
D23,500,IOPAD_X1Y91,PSS2_X32Y313,PS_MIO14_500
D24,500,IOPAD_X1Y86,PSS2_X32Y313,PS_MIO9_500
D25,500,IOPAD_X1Y80,PSS2_X32Y313,PS_MIO3_500
D26,500,IOPAD_X1Y78,PSS2_X32Y313,PS_MIO1_500
E1,33,IOB_X1Y239,RIOB18_X107Y239,IO_L5N_T0_33
E2,33,IOB_X1Y240,RIOB18_X107Y239,IO_L5P_T0_33
E3,33,IOB_X1Y237,RIOB18_X107Y237,IO_L6N_T0_VREF_33
E5,34,IOB_X1Y285,RIOB18_X107Y285,IO_L7N_T1_34
E6,34,IOB_X1Y280,RIOB18_X107Y279,IO_L10P_T1_34
E7,34,IOB_X1Y277,RIOB18_X107Y277,IO_L11N_T1_SRCC_34
E8,34,IOB_X1Y281,RIOB18_X107Y281,IO_L9N_T1_DQS_34
E10,35,IOB_X1Y346,RIOB18_X107Y345,IO_L2P_T0_AD8P_35
E11,35,IOB_X1Y342,RIOB18_X107Y341,IO_L4P_T0_35
E12,35,IOB_X1Y347,RIOB18_X107Y347,IO_L1N_T0_AD0N_35
E13,35,IOB_X1Y337,RIOB18_X107Y337,IO_L6N_T0_VREF_35
E15,35,IOB_X1Y321,RIOB18_X107Y321,IO_L14N_T2_AD4N_SRCC_35
E16,35,IOB_X1Y318,RIOB18_X107Y317,IO_L16P_T2_35
E17,501,IOPAD_X1Y123,PSS2_X32Y313,PS_MIO46_501
E18,501,IOPAD_X1Y121,PSS2_X32Y313,PS_MIO44_501
E20,501,IOPAD_X1Y106,PSS2_X32Y313,PS_MIO29_501
E21,501,IOPAD_X1Y108,PSS2_X32Y313,PS_MIO31_501
E22,501,IOPAD_X1Y110,PSS2_X32Y313,PS_MIO33_501
E23,500,IOPAD_X1Y84,PSS2_X32Y313,PS_MIO7_500
E25,500,IOPAD_X1Y79,PSS2_X32Y313,PS_MIO2_500
E26,500,IOPAD_X1Y77,PSS2_X32Y313,PS_MIO0_500
F2,33,IOB_X1Y243,RIOB18_X107Y243,IO_L3N_T0_DQS_33
F3,33,IOB_X1Y238,RIOB18_X107Y237,IO_L6P_T0_33
F4,33,IOB_X1Y247,RIOB18_X107Y247,IO_L1N_T0_33
F5,34,IOB_X1Y286,RIOB18_X107Y285,IO_L7P_T1_34
F7,34,IOB_X1Y275,RIOB18_X107Y275,IO_L12N_T1_MRCC_34
F8,34,IOB_X1Y278,RIOB18_X107Y277,IO_L11P_T1_SRCC_34
F9,34,IOB_X1Y282,RIOB18_X107Y281,IO_L9P_T1_DQS_34
F10,35,IOB_X1Y343,RIOB18_X107Y343,IO_L3N_T0_DQS_AD1N_35
F12,35,IOB_X1Y348,RIOB18_X107Y347,IO_L1P_T0_AD0P_35
F13,35,IOB_X1Y338,RIOB18_X107Y337,IO_L6P_T0_35
F14,35,IOB_X1Y327,RIOB18_X107Y327,IO_L11N_T1_SRCC_35
F15,35,IOB_X1Y322,RIOB18_X107Y321,IO_L14P_T2_AD4P_SRCC_35
F17,501,IOPAD_X1Y119,PSS2_X32Y313,PS_MIO42_501
F18,501,IOPAD_X1Y104,PSS2_X32Y313,PS_MIO27_501
F19,501,IOPAD_X1Y102,PSS2_X32Y313,PS_MIO25_501
F20,501,IOPAD_X1Y100,PSS2_X32Y313,PS_MIO23_501
F22,501,IOPAD_X1Y98,PSS2_X32Y313,PS_MIO21_501
F23,500,IOPAD_X1Y83,PSS2_X32Y313,PS_MIO6_500
F24,500,IOPAD_X1Y81,PSS2_X32Y313,PS_MIO4_500
F25,502,IOPAD_X1Y33,PSS2_X32Y313,PS_DDR_DQ1_502
G1,33,IOB_X1Y229,RIOB18_X107Y229,IO_L10N_T1_33
G2,33,IOB_X1Y244,RIOB18_X107Y243,IO_L3P_T0_DQS_33
G4,33,IOB_X1Y248,RIOB18_X107Y247,IO_L1P_T0_33
G5,34,IOB_X1Y295,RIOB18_X107Y295,IO_L2N_T0_34
G6,34,IOB_X1Y296,RIOB18_X107Y295,IO_L2P_T0_34
G7,34,IOB_X1Y276,RIOB18_X107Y275,IO_L12P_T1_MRCC_34
G9,34,IOB_X1Y293,RIOB18_X107Y293,IO_L3N_T0_DQS_34
G10,35,IOB_X1Y344,RIOB18_X107Y343,IO_L3P_T0_DQS_AD1P_35
G11,35,IOB_X1Y339,RIOB18_X107Y339,IO_L5N_T0_AD9N_35
G12,35,IOB_X1Y340,RIOB18_X107Y339,IO_L5P_T0_AD9P_35
G14,35,IOB_X1Y328,RIOB18_X107Y327,IO_L11P_T1_SRCC_35
G15,35,IOB_X1Y329,RIOB18_X107Y329,IO_L10N_T1_AD11N_35
G16,35,IOB_X1Y330,RIOB18_X107Y329,IO_L10P_T1_AD11P_35
G17,501,IOPAD_X1Y94,PSS2_X32Y313,PS_MIO17_501
G19,501,IOPAD_X1Y96,PSS2_X32Y313,PS_MIO19_501
G20,501,IOPAD_X1Y95,PSS2_X32Y313,PS_MIO18_501
G21,501,IOPAD_X1Y93,PSS2_X32Y313,PS_MIO16_501
G22,501,IOPAD_X1Y99,PSS2_X32Y313,PS_MIO22_501
G24,502,IOPAD_X1Y28,PSS2_X32Y313,PS_DDR_DM0_502
G25,502,IOPAD_X1Y64,PSS2_X32Y313,PS_DDR_DQS_N0_502
G26,502,IOPAD_X1Y35,PSS2_X32Y313,PS_DDR_DQ3_502
H1,33,IOB_X1Y235,RIOB18_X107Y235,IO_L7N_T1_33
H2,33,IOB_X1Y230,RIOB18_X107Y229,IO_L10P_T1_33
H3,33,IOB_X1Y233,RIOB18_X107Y233,IO_L8N_T1_33
H4,33,IOB_X1Y234,RIOB18_X107Y233,IO_L8P_T1_33
H6,34,IOB_X1Y291,RIOB18_X107Y291,IO_L4N_T0_34
H7,34,IOB_X1Y292,RIOB18_X107Y291,IO_L4P_T0_34
H8,34,IOB_X1Y287,RIOB18_X107Y287,IO_L6N_T0_VREF_34
H9,34,IOB_X1Y294,RIOB18_X107Y293,IO_L3P_T0_DQS_PUDC_B_34
H11,34,IOB_X1Y297,RIOB18_X107Y297,IO_L1N_T0_34
H12,35,IOB_X1Y335,RIOB18_X107Y335,IO_L7N_T1_AD2N_35
H13,35,IOB_X1Y336,RIOB18_X107Y335,IO_L7P_T1_AD2P_35
H14,35,IOB_X1Y325,RIOB18_X107Y325,IO_L12N_T1_MRCC_35
H16,35,IOB_X1Y349,RIOB18_SING_X107Y349,IO_0_VRN_35
H17,501,IOPAD_X1Y103,PSS2_X32Y313,PS_MIO26_501
H19,501,IOPAD_X1Y97,PSS2_X32Y313,PS_MIO20_501
H21,502,IOPAD_X1Y15,PSS2_X32Y313,PS_DDR_A11_502
H22,502,IOPAD_X1Y72,PSS2_X32Y313,PS_DDR_DRST_B_502
H23,502,IOPAD_X1Y37,PSS2_X32Y313,PS_DDR_DQ5_502
H24,502,IOPAD_X1Y68,PSS2_X32Y313,PS_DDR_DQS_P0_502
H26,502,IOPAD_X1Y36,PSS2_X32Y313,PS_DDR_DQ4_502
J1,33,IOB_X1Y236,RIOB18_X107Y235,IO_L7P_T1_33
J3,33,IOB_X1Y225,RIOB18_X107Y225,IO_L12N_T1_MRCC_33
J4,33,IOB_X1Y226,RIOB18_X107Y225,IO_L12P_T1_MRCC_33
J5,33,IOB_X1Y209,RIOB18_X107Y209,IO_L20N_T3_33
J6,33,IOB_X1Y205,RIOB18_X107Y205,IO_L22N_T3_33
J8,34,IOB_X1Y288,RIOB18_X107Y287,IO_L6P_T0_34
J9,34,IOB_X1Y289,RIOB18_X107Y289,IO_L5N_T0_34
J10,34,IOB_X1Y290,RIOB18_X107Y289,IO_L5P_T0_34
J11,34,IOB_X1Y298,RIOB18_X107Y297,IO_L1P_T0_34
J13,35,IOB_X1Y333,RIOB18_X107Y333,IO_L8N_T1_AD10N_35
J14,35,IOB_X1Y326,RIOB18_X107Y325,IO_L12P_T1_MRCC_35
J15,35,IOB_X1Y331,RIOB18_X107Y331,IO_L9N_T1_DQS_AD3N_35
J16,501,IOPAD_X1Y111,PSS2_X32Y313,PS_MIO34_501
J18,501,IOPAD_X1Y105,PSS2_X32Y313,PS_MIO28_501
J19,501,IOPAD_X1Y101,PSS2_X32Y313,PS_MIO24_501
J20,502,IOPAD_X1Y18,PSS2_X32Y313,PS_DDR_A13_502
J21,502,IOPAD_X1Y11,PSS2_X32Y313,PS_DDR_A7_502
J23,502,IOPAD_X1Y39,PSS2_X32Y313,PS_DDR_DQ7_502
J24,502,IOPAD_X1Y38,PSS2_X32Y313,PS_DDR_DQ6_502
J25,502,IOPAD_X1Y34,PSS2_X32Y313,PS_DDR_DQ2_502
J26,502,IOPAD_X1Y32,PSS2_X32Y313,PS_DDR_DQ0_502
K1,33,IOB_X1Y231,RIOB18_X107Y231,IO_L9N_T1_DQS_33
K2,33,IOB_X1Y232,RIOB18_X107Y231,IO_L9P_T1_DQS_33
K3,33,IOB_X1Y227,RIOB18_X107Y227,IO_L11N_T1_SRCC_33
K5,33,IOB_X1Y210,RIOB18_X107Y209,IO_L20P_T3_33
K6,33,IOB_X1Y206,RIOB18_X107Y205,IO_L22P_T3_33
K7,33,IOB_X1Y201,RIOB18_X107Y201,IO_L24N_T3_33
K8,33,IOB_X1Y202,RIOB18_X107Y201,IO_L24P_T3_33
K10,34,IOB_X1Y250,RIOB18_SING_X107Y250,IO_25_VRP_34
K11,34,IOB_X1Y299,RIOB18_SING_X107Y299,IO_0_VRN_34
K12,35,IOB_X1Y300,RIOB18_SING_X107Y300,IO_25_VRP_35
K13,35,IOB_X1Y334,RIOB18_X107Y333,IO_L8P_T1_AD10P_35
K15,35,IOB_X1Y332,RIOB18_X107Y331,IO_L9P_T1_DQS_AD3P_35
K16,501,IOPAD_X1Y113,PSS2_X32Y313,PS_MIO36_501
K17,501,IOPAD_X1Y109,PSS2_X32Y313,PS_MIO32_501
K19,501,IOPAD_X1Y107,PSS2_X32Y313,PS_MIO30_501
K20,502,IOPAD_X1Y5,PSS2_X32Y313,PS_DDR_A1_502
K22,502,IOPAD_X1Y4,PSS2_X32Y313,PS_DDR_A0_502
K23,502,IOPAD_X1Y43,PSS2_X32Y313,PS_DDR_DQ11_502
K25,502,IOPAD_X1Y29,PSS2_X32Y313,PS_DDR_DM1_502
K26,502,IOPAD_X1Y40,PSS2_X32Y313,PS_DDR_DQ8_502
L2,33,IOB_X1Y217,RIOB18_X107Y217,IO_L16N_T2_33
L3,33,IOB_X1Y228,RIOB18_X107Y227,IO_L11P_T1_SRCC_33
L4,33,IOB_X1Y221,RIOB18_X107Y221,IO_L14N_T2_SRCC_33
L5,33,IOB_X1Y222,RIOB18_X107Y221,IO_L14P_T2_SRCC_33
L7,33,IOB_X1Y211,RIOB18_X107Y211,IO_L19N_T3_VREF_33
L8,33,IOB_X1Y207,RIOB18_X107Y207,IO_L21N_T3_DQS_33
L9,33,IOB_X1Y249,RIOB18_SING_X107Y249,IO_0_VRN_33
L20,502,IOPAD_X1Y10,PSS2_X32Y313,PS_DDR_A6_502
L22,502,IOPAD_X1Y7,PSS2_X32Y313,PS_DDR_A3_502
L23,502,IOPAD_X1Y41,PSS2_X32Y313,PS_DDR_DQ9_502
L24,502,IOPAD_X1Y69,PSS2_X32Y313,PS_DDR_DQS_P1_502
L25,502,IOPAD_X1Y65,PSS2_X32Y313,PS_DDR_DQS_N1_502
M1,33,IOB_X1Y213,RIOB18_X107Y213,IO_L18N_T2_33
M2,33,IOB_X1Y218,RIOB18_X107Y217,IO_L16P_T2_33
M4,33,IOB_X1Y215,RIOB18_X107Y215,IO_L17N_T2_33
M5,33,IOB_X1Y223,RIOB18_X107Y223,IO_L13N_T2_MRCC_33
M6,33,IOB_X1Y224,RIOB18_X107Y223,IO_L13P_T2_MRCC_33
M7,33,IOB_X1Y212,RIOB18_X107Y211,IO_L19P_T3_33
M8,33,IOB_X1Y208,RIOB18_X107Y207,IO_L21P_T3_DQS_33
M20,502,IOPAD_X1Y8,PSS2_X32Y313,PS_DDR_A4_502
M22,502,IOPAD_X1Y14,PSS2_X32Y313,PS_DDR_A10_502
M24,502,IOPAD_X1Y46,PSS2_X32Y313,PS_DDR_DQ14_502
M25,502,IOPAD_X1Y44,PSS2_X32Y313,PS_DDR_DQ12_502
M26,502,IOPAD_X1Y42,PSS2_X32Y313,PS_DDR_DQ10_502
N1,33,IOB_X1Y214,RIOB18_X107Y213,IO_L18P_T2_33
N2,33,IOB_X1Y219,RIOB18_X107Y219,IO_L15N_T2_DQS_33
N3,33,IOB_X1Y220,RIOB18_X107Y219,IO_L15P_T2_DQS_33
N4,33,IOB_X1Y216,RIOB18_X107Y215,IO_L17P_T2_33
N6,33,IOB_X1Y203,RIOB18_X107Y203,IO_L23N_T3_33
N7,33,IOB_X1Y204,RIOB18_X107Y203,IO_L23P_T3_33
N8,33,IOB_X1Y200,RIOB18_SING_X107Y200,IO_25_VRP_33
N14,0,IPAD_X0Y120,MONITOR_BOT_PELE1_X197Y339,VP_0
N21,502,IOPAD_X1Y6,PSS2_X32Y313,PS_DDR_A2_502
N22,502,IOPAD_X1Y9,PSS2_X32Y313,PS_DDR_A5_502
N23,502,IOPAD_X1Y47,PSS2_X32Y313,PS_DDR_DQ15_502
N24,502,IOPAD_X1Y45,PSS2_X32Y313,PS_DDR_DQ13_502
N26,502,IOPAD_X1Y50,PSS2_X32Y313,PS_DDR_DQ18_502
P13,0,IPAD_X0Y121,MONITOR_BOT_PELE1_X197Y339,VN_0
P20,502,IOPAD_X1Y16,PSS2_X32Y313,PS_DDR_A12_502
P21,502,IOPAD_X1Y24,PSS2_X32Y313,PS_DDR_CKN_502
P23,502,IOPAD_X1Y51,PSS2_X32Y313,PS_DDR_DQ19_502
P24,502,IOPAD_X1Y49,PSS2_X32Y313,PS_DDR_DQ17_502
P25,502,IOPAD_X1Y70,PSS2_X32Y313,PS_DDR_DQS_P2_502
P26,502,IOPAD_X1Y30,PSS2_X32Y313,PS_DDR_DM2_502
R1,112,OPAD_X0Y30,GTX_CHANNEL_3_X249Y202,MGTXTXN3_112
R2,112,OPAD_X0Y31,GTX_CHANNEL_3_X249Y202,MGTXTXP3_112
R5,112,IPAD_X1Y99,GTX_COMMON_X249Y179,MGTREFCLK0N_112
R6,112,IPAD_X1Y98,GTX_COMMON_X249Y179,MGTREFCLK0P_112
R20,502,IOPAD_X1Y17,PSS2_X32Y313,PS_DDR_A14_502
R21,502,IOPAD_X1Y25,PSS2_X32Y313,PS_DDR_CKP_502
R22,502,IOPAD_X1Y21,PSS2_X32Y313,PS_DDR_BA2_502
R23,502,IOPAD_X1Y55,PSS2_X32Y313,PS_DDR_DQ23_502
R25,502,IOPAD_X1Y66,PSS2_X32Y313,PS_DDR_DQS_N2_502
R26,502,IOPAD_X1Y48,PSS2_X32Y313,PS_DDR_DQ16_502
T3,112,IPAD_X1Y114,GTX_CHANNEL_3_X249Y202,MGTXRXN3_112
T4,112,IPAD_X1Y115,GTX_CHANNEL_3_X249Y202,MGTXRXP3_112
T20,502,IOPAD_X1Y12,PSS2_X32Y313,PS_DDR_A8_502
T22,502,IOPAD_X1Y20,PSS2_X32Y313,PS_DDR_BA1_502
T23,502,IOPAD_X1Y54,PSS2_X32Y313,PS_DDR_DQ22_502
T24,502,IOPAD_X1Y52,PSS2_X32Y313,PS_DDR_DQ20_502
T25,502,IOPAD_X1Y53,PSS2_X32Y313,PS_DDR_DQ21_502
U1,112,OPAD_X0Y28,GTX_CHANNEL_2_X249Y191,MGTXTXN2_112
U2,112,OPAD_X0Y29,GTX_CHANNEL_2_X249Y191,MGTXTXP2_112
U5,112,IPAD_X1Y101,GTX_COMMON_X249Y179,MGTREFCLK1N_112
U6,112,IPAD_X1Y100,GTX_COMMON_X249Y179,MGTREFCLK1P_112
U20,502,IOPAD_X1Y13,PSS2_X32Y313,PS_DDR_A9_502
U21,502,IOPAD_X1Y23,PSS2_X32Y313,PS_DDR_CKE_502
U22,502,IOPAD_X1Y19,PSS2_X32Y313,PS_DDR_BA0_502
U24,502,IOPAD_X1Y58,PSS2_X32Y313,PS_DDR_DQ26_502
U25,502,IOPAD_X1Y59,PSS2_X32Y313,PS_DDR_DQ27_502
U26,502,IOPAD_X1Y57,PSS2_X32Y313,PS_DDR_DQ25_502
V3,112,IPAD_X1Y108,GTX_CHANNEL_2_X249Y191,MGTXRXN2_112
V4,112,IPAD_X1Y109,GTX_CHANNEL_2_X249Y191,MGTXRXP2_112
V18,13,IOB_X0Y200,LIOB33_SING_X0Y200,IO_25_13
V19,13,IOB_X0Y249,LIOB33_SING_X0Y249,IO_0_13
V21,502,IOPAD_X1Y2,PSS2_X32Y313,PS_DDR_VRN_502
V22,502,IOPAD_X1Y1,PSS2_X32Y313,PS_DDR_WE_B_502
V23,502,IOPAD_X1Y133,PSS2_X32Y313,PS_DDR_RAS_B_502
V24,502,IOPAD_X1Y56,PSS2_X32Y313,PS_DDR_DQ24_502
V26,502,IOPAD_X1Y31,PSS2_X32Y313,PS_DDR_DM3_502
W1,112,OPAD_X0Y26,GTX_CHANNEL_1_X249Y173,MGTXTXN1_112
W2,112,OPAD_X0Y27,GTX_CHANNEL_1_X249Y173,MGTXTXP1_112
W5,111,IPAD_X1Y69,GTX_COMMON_X249Y127,MGTREFCLK0N_111
W6,111,IPAD_X1Y68,GTX_COMMON_X249Y127,MGTREFCLK0P_111
W13,12,IOB_X0Y190,LIOB33_X0Y189,IO_L5P_T0_12
W14,12,IOB_X0Y199,LIOB33_SING_X0Y199,IO_0_12
W15,12,IOB_X0Y151,LIOB33_X0Y151,IO_L24N_T3_12
W16,12,IOB_X0Y152,LIOB33_X0Y151,IO_L24P_T3_12
W17,12,IOB_X0Y150,LIOB33_SING_X0Y150,IO_25_12
W18,13,IOB_X0Y204,LIOB33_X0Y203,IO_L23P_T3_13
W19,13,IOB_X0Y203,LIOB33_X0Y203,IO_L23N_T3_13
W20,13,IOB_X0Y212,LIOB33_X0Y211,IO_L19P_T3_13
W21,502,IOPAD_X1Y3,PSS2_X32Y313,PS_DDR_VRP_502
W23,502,IOPAD_X1Y63,PSS2_X32Y313,PS_DDR_DQ31_502
W24,502,IOPAD_X1Y71,PSS2_X32Y313,PS_DDR_DQS_P3_502
W25,502,IOPAD_X1Y67,PSS2_X32Y313,PS_DDR_DQS_N3_502
W26,502,IOPAD_X1Y60,PSS2_X32Y313,PS_DDR_DQ28_502
Y3,112,IPAD_X1Y96,GTX_CHANNEL_1_X249Y173,MGTXRXN1_112
Y4,112,IPAD_X1Y97,GTX_CHANNEL_1_X249Y173,MGTXRXP1_112
Y10,12,IOB_X0Y194,LIOB33_X0Y193,IO_L3P_T0_DQS_12
Y11,12,IOB_X0Y197,LIOB33_X0Y197,IO_L1N_T0_12
Y12,12,IOB_X0Y198,LIOB33_X0Y197,IO_L1P_T0_12
Y13,12,IOB_X0Y189,LIOB33_X0Y189,IO_L5N_T0_12
Y15,12,IOB_X0Y153,LIOB33_X0Y153,IO_L23N_T3_12
Y16,12,IOB_X0Y154,LIOB33_X0Y153,IO_L23P_T3_12
Y17,12,IOB_X0Y162,LIOB33_X0Y161,IO_L19P_T3_12
Y18,13,IOB_X0Y202,LIOB33_X0Y201,IO_L24P_T3_13
Y20,13,IOB_X0Y211,LIOB33_X0Y211,IO_L19N_T3_VREF_13
Y21,502,IOPAD_X1Y27,PSS2_X32Y313,PS_DDR_CS_B_502
Y22,502,IOPAD_X1Y131,PSS2_X32Y313,PS_DDR_ODT_502
Y23,502,IOPAD_X1Y22,PSS2_X32Y313,PS_DDR_CAS_B_502
Y25,502,IOPAD_X1Y61,PSS2_X32Y313,PS_DDR_DQ29_502
Y26,502,IOPAD_X1Y62,PSS2_X32Y313,PS_DDR_DQ30_502
1 pin bank site tile pin_function
2 A2 34 IOB_X1Y251 RIOB18_X107Y251 IO_L24N_T3_34
3 A3 34 IOB_X1Y255 RIOB18_X107Y255 IO_L22N_T3_34
4 A4 34 IOB_X1Y256 RIOB18_X107Y255 IO_L22P_T3_34
5 A5 34 IOB_X1Y257 RIOB18_X107Y257 IO_L21N_T3_DQS_34
6 A7 34 IOB_X1Y263 RIOB18_X107Y263 IO_L18N_T2_34
7 A8 34 IOB_X1Y265 RIOB18_X107Y265 IO_L17N_T2_34
8 A9 34 IOB_X1Y266 RIOB18_X107Y265 IO_L17P_T2_34
9 A10 34 IOB_X1Y267 RIOB18_X107Y267 IO_L16N_T2_34
10 A12 35 IOB_X1Y301 RIOB18_X107Y301 IO_L24N_T3_AD15N_35
11 A13 35 IOB_X1Y302 RIOB18_X107Y301 IO_L24P_T3_AD15P_35
12 A14 35 IOB_X1Y307 RIOB18_X107Y307 IO_L21N_T3_DQS_AD14N_35
13 A15 35 IOB_X1Y308 RIOB18_X107Y307 IO_L21P_T3_DQS_AD14P_35
14 A17 35 IOB_X1Y313 RIOB18_X107Y313 IO_L18N_T2_AD13N_35
15 A18 501 IOPAD_X1Y126 PSS2_X32Y313 PS_MIO49_501
16 A19 501 IOPAD_X1Y130 PSS2_X32Y313 PS_MIO53_501
17 A20 501 IOPAD_X1Y129 PSS2_X32Y313 PS_MIO52_501
18 A22 501 IOPAD_X1Y134 PSS2_X32Y313 PS_SRST_B_501
19 A23 500 IOPAD_X1Y89 PSS2_X32Y313 PS_MIO12_500
20 A24 500 IOPAD_X1Y85 PSS2_X32Y313 PS_MIO8_500
21 A25 500 IOPAD_X1Y87 PSS2_X32Y313 PS_MIO10_500
22 AA1 112 OPAD_X0Y24 GTX_CHANNEL_0_X249Y162 MGTXTXN0_112
23 AA2 112 OPAD_X0Y25 GTX_CHANNEL_0_X249Y162 MGTXTXP0_112
24 AA5 111 IPAD_X1Y71 GTX_COMMON_X249Y127 MGTREFCLK1N_111
25 AA6 111 IPAD_X1Y70 GTX_COMMON_X249Y127 MGTREFCLK1P_111
26 AA10 12 IOB_X0Y193 LIOB33_X0Y193 IO_L3N_T0_DQS_12
27 AA12 12 IOB_X0Y187 LIOB33_X0Y187 IO_L6N_T0_VREF_12
28 AA13 12 IOB_X0Y188 LIOB33_X0Y187 IO_L6P_T0_12
29 AA14 12 IOB_X0Y155 LIOB33_X0Y155 IO_L22N_T3_12
30 AA15 12 IOB_X0Y156 LIOB33_X0Y155 IO_L22P_T3_12
31 AA17 12 IOB_X0Y161 LIOB33_X0Y161 IO_L19N_T3_VREF_12
32 AA18 13 IOB_X0Y201 LIOB33_X0Y201 IO_L24N_T3_13
33 AA19 13 IOB_X0Y206 LIOB33_X0Y205 IO_L22P_T3_13
34 AA20 13 IOB_X0Y210 LIOB33_X0Y209 IO_L20P_T3_13
35 AA22 13 IOB_X0Y230 LIOB33_X0Y229 IO_L10P_T1_13
36 AA23 13 IOB_X0Y229 LIOB33_X0Y229 IO_L10N_T1_13
37 AA24 13 IOB_X0Y238 LIOB33_X0Y237 IO_L6P_T0_13
38 AA25 13 IOB_X0Y248 LIOB33_X0Y247 IO_L1P_T0_13
39 AB3 112 IPAD_X1Y90 GTX_CHANNEL_0_X249Y162 MGTXRXN0_112
40 AB4 112 IPAD_X1Y91 GTX_CHANNEL_0_X249Y162 MGTXRXP0_112
41 AB10 12 IOB_X0Y191 LIOB33_X0Y191 IO_L4N_T0_12
42 AB11 12 IOB_X0Y192 LIOB33_X0Y191 IO_L4P_T0_12
43 AB12 12 IOB_X0Y196 LIOB33_X0Y195 IO_L2P_T0_12
44 AB14 12 IOB_X0Y171 LIOB33_X0Y171 IO_L14N_T2_SRCC_12
45 AB15 12 IOB_X0Y172 LIOB33_X0Y171 IO_L14P_T2_SRCC_12
46 AB16 12 IOB_X0Y159 LIOB33_X0Y159 IO_L20N_T3_12
47 AB17 12 IOB_X0Y160 LIOB33_X0Y159 IO_L20P_T3_12
48 AB19 13 IOB_X0Y205 LIOB33_X0Y205 IO_L22N_T3_13
49 AB20 13 IOB_X0Y209 LIOB33_X0Y209 IO_L20N_T3_13
50 AB21 13 IOB_X0Y232 LIOB33_X0Y231 IO_L9P_T1_DQS_13
51 AB22 13 IOB_X0Y231 LIOB33_X0Y231 IO_L9N_T1_DQS_13
52 AB24 13 IOB_X0Y237 LIOB33_X0Y237 IO_L6N_T0_VREF_13
53 AB25 13 IOB_X0Y247 LIOB33_X0Y247 IO_L1N_T0_13
54 AB26 13 IOB_X0Y246 LIOB33_X0Y245 IO_L2P_T0_13
55 AC1 111 OPAD_X0Y22 GTX_CHANNEL_3_X249Y150 MGTXTXN3_111
56 AC2 111 OPAD_X0Y23 GTX_CHANNEL_3_X249Y150 MGTXTXP3_111
57 AC5 111 IPAD_X1Y78 GTX_CHANNEL_2_X249Y139 MGTXRXN2_111
58 AC6 111 IPAD_X1Y79 GTX_CHANNEL_2_X249Y139 MGTXRXP2_111
59 AC11 12 IOB_X0Y195 LIOB33_X0Y195 IO_L2N_T0_12
60 AC12 12 IOB_X0Y178 LIOB33_X0Y177 IO_L11P_T1_SRCC_12
61 AC13 12 IOB_X0Y176 LIOB33_X0Y175 IO_L12P_T1_MRCC_12
62 AC14 12 IOB_X0Y174 LIOB33_X0Y173 IO_L13P_T2_MRCC_12
63 AC16 12 IOB_X0Y157 LIOB33_X0Y157 IO_L21N_T3_DQS_12
64 AC17 12 IOB_X0Y158 LIOB33_X0Y157 IO_L21P_T3_DQS_12
65 AC18 13 IOB_X0Y208 LIOB33_X0Y207 IO_L21P_T3_DQS_13
66 AC19 13 IOB_X0Y207 LIOB33_X0Y207 IO_L21N_T3_DQS_13
67 AC21 13 IOB_X0Y222 LIOB33_X0Y221 IO_L14P_T2_SRCC_13
68 AC22 13 IOB_X0Y221 LIOB33_X0Y221 IO_L14N_T2_SRCC_13
69 AC23 13 IOB_X0Y226 LIOB33_X0Y225 IO_L12P_T1_MRCC_13
70 AC24 13 IOB_X0Y225 LIOB33_X0Y225 IO_L12N_T1_MRCC_13
71 AC26 13 IOB_X0Y245 LIOB33_X0Y245 IO_L2N_T0_13
72 AD3 111 IPAD_X1Y84 GTX_CHANNEL_3_X249Y150 MGTXRXN3_111
73 AD4 111 IPAD_X1Y85 GTX_CHANNEL_3_X249Y150 MGTXRXP3_111
74 AD7 111 IPAD_X1Y60 GTX_CHANNEL_0_X249Y110 MGTXRXN0_111
75 AD8 111 IPAD_X1Y61 GTX_CHANNEL_0_X249Y110 MGTXRXP0_111
76 AD10 12 IOB_X0Y185 LIOB33_X0Y185 IO_L7N_T1_12
77 AD11 12 IOB_X0Y177 LIOB33_X0Y177 IO_L11N_T1_SRCC_12
78 AD13 12 IOB_X0Y175 LIOB33_X0Y175 IO_L12N_T1_MRCC_12
79 AD14 12 IOB_X0Y173 LIOB33_X0Y173 IO_L13N_T2_MRCC_12
80 AD15 12 IOB_X0Y169 LIOB33_X0Y169 IO_L15N_T2_DQS_12
81 AD16 12 IOB_X0Y170 LIOB33_X0Y169 IO_L15P_T2_DQS_12
82 AD18 13 IOB_X0Y216 LIOB33_X0Y215 IO_L17P_T2_13
83 AD19 13 IOB_X0Y215 LIOB33_X0Y215 IO_L17N_T2_13
84 AD20 13 IOB_X0Y224 LIOB33_X0Y223 IO_L13P_T2_MRCC_13
85 AD21 13 IOB_X0Y223 LIOB33_X0Y223 IO_L13N_T2_MRCC_13
86 AD23 13 IOB_X0Y228 LIOB33_X0Y227 IO_L11P_T1_SRCC_13
87 AD24 13 IOB_X0Y227 LIOB33_X0Y227 IO_L11N_T1_SRCC_13
88 AD25 13 IOB_X0Y242 LIOB33_X0Y241 IO_L4P_T0_13
89 AD26 13 IOB_X0Y241 LIOB33_X0Y241 IO_L4N_T0_13
90 AE1 111 OPAD_X0Y20 GTX_CHANNEL_2_X249Y139 MGTXTXN2_111
91 AE2 111 OPAD_X0Y21 GTX_CHANNEL_2_X249Y139 MGTXTXP2_111
92 AE5 111 IPAD_X1Y66 GTX_CHANNEL_1_X249Y121 MGTXRXN1_111
93 AE6 111 IPAD_X1Y67 GTX_CHANNEL_1_X249Y121 MGTXRXP1_111
94 AE10 12 IOB_X0Y186 LIOB33_X0Y185 IO_L7P_T1_12
95 AE11 12 IOB_X0Y182 LIOB33_X0Y181 IO_L9P_T1_DQS_12
96 AE12 12 IOB_X0Y184 LIOB33_X0Y183 IO_L8P_T1_12
97 AE13 12 IOB_X0Y180 LIOB33_X0Y179 IO_L10P_T1_12
98 AE15 12 IOB_X0Y165 LIOB33_X0Y165 IO_L17N_T2_12
99 AE16 12 IOB_X0Y166 LIOB33_X0Y165 IO_L17P_T2_12
100 AE17 12 IOB_X0Y164 LIOB33_X0Y163 IO_L18P_T2_12
101 AE18 13 IOB_X0Y214 LIOB33_X0Y213 IO_L18P_T2_13
102 AE20 13 IOB_X0Y218 LIOB33_X0Y217 IO_L16P_T2_13
103 AE21 13 IOB_X0Y217 LIOB33_X0Y217 IO_L16N_T2_13
104 AE22 13 IOB_X0Y236 LIOB33_X0Y235 IO_L7P_T1_13
105 AE23 13 IOB_X0Y234 LIOB33_X0Y233 IO_L8P_T1_13
106 AE25 13 IOB_X0Y244 LIOB33_X0Y243 IO_L3P_T0_DQS_13
107 AE26 13 IOB_X0Y243 LIOB33_X0Y243 IO_L3N_T0_DQS_13
108 AF3 111 OPAD_X0Y18 GTX_CHANNEL_1_X249Y121 MGTXTXN1_111
109 AF4 111 OPAD_X0Y19 GTX_CHANNEL_1_X249Y121 MGTXTXP1_111
110 AF7 111 OPAD_X0Y16 GTX_CHANNEL_0_X249Y110 MGTXTXN0_111
111 AF8 111 OPAD_X0Y17 GTX_CHANNEL_0_X249Y110 MGTXTXP0_111
112 AF10 12 IOB_X0Y181 LIOB33_X0Y181 IO_L9N_T1_DQS_12
113 AF12 12 IOB_X0Y183 LIOB33_X0Y183 IO_L8N_T1_12
114 AF13 12 IOB_X0Y179 LIOB33_X0Y179 IO_L10N_T1_12
115 AF14 12 IOB_X0Y167 LIOB33_X0Y167 IO_L16N_T2_12
116 AF15 12 IOB_X0Y168 LIOB33_X0Y167 IO_L16P_T2_12
117 AF17 12 IOB_X0Y163 LIOB33_X0Y163 IO_L18N_T2_12
118 AF18 13 IOB_X0Y213 LIOB33_X0Y213 IO_L18N_T2_13
119 AF19 13 IOB_X0Y220 LIOB33_X0Y219 IO_L15P_T2_DQS_13
120 AF20 13 IOB_X0Y219 LIOB33_X0Y219 IO_L15N_T2_DQS_13
121 AF22 13 IOB_X0Y235 LIOB33_X0Y235 IO_L7N_T1_13
122 AF23 13 IOB_X0Y233 LIOB33_X0Y233 IO_L8N_T1_13
123 AF24 13 IOB_X0Y240 LIOB33_X0Y239 IO_L5P_T0_13
124 AF25 13 IOB_X0Y239 LIOB33_X0Y239 IO_L5N_T0_13
125 B1 34 IOB_X1Y253 RIOB18_X107Y253 IO_L23N_T3_34
126 B2 34 IOB_X1Y252 RIOB18_X107Y251 IO_L24P_T3_34
127 B4 34 IOB_X1Y259 RIOB18_X107Y259 IO_L20N_T3_34
128 B5 34 IOB_X1Y260 RIOB18_X107Y259 IO_L20P_T3_34
129 B6 34 IOB_X1Y258 RIOB18_X107Y257 IO_L21P_T3_DQS_34
130 B7 34 IOB_X1Y264 RIOB18_X107Y263 IO_L18P_T2_34
131 B9 34 IOB_X1Y269 RIOB18_X107Y269 IO_L15N_T2_DQS_34
132 B10 34 IOB_X1Y268 RIOB18_X107Y267 IO_L16P_T2_34
133 B11 35 IOB_X1Y303 RIOB18_X107Y303 IO_L23N_T3_35
134 B12 35 IOB_X1Y305 RIOB18_X107Y305 IO_L22N_T3_AD7N_35
135 B14 35 IOB_X1Y309 RIOB18_X107Y309 IO_L20N_T3_AD6N_35
136 B15 35 IOB_X1Y315 RIOB18_X107Y315 IO_L17N_T2_AD5N_35
137 B16 35 IOB_X1Y316 RIOB18_X107Y315 IO_L17P_T2_AD5P_35
138 B17 35 IOB_X1Y314 RIOB18_X107Y313 IO_L18P_T2_AD13P_35
139 B19 501 IOPAD_X1Y124 PSS2_X32Y313 PS_MIO47_501
140 B20 501 IOPAD_X1Y128 PSS2_X32Y313 PS_MIO51_501
141 B21 501 IOPAD_X1Y125 PSS2_X32Y313 PS_MIO48_501
142 B22 501 IOPAD_X1Y127 PSS2_X32Y313 PS_MIO50_501
143 B24 500 IOPAD_X1Y26 PSS2_X32Y313 PS_CLK_500
144 B25 500 IOPAD_X1Y90 PSS2_X32Y313 PS_MIO13_500
145 B26 500 IOPAD_X1Y88 PSS2_X32Y313 PS_MIO11_500
146 C1 33 IOB_X1Y241 RIOB18_X107Y241 IO_L4N_T0_33
147 C2 34 IOB_X1Y254 RIOB18_X107Y253 IO_L23P_T3_34
148 C3 34 IOB_X1Y261 RIOB18_X107Y261 IO_L19N_T3_VREF_34
149 C4 34 IOB_X1Y262 RIOB18_X107Y261 IO_L19P_T3_34
150 C6 34 IOB_X1Y271 RIOB18_X107Y271 IO_L14N_T2_SRCC_34
151 C7 34 IOB_X1Y273 RIOB18_X107Y273 IO_L13N_T2_MRCC_34
152 C8 34 IOB_X1Y274 RIOB18_X107Y273 IO_L13P_T2_MRCC_34
153 C9 34 IOB_X1Y270 RIOB18_X107Y269 IO_L15P_T2_DQS_34
154 C11 35 IOB_X1Y304 RIOB18_X107Y303 IO_L23P_T3_35
155 C12 35 IOB_X1Y306 RIOB18_X107Y305 IO_L22P_T3_AD7P_35
156 C13 35 IOB_X1Y311 RIOB18_X107Y311 IO_L19N_T3_VREF_35
157 C14 35 IOB_X1Y310 RIOB18_X107Y309 IO_L20P_T3_AD6P_35
158 C16 35 IOB_X1Y319 RIOB18_X107Y319 IO_L15N_T2_DQS_AD12N_35
159 C17 35 IOB_X1Y320 RIOB18_X107Y319 IO_L15P_T2_DQS_AD12P_35
160 C18 501 IOPAD_X1Y122 PSS2_X32Y313 PS_MIO45_501
161 C19 501 IOPAD_X1Y118 PSS2_X32Y313 PS_MIO41_501
162 C21 501 IOPAD_X1Y116 PSS2_X32Y313 PS_MIO39_501
163 C22 501 IOPAD_X1Y117 PSS2_X32Y313 PS_MIO40_501
164 C23 500 IOPAD_X1Y132 PSS2_X32Y313 PS_POR_B_500
165 C24 500 IOPAD_X1Y92 PSS2_X32Y313 PS_MIO15_500
166 C26 500 IOPAD_X1Y82 PSS2_X32Y313 PS_MIO5_500
167 D1 33 IOB_X1Y242 RIOB18_X107Y241 IO_L4P_T0_33
168 D3 33 IOB_X1Y245 RIOB18_X107Y245 IO_L2N_T0_33
169 D4 33 IOB_X1Y246 RIOB18_X107Y245 IO_L2P_T0_33
170 D5 34 IOB_X1Y279 RIOB18_X107Y279 IO_L10N_T1_34
171 D6 34 IOB_X1Y272 RIOB18_X107Y271 IO_L14P_T2_SRCC_34
172 D8 34 IOB_X1Y283 RIOB18_X107Y283 IO_L8N_T1_34
173 D9 34 IOB_X1Y284 RIOB18_X107Y283 IO_L8P_T1_34
174 D10 35 IOB_X1Y345 RIOB18_X107Y345 IO_L2N_T0_AD8N_35
175 D11 35 IOB_X1Y341 RIOB18_X107Y341 IO_L4N_T0_35
176 D13 35 IOB_X1Y312 RIOB18_X107Y311 IO_L19P_T3_35
177 D14 35 IOB_X1Y323 RIOB18_X107Y323 IO_L13N_T2_MRCC_35
178 D15 35 IOB_X1Y324 RIOB18_X107Y323 IO_L13P_T2_MRCC_35
179 D16 35 IOB_X1Y317 RIOB18_X107Y317 IO_L16N_T2_35
180 D18 501 IOPAD_X1Y120 PSS2_X32Y313 PS_MIO43_501
181 D19 501 IOPAD_X1Y112 PSS2_X32Y313 PS_MIO35_501
182 D20 501 IOPAD_X1Y114 PSS2_X32Y313 PS_MIO37_501
183 D21 501 IOPAD_X1Y115 PSS2_X32Y313 PS_MIO38_501
184 D23 500 IOPAD_X1Y91 PSS2_X32Y313 PS_MIO14_500
185 D24 500 IOPAD_X1Y86 PSS2_X32Y313 PS_MIO9_500
186 D25 500 IOPAD_X1Y80 PSS2_X32Y313 PS_MIO3_500
187 D26 500 IOPAD_X1Y78 PSS2_X32Y313 PS_MIO1_500
188 E1 33 IOB_X1Y239 RIOB18_X107Y239 IO_L5N_T0_33
189 E2 33 IOB_X1Y240 RIOB18_X107Y239 IO_L5P_T0_33
190 E3 33 IOB_X1Y237 RIOB18_X107Y237 IO_L6N_T0_VREF_33
191 E5 34 IOB_X1Y285 RIOB18_X107Y285 IO_L7N_T1_34
192 E6 34 IOB_X1Y280 RIOB18_X107Y279 IO_L10P_T1_34
193 E7 34 IOB_X1Y277 RIOB18_X107Y277 IO_L11N_T1_SRCC_34
194 E8 34 IOB_X1Y281 RIOB18_X107Y281 IO_L9N_T1_DQS_34
195 E10 35 IOB_X1Y346 RIOB18_X107Y345 IO_L2P_T0_AD8P_35
196 E11 35 IOB_X1Y342 RIOB18_X107Y341 IO_L4P_T0_35
197 E12 35 IOB_X1Y347 RIOB18_X107Y347 IO_L1N_T0_AD0N_35
198 E13 35 IOB_X1Y337 RIOB18_X107Y337 IO_L6N_T0_VREF_35
199 E15 35 IOB_X1Y321 RIOB18_X107Y321 IO_L14N_T2_AD4N_SRCC_35
200 E16 35 IOB_X1Y318 RIOB18_X107Y317 IO_L16P_T2_35
201 E17 501 IOPAD_X1Y123 PSS2_X32Y313 PS_MIO46_501
202 E18 501 IOPAD_X1Y121 PSS2_X32Y313 PS_MIO44_501
203 E20 501 IOPAD_X1Y106 PSS2_X32Y313 PS_MIO29_501
204 E21 501 IOPAD_X1Y108 PSS2_X32Y313 PS_MIO31_501
205 E22 501 IOPAD_X1Y110 PSS2_X32Y313 PS_MIO33_501
206 E23 500 IOPAD_X1Y84 PSS2_X32Y313 PS_MIO7_500
207 E25 500 IOPAD_X1Y79 PSS2_X32Y313 PS_MIO2_500
208 E26 500 IOPAD_X1Y77 PSS2_X32Y313 PS_MIO0_500
209 F2 33 IOB_X1Y243 RIOB18_X107Y243 IO_L3N_T0_DQS_33
210 F3 33 IOB_X1Y238 RIOB18_X107Y237 IO_L6P_T0_33
211 F4 33 IOB_X1Y247 RIOB18_X107Y247 IO_L1N_T0_33
212 F5 34 IOB_X1Y286 RIOB18_X107Y285 IO_L7P_T1_34
213 F7 34 IOB_X1Y275 RIOB18_X107Y275 IO_L12N_T1_MRCC_34
214 F8 34 IOB_X1Y278 RIOB18_X107Y277 IO_L11P_T1_SRCC_34
215 F9 34 IOB_X1Y282 RIOB18_X107Y281 IO_L9P_T1_DQS_34
216 F10 35 IOB_X1Y343 RIOB18_X107Y343 IO_L3N_T0_DQS_AD1N_35
217 F12 35 IOB_X1Y348 RIOB18_X107Y347 IO_L1P_T0_AD0P_35
218 F13 35 IOB_X1Y338 RIOB18_X107Y337 IO_L6P_T0_35
219 F14 35 IOB_X1Y327 RIOB18_X107Y327 IO_L11N_T1_SRCC_35
220 F15 35 IOB_X1Y322 RIOB18_X107Y321 IO_L14P_T2_AD4P_SRCC_35
221 F17 501 IOPAD_X1Y119 PSS2_X32Y313 PS_MIO42_501
222 F18 501 IOPAD_X1Y104 PSS2_X32Y313 PS_MIO27_501
223 F19 501 IOPAD_X1Y102 PSS2_X32Y313 PS_MIO25_501
224 F20 501 IOPAD_X1Y100 PSS2_X32Y313 PS_MIO23_501
225 F22 501 IOPAD_X1Y98 PSS2_X32Y313 PS_MIO21_501
226 F23 500 IOPAD_X1Y83 PSS2_X32Y313 PS_MIO6_500
227 F24 500 IOPAD_X1Y81 PSS2_X32Y313 PS_MIO4_500
228 F25 502 IOPAD_X1Y33 PSS2_X32Y313 PS_DDR_DQ1_502
229 G1 33 IOB_X1Y229 RIOB18_X107Y229 IO_L10N_T1_33
230 G2 33 IOB_X1Y244 RIOB18_X107Y243 IO_L3P_T0_DQS_33
231 G4 33 IOB_X1Y248 RIOB18_X107Y247 IO_L1P_T0_33
232 G5 34 IOB_X1Y295 RIOB18_X107Y295 IO_L2N_T0_34
233 G6 34 IOB_X1Y296 RIOB18_X107Y295 IO_L2P_T0_34
234 G7 34 IOB_X1Y276 RIOB18_X107Y275 IO_L12P_T1_MRCC_34
235 G9 34 IOB_X1Y293 RIOB18_X107Y293 IO_L3N_T0_DQS_34
236 G10 35 IOB_X1Y344 RIOB18_X107Y343 IO_L3P_T0_DQS_AD1P_35
237 G11 35 IOB_X1Y339 RIOB18_X107Y339 IO_L5N_T0_AD9N_35
238 G12 35 IOB_X1Y340 RIOB18_X107Y339 IO_L5P_T0_AD9P_35
239 G14 35 IOB_X1Y328 RIOB18_X107Y327 IO_L11P_T1_SRCC_35
240 G15 35 IOB_X1Y329 RIOB18_X107Y329 IO_L10N_T1_AD11N_35
241 G16 35 IOB_X1Y330 RIOB18_X107Y329 IO_L10P_T1_AD11P_35
242 G17 501 IOPAD_X1Y94 PSS2_X32Y313 PS_MIO17_501
243 G19 501 IOPAD_X1Y96 PSS2_X32Y313 PS_MIO19_501
244 G20 501 IOPAD_X1Y95 PSS2_X32Y313 PS_MIO18_501
245 G21 501 IOPAD_X1Y93 PSS2_X32Y313 PS_MIO16_501
246 G22 501 IOPAD_X1Y99 PSS2_X32Y313 PS_MIO22_501
247 G24 502 IOPAD_X1Y28 PSS2_X32Y313 PS_DDR_DM0_502
248 G25 502 IOPAD_X1Y64 PSS2_X32Y313 PS_DDR_DQS_N0_502
249 G26 502 IOPAD_X1Y35 PSS2_X32Y313 PS_DDR_DQ3_502
250 H1 33 IOB_X1Y235 RIOB18_X107Y235 IO_L7N_T1_33
251 H2 33 IOB_X1Y230 RIOB18_X107Y229 IO_L10P_T1_33
252 H3 33 IOB_X1Y233 RIOB18_X107Y233 IO_L8N_T1_33
253 H4 33 IOB_X1Y234 RIOB18_X107Y233 IO_L8P_T1_33
254 H6 34 IOB_X1Y291 RIOB18_X107Y291 IO_L4N_T0_34
255 H7 34 IOB_X1Y292 RIOB18_X107Y291 IO_L4P_T0_34
256 H8 34 IOB_X1Y287 RIOB18_X107Y287 IO_L6N_T0_VREF_34
257 H9 34 IOB_X1Y294 RIOB18_X107Y293 IO_L3P_T0_DQS_PUDC_B_34
258 H11 34 IOB_X1Y297 RIOB18_X107Y297 IO_L1N_T0_34
259 H12 35 IOB_X1Y335 RIOB18_X107Y335 IO_L7N_T1_AD2N_35
260 H13 35 IOB_X1Y336 RIOB18_X107Y335 IO_L7P_T1_AD2P_35
261 H14 35 IOB_X1Y325 RIOB18_X107Y325 IO_L12N_T1_MRCC_35
262 H16 35 IOB_X1Y349 RIOB18_SING_X107Y349 IO_0_VRN_35
263 H17 501 IOPAD_X1Y103 PSS2_X32Y313 PS_MIO26_501
264 H19 501 IOPAD_X1Y97 PSS2_X32Y313 PS_MIO20_501
265 H21 502 IOPAD_X1Y15 PSS2_X32Y313 PS_DDR_A11_502
266 H22 502 IOPAD_X1Y72 PSS2_X32Y313 PS_DDR_DRST_B_502
267 H23 502 IOPAD_X1Y37 PSS2_X32Y313 PS_DDR_DQ5_502
268 H24 502 IOPAD_X1Y68 PSS2_X32Y313 PS_DDR_DQS_P0_502
269 H26 502 IOPAD_X1Y36 PSS2_X32Y313 PS_DDR_DQ4_502
270 J1 33 IOB_X1Y236 RIOB18_X107Y235 IO_L7P_T1_33
271 J3 33 IOB_X1Y225 RIOB18_X107Y225 IO_L12N_T1_MRCC_33
272 J4 33 IOB_X1Y226 RIOB18_X107Y225 IO_L12P_T1_MRCC_33
273 J5 33 IOB_X1Y209 RIOB18_X107Y209 IO_L20N_T3_33
274 J6 33 IOB_X1Y205 RIOB18_X107Y205 IO_L22N_T3_33
275 J8 34 IOB_X1Y288 RIOB18_X107Y287 IO_L6P_T0_34
276 J9 34 IOB_X1Y289 RIOB18_X107Y289 IO_L5N_T0_34
277 J10 34 IOB_X1Y290 RIOB18_X107Y289 IO_L5P_T0_34
278 J11 34 IOB_X1Y298 RIOB18_X107Y297 IO_L1P_T0_34
279 J13 35 IOB_X1Y333 RIOB18_X107Y333 IO_L8N_T1_AD10N_35
280 J14 35 IOB_X1Y326 RIOB18_X107Y325 IO_L12P_T1_MRCC_35
281 J15 35 IOB_X1Y331 RIOB18_X107Y331 IO_L9N_T1_DQS_AD3N_35
282 J16 501 IOPAD_X1Y111 PSS2_X32Y313 PS_MIO34_501
283 J18 501 IOPAD_X1Y105 PSS2_X32Y313 PS_MIO28_501
284 J19 501 IOPAD_X1Y101 PSS2_X32Y313 PS_MIO24_501
285 J20 502 IOPAD_X1Y18 PSS2_X32Y313 PS_DDR_A13_502
286 J21 502 IOPAD_X1Y11 PSS2_X32Y313 PS_DDR_A7_502
287 J23 502 IOPAD_X1Y39 PSS2_X32Y313 PS_DDR_DQ7_502
288 J24 502 IOPAD_X1Y38 PSS2_X32Y313 PS_DDR_DQ6_502
289 J25 502 IOPAD_X1Y34 PSS2_X32Y313 PS_DDR_DQ2_502
290 J26 502 IOPAD_X1Y32 PSS2_X32Y313 PS_DDR_DQ0_502
291 K1 33 IOB_X1Y231 RIOB18_X107Y231 IO_L9N_T1_DQS_33
292 K2 33 IOB_X1Y232 RIOB18_X107Y231 IO_L9P_T1_DQS_33
293 K3 33 IOB_X1Y227 RIOB18_X107Y227 IO_L11N_T1_SRCC_33
294 K5 33 IOB_X1Y210 RIOB18_X107Y209 IO_L20P_T3_33
295 K6 33 IOB_X1Y206 RIOB18_X107Y205 IO_L22P_T3_33
296 K7 33 IOB_X1Y201 RIOB18_X107Y201 IO_L24N_T3_33
297 K8 33 IOB_X1Y202 RIOB18_X107Y201 IO_L24P_T3_33
298 K10 34 IOB_X1Y250 RIOB18_SING_X107Y250 IO_25_VRP_34
299 K11 34 IOB_X1Y299 RIOB18_SING_X107Y299 IO_0_VRN_34
300 K12 35 IOB_X1Y300 RIOB18_SING_X107Y300 IO_25_VRP_35
301 K13 35 IOB_X1Y334 RIOB18_X107Y333 IO_L8P_T1_AD10P_35
302 K15 35 IOB_X1Y332 RIOB18_X107Y331 IO_L9P_T1_DQS_AD3P_35
303 K16 501 IOPAD_X1Y113 PSS2_X32Y313 PS_MIO36_501
304 K17 501 IOPAD_X1Y109 PSS2_X32Y313 PS_MIO32_501
305 K19 501 IOPAD_X1Y107 PSS2_X32Y313 PS_MIO30_501
306 K20 502 IOPAD_X1Y5 PSS2_X32Y313 PS_DDR_A1_502
307 K22 502 IOPAD_X1Y4 PSS2_X32Y313 PS_DDR_A0_502
308 K23 502 IOPAD_X1Y43 PSS2_X32Y313 PS_DDR_DQ11_502
309 K25 502 IOPAD_X1Y29 PSS2_X32Y313 PS_DDR_DM1_502
310 K26 502 IOPAD_X1Y40 PSS2_X32Y313 PS_DDR_DQ8_502
311 L2 33 IOB_X1Y217 RIOB18_X107Y217 IO_L16N_T2_33
312 L3 33 IOB_X1Y228 RIOB18_X107Y227 IO_L11P_T1_SRCC_33
313 L4 33 IOB_X1Y221 RIOB18_X107Y221 IO_L14N_T2_SRCC_33
314 L5 33 IOB_X1Y222 RIOB18_X107Y221 IO_L14P_T2_SRCC_33
315 L7 33 IOB_X1Y211 RIOB18_X107Y211 IO_L19N_T3_VREF_33
316 L8 33 IOB_X1Y207 RIOB18_X107Y207 IO_L21N_T3_DQS_33
317 L9 33 IOB_X1Y249 RIOB18_SING_X107Y249 IO_0_VRN_33
318 L20 502 IOPAD_X1Y10 PSS2_X32Y313 PS_DDR_A6_502
319 L22 502 IOPAD_X1Y7 PSS2_X32Y313 PS_DDR_A3_502
320 L23 502 IOPAD_X1Y41 PSS2_X32Y313 PS_DDR_DQ9_502
321 L24 502 IOPAD_X1Y69 PSS2_X32Y313 PS_DDR_DQS_P1_502
322 L25 502 IOPAD_X1Y65 PSS2_X32Y313 PS_DDR_DQS_N1_502
323 M1 33 IOB_X1Y213 RIOB18_X107Y213 IO_L18N_T2_33
324 M2 33 IOB_X1Y218 RIOB18_X107Y217 IO_L16P_T2_33
325 M4 33 IOB_X1Y215 RIOB18_X107Y215 IO_L17N_T2_33
326 M5 33 IOB_X1Y223 RIOB18_X107Y223 IO_L13N_T2_MRCC_33
327 M6 33 IOB_X1Y224 RIOB18_X107Y223 IO_L13P_T2_MRCC_33
328 M7 33 IOB_X1Y212 RIOB18_X107Y211 IO_L19P_T3_33
329 M8 33 IOB_X1Y208 RIOB18_X107Y207 IO_L21P_T3_DQS_33
330 M20 502 IOPAD_X1Y8 PSS2_X32Y313 PS_DDR_A4_502
331 M22 502 IOPAD_X1Y14 PSS2_X32Y313 PS_DDR_A10_502
332 M24 502 IOPAD_X1Y46 PSS2_X32Y313 PS_DDR_DQ14_502
333 M25 502 IOPAD_X1Y44 PSS2_X32Y313 PS_DDR_DQ12_502
334 M26 502 IOPAD_X1Y42 PSS2_X32Y313 PS_DDR_DQ10_502
335 N1 33 IOB_X1Y214 RIOB18_X107Y213 IO_L18P_T2_33
336 N2 33 IOB_X1Y219 RIOB18_X107Y219 IO_L15N_T2_DQS_33
337 N3 33 IOB_X1Y220 RIOB18_X107Y219 IO_L15P_T2_DQS_33
338 N4 33 IOB_X1Y216 RIOB18_X107Y215 IO_L17P_T2_33
339 N6 33 IOB_X1Y203 RIOB18_X107Y203 IO_L23N_T3_33
340 N7 33 IOB_X1Y204 RIOB18_X107Y203 IO_L23P_T3_33
341 N8 33 IOB_X1Y200 RIOB18_SING_X107Y200 IO_25_VRP_33
342 N14 0 IPAD_X0Y120 MONITOR_BOT_PELE1_X197Y339 VP_0
343 N21 502 IOPAD_X1Y6 PSS2_X32Y313 PS_DDR_A2_502
344 N22 502 IOPAD_X1Y9 PSS2_X32Y313 PS_DDR_A5_502
345 N23 502 IOPAD_X1Y47 PSS2_X32Y313 PS_DDR_DQ15_502
346 N24 502 IOPAD_X1Y45 PSS2_X32Y313 PS_DDR_DQ13_502
347 N26 502 IOPAD_X1Y50 PSS2_X32Y313 PS_DDR_DQ18_502
348 P13 0 IPAD_X0Y121 MONITOR_BOT_PELE1_X197Y339 VN_0
349 P20 502 IOPAD_X1Y16 PSS2_X32Y313 PS_DDR_A12_502
350 P21 502 IOPAD_X1Y24 PSS2_X32Y313 PS_DDR_CKN_502
351 P23 502 IOPAD_X1Y51 PSS2_X32Y313 PS_DDR_DQ19_502
352 P24 502 IOPAD_X1Y49 PSS2_X32Y313 PS_DDR_DQ17_502
353 P25 502 IOPAD_X1Y70 PSS2_X32Y313 PS_DDR_DQS_P2_502
354 P26 502 IOPAD_X1Y30 PSS2_X32Y313 PS_DDR_DM2_502
355 R1 112 OPAD_X0Y30 GTX_CHANNEL_3_X249Y202 MGTXTXN3_112
356 R2 112 OPAD_X0Y31 GTX_CHANNEL_3_X249Y202 MGTXTXP3_112
357 R5 112 IPAD_X1Y99 GTX_COMMON_X249Y179 MGTREFCLK0N_112
358 R6 112 IPAD_X1Y98 GTX_COMMON_X249Y179 MGTREFCLK0P_112
359 R20 502 IOPAD_X1Y17 PSS2_X32Y313 PS_DDR_A14_502
360 R21 502 IOPAD_X1Y25 PSS2_X32Y313 PS_DDR_CKP_502
361 R22 502 IOPAD_X1Y21 PSS2_X32Y313 PS_DDR_BA2_502
362 R23 502 IOPAD_X1Y55 PSS2_X32Y313 PS_DDR_DQ23_502
363 R25 502 IOPAD_X1Y66 PSS2_X32Y313 PS_DDR_DQS_N2_502
364 R26 502 IOPAD_X1Y48 PSS2_X32Y313 PS_DDR_DQ16_502
365 T3 112 IPAD_X1Y114 GTX_CHANNEL_3_X249Y202 MGTXRXN3_112
366 T4 112 IPAD_X1Y115 GTX_CHANNEL_3_X249Y202 MGTXRXP3_112
367 T20 502 IOPAD_X1Y12 PSS2_X32Y313 PS_DDR_A8_502
368 T22 502 IOPAD_X1Y20 PSS2_X32Y313 PS_DDR_BA1_502
369 T23 502 IOPAD_X1Y54 PSS2_X32Y313 PS_DDR_DQ22_502
370 T24 502 IOPAD_X1Y52 PSS2_X32Y313 PS_DDR_DQ20_502
371 T25 502 IOPAD_X1Y53 PSS2_X32Y313 PS_DDR_DQ21_502
372 U1 112 OPAD_X0Y28 GTX_CHANNEL_2_X249Y191 MGTXTXN2_112
373 U2 112 OPAD_X0Y29 GTX_CHANNEL_2_X249Y191 MGTXTXP2_112
374 U5 112 IPAD_X1Y101 GTX_COMMON_X249Y179 MGTREFCLK1N_112
375 U6 112 IPAD_X1Y100 GTX_COMMON_X249Y179 MGTREFCLK1P_112
376 U20 502 IOPAD_X1Y13 PSS2_X32Y313 PS_DDR_A9_502
377 U21 502 IOPAD_X1Y23 PSS2_X32Y313 PS_DDR_CKE_502
378 U22 502 IOPAD_X1Y19 PSS2_X32Y313 PS_DDR_BA0_502
379 U24 502 IOPAD_X1Y58 PSS2_X32Y313 PS_DDR_DQ26_502
380 U25 502 IOPAD_X1Y59 PSS2_X32Y313 PS_DDR_DQ27_502
381 U26 502 IOPAD_X1Y57 PSS2_X32Y313 PS_DDR_DQ25_502
382 V3 112 IPAD_X1Y108 GTX_CHANNEL_2_X249Y191 MGTXRXN2_112
383 V4 112 IPAD_X1Y109 GTX_CHANNEL_2_X249Y191 MGTXRXP2_112
384 V18 13 IOB_X0Y200 LIOB33_SING_X0Y200 IO_25_13
385 V19 13 IOB_X0Y249 LIOB33_SING_X0Y249 IO_0_13
386 V21 502 IOPAD_X1Y2 PSS2_X32Y313 PS_DDR_VRN_502
387 V22 502 IOPAD_X1Y1 PSS2_X32Y313 PS_DDR_WE_B_502
388 V23 502 IOPAD_X1Y133 PSS2_X32Y313 PS_DDR_RAS_B_502
389 V24 502 IOPAD_X1Y56 PSS2_X32Y313 PS_DDR_DQ24_502
390 V26 502 IOPAD_X1Y31 PSS2_X32Y313 PS_DDR_DM3_502
391 W1 112 OPAD_X0Y26 GTX_CHANNEL_1_X249Y173 MGTXTXN1_112
392 W2 112 OPAD_X0Y27 GTX_CHANNEL_1_X249Y173 MGTXTXP1_112
393 W5 111 IPAD_X1Y69 GTX_COMMON_X249Y127 MGTREFCLK0N_111
394 W6 111 IPAD_X1Y68 GTX_COMMON_X249Y127 MGTREFCLK0P_111
395 W13 12 IOB_X0Y190 LIOB33_X0Y189 IO_L5P_T0_12
396 W14 12 IOB_X0Y199 LIOB33_SING_X0Y199 IO_0_12
397 W15 12 IOB_X0Y151 LIOB33_X0Y151 IO_L24N_T3_12
398 W16 12 IOB_X0Y152 LIOB33_X0Y151 IO_L24P_T3_12
399 W17 12 IOB_X0Y150 LIOB33_SING_X0Y150 IO_25_12
400 W18 13 IOB_X0Y204 LIOB33_X0Y203 IO_L23P_T3_13
401 W19 13 IOB_X0Y203 LIOB33_X0Y203 IO_L23N_T3_13
402 W20 13 IOB_X0Y212 LIOB33_X0Y211 IO_L19P_T3_13
403 W21 502 IOPAD_X1Y3 PSS2_X32Y313 PS_DDR_VRP_502
404 W23 502 IOPAD_X1Y63 PSS2_X32Y313 PS_DDR_DQ31_502
405 W24 502 IOPAD_X1Y71 PSS2_X32Y313 PS_DDR_DQS_P3_502
406 W25 502 IOPAD_X1Y67 PSS2_X32Y313 PS_DDR_DQS_N3_502
407 W26 502 IOPAD_X1Y60 PSS2_X32Y313 PS_DDR_DQ28_502
408 Y3 112 IPAD_X1Y96 GTX_CHANNEL_1_X249Y173 MGTXRXN1_112
409 Y4 112 IPAD_X1Y97 GTX_CHANNEL_1_X249Y173 MGTXRXP1_112
410 Y10 12 IOB_X0Y194 LIOB33_X0Y193 IO_L3P_T0_DQS_12
411 Y11 12 IOB_X0Y197 LIOB33_X0Y197 IO_L1N_T0_12
412 Y12 12 IOB_X0Y198 LIOB33_X0Y197 IO_L1P_T0_12
413 Y13 12 IOB_X0Y189 LIOB33_X0Y189 IO_L5N_T0_12
414 Y15 12 IOB_X0Y153 LIOB33_X0Y153 IO_L23N_T3_12
415 Y16 12 IOB_X0Y154 LIOB33_X0Y153 IO_L23P_T3_12
416 Y17 12 IOB_X0Y162 LIOB33_X0Y161 IO_L19P_T3_12
417 Y18 13 IOB_X0Y202 LIOB33_X0Y201 IO_L24P_T3_13
418 Y20 13 IOB_X0Y211 LIOB33_X0Y211 IO_L19N_T3_VREF_13
419 Y21 502 IOPAD_X1Y27 PSS2_X32Y313 PS_DDR_CS_B_502
420 Y22 502 IOPAD_X1Y131 PSS2_X32Y313 PS_DDR_ODT_502
421 Y23 502 IOPAD_X1Y22 PSS2_X32Y313 PS_DDR_CAS_B_502
422 Y25 502 IOPAD_X1Y61 PSS2_X32Y313 PS_DDR_DQ29_502
423 Y26 502 IOPAD_X1Y62 PSS2_X32Y313 PS_DDR_DQ30_502

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File diff suppressed because it is too large Load Diff

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@ -0,0 +1,423 @@
pin,bank,site,tile,pin_function
A2,34,IOB_X1Y251,RIOB18_X107Y251,IO_L24N_T3_34
A3,34,IOB_X1Y255,RIOB18_X107Y255,IO_L22N_T3_34
A4,34,IOB_X1Y256,RIOB18_X107Y255,IO_L22P_T3_34
A5,34,IOB_X1Y257,RIOB18_X107Y257,IO_L21N_T3_DQS_34
A7,34,IOB_X1Y263,RIOB18_X107Y263,IO_L18N_T2_34
A8,34,IOB_X1Y265,RIOB18_X107Y265,IO_L17N_T2_34
A9,34,IOB_X1Y266,RIOB18_X107Y265,IO_L17P_T2_34
A10,34,IOB_X1Y267,RIOB18_X107Y267,IO_L16N_T2_34
A12,35,IOB_X1Y301,RIOB18_X107Y301,IO_L24N_T3_AD15N_35
A13,35,IOB_X1Y302,RIOB18_X107Y301,IO_L24P_T3_AD15P_35
A14,35,IOB_X1Y307,RIOB18_X107Y307,IO_L21N_T3_DQS_AD14N_35
A15,35,IOB_X1Y308,RIOB18_X107Y307,IO_L21P_T3_DQS_AD14P_35
A17,35,IOB_X1Y313,RIOB18_X107Y313,IO_L18N_T2_AD13N_35
A18,501,IOPAD_X1Y126,PSS2_X32Y313,PS_MIO49_501
A19,501,IOPAD_X1Y130,PSS2_X32Y313,PS_MIO53_501
A20,501,IOPAD_X1Y129,PSS2_X32Y313,PS_MIO52_501
A22,501,IOPAD_X1Y134,PSS2_X32Y313,PS_SRST_B_501
A23,500,IOPAD_X1Y89,PSS2_X32Y313,PS_MIO12_500
A24,500,IOPAD_X1Y85,PSS2_X32Y313,PS_MIO8_500
A25,500,IOPAD_X1Y87,PSS2_X32Y313,PS_MIO10_500
AA1,112,OPAD_X0Y24,GTX_CHANNEL_0_X249Y162,MGTXTXN0_112
AA2,112,OPAD_X0Y25,GTX_CHANNEL_0_X249Y162,MGTXTXP0_112
AA5,111,IPAD_X1Y71,GTX_COMMON_X249Y127,MGTREFCLK1N_111
AA6,111,IPAD_X1Y70,GTX_COMMON_X249Y127,MGTREFCLK1P_111
AA10,12,IOB_X0Y193,LIOB33_X0Y193,IO_L3N_T0_DQS_12
AA12,12,IOB_X0Y187,LIOB33_X0Y187,IO_L6N_T0_VREF_12
AA13,12,IOB_X0Y188,LIOB33_X0Y187,IO_L6P_T0_12
AA14,12,IOB_X0Y155,LIOB33_X0Y155,IO_L22N_T3_12
AA15,12,IOB_X0Y156,LIOB33_X0Y155,IO_L22P_T3_12
AA17,12,IOB_X0Y161,LIOB33_X0Y161,IO_L19N_T3_VREF_12
AA18,13,IOB_X0Y201,LIOB33_X0Y201,IO_L24N_T3_13
AA19,13,IOB_X0Y206,LIOB33_X0Y205,IO_L22P_T3_13
AA20,13,IOB_X0Y210,LIOB33_X0Y209,IO_L20P_T3_13
AA22,13,IOB_X0Y230,LIOB33_X0Y229,IO_L10P_T1_13
AA23,13,IOB_X0Y229,LIOB33_X0Y229,IO_L10N_T1_13
AA24,13,IOB_X0Y238,LIOB33_X0Y237,IO_L6P_T0_13
AA25,13,IOB_X0Y248,LIOB33_X0Y247,IO_L1P_T0_13
AB3,112,IPAD_X1Y90,GTX_CHANNEL_0_X249Y162,MGTXRXN0_112
AB4,112,IPAD_X1Y91,GTX_CHANNEL_0_X249Y162,MGTXRXP0_112
AB10,12,IOB_X0Y191,LIOB33_X0Y191,IO_L4N_T0_12
AB11,12,IOB_X0Y192,LIOB33_X0Y191,IO_L4P_T0_12
AB12,12,IOB_X0Y196,LIOB33_X0Y195,IO_L2P_T0_12
AB14,12,IOB_X0Y171,LIOB33_X0Y171,IO_L14N_T2_SRCC_12
AB15,12,IOB_X0Y172,LIOB33_X0Y171,IO_L14P_T2_SRCC_12
AB16,12,IOB_X0Y159,LIOB33_X0Y159,IO_L20N_T3_12
AB17,12,IOB_X0Y160,LIOB33_X0Y159,IO_L20P_T3_12
AB19,13,IOB_X0Y205,LIOB33_X0Y205,IO_L22N_T3_13
AB20,13,IOB_X0Y209,LIOB33_X0Y209,IO_L20N_T3_13
AB21,13,IOB_X0Y232,LIOB33_X0Y231,IO_L9P_T1_DQS_13
AB22,13,IOB_X0Y231,LIOB33_X0Y231,IO_L9N_T1_DQS_13
AB24,13,IOB_X0Y237,LIOB33_X0Y237,IO_L6N_T0_VREF_13
AB25,13,IOB_X0Y247,LIOB33_X0Y247,IO_L1N_T0_13
AB26,13,IOB_X0Y246,LIOB33_X0Y245,IO_L2P_T0_13
AC1,111,OPAD_X0Y22,GTX_CHANNEL_3_X249Y150,MGTXTXN3_111
AC2,111,OPAD_X0Y23,GTX_CHANNEL_3_X249Y150,MGTXTXP3_111
AC5,111,IPAD_X1Y78,GTX_CHANNEL_2_X249Y139,MGTXRXN2_111
AC6,111,IPAD_X1Y79,GTX_CHANNEL_2_X249Y139,MGTXRXP2_111
AC11,12,IOB_X0Y195,LIOB33_X0Y195,IO_L2N_T0_12
AC12,12,IOB_X0Y178,LIOB33_X0Y177,IO_L11P_T1_SRCC_12
AC13,12,IOB_X0Y176,LIOB33_X0Y175,IO_L12P_T1_MRCC_12
AC14,12,IOB_X0Y174,LIOB33_X0Y173,IO_L13P_T2_MRCC_12
AC16,12,IOB_X0Y157,LIOB33_X0Y157,IO_L21N_T3_DQS_12
AC17,12,IOB_X0Y158,LIOB33_X0Y157,IO_L21P_T3_DQS_12
AC18,13,IOB_X0Y208,LIOB33_X0Y207,IO_L21P_T3_DQS_13
AC19,13,IOB_X0Y207,LIOB33_X0Y207,IO_L21N_T3_DQS_13
AC21,13,IOB_X0Y222,LIOB33_X0Y221,IO_L14P_T2_SRCC_13
AC22,13,IOB_X0Y221,LIOB33_X0Y221,IO_L14N_T2_SRCC_13
AC23,13,IOB_X0Y226,LIOB33_X0Y225,IO_L12P_T1_MRCC_13
AC24,13,IOB_X0Y225,LIOB33_X0Y225,IO_L12N_T1_MRCC_13
AC26,13,IOB_X0Y245,LIOB33_X0Y245,IO_L2N_T0_13
AD3,111,IPAD_X1Y84,GTX_CHANNEL_3_X249Y150,MGTXRXN3_111
AD4,111,IPAD_X1Y85,GTX_CHANNEL_3_X249Y150,MGTXRXP3_111
AD7,111,IPAD_X1Y60,GTX_CHANNEL_0_X249Y110,MGTXRXN0_111
AD8,111,IPAD_X1Y61,GTX_CHANNEL_0_X249Y110,MGTXRXP0_111
AD10,12,IOB_X0Y185,LIOB33_X0Y185,IO_L7N_T1_12
AD11,12,IOB_X0Y177,LIOB33_X0Y177,IO_L11N_T1_SRCC_12
AD13,12,IOB_X0Y175,LIOB33_X0Y175,IO_L12N_T1_MRCC_12
AD14,12,IOB_X0Y173,LIOB33_X0Y173,IO_L13N_T2_MRCC_12
AD15,12,IOB_X0Y169,LIOB33_X0Y169,IO_L15N_T2_DQS_12
AD16,12,IOB_X0Y170,LIOB33_X0Y169,IO_L15P_T2_DQS_12
AD18,13,IOB_X0Y216,LIOB33_X0Y215,IO_L17P_T2_13
AD19,13,IOB_X0Y215,LIOB33_X0Y215,IO_L17N_T2_13
AD20,13,IOB_X0Y224,LIOB33_X0Y223,IO_L13P_T2_MRCC_13
AD21,13,IOB_X0Y223,LIOB33_X0Y223,IO_L13N_T2_MRCC_13
AD23,13,IOB_X0Y228,LIOB33_X0Y227,IO_L11P_T1_SRCC_13
AD24,13,IOB_X0Y227,LIOB33_X0Y227,IO_L11N_T1_SRCC_13
AD25,13,IOB_X0Y242,LIOB33_X0Y241,IO_L4P_T0_13
AD26,13,IOB_X0Y241,LIOB33_X0Y241,IO_L4N_T0_13
AE1,111,OPAD_X0Y20,GTX_CHANNEL_2_X249Y139,MGTXTXN2_111
AE2,111,OPAD_X0Y21,GTX_CHANNEL_2_X249Y139,MGTXTXP2_111
AE5,111,IPAD_X1Y66,GTX_CHANNEL_1_X249Y121,MGTXRXN1_111
AE6,111,IPAD_X1Y67,GTX_CHANNEL_1_X249Y121,MGTXRXP1_111
AE10,12,IOB_X0Y186,LIOB33_X0Y185,IO_L7P_T1_12
AE11,12,IOB_X0Y182,LIOB33_X0Y181,IO_L9P_T1_DQS_12
AE12,12,IOB_X0Y184,LIOB33_X0Y183,IO_L8P_T1_12
AE13,12,IOB_X0Y180,LIOB33_X0Y179,IO_L10P_T1_12
AE15,12,IOB_X0Y165,LIOB33_X0Y165,IO_L17N_T2_12
AE16,12,IOB_X0Y166,LIOB33_X0Y165,IO_L17P_T2_12
AE17,12,IOB_X0Y164,LIOB33_X0Y163,IO_L18P_T2_12
AE18,13,IOB_X0Y214,LIOB33_X0Y213,IO_L18P_T2_13
AE20,13,IOB_X0Y218,LIOB33_X0Y217,IO_L16P_T2_13
AE21,13,IOB_X0Y217,LIOB33_X0Y217,IO_L16N_T2_13
AE22,13,IOB_X0Y236,LIOB33_X0Y235,IO_L7P_T1_13
AE23,13,IOB_X0Y234,LIOB33_X0Y233,IO_L8P_T1_13
AE25,13,IOB_X0Y244,LIOB33_X0Y243,IO_L3P_T0_DQS_13
AE26,13,IOB_X0Y243,LIOB33_X0Y243,IO_L3N_T0_DQS_13
AF3,111,OPAD_X0Y18,GTX_CHANNEL_1_X249Y121,MGTXTXN1_111
AF4,111,OPAD_X0Y19,GTX_CHANNEL_1_X249Y121,MGTXTXP1_111
AF7,111,OPAD_X0Y16,GTX_CHANNEL_0_X249Y110,MGTXTXN0_111
AF8,111,OPAD_X0Y17,GTX_CHANNEL_0_X249Y110,MGTXTXP0_111
AF10,12,IOB_X0Y181,LIOB33_X0Y181,IO_L9N_T1_DQS_12
AF12,12,IOB_X0Y183,LIOB33_X0Y183,IO_L8N_T1_12
AF13,12,IOB_X0Y179,LIOB33_X0Y179,IO_L10N_T1_12
AF14,12,IOB_X0Y167,LIOB33_X0Y167,IO_L16N_T2_12
AF15,12,IOB_X0Y168,LIOB33_X0Y167,IO_L16P_T2_12
AF17,12,IOB_X0Y163,LIOB33_X0Y163,IO_L18N_T2_12
AF18,13,IOB_X0Y213,LIOB33_X0Y213,IO_L18N_T2_13
AF19,13,IOB_X0Y220,LIOB33_X0Y219,IO_L15P_T2_DQS_13
AF20,13,IOB_X0Y219,LIOB33_X0Y219,IO_L15N_T2_DQS_13
AF22,13,IOB_X0Y235,LIOB33_X0Y235,IO_L7N_T1_13
AF23,13,IOB_X0Y233,LIOB33_X0Y233,IO_L8N_T1_13
AF24,13,IOB_X0Y240,LIOB33_X0Y239,IO_L5P_T0_13
AF25,13,IOB_X0Y239,LIOB33_X0Y239,IO_L5N_T0_13
B1,34,IOB_X1Y253,RIOB18_X107Y253,IO_L23N_T3_34
B2,34,IOB_X1Y252,RIOB18_X107Y251,IO_L24P_T3_34
B4,34,IOB_X1Y259,RIOB18_X107Y259,IO_L20N_T3_34
B5,34,IOB_X1Y260,RIOB18_X107Y259,IO_L20P_T3_34
B6,34,IOB_X1Y258,RIOB18_X107Y257,IO_L21P_T3_DQS_34
B7,34,IOB_X1Y264,RIOB18_X107Y263,IO_L18P_T2_34
B9,34,IOB_X1Y269,RIOB18_X107Y269,IO_L15N_T2_DQS_34
B10,34,IOB_X1Y268,RIOB18_X107Y267,IO_L16P_T2_34
B11,35,IOB_X1Y303,RIOB18_X107Y303,IO_L23N_T3_35
B12,35,IOB_X1Y305,RIOB18_X107Y305,IO_L22N_T3_AD7N_35
B14,35,IOB_X1Y309,RIOB18_X107Y309,IO_L20N_T3_AD6N_35
B15,35,IOB_X1Y315,RIOB18_X107Y315,IO_L17N_T2_AD5N_35
B16,35,IOB_X1Y316,RIOB18_X107Y315,IO_L17P_T2_AD5P_35
B17,35,IOB_X1Y314,RIOB18_X107Y313,IO_L18P_T2_AD13P_35
B19,501,IOPAD_X1Y124,PSS2_X32Y313,PS_MIO47_501
B20,501,IOPAD_X1Y128,PSS2_X32Y313,PS_MIO51_501
B21,501,IOPAD_X1Y125,PSS2_X32Y313,PS_MIO48_501
B22,501,IOPAD_X1Y127,PSS2_X32Y313,PS_MIO50_501
B24,500,IOPAD_X1Y26,PSS2_X32Y313,PS_CLK_500
B25,500,IOPAD_X1Y90,PSS2_X32Y313,PS_MIO13_500
B26,500,IOPAD_X1Y88,PSS2_X32Y313,PS_MIO11_500
C1,33,IOB_X1Y241,RIOB18_X107Y241,IO_L4N_T0_33
C2,34,IOB_X1Y254,RIOB18_X107Y253,IO_L23P_T3_34
C3,34,IOB_X1Y261,RIOB18_X107Y261,IO_L19N_T3_VREF_34
C4,34,IOB_X1Y262,RIOB18_X107Y261,IO_L19P_T3_34
C6,34,IOB_X1Y271,RIOB18_X107Y271,IO_L14N_T2_SRCC_34
C7,34,IOB_X1Y273,RIOB18_X107Y273,IO_L13N_T2_MRCC_34
C8,34,IOB_X1Y274,RIOB18_X107Y273,IO_L13P_T2_MRCC_34
C9,34,IOB_X1Y270,RIOB18_X107Y269,IO_L15P_T2_DQS_34
C11,35,IOB_X1Y304,RIOB18_X107Y303,IO_L23P_T3_35
C12,35,IOB_X1Y306,RIOB18_X107Y305,IO_L22P_T3_AD7P_35
C13,35,IOB_X1Y311,RIOB18_X107Y311,IO_L19N_T3_VREF_35
C14,35,IOB_X1Y310,RIOB18_X107Y309,IO_L20P_T3_AD6P_35
C16,35,IOB_X1Y319,RIOB18_X107Y319,IO_L15N_T2_DQS_AD12N_35
C17,35,IOB_X1Y320,RIOB18_X107Y319,IO_L15P_T2_DQS_AD12P_35
C18,501,IOPAD_X1Y122,PSS2_X32Y313,PS_MIO45_501
C19,501,IOPAD_X1Y118,PSS2_X32Y313,PS_MIO41_501
C21,501,IOPAD_X1Y116,PSS2_X32Y313,PS_MIO39_501
C22,501,IOPAD_X1Y117,PSS2_X32Y313,PS_MIO40_501
C23,500,IOPAD_X1Y132,PSS2_X32Y313,PS_POR_B_500
C24,500,IOPAD_X1Y92,PSS2_X32Y313,PS_MIO15_500
C26,500,IOPAD_X1Y82,PSS2_X32Y313,PS_MIO5_500
D1,33,IOB_X1Y242,RIOB18_X107Y241,IO_L4P_T0_33
D3,33,IOB_X1Y245,RIOB18_X107Y245,IO_L2N_T0_33
D4,33,IOB_X1Y246,RIOB18_X107Y245,IO_L2P_T0_33
D5,34,IOB_X1Y279,RIOB18_X107Y279,IO_L10N_T1_34
D6,34,IOB_X1Y272,RIOB18_X107Y271,IO_L14P_T2_SRCC_34
D8,34,IOB_X1Y283,RIOB18_X107Y283,IO_L8N_T1_34
D9,34,IOB_X1Y284,RIOB18_X107Y283,IO_L8P_T1_34
D10,35,IOB_X1Y345,RIOB18_X107Y345,IO_L2N_T0_AD8N_35
D11,35,IOB_X1Y341,RIOB18_X107Y341,IO_L4N_T0_35
D13,35,IOB_X1Y312,RIOB18_X107Y311,IO_L19P_T3_35
D14,35,IOB_X1Y323,RIOB18_X107Y323,IO_L13N_T2_MRCC_35
D15,35,IOB_X1Y324,RIOB18_X107Y323,IO_L13P_T2_MRCC_35
D16,35,IOB_X1Y317,RIOB18_X107Y317,IO_L16N_T2_35
D18,501,IOPAD_X1Y120,PSS2_X32Y313,PS_MIO43_501
D19,501,IOPAD_X1Y112,PSS2_X32Y313,PS_MIO35_501
D20,501,IOPAD_X1Y114,PSS2_X32Y313,PS_MIO37_501
D21,501,IOPAD_X1Y115,PSS2_X32Y313,PS_MIO38_501
D23,500,IOPAD_X1Y91,PSS2_X32Y313,PS_MIO14_500
D24,500,IOPAD_X1Y86,PSS2_X32Y313,PS_MIO9_500
D25,500,IOPAD_X1Y80,PSS2_X32Y313,PS_MIO3_500
D26,500,IOPAD_X1Y78,PSS2_X32Y313,PS_MIO1_500
E1,33,IOB_X1Y239,RIOB18_X107Y239,IO_L5N_T0_33
E2,33,IOB_X1Y240,RIOB18_X107Y239,IO_L5P_T0_33
E3,33,IOB_X1Y237,RIOB18_X107Y237,IO_L6N_T0_VREF_33
E5,34,IOB_X1Y285,RIOB18_X107Y285,IO_L7N_T1_34
E6,34,IOB_X1Y280,RIOB18_X107Y279,IO_L10P_T1_34
E7,34,IOB_X1Y277,RIOB18_X107Y277,IO_L11N_T1_SRCC_34
E8,34,IOB_X1Y281,RIOB18_X107Y281,IO_L9N_T1_DQS_34
E10,35,IOB_X1Y346,RIOB18_X107Y345,IO_L2P_T0_AD8P_35
E11,35,IOB_X1Y342,RIOB18_X107Y341,IO_L4P_T0_35
E12,35,IOB_X1Y347,RIOB18_X107Y347,IO_L1N_T0_AD0N_35
E13,35,IOB_X1Y337,RIOB18_X107Y337,IO_L6N_T0_VREF_35
E15,35,IOB_X1Y321,RIOB18_X107Y321,IO_L14N_T2_AD4N_SRCC_35
E16,35,IOB_X1Y318,RIOB18_X107Y317,IO_L16P_T2_35
E17,501,IOPAD_X1Y123,PSS2_X32Y313,PS_MIO46_501
E18,501,IOPAD_X1Y121,PSS2_X32Y313,PS_MIO44_501
E20,501,IOPAD_X1Y106,PSS2_X32Y313,PS_MIO29_501
E21,501,IOPAD_X1Y108,PSS2_X32Y313,PS_MIO31_501
E22,501,IOPAD_X1Y110,PSS2_X32Y313,PS_MIO33_501
E23,500,IOPAD_X1Y84,PSS2_X32Y313,PS_MIO7_500
E25,500,IOPAD_X1Y79,PSS2_X32Y313,PS_MIO2_500
E26,500,IOPAD_X1Y77,PSS2_X32Y313,PS_MIO0_500
F2,33,IOB_X1Y243,RIOB18_X107Y243,IO_L3N_T0_DQS_33
F3,33,IOB_X1Y238,RIOB18_X107Y237,IO_L6P_T0_33
F4,33,IOB_X1Y247,RIOB18_X107Y247,IO_L1N_T0_33
F5,34,IOB_X1Y286,RIOB18_X107Y285,IO_L7P_T1_34
F7,34,IOB_X1Y275,RIOB18_X107Y275,IO_L12N_T1_MRCC_34
F8,34,IOB_X1Y278,RIOB18_X107Y277,IO_L11P_T1_SRCC_34
F9,34,IOB_X1Y282,RIOB18_X107Y281,IO_L9P_T1_DQS_34
F10,35,IOB_X1Y343,RIOB18_X107Y343,IO_L3N_T0_DQS_AD1N_35
F12,35,IOB_X1Y348,RIOB18_X107Y347,IO_L1P_T0_AD0P_35
F13,35,IOB_X1Y338,RIOB18_X107Y337,IO_L6P_T0_35
F14,35,IOB_X1Y327,RIOB18_X107Y327,IO_L11N_T1_SRCC_35
F15,35,IOB_X1Y322,RIOB18_X107Y321,IO_L14P_T2_AD4P_SRCC_35
F17,501,IOPAD_X1Y119,PSS2_X32Y313,PS_MIO42_501
F18,501,IOPAD_X1Y104,PSS2_X32Y313,PS_MIO27_501
F19,501,IOPAD_X1Y102,PSS2_X32Y313,PS_MIO25_501
F20,501,IOPAD_X1Y100,PSS2_X32Y313,PS_MIO23_501
F22,501,IOPAD_X1Y98,PSS2_X32Y313,PS_MIO21_501
F23,500,IOPAD_X1Y83,PSS2_X32Y313,PS_MIO6_500
F24,500,IOPAD_X1Y81,PSS2_X32Y313,PS_MIO4_500
F25,502,IOPAD_X1Y33,PSS2_X32Y313,PS_DDR_DQ1_502
G1,33,IOB_X1Y229,RIOB18_X107Y229,IO_L10N_T1_33
G2,33,IOB_X1Y244,RIOB18_X107Y243,IO_L3P_T0_DQS_33
G4,33,IOB_X1Y248,RIOB18_X107Y247,IO_L1P_T0_33
G5,34,IOB_X1Y295,RIOB18_X107Y295,IO_L2N_T0_34
G6,34,IOB_X1Y296,RIOB18_X107Y295,IO_L2P_T0_34
G7,34,IOB_X1Y276,RIOB18_X107Y275,IO_L12P_T1_MRCC_34
G9,34,IOB_X1Y293,RIOB18_X107Y293,IO_L3N_T0_DQS_34
G10,35,IOB_X1Y344,RIOB18_X107Y343,IO_L3P_T0_DQS_AD1P_35
G11,35,IOB_X1Y339,RIOB18_X107Y339,IO_L5N_T0_AD9N_35
G12,35,IOB_X1Y340,RIOB18_X107Y339,IO_L5P_T0_AD9P_35
G14,35,IOB_X1Y328,RIOB18_X107Y327,IO_L11P_T1_SRCC_35
G15,35,IOB_X1Y329,RIOB18_X107Y329,IO_L10N_T1_AD11N_35
G16,35,IOB_X1Y330,RIOB18_X107Y329,IO_L10P_T1_AD11P_35
G17,501,IOPAD_X1Y94,PSS2_X32Y313,PS_MIO17_501
G19,501,IOPAD_X1Y96,PSS2_X32Y313,PS_MIO19_501
G20,501,IOPAD_X1Y95,PSS2_X32Y313,PS_MIO18_501
G21,501,IOPAD_X1Y93,PSS2_X32Y313,PS_MIO16_501
G22,501,IOPAD_X1Y99,PSS2_X32Y313,PS_MIO22_501
G24,502,IOPAD_X1Y28,PSS2_X32Y313,PS_DDR_DM0_502
G25,502,IOPAD_X1Y64,PSS2_X32Y313,PS_DDR_DQS_N0_502
G26,502,IOPAD_X1Y35,PSS2_X32Y313,PS_DDR_DQ3_502
H1,33,IOB_X1Y235,RIOB18_X107Y235,IO_L7N_T1_33
H2,33,IOB_X1Y230,RIOB18_X107Y229,IO_L10P_T1_33
H3,33,IOB_X1Y233,RIOB18_X107Y233,IO_L8N_T1_33
H4,33,IOB_X1Y234,RIOB18_X107Y233,IO_L8P_T1_33
H6,34,IOB_X1Y291,RIOB18_X107Y291,IO_L4N_T0_34
H7,34,IOB_X1Y292,RIOB18_X107Y291,IO_L4P_T0_34
H8,34,IOB_X1Y287,RIOB18_X107Y287,IO_L6N_T0_VREF_34
H9,34,IOB_X1Y294,RIOB18_X107Y293,IO_L3P_T0_DQS_PUDC_B_34
H11,34,IOB_X1Y297,RIOB18_X107Y297,IO_L1N_T0_34
H12,35,IOB_X1Y335,RIOB18_X107Y335,IO_L7N_T1_AD2N_35
H13,35,IOB_X1Y336,RIOB18_X107Y335,IO_L7P_T1_AD2P_35
H14,35,IOB_X1Y325,RIOB18_X107Y325,IO_L12N_T1_MRCC_35
H16,35,IOB_X1Y349,RIOB18_SING_X107Y349,IO_0_VRN_35
H17,501,IOPAD_X1Y103,PSS2_X32Y313,PS_MIO26_501
H19,501,IOPAD_X1Y97,PSS2_X32Y313,PS_MIO20_501
H21,502,IOPAD_X1Y15,PSS2_X32Y313,PS_DDR_A11_502
H22,502,IOPAD_X1Y72,PSS2_X32Y313,PS_DDR_DRST_B_502
H23,502,IOPAD_X1Y37,PSS2_X32Y313,PS_DDR_DQ5_502
H24,502,IOPAD_X1Y68,PSS2_X32Y313,PS_DDR_DQS_P0_502
H26,502,IOPAD_X1Y36,PSS2_X32Y313,PS_DDR_DQ4_502
J1,33,IOB_X1Y236,RIOB18_X107Y235,IO_L7P_T1_33
J3,33,IOB_X1Y225,RIOB18_X107Y225,IO_L12N_T1_MRCC_33
J4,33,IOB_X1Y226,RIOB18_X107Y225,IO_L12P_T1_MRCC_33
J5,33,IOB_X1Y209,RIOB18_X107Y209,IO_L20N_T3_33
J6,33,IOB_X1Y205,RIOB18_X107Y205,IO_L22N_T3_33
J8,34,IOB_X1Y288,RIOB18_X107Y287,IO_L6P_T0_34
J9,34,IOB_X1Y289,RIOB18_X107Y289,IO_L5N_T0_34
J10,34,IOB_X1Y290,RIOB18_X107Y289,IO_L5P_T0_34
J11,34,IOB_X1Y298,RIOB18_X107Y297,IO_L1P_T0_34
J13,35,IOB_X1Y333,RIOB18_X107Y333,IO_L8N_T1_AD10N_35
J14,35,IOB_X1Y326,RIOB18_X107Y325,IO_L12P_T1_MRCC_35
J15,35,IOB_X1Y331,RIOB18_X107Y331,IO_L9N_T1_DQS_AD3N_35
J16,501,IOPAD_X1Y111,PSS2_X32Y313,PS_MIO34_501
J18,501,IOPAD_X1Y105,PSS2_X32Y313,PS_MIO28_501
J19,501,IOPAD_X1Y101,PSS2_X32Y313,PS_MIO24_501
J20,502,IOPAD_X1Y18,PSS2_X32Y313,PS_DDR_A13_502
J21,502,IOPAD_X1Y11,PSS2_X32Y313,PS_DDR_A7_502
J23,502,IOPAD_X1Y39,PSS2_X32Y313,PS_DDR_DQ7_502
J24,502,IOPAD_X1Y38,PSS2_X32Y313,PS_DDR_DQ6_502
J25,502,IOPAD_X1Y34,PSS2_X32Y313,PS_DDR_DQ2_502
J26,502,IOPAD_X1Y32,PSS2_X32Y313,PS_DDR_DQ0_502
K1,33,IOB_X1Y231,RIOB18_X107Y231,IO_L9N_T1_DQS_33
K2,33,IOB_X1Y232,RIOB18_X107Y231,IO_L9P_T1_DQS_33
K3,33,IOB_X1Y227,RIOB18_X107Y227,IO_L11N_T1_SRCC_33
K5,33,IOB_X1Y210,RIOB18_X107Y209,IO_L20P_T3_33
K6,33,IOB_X1Y206,RIOB18_X107Y205,IO_L22P_T3_33
K7,33,IOB_X1Y201,RIOB18_X107Y201,IO_L24N_T3_33
K8,33,IOB_X1Y202,RIOB18_X107Y201,IO_L24P_T3_33
K10,34,IOB_X1Y250,RIOB18_SING_X107Y250,IO_25_VRP_34
K11,34,IOB_X1Y299,RIOB18_SING_X107Y299,IO_0_VRN_34
K12,35,IOB_X1Y300,RIOB18_SING_X107Y300,IO_25_VRP_35
K13,35,IOB_X1Y334,RIOB18_X107Y333,IO_L8P_T1_AD10P_35
K15,35,IOB_X1Y332,RIOB18_X107Y331,IO_L9P_T1_DQS_AD3P_35
K16,501,IOPAD_X1Y113,PSS2_X32Y313,PS_MIO36_501
K17,501,IOPAD_X1Y109,PSS2_X32Y313,PS_MIO32_501
K19,501,IOPAD_X1Y107,PSS2_X32Y313,PS_MIO30_501
K20,502,IOPAD_X1Y5,PSS2_X32Y313,PS_DDR_A1_502
K22,502,IOPAD_X1Y4,PSS2_X32Y313,PS_DDR_A0_502
K23,502,IOPAD_X1Y43,PSS2_X32Y313,PS_DDR_DQ11_502
K25,502,IOPAD_X1Y29,PSS2_X32Y313,PS_DDR_DM1_502
K26,502,IOPAD_X1Y40,PSS2_X32Y313,PS_DDR_DQ8_502
L2,33,IOB_X1Y217,RIOB18_X107Y217,IO_L16N_T2_33
L3,33,IOB_X1Y228,RIOB18_X107Y227,IO_L11P_T1_SRCC_33
L4,33,IOB_X1Y221,RIOB18_X107Y221,IO_L14N_T2_SRCC_33
L5,33,IOB_X1Y222,RIOB18_X107Y221,IO_L14P_T2_SRCC_33
L7,33,IOB_X1Y211,RIOB18_X107Y211,IO_L19N_T3_VREF_33
L8,33,IOB_X1Y207,RIOB18_X107Y207,IO_L21N_T3_DQS_33
L9,33,IOB_X1Y249,RIOB18_SING_X107Y249,IO_0_VRN_33
L20,502,IOPAD_X1Y10,PSS2_X32Y313,PS_DDR_A6_502
L22,502,IOPAD_X1Y7,PSS2_X32Y313,PS_DDR_A3_502
L23,502,IOPAD_X1Y41,PSS2_X32Y313,PS_DDR_DQ9_502
L24,502,IOPAD_X1Y69,PSS2_X32Y313,PS_DDR_DQS_P1_502
L25,502,IOPAD_X1Y65,PSS2_X32Y313,PS_DDR_DQS_N1_502
M1,33,IOB_X1Y213,RIOB18_X107Y213,IO_L18N_T2_33
M2,33,IOB_X1Y218,RIOB18_X107Y217,IO_L16P_T2_33
M4,33,IOB_X1Y215,RIOB18_X107Y215,IO_L17N_T2_33
M5,33,IOB_X1Y223,RIOB18_X107Y223,IO_L13N_T2_MRCC_33
M6,33,IOB_X1Y224,RIOB18_X107Y223,IO_L13P_T2_MRCC_33
M7,33,IOB_X1Y212,RIOB18_X107Y211,IO_L19P_T3_33
M8,33,IOB_X1Y208,RIOB18_X107Y207,IO_L21P_T3_DQS_33
M20,502,IOPAD_X1Y8,PSS2_X32Y313,PS_DDR_A4_502
M22,502,IOPAD_X1Y14,PSS2_X32Y313,PS_DDR_A10_502
M24,502,IOPAD_X1Y46,PSS2_X32Y313,PS_DDR_DQ14_502
M25,502,IOPAD_X1Y44,PSS2_X32Y313,PS_DDR_DQ12_502
M26,502,IOPAD_X1Y42,PSS2_X32Y313,PS_DDR_DQ10_502
N1,33,IOB_X1Y214,RIOB18_X107Y213,IO_L18P_T2_33
N2,33,IOB_X1Y219,RIOB18_X107Y219,IO_L15N_T2_DQS_33
N3,33,IOB_X1Y220,RIOB18_X107Y219,IO_L15P_T2_DQS_33
N4,33,IOB_X1Y216,RIOB18_X107Y215,IO_L17P_T2_33
N6,33,IOB_X1Y203,RIOB18_X107Y203,IO_L23N_T3_33
N7,33,IOB_X1Y204,RIOB18_X107Y203,IO_L23P_T3_33
N8,33,IOB_X1Y200,RIOB18_SING_X107Y200,IO_25_VRP_33
N14,0,IPAD_X0Y120,MONITOR_BOT_PELE1_X197Y339,VP_0
N21,502,IOPAD_X1Y6,PSS2_X32Y313,PS_DDR_A2_502
N22,502,IOPAD_X1Y9,PSS2_X32Y313,PS_DDR_A5_502
N23,502,IOPAD_X1Y47,PSS2_X32Y313,PS_DDR_DQ15_502
N24,502,IOPAD_X1Y45,PSS2_X32Y313,PS_DDR_DQ13_502
N26,502,IOPAD_X1Y50,PSS2_X32Y313,PS_DDR_DQ18_502
P13,0,IPAD_X0Y121,MONITOR_BOT_PELE1_X197Y339,VN_0
P20,502,IOPAD_X1Y16,PSS2_X32Y313,PS_DDR_A12_502
P21,502,IOPAD_X1Y24,PSS2_X32Y313,PS_DDR_CKN_502
P23,502,IOPAD_X1Y51,PSS2_X32Y313,PS_DDR_DQ19_502
P24,502,IOPAD_X1Y49,PSS2_X32Y313,PS_DDR_DQ17_502
P25,502,IOPAD_X1Y70,PSS2_X32Y313,PS_DDR_DQS_P2_502
P26,502,IOPAD_X1Y30,PSS2_X32Y313,PS_DDR_DM2_502
R1,112,OPAD_X0Y30,GTX_CHANNEL_3_X249Y202,MGTXTXN3_112
R2,112,OPAD_X0Y31,GTX_CHANNEL_3_X249Y202,MGTXTXP3_112
R5,112,IPAD_X1Y99,GTX_COMMON_X249Y179,MGTREFCLK0N_112
R6,112,IPAD_X1Y98,GTX_COMMON_X249Y179,MGTREFCLK0P_112
R20,502,IOPAD_X1Y17,PSS2_X32Y313,PS_DDR_A14_502
R21,502,IOPAD_X1Y25,PSS2_X32Y313,PS_DDR_CKP_502
R22,502,IOPAD_X1Y21,PSS2_X32Y313,PS_DDR_BA2_502
R23,502,IOPAD_X1Y55,PSS2_X32Y313,PS_DDR_DQ23_502
R25,502,IOPAD_X1Y66,PSS2_X32Y313,PS_DDR_DQS_N2_502
R26,502,IOPAD_X1Y48,PSS2_X32Y313,PS_DDR_DQ16_502
T3,112,IPAD_X1Y114,GTX_CHANNEL_3_X249Y202,MGTXRXN3_112
T4,112,IPAD_X1Y115,GTX_CHANNEL_3_X249Y202,MGTXRXP3_112
T20,502,IOPAD_X1Y12,PSS2_X32Y313,PS_DDR_A8_502
T22,502,IOPAD_X1Y20,PSS2_X32Y313,PS_DDR_BA1_502
T23,502,IOPAD_X1Y54,PSS2_X32Y313,PS_DDR_DQ22_502
T24,502,IOPAD_X1Y52,PSS2_X32Y313,PS_DDR_DQ20_502
T25,502,IOPAD_X1Y53,PSS2_X32Y313,PS_DDR_DQ21_502
U1,112,OPAD_X0Y28,GTX_CHANNEL_2_X249Y191,MGTXTXN2_112
U2,112,OPAD_X0Y29,GTX_CHANNEL_2_X249Y191,MGTXTXP2_112
U5,112,IPAD_X1Y101,GTX_COMMON_X249Y179,MGTREFCLK1N_112
U6,112,IPAD_X1Y100,GTX_COMMON_X249Y179,MGTREFCLK1P_112
U20,502,IOPAD_X1Y13,PSS2_X32Y313,PS_DDR_A9_502
U21,502,IOPAD_X1Y23,PSS2_X32Y313,PS_DDR_CKE_502
U22,502,IOPAD_X1Y19,PSS2_X32Y313,PS_DDR_BA0_502
U24,502,IOPAD_X1Y58,PSS2_X32Y313,PS_DDR_DQ26_502
U25,502,IOPAD_X1Y59,PSS2_X32Y313,PS_DDR_DQ27_502
U26,502,IOPAD_X1Y57,PSS2_X32Y313,PS_DDR_DQ25_502
V3,112,IPAD_X1Y108,GTX_CHANNEL_2_X249Y191,MGTXRXN2_112
V4,112,IPAD_X1Y109,GTX_CHANNEL_2_X249Y191,MGTXRXP2_112
V18,13,IOB_X0Y200,LIOB33_SING_X0Y200,IO_25_13
V19,13,IOB_X0Y249,LIOB33_SING_X0Y249,IO_0_13
V21,502,IOPAD_X1Y2,PSS2_X32Y313,PS_DDR_VRN_502
V22,502,IOPAD_X1Y1,PSS2_X32Y313,PS_DDR_WE_B_502
V23,502,IOPAD_X1Y133,PSS2_X32Y313,PS_DDR_RAS_B_502
V24,502,IOPAD_X1Y56,PSS2_X32Y313,PS_DDR_DQ24_502
V26,502,IOPAD_X1Y31,PSS2_X32Y313,PS_DDR_DM3_502
W1,112,OPAD_X0Y26,GTX_CHANNEL_1_X249Y173,MGTXTXN1_112
W2,112,OPAD_X0Y27,GTX_CHANNEL_1_X249Y173,MGTXTXP1_112
W5,111,IPAD_X1Y69,GTX_COMMON_X249Y127,MGTREFCLK0N_111
W6,111,IPAD_X1Y68,GTX_COMMON_X249Y127,MGTREFCLK0P_111
W13,12,IOB_X0Y190,LIOB33_X0Y189,IO_L5P_T0_12
W14,12,IOB_X0Y199,LIOB33_SING_X0Y199,IO_0_12
W15,12,IOB_X0Y151,LIOB33_X0Y151,IO_L24N_T3_12
W16,12,IOB_X0Y152,LIOB33_X0Y151,IO_L24P_T3_12
W17,12,IOB_X0Y150,LIOB33_SING_X0Y150,IO_25_12
W18,13,IOB_X0Y204,LIOB33_X0Y203,IO_L23P_T3_13
W19,13,IOB_X0Y203,LIOB33_X0Y203,IO_L23N_T3_13
W20,13,IOB_X0Y212,LIOB33_X0Y211,IO_L19P_T3_13
W21,502,IOPAD_X1Y3,PSS2_X32Y313,PS_DDR_VRP_502
W23,502,IOPAD_X1Y63,PSS2_X32Y313,PS_DDR_DQ31_502
W24,502,IOPAD_X1Y71,PSS2_X32Y313,PS_DDR_DQS_P3_502
W25,502,IOPAD_X1Y67,PSS2_X32Y313,PS_DDR_DQS_N3_502
W26,502,IOPAD_X1Y60,PSS2_X32Y313,PS_DDR_DQ28_502
Y3,112,IPAD_X1Y96,GTX_CHANNEL_1_X249Y173,MGTXRXN1_112
Y4,112,IPAD_X1Y97,GTX_CHANNEL_1_X249Y173,MGTXRXP1_112
Y10,12,IOB_X0Y194,LIOB33_X0Y193,IO_L3P_T0_DQS_12
Y11,12,IOB_X0Y197,LIOB33_X0Y197,IO_L1N_T0_12
Y12,12,IOB_X0Y198,LIOB33_X0Y197,IO_L1P_T0_12
Y13,12,IOB_X0Y189,LIOB33_X0Y189,IO_L5N_T0_12
Y15,12,IOB_X0Y153,LIOB33_X0Y153,IO_L23N_T3_12
Y16,12,IOB_X0Y154,LIOB33_X0Y153,IO_L23P_T3_12
Y17,12,IOB_X0Y162,LIOB33_X0Y161,IO_L19P_T3_12
Y18,13,IOB_X0Y202,LIOB33_X0Y201,IO_L24P_T3_13
Y20,13,IOB_X0Y211,LIOB33_X0Y211,IO_L19N_T3_VREF_13
Y21,502,IOPAD_X1Y27,PSS2_X32Y313,PS_DDR_CS_B_502
Y22,502,IOPAD_X1Y131,PSS2_X32Y313,PS_DDR_ODT_502
Y23,502,IOPAD_X1Y22,PSS2_X32Y313,PS_DDR_CAS_B_502
Y25,502,IOPAD_X1Y61,PSS2_X32Y313,PS_DDR_DQ29_502
Y26,502,IOPAD_X1Y62,PSS2_X32Y313,PS_DDR_DQ30_502
1 pin bank site tile pin_function
2 A2 34 IOB_X1Y251 RIOB18_X107Y251 IO_L24N_T3_34
3 A3 34 IOB_X1Y255 RIOB18_X107Y255 IO_L22N_T3_34
4 A4 34 IOB_X1Y256 RIOB18_X107Y255 IO_L22P_T3_34
5 A5 34 IOB_X1Y257 RIOB18_X107Y257 IO_L21N_T3_DQS_34
6 A7 34 IOB_X1Y263 RIOB18_X107Y263 IO_L18N_T2_34
7 A8 34 IOB_X1Y265 RIOB18_X107Y265 IO_L17N_T2_34
8 A9 34 IOB_X1Y266 RIOB18_X107Y265 IO_L17P_T2_34
9 A10 34 IOB_X1Y267 RIOB18_X107Y267 IO_L16N_T2_34
10 A12 35 IOB_X1Y301 RIOB18_X107Y301 IO_L24N_T3_AD15N_35
11 A13 35 IOB_X1Y302 RIOB18_X107Y301 IO_L24P_T3_AD15P_35
12 A14 35 IOB_X1Y307 RIOB18_X107Y307 IO_L21N_T3_DQS_AD14N_35
13 A15 35 IOB_X1Y308 RIOB18_X107Y307 IO_L21P_T3_DQS_AD14P_35
14 A17 35 IOB_X1Y313 RIOB18_X107Y313 IO_L18N_T2_AD13N_35
15 A18 501 IOPAD_X1Y126 PSS2_X32Y313 PS_MIO49_501
16 A19 501 IOPAD_X1Y130 PSS2_X32Y313 PS_MIO53_501
17 A20 501 IOPAD_X1Y129 PSS2_X32Y313 PS_MIO52_501
18 A22 501 IOPAD_X1Y134 PSS2_X32Y313 PS_SRST_B_501
19 A23 500 IOPAD_X1Y89 PSS2_X32Y313 PS_MIO12_500
20 A24 500 IOPAD_X1Y85 PSS2_X32Y313 PS_MIO8_500
21 A25 500 IOPAD_X1Y87 PSS2_X32Y313 PS_MIO10_500
22 AA1 112 OPAD_X0Y24 GTX_CHANNEL_0_X249Y162 MGTXTXN0_112
23 AA2 112 OPAD_X0Y25 GTX_CHANNEL_0_X249Y162 MGTXTXP0_112
24 AA5 111 IPAD_X1Y71 GTX_COMMON_X249Y127 MGTREFCLK1N_111
25 AA6 111 IPAD_X1Y70 GTX_COMMON_X249Y127 MGTREFCLK1P_111
26 AA10 12 IOB_X0Y193 LIOB33_X0Y193 IO_L3N_T0_DQS_12
27 AA12 12 IOB_X0Y187 LIOB33_X0Y187 IO_L6N_T0_VREF_12
28 AA13 12 IOB_X0Y188 LIOB33_X0Y187 IO_L6P_T0_12
29 AA14 12 IOB_X0Y155 LIOB33_X0Y155 IO_L22N_T3_12
30 AA15 12 IOB_X0Y156 LIOB33_X0Y155 IO_L22P_T3_12
31 AA17 12 IOB_X0Y161 LIOB33_X0Y161 IO_L19N_T3_VREF_12
32 AA18 13 IOB_X0Y201 LIOB33_X0Y201 IO_L24N_T3_13
33 AA19 13 IOB_X0Y206 LIOB33_X0Y205 IO_L22P_T3_13
34 AA20 13 IOB_X0Y210 LIOB33_X0Y209 IO_L20P_T3_13
35 AA22 13 IOB_X0Y230 LIOB33_X0Y229 IO_L10P_T1_13
36 AA23 13 IOB_X0Y229 LIOB33_X0Y229 IO_L10N_T1_13
37 AA24 13 IOB_X0Y238 LIOB33_X0Y237 IO_L6P_T0_13
38 AA25 13 IOB_X0Y248 LIOB33_X0Y247 IO_L1P_T0_13
39 AB3 112 IPAD_X1Y90 GTX_CHANNEL_0_X249Y162 MGTXRXN0_112
40 AB4 112 IPAD_X1Y91 GTX_CHANNEL_0_X249Y162 MGTXRXP0_112
41 AB10 12 IOB_X0Y191 LIOB33_X0Y191 IO_L4N_T0_12
42 AB11 12 IOB_X0Y192 LIOB33_X0Y191 IO_L4P_T0_12
43 AB12 12 IOB_X0Y196 LIOB33_X0Y195 IO_L2P_T0_12
44 AB14 12 IOB_X0Y171 LIOB33_X0Y171 IO_L14N_T2_SRCC_12
45 AB15 12 IOB_X0Y172 LIOB33_X0Y171 IO_L14P_T2_SRCC_12
46 AB16 12 IOB_X0Y159 LIOB33_X0Y159 IO_L20N_T3_12
47 AB17 12 IOB_X0Y160 LIOB33_X0Y159 IO_L20P_T3_12
48 AB19 13 IOB_X0Y205 LIOB33_X0Y205 IO_L22N_T3_13
49 AB20 13 IOB_X0Y209 LIOB33_X0Y209 IO_L20N_T3_13
50 AB21 13 IOB_X0Y232 LIOB33_X0Y231 IO_L9P_T1_DQS_13
51 AB22 13 IOB_X0Y231 LIOB33_X0Y231 IO_L9N_T1_DQS_13
52 AB24 13 IOB_X0Y237 LIOB33_X0Y237 IO_L6N_T0_VREF_13
53 AB25 13 IOB_X0Y247 LIOB33_X0Y247 IO_L1N_T0_13
54 AB26 13 IOB_X0Y246 LIOB33_X0Y245 IO_L2P_T0_13
55 AC1 111 OPAD_X0Y22 GTX_CHANNEL_3_X249Y150 MGTXTXN3_111
56 AC2 111 OPAD_X0Y23 GTX_CHANNEL_3_X249Y150 MGTXTXP3_111
57 AC5 111 IPAD_X1Y78 GTX_CHANNEL_2_X249Y139 MGTXRXN2_111
58 AC6 111 IPAD_X1Y79 GTX_CHANNEL_2_X249Y139 MGTXRXP2_111
59 AC11 12 IOB_X0Y195 LIOB33_X0Y195 IO_L2N_T0_12
60 AC12 12 IOB_X0Y178 LIOB33_X0Y177 IO_L11P_T1_SRCC_12
61 AC13 12 IOB_X0Y176 LIOB33_X0Y175 IO_L12P_T1_MRCC_12
62 AC14 12 IOB_X0Y174 LIOB33_X0Y173 IO_L13P_T2_MRCC_12
63 AC16 12 IOB_X0Y157 LIOB33_X0Y157 IO_L21N_T3_DQS_12
64 AC17 12 IOB_X0Y158 LIOB33_X0Y157 IO_L21P_T3_DQS_12
65 AC18 13 IOB_X0Y208 LIOB33_X0Y207 IO_L21P_T3_DQS_13
66 AC19 13 IOB_X0Y207 LIOB33_X0Y207 IO_L21N_T3_DQS_13
67 AC21 13 IOB_X0Y222 LIOB33_X0Y221 IO_L14P_T2_SRCC_13
68 AC22 13 IOB_X0Y221 LIOB33_X0Y221 IO_L14N_T2_SRCC_13
69 AC23 13 IOB_X0Y226 LIOB33_X0Y225 IO_L12P_T1_MRCC_13
70 AC24 13 IOB_X0Y225 LIOB33_X0Y225 IO_L12N_T1_MRCC_13
71 AC26 13 IOB_X0Y245 LIOB33_X0Y245 IO_L2N_T0_13
72 AD3 111 IPAD_X1Y84 GTX_CHANNEL_3_X249Y150 MGTXRXN3_111
73 AD4 111 IPAD_X1Y85 GTX_CHANNEL_3_X249Y150 MGTXRXP3_111
74 AD7 111 IPAD_X1Y60 GTX_CHANNEL_0_X249Y110 MGTXRXN0_111
75 AD8 111 IPAD_X1Y61 GTX_CHANNEL_0_X249Y110 MGTXRXP0_111
76 AD10 12 IOB_X0Y185 LIOB33_X0Y185 IO_L7N_T1_12
77 AD11 12 IOB_X0Y177 LIOB33_X0Y177 IO_L11N_T1_SRCC_12
78 AD13 12 IOB_X0Y175 LIOB33_X0Y175 IO_L12N_T1_MRCC_12
79 AD14 12 IOB_X0Y173 LIOB33_X0Y173 IO_L13N_T2_MRCC_12
80 AD15 12 IOB_X0Y169 LIOB33_X0Y169 IO_L15N_T2_DQS_12
81 AD16 12 IOB_X0Y170 LIOB33_X0Y169 IO_L15P_T2_DQS_12
82 AD18 13 IOB_X0Y216 LIOB33_X0Y215 IO_L17P_T2_13
83 AD19 13 IOB_X0Y215 LIOB33_X0Y215 IO_L17N_T2_13
84 AD20 13 IOB_X0Y224 LIOB33_X0Y223 IO_L13P_T2_MRCC_13
85 AD21 13 IOB_X0Y223 LIOB33_X0Y223 IO_L13N_T2_MRCC_13
86 AD23 13 IOB_X0Y228 LIOB33_X0Y227 IO_L11P_T1_SRCC_13
87 AD24 13 IOB_X0Y227 LIOB33_X0Y227 IO_L11N_T1_SRCC_13
88 AD25 13 IOB_X0Y242 LIOB33_X0Y241 IO_L4P_T0_13
89 AD26 13 IOB_X0Y241 LIOB33_X0Y241 IO_L4N_T0_13
90 AE1 111 OPAD_X0Y20 GTX_CHANNEL_2_X249Y139 MGTXTXN2_111
91 AE2 111 OPAD_X0Y21 GTX_CHANNEL_2_X249Y139 MGTXTXP2_111
92 AE5 111 IPAD_X1Y66 GTX_CHANNEL_1_X249Y121 MGTXRXN1_111
93 AE6 111 IPAD_X1Y67 GTX_CHANNEL_1_X249Y121 MGTXRXP1_111
94 AE10 12 IOB_X0Y186 LIOB33_X0Y185 IO_L7P_T1_12
95 AE11 12 IOB_X0Y182 LIOB33_X0Y181 IO_L9P_T1_DQS_12
96 AE12 12 IOB_X0Y184 LIOB33_X0Y183 IO_L8P_T1_12
97 AE13 12 IOB_X0Y180 LIOB33_X0Y179 IO_L10P_T1_12
98 AE15 12 IOB_X0Y165 LIOB33_X0Y165 IO_L17N_T2_12
99 AE16 12 IOB_X0Y166 LIOB33_X0Y165 IO_L17P_T2_12
100 AE17 12 IOB_X0Y164 LIOB33_X0Y163 IO_L18P_T2_12
101 AE18 13 IOB_X0Y214 LIOB33_X0Y213 IO_L18P_T2_13
102 AE20 13 IOB_X0Y218 LIOB33_X0Y217 IO_L16P_T2_13
103 AE21 13 IOB_X0Y217 LIOB33_X0Y217 IO_L16N_T2_13
104 AE22 13 IOB_X0Y236 LIOB33_X0Y235 IO_L7P_T1_13
105 AE23 13 IOB_X0Y234 LIOB33_X0Y233 IO_L8P_T1_13
106 AE25 13 IOB_X0Y244 LIOB33_X0Y243 IO_L3P_T0_DQS_13
107 AE26 13 IOB_X0Y243 LIOB33_X0Y243 IO_L3N_T0_DQS_13
108 AF3 111 OPAD_X0Y18 GTX_CHANNEL_1_X249Y121 MGTXTXN1_111
109 AF4 111 OPAD_X0Y19 GTX_CHANNEL_1_X249Y121 MGTXTXP1_111
110 AF7 111 OPAD_X0Y16 GTX_CHANNEL_0_X249Y110 MGTXTXN0_111
111 AF8 111 OPAD_X0Y17 GTX_CHANNEL_0_X249Y110 MGTXTXP0_111
112 AF10 12 IOB_X0Y181 LIOB33_X0Y181 IO_L9N_T1_DQS_12
113 AF12 12 IOB_X0Y183 LIOB33_X0Y183 IO_L8N_T1_12
114 AF13 12 IOB_X0Y179 LIOB33_X0Y179 IO_L10N_T1_12
115 AF14 12 IOB_X0Y167 LIOB33_X0Y167 IO_L16N_T2_12
116 AF15 12 IOB_X0Y168 LIOB33_X0Y167 IO_L16P_T2_12
117 AF17 12 IOB_X0Y163 LIOB33_X0Y163 IO_L18N_T2_12
118 AF18 13 IOB_X0Y213 LIOB33_X0Y213 IO_L18N_T2_13
119 AF19 13 IOB_X0Y220 LIOB33_X0Y219 IO_L15P_T2_DQS_13
120 AF20 13 IOB_X0Y219 LIOB33_X0Y219 IO_L15N_T2_DQS_13
121 AF22 13 IOB_X0Y235 LIOB33_X0Y235 IO_L7N_T1_13
122 AF23 13 IOB_X0Y233 LIOB33_X0Y233 IO_L8N_T1_13
123 AF24 13 IOB_X0Y240 LIOB33_X0Y239 IO_L5P_T0_13
124 AF25 13 IOB_X0Y239 LIOB33_X0Y239 IO_L5N_T0_13
125 B1 34 IOB_X1Y253 RIOB18_X107Y253 IO_L23N_T3_34
126 B2 34 IOB_X1Y252 RIOB18_X107Y251 IO_L24P_T3_34
127 B4 34 IOB_X1Y259 RIOB18_X107Y259 IO_L20N_T3_34
128 B5 34 IOB_X1Y260 RIOB18_X107Y259 IO_L20P_T3_34
129 B6 34 IOB_X1Y258 RIOB18_X107Y257 IO_L21P_T3_DQS_34
130 B7 34 IOB_X1Y264 RIOB18_X107Y263 IO_L18P_T2_34
131 B9 34 IOB_X1Y269 RIOB18_X107Y269 IO_L15N_T2_DQS_34
132 B10 34 IOB_X1Y268 RIOB18_X107Y267 IO_L16P_T2_34
133 B11 35 IOB_X1Y303 RIOB18_X107Y303 IO_L23N_T3_35
134 B12 35 IOB_X1Y305 RIOB18_X107Y305 IO_L22N_T3_AD7N_35
135 B14 35 IOB_X1Y309 RIOB18_X107Y309 IO_L20N_T3_AD6N_35
136 B15 35 IOB_X1Y315 RIOB18_X107Y315 IO_L17N_T2_AD5N_35
137 B16 35 IOB_X1Y316 RIOB18_X107Y315 IO_L17P_T2_AD5P_35
138 B17 35 IOB_X1Y314 RIOB18_X107Y313 IO_L18P_T2_AD13P_35
139 B19 501 IOPAD_X1Y124 PSS2_X32Y313 PS_MIO47_501
140 B20 501 IOPAD_X1Y128 PSS2_X32Y313 PS_MIO51_501
141 B21 501 IOPAD_X1Y125 PSS2_X32Y313 PS_MIO48_501
142 B22 501 IOPAD_X1Y127 PSS2_X32Y313 PS_MIO50_501
143 B24 500 IOPAD_X1Y26 PSS2_X32Y313 PS_CLK_500
144 B25 500 IOPAD_X1Y90 PSS2_X32Y313 PS_MIO13_500
145 B26 500 IOPAD_X1Y88 PSS2_X32Y313 PS_MIO11_500
146 C1 33 IOB_X1Y241 RIOB18_X107Y241 IO_L4N_T0_33
147 C2 34 IOB_X1Y254 RIOB18_X107Y253 IO_L23P_T3_34
148 C3 34 IOB_X1Y261 RIOB18_X107Y261 IO_L19N_T3_VREF_34
149 C4 34 IOB_X1Y262 RIOB18_X107Y261 IO_L19P_T3_34
150 C6 34 IOB_X1Y271 RIOB18_X107Y271 IO_L14N_T2_SRCC_34
151 C7 34 IOB_X1Y273 RIOB18_X107Y273 IO_L13N_T2_MRCC_34
152 C8 34 IOB_X1Y274 RIOB18_X107Y273 IO_L13P_T2_MRCC_34
153 C9 34 IOB_X1Y270 RIOB18_X107Y269 IO_L15P_T2_DQS_34
154 C11 35 IOB_X1Y304 RIOB18_X107Y303 IO_L23P_T3_35
155 C12 35 IOB_X1Y306 RIOB18_X107Y305 IO_L22P_T3_AD7P_35
156 C13 35 IOB_X1Y311 RIOB18_X107Y311 IO_L19N_T3_VREF_35
157 C14 35 IOB_X1Y310 RIOB18_X107Y309 IO_L20P_T3_AD6P_35
158 C16 35 IOB_X1Y319 RIOB18_X107Y319 IO_L15N_T2_DQS_AD12N_35
159 C17 35 IOB_X1Y320 RIOB18_X107Y319 IO_L15P_T2_DQS_AD12P_35
160 C18 501 IOPAD_X1Y122 PSS2_X32Y313 PS_MIO45_501
161 C19 501 IOPAD_X1Y118 PSS2_X32Y313 PS_MIO41_501
162 C21 501 IOPAD_X1Y116 PSS2_X32Y313 PS_MIO39_501
163 C22 501 IOPAD_X1Y117 PSS2_X32Y313 PS_MIO40_501
164 C23 500 IOPAD_X1Y132 PSS2_X32Y313 PS_POR_B_500
165 C24 500 IOPAD_X1Y92 PSS2_X32Y313 PS_MIO15_500
166 C26 500 IOPAD_X1Y82 PSS2_X32Y313 PS_MIO5_500
167 D1 33 IOB_X1Y242 RIOB18_X107Y241 IO_L4P_T0_33
168 D3 33 IOB_X1Y245 RIOB18_X107Y245 IO_L2N_T0_33
169 D4 33 IOB_X1Y246 RIOB18_X107Y245 IO_L2P_T0_33
170 D5 34 IOB_X1Y279 RIOB18_X107Y279 IO_L10N_T1_34
171 D6 34 IOB_X1Y272 RIOB18_X107Y271 IO_L14P_T2_SRCC_34
172 D8 34 IOB_X1Y283 RIOB18_X107Y283 IO_L8N_T1_34
173 D9 34 IOB_X1Y284 RIOB18_X107Y283 IO_L8P_T1_34
174 D10 35 IOB_X1Y345 RIOB18_X107Y345 IO_L2N_T0_AD8N_35
175 D11 35 IOB_X1Y341 RIOB18_X107Y341 IO_L4N_T0_35
176 D13 35 IOB_X1Y312 RIOB18_X107Y311 IO_L19P_T3_35
177 D14 35 IOB_X1Y323 RIOB18_X107Y323 IO_L13N_T2_MRCC_35
178 D15 35 IOB_X1Y324 RIOB18_X107Y323 IO_L13P_T2_MRCC_35
179 D16 35 IOB_X1Y317 RIOB18_X107Y317 IO_L16N_T2_35
180 D18 501 IOPAD_X1Y120 PSS2_X32Y313 PS_MIO43_501
181 D19 501 IOPAD_X1Y112 PSS2_X32Y313 PS_MIO35_501
182 D20 501 IOPAD_X1Y114 PSS2_X32Y313 PS_MIO37_501
183 D21 501 IOPAD_X1Y115 PSS2_X32Y313 PS_MIO38_501
184 D23 500 IOPAD_X1Y91 PSS2_X32Y313 PS_MIO14_500
185 D24 500 IOPAD_X1Y86 PSS2_X32Y313 PS_MIO9_500
186 D25 500 IOPAD_X1Y80 PSS2_X32Y313 PS_MIO3_500
187 D26 500 IOPAD_X1Y78 PSS2_X32Y313 PS_MIO1_500
188 E1 33 IOB_X1Y239 RIOB18_X107Y239 IO_L5N_T0_33
189 E2 33 IOB_X1Y240 RIOB18_X107Y239 IO_L5P_T0_33
190 E3 33 IOB_X1Y237 RIOB18_X107Y237 IO_L6N_T0_VREF_33
191 E5 34 IOB_X1Y285 RIOB18_X107Y285 IO_L7N_T1_34
192 E6 34 IOB_X1Y280 RIOB18_X107Y279 IO_L10P_T1_34
193 E7 34 IOB_X1Y277 RIOB18_X107Y277 IO_L11N_T1_SRCC_34
194 E8 34 IOB_X1Y281 RIOB18_X107Y281 IO_L9N_T1_DQS_34
195 E10 35 IOB_X1Y346 RIOB18_X107Y345 IO_L2P_T0_AD8P_35
196 E11 35 IOB_X1Y342 RIOB18_X107Y341 IO_L4P_T0_35
197 E12 35 IOB_X1Y347 RIOB18_X107Y347 IO_L1N_T0_AD0N_35
198 E13 35 IOB_X1Y337 RIOB18_X107Y337 IO_L6N_T0_VREF_35
199 E15 35 IOB_X1Y321 RIOB18_X107Y321 IO_L14N_T2_AD4N_SRCC_35
200 E16 35 IOB_X1Y318 RIOB18_X107Y317 IO_L16P_T2_35
201 E17 501 IOPAD_X1Y123 PSS2_X32Y313 PS_MIO46_501
202 E18 501 IOPAD_X1Y121 PSS2_X32Y313 PS_MIO44_501
203 E20 501 IOPAD_X1Y106 PSS2_X32Y313 PS_MIO29_501
204 E21 501 IOPAD_X1Y108 PSS2_X32Y313 PS_MIO31_501
205 E22 501 IOPAD_X1Y110 PSS2_X32Y313 PS_MIO33_501
206 E23 500 IOPAD_X1Y84 PSS2_X32Y313 PS_MIO7_500
207 E25 500 IOPAD_X1Y79 PSS2_X32Y313 PS_MIO2_500
208 E26 500 IOPAD_X1Y77 PSS2_X32Y313 PS_MIO0_500
209 F2 33 IOB_X1Y243 RIOB18_X107Y243 IO_L3N_T0_DQS_33
210 F3 33 IOB_X1Y238 RIOB18_X107Y237 IO_L6P_T0_33
211 F4 33 IOB_X1Y247 RIOB18_X107Y247 IO_L1N_T0_33
212 F5 34 IOB_X1Y286 RIOB18_X107Y285 IO_L7P_T1_34
213 F7 34 IOB_X1Y275 RIOB18_X107Y275 IO_L12N_T1_MRCC_34
214 F8 34 IOB_X1Y278 RIOB18_X107Y277 IO_L11P_T1_SRCC_34
215 F9 34 IOB_X1Y282 RIOB18_X107Y281 IO_L9P_T1_DQS_34
216 F10 35 IOB_X1Y343 RIOB18_X107Y343 IO_L3N_T0_DQS_AD1N_35
217 F12 35 IOB_X1Y348 RIOB18_X107Y347 IO_L1P_T0_AD0P_35
218 F13 35 IOB_X1Y338 RIOB18_X107Y337 IO_L6P_T0_35
219 F14 35 IOB_X1Y327 RIOB18_X107Y327 IO_L11N_T1_SRCC_35
220 F15 35 IOB_X1Y322 RIOB18_X107Y321 IO_L14P_T2_AD4P_SRCC_35
221 F17 501 IOPAD_X1Y119 PSS2_X32Y313 PS_MIO42_501
222 F18 501 IOPAD_X1Y104 PSS2_X32Y313 PS_MIO27_501
223 F19 501 IOPAD_X1Y102 PSS2_X32Y313 PS_MIO25_501
224 F20 501 IOPAD_X1Y100 PSS2_X32Y313 PS_MIO23_501
225 F22 501 IOPAD_X1Y98 PSS2_X32Y313 PS_MIO21_501
226 F23 500 IOPAD_X1Y83 PSS2_X32Y313 PS_MIO6_500
227 F24 500 IOPAD_X1Y81 PSS2_X32Y313 PS_MIO4_500
228 F25 502 IOPAD_X1Y33 PSS2_X32Y313 PS_DDR_DQ1_502
229 G1 33 IOB_X1Y229 RIOB18_X107Y229 IO_L10N_T1_33
230 G2 33 IOB_X1Y244 RIOB18_X107Y243 IO_L3P_T0_DQS_33
231 G4 33 IOB_X1Y248 RIOB18_X107Y247 IO_L1P_T0_33
232 G5 34 IOB_X1Y295 RIOB18_X107Y295 IO_L2N_T0_34
233 G6 34 IOB_X1Y296 RIOB18_X107Y295 IO_L2P_T0_34
234 G7 34 IOB_X1Y276 RIOB18_X107Y275 IO_L12P_T1_MRCC_34
235 G9 34 IOB_X1Y293 RIOB18_X107Y293 IO_L3N_T0_DQS_34
236 G10 35 IOB_X1Y344 RIOB18_X107Y343 IO_L3P_T0_DQS_AD1P_35
237 G11 35 IOB_X1Y339 RIOB18_X107Y339 IO_L5N_T0_AD9N_35
238 G12 35 IOB_X1Y340 RIOB18_X107Y339 IO_L5P_T0_AD9P_35
239 G14 35 IOB_X1Y328 RIOB18_X107Y327 IO_L11P_T1_SRCC_35
240 G15 35 IOB_X1Y329 RIOB18_X107Y329 IO_L10N_T1_AD11N_35
241 G16 35 IOB_X1Y330 RIOB18_X107Y329 IO_L10P_T1_AD11P_35
242 G17 501 IOPAD_X1Y94 PSS2_X32Y313 PS_MIO17_501
243 G19 501 IOPAD_X1Y96 PSS2_X32Y313 PS_MIO19_501
244 G20 501 IOPAD_X1Y95 PSS2_X32Y313 PS_MIO18_501
245 G21 501 IOPAD_X1Y93 PSS2_X32Y313 PS_MIO16_501
246 G22 501 IOPAD_X1Y99 PSS2_X32Y313 PS_MIO22_501
247 G24 502 IOPAD_X1Y28 PSS2_X32Y313 PS_DDR_DM0_502
248 G25 502 IOPAD_X1Y64 PSS2_X32Y313 PS_DDR_DQS_N0_502
249 G26 502 IOPAD_X1Y35 PSS2_X32Y313 PS_DDR_DQ3_502
250 H1 33 IOB_X1Y235 RIOB18_X107Y235 IO_L7N_T1_33
251 H2 33 IOB_X1Y230 RIOB18_X107Y229 IO_L10P_T1_33
252 H3 33 IOB_X1Y233 RIOB18_X107Y233 IO_L8N_T1_33
253 H4 33 IOB_X1Y234 RIOB18_X107Y233 IO_L8P_T1_33
254 H6 34 IOB_X1Y291 RIOB18_X107Y291 IO_L4N_T0_34
255 H7 34 IOB_X1Y292 RIOB18_X107Y291 IO_L4P_T0_34
256 H8 34 IOB_X1Y287 RIOB18_X107Y287 IO_L6N_T0_VREF_34
257 H9 34 IOB_X1Y294 RIOB18_X107Y293 IO_L3P_T0_DQS_PUDC_B_34
258 H11 34 IOB_X1Y297 RIOB18_X107Y297 IO_L1N_T0_34
259 H12 35 IOB_X1Y335 RIOB18_X107Y335 IO_L7N_T1_AD2N_35
260 H13 35 IOB_X1Y336 RIOB18_X107Y335 IO_L7P_T1_AD2P_35
261 H14 35 IOB_X1Y325 RIOB18_X107Y325 IO_L12N_T1_MRCC_35
262 H16 35 IOB_X1Y349 RIOB18_SING_X107Y349 IO_0_VRN_35
263 H17 501 IOPAD_X1Y103 PSS2_X32Y313 PS_MIO26_501
264 H19 501 IOPAD_X1Y97 PSS2_X32Y313 PS_MIO20_501
265 H21 502 IOPAD_X1Y15 PSS2_X32Y313 PS_DDR_A11_502
266 H22 502 IOPAD_X1Y72 PSS2_X32Y313 PS_DDR_DRST_B_502
267 H23 502 IOPAD_X1Y37 PSS2_X32Y313 PS_DDR_DQ5_502
268 H24 502 IOPAD_X1Y68 PSS2_X32Y313 PS_DDR_DQS_P0_502
269 H26 502 IOPAD_X1Y36 PSS2_X32Y313 PS_DDR_DQ4_502
270 J1 33 IOB_X1Y236 RIOB18_X107Y235 IO_L7P_T1_33
271 J3 33 IOB_X1Y225 RIOB18_X107Y225 IO_L12N_T1_MRCC_33
272 J4 33 IOB_X1Y226 RIOB18_X107Y225 IO_L12P_T1_MRCC_33
273 J5 33 IOB_X1Y209 RIOB18_X107Y209 IO_L20N_T3_33
274 J6 33 IOB_X1Y205 RIOB18_X107Y205 IO_L22N_T3_33
275 J8 34 IOB_X1Y288 RIOB18_X107Y287 IO_L6P_T0_34
276 J9 34 IOB_X1Y289 RIOB18_X107Y289 IO_L5N_T0_34
277 J10 34 IOB_X1Y290 RIOB18_X107Y289 IO_L5P_T0_34
278 J11 34 IOB_X1Y298 RIOB18_X107Y297 IO_L1P_T0_34
279 J13 35 IOB_X1Y333 RIOB18_X107Y333 IO_L8N_T1_AD10N_35
280 J14 35 IOB_X1Y326 RIOB18_X107Y325 IO_L12P_T1_MRCC_35
281 J15 35 IOB_X1Y331 RIOB18_X107Y331 IO_L9N_T1_DQS_AD3N_35
282 J16 501 IOPAD_X1Y111 PSS2_X32Y313 PS_MIO34_501
283 J18 501 IOPAD_X1Y105 PSS2_X32Y313 PS_MIO28_501
284 J19 501 IOPAD_X1Y101 PSS2_X32Y313 PS_MIO24_501
285 J20 502 IOPAD_X1Y18 PSS2_X32Y313 PS_DDR_A13_502
286 J21 502 IOPAD_X1Y11 PSS2_X32Y313 PS_DDR_A7_502
287 J23 502 IOPAD_X1Y39 PSS2_X32Y313 PS_DDR_DQ7_502
288 J24 502 IOPAD_X1Y38 PSS2_X32Y313 PS_DDR_DQ6_502
289 J25 502 IOPAD_X1Y34 PSS2_X32Y313 PS_DDR_DQ2_502
290 J26 502 IOPAD_X1Y32 PSS2_X32Y313 PS_DDR_DQ0_502
291 K1 33 IOB_X1Y231 RIOB18_X107Y231 IO_L9N_T1_DQS_33
292 K2 33 IOB_X1Y232 RIOB18_X107Y231 IO_L9P_T1_DQS_33
293 K3 33 IOB_X1Y227 RIOB18_X107Y227 IO_L11N_T1_SRCC_33
294 K5 33 IOB_X1Y210 RIOB18_X107Y209 IO_L20P_T3_33
295 K6 33 IOB_X1Y206 RIOB18_X107Y205 IO_L22P_T3_33
296 K7 33 IOB_X1Y201 RIOB18_X107Y201 IO_L24N_T3_33
297 K8 33 IOB_X1Y202 RIOB18_X107Y201 IO_L24P_T3_33
298 K10 34 IOB_X1Y250 RIOB18_SING_X107Y250 IO_25_VRP_34
299 K11 34 IOB_X1Y299 RIOB18_SING_X107Y299 IO_0_VRN_34
300 K12 35 IOB_X1Y300 RIOB18_SING_X107Y300 IO_25_VRP_35
301 K13 35 IOB_X1Y334 RIOB18_X107Y333 IO_L8P_T1_AD10P_35
302 K15 35 IOB_X1Y332 RIOB18_X107Y331 IO_L9P_T1_DQS_AD3P_35
303 K16 501 IOPAD_X1Y113 PSS2_X32Y313 PS_MIO36_501
304 K17 501 IOPAD_X1Y109 PSS2_X32Y313 PS_MIO32_501
305 K19 501 IOPAD_X1Y107 PSS2_X32Y313 PS_MIO30_501
306 K20 502 IOPAD_X1Y5 PSS2_X32Y313 PS_DDR_A1_502
307 K22 502 IOPAD_X1Y4 PSS2_X32Y313 PS_DDR_A0_502
308 K23 502 IOPAD_X1Y43 PSS2_X32Y313 PS_DDR_DQ11_502
309 K25 502 IOPAD_X1Y29 PSS2_X32Y313 PS_DDR_DM1_502
310 K26 502 IOPAD_X1Y40 PSS2_X32Y313 PS_DDR_DQ8_502
311 L2 33 IOB_X1Y217 RIOB18_X107Y217 IO_L16N_T2_33
312 L3 33 IOB_X1Y228 RIOB18_X107Y227 IO_L11P_T1_SRCC_33
313 L4 33 IOB_X1Y221 RIOB18_X107Y221 IO_L14N_T2_SRCC_33
314 L5 33 IOB_X1Y222 RIOB18_X107Y221 IO_L14P_T2_SRCC_33
315 L7 33 IOB_X1Y211 RIOB18_X107Y211 IO_L19N_T3_VREF_33
316 L8 33 IOB_X1Y207 RIOB18_X107Y207 IO_L21N_T3_DQS_33
317 L9 33 IOB_X1Y249 RIOB18_SING_X107Y249 IO_0_VRN_33
318 L20 502 IOPAD_X1Y10 PSS2_X32Y313 PS_DDR_A6_502
319 L22 502 IOPAD_X1Y7 PSS2_X32Y313 PS_DDR_A3_502
320 L23 502 IOPAD_X1Y41 PSS2_X32Y313 PS_DDR_DQ9_502
321 L24 502 IOPAD_X1Y69 PSS2_X32Y313 PS_DDR_DQS_P1_502
322 L25 502 IOPAD_X1Y65 PSS2_X32Y313 PS_DDR_DQS_N1_502
323 M1 33 IOB_X1Y213 RIOB18_X107Y213 IO_L18N_T2_33
324 M2 33 IOB_X1Y218 RIOB18_X107Y217 IO_L16P_T2_33
325 M4 33 IOB_X1Y215 RIOB18_X107Y215 IO_L17N_T2_33
326 M5 33 IOB_X1Y223 RIOB18_X107Y223 IO_L13N_T2_MRCC_33
327 M6 33 IOB_X1Y224 RIOB18_X107Y223 IO_L13P_T2_MRCC_33
328 M7 33 IOB_X1Y212 RIOB18_X107Y211 IO_L19P_T3_33
329 M8 33 IOB_X1Y208 RIOB18_X107Y207 IO_L21P_T3_DQS_33
330 M20 502 IOPAD_X1Y8 PSS2_X32Y313 PS_DDR_A4_502
331 M22 502 IOPAD_X1Y14 PSS2_X32Y313 PS_DDR_A10_502
332 M24 502 IOPAD_X1Y46 PSS2_X32Y313 PS_DDR_DQ14_502
333 M25 502 IOPAD_X1Y44 PSS2_X32Y313 PS_DDR_DQ12_502
334 M26 502 IOPAD_X1Y42 PSS2_X32Y313 PS_DDR_DQ10_502
335 N1 33 IOB_X1Y214 RIOB18_X107Y213 IO_L18P_T2_33
336 N2 33 IOB_X1Y219 RIOB18_X107Y219 IO_L15N_T2_DQS_33
337 N3 33 IOB_X1Y220 RIOB18_X107Y219 IO_L15P_T2_DQS_33
338 N4 33 IOB_X1Y216 RIOB18_X107Y215 IO_L17P_T2_33
339 N6 33 IOB_X1Y203 RIOB18_X107Y203 IO_L23N_T3_33
340 N7 33 IOB_X1Y204 RIOB18_X107Y203 IO_L23P_T3_33
341 N8 33 IOB_X1Y200 RIOB18_SING_X107Y200 IO_25_VRP_33
342 N14 0 IPAD_X0Y120 MONITOR_BOT_PELE1_X197Y339 VP_0
343 N21 502 IOPAD_X1Y6 PSS2_X32Y313 PS_DDR_A2_502
344 N22 502 IOPAD_X1Y9 PSS2_X32Y313 PS_DDR_A5_502
345 N23 502 IOPAD_X1Y47 PSS2_X32Y313 PS_DDR_DQ15_502
346 N24 502 IOPAD_X1Y45 PSS2_X32Y313 PS_DDR_DQ13_502
347 N26 502 IOPAD_X1Y50 PSS2_X32Y313 PS_DDR_DQ18_502
348 P13 0 IPAD_X0Y121 MONITOR_BOT_PELE1_X197Y339 VN_0
349 P20 502 IOPAD_X1Y16 PSS2_X32Y313 PS_DDR_A12_502
350 P21 502 IOPAD_X1Y24 PSS2_X32Y313 PS_DDR_CKN_502
351 P23 502 IOPAD_X1Y51 PSS2_X32Y313 PS_DDR_DQ19_502
352 P24 502 IOPAD_X1Y49 PSS2_X32Y313 PS_DDR_DQ17_502
353 P25 502 IOPAD_X1Y70 PSS2_X32Y313 PS_DDR_DQS_P2_502
354 P26 502 IOPAD_X1Y30 PSS2_X32Y313 PS_DDR_DM2_502
355 R1 112 OPAD_X0Y30 GTX_CHANNEL_3_X249Y202 MGTXTXN3_112
356 R2 112 OPAD_X0Y31 GTX_CHANNEL_3_X249Y202 MGTXTXP3_112
357 R5 112 IPAD_X1Y99 GTX_COMMON_X249Y179 MGTREFCLK0N_112
358 R6 112 IPAD_X1Y98 GTX_COMMON_X249Y179 MGTREFCLK0P_112
359 R20 502 IOPAD_X1Y17 PSS2_X32Y313 PS_DDR_A14_502
360 R21 502 IOPAD_X1Y25 PSS2_X32Y313 PS_DDR_CKP_502
361 R22 502 IOPAD_X1Y21 PSS2_X32Y313 PS_DDR_BA2_502
362 R23 502 IOPAD_X1Y55 PSS2_X32Y313 PS_DDR_DQ23_502
363 R25 502 IOPAD_X1Y66 PSS2_X32Y313 PS_DDR_DQS_N2_502
364 R26 502 IOPAD_X1Y48 PSS2_X32Y313 PS_DDR_DQ16_502
365 T3 112 IPAD_X1Y114 GTX_CHANNEL_3_X249Y202 MGTXRXN3_112
366 T4 112 IPAD_X1Y115 GTX_CHANNEL_3_X249Y202 MGTXRXP3_112
367 T20 502 IOPAD_X1Y12 PSS2_X32Y313 PS_DDR_A8_502
368 T22 502 IOPAD_X1Y20 PSS2_X32Y313 PS_DDR_BA1_502
369 T23 502 IOPAD_X1Y54 PSS2_X32Y313 PS_DDR_DQ22_502
370 T24 502 IOPAD_X1Y52 PSS2_X32Y313 PS_DDR_DQ20_502
371 T25 502 IOPAD_X1Y53 PSS2_X32Y313 PS_DDR_DQ21_502
372 U1 112 OPAD_X0Y28 GTX_CHANNEL_2_X249Y191 MGTXTXN2_112
373 U2 112 OPAD_X0Y29 GTX_CHANNEL_2_X249Y191 MGTXTXP2_112
374 U5 112 IPAD_X1Y101 GTX_COMMON_X249Y179 MGTREFCLK1N_112
375 U6 112 IPAD_X1Y100 GTX_COMMON_X249Y179 MGTREFCLK1P_112
376 U20 502 IOPAD_X1Y13 PSS2_X32Y313 PS_DDR_A9_502
377 U21 502 IOPAD_X1Y23 PSS2_X32Y313 PS_DDR_CKE_502
378 U22 502 IOPAD_X1Y19 PSS2_X32Y313 PS_DDR_BA0_502
379 U24 502 IOPAD_X1Y58 PSS2_X32Y313 PS_DDR_DQ26_502
380 U25 502 IOPAD_X1Y59 PSS2_X32Y313 PS_DDR_DQ27_502
381 U26 502 IOPAD_X1Y57 PSS2_X32Y313 PS_DDR_DQ25_502
382 V3 112 IPAD_X1Y108 GTX_CHANNEL_2_X249Y191 MGTXRXN2_112
383 V4 112 IPAD_X1Y109 GTX_CHANNEL_2_X249Y191 MGTXRXP2_112
384 V18 13 IOB_X0Y200 LIOB33_SING_X0Y200 IO_25_13
385 V19 13 IOB_X0Y249 LIOB33_SING_X0Y249 IO_0_13
386 V21 502 IOPAD_X1Y2 PSS2_X32Y313 PS_DDR_VRN_502
387 V22 502 IOPAD_X1Y1 PSS2_X32Y313 PS_DDR_WE_B_502
388 V23 502 IOPAD_X1Y133 PSS2_X32Y313 PS_DDR_RAS_B_502
389 V24 502 IOPAD_X1Y56 PSS2_X32Y313 PS_DDR_DQ24_502
390 V26 502 IOPAD_X1Y31 PSS2_X32Y313 PS_DDR_DM3_502
391 W1 112 OPAD_X0Y26 GTX_CHANNEL_1_X249Y173 MGTXTXN1_112
392 W2 112 OPAD_X0Y27 GTX_CHANNEL_1_X249Y173 MGTXTXP1_112
393 W5 111 IPAD_X1Y69 GTX_COMMON_X249Y127 MGTREFCLK0N_111
394 W6 111 IPAD_X1Y68 GTX_COMMON_X249Y127 MGTREFCLK0P_111
395 W13 12 IOB_X0Y190 LIOB33_X0Y189 IO_L5P_T0_12
396 W14 12 IOB_X0Y199 LIOB33_SING_X0Y199 IO_0_12
397 W15 12 IOB_X0Y151 LIOB33_X0Y151 IO_L24N_T3_12
398 W16 12 IOB_X0Y152 LIOB33_X0Y151 IO_L24P_T3_12
399 W17 12 IOB_X0Y150 LIOB33_SING_X0Y150 IO_25_12
400 W18 13 IOB_X0Y204 LIOB33_X0Y203 IO_L23P_T3_13
401 W19 13 IOB_X0Y203 LIOB33_X0Y203 IO_L23N_T3_13
402 W20 13 IOB_X0Y212 LIOB33_X0Y211 IO_L19P_T3_13
403 W21 502 IOPAD_X1Y3 PSS2_X32Y313 PS_DDR_VRP_502
404 W23 502 IOPAD_X1Y63 PSS2_X32Y313 PS_DDR_DQ31_502
405 W24 502 IOPAD_X1Y71 PSS2_X32Y313 PS_DDR_DQS_P3_502
406 W25 502 IOPAD_X1Y67 PSS2_X32Y313 PS_DDR_DQS_N3_502
407 W26 502 IOPAD_X1Y60 PSS2_X32Y313 PS_DDR_DQ28_502
408 Y3 112 IPAD_X1Y96 GTX_CHANNEL_1_X249Y173 MGTXRXN1_112
409 Y4 112 IPAD_X1Y97 GTX_CHANNEL_1_X249Y173 MGTXRXP1_112
410 Y10 12 IOB_X0Y194 LIOB33_X0Y193 IO_L3P_T0_DQS_12
411 Y11 12 IOB_X0Y197 LIOB33_X0Y197 IO_L1N_T0_12
412 Y12 12 IOB_X0Y198 LIOB33_X0Y197 IO_L1P_T0_12
413 Y13 12 IOB_X0Y189 LIOB33_X0Y189 IO_L5N_T0_12
414 Y15 12 IOB_X0Y153 LIOB33_X0Y153 IO_L23N_T3_12
415 Y16 12 IOB_X0Y154 LIOB33_X0Y153 IO_L23P_T3_12
416 Y17 12 IOB_X0Y162 LIOB33_X0Y161 IO_L19P_T3_12
417 Y18 13 IOB_X0Y202 LIOB33_X0Y201 IO_L24P_T3_13
418 Y20 13 IOB_X0Y211 LIOB33_X0Y211 IO_L19N_T3_VREF_13
419 Y21 502 IOPAD_X1Y27 PSS2_X32Y313 PS_DDR_CS_B_502
420 Y22 502 IOPAD_X1Y131 PSS2_X32Y313 PS_DDR_ODT_502
421 Y23 502 IOPAD_X1Y22 PSS2_X32Y313 PS_DDR_CAS_B_502
422 Y25 502 IOPAD_X1Y61 PSS2_X32Y313 PS_DDR_DQ29_502
423 Y26 502 IOPAD_X1Y62 PSS2_X32Y313 PS_DDR_DQ30_502

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File diff suppressed because it is too large Load Diff

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@ -0,0 +1,423 @@
pin,bank,site,tile,pin_function
A2,34,IOB_X1Y251,RIOB18_X107Y251,IO_L24N_T3_34
A3,34,IOB_X1Y255,RIOB18_X107Y255,IO_L22N_T3_34
A4,34,IOB_X1Y256,RIOB18_X107Y255,IO_L22P_T3_34
A5,34,IOB_X1Y257,RIOB18_X107Y257,IO_L21N_T3_DQS_34
A7,34,IOB_X1Y263,RIOB18_X107Y263,IO_L18N_T2_34
A8,34,IOB_X1Y265,RIOB18_X107Y265,IO_L17N_T2_34
A9,34,IOB_X1Y266,RIOB18_X107Y265,IO_L17P_T2_34
A10,34,IOB_X1Y267,RIOB18_X107Y267,IO_L16N_T2_34
A12,35,IOB_X1Y301,RIOB18_X107Y301,IO_L24N_T3_AD15N_35
A13,35,IOB_X1Y302,RIOB18_X107Y301,IO_L24P_T3_AD15P_35
A14,35,IOB_X1Y307,RIOB18_X107Y307,IO_L21N_T3_DQS_AD14N_35
A15,35,IOB_X1Y308,RIOB18_X107Y307,IO_L21P_T3_DQS_AD14P_35
A17,35,IOB_X1Y313,RIOB18_X107Y313,IO_L18N_T2_AD13N_35
A18,501,IOPAD_X1Y126,PSS2_X32Y313,PS_MIO49_501
A19,501,IOPAD_X1Y130,PSS2_X32Y313,PS_MIO53_501
A20,501,IOPAD_X1Y129,PSS2_X32Y313,PS_MIO52_501
A22,501,IOPAD_X1Y134,PSS2_X32Y313,PS_SRST_B_501
A23,500,IOPAD_X1Y89,PSS2_X32Y313,PS_MIO12_500
A24,500,IOPAD_X1Y85,PSS2_X32Y313,PS_MIO8_500
A25,500,IOPAD_X1Y87,PSS2_X32Y313,PS_MIO10_500
AA1,112,OPAD_X0Y24,GTX_CHANNEL_0_X249Y162,MGTXTXN0_112
AA2,112,OPAD_X0Y25,GTX_CHANNEL_0_X249Y162,MGTXTXP0_112
AA5,111,IPAD_X1Y71,GTX_COMMON_X249Y127,MGTREFCLK1N_111
AA6,111,IPAD_X1Y70,GTX_COMMON_X249Y127,MGTREFCLK1P_111
AA10,12,IOB_X0Y193,LIOB33_X0Y193,IO_L3N_T0_DQS_12
AA12,12,IOB_X0Y187,LIOB33_X0Y187,IO_L6N_T0_VREF_12
AA13,12,IOB_X0Y188,LIOB33_X0Y187,IO_L6P_T0_12
AA14,12,IOB_X0Y155,LIOB33_X0Y155,IO_L22N_T3_12
AA15,12,IOB_X0Y156,LIOB33_X0Y155,IO_L22P_T3_12
AA17,12,IOB_X0Y161,LIOB33_X0Y161,IO_L19N_T3_VREF_12
AA18,13,IOB_X0Y201,LIOB33_X0Y201,IO_L24N_T3_13
AA19,13,IOB_X0Y206,LIOB33_X0Y205,IO_L22P_T3_13
AA20,13,IOB_X0Y210,LIOB33_X0Y209,IO_L20P_T3_13
AA22,13,IOB_X0Y230,LIOB33_X0Y229,IO_L10P_T1_13
AA23,13,IOB_X0Y229,LIOB33_X0Y229,IO_L10N_T1_13
AA24,13,IOB_X0Y238,LIOB33_X0Y237,IO_L6P_T0_13
AA25,13,IOB_X0Y248,LIOB33_X0Y247,IO_L1P_T0_13
AB3,112,IPAD_X1Y90,GTX_CHANNEL_0_X249Y162,MGTXRXN0_112
AB4,112,IPAD_X1Y91,GTX_CHANNEL_0_X249Y162,MGTXRXP0_112
AB10,12,IOB_X0Y191,LIOB33_X0Y191,IO_L4N_T0_12
AB11,12,IOB_X0Y192,LIOB33_X0Y191,IO_L4P_T0_12
AB12,12,IOB_X0Y196,LIOB33_X0Y195,IO_L2P_T0_12
AB14,12,IOB_X0Y171,LIOB33_X0Y171,IO_L14N_T2_SRCC_12
AB15,12,IOB_X0Y172,LIOB33_X0Y171,IO_L14P_T2_SRCC_12
AB16,12,IOB_X0Y159,LIOB33_X0Y159,IO_L20N_T3_12
AB17,12,IOB_X0Y160,LIOB33_X0Y159,IO_L20P_T3_12
AB19,13,IOB_X0Y205,LIOB33_X0Y205,IO_L22N_T3_13
AB20,13,IOB_X0Y209,LIOB33_X0Y209,IO_L20N_T3_13
AB21,13,IOB_X0Y232,LIOB33_X0Y231,IO_L9P_T1_DQS_13
AB22,13,IOB_X0Y231,LIOB33_X0Y231,IO_L9N_T1_DQS_13
AB24,13,IOB_X0Y237,LIOB33_X0Y237,IO_L6N_T0_VREF_13
AB25,13,IOB_X0Y247,LIOB33_X0Y247,IO_L1N_T0_13
AB26,13,IOB_X0Y246,LIOB33_X0Y245,IO_L2P_T0_13
AC1,111,OPAD_X0Y22,GTX_CHANNEL_3_X249Y150,MGTXTXN3_111
AC2,111,OPAD_X0Y23,GTX_CHANNEL_3_X249Y150,MGTXTXP3_111
AC5,111,IPAD_X1Y78,GTX_CHANNEL_2_X249Y139,MGTXRXN2_111
AC6,111,IPAD_X1Y79,GTX_CHANNEL_2_X249Y139,MGTXRXP2_111
AC11,12,IOB_X0Y195,LIOB33_X0Y195,IO_L2N_T0_12
AC12,12,IOB_X0Y178,LIOB33_X0Y177,IO_L11P_T1_SRCC_12
AC13,12,IOB_X0Y176,LIOB33_X0Y175,IO_L12P_T1_MRCC_12
AC14,12,IOB_X0Y174,LIOB33_X0Y173,IO_L13P_T2_MRCC_12
AC16,12,IOB_X0Y157,LIOB33_X0Y157,IO_L21N_T3_DQS_12
AC17,12,IOB_X0Y158,LIOB33_X0Y157,IO_L21P_T3_DQS_12
AC18,13,IOB_X0Y208,LIOB33_X0Y207,IO_L21P_T3_DQS_13
AC19,13,IOB_X0Y207,LIOB33_X0Y207,IO_L21N_T3_DQS_13
AC21,13,IOB_X0Y222,LIOB33_X0Y221,IO_L14P_T2_SRCC_13
AC22,13,IOB_X0Y221,LIOB33_X0Y221,IO_L14N_T2_SRCC_13
AC23,13,IOB_X0Y226,LIOB33_X0Y225,IO_L12P_T1_MRCC_13
AC24,13,IOB_X0Y225,LIOB33_X0Y225,IO_L12N_T1_MRCC_13
AC26,13,IOB_X0Y245,LIOB33_X0Y245,IO_L2N_T0_13
AD3,111,IPAD_X1Y84,GTX_CHANNEL_3_X249Y150,MGTXRXN3_111
AD4,111,IPAD_X1Y85,GTX_CHANNEL_3_X249Y150,MGTXRXP3_111
AD7,111,IPAD_X1Y60,GTX_CHANNEL_0_X249Y110,MGTXRXN0_111
AD8,111,IPAD_X1Y61,GTX_CHANNEL_0_X249Y110,MGTXRXP0_111
AD10,12,IOB_X0Y185,LIOB33_X0Y185,IO_L7N_T1_12
AD11,12,IOB_X0Y177,LIOB33_X0Y177,IO_L11N_T1_SRCC_12
AD13,12,IOB_X0Y175,LIOB33_X0Y175,IO_L12N_T1_MRCC_12
AD14,12,IOB_X0Y173,LIOB33_X0Y173,IO_L13N_T2_MRCC_12
AD15,12,IOB_X0Y169,LIOB33_X0Y169,IO_L15N_T2_DQS_12
AD16,12,IOB_X0Y170,LIOB33_X0Y169,IO_L15P_T2_DQS_12
AD18,13,IOB_X0Y216,LIOB33_X0Y215,IO_L17P_T2_13
AD19,13,IOB_X0Y215,LIOB33_X0Y215,IO_L17N_T2_13
AD20,13,IOB_X0Y224,LIOB33_X0Y223,IO_L13P_T2_MRCC_13
AD21,13,IOB_X0Y223,LIOB33_X0Y223,IO_L13N_T2_MRCC_13
AD23,13,IOB_X0Y228,LIOB33_X0Y227,IO_L11P_T1_SRCC_13
AD24,13,IOB_X0Y227,LIOB33_X0Y227,IO_L11N_T1_SRCC_13
AD25,13,IOB_X0Y242,LIOB33_X0Y241,IO_L4P_T0_13
AD26,13,IOB_X0Y241,LIOB33_X0Y241,IO_L4N_T0_13
AE1,111,OPAD_X0Y20,GTX_CHANNEL_2_X249Y139,MGTXTXN2_111
AE2,111,OPAD_X0Y21,GTX_CHANNEL_2_X249Y139,MGTXTXP2_111
AE5,111,IPAD_X1Y66,GTX_CHANNEL_1_X249Y121,MGTXRXN1_111
AE6,111,IPAD_X1Y67,GTX_CHANNEL_1_X249Y121,MGTXRXP1_111
AE10,12,IOB_X0Y186,LIOB33_X0Y185,IO_L7P_T1_12
AE11,12,IOB_X0Y182,LIOB33_X0Y181,IO_L9P_T1_DQS_12
AE12,12,IOB_X0Y184,LIOB33_X0Y183,IO_L8P_T1_12
AE13,12,IOB_X0Y180,LIOB33_X0Y179,IO_L10P_T1_12
AE15,12,IOB_X0Y165,LIOB33_X0Y165,IO_L17N_T2_12
AE16,12,IOB_X0Y166,LIOB33_X0Y165,IO_L17P_T2_12
AE17,12,IOB_X0Y164,LIOB33_X0Y163,IO_L18P_T2_12
AE18,13,IOB_X0Y214,LIOB33_X0Y213,IO_L18P_T2_13
AE20,13,IOB_X0Y218,LIOB33_X0Y217,IO_L16P_T2_13
AE21,13,IOB_X0Y217,LIOB33_X0Y217,IO_L16N_T2_13
AE22,13,IOB_X0Y236,LIOB33_X0Y235,IO_L7P_T1_13
AE23,13,IOB_X0Y234,LIOB33_X0Y233,IO_L8P_T1_13
AE25,13,IOB_X0Y244,LIOB33_X0Y243,IO_L3P_T0_DQS_13
AE26,13,IOB_X0Y243,LIOB33_X0Y243,IO_L3N_T0_DQS_13
AF3,111,OPAD_X0Y18,GTX_CHANNEL_1_X249Y121,MGTXTXN1_111
AF4,111,OPAD_X0Y19,GTX_CHANNEL_1_X249Y121,MGTXTXP1_111
AF7,111,OPAD_X0Y16,GTX_CHANNEL_0_X249Y110,MGTXTXN0_111
AF8,111,OPAD_X0Y17,GTX_CHANNEL_0_X249Y110,MGTXTXP0_111
AF10,12,IOB_X0Y181,LIOB33_X0Y181,IO_L9N_T1_DQS_12
AF12,12,IOB_X0Y183,LIOB33_X0Y183,IO_L8N_T1_12
AF13,12,IOB_X0Y179,LIOB33_X0Y179,IO_L10N_T1_12
AF14,12,IOB_X0Y167,LIOB33_X0Y167,IO_L16N_T2_12
AF15,12,IOB_X0Y168,LIOB33_X0Y167,IO_L16P_T2_12
AF17,12,IOB_X0Y163,LIOB33_X0Y163,IO_L18N_T2_12
AF18,13,IOB_X0Y213,LIOB33_X0Y213,IO_L18N_T2_13
AF19,13,IOB_X0Y220,LIOB33_X0Y219,IO_L15P_T2_DQS_13
AF20,13,IOB_X0Y219,LIOB33_X0Y219,IO_L15N_T2_DQS_13
AF22,13,IOB_X0Y235,LIOB33_X0Y235,IO_L7N_T1_13
AF23,13,IOB_X0Y233,LIOB33_X0Y233,IO_L8N_T1_13
AF24,13,IOB_X0Y240,LIOB33_X0Y239,IO_L5P_T0_13
AF25,13,IOB_X0Y239,LIOB33_X0Y239,IO_L5N_T0_13
B1,34,IOB_X1Y253,RIOB18_X107Y253,IO_L23N_T3_34
B2,34,IOB_X1Y252,RIOB18_X107Y251,IO_L24P_T3_34
B4,34,IOB_X1Y259,RIOB18_X107Y259,IO_L20N_T3_34
B5,34,IOB_X1Y260,RIOB18_X107Y259,IO_L20P_T3_34
B6,34,IOB_X1Y258,RIOB18_X107Y257,IO_L21P_T3_DQS_34
B7,34,IOB_X1Y264,RIOB18_X107Y263,IO_L18P_T2_34
B9,34,IOB_X1Y269,RIOB18_X107Y269,IO_L15N_T2_DQS_34
B10,34,IOB_X1Y268,RIOB18_X107Y267,IO_L16P_T2_34
B11,35,IOB_X1Y303,RIOB18_X107Y303,IO_L23N_T3_35
B12,35,IOB_X1Y305,RIOB18_X107Y305,IO_L22N_T3_AD7N_35
B14,35,IOB_X1Y309,RIOB18_X107Y309,IO_L20N_T3_AD6N_35
B15,35,IOB_X1Y315,RIOB18_X107Y315,IO_L17N_T2_AD5N_35
B16,35,IOB_X1Y316,RIOB18_X107Y315,IO_L17P_T2_AD5P_35
B17,35,IOB_X1Y314,RIOB18_X107Y313,IO_L18P_T2_AD13P_35
B19,501,IOPAD_X1Y124,PSS2_X32Y313,PS_MIO47_501
B20,501,IOPAD_X1Y128,PSS2_X32Y313,PS_MIO51_501
B21,501,IOPAD_X1Y125,PSS2_X32Y313,PS_MIO48_501
B22,501,IOPAD_X1Y127,PSS2_X32Y313,PS_MIO50_501
B24,500,IOPAD_X1Y26,PSS2_X32Y313,PS_CLK_500
B25,500,IOPAD_X1Y90,PSS2_X32Y313,PS_MIO13_500
B26,500,IOPAD_X1Y88,PSS2_X32Y313,PS_MIO11_500
C1,33,IOB_X1Y241,RIOB18_X107Y241,IO_L4N_T0_33
C2,34,IOB_X1Y254,RIOB18_X107Y253,IO_L23P_T3_34
C3,34,IOB_X1Y261,RIOB18_X107Y261,IO_L19N_T3_VREF_34
C4,34,IOB_X1Y262,RIOB18_X107Y261,IO_L19P_T3_34
C6,34,IOB_X1Y271,RIOB18_X107Y271,IO_L14N_T2_SRCC_34
C7,34,IOB_X1Y273,RIOB18_X107Y273,IO_L13N_T2_MRCC_34
C8,34,IOB_X1Y274,RIOB18_X107Y273,IO_L13P_T2_MRCC_34
C9,34,IOB_X1Y270,RIOB18_X107Y269,IO_L15P_T2_DQS_34
C11,35,IOB_X1Y304,RIOB18_X107Y303,IO_L23P_T3_35
C12,35,IOB_X1Y306,RIOB18_X107Y305,IO_L22P_T3_AD7P_35
C13,35,IOB_X1Y311,RIOB18_X107Y311,IO_L19N_T3_VREF_35
C14,35,IOB_X1Y310,RIOB18_X107Y309,IO_L20P_T3_AD6P_35
C16,35,IOB_X1Y319,RIOB18_X107Y319,IO_L15N_T2_DQS_AD12N_35
C17,35,IOB_X1Y320,RIOB18_X107Y319,IO_L15P_T2_DQS_AD12P_35
C18,501,IOPAD_X1Y122,PSS2_X32Y313,PS_MIO45_501
C19,501,IOPAD_X1Y118,PSS2_X32Y313,PS_MIO41_501
C21,501,IOPAD_X1Y116,PSS2_X32Y313,PS_MIO39_501
C22,501,IOPAD_X1Y117,PSS2_X32Y313,PS_MIO40_501
C23,500,IOPAD_X1Y132,PSS2_X32Y313,PS_POR_B_500
C24,500,IOPAD_X1Y92,PSS2_X32Y313,PS_MIO15_500
C26,500,IOPAD_X1Y82,PSS2_X32Y313,PS_MIO5_500
D1,33,IOB_X1Y242,RIOB18_X107Y241,IO_L4P_T0_33
D3,33,IOB_X1Y245,RIOB18_X107Y245,IO_L2N_T0_33
D4,33,IOB_X1Y246,RIOB18_X107Y245,IO_L2P_T0_33
D5,34,IOB_X1Y279,RIOB18_X107Y279,IO_L10N_T1_34
D6,34,IOB_X1Y272,RIOB18_X107Y271,IO_L14P_T2_SRCC_34
D8,34,IOB_X1Y283,RIOB18_X107Y283,IO_L8N_T1_34
D9,34,IOB_X1Y284,RIOB18_X107Y283,IO_L8P_T1_34
D10,35,IOB_X1Y345,RIOB18_X107Y345,IO_L2N_T0_AD8N_35
D11,35,IOB_X1Y341,RIOB18_X107Y341,IO_L4N_T0_35
D13,35,IOB_X1Y312,RIOB18_X107Y311,IO_L19P_T3_35
D14,35,IOB_X1Y323,RIOB18_X107Y323,IO_L13N_T2_MRCC_35
D15,35,IOB_X1Y324,RIOB18_X107Y323,IO_L13P_T2_MRCC_35
D16,35,IOB_X1Y317,RIOB18_X107Y317,IO_L16N_T2_35
D18,501,IOPAD_X1Y120,PSS2_X32Y313,PS_MIO43_501
D19,501,IOPAD_X1Y112,PSS2_X32Y313,PS_MIO35_501
D20,501,IOPAD_X1Y114,PSS2_X32Y313,PS_MIO37_501
D21,501,IOPAD_X1Y115,PSS2_X32Y313,PS_MIO38_501
D23,500,IOPAD_X1Y91,PSS2_X32Y313,PS_MIO14_500
D24,500,IOPAD_X1Y86,PSS2_X32Y313,PS_MIO9_500
D25,500,IOPAD_X1Y80,PSS2_X32Y313,PS_MIO3_500
D26,500,IOPAD_X1Y78,PSS2_X32Y313,PS_MIO1_500
E1,33,IOB_X1Y239,RIOB18_X107Y239,IO_L5N_T0_33
E2,33,IOB_X1Y240,RIOB18_X107Y239,IO_L5P_T0_33
E3,33,IOB_X1Y237,RIOB18_X107Y237,IO_L6N_T0_VREF_33
E5,34,IOB_X1Y285,RIOB18_X107Y285,IO_L7N_T1_34
E6,34,IOB_X1Y280,RIOB18_X107Y279,IO_L10P_T1_34
E7,34,IOB_X1Y277,RIOB18_X107Y277,IO_L11N_T1_SRCC_34
E8,34,IOB_X1Y281,RIOB18_X107Y281,IO_L9N_T1_DQS_34
E10,35,IOB_X1Y346,RIOB18_X107Y345,IO_L2P_T0_AD8P_35
E11,35,IOB_X1Y342,RIOB18_X107Y341,IO_L4P_T0_35
E12,35,IOB_X1Y347,RIOB18_X107Y347,IO_L1N_T0_AD0N_35
E13,35,IOB_X1Y337,RIOB18_X107Y337,IO_L6N_T0_VREF_35
E15,35,IOB_X1Y321,RIOB18_X107Y321,IO_L14N_T2_AD4N_SRCC_35
E16,35,IOB_X1Y318,RIOB18_X107Y317,IO_L16P_T2_35
E17,501,IOPAD_X1Y123,PSS2_X32Y313,PS_MIO46_501
E18,501,IOPAD_X1Y121,PSS2_X32Y313,PS_MIO44_501
E20,501,IOPAD_X1Y106,PSS2_X32Y313,PS_MIO29_501
E21,501,IOPAD_X1Y108,PSS2_X32Y313,PS_MIO31_501
E22,501,IOPAD_X1Y110,PSS2_X32Y313,PS_MIO33_501
E23,500,IOPAD_X1Y84,PSS2_X32Y313,PS_MIO7_500
E25,500,IOPAD_X1Y79,PSS2_X32Y313,PS_MIO2_500
E26,500,IOPAD_X1Y77,PSS2_X32Y313,PS_MIO0_500
F2,33,IOB_X1Y243,RIOB18_X107Y243,IO_L3N_T0_DQS_33
F3,33,IOB_X1Y238,RIOB18_X107Y237,IO_L6P_T0_33
F4,33,IOB_X1Y247,RIOB18_X107Y247,IO_L1N_T0_33
F5,34,IOB_X1Y286,RIOB18_X107Y285,IO_L7P_T1_34
F7,34,IOB_X1Y275,RIOB18_X107Y275,IO_L12N_T1_MRCC_34
F8,34,IOB_X1Y278,RIOB18_X107Y277,IO_L11P_T1_SRCC_34
F9,34,IOB_X1Y282,RIOB18_X107Y281,IO_L9P_T1_DQS_34
F10,35,IOB_X1Y343,RIOB18_X107Y343,IO_L3N_T0_DQS_AD1N_35
F12,35,IOB_X1Y348,RIOB18_X107Y347,IO_L1P_T0_AD0P_35
F13,35,IOB_X1Y338,RIOB18_X107Y337,IO_L6P_T0_35
F14,35,IOB_X1Y327,RIOB18_X107Y327,IO_L11N_T1_SRCC_35
F15,35,IOB_X1Y322,RIOB18_X107Y321,IO_L14P_T2_AD4P_SRCC_35
F17,501,IOPAD_X1Y119,PSS2_X32Y313,PS_MIO42_501
F18,501,IOPAD_X1Y104,PSS2_X32Y313,PS_MIO27_501
F19,501,IOPAD_X1Y102,PSS2_X32Y313,PS_MIO25_501
F20,501,IOPAD_X1Y100,PSS2_X32Y313,PS_MIO23_501
F22,501,IOPAD_X1Y98,PSS2_X32Y313,PS_MIO21_501
F23,500,IOPAD_X1Y83,PSS2_X32Y313,PS_MIO6_500
F24,500,IOPAD_X1Y81,PSS2_X32Y313,PS_MIO4_500
F25,502,IOPAD_X1Y33,PSS2_X32Y313,PS_DDR_DQ1_502
G1,33,IOB_X1Y229,RIOB18_X107Y229,IO_L10N_T1_33
G2,33,IOB_X1Y244,RIOB18_X107Y243,IO_L3P_T0_DQS_33
G4,33,IOB_X1Y248,RIOB18_X107Y247,IO_L1P_T0_33
G5,34,IOB_X1Y295,RIOB18_X107Y295,IO_L2N_T0_34
G6,34,IOB_X1Y296,RIOB18_X107Y295,IO_L2P_T0_34
G7,34,IOB_X1Y276,RIOB18_X107Y275,IO_L12P_T1_MRCC_34
G9,34,IOB_X1Y293,RIOB18_X107Y293,IO_L3N_T0_DQS_34
G10,35,IOB_X1Y344,RIOB18_X107Y343,IO_L3P_T0_DQS_AD1P_35
G11,35,IOB_X1Y339,RIOB18_X107Y339,IO_L5N_T0_AD9N_35
G12,35,IOB_X1Y340,RIOB18_X107Y339,IO_L5P_T0_AD9P_35
G14,35,IOB_X1Y328,RIOB18_X107Y327,IO_L11P_T1_SRCC_35
G15,35,IOB_X1Y329,RIOB18_X107Y329,IO_L10N_T1_AD11N_35
G16,35,IOB_X1Y330,RIOB18_X107Y329,IO_L10P_T1_AD11P_35
G17,501,IOPAD_X1Y94,PSS2_X32Y313,PS_MIO17_501
G19,501,IOPAD_X1Y96,PSS2_X32Y313,PS_MIO19_501
G20,501,IOPAD_X1Y95,PSS2_X32Y313,PS_MIO18_501
G21,501,IOPAD_X1Y93,PSS2_X32Y313,PS_MIO16_501
G22,501,IOPAD_X1Y99,PSS2_X32Y313,PS_MIO22_501
G24,502,IOPAD_X1Y28,PSS2_X32Y313,PS_DDR_DM0_502
G25,502,IOPAD_X1Y64,PSS2_X32Y313,PS_DDR_DQS_N0_502
G26,502,IOPAD_X1Y35,PSS2_X32Y313,PS_DDR_DQ3_502
H1,33,IOB_X1Y235,RIOB18_X107Y235,IO_L7N_T1_33
H2,33,IOB_X1Y230,RIOB18_X107Y229,IO_L10P_T1_33
H3,33,IOB_X1Y233,RIOB18_X107Y233,IO_L8N_T1_33
H4,33,IOB_X1Y234,RIOB18_X107Y233,IO_L8P_T1_33
H6,34,IOB_X1Y291,RIOB18_X107Y291,IO_L4N_T0_34
H7,34,IOB_X1Y292,RIOB18_X107Y291,IO_L4P_T0_34
H8,34,IOB_X1Y287,RIOB18_X107Y287,IO_L6N_T0_VREF_34
H9,34,IOB_X1Y294,RIOB18_X107Y293,IO_L3P_T0_DQS_PUDC_B_34
H11,34,IOB_X1Y297,RIOB18_X107Y297,IO_L1N_T0_34
H12,35,IOB_X1Y335,RIOB18_X107Y335,IO_L7N_T1_AD2N_35
H13,35,IOB_X1Y336,RIOB18_X107Y335,IO_L7P_T1_AD2P_35
H14,35,IOB_X1Y325,RIOB18_X107Y325,IO_L12N_T1_MRCC_35
H16,35,IOB_X1Y349,RIOB18_SING_X107Y349,IO_0_VRN_35
H17,501,IOPAD_X1Y103,PSS2_X32Y313,PS_MIO26_501
H19,501,IOPAD_X1Y97,PSS2_X32Y313,PS_MIO20_501
H21,502,IOPAD_X1Y15,PSS2_X32Y313,PS_DDR_A11_502
H22,502,IOPAD_X1Y72,PSS2_X32Y313,PS_DDR_DRST_B_502
H23,502,IOPAD_X1Y37,PSS2_X32Y313,PS_DDR_DQ5_502
H24,502,IOPAD_X1Y68,PSS2_X32Y313,PS_DDR_DQS_P0_502
H26,502,IOPAD_X1Y36,PSS2_X32Y313,PS_DDR_DQ4_502
J1,33,IOB_X1Y236,RIOB18_X107Y235,IO_L7P_T1_33
J3,33,IOB_X1Y225,RIOB18_X107Y225,IO_L12N_T1_MRCC_33
J4,33,IOB_X1Y226,RIOB18_X107Y225,IO_L12P_T1_MRCC_33
J5,33,IOB_X1Y209,RIOB18_X107Y209,IO_L20N_T3_33
J6,33,IOB_X1Y205,RIOB18_X107Y205,IO_L22N_T3_33
J8,34,IOB_X1Y288,RIOB18_X107Y287,IO_L6P_T0_34
J9,34,IOB_X1Y289,RIOB18_X107Y289,IO_L5N_T0_34
J10,34,IOB_X1Y290,RIOB18_X107Y289,IO_L5P_T0_34
J11,34,IOB_X1Y298,RIOB18_X107Y297,IO_L1P_T0_34
J13,35,IOB_X1Y333,RIOB18_X107Y333,IO_L8N_T1_AD10N_35
J14,35,IOB_X1Y326,RIOB18_X107Y325,IO_L12P_T1_MRCC_35
J15,35,IOB_X1Y331,RIOB18_X107Y331,IO_L9N_T1_DQS_AD3N_35
J16,501,IOPAD_X1Y111,PSS2_X32Y313,PS_MIO34_501
J18,501,IOPAD_X1Y105,PSS2_X32Y313,PS_MIO28_501
J19,501,IOPAD_X1Y101,PSS2_X32Y313,PS_MIO24_501
J20,502,IOPAD_X1Y18,PSS2_X32Y313,PS_DDR_A13_502
J21,502,IOPAD_X1Y11,PSS2_X32Y313,PS_DDR_A7_502
J23,502,IOPAD_X1Y39,PSS2_X32Y313,PS_DDR_DQ7_502
J24,502,IOPAD_X1Y38,PSS2_X32Y313,PS_DDR_DQ6_502
J25,502,IOPAD_X1Y34,PSS2_X32Y313,PS_DDR_DQ2_502
J26,502,IOPAD_X1Y32,PSS2_X32Y313,PS_DDR_DQ0_502
K1,33,IOB_X1Y231,RIOB18_X107Y231,IO_L9N_T1_DQS_33
K2,33,IOB_X1Y232,RIOB18_X107Y231,IO_L9P_T1_DQS_33
K3,33,IOB_X1Y227,RIOB18_X107Y227,IO_L11N_T1_SRCC_33
K5,33,IOB_X1Y210,RIOB18_X107Y209,IO_L20P_T3_33
K6,33,IOB_X1Y206,RIOB18_X107Y205,IO_L22P_T3_33
K7,33,IOB_X1Y201,RIOB18_X107Y201,IO_L24N_T3_33
K8,33,IOB_X1Y202,RIOB18_X107Y201,IO_L24P_T3_33
K10,34,IOB_X1Y250,RIOB18_SING_X107Y250,IO_25_VRP_34
K11,34,IOB_X1Y299,RIOB18_SING_X107Y299,IO_0_VRN_34
K12,35,IOB_X1Y300,RIOB18_SING_X107Y300,IO_25_VRP_35
K13,35,IOB_X1Y334,RIOB18_X107Y333,IO_L8P_T1_AD10P_35
K15,35,IOB_X1Y332,RIOB18_X107Y331,IO_L9P_T1_DQS_AD3P_35
K16,501,IOPAD_X1Y113,PSS2_X32Y313,PS_MIO36_501
K17,501,IOPAD_X1Y109,PSS2_X32Y313,PS_MIO32_501
K19,501,IOPAD_X1Y107,PSS2_X32Y313,PS_MIO30_501
K20,502,IOPAD_X1Y5,PSS2_X32Y313,PS_DDR_A1_502
K22,502,IOPAD_X1Y4,PSS2_X32Y313,PS_DDR_A0_502
K23,502,IOPAD_X1Y43,PSS2_X32Y313,PS_DDR_DQ11_502
K25,502,IOPAD_X1Y29,PSS2_X32Y313,PS_DDR_DM1_502
K26,502,IOPAD_X1Y40,PSS2_X32Y313,PS_DDR_DQ8_502
L2,33,IOB_X1Y217,RIOB18_X107Y217,IO_L16N_T2_33
L3,33,IOB_X1Y228,RIOB18_X107Y227,IO_L11P_T1_SRCC_33
L4,33,IOB_X1Y221,RIOB18_X107Y221,IO_L14N_T2_SRCC_33
L5,33,IOB_X1Y222,RIOB18_X107Y221,IO_L14P_T2_SRCC_33
L7,33,IOB_X1Y211,RIOB18_X107Y211,IO_L19N_T3_VREF_33
L8,33,IOB_X1Y207,RIOB18_X107Y207,IO_L21N_T3_DQS_33
L9,33,IOB_X1Y249,RIOB18_SING_X107Y249,IO_0_VRN_33
L20,502,IOPAD_X1Y10,PSS2_X32Y313,PS_DDR_A6_502
L22,502,IOPAD_X1Y7,PSS2_X32Y313,PS_DDR_A3_502
L23,502,IOPAD_X1Y41,PSS2_X32Y313,PS_DDR_DQ9_502
L24,502,IOPAD_X1Y69,PSS2_X32Y313,PS_DDR_DQS_P1_502
L25,502,IOPAD_X1Y65,PSS2_X32Y313,PS_DDR_DQS_N1_502
M1,33,IOB_X1Y213,RIOB18_X107Y213,IO_L18N_T2_33
M2,33,IOB_X1Y218,RIOB18_X107Y217,IO_L16P_T2_33
M4,33,IOB_X1Y215,RIOB18_X107Y215,IO_L17N_T2_33
M5,33,IOB_X1Y223,RIOB18_X107Y223,IO_L13N_T2_MRCC_33
M6,33,IOB_X1Y224,RIOB18_X107Y223,IO_L13P_T2_MRCC_33
M7,33,IOB_X1Y212,RIOB18_X107Y211,IO_L19P_T3_33
M8,33,IOB_X1Y208,RIOB18_X107Y207,IO_L21P_T3_DQS_33
M20,502,IOPAD_X1Y8,PSS2_X32Y313,PS_DDR_A4_502
M22,502,IOPAD_X1Y14,PSS2_X32Y313,PS_DDR_A10_502
M24,502,IOPAD_X1Y46,PSS2_X32Y313,PS_DDR_DQ14_502
M25,502,IOPAD_X1Y44,PSS2_X32Y313,PS_DDR_DQ12_502
M26,502,IOPAD_X1Y42,PSS2_X32Y313,PS_DDR_DQ10_502
N1,33,IOB_X1Y214,RIOB18_X107Y213,IO_L18P_T2_33
N2,33,IOB_X1Y219,RIOB18_X107Y219,IO_L15N_T2_DQS_33
N3,33,IOB_X1Y220,RIOB18_X107Y219,IO_L15P_T2_DQS_33
N4,33,IOB_X1Y216,RIOB18_X107Y215,IO_L17P_T2_33
N6,33,IOB_X1Y203,RIOB18_X107Y203,IO_L23N_T3_33
N7,33,IOB_X1Y204,RIOB18_X107Y203,IO_L23P_T3_33
N8,33,IOB_X1Y200,RIOB18_SING_X107Y200,IO_25_VRP_33
N14,0,IPAD_X0Y120,MONITOR_BOT_PELE1_X197Y339,VP_0
N21,502,IOPAD_X1Y6,PSS2_X32Y313,PS_DDR_A2_502
N22,502,IOPAD_X1Y9,PSS2_X32Y313,PS_DDR_A5_502
N23,502,IOPAD_X1Y47,PSS2_X32Y313,PS_DDR_DQ15_502
N24,502,IOPAD_X1Y45,PSS2_X32Y313,PS_DDR_DQ13_502
N26,502,IOPAD_X1Y50,PSS2_X32Y313,PS_DDR_DQ18_502
P13,0,IPAD_X0Y121,MONITOR_BOT_PELE1_X197Y339,VN_0
P20,502,IOPAD_X1Y16,PSS2_X32Y313,PS_DDR_A12_502
P21,502,IOPAD_X1Y24,PSS2_X32Y313,PS_DDR_CKN_502
P23,502,IOPAD_X1Y51,PSS2_X32Y313,PS_DDR_DQ19_502
P24,502,IOPAD_X1Y49,PSS2_X32Y313,PS_DDR_DQ17_502
P25,502,IOPAD_X1Y70,PSS2_X32Y313,PS_DDR_DQS_P2_502
P26,502,IOPAD_X1Y30,PSS2_X32Y313,PS_DDR_DM2_502
R1,112,OPAD_X0Y30,GTX_CHANNEL_3_X249Y202,MGTXTXN3_112
R2,112,OPAD_X0Y31,GTX_CHANNEL_3_X249Y202,MGTXTXP3_112
R5,112,IPAD_X1Y99,GTX_COMMON_X249Y179,MGTREFCLK0N_112
R6,112,IPAD_X1Y98,GTX_COMMON_X249Y179,MGTREFCLK0P_112
R20,502,IOPAD_X1Y17,PSS2_X32Y313,PS_DDR_A14_502
R21,502,IOPAD_X1Y25,PSS2_X32Y313,PS_DDR_CKP_502
R22,502,IOPAD_X1Y21,PSS2_X32Y313,PS_DDR_BA2_502
R23,502,IOPAD_X1Y55,PSS2_X32Y313,PS_DDR_DQ23_502
R25,502,IOPAD_X1Y66,PSS2_X32Y313,PS_DDR_DQS_N2_502
R26,502,IOPAD_X1Y48,PSS2_X32Y313,PS_DDR_DQ16_502
T3,112,IPAD_X1Y114,GTX_CHANNEL_3_X249Y202,MGTXRXN3_112
T4,112,IPAD_X1Y115,GTX_CHANNEL_3_X249Y202,MGTXRXP3_112
T20,502,IOPAD_X1Y12,PSS2_X32Y313,PS_DDR_A8_502
T22,502,IOPAD_X1Y20,PSS2_X32Y313,PS_DDR_BA1_502
T23,502,IOPAD_X1Y54,PSS2_X32Y313,PS_DDR_DQ22_502
T24,502,IOPAD_X1Y52,PSS2_X32Y313,PS_DDR_DQ20_502
T25,502,IOPAD_X1Y53,PSS2_X32Y313,PS_DDR_DQ21_502
U1,112,OPAD_X0Y28,GTX_CHANNEL_2_X249Y191,MGTXTXN2_112
U2,112,OPAD_X0Y29,GTX_CHANNEL_2_X249Y191,MGTXTXP2_112
U5,112,IPAD_X1Y101,GTX_COMMON_X249Y179,MGTREFCLK1N_112
U6,112,IPAD_X1Y100,GTX_COMMON_X249Y179,MGTREFCLK1P_112
U20,502,IOPAD_X1Y13,PSS2_X32Y313,PS_DDR_A9_502
U21,502,IOPAD_X1Y23,PSS2_X32Y313,PS_DDR_CKE_502
U22,502,IOPAD_X1Y19,PSS2_X32Y313,PS_DDR_BA0_502
U24,502,IOPAD_X1Y58,PSS2_X32Y313,PS_DDR_DQ26_502
U25,502,IOPAD_X1Y59,PSS2_X32Y313,PS_DDR_DQ27_502
U26,502,IOPAD_X1Y57,PSS2_X32Y313,PS_DDR_DQ25_502
V3,112,IPAD_X1Y108,GTX_CHANNEL_2_X249Y191,MGTXRXN2_112
V4,112,IPAD_X1Y109,GTX_CHANNEL_2_X249Y191,MGTXRXP2_112
V18,13,IOB_X0Y200,LIOB33_SING_X0Y200,IO_25_13
V19,13,IOB_X0Y249,LIOB33_SING_X0Y249,IO_0_13
V21,502,IOPAD_X1Y2,PSS2_X32Y313,PS_DDR_VRN_502
V22,502,IOPAD_X1Y1,PSS2_X32Y313,PS_DDR_WE_B_502
V23,502,IOPAD_X1Y133,PSS2_X32Y313,PS_DDR_RAS_B_502
V24,502,IOPAD_X1Y56,PSS2_X32Y313,PS_DDR_DQ24_502
V26,502,IOPAD_X1Y31,PSS2_X32Y313,PS_DDR_DM3_502
W1,112,OPAD_X0Y26,GTX_CHANNEL_1_X249Y173,MGTXTXN1_112
W2,112,OPAD_X0Y27,GTX_CHANNEL_1_X249Y173,MGTXTXP1_112
W5,111,IPAD_X1Y69,GTX_COMMON_X249Y127,MGTREFCLK0N_111
W6,111,IPAD_X1Y68,GTX_COMMON_X249Y127,MGTREFCLK0P_111
W13,12,IOB_X0Y190,LIOB33_X0Y189,IO_L5P_T0_12
W14,12,IOB_X0Y199,LIOB33_SING_X0Y199,IO_0_12
W15,12,IOB_X0Y151,LIOB33_X0Y151,IO_L24N_T3_12
W16,12,IOB_X0Y152,LIOB33_X0Y151,IO_L24P_T3_12
W17,12,IOB_X0Y150,LIOB33_SING_X0Y150,IO_25_12
W18,13,IOB_X0Y204,LIOB33_X0Y203,IO_L23P_T3_13
W19,13,IOB_X0Y203,LIOB33_X0Y203,IO_L23N_T3_13
W20,13,IOB_X0Y212,LIOB33_X0Y211,IO_L19P_T3_13
W21,502,IOPAD_X1Y3,PSS2_X32Y313,PS_DDR_VRP_502
W23,502,IOPAD_X1Y63,PSS2_X32Y313,PS_DDR_DQ31_502
W24,502,IOPAD_X1Y71,PSS2_X32Y313,PS_DDR_DQS_P3_502
W25,502,IOPAD_X1Y67,PSS2_X32Y313,PS_DDR_DQS_N3_502
W26,502,IOPAD_X1Y60,PSS2_X32Y313,PS_DDR_DQ28_502
Y3,112,IPAD_X1Y96,GTX_CHANNEL_1_X249Y173,MGTXRXN1_112
Y4,112,IPAD_X1Y97,GTX_CHANNEL_1_X249Y173,MGTXRXP1_112
Y10,12,IOB_X0Y194,LIOB33_X0Y193,IO_L3P_T0_DQS_12
Y11,12,IOB_X0Y197,LIOB33_X0Y197,IO_L1N_T0_12
Y12,12,IOB_X0Y198,LIOB33_X0Y197,IO_L1P_T0_12
Y13,12,IOB_X0Y189,LIOB33_X0Y189,IO_L5N_T0_12
Y15,12,IOB_X0Y153,LIOB33_X0Y153,IO_L23N_T3_12
Y16,12,IOB_X0Y154,LIOB33_X0Y153,IO_L23P_T3_12
Y17,12,IOB_X0Y162,LIOB33_X0Y161,IO_L19P_T3_12
Y18,13,IOB_X0Y202,LIOB33_X0Y201,IO_L24P_T3_13
Y20,13,IOB_X0Y211,LIOB33_X0Y211,IO_L19N_T3_VREF_13
Y21,502,IOPAD_X1Y27,PSS2_X32Y313,PS_DDR_CS_B_502
Y22,502,IOPAD_X1Y131,PSS2_X32Y313,PS_DDR_ODT_502
Y23,502,IOPAD_X1Y22,PSS2_X32Y313,PS_DDR_CAS_B_502
Y25,502,IOPAD_X1Y61,PSS2_X32Y313,PS_DDR_DQ29_502
Y26,502,IOPAD_X1Y62,PSS2_X32Y313,PS_DDR_DQ30_502
1 pin bank site tile pin_function
2 A2 34 IOB_X1Y251 RIOB18_X107Y251 IO_L24N_T3_34
3 A3 34 IOB_X1Y255 RIOB18_X107Y255 IO_L22N_T3_34
4 A4 34 IOB_X1Y256 RIOB18_X107Y255 IO_L22P_T3_34
5 A5 34 IOB_X1Y257 RIOB18_X107Y257 IO_L21N_T3_DQS_34
6 A7 34 IOB_X1Y263 RIOB18_X107Y263 IO_L18N_T2_34
7 A8 34 IOB_X1Y265 RIOB18_X107Y265 IO_L17N_T2_34
8 A9 34 IOB_X1Y266 RIOB18_X107Y265 IO_L17P_T2_34
9 A10 34 IOB_X1Y267 RIOB18_X107Y267 IO_L16N_T2_34
10 A12 35 IOB_X1Y301 RIOB18_X107Y301 IO_L24N_T3_AD15N_35
11 A13 35 IOB_X1Y302 RIOB18_X107Y301 IO_L24P_T3_AD15P_35
12 A14 35 IOB_X1Y307 RIOB18_X107Y307 IO_L21N_T3_DQS_AD14N_35
13 A15 35 IOB_X1Y308 RIOB18_X107Y307 IO_L21P_T3_DQS_AD14P_35
14 A17 35 IOB_X1Y313 RIOB18_X107Y313 IO_L18N_T2_AD13N_35
15 A18 501 IOPAD_X1Y126 PSS2_X32Y313 PS_MIO49_501
16 A19 501 IOPAD_X1Y130 PSS2_X32Y313 PS_MIO53_501
17 A20 501 IOPAD_X1Y129 PSS2_X32Y313 PS_MIO52_501
18 A22 501 IOPAD_X1Y134 PSS2_X32Y313 PS_SRST_B_501
19 A23 500 IOPAD_X1Y89 PSS2_X32Y313 PS_MIO12_500
20 A24 500 IOPAD_X1Y85 PSS2_X32Y313 PS_MIO8_500
21 A25 500 IOPAD_X1Y87 PSS2_X32Y313 PS_MIO10_500
22 AA1 112 OPAD_X0Y24 GTX_CHANNEL_0_X249Y162 MGTXTXN0_112
23 AA2 112 OPAD_X0Y25 GTX_CHANNEL_0_X249Y162 MGTXTXP0_112
24 AA5 111 IPAD_X1Y71 GTX_COMMON_X249Y127 MGTREFCLK1N_111
25 AA6 111 IPAD_X1Y70 GTX_COMMON_X249Y127 MGTREFCLK1P_111
26 AA10 12 IOB_X0Y193 LIOB33_X0Y193 IO_L3N_T0_DQS_12
27 AA12 12 IOB_X0Y187 LIOB33_X0Y187 IO_L6N_T0_VREF_12
28 AA13 12 IOB_X0Y188 LIOB33_X0Y187 IO_L6P_T0_12
29 AA14 12 IOB_X0Y155 LIOB33_X0Y155 IO_L22N_T3_12
30 AA15 12 IOB_X0Y156 LIOB33_X0Y155 IO_L22P_T3_12
31 AA17 12 IOB_X0Y161 LIOB33_X0Y161 IO_L19N_T3_VREF_12
32 AA18 13 IOB_X0Y201 LIOB33_X0Y201 IO_L24N_T3_13
33 AA19 13 IOB_X0Y206 LIOB33_X0Y205 IO_L22P_T3_13
34 AA20 13 IOB_X0Y210 LIOB33_X0Y209 IO_L20P_T3_13
35 AA22 13 IOB_X0Y230 LIOB33_X0Y229 IO_L10P_T1_13
36 AA23 13 IOB_X0Y229 LIOB33_X0Y229 IO_L10N_T1_13
37 AA24 13 IOB_X0Y238 LIOB33_X0Y237 IO_L6P_T0_13
38 AA25 13 IOB_X0Y248 LIOB33_X0Y247 IO_L1P_T0_13
39 AB3 112 IPAD_X1Y90 GTX_CHANNEL_0_X249Y162 MGTXRXN0_112
40 AB4 112 IPAD_X1Y91 GTX_CHANNEL_0_X249Y162 MGTXRXP0_112
41 AB10 12 IOB_X0Y191 LIOB33_X0Y191 IO_L4N_T0_12
42 AB11 12 IOB_X0Y192 LIOB33_X0Y191 IO_L4P_T0_12
43 AB12 12 IOB_X0Y196 LIOB33_X0Y195 IO_L2P_T0_12
44 AB14 12 IOB_X0Y171 LIOB33_X0Y171 IO_L14N_T2_SRCC_12
45 AB15 12 IOB_X0Y172 LIOB33_X0Y171 IO_L14P_T2_SRCC_12
46 AB16 12 IOB_X0Y159 LIOB33_X0Y159 IO_L20N_T3_12
47 AB17 12 IOB_X0Y160 LIOB33_X0Y159 IO_L20P_T3_12
48 AB19 13 IOB_X0Y205 LIOB33_X0Y205 IO_L22N_T3_13
49 AB20 13 IOB_X0Y209 LIOB33_X0Y209 IO_L20N_T3_13
50 AB21 13 IOB_X0Y232 LIOB33_X0Y231 IO_L9P_T1_DQS_13
51 AB22 13 IOB_X0Y231 LIOB33_X0Y231 IO_L9N_T1_DQS_13
52 AB24 13 IOB_X0Y237 LIOB33_X0Y237 IO_L6N_T0_VREF_13
53 AB25 13 IOB_X0Y247 LIOB33_X0Y247 IO_L1N_T0_13
54 AB26 13 IOB_X0Y246 LIOB33_X0Y245 IO_L2P_T0_13
55 AC1 111 OPAD_X0Y22 GTX_CHANNEL_3_X249Y150 MGTXTXN3_111
56 AC2 111 OPAD_X0Y23 GTX_CHANNEL_3_X249Y150 MGTXTXP3_111
57 AC5 111 IPAD_X1Y78 GTX_CHANNEL_2_X249Y139 MGTXRXN2_111
58 AC6 111 IPAD_X1Y79 GTX_CHANNEL_2_X249Y139 MGTXRXP2_111
59 AC11 12 IOB_X0Y195 LIOB33_X0Y195 IO_L2N_T0_12
60 AC12 12 IOB_X0Y178 LIOB33_X0Y177 IO_L11P_T1_SRCC_12
61 AC13 12 IOB_X0Y176 LIOB33_X0Y175 IO_L12P_T1_MRCC_12
62 AC14 12 IOB_X0Y174 LIOB33_X0Y173 IO_L13P_T2_MRCC_12
63 AC16 12 IOB_X0Y157 LIOB33_X0Y157 IO_L21N_T3_DQS_12
64 AC17 12 IOB_X0Y158 LIOB33_X0Y157 IO_L21P_T3_DQS_12
65 AC18 13 IOB_X0Y208 LIOB33_X0Y207 IO_L21P_T3_DQS_13
66 AC19 13 IOB_X0Y207 LIOB33_X0Y207 IO_L21N_T3_DQS_13
67 AC21 13 IOB_X0Y222 LIOB33_X0Y221 IO_L14P_T2_SRCC_13
68 AC22 13 IOB_X0Y221 LIOB33_X0Y221 IO_L14N_T2_SRCC_13
69 AC23 13 IOB_X0Y226 LIOB33_X0Y225 IO_L12P_T1_MRCC_13
70 AC24 13 IOB_X0Y225 LIOB33_X0Y225 IO_L12N_T1_MRCC_13
71 AC26 13 IOB_X0Y245 LIOB33_X0Y245 IO_L2N_T0_13
72 AD3 111 IPAD_X1Y84 GTX_CHANNEL_3_X249Y150 MGTXRXN3_111
73 AD4 111 IPAD_X1Y85 GTX_CHANNEL_3_X249Y150 MGTXRXP3_111
74 AD7 111 IPAD_X1Y60 GTX_CHANNEL_0_X249Y110 MGTXRXN0_111
75 AD8 111 IPAD_X1Y61 GTX_CHANNEL_0_X249Y110 MGTXRXP0_111
76 AD10 12 IOB_X0Y185 LIOB33_X0Y185 IO_L7N_T1_12
77 AD11 12 IOB_X0Y177 LIOB33_X0Y177 IO_L11N_T1_SRCC_12
78 AD13 12 IOB_X0Y175 LIOB33_X0Y175 IO_L12N_T1_MRCC_12
79 AD14 12 IOB_X0Y173 LIOB33_X0Y173 IO_L13N_T2_MRCC_12
80 AD15 12 IOB_X0Y169 LIOB33_X0Y169 IO_L15N_T2_DQS_12
81 AD16 12 IOB_X0Y170 LIOB33_X0Y169 IO_L15P_T2_DQS_12
82 AD18 13 IOB_X0Y216 LIOB33_X0Y215 IO_L17P_T2_13
83 AD19 13 IOB_X0Y215 LIOB33_X0Y215 IO_L17N_T2_13
84 AD20 13 IOB_X0Y224 LIOB33_X0Y223 IO_L13P_T2_MRCC_13
85 AD21 13 IOB_X0Y223 LIOB33_X0Y223 IO_L13N_T2_MRCC_13
86 AD23 13 IOB_X0Y228 LIOB33_X0Y227 IO_L11P_T1_SRCC_13
87 AD24 13 IOB_X0Y227 LIOB33_X0Y227 IO_L11N_T1_SRCC_13
88 AD25 13 IOB_X0Y242 LIOB33_X0Y241 IO_L4P_T0_13
89 AD26 13 IOB_X0Y241 LIOB33_X0Y241 IO_L4N_T0_13
90 AE1 111 OPAD_X0Y20 GTX_CHANNEL_2_X249Y139 MGTXTXN2_111
91 AE2 111 OPAD_X0Y21 GTX_CHANNEL_2_X249Y139 MGTXTXP2_111
92 AE5 111 IPAD_X1Y66 GTX_CHANNEL_1_X249Y121 MGTXRXN1_111
93 AE6 111 IPAD_X1Y67 GTX_CHANNEL_1_X249Y121 MGTXRXP1_111
94 AE10 12 IOB_X0Y186 LIOB33_X0Y185 IO_L7P_T1_12
95 AE11 12 IOB_X0Y182 LIOB33_X0Y181 IO_L9P_T1_DQS_12
96 AE12 12 IOB_X0Y184 LIOB33_X0Y183 IO_L8P_T1_12
97 AE13 12 IOB_X0Y180 LIOB33_X0Y179 IO_L10P_T1_12
98 AE15 12 IOB_X0Y165 LIOB33_X0Y165 IO_L17N_T2_12
99 AE16 12 IOB_X0Y166 LIOB33_X0Y165 IO_L17P_T2_12
100 AE17 12 IOB_X0Y164 LIOB33_X0Y163 IO_L18P_T2_12
101 AE18 13 IOB_X0Y214 LIOB33_X0Y213 IO_L18P_T2_13
102 AE20 13 IOB_X0Y218 LIOB33_X0Y217 IO_L16P_T2_13
103 AE21 13 IOB_X0Y217 LIOB33_X0Y217 IO_L16N_T2_13
104 AE22 13 IOB_X0Y236 LIOB33_X0Y235 IO_L7P_T1_13
105 AE23 13 IOB_X0Y234 LIOB33_X0Y233 IO_L8P_T1_13
106 AE25 13 IOB_X0Y244 LIOB33_X0Y243 IO_L3P_T0_DQS_13
107 AE26 13 IOB_X0Y243 LIOB33_X0Y243 IO_L3N_T0_DQS_13
108 AF3 111 OPAD_X0Y18 GTX_CHANNEL_1_X249Y121 MGTXTXN1_111
109 AF4 111 OPAD_X0Y19 GTX_CHANNEL_1_X249Y121 MGTXTXP1_111
110 AF7 111 OPAD_X0Y16 GTX_CHANNEL_0_X249Y110 MGTXTXN0_111
111 AF8 111 OPAD_X0Y17 GTX_CHANNEL_0_X249Y110 MGTXTXP0_111
112 AF10 12 IOB_X0Y181 LIOB33_X0Y181 IO_L9N_T1_DQS_12
113 AF12 12 IOB_X0Y183 LIOB33_X0Y183 IO_L8N_T1_12
114 AF13 12 IOB_X0Y179 LIOB33_X0Y179 IO_L10N_T1_12
115 AF14 12 IOB_X0Y167 LIOB33_X0Y167 IO_L16N_T2_12
116 AF15 12 IOB_X0Y168 LIOB33_X0Y167 IO_L16P_T2_12
117 AF17 12 IOB_X0Y163 LIOB33_X0Y163 IO_L18N_T2_12
118 AF18 13 IOB_X0Y213 LIOB33_X0Y213 IO_L18N_T2_13
119 AF19 13 IOB_X0Y220 LIOB33_X0Y219 IO_L15P_T2_DQS_13
120 AF20 13 IOB_X0Y219 LIOB33_X0Y219 IO_L15N_T2_DQS_13
121 AF22 13 IOB_X0Y235 LIOB33_X0Y235 IO_L7N_T1_13
122 AF23 13 IOB_X0Y233 LIOB33_X0Y233 IO_L8N_T1_13
123 AF24 13 IOB_X0Y240 LIOB33_X0Y239 IO_L5P_T0_13
124 AF25 13 IOB_X0Y239 LIOB33_X0Y239 IO_L5N_T0_13
125 B1 34 IOB_X1Y253 RIOB18_X107Y253 IO_L23N_T3_34
126 B2 34 IOB_X1Y252 RIOB18_X107Y251 IO_L24P_T3_34
127 B4 34 IOB_X1Y259 RIOB18_X107Y259 IO_L20N_T3_34
128 B5 34 IOB_X1Y260 RIOB18_X107Y259 IO_L20P_T3_34
129 B6 34 IOB_X1Y258 RIOB18_X107Y257 IO_L21P_T3_DQS_34
130 B7 34 IOB_X1Y264 RIOB18_X107Y263 IO_L18P_T2_34
131 B9 34 IOB_X1Y269 RIOB18_X107Y269 IO_L15N_T2_DQS_34
132 B10 34 IOB_X1Y268 RIOB18_X107Y267 IO_L16P_T2_34
133 B11 35 IOB_X1Y303 RIOB18_X107Y303 IO_L23N_T3_35
134 B12 35 IOB_X1Y305 RIOB18_X107Y305 IO_L22N_T3_AD7N_35
135 B14 35 IOB_X1Y309 RIOB18_X107Y309 IO_L20N_T3_AD6N_35
136 B15 35 IOB_X1Y315 RIOB18_X107Y315 IO_L17N_T2_AD5N_35
137 B16 35 IOB_X1Y316 RIOB18_X107Y315 IO_L17P_T2_AD5P_35
138 B17 35 IOB_X1Y314 RIOB18_X107Y313 IO_L18P_T2_AD13P_35
139 B19 501 IOPAD_X1Y124 PSS2_X32Y313 PS_MIO47_501
140 B20 501 IOPAD_X1Y128 PSS2_X32Y313 PS_MIO51_501
141 B21 501 IOPAD_X1Y125 PSS2_X32Y313 PS_MIO48_501
142 B22 501 IOPAD_X1Y127 PSS2_X32Y313 PS_MIO50_501
143 B24 500 IOPAD_X1Y26 PSS2_X32Y313 PS_CLK_500
144 B25 500 IOPAD_X1Y90 PSS2_X32Y313 PS_MIO13_500
145 B26 500 IOPAD_X1Y88 PSS2_X32Y313 PS_MIO11_500
146 C1 33 IOB_X1Y241 RIOB18_X107Y241 IO_L4N_T0_33
147 C2 34 IOB_X1Y254 RIOB18_X107Y253 IO_L23P_T3_34
148 C3 34 IOB_X1Y261 RIOB18_X107Y261 IO_L19N_T3_VREF_34
149 C4 34 IOB_X1Y262 RIOB18_X107Y261 IO_L19P_T3_34
150 C6 34 IOB_X1Y271 RIOB18_X107Y271 IO_L14N_T2_SRCC_34
151 C7 34 IOB_X1Y273 RIOB18_X107Y273 IO_L13N_T2_MRCC_34
152 C8 34 IOB_X1Y274 RIOB18_X107Y273 IO_L13P_T2_MRCC_34
153 C9 34 IOB_X1Y270 RIOB18_X107Y269 IO_L15P_T2_DQS_34
154 C11 35 IOB_X1Y304 RIOB18_X107Y303 IO_L23P_T3_35
155 C12 35 IOB_X1Y306 RIOB18_X107Y305 IO_L22P_T3_AD7P_35
156 C13 35 IOB_X1Y311 RIOB18_X107Y311 IO_L19N_T3_VREF_35
157 C14 35 IOB_X1Y310 RIOB18_X107Y309 IO_L20P_T3_AD6P_35
158 C16 35 IOB_X1Y319 RIOB18_X107Y319 IO_L15N_T2_DQS_AD12N_35
159 C17 35 IOB_X1Y320 RIOB18_X107Y319 IO_L15P_T2_DQS_AD12P_35
160 C18 501 IOPAD_X1Y122 PSS2_X32Y313 PS_MIO45_501
161 C19 501 IOPAD_X1Y118 PSS2_X32Y313 PS_MIO41_501
162 C21 501 IOPAD_X1Y116 PSS2_X32Y313 PS_MIO39_501
163 C22 501 IOPAD_X1Y117 PSS2_X32Y313 PS_MIO40_501
164 C23 500 IOPAD_X1Y132 PSS2_X32Y313 PS_POR_B_500
165 C24 500 IOPAD_X1Y92 PSS2_X32Y313 PS_MIO15_500
166 C26 500 IOPAD_X1Y82 PSS2_X32Y313 PS_MIO5_500
167 D1 33 IOB_X1Y242 RIOB18_X107Y241 IO_L4P_T0_33
168 D3 33 IOB_X1Y245 RIOB18_X107Y245 IO_L2N_T0_33
169 D4 33 IOB_X1Y246 RIOB18_X107Y245 IO_L2P_T0_33
170 D5 34 IOB_X1Y279 RIOB18_X107Y279 IO_L10N_T1_34
171 D6 34 IOB_X1Y272 RIOB18_X107Y271 IO_L14P_T2_SRCC_34
172 D8 34 IOB_X1Y283 RIOB18_X107Y283 IO_L8N_T1_34
173 D9 34 IOB_X1Y284 RIOB18_X107Y283 IO_L8P_T1_34
174 D10 35 IOB_X1Y345 RIOB18_X107Y345 IO_L2N_T0_AD8N_35
175 D11 35 IOB_X1Y341 RIOB18_X107Y341 IO_L4N_T0_35
176 D13 35 IOB_X1Y312 RIOB18_X107Y311 IO_L19P_T3_35
177 D14 35 IOB_X1Y323 RIOB18_X107Y323 IO_L13N_T2_MRCC_35
178 D15 35 IOB_X1Y324 RIOB18_X107Y323 IO_L13P_T2_MRCC_35
179 D16 35 IOB_X1Y317 RIOB18_X107Y317 IO_L16N_T2_35
180 D18 501 IOPAD_X1Y120 PSS2_X32Y313 PS_MIO43_501
181 D19 501 IOPAD_X1Y112 PSS2_X32Y313 PS_MIO35_501
182 D20 501 IOPAD_X1Y114 PSS2_X32Y313 PS_MIO37_501
183 D21 501 IOPAD_X1Y115 PSS2_X32Y313 PS_MIO38_501
184 D23 500 IOPAD_X1Y91 PSS2_X32Y313 PS_MIO14_500
185 D24 500 IOPAD_X1Y86 PSS2_X32Y313 PS_MIO9_500
186 D25 500 IOPAD_X1Y80 PSS2_X32Y313 PS_MIO3_500
187 D26 500 IOPAD_X1Y78 PSS2_X32Y313 PS_MIO1_500
188 E1 33 IOB_X1Y239 RIOB18_X107Y239 IO_L5N_T0_33
189 E2 33 IOB_X1Y240 RIOB18_X107Y239 IO_L5P_T0_33
190 E3 33 IOB_X1Y237 RIOB18_X107Y237 IO_L6N_T0_VREF_33
191 E5 34 IOB_X1Y285 RIOB18_X107Y285 IO_L7N_T1_34
192 E6 34 IOB_X1Y280 RIOB18_X107Y279 IO_L10P_T1_34
193 E7 34 IOB_X1Y277 RIOB18_X107Y277 IO_L11N_T1_SRCC_34
194 E8 34 IOB_X1Y281 RIOB18_X107Y281 IO_L9N_T1_DQS_34
195 E10 35 IOB_X1Y346 RIOB18_X107Y345 IO_L2P_T0_AD8P_35
196 E11 35 IOB_X1Y342 RIOB18_X107Y341 IO_L4P_T0_35
197 E12 35 IOB_X1Y347 RIOB18_X107Y347 IO_L1N_T0_AD0N_35
198 E13 35 IOB_X1Y337 RIOB18_X107Y337 IO_L6N_T0_VREF_35
199 E15 35 IOB_X1Y321 RIOB18_X107Y321 IO_L14N_T2_AD4N_SRCC_35
200 E16 35 IOB_X1Y318 RIOB18_X107Y317 IO_L16P_T2_35
201 E17 501 IOPAD_X1Y123 PSS2_X32Y313 PS_MIO46_501
202 E18 501 IOPAD_X1Y121 PSS2_X32Y313 PS_MIO44_501
203 E20 501 IOPAD_X1Y106 PSS2_X32Y313 PS_MIO29_501
204 E21 501 IOPAD_X1Y108 PSS2_X32Y313 PS_MIO31_501
205 E22 501 IOPAD_X1Y110 PSS2_X32Y313 PS_MIO33_501
206 E23 500 IOPAD_X1Y84 PSS2_X32Y313 PS_MIO7_500
207 E25 500 IOPAD_X1Y79 PSS2_X32Y313 PS_MIO2_500
208 E26 500 IOPAD_X1Y77 PSS2_X32Y313 PS_MIO0_500
209 F2 33 IOB_X1Y243 RIOB18_X107Y243 IO_L3N_T0_DQS_33
210 F3 33 IOB_X1Y238 RIOB18_X107Y237 IO_L6P_T0_33
211 F4 33 IOB_X1Y247 RIOB18_X107Y247 IO_L1N_T0_33
212 F5 34 IOB_X1Y286 RIOB18_X107Y285 IO_L7P_T1_34
213 F7 34 IOB_X1Y275 RIOB18_X107Y275 IO_L12N_T1_MRCC_34
214 F8 34 IOB_X1Y278 RIOB18_X107Y277 IO_L11P_T1_SRCC_34
215 F9 34 IOB_X1Y282 RIOB18_X107Y281 IO_L9P_T1_DQS_34
216 F10 35 IOB_X1Y343 RIOB18_X107Y343 IO_L3N_T0_DQS_AD1N_35
217 F12 35 IOB_X1Y348 RIOB18_X107Y347 IO_L1P_T0_AD0P_35
218 F13 35 IOB_X1Y338 RIOB18_X107Y337 IO_L6P_T0_35
219 F14 35 IOB_X1Y327 RIOB18_X107Y327 IO_L11N_T1_SRCC_35
220 F15 35 IOB_X1Y322 RIOB18_X107Y321 IO_L14P_T2_AD4P_SRCC_35
221 F17 501 IOPAD_X1Y119 PSS2_X32Y313 PS_MIO42_501
222 F18 501 IOPAD_X1Y104 PSS2_X32Y313 PS_MIO27_501
223 F19 501 IOPAD_X1Y102 PSS2_X32Y313 PS_MIO25_501
224 F20 501 IOPAD_X1Y100 PSS2_X32Y313 PS_MIO23_501
225 F22 501 IOPAD_X1Y98 PSS2_X32Y313 PS_MIO21_501
226 F23 500 IOPAD_X1Y83 PSS2_X32Y313 PS_MIO6_500
227 F24 500 IOPAD_X1Y81 PSS2_X32Y313 PS_MIO4_500
228 F25 502 IOPAD_X1Y33 PSS2_X32Y313 PS_DDR_DQ1_502
229 G1 33 IOB_X1Y229 RIOB18_X107Y229 IO_L10N_T1_33
230 G2 33 IOB_X1Y244 RIOB18_X107Y243 IO_L3P_T0_DQS_33
231 G4 33 IOB_X1Y248 RIOB18_X107Y247 IO_L1P_T0_33
232 G5 34 IOB_X1Y295 RIOB18_X107Y295 IO_L2N_T0_34
233 G6 34 IOB_X1Y296 RIOB18_X107Y295 IO_L2P_T0_34
234 G7 34 IOB_X1Y276 RIOB18_X107Y275 IO_L12P_T1_MRCC_34
235 G9 34 IOB_X1Y293 RIOB18_X107Y293 IO_L3N_T0_DQS_34
236 G10 35 IOB_X1Y344 RIOB18_X107Y343 IO_L3P_T0_DQS_AD1P_35
237 G11 35 IOB_X1Y339 RIOB18_X107Y339 IO_L5N_T0_AD9N_35
238 G12 35 IOB_X1Y340 RIOB18_X107Y339 IO_L5P_T0_AD9P_35
239 G14 35 IOB_X1Y328 RIOB18_X107Y327 IO_L11P_T1_SRCC_35
240 G15 35 IOB_X1Y329 RIOB18_X107Y329 IO_L10N_T1_AD11N_35
241 G16 35 IOB_X1Y330 RIOB18_X107Y329 IO_L10P_T1_AD11P_35
242 G17 501 IOPAD_X1Y94 PSS2_X32Y313 PS_MIO17_501
243 G19 501 IOPAD_X1Y96 PSS2_X32Y313 PS_MIO19_501
244 G20 501 IOPAD_X1Y95 PSS2_X32Y313 PS_MIO18_501
245 G21 501 IOPAD_X1Y93 PSS2_X32Y313 PS_MIO16_501
246 G22 501 IOPAD_X1Y99 PSS2_X32Y313 PS_MIO22_501
247 G24 502 IOPAD_X1Y28 PSS2_X32Y313 PS_DDR_DM0_502
248 G25 502 IOPAD_X1Y64 PSS2_X32Y313 PS_DDR_DQS_N0_502
249 G26 502 IOPAD_X1Y35 PSS2_X32Y313 PS_DDR_DQ3_502
250 H1 33 IOB_X1Y235 RIOB18_X107Y235 IO_L7N_T1_33
251 H2 33 IOB_X1Y230 RIOB18_X107Y229 IO_L10P_T1_33
252 H3 33 IOB_X1Y233 RIOB18_X107Y233 IO_L8N_T1_33
253 H4 33 IOB_X1Y234 RIOB18_X107Y233 IO_L8P_T1_33
254 H6 34 IOB_X1Y291 RIOB18_X107Y291 IO_L4N_T0_34
255 H7 34 IOB_X1Y292 RIOB18_X107Y291 IO_L4P_T0_34
256 H8 34 IOB_X1Y287 RIOB18_X107Y287 IO_L6N_T0_VREF_34
257 H9 34 IOB_X1Y294 RIOB18_X107Y293 IO_L3P_T0_DQS_PUDC_B_34
258 H11 34 IOB_X1Y297 RIOB18_X107Y297 IO_L1N_T0_34
259 H12 35 IOB_X1Y335 RIOB18_X107Y335 IO_L7N_T1_AD2N_35
260 H13 35 IOB_X1Y336 RIOB18_X107Y335 IO_L7P_T1_AD2P_35
261 H14 35 IOB_X1Y325 RIOB18_X107Y325 IO_L12N_T1_MRCC_35
262 H16 35 IOB_X1Y349 RIOB18_SING_X107Y349 IO_0_VRN_35
263 H17 501 IOPAD_X1Y103 PSS2_X32Y313 PS_MIO26_501
264 H19 501 IOPAD_X1Y97 PSS2_X32Y313 PS_MIO20_501
265 H21 502 IOPAD_X1Y15 PSS2_X32Y313 PS_DDR_A11_502
266 H22 502 IOPAD_X1Y72 PSS2_X32Y313 PS_DDR_DRST_B_502
267 H23 502 IOPAD_X1Y37 PSS2_X32Y313 PS_DDR_DQ5_502
268 H24 502 IOPAD_X1Y68 PSS2_X32Y313 PS_DDR_DQS_P0_502
269 H26 502 IOPAD_X1Y36 PSS2_X32Y313 PS_DDR_DQ4_502
270 J1 33 IOB_X1Y236 RIOB18_X107Y235 IO_L7P_T1_33
271 J3 33 IOB_X1Y225 RIOB18_X107Y225 IO_L12N_T1_MRCC_33
272 J4 33 IOB_X1Y226 RIOB18_X107Y225 IO_L12P_T1_MRCC_33
273 J5 33 IOB_X1Y209 RIOB18_X107Y209 IO_L20N_T3_33
274 J6 33 IOB_X1Y205 RIOB18_X107Y205 IO_L22N_T3_33
275 J8 34 IOB_X1Y288 RIOB18_X107Y287 IO_L6P_T0_34
276 J9 34 IOB_X1Y289 RIOB18_X107Y289 IO_L5N_T0_34
277 J10 34 IOB_X1Y290 RIOB18_X107Y289 IO_L5P_T0_34
278 J11 34 IOB_X1Y298 RIOB18_X107Y297 IO_L1P_T0_34
279 J13 35 IOB_X1Y333 RIOB18_X107Y333 IO_L8N_T1_AD10N_35
280 J14 35 IOB_X1Y326 RIOB18_X107Y325 IO_L12P_T1_MRCC_35
281 J15 35 IOB_X1Y331 RIOB18_X107Y331 IO_L9N_T1_DQS_AD3N_35
282 J16 501 IOPAD_X1Y111 PSS2_X32Y313 PS_MIO34_501
283 J18 501 IOPAD_X1Y105 PSS2_X32Y313 PS_MIO28_501
284 J19 501 IOPAD_X1Y101 PSS2_X32Y313 PS_MIO24_501
285 J20 502 IOPAD_X1Y18 PSS2_X32Y313 PS_DDR_A13_502
286 J21 502 IOPAD_X1Y11 PSS2_X32Y313 PS_DDR_A7_502
287 J23 502 IOPAD_X1Y39 PSS2_X32Y313 PS_DDR_DQ7_502
288 J24 502 IOPAD_X1Y38 PSS2_X32Y313 PS_DDR_DQ6_502
289 J25 502 IOPAD_X1Y34 PSS2_X32Y313 PS_DDR_DQ2_502
290 J26 502 IOPAD_X1Y32 PSS2_X32Y313 PS_DDR_DQ0_502
291 K1 33 IOB_X1Y231 RIOB18_X107Y231 IO_L9N_T1_DQS_33
292 K2 33 IOB_X1Y232 RIOB18_X107Y231 IO_L9P_T1_DQS_33
293 K3 33 IOB_X1Y227 RIOB18_X107Y227 IO_L11N_T1_SRCC_33
294 K5 33 IOB_X1Y210 RIOB18_X107Y209 IO_L20P_T3_33
295 K6 33 IOB_X1Y206 RIOB18_X107Y205 IO_L22P_T3_33
296 K7 33 IOB_X1Y201 RIOB18_X107Y201 IO_L24N_T3_33
297 K8 33 IOB_X1Y202 RIOB18_X107Y201 IO_L24P_T3_33
298 K10 34 IOB_X1Y250 RIOB18_SING_X107Y250 IO_25_VRP_34
299 K11 34 IOB_X1Y299 RIOB18_SING_X107Y299 IO_0_VRN_34
300 K12 35 IOB_X1Y300 RIOB18_SING_X107Y300 IO_25_VRP_35
301 K13 35 IOB_X1Y334 RIOB18_X107Y333 IO_L8P_T1_AD10P_35
302 K15 35 IOB_X1Y332 RIOB18_X107Y331 IO_L9P_T1_DQS_AD3P_35
303 K16 501 IOPAD_X1Y113 PSS2_X32Y313 PS_MIO36_501
304 K17 501 IOPAD_X1Y109 PSS2_X32Y313 PS_MIO32_501
305 K19 501 IOPAD_X1Y107 PSS2_X32Y313 PS_MIO30_501
306 K20 502 IOPAD_X1Y5 PSS2_X32Y313 PS_DDR_A1_502
307 K22 502 IOPAD_X1Y4 PSS2_X32Y313 PS_DDR_A0_502
308 K23 502 IOPAD_X1Y43 PSS2_X32Y313 PS_DDR_DQ11_502
309 K25 502 IOPAD_X1Y29 PSS2_X32Y313 PS_DDR_DM1_502
310 K26 502 IOPAD_X1Y40 PSS2_X32Y313 PS_DDR_DQ8_502
311 L2 33 IOB_X1Y217 RIOB18_X107Y217 IO_L16N_T2_33
312 L3 33 IOB_X1Y228 RIOB18_X107Y227 IO_L11P_T1_SRCC_33
313 L4 33 IOB_X1Y221 RIOB18_X107Y221 IO_L14N_T2_SRCC_33
314 L5 33 IOB_X1Y222 RIOB18_X107Y221 IO_L14P_T2_SRCC_33
315 L7 33 IOB_X1Y211 RIOB18_X107Y211 IO_L19N_T3_VREF_33
316 L8 33 IOB_X1Y207 RIOB18_X107Y207 IO_L21N_T3_DQS_33
317 L9 33 IOB_X1Y249 RIOB18_SING_X107Y249 IO_0_VRN_33
318 L20 502 IOPAD_X1Y10 PSS2_X32Y313 PS_DDR_A6_502
319 L22 502 IOPAD_X1Y7 PSS2_X32Y313 PS_DDR_A3_502
320 L23 502 IOPAD_X1Y41 PSS2_X32Y313 PS_DDR_DQ9_502
321 L24 502 IOPAD_X1Y69 PSS2_X32Y313 PS_DDR_DQS_P1_502
322 L25 502 IOPAD_X1Y65 PSS2_X32Y313 PS_DDR_DQS_N1_502
323 M1 33 IOB_X1Y213 RIOB18_X107Y213 IO_L18N_T2_33
324 M2 33 IOB_X1Y218 RIOB18_X107Y217 IO_L16P_T2_33
325 M4 33 IOB_X1Y215 RIOB18_X107Y215 IO_L17N_T2_33
326 M5 33 IOB_X1Y223 RIOB18_X107Y223 IO_L13N_T2_MRCC_33
327 M6 33 IOB_X1Y224 RIOB18_X107Y223 IO_L13P_T2_MRCC_33
328 M7 33 IOB_X1Y212 RIOB18_X107Y211 IO_L19P_T3_33
329 M8 33 IOB_X1Y208 RIOB18_X107Y207 IO_L21P_T3_DQS_33
330 M20 502 IOPAD_X1Y8 PSS2_X32Y313 PS_DDR_A4_502
331 M22 502 IOPAD_X1Y14 PSS2_X32Y313 PS_DDR_A10_502
332 M24 502 IOPAD_X1Y46 PSS2_X32Y313 PS_DDR_DQ14_502
333 M25 502 IOPAD_X1Y44 PSS2_X32Y313 PS_DDR_DQ12_502
334 M26 502 IOPAD_X1Y42 PSS2_X32Y313 PS_DDR_DQ10_502
335 N1 33 IOB_X1Y214 RIOB18_X107Y213 IO_L18P_T2_33
336 N2 33 IOB_X1Y219 RIOB18_X107Y219 IO_L15N_T2_DQS_33
337 N3 33 IOB_X1Y220 RIOB18_X107Y219 IO_L15P_T2_DQS_33
338 N4 33 IOB_X1Y216 RIOB18_X107Y215 IO_L17P_T2_33
339 N6 33 IOB_X1Y203 RIOB18_X107Y203 IO_L23N_T3_33
340 N7 33 IOB_X1Y204 RIOB18_X107Y203 IO_L23P_T3_33
341 N8 33 IOB_X1Y200 RIOB18_SING_X107Y200 IO_25_VRP_33
342 N14 0 IPAD_X0Y120 MONITOR_BOT_PELE1_X197Y339 VP_0
343 N21 502 IOPAD_X1Y6 PSS2_X32Y313 PS_DDR_A2_502
344 N22 502 IOPAD_X1Y9 PSS2_X32Y313 PS_DDR_A5_502
345 N23 502 IOPAD_X1Y47 PSS2_X32Y313 PS_DDR_DQ15_502
346 N24 502 IOPAD_X1Y45 PSS2_X32Y313 PS_DDR_DQ13_502
347 N26 502 IOPAD_X1Y50 PSS2_X32Y313 PS_DDR_DQ18_502
348 P13 0 IPAD_X0Y121 MONITOR_BOT_PELE1_X197Y339 VN_0
349 P20 502 IOPAD_X1Y16 PSS2_X32Y313 PS_DDR_A12_502
350 P21 502 IOPAD_X1Y24 PSS2_X32Y313 PS_DDR_CKN_502
351 P23 502 IOPAD_X1Y51 PSS2_X32Y313 PS_DDR_DQ19_502
352 P24 502 IOPAD_X1Y49 PSS2_X32Y313 PS_DDR_DQ17_502
353 P25 502 IOPAD_X1Y70 PSS2_X32Y313 PS_DDR_DQS_P2_502
354 P26 502 IOPAD_X1Y30 PSS2_X32Y313 PS_DDR_DM2_502
355 R1 112 OPAD_X0Y30 GTX_CHANNEL_3_X249Y202 MGTXTXN3_112
356 R2 112 OPAD_X0Y31 GTX_CHANNEL_3_X249Y202 MGTXTXP3_112
357 R5 112 IPAD_X1Y99 GTX_COMMON_X249Y179 MGTREFCLK0N_112
358 R6 112 IPAD_X1Y98 GTX_COMMON_X249Y179 MGTREFCLK0P_112
359 R20 502 IOPAD_X1Y17 PSS2_X32Y313 PS_DDR_A14_502
360 R21 502 IOPAD_X1Y25 PSS2_X32Y313 PS_DDR_CKP_502
361 R22 502 IOPAD_X1Y21 PSS2_X32Y313 PS_DDR_BA2_502
362 R23 502 IOPAD_X1Y55 PSS2_X32Y313 PS_DDR_DQ23_502
363 R25 502 IOPAD_X1Y66 PSS2_X32Y313 PS_DDR_DQS_N2_502
364 R26 502 IOPAD_X1Y48 PSS2_X32Y313 PS_DDR_DQ16_502
365 T3 112 IPAD_X1Y114 GTX_CHANNEL_3_X249Y202 MGTXRXN3_112
366 T4 112 IPAD_X1Y115 GTX_CHANNEL_3_X249Y202 MGTXRXP3_112
367 T20 502 IOPAD_X1Y12 PSS2_X32Y313 PS_DDR_A8_502
368 T22 502 IOPAD_X1Y20 PSS2_X32Y313 PS_DDR_BA1_502
369 T23 502 IOPAD_X1Y54 PSS2_X32Y313 PS_DDR_DQ22_502
370 T24 502 IOPAD_X1Y52 PSS2_X32Y313 PS_DDR_DQ20_502
371 T25 502 IOPAD_X1Y53 PSS2_X32Y313 PS_DDR_DQ21_502
372 U1 112 OPAD_X0Y28 GTX_CHANNEL_2_X249Y191 MGTXTXN2_112
373 U2 112 OPAD_X0Y29 GTX_CHANNEL_2_X249Y191 MGTXTXP2_112
374 U5 112 IPAD_X1Y101 GTX_COMMON_X249Y179 MGTREFCLK1N_112
375 U6 112 IPAD_X1Y100 GTX_COMMON_X249Y179 MGTREFCLK1P_112
376 U20 502 IOPAD_X1Y13 PSS2_X32Y313 PS_DDR_A9_502
377 U21 502 IOPAD_X1Y23 PSS2_X32Y313 PS_DDR_CKE_502
378 U22 502 IOPAD_X1Y19 PSS2_X32Y313 PS_DDR_BA0_502
379 U24 502 IOPAD_X1Y58 PSS2_X32Y313 PS_DDR_DQ26_502
380 U25 502 IOPAD_X1Y59 PSS2_X32Y313 PS_DDR_DQ27_502
381 U26 502 IOPAD_X1Y57 PSS2_X32Y313 PS_DDR_DQ25_502
382 V3 112 IPAD_X1Y108 GTX_CHANNEL_2_X249Y191 MGTXRXN2_112
383 V4 112 IPAD_X1Y109 GTX_CHANNEL_2_X249Y191 MGTXRXP2_112
384 V18 13 IOB_X0Y200 LIOB33_SING_X0Y200 IO_25_13
385 V19 13 IOB_X0Y249 LIOB33_SING_X0Y249 IO_0_13
386 V21 502 IOPAD_X1Y2 PSS2_X32Y313 PS_DDR_VRN_502
387 V22 502 IOPAD_X1Y1 PSS2_X32Y313 PS_DDR_WE_B_502
388 V23 502 IOPAD_X1Y133 PSS2_X32Y313 PS_DDR_RAS_B_502
389 V24 502 IOPAD_X1Y56 PSS2_X32Y313 PS_DDR_DQ24_502
390 V26 502 IOPAD_X1Y31 PSS2_X32Y313 PS_DDR_DM3_502
391 W1 112 OPAD_X0Y26 GTX_CHANNEL_1_X249Y173 MGTXTXN1_112
392 W2 112 OPAD_X0Y27 GTX_CHANNEL_1_X249Y173 MGTXTXP1_112
393 W5 111 IPAD_X1Y69 GTX_COMMON_X249Y127 MGTREFCLK0N_111
394 W6 111 IPAD_X1Y68 GTX_COMMON_X249Y127 MGTREFCLK0P_111
395 W13 12 IOB_X0Y190 LIOB33_X0Y189 IO_L5P_T0_12
396 W14 12 IOB_X0Y199 LIOB33_SING_X0Y199 IO_0_12
397 W15 12 IOB_X0Y151 LIOB33_X0Y151 IO_L24N_T3_12
398 W16 12 IOB_X0Y152 LIOB33_X0Y151 IO_L24P_T3_12
399 W17 12 IOB_X0Y150 LIOB33_SING_X0Y150 IO_25_12
400 W18 13 IOB_X0Y204 LIOB33_X0Y203 IO_L23P_T3_13
401 W19 13 IOB_X0Y203 LIOB33_X0Y203 IO_L23N_T3_13
402 W20 13 IOB_X0Y212 LIOB33_X0Y211 IO_L19P_T3_13
403 W21 502 IOPAD_X1Y3 PSS2_X32Y313 PS_DDR_VRP_502
404 W23 502 IOPAD_X1Y63 PSS2_X32Y313 PS_DDR_DQ31_502
405 W24 502 IOPAD_X1Y71 PSS2_X32Y313 PS_DDR_DQS_P3_502
406 W25 502 IOPAD_X1Y67 PSS2_X32Y313 PS_DDR_DQS_N3_502
407 W26 502 IOPAD_X1Y60 PSS2_X32Y313 PS_DDR_DQ28_502
408 Y3 112 IPAD_X1Y96 GTX_CHANNEL_1_X249Y173 MGTXRXN1_112
409 Y4 112 IPAD_X1Y97 GTX_CHANNEL_1_X249Y173 MGTXRXP1_112
410 Y10 12 IOB_X0Y194 LIOB33_X0Y193 IO_L3P_T0_DQS_12
411 Y11 12 IOB_X0Y197 LIOB33_X0Y197 IO_L1N_T0_12
412 Y12 12 IOB_X0Y198 LIOB33_X0Y197 IO_L1P_T0_12
413 Y13 12 IOB_X0Y189 LIOB33_X0Y189 IO_L5N_T0_12
414 Y15 12 IOB_X0Y153 LIOB33_X0Y153 IO_L23N_T3_12
415 Y16 12 IOB_X0Y154 LIOB33_X0Y153 IO_L23P_T3_12
416 Y17 12 IOB_X0Y162 LIOB33_X0Y161 IO_L19P_T3_12
417 Y18 13 IOB_X0Y202 LIOB33_X0Y201 IO_L24P_T3_13
418 Y20 13 IOB_X0Y211 LIOB33_X0Y211 IO_L19N_T3_VREF_13
419 Y21 502 IOPAD_X1Y27 PSS2_X32Y313 PS_DDR_CS_B_502
420 Y22 502 IOPAD_X1Y131 PSS2_X32Y313 PS_DDR_ODT_502
421 Y23 502 IOPAD_X1Y22 PSS2_X32Y313 PS_DDR_CAS_B_502
422 Y25 502 IOPAD_X1Y61 PSS2_X32Y313 PS_DDR_DQ29_502
423 Y26 502 IOPAD_X1Y62 PSS2_X32Y313 PS_DDR_DQ30_502

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File diff suppressed because it is too large Load Diff

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@ -0,0 +1,423 @@
pin,bank,site,tile,pin_function
A2,34,IOB_X1Y251,RIOB18_X107Y251,IO_L24N_T3_34
A3,34,IOB_X1Y255,RIOB18_X107Y255,IO_L22N_T3_34
A4,34,IOB_X1Y256,RIOB18_X107Y255,IO_L22P_T3_34
A5,34,IOB_X1Y257,RIOB18_X107Y257,IO_L21N_T3_DQS_34
A7,34,IOB_X1Y263,RIOB18_X107Y263,IO_L18N_T2_34
A8,34,IOB_X1Y265,RIOB18_X107Y265,IO_L17N_T2_34
A9,34,IOB_X1Y266,RIOB18_X107Y265,IO_L17P_T2_34
A10,34,IOB_X1Y267,RIOB18_X107Y267,IO_L16N_T2_34
A12,35,IOB_X1Y301,RIOB18_X107Y301,IO_L24N_T3_AD15N_35
A13,35,IOB_X1Y302,RIOB18_X107Y301,IO_L24P_T3_AD15P_35
A14,35,IOB_X1Y307,RIOB18_X107Y307,IO_L21N_T3_DQS_AD14N_35
A15,35,IOB_X1Y308,RIOB18_X107Y307,IO_L21P_T3_DQS_AD14P_35
A17,35,IOB_X1Y313,RIOB18_X107Y313,IO_L18N_T2_AD13N_35
A18,501,IOPAD_X1Y126,PSS2_X32Y313,PS_MIO49_501
A19,501,IOPAD_X1Y130,PSS2_X32Y313,PS_MIO53_501
A20,501,IOPAD_X1Y129,PSS2_X32Y313,PS_MIO52_501
A22,501,IOPAD_X1Y134,PSS2_X32Y313,PS_SRST_B_501
A23,500,IOPAD_X1Y89,PSS2_X32Y313,PS_MIO12_500
A24,500,IOPAD_X1Y85,PSS2_X32Y313,PS_MIO8_500
A25,500,IOPAD_X1Y87,PSS2_X32Y313,PS_MIO10_500
AA1,112,OPAD_X0Y24,GTX_CHANNEL_0_X249Y162,MGTXTXN0_112
AA2,112,OPAD_X0Y25,GTX_CHANNEL_0_X249Y162,MGTXTXP0_112
AA5,111,IPAD_X1Y71,GTX_COMMON_X249Y127,MGTREFCLK1N_111
AA6,111,IPAD_X1Y70,GTX_COMMON_X249Y127,MGTREFCLK1P_111
AA10,12,IOB_X0Y193,LIOB33_X0Y193,IO_L3N_T0_DQS_12
AA12,12,IOB_X0Y187,LIOB33_X0Y187,IO_L6N_T0_VREF_12
AA13,12,IOB_X0Y188,LIOB33_X0Y187,IO_L6P_T0_12
AA14,12,IOB_X0Y155,LIOB33_X0Y155,IO_L22N_T3_12
AA15,12,IOB_X0Y156,LIOB33_X0Y155,IO_L22P_T3_12
AA17,12,IOB_X0Y161,LIOB33_X0Y161,IO_L19N_T3_VREF_12
AA18,13,IOB_X0Y201,LIOB33_X0Y201,IO_L24N_T3_13
AA19,13,IOB_X0Y206,LIOB33_X0Y205,IO_L22P_T3_13
AA20,13,IOB_X0Y210,LIOB33_X0Y209,IO_L20P_T3_13
AA22,13,IOB_X0Y230,LIOB33_X0Y229,IO_L10P_T1_13
AA23,13,IOB_X0Y229,LIOB33_X0Y229,IO_L10N_T1_13
AA24,13,IOB_X0Y238,LIOB33_X0Y237,IO_L6P_T0_13
AA25,13,IOB_X0Y248,LIOB33_X0Y247,IO_L1P_T0_13
AB3,112,IPAD_X1Y90,GTX_CHANNEL_0_X249Y162,MGTXRXN0_112
AB4,112,IPAD_X1Y91,GTX_CHANNEL_0_X249Y162,MGTXRXP0_112
AB10,12,IOB_X0Y191,LIOB33_X0Y191,IO_L4N_T0_12
AB11,12,IOB_X0Y192,LIOB33_X0Y191,IO_L4P_T0_12
AB12,12,IOB_X0Y196,LIOB33_X0Y195,IO_L2P_T0_12
AB14,12,IOB_X0Y171,LIOB33_X0Y171,IO_L14N_T2_SRCC_12
AB15,12,IOB_X0Y172,LIOB33_X0Y171,IO_L14P_T2_SRCC_12
AB16,12,IOB_X0Y159,LIOB33_X0Y159,IO_L20N_T3_12
AB17,12,IOB_X0Y160,LIOB33_X0Y159,IO_L20P_T3_12
AB19,13,IOB_X0Y205,LIOB33_X0Y205,IO_L22N_T3_13
AB20,13,IOB_X0Y209,LIOB33_X0Y209,IO_L20N_T3_13
AB21,13,IOB_X0Y232,LIOB33_X0Y231,IO_L9P_T1_DQS_13
AB22,13,IOB_X0Y231,LIOB33_X0Y231,IO_L9N_T1_DQS_13
AB24,13,IOB_X0Y237,LIOB33_X0Y237,IO_L6N_T0_VREF_13
AB25,13,IOB_X0Y247,LIOB33_X0Y247,IO_L1N_T0_13
AB26,13,IOB_X0Y246,LIOB33_X0Y245,IO_L2P_T0_13
AC1,111,OPAD_X0Y22,GTX_CHANNEL_3_X249Y150,MGTXTXN3_111
AC2,111,OPAD_X0Y23,GTX_CHANNEL_3_X249Y150,MGTXTXP3_111
AC5,111,IPAD_X1Y78,GTX_CHANNEL_2_X249Y139,MGTXRXN2_111
AC6,111,IPAD_X1Y79,GTX_CHANNEL_2_X249Y139,MGTXRXP2_111
AC11,12,IOB_X0Y195,LIOB33_X0Y195,IO_L2N_T0_12
AC12,12,IOB_X0Y178,LIOB33_X0Y177,IO_L11P_T1_SRCC_12
AC13,12,IOB_X0Y176,LIOB33_X0Y175,IO_L12P_T1_MRCC_12
AC14,12,IOB_X0Y174,LIOB33_X0Y173,IO_L13P_T2_MRCC_12
AC16,12,IOB_X0Y157,LIOB33_X0Y157,IO_L21N_T3_DQS_12
AC17,12,IOB_X0Y158,LIOB33_X0Y157,IO_L21P_T3_DQS_12
AC18,13,IOB_X0Y208,LIOB33_X0Y207,IO_L21P_T3_DQS_13
AC19,13,IOB_X0Y207,LIOB33_X0Y207,IO_L21N_T3_DQS_13
AC21,13,IOB_X0Y222,LIOB33_X0Y221,IO_L14P_T2_SRCC_13
AC22,13,IOB_X0Y221,LIOB33_X0Y221,IO_L14N_T2_SRCC_13
AC23,13,IOB_X0Y226,LIOB33_X0Y225,IO_L12P_T1_MRCC_13
AC24,13,IOB_X0Y225,LIOB33_X0Y225,IO_L12N_T1_MRCC_13
AC26,13,IOB_X0Y245,LIOB33_X0Y245,IO_L2N_T0_13
AD3,111,IPAD_X1Y84,GTX_CHANNEL_3_X249Y150,MGTXRXN3_111
AD4,111,IPAD_X1Y85,GTX_CHANNEL_3_X249Y150,MGTXRXP3_111
AD7,111,IPAD_X1Y60,GTX_CHANNEL_0_X249Y110,MGTXRXN0_111
AD8,111,IPAD_X1Y61,GTX_CHANNEL_0_X249Y110,MGTXRXP0_111
AD10,12,IOB_X0Y185,LIOB33_X0Y185,IO_L7N_T1_12
AD11,12,IOB_X0Y177,LIOB33_X0Y177,IO_L11N_T1_SRCC_12
AD13,12,IOB_X0Y175,LIOB33_X0Y175,IO_L12N_T1_MRCC_12
AD14,12,IOB_X0Y173,LIOB33_X0Y173,IO_L13N_T2_MRCC_12
AD15,12,IOB_X0Y169,LIOB33_X0Y169,IO_L15N_T2_DQS_12
AD16,12,IOB_X0Y170,LIOB33_X0Y169,IO_L15P_T2_DQS_12
AD18,13,IOB_X0Y216,LIOB33_X0Y215,IO_L17P_T2_13
AD19,13,IOB_X0Y215,LIOB33_X0Y215,IO_L17N_T2_13
AD20,13,IOB_X0Y224,LIOB33_X0Y223,IO_L13P_T2_MRCC_13
AD21,13,IOB_X0Y223,LIOB33_X0Y223,IO_L13N_T2_MRCC_13
AD23,13,IOB_X0Y228,LIOB33_X0Y227,IO_L11P_T1_SRCC_13
AD24,13,IOB_X0Y227,LIOB33_X0Y227,IO_L11N_T1_SRCC_13
AD25,13,IOB_X0Y242,LIOB33_X0Y241,IO_L4P_T0_13
AD26,13,IOB_X0Y241,LIOB33_X0Y241,IO_L4N_T0_13
AE1,111,OPAD_X0Y20,GTX_CHANNEL_2_X249Y139,MGTXTXN2_111
AE2,111,OPAD_X0Y21,GTX_CHANNEL_2_X249Y139,MGTXTXP2_111
AE5,111,IPAD_X1Y66,GTX_CHANNEL_1_X249Y121,MGTXRXN1_111
AE6,111,IPAD_X1Y67,GTX_CHANNEL_1_X249Y121,MGTXRXP1_111
AE10,12,IOB_X0Y186,LIOB33_X0Y185,IO_L7P_T1_12
AE11,12,IOB_X0Y182,LIOB33_X0Y181,IO_L9P_T1_DQS_12
AE12,12,IOB_X0Y184,LIOB33_X0Y183,IO_L8P_T1_12
AE13,12,IOB_X0Y180,LIOB33_X0Y179,IO_L10P_T1_12
AE15,12,IOB_X0Y165,LIOB33_X0Y165,IO_L17N_T2_12
AE16,12,IOB_X0Y166,LIOB33_X0Y165,IO_L17P_T2_12
AE17,12,IOB_X0Y164,LIOB33_X0Y163,IO_L18P_T2_12
AE18,13,IOB_X0Y214,LIOB33_X0Y213,IO_L18P_T2_13
AE20,13,IOB_X0Y218,LIOB33_X0Y217,IO_L16P_T2_13
AE21,13,IOB_X0Y217,LIOB33_X0Y217,IO_L16N_T2_13
AE22,13,IOB_X0Y236,LIOB33_X0Y235,IO_L7P_T1_13
AE23,13,IOB_X0Y234,LIOB33_X0Y233,IO_L8P_T1_13
AE25,13,IOB_X0Y244,LIOB33_X0Y243,IO_L3P_T0_DQS_13
AE26,13,IOB_X0Y243,LIOB33_X0Y243,IO_L3N_T0_DQS_13
AF3,111,OPAD_X0Y18,GTX_CHANNEL_1_X249Y121,MGTXTXN1_111
AF4,111,OPAD_X0Y19,GTX_CHANNEL_1_X249Y121,MGTXTXP1_111
AF7,111,OPAD_X0Y16,GTX_CHANNEL_0_X249Y110,MGTXTXN0_111
AF8,111,OPAD_X0Y17,GTX_CHANNEL_0_X249Y110,MGTXTXP0_111
AF10,12,IOB_X0Y181,LIOB33_X0Y181,IO_L9N_T1_DQS_12
AF12,12,IOB_X0Y183,LIOB33_X0Y183,IO_L8N_T1_12
AF13,12,IOB_X0Y179,LIOB33_X0Y179,IO_L10N_T1_12
AF14,12,IOB_X0Y167,LIOB33_X0Y167,IO_L16N_T2_12
AF15,12,IOB_X0Y168,LIOB33_X0Y167,IO_L16P_T2_12
AF17,12,IOB_X0Y163,LIOB33_X0Y163,IO_L18N_T2_12
AF18,13,IOB_X0Y213,LIOB33_X0Y213,IO_L18N_T2_13
AF19,13,IOB_X0Y220,LIOB33_X0Y219,IO_L15P_T2_DQS_13
AF20,13,IOB_X0Y219,LIOB33_X0Y219,IO_L15N_T2_DQS_13
AF22,13,IOB_X0Y235,LIOB33_X0Y235,IO_L7N_T1_13
AF23,13,IOB_X0Y233,LIOB33_X0Y233,IO_L8N_T1_13
AF24,13,IOB_X0Y240,LIOB33_X0Y239,IO_L5P_T0_13
AF25,13,IOB_X0Y239,LIOB33_X0Y239,IO_L5N_T0_13
B1,34,IOB_X1Y253,RIOB18_X107Y253,IO_L23N_T3_34
B2,34,IOB_X1Y252,RIOB18_X107Y251,IO_L24P_T3_34
B4,34,IOB_X1Y259,RIOB18_X107Y259,IO_L20N_T3_34
B5,34,IOB_X1Y260,RIOB18_X107Y259,IO_L20P_T3_34
B6,34,IOB_X1Y258,RIOB18_X107Y257,IO_L21P_T3_DQS_34
B7,34,IOB_X1Y264,RIOB18_X107Y263,IO_L18P_T2_34
B9,34,IOB_X1Y269,RIOB18_X107Y269,IO_L15N_T2_DQS_34
B10,34,IOB_X1Y268,RIOB18_X107Y267,IO_L16P_T2_34
B11,35,IOB_X1Y303,RIOB18_X107Y303,IO_L23N_T3_35
B12,35,IOB_X1Y305,RIOB18_X107Y305,IO_L22N_T3_AD7N_35
B14,35,IOB_X1Y309,RIOB18_X107Y309,IO_L20N_T3_AD6N_35
B15,35,IOB_X1Y315,RIOB18_X107Y315,IO_L17N_T2_AD5N_35
B16,35,IOB_X1Y316,RIOB18_X107Y315,IO_L17P_T2_AD5P_35
B17,35,IOB_X1Y314,RIOB18_X107Y313,IO_L18P_T2_AD13P_35
B19,501,IOPAD_X1Y124,PSS2_X32Y313,PS_MIO47_501
B20,501,IOPAD_X1Y128,PSS2_X32Y313,PS_MIO51_501
B21,501,IOPAD_X1Y125,PSS2_X32Y313,PS_MIO48_501
B22,501,IOPAD_X1Y127,PSS2_X32Y313,PS_MIO50_501
B24,500,IOPAD_X1Y26,PSS2_X32Y313,PS_CLK_500
B25,500,IOPAD_X1Y90,PSS2_X32Y313,PS_MIO13_500
B26,500,IOPAD_X1Y88,PSS2_X32Y313,PS_MIO11_500
C1,33,IOB_X1Y241,RIOB18_X107Y241,IO_L4N_T0_33
C2,34,IOB_X1Y254,RIOB18_X107Y253,IO_L23P_T3_34
C3,34,IOB_X1Y261,RIOB18_X107Y261,IO_L19N_T3_VREF_34
C4,34,IOB_X1Y262,RIOB18_X107Y261,IO_L19P_T3_34
C6,34,IOB_X1Y271,RIOB18_X107Y271,IO_L14N_T2_SRCC_34
C7,34,IOB_X1Y273,RIOB18_X107Y273,IO_L13N_T2_MRCC_34
C8,34,IOB_X1Y274,RIOB18_X107Y273,IO_L13P_T2_MRCC_34
C9,34,IOB_X1Y270,RIOB18_X107Y269,IO_L15P_T2_DQS_34
C11,35,IOB_X1Y304,RIOB18_X107Y303,IO_L23P_T3_35
C12,35,IOB_X1Y306,RIOB18_X107Y305,IO_L22P_T3_AD7P_35
C13,35,IOB_X1Y311,RIOB18_X107Y311,IO_L19N_T3_VREF_35
C14,35,IOB_X1Y310,RIOB18_X107Y309,IO_L20P_T3_AD6P_35
C16,35,IOB_X1Y319,RIOB18_X107Y319,IO_L15N_T2_DQS_AD12N_35
C17,35,IOB_X1Y320,RIOB18_X107Y319,IO_L15P_T2_DQS_AD12P_35
C18,501,IOPAD_X1Y122,PSS2_X32Y313,PS_MIO45_501
C19,501,IOPAD_X1Y118,PSS2_X32Y313,PS_MIO41_501
C21,501,IOPAD_X1Y116,PSS2_X32Y313,PS_MIO39_501
C22,501,IOPAD_X1Y117,PSS2_X32Y313,PS_MIO40_501
C23,500,IOPAD_X1Y132,PSS2_X32Y313,PS_POR_B_500
C24,500,IOPAD_X1Y92,PSS2_X32Y313,PS_MIO15_500
C26,500,IOPAD_X1Y82,PSS2_X32Y313,PS_MIO5_500
D1,33,IOB_X1Y242,RIOB18_X107Y241,IO_L4P_T0_33
D3,33,IOB_X1Y245,RIOB18_X107Y245,IO_L2N_T0_33
D4,33,IOB_X1Y246,RIOB18_X107Y245,IO_L2P_T0_33
D5,34,IOB_X1Y279,RIOB18_X107Y279,IO_L10N_T1_34
D6,34,IOB_X1Y272,RIOB18_X107Y271,IO_L14P_T2_SRCC_34
D8,34,IOB_X1Y283,RIOB18_X107Y283,IO_L8N_T1_34
D9,34,IOB_X1Y284,RIOB18_X107Y283,IO_L8P_T1_34
D10,35,IOB_X1Y345,RIOB18_X107Y345,IO_L2N_T0_AD8N_35
D11,35,IOB_X1Y341,RIOB18_X107Y341,IO_L4N_T0_35
D13,35,IOB_X1Y312,RIOB18_X107Y311,IO_L19P_T3_35
D14,35,IOB_X1Y323,RIOB18_X107Y323,IO_L13N_T2_MRCC_35
D15,35,IOB_X1Y324,RIOB18_X107Y323,IO_L13P_T2_MRCC_35
D16,35,IOB_X1Y317,RIOB18_X107Y317,IO_L16N_T2_35
D18,501,IOPAD_X1Y120,PSS2_X32Y313,PS_MIO43_501
D19,501,IOPAD_X1Y112,PSS2_X32Y313,PS_MIO35_501
D20,501,IOPAD_X1Y114,PSS2_X32Y313,PS_MIO37_501
D21,501,IOPAD_X1Y115,PSS2_X32Y313,PS_MIO38_501
D23,500,IOPAD_X1Y91,PSS2_X32Y313,PS_MIO14_500
D24,500,IOPAD_X1Y86,PSS2_X32Y313,PS_MIO9_500
D25,500,IOPAD_X1Y80,PSS2_X32Y313,PS_MIO3_500
D26,500,IOPAD_X1Y78,PSS2_X32Y313,PS_MIO1_500
E1,33,IOB_X1Y239,RIOB18_X107Y239,IO_L5N_T0_33
E2,33,IOB_X1Y240,RIOB18_X107Y239,IO_L5P_T0_33
E3,33,IOB_X1Y237,RIOB18_X107Y237,IO_L6N_T0_VREF_33
E5,34,IOB_X1Y285,RIOB18_X107Y285,IO_L7N_T1_34
E6,34,IOB_X1Y280,RIOB18_X107Y279,IO_L10P_T1_34
E7,34,IOB_X1Y277,RIOB18_X107Y277,IO_L11N_T1_SRCC_34
E8,34,IOB_X1Y281,RIOB18_X107Y281,IO_L9N_T1_DQS_34
E10,35,IOB_X1Y346,RIOB18_X107Y345,IO_L2P_T0_AD8P_35
E11,35,IOB_X1Y342,RIOB18_X107Y341,IO_L4P_T0_35
E12,35,IOB_X1Y347,RIOB18_X107Y347,IO_L1N_T0_AD0N_35
E13,35,IOB_X1Y337,RIOB18_X107Y337,IO_L6N_T0_VREF_35
E15,35,IOB_X1Y321,RIOB18_X107Y321,IO_L14N_T2_AD4N_SRCC_35
E16,35,IOB_X1Y318,RIOB18_X107Y317,IO_L16P_T2_35
E17,501,IOPAD_X1Y123,PSS2_X32Y313,PS_MIO46_501
E18,501,IOPAD_X1Y121,PSS2_X32Y313,PS_MIO44_501
E20,501,IOPAD_X1Y106,PSS2_X32Y313,PS_MIO29_501
E21,501,IOPAD_X1Y108,PSS2_X32Y313,PS_MIO31_501
E22,501,IOPAD_X1Y110,PSS2_X32Y313,PS_MIO33_501
E23,500,IOPAD_X1Y84,PSS2_X32Y313,PS_MIO7_500
E25,500,IOPAD_X1Y79,PSS2_X32Y313,PS_MIO2_500
E26,500,IOPAD_X1Y77,PSS2_X32Y313,PS_MIO0_500
F2,33,IOB_X1Y243,RIOB18_X107Y243,IO_L3N_T0_DQS_33
F3,33,IOB_X1Y238,RIOB18_X107Y237,IO_L6P_T0_33
F4,33,IOB_X1Y247,RIOB18_X107Y247,IO_L1N_T0_33
F5,34,IOB_X1Y286,RIOB18_X107Y285,IO_L7P_T1_34
F7,34,IOB_X1Y275,RIOB18_X107Y275,IO_L12N_T1_MRCC_34
F8,34,IOB_X1Y278,RIOB18_X107Y277,IO_L11P_T1_SRCC_34
F9,34,IOB_X1Y282,RIOB18_X107Y281,IO_L9P_T1_DQS_34
F10,35,IOB_X1Y343,RIOB18_X107Y343,IO_L3N_T0_DQS_AD1N_35
F12,35,IOB_X1Y348,RIOB18_X107Y347,IO_L1P_T0_AD0P_35
F13,35,IOB_X1Y338,RIOB18_X107Y337,IO_L6P_T0_35
F14,35,IOB_X1Y327,RIOB18_X107Y327,IO_L11N_T1_SRCC_35
F15,35,IOB_X1Y322,RIOB18_X107Y321,IO_L14P_T2_AD4P_SRCC_35
F17,501,IOPAD_X1Y119,PSS2_X32Y313,PS_MIO42_501
F18,501,IOPAD_X1Y104,PSS2_X32Y313,PS_MIO27_501
F19,501,IOPAD_X1Y102,PSS2_X32Y313,PS_MIO25_501
F20,501,IOPAD_X1Y100,PSS2_X32Y313,PS_MIO23_501
F22,501,IOPAD_X1Y98,PSS2_X32Y313,PS_MIO21_501
F23,500,IOPAD_X1Y83,PSS2_X32Y313,PS_MIO6_500
F24,500,IOPAD_X1Y81,PSS2_X32Y313,PS_MIO4_500
F25,502,IOPAD_X1Y33,PSS2_X32Y313,PS_DDR_DQ1_502
G1,33,IOB_X1Y229,RIOB18_X107Y229,IO_L10N_T1_33
G2,33,IOB_X1Y244,RIOB18_X107Y243,IO_L3P_T0_DQS_33
G4,33,IOB_X1Y248,RIOB18_X107Y247,IO_L1P_T0_33
G5,34,IOB_X1Y295,RIOB18_X107Y295,IO_L2N_T0_34
G6,34,IOB_X1Y296,RIOB18_X107Y295,IO_L2P_T0_34
G7,34,IOB_X1Y276,RIOB18_X107Y275,IO_L12P_T1_MRCC_34
G9,34,IOB_X1Y293,RIOB18_X107Y293,IO_L3N_T0_DQS_34
G10,35,IOB_X1Y344,RIOB18_X107Y343,IO_L3P_T0_DQS_AD1P_35
G11,35,IOB_X1Y339,RIOB18_X107Y339,IO_L5N_T0_AD9N_35
G12,35,IOB_X1Y340,RIOB18_X107Y339,IO_L5P_T0_AD9P_35
G14,35,IOB_X1Y328,RIOB18_X107Y327,IO_L11P_T1_SRCC_35
G15,35,IOB_X1Y329,RIOB18_X107Y329,IO_L10N_T1_AD11N_35
G16,35,IOB_X1Y330,RIOB18_X107Y329,IO_L10P_T1_AD11P_35
G17,501,IOPAD_X1Y94,PSS2_X32Y313,PS_MIO17_501
G19,501,IOPAD_X1Y96,PSS2_X32Y313,PS_MIO19_501
G20,501,IOPAD_X1Y95,PSS2_X32Y313,PS_MIO18_501
G21,501,IOPAD_X1Y93,PSS2_X32Y313,PS_MIO16_501
G22,501,IOPAD_X1Y99,PSS2_X32Y313,PS_MIO22_501
G24,502,IOPAD_X1Y28,PSS2_X32Y313,PS_DDR_DM0_502
G25,502,IOPAD_X1Y64,PSS2_X32Y313,PS_DDR_DQS_N0_502
G26,502,IOPAD_X1Y35,PSS2_X32Y313,PS_DDR_DQ3_502
H1,33,IOB_X1Y235,RIOB18_X107Y235,IO_L7N_T1_33
H2,33,IOB_X1Y230,RIOB18_X107Y229,IO_L10P_T1_33
H3,33,IOB_X1Y233,RIOB18_X107Y233,IO_L8N_T1_33
H4,33,IOB_X1Y234,RIOB18_X107Y233,IO_L8P_T1_33
H6,34,IOB_X1Y291,RIOB18_X107Y291,IO_L4N_T0_34
H7,34,IOB_X1Y292,RIOB18_X107Y291,IO_L4P_T0_34
H8,34,IOB_X1Y287,RIOB18_X107Y287,IO_L6N_T0_VREF_34
H9,34,IOB_X1Y294,RIOB18_X107Y293,IO_L3P_T0_DQS_PUDC_B_34
H11,34,IOB_X1Y297,RIOB18_X107Y297,IO_L1N_T0_34
H12,35,IOB_X1Y335,RIOB18_X107Y335,IO_L7N_T1_AD2N_35
H13,35,IOB_X1Y336,RIOB18_X107Y335,IO_L7P_T1_AD2P_35
H14,35,IOB_X1Y325,RIOB18_X107Y325,IO_L12N_T1_MRCC_35
H16,35,IOB_X1Y349,RIOB18_SING_X107Y349,IO_0_VRN_35
H17,501,IOPAD_X1Y103,PSS2_X32Y313,PS_MIO26_501
H19,501,IOPAD_X1Y97,PSS2_X32Y313,PS_MIO20_501
H21,502,IOPAD_X1Y15,PSS2_X32Y313,PS_DDR_A11_502
H22,502,IOPAD_X1Y72,PSS2_X32Y313,PS_DDR_DRST_B_502
H23,502,IOPAD_X1Y37,PSS2_X32Y313,PS_DDR_DQ5_502
H24,502,IOPAD_X1Y68,PSS2_X32Y313,PS_DDR_DQS_P0_502
H26,502,IOPAD_X1Y36,PSS2_X32Y313,PS_DDR_DQ4_502
J1,33,IOB_X1Y236,RIOB18_X107Y235,IO_L7P_T1_33
J3,33,IOB_X1Y225,RIOB18_X107Y225,IO_L12N_T1_MRCC_33
J4,33,IOB_X1Y226,RIOB18_X107Y225,IO_L12P_T1_MRCC_33
J5,33,IOB_X1Y209,RIOB18_X107Y209,IO_L20N_T3_33
J6,33,IOB_X1Y205,RIOB18_X107Y205,IO_L22N_T3_33
J8,34,IOB_X1Y288,RIOB18_X107Y287,IO_L6P_T0_34
J9,34,IOB_X1Y289,RIOB18_X107Y289,IO_L5N_T0_34
J10,34,IOB_X1Y290,RIOB18_X107Y289,IO_L5P_T0_34
J11,34,IOB_X1Y298,RIOB18_X107Y297,IO_L1P_T0_34
J13,35,IOB_X1Y333,RIOB18_X107Y333,IO_L8N_T1_AD10N_35
J14,35,IOB_X1Y326,RIOB18_X107Y325,IO_L12P_T1_MRCC_35
J15,35,IOB_X1Y331,RIOB18_X107Y331,IO_L9N_T1_DQS_AD3N_35
J16,501,IOPAD_X1Y111,PSS2_X32Y313,PS_MIO34_501
J18,501,IOPAD_X1Y105,PSS2_X32Y313,PS_MIO28_501
J19,501,IOPAD_X1Y101,PSS2_X32Y313,PS_MIO24_501
J20,502,IOPAD_X1Y18,PSS2_X32Y313,PS_DDR_A13_502
J21,502,IOPAD_X1Y11,PSS2_X32Y313,PS_DDR_A7_502
J23,502,IOPAD_X1Y39,PSS2_X32Y313,PS_DDR_DQ7_502
J24,502,IOPAD_X1Y38,PSS2_X32Y313,PS_DDR_DQ6_502
J25,502,IOPAD_X1Y34,PSS2_X32Y313,PS_DDR_DQ2_502
J26,502,IOPAD_X1Y32,PSS2_X32Y313,PS_DDR_DQ0_502
K1,33,IOB_X1Y231,RIOB18_X107Y231,IO_L9N_T1_DQS_33
K2,33,IOB_X1Y232,RIOB18_X107Y231,IO_L9P_T1_DQS_33
K3,33,IOB_X1Y227,RIOB18_X107Y227,IO_L11N_T1_SRCC_33
K5,33,IOB_X1Y210,RIOB18_X107Y209,IO_L20P_T3_33
K6,33,IOB_X1Y206,RIOB18_X107Y205,IO_L22P_T3_33
K7,33,IOB_X1Y201,RIOB18_X107Y201,IO_L24N_T3_33
K8,33,IOB_X1Y202,RIOB18_X107Y201,IO_L24P_T3_33
K10,34,IOB_X1Y250,RIOB18_SING_X107Y250,IO_25_VRP_34
K11,34,IOB_X1Y299,RIOB18_SING_X107Y299,IO_0_VRN_34
K12,35,IOB_X1Y300,RIOB18_SING_X107Y300,IO_25_VRP_35
K13,35,IOB_X1Y334,RIOB18_X107Y333,IO_L8P_T1_AD10P_35
K15,35,IOB_X1Y332,RIOB18_X107Y331,IO_L9P_T1_DQS_AD3P_35
K16,501,IOPAD_X1Y113,PSS2_X32Y313,PS_MIO36_501
K17,501,IOPAD_X1Y109,PSS2_X32Y313,PS_MIO32_501
K19,501,IOPAD_X1Y107,PSS2_X32Y313,PS_MIO30_501
K20,502,IOPAD_X1Y5,PSS2_X32Y313,PS_DDR_A1_502
K22,502,IOPAD_X1Y4,PSS2_X32Y313,PS_DDR_A0_502
K23,502,IOPAD_X1Y43,PSS2_X32Y313,PS_DDR_DQ11_502
K25,502,IOPAD_X1Y29,PSS2_X32Y313,PS_DDR_DM1_502
K26,502,IOPAD_X1Y40,PSS2_X32Y313,PS_DDR_DQ8_502
L2,33,IOB_X1Y217,RIOB18_X107Y217,IO_L16N_T2_33
L3,33,IOB_X1Y228,RIOB18_X107Y227,IO_L11P_T1_SRCC_33
L4,33,IOB_X1Y221,RIOB18_X107Y221,IO_L14N_T2_SRCC_33
L5,33,IOB_X1Y222,RIOB18_X107Y221,IO_L14P_T2_SRCC_33
L7,33,IOB_X1Y211,RIOB18_X107Y211,IO_L19N_T3_VREF_33
L8,33,IOB_X1Y207,RIOB18_X107Y207,IO_L21N_T3_DQS_33
L9,33,IOB_X1Y249,RIOB18_SING_X107Y249,IO_0_VRN_33
L20,502,IOPAD_X1Y10,PSS2_X32Y313,PS_DDR_A6_502
L22,502,IOPAD_X1Y7,PSS2_X32Y313,PS_DDR_A3_502
L23,502,IOPAD_X1Y41,PSS2_X32Y313,PS_DDR_DQ9_502
L24,502,IOPAD_X1Y69,PSS2_X32Y313,PS_DDR_DQS_P1_502
L25,502,IOPAD_X1Y65,PSS2_X32Y313,PS_DDR_DQS_N1_502
M1,33,IOB_X1Y213,RIOB18_X107Y213,IO_L18N_T2_33
M2,33,IOB_X1Y218,RIOB18_X107Y217,IO_L16P_T2_33
M4,33,IOB_X1Y215,RIOB18_X107Y215,IO_L17N_T2_33
M5,33,IOB_X1Y223,RIOB18_X107Y223,IO_L13N_T2_MRCC_33
M6,33,IOB_X1Y224,RIOB18_X107Y223,IO_L13P_T2_MRCC_33
M7,33,IOB_X1Y212,RIOB18_X107Y211,IO_L19P_T3_33
M8,33,IOB_X1Y208,RIOB18_X107Y207,IO_L21P_T3_DQS_33
M20,502,IOPAD_X1Y8,PSS2_X32Y313,PS_DDR_A4_502
M22,502,IOPAD_X1Y14,PSS2_X32Y313,PS_DDR_A10_502
M24,502,IOPAD_X1Y46,PSS2_X32Y313,PS_DDR_DQ14_502
M25,502,IOPAD_X1Y44,PSS2_X32Y313,PS_DDR_DQ12_502
M26,502,IOPAD_X1Y42,PSS2_X32Y313,PS_DDR_DQ10_502
N1,33,IOB_X1Y214,RIOB18_X107Y213,IO_L18P_T2_33
N2,33,IOB_X1Y219,RIOB18_X107Y219,IO_L15N_T2_DQS_33
N3,33,IOB_X1Y220,RIOB18_X107Y219,IO_L15P_T2_DQS_33
N4,33,IOB_X1Y216,RIOB18_X107Y215,IO_L17P_T2_33
N6,33,IOB_X1Y203,RIOB18_X107Y203,IO_L23N_T3_33
N7,33,IOB_X1Y204,RIOB18_X107Y203,IO_L23P_T3_33
N8,33,IOB_X1Y200,RIOB18_SING_X107Y200,IO_25_VRP_33
N14,0,IPAD_X0Y120,MONITOR_BOT_PELE1_X197Y339,VP_0
N21,502,IOPAD_X1Y6,PSS2_X32Y313,PS_DDR_A2_502
N22,502,IOPAD_X1Y9,PSS2_X32Y313,PS_DDR_A5_502
N23,502,IOPAD_X1Y47,PSS2_X32Y313,PS_DDR_DQ15_502
N24,502,IOPAD_X1Y45,PSS2_X32Y313,PS_DDR_DQ13_502
N26,502,IOPAD_X1Y50,PSS2_X32Y313,PS_DDR_DQ18_502
P13,0,IPAD_X0Y121,MONITOR_BOT_PELE1_X197Y339,VN_0
P20,502,IOPAD_X1Y16,PSS2_X32Y313,PS_DDR_A12_502
P21,502,IOPAD_X1Y24,PSS2_X32Y313,PS_DDR_CKN_502
P23,502,IOPAD_X1Y51,PSS2_X32Y313,PS_DDR_DQ19_502
P24,502,IOPAD_X1Y49,PSS2_X32Y313,PS_DDR_DQ17_502
P25,502,IOPAD_X1Y70,PSS2_X32Y313,PS_DDR_DQS_P2_502
P26,502,IOPAD_X1Y30,PSS2_X32Y313,PS_DDR_DM2_502
R1,112,OPAD_X0Y30,GTX_CHANNEL_3_X249Y202,MGTXTXN3_112
R2,112,OPAD_X0Y31,GTX_CHANNEL_3_X249Y202,MGTXTXP3_112
R5,112,IPAD_X1Y99,GTX_COMMON_X249Y179,MGTREFCLK0N_112
R6,112,IPAD_X1Y98,GTX_COMMON_X249Y179,MGTREFCLK0P_112
R20,502,IOPAD_X1Y17,PSS2_X32Y313,PS_DDR_A14_502
R21,502,IOPAD_X1Y25,PSS2_X32Y313,PS_DDR_CKP_502
R22,502,IOPAD_X1Y21,PSS2_X32Y313,PS_DDR_BA2_502
R23,502,IOPAD_X1Y55,PSS2_X32Y313,PS_DDR_DQ23_502
R25,502,IOPAD_X1Y66,PSS2_X32Y313,PS_DDR_DQS_N2_502
R26,502,IOPAD_X1Y48,PSS2_X32Y313,PS_DDR_DQ16_502
T3,112,IPAD_X1Y114,GTX_CHANNEL_3_X249Y202,MGTXRXN3_112
T4,112,IPAD_X1Y115,GTX_CHANNEL_3_X249Y202,MGTXRXP3_112
T20,502,IOPAD_X1Y12,PSS2_X32Y313,PS_DDR_A8_502
T22,502,IOPAD_X1Y20,PSS2_X32Y313,PS_DDR_BA1_502
T23,502,IOPAD_X1Y54,PSS2_X32Y313,PS_DDR_DQ22_502
T24,502,IOPAD_X1Y52,PSS2_X32Y313,PS_DDR_DQ20_502
T25,502,IOPAD_X1Y53,PSS2_X32Y313,PS_DDR_DQ21_502
U1,112,OPAD_X0Y28,GTX_CHANNEL_2_X249Y191,MGTXTXN2_112
U2,112,OPAD_X0Y29,GTX_CHANNEL_2_X249Y191,MGTXTXP2_112
U5,112,IPAD_X1Y101,GTX_COMMON_X249Y179,MGTREFCLK1N_112
U6,112,IPAD_X1Y100,GTX_COMMON_X249Y179,MGTREFCLK1P_112
U20,502,IOPAD_X1Y13,PSS2_X32Y313,PS_DDR_A9_502
U21,502,IOPAD_X1Y23,PSS2_X32Y313,PS_DDR_CKE_502
U22,502,IOPAD_X1Y19,PSS2_X32Y313,PS_DDR_BA0_502
U24,502,IOPAD_X1Y58,PSS2_X32Y313,PS_DDR_DQ26_502
U25,502,IOPAD_X1Y59,PSS2_X32Y313,PS_DDR_DQ27_502
U26,502,IOPAD_X1Y57,PSS2_X32Y313,PS_DDR_DQ25_502
V3,112,IPAD_X1Y108,GTX_CHANNEL_2_X249Y191,MGTXRXN2_112
V4,112,IPAD_X1Y109,GTX_CHANNEL_2_X249Y191,MGTXRXP2_112
V18,13,IOB_X0Y200,LIOB33_SING_X0Y200,IO_25_13
V19,13,IOB_X0Y249,LIOB33_SING_X0Y249,IO_0_13
V21,502,IOPAD_X1Y2,PSS2_X32Y313,PS_DDR_VRN_502
V22,502,IOPAD_X1Y1,PSS2_X32Y313,PS_DDR_WE_B_502
V23,502,IOPAD_X1Y133,PSS2_X32Y313,PS_DDR_RAS_B_502
V24,502,IOPAD_X1Y56,PSS2_X32Y313,PS_DDR_DQ24_502
V26,502,IOPAD_X1Y31,PSS2_X32Y313,PS_DDR_DM3_502
W1,112,OPAD_X0Y26,GTX_CHANNEL_1_X249Y173,MGTXTXN1_112
W2,112,OPAD_X0Y27,GTX_CHANNEL_1_X249Y173,MGTXTXP1_112
W5,111,IPAD_X1Y69,GTX_COMMON_X249Y127,MGTREFCLK0N_111
W6,111,IPAD_X1Y68,GTX_COMMON_X249Y127,MGTREFCLK0P_111
W13,12,IOB_X0Y190,LIOB33_X0Y189,IO_L5P_T0_12
W14,12,IOB_X0Y199,LIOB33_SING_X0Y199,IO_0_12
W15,12,IOB_X0Y151,LIOB33_X0Y151,IO_L24N_T3_12
W16,12,IOB_X0Y152,LIOB33_X0Y151,IO_L24P_T3_12
W17,12,IOB_X0Y150,LIOB33_SING_X0Y150,IO_25_12
W18,13,IOB_X0Y204,LIOB33_X0Y203,IO_L23P_T3_13
W19,13,IOB_X0Y203,LIOB33_X0Y203,IO_L23N_T3_13
W20,13,IOB_X0Y212,LIOB33_X0Y211,IO_L19P_T3_13
W21,502,IOPAD_X1Y3,PSS2_X32Y313,PS_DDR_VRP_502
W23,502,IOPAD_X1Y63,PSS2_X32Y313,PS_DDR_DQ31_502
W24,502,IOPAD_X1Y71,PSS2_X32Y313,PS_DDR_DQS_P3_502
W25,502,IOPAD_X1Y67,PSS2_X32Y313,PS_DDR_DQS_N3_502
W26,502,IOPAD_X1Y60,PSS2_X32Y313,PS_DDR_DQ28_502
Y3,112,IPAD_X1Y96,GTX_CHANNEL_1_X249Y173,MGTXRXN1_112
Y4,112,IPAD_X1Y97,GTX_CHANNEL_1_X249Y173,MGTXRXP1_112
Y10,12,IOB_X0Y194,LIOB33_X0Y193,IO_L3P_T0_DQS_12
Y11,12,IOB_X0Y197,LIOB33_X0Y197,IO_L1N_T0_12
Y12,12,IOB_X0Y198,LIOB33_X0Y197,IO_L1P_T0_12
Y13,12,IOB_X0Y189,LIOB33_X0Y189,IO_L5N_T0_12
Y15,12,IOB_X0Y153,LIOB33_X0Y153,IO_L23N_T3_12
Y16,12,IOB_X0Y154,LIOB33_X0Y153,IO_L23P_T3_12
Y17,12,IOB_X0Y162,LIOB33_X0Y161,IO_L19P_T3_12
Y18,13,IOB_X0Y202,LIOB33_X0Y201,IO_L24P_T3_13
Y20,13,IOB_X0Y211,LIOB33_X0Y211,IO_L19N_T3_VREF_13
Y21,502,IOPAD_X1Y27,PSS2_X32Y313,PS_DDR_CS_B_502
Y22,502,IOPAD_X1Y131,PSS2_X32Y313,PS_DDR_ODT_502
Y23,502,IOPAD_X1Y22,PSS2_X32Y313,PS_DDR_CAS_B_502
Y25,502,IOPAD_X1Y61,PSS2_X32Y313,PS_DDR_DQ29_502
Y26,502,IOPAD_X1Y62,PSS2_X32Y313,PS_DDR_DQ30_502
1 pin bank site tile pin_function
2 A2 34 IOB_X1Y251 RIOB18_X107Y251 IO_L24N_T3_34
3 A3 34 IOB_X1Y255 RIOB18_X107Y255 IO_L22N_T3_34
4 A4 34 IOB_X1Y256 RIOB18_X107Y255 IO_L22P_T3_34
5 A5 34 IOB_X1Y257 RIOB18_X107Y257 IO_L21N_T3_DQS_34
6 A7 34 IOB_X1Y263 RIOB18_X107Y263 IO_L18N_T2_34
7 A8 34 IOB_X1Y265 RIOB18_X107Y265 IO_L17N_T2_34
8 A9 34 IOB_X1Y266 RIOB18_X107Y265 IO_L17P_T2_34
9 A10 34 IOB_X1Y267 RIOB18_X107Y267 IO_L16N_T2_34
10 A12 35 IOB_X1Y301 RIOB18_X107Y301 IO_L24N_T3_AD15N_35
11 A13 35 IOB_X1Y302 RIOB18_X107Y301 IO_L24P_T3_AD15P_35
12 A14 35 IOB_X1Y307 RIOB18_X107Y307 IO_L21N_T3_DQS_AD14N_35
13 A15 35 IOB_X1Y308 RIOB18_X107Y307 IO_L21P_T3_DQS_AD14P_35
14 A17 35 IOB_X1Y313 RIOB18_X107Y313 IO_L18N_T2_AD13N_35
15 A18 501 IOPAD_X1Y126 PSS2_X32Y313 PS_MIO49_501
16 A19 501 IOPAD_X1Y130 PSS2_X32Y313 PS_MIO53_501
17 A20 501 IOPAD_X1Y129 PSS2_X32Y313 PS_MIO52_501
18 A22 501 IOPAD_X1Y134 PSS2_X32Y313 PS_SRST_B_501
19 A23 500 IOPAD_X1Y89 PSS2_X32Y313 PS_MIO12_500
20 A24 500 IOPAD_X1Y85 PSS2_X32Y313 PS_MIO8_500
21 A25 500 IOPAD_X1Y87 PSS2_X32Y313 PS_MIO10_500
22 AA1 112 OPAD_X0Y24 GTX_CHANNEL_0_X249Y162 MGTXTXN0_112
23 AA2 112 OPAD_X0Y25 GTX_CHANNEL_0_X249Y162 MGTXTXP0_112
24 AA5 111 IPAD_X1Y71 GTX_COMMON_X249Y127 MGTREFCLK1N_111
25 AA6 111 IPAD_X1Y70 GTX_COMMON_X249Y127 MGTREFCLK1P_111
26 AA10 12 IOB_X0Y193 LIOB33_X0Y193 IO_L3N_T0_DQS_12
27 AA12 12 IOB_X0Y187 LIOB33_X0Y187 IO_L6N_T0_VREF_12
28 AA13 12 IOB_X0Y188 LIOB33_X0Y187 IO_L6P_T0_12
29 AA14 12 IOB_X0Y155 LIOB33_X0Y155 IO_L22N_T3_12
30 AA15 12 IOB_X0Y156 LIOB33_X0Y155 IO_L22P_T3_12
31 AA17 12 IOB_X0Y161 LIOB33_X0Y161 IO_L19N_T3_VREF_12
32 AA18 13 IOB_X0Y201 LIOB33_X0Y201 IO_L24N_T3_13
33 AA19 13 IOB_X0Y206 LIOB33_X0Y205 IO_L22P_T3_13
34 AA20 13 IOB_X0Y210 LIOB33_X0Y209 IO_L20P_T3_13
35 AA22 13 IOB_X0Y230 LIOB33_X0Y229 IO_L10P_T1_13
36 AA23 13 IOB_X0Y229 LIOB33_X0Y229 IO_L10N_T1_13
37 AA24 13 IOB_X0Y238 LIOB33_X0Y237 IO_L6P_T0_13
38 AA25 13 IOB_X0Y248 LIOB33_X0Y247 IO_L1P_T0_13
39 AB3 112 IPAD_X1Y90 GTX_CHANNEL_0_X249Y162 MGTXRXN0_112
40 AB4 112 IPAD_X1Y91 GTX_CHANNEL_0_X249Y162 MGTXRXP0_112
41 AB10 12 IOB_X0Y191 LIOB33_X0Y191 IO_L4N_T0_12
42 AB11 12 IOB_X0Y192 LIOB33_X0Y191 IO_L4P_T0_12
43 AB12 12 IOB_X0Y196 LIOB33_X0Y195 IO_L2P_T0_12
44 AB14 12 IOB_X0Y171 LIOB33_X0Y171 IO_L14N_T2_SRCC_12
45 AB15 12 IOB_X0Y172 LIOB33_X0Y171 IO_L14P_T2_SRCC_12
46 AB16 12 IOB_X0Y159 LIOB33_X0Y159 IO_L20N_T3_12
47 AB17 12 IOB_X0Y160 LIOB33_X0Y159 IO_L20P_T3_12
48 AB19 13 IOB_X0Y205 LIOB33_X0Y205 IO_L22N_T3_13
49 AB20 13 IOB_X0Y209 LIOB33_X0Y209 IO_L20N_T3_13
50 AB21 13 IOB_X0Y232 LIOB33_X0Y231 IO_L9P_T1_DQS_13
51 AB22 13 IOB_X0Y231 LIOB33_X0Y231 IO_L9N_T1_DQS_13
52 AB24 13 IOB_X0Y237 LIOB33_X0Y237 IO_L6N_T0_VREF_13
53 AB25 13 IOB_X0Y247 LIOB33_X0Y247 IO_L1N_T0_13
54 AB26 13 IOB_X0Y246 LIOB33_X0Y245 IO_L2P_T0_13
55 AC1 111 OPAD_X0Y22 GTX_CHANNEL_3_X249Y150 MGTXTXN3_111
56 AC2 111 OPAD_X0Y23 GTX_CHANNEL_3_X249Y150 MGTXTXP3_111
57 AC5 111 IPAD_X1Y78 GTX_CHANNEL_2_X249Y139 MGTXRXN2_111
58 AC6 111 IPAD_X1Y79 GTX_CHANNEL_2_X249Y139 MGTXRXP2_111
59 AC11 12 IOB_X0Y195 LIOB33_X0Y195 IO_L2N_T0_12
60 AC12 12 IOB_X0Y178 LIOB33_X0Y177 IO_L11P_T1_SRCC_12
61 AC13 12 IOB_X0Y176 LIOB33_X0Y175 IO_L12P_T1_MRCC_12
62 AC14 12 IOB_X0Y174 LIOB33_X0Y173 IO_L13P_T2_MRCC_12
63 AC16 12 IOB_X0Y157 LIOB33_X0Y157 IO_L21N_T3_DQS_12
64 AC17 12 IOB_X0Y158 LIOB33_X0Y157 IO_L21P_T3_DQS_12
65 AC18 13 IOB_X0Y208 LIOB33_X0Y207 IO_L21P_T3_DQS_13
66 AC19 13 IOB_X0Y207 LIOB33_X0Y207 IO_L21N_T3_DQS_13
67 AC21 13 IOB_X0Y222 LIOB33_X0Y221 IO_L14P_T2_SRCC_13
68 AC22 13 IOB_X0Y221 LIOB33_X0Y221 IO_L14N_T2_SRCC_13
69 AC23 13 IOB_X0Y226 LIOB33_X0Y225 IO_L12P_T1_MRCC_13
70 AC24 13 IOB_X0Y225 LIOB33_X0Y225 IO_L12N_T1_MRCC_13
71 AC26 13 IOB_X0Y245 LIOB33_X0Y245 IO_L2N_T0_13
72 AD3 111 IPAD_X1Y84 GTX_CHANNEL_3_X249Y150 MGTXRXN3_111
73 AD4 111 IPAD_X1Y85 GTX_CHANNEL_3_X249Y150 MGTXRXP3_111
74 AD7 111 IPAD_X1Y60 GTX_CHANNEL_0_X249Y110 MGTXRXN0_111
75 AD8 111 IPAD_X1Y61 GTX_CHANNEL_0_X249Y110 MGTXRXP0_111
76 AD10 12 IOB_X0Y185 LIOB33_X0Y185 IO_L7N_T1_12
77 AD11 12 IOB_X0Y177 LIOB33_X0Y177 IO_L11N_T1_SRCC_12
78 AD13 12 IOB_X0Y175 LIOB33_X0Y175 IO_L12N_T1_MRCC_12
79 AD14 12 IOB_X0Y173 LIOB33_X0Y173 IO_L13N_T2_MRCC_12
80 AD15 12 IOB_X0Y169 LIOB33_X0Y169 IO_L15N_T2_DQS_12
81 AD16 12 IOB_X0Y170 LIOB33_X0Y169 IO_L15P_T2_DQS_12
82 AD18 13 IOB_X0Y216 LIOB33_X0Y215 IO_L17P_T2_13
83 AD19 13 IOB_X0Y215 LIOB33_X0Y215 IO_L17N_T2_13
84 AD20 13 IOB_X0Y224 LIOB33_X0Y223 IO_L13P_T2_MRCC_13
85 AD21 13 IOB_X0Y223 LIOB33_X0Y223 IO_L13N_T2_MRCC_13
86 AD23 13 IOB_X0Y228 LIOB33_X0Y227 IO_L11P_T1_SRCC_13
87 AD24 13 IOB_X0Y227 LIOB33_X0Y227 IO_L11N_T1_SRCC_13
88 AD25 13 IOB_X0Y242 LIOB33_X0Y241 IO_L4P_T0_13
89 AD26 13 IOB_X0Y241 LIOB33_X0Y241 IO_L4N_T0_13
90 AE1 111 OPAD_X0Y20 GTX_CHANNEL_2_X249Y139 MGTXTXN2_111
91 AE2 111 OPAD_X0Y21 GTX_CHANNEL_2_X249Y139 MGTXTXP2_111
92 AE5 111 IPAD_X1Y66 GTX_CHANNEL_1_X249Y121 MGTXRXN1_111
93 AE6 111 IPAD_X1Y67 GTX_CHANNEL_1_X249Y121 MGTXRXP1_111
94 AE10 12 IOB_X0Y186 LIOB33_X0Y185 IO_L7P_T1_12
95 AE11 12 IOB_X0Y182 LIOB33_X0Y181 IO_L9P_T1_DQS_12
96 AE12 12 IOB_X0Y184 LIOB33_X0Y183 IO_L8P_T1_12
97 AE13 12 IOB_X0Y180 LIOB33_X0Y179 IO_L10P_T1_12
98 AE15 12 IOB_X0Y165 LIOB33_X0Y165 IO_L17N_T2_12
99 AE16 12 IOB_X0Y166 LIOB33_X0Y165 IO_L17P_T2_12
100 AE17 12 IOB_X0Y164 LIOB33_X0Y163 IO_L18P_T2_12
101 AE18 13 IOB_X0Y214 LIOB33_X0Y213 IO_L18P_T2_13
102 AE20 13 IOB_X0Y218 LIOB33_X0Y217 IO_L16P_T2_13
103 AE21 13 IOB_X0Y217 LIOB33_X0Y217 IO_L16N_T2_13
104 AE22 13 IOB_X0Y236 LIOB33_X0Y235 IO_L7P_T1_13
105 AE23 13 IOB_X0Y234 LIOB33_X0Y233 IO_L8P_T1_13
106 AE25 13 IOB_X0Y244 LIOB33_X0Y243 IO_L3P_T0_DQS_13
107 AE26 13 IOB_X0Y243 LIOB33_X0Y243 IO_L3N_T0_DQS_13
108 AF3 111 OPAD_X0Y18 GTX_CHANNEL_1_X249Y121 MGTXTXN1_111
109 AF4 111 OPAD_X0Y19 GTX_CHANNEL_1_X249Y121 MGTXTXP1_111
110 AF7 111 OPAD_X0Y16 GTX_CHANNEL_0_X249Y110 MGTXTXN0_111
111 AF8 111 OPAD_X0Y17 GTX_CHANNEL_0_X249Y110 MGTXTXP0_111
112 AF10 12 IOB_X0Y181 LIOB33_X0Y181 IO_L9N_T1_DQS_12
113 AF12 12 IOB_X0Y183 LIOB33_X0Y183 IO_L8N_T1_12
114 AF13 12 IOB_X0Y179 LIOB33_X0Y179 IO_L10N_T1_12
115 AF14 12 IOB_X0Y167 LIOB33_X0Y167 IO_L16N_T2_12
116 AF15 12 IOB_X0Y168 LIOB33_X0Y167 IO_L16P_T2_12
117 AF17 12 IOB_X0Y163 LIOB33_X0Y163 IO_L18N_T2_12
118 AF18 13 IOB_X0Y213 LIOB33_X0Y213 IO_L18N_T2_13
119 AF19 13 IOB_X0Y220 LIOB33_X0Y219 IO_L15P_T2_DQS_13
120 AF20 13 IOB_X0Y219 LIOB33_X0Y219 IO_L15N_T2_DQS_13
121 AF22 13 IOB_X0Y235 LIOB33_X0Y235 IO_L7N_T1_13
122 AF23 13 IOB_X0Y233 LIOB33_X0Y233 IO_L8N_T1_13
123 AF24 13 IOB_X0Y240 LIOB33_X0Y239 IO_L5P_T0_13
124 AF25 13 IOB_X0Y239 LIOB33_X0Y239 IO_L5N_T0_13
125 B1 34 IOB_X1Y253 RIOB18_X107Y253 IO_L23N_T3_34
126 B2 34 IOB_X1Y252 RIOB18_X107Y251 IO_L24P_T3_34
127 B4 34 IOB_X1Y259 RIOB18_X107Y259 IO_L20N_T3_34
128 B5 34 IOB_X1Y260 RIOB18_X107Y259 IO_L20P_T3_34
129 B6 34 IOB_X1Y258 RIOB18_X107Y257 IO_L21P_T3_DQS_34
130 B7 34 IOB_X1Y264 RIOB18_X107Y263 IO_L18P_T2_34
131 B9 34 IOB_X1Y269 RIOB18_X107Y269 IO_L15N_T2_DQS_34
132 B10 34 IOB_X1Y268 RIOB18_X107Y267 IO_L16P_T2_34
133 B11 35 IOB_X1Y303 RIOB18_X107Y303 IO_L23N_T3_35
134 B12 35 IOB_X1Y305 RIOB18_X107Y305 IO_L22N_T3_AD7N_35
135 B14 35 IOB_X1Y309 RIOB18_X107Y309 IO_L20N_T3_AD6N_35
136 B15 35 IOB_X1Y315 RIOB18_X107Y315 IO_L17N_T2_AD5N_35
137 B16 35 IOB_X1Y316 RIOB18_X107Y315 IO_L17P_T2_AD5P_35
138 B17 35 IOB_X1Y314 RIOB18_X107Y313 IO_L18P_T2_AD13P_35
139 B19 501 IOPAD_X1Y124 PSS2_X32Y313 PS_MIO47_501
140 B20 501 IOPAD_X1Y128 PSS2_X32Y313 PS_MIO51_501
141 B21 501 IOPAD_X1Y125 PSS2_X32Y313 PS_MIO48_501
142 B22 501 IOPAD_X1Y127 PSS2_X32Y313 PS_MIO50_501
143 B24 500 IOPAD_X1Y26 PSS2_X32Y313 PS_CLK_500
144 B25 500 IOPAD_X1Y90 PSS2_X32Y313 PS_MIO13_500
145 B26 500 IOPAD_X1Y88 PSS2_X32Y313 PS_MIO11_500
146 C1 33 IOB_X1Y241 RIOB18_X107Y241 IO_L4N_T0_33
147 C2 34 IOB_X1Y254 RIOB18_X107Y253 IO_L23P_T3_34
148 C3 34 IOB_X1Y261 RIOB18_X107Y261 IO_L19N_T3_VREF_34
149 C4 34 IOB_X1Y262 RIOB18_X107Y261 IO_L19P_T3_34
150 C6 34 IOB_X1Y271 RIOB18_X107Y271 IO_L14N_T2_SRCC_34
151 C7 34 IOB_X1Y273 RIOB18_X107Y273 IO_L13N_T2_MRCC_34
152 C8 34 IOB_X1Y274 RIOB18_X107Y273 IO_L13P_T2_MRCC_34
153 C9 34 IOB_X1Y270 RIOB18_X107Y269 IO_L15P_T2_DQS_34
154 C11 35 IOB_X1Y304 RIOB18_X107Y303 IO_L23P_T3_35
155 C12 35 IOB_X1Y306 RIOB18_X107Y305 IO_L22P_T3_AD7P_35
156 C13 35 IOB_X1Y311 RIOB18_X107Y311 IO_L19N_T3_VREF_35
157 C14 35 IOB_X1Y310 RIOB18_X107Y309 IO_L20P_T3_AD6P_35
158 C16 35 IOB_X1Y319 RIOB18_X107Y319 IO_L15N_T2_DQS_AD12N_35
159 C17 35 IOB_X1Y320 RIOB18_X107Y319 IO_L15P_T2_DQS_AD12P_35
160 C18 501 IOPAD_X1Y122 PSS2_X32Y313 PS_MIO45_501
161 C19 501 IOPAD_X1Y118 PSS2_X32Y313 PS_MIO41_501
162 C21 501 IOPAD_X1Y116 PSS2_X32Y313 PS_MIO39_501
163 C22 501 IOPAD_X1Y117 PSS2_X32Y313 PS_MIO40_501
164 C23 500 IOPAD_X1Y132 PSS2_X32Y313 PS_POR_B_500
165 C24 500 IOPAD_X1Y92 PSS2_X32Y313 PS_MIO15_500
166 C26 500 IOPAD_X1Y82 PSS2_X32Y313 PS_MIO5_500
167 D1 33 IOB_X1Y242 RIOB18_X107Y241 IO_L4P_T0_33
168 D3 33 IOB_X1Y245 RIOB18_X107Y245 IO_L2N_T0_33
169 D4 33 IOB_X1Y246 RIOB18_X107Y245 IO_L2P_T0_33
170 D5 34 IOB_X1Y279 RIOB18_X107Y279 IO_L10N_T1_34
171 D6 34 IOB_X1Y272 RIOB18_X107Y271 IO_L14P_T2_SRCC_34
172 D8 34 IOB_X1Y283 RIOB18_X107Y283 IO_L8N_T1_34
173 D9 34 IOB_X1Y284 RIOB18_X107Y283 IO_L8P_T1_34
174 D10 35 IOB_X1Y345 RIOB18_X107Y345 IO_L2N_T0_AD8N_35
175 D11 35 IOB_X1Y341 RIOB18_X107Y341 IO_L4N_T0_35
176 D13 35 IOB_X1Y312 RIOB18_X107Y311 IO_L19P_T3_35
177 D14 35 IOB_X1Y323 RIOB18_X107Y323 IO_L13N_T2_MRCC_35
178 D15 35 IOB_X1Y324 RIOB18_X107Y323 IO_L13P_T2_MRCC_35
179 D16 35 IOB_X1Y317 RIOB18_X107Y317 IO_L16N_T2_35
180 D18 501 IOPAD_X1Y120 PSS2_X32Y313 PS_MIO43_501
181 D19 501 IOPAD_X1Y112 PSS2_X32Y313 PS_MIO35_501
182 D20 501 IOPAD_X1Y114 PSS2_X32Y313 PS_MIO37_501
183 D21 501 IOPAD_X1Y115 PSS2_X32Y313 PS_MIO38_501
184 D23 500 IOPAD_X1Y91 PSS2_X32Y313 PS_MIO14_500
185 D24 500 IOPAD_X1Y86 PSS2_X32Y313 PS_MIO9_500
186 D25 500 IOPAD_X1Y80 PSS2_X32Y313 PS_MIO3_500
187 D26 500 IOPAD_X1Y78 PSS2_X32Y313 PS_MIO1_500
188 E1 33 IOB_X1Y239 RIOB18_X107Y239 IO_L5N_T0_33
189 E2 33 IOB_X1Y240 RIOB18_X107Y239 IO_L5P_T0_33
190 E3 33 IOB_X1Y237 RIOB18_X107Y237 IO_L6N_T0_VREF_33
191 E5 34 IOB_X1Y285 RIOB18_X107Y285 IO_L7N_T1_34
192 E6 34 IOB_X1Y280 RIOB18_X107Y279 IO_L10P_T1_34
193 E7 34 IOB_X1Y277 RIOB18_X107Y277 IO_L11N_T1_SRCC_34
194 E8 34 IOB_X1Y281 RIOB18_X107Y281 IO_L9N_T1_DQS_34
195 E10 35 IOB_X1Y346 RIOB18_X107Y345 IO_L2P_T0_AD8P_35
196 E11 35 IOB_X1Y342 RIOB18_X107Y341 IO_L4P_T0_35
197 E12 35 IOB_X1Y347 RIOB18_X107Y347 IO_L1N_T0_AD0N_35
198 E13 35 IOB_X1Y337 RIOB18_X107Y337 IO_L6N_T0_VREF_35
199 E15 35 IOB_X1Y321 RIOB18_X107Y321 IO_L14N_T2_AD4N_SRCC_35
200 E16 35 IOB_X1Y318 RIOB18_X107Y317 IO_L16P_T2_35
201 E17 501 IOPAD_X1Y123 PSS2_X32Y313 PS_MIO46_501
202 E18 501 IOPAD_X1Y121 PSS2_X32Y313 PS_MIO44_501
203 E20 501 IOPAD_X1Y106 PSS2_X32Y313 PS_MIO29_501
204 E21 501 IOPAD_X1Y108 PSS2_X32Y313 PS_MIO31_501
205 E22 501 IOPAD_X1Y110 PSS2_X32Y313 PS_MIO33_501
206 E23 500 IOPAD_X1Y84 PSS2_X32Y313 PS_MIO7_500
207 E25 500 IOPAD_X1Y79 PSS2_X32Y313 PS_MIO2_500
208 E26 500 IOPAD_X1Y77 PSS2_X32Y313 PS_MIO0_500
209 F2 33 IOB_X1Y243 RIOB18_X107Y243 IO_L3N_T0_DQS_33
210 F3 33 IOB_X1Y238 RIOB18_X107Y237 IO_L6P_T0_33
211 F4 33 IOB_X1Y247 RIOB18_X107Y247 IO_L1N_T0_33
212 F5 34 IOB_X1Y286 RIOB18_X107Y285 IO_L7P_T1_34
213 F7 34 IOB_X1Y275 RIOB18_X107Y275 IO_L12N_T1_MRCC_34
214 F8 34 IOB_X1Y278 RIOB18_X107Y277 IO_L11P_T1_SRCC_34
215 F9 34 IOB_X1Y282 RIOB18_X107Y281 IO_L9P_T1_DQS_34
216 F10 35 IOB_X1Y343 RIOB18_X107Y343 IO_L3N_T0_DQS_AD1N_35
217 F12 35 IOB_X1Y348 RIOB18_X107Y347 IO_L1P_T0_AD0P_35
218 F13 35 IOB_X1Y338 RIOB18_X107Y337 IO_L6P_T0_35
219 F14 35 IOB_X1Y327 RIOB18_X107Y327 IO_L11N_T1_SRCC_35
220 F15 35 IOB_X1Y322 RIOB18_X107Y321 IO_L14P_T2_AD4P_SRCC_35
221 F17 501 IOPAD_X1Y119 PSS2_X32Y313 PS_MIO42_501
222 F18 501 IOPAD_X1Y104 PSS2_X32Y313 PS_MIO27_501
223 F19 501 IOPAD_X1Y102 PSS2_X32Y313 PS_MIO25_501
224 F20 501 IOPAD_X1Y100 PSS2_X32Y313 PS_MIO23_501
225 F22 501 IOPAD_X1Y98 PSS2_X32Y313 PS_MIO21_501
226 F23 500 IOPAD_X1Y83 PSS2_X32Y313 PS_MIO6_500
227 F24 500 IOPAD_X1Y81 PSS2_X32Y313 PS_MIO4_500
228 F25 502 IOPAD_X1Y33 PSS2_X32Y313 PS_DDR_DQ1_502
229 G1 33 IOB_X1Y229 RIOB18_X107Y229 IO_L10N_T1_33
230 G2 33 IOB_X1Y244 RIOB18_X107Y243 IO_L3P_T0_DQS_33
231 G4 33 IOB_X1Y248 RIOB18_X107Y247 IO_L1P_T0_33
232 G5 34 IOB_X1Y295 RIOB18_X107Y295 IO_L2N_T0_34
233 G6 34 IOB_X1Y296 RIOB18_X107Y295 IO_L2P_T0_34
234 G7 34 IOB_X1Y276 RIOB18_X107Y275 IO_L12P_T1_MRCC_34
235 G9 34 IOB_X1Y293 RIOB18_X107Y293 IO_L3N_T0_DQS_34
236 G10 35 IOB_X1Y344 RIOB18_X107Y343 IO_L3P_T0_DQS_AD1P_35
237 G11 35 IOB_X1Y339 RIOB18_X107Y339 IO_L5N_T0_AD9N_35
238 G12 35 IOB_X1Y340 RIOB18_X107Y339 IO_L5P_T0_AD9P_35
239 G14 35 IOB_X1Y328 RIOB18_X107Y327 IO_L11P_T1_SRCC_35
240 G15 35 IOB_X1Y329 RIOB18_X107Y329 IO_L10N_T1_AD11N_35
241 G16 35 IOB_X1Y330 RIOB18_X107Y329 IO_L10P_T1_AD11P_35
242 G17 501 IOPAD_X1Y94 PSS2_X32Y313 PS_MIO17_501
243 G19 501 IOPAD_X1Y96 PSS2_X32Y313 PS_MIO19_501
244 G20 501 IOPAD_X1Y95 PSS2_X32Y313 PS_MIO18_501
245 G21 501 IOPAD_X1Y93 PSS2_X32Y313 PS_MIO16_501
246 G22 501 IOPAD_X1Y99 PSS2_X32Y313 PS_MIO22_501
247 G24 502 IOPAD_X1Y28 PSS2_X32Y313 PS_DDR_DM0_502
248 G25 502 IOPAD_X1Y64 PSS2_X32Y313 PS_DDR_DQS_N0_502
249 G26 502 IOPAD_X1Y35 PSS2_X32Y313 PS_DDR_DQ3_502
250 H1 33 IOB_X1Y235 RIOB18_X107Y235 IO_L7N_T1_33
251 H2 33 IOB_X1Y230 RIOB18_X107Y229 IO_L10P_T1_33
252 H3 33 IOB_X1Y233 RIOB18_X107Y233 IO_L8N_T1_33
253 H4 33 IOB_X1Y234 RIOB18_X107Y233 IO_L8P_T1_33
254 H6 34 IOB_X1Y291 RIOB18_X107Y291 IO_L4N_T0_34
255 H7 34 IOB_X1Y292 RIOB18_X107Y291 IO_L4P_T0_34
256 H8 34 IOB_X1Y287 RIOB18_X107Y287 IO_L6N_T0_VREF_34
257 H9 34 IOB_X1Y294 RIOB18_X107Y293 IO_L3P_T0_DQS_PUDC_B_34
258 H11 34 IOB_X1Y297 RIOB18_X107Y297 IO_L1N_T0_34
259 H12 35 IOB_X1Y335 RIOB18_X107Y335 IO_L7N_T1_AD2N_35
260 H13 35 IOB_X1Y336 RIOB18_X107Y335 IO_L7P_T1_AD2P_35
261 H14 35 IOB_X1Y325 RIOB18_X107Y325 IO_L12N_T1_MRCC_35
262 H16 35 IOB_X1Y349 RIOB18_SING_X107Y349 IO_0_VRN_35
263 H17 501 IOPAD_X1Y103 PSS2_X32Y313 PS_MIO26_501
264 H19 501 IOPAD_X1Y97 PSS2_X32Y313 PS_MIO20_501
265 H21 502 IOPAD_X1Y15 PSS2_X32Y313 PS_DDR_A11_502
266 H22 502 IOPAD_X1Y72 PSS2_X32Y313 PS_DDR_DRST_B_502
267 H23 502 IOPAD_X1Y37 PSS2_X32Y313 PS_DDR_DQ5_502
268 H24 502 IOPAD_X1Y68 PSS2_X32Y313 PS_DDR_DQS_P0_502
269 H26 502 IOPAD_X1Y36 PSS2_X32Y313 PS_DDR_DQ4_502
270 J1 33 IOB_X1Y236 RIOB18_X107Y235 IO_L7P_T1_33
271 J3 33 IOB_X1Y225 RIOB18_X107Y225 IO_L12N_T1_MRCC_33
272 J4 33 IOB_X1Y226 RIOB18_X107Y225 IO_L12P_T1_MRCC_33
273 J5 33 IOB_X1Y209 RIOB18_X107Y209 IO_L20N_T3_33
274 J6 33 IOB_X1Y205 RIOB18_X107Y205 IO_L22N_T3_33
275 J8 34 IOB_X1Y288 RIOB18_X107Y287 IO_L6P_T0_34
276 J9 34 IOB_X1Y289 RIOB18_X107Y289 IO_L5N_T0_34
277 J10 34 IOB_X1Y290 RIOB18_X107Y289 IO_L5P_T0_34
278 J11 34 IOB_X1Y298 RIOB18_X107Y297 IO_L1P_T0_34
279 J13 35 IOB_X1Y333 RIOB18_X107Y333 IO_L8N_T1_AD10N_35
280 J14 35 IOB_X1Y326 RIOB18_X107Y325 IO_L12P_T1_MRCC_35
281 J15 35 IOB_X1Y331 RIOB18_X107Y331 IO_L9N_T1_DQS_AD3N_35
282 J16 501 IOPAD_X1Y111 PSS2_X32Y313 PS_MIO34_501
283 J18 501 IOPAD_X1Y105 PSS2_X32Y313 PS_MIO28_501
284 J19 501 IOPAD_X1Y101 PSS2_X32Y313 PS_MIO24_501
285 J20 502 IOPAD_X1Y18 PSS2_X32Y313 PS_DDR_A13_502
286 J21 502 IOPAD_X1Y11 PSS2_X32Y313 PS_DDR_A7_502
287 J23 502 IOPAD_X1Y39 PSS2_X32Y313 PS_DDR_DQ7_502
288 J24 502 IOPAD_X1Y38 PSS2_X32Y313 PS_DDR_DQ6_502
289 J25 502 IOPAD_X1Y34 PSS2_X32Y313 PS_DDR_DQ2_502
290 J26 502 IOPAD_X1Y32 PSS2_X32Y313 PS_DDR_DQ0_502
291 K1 33 IOB_X1Y231 RIOB18_X107Y231 IO_L9N_T1_DQS_33
292 K2 33 IOB_X1Y232 RIOB18_X107Y231 IO_L9P_T1_DQS_33
293 K3 33 IOB_X1Y227 RIOB18_X107Y227 IO_L11N_T1_SRCC_33
294 K5 33 IOB_X1Y210 RIOB18_X107Y209 IO_L20P_T3_33
295 K6 33 IOB_X1Y206 RIOB18_X107Y205 IO_L22P_T3_33
296 K7 33 IOB_X1Y201 RIOB18_X107Y201 IO_L24N_T3_33
297 K8 33 IOB_X1Y202 RIOB18_X107Y201 IO_L24P_T3_33
298 K10 34 IOB_X1Y250 RIOB18_SING_X107Y250 IO_25_VRP_34
299 K11 34 IOB_X1Y299 RIOB18_SING_X107Y299 IO_0_VRN_34
300 K12 35 IOB_X1Y300 RIOB18_SING_X107Y300 IO_25_VRP_35
301 K13 35 IOB_X1Y334 RIOB18_X107Y333 IO_L8P_T1_AD10P_35
302 K15 35 IOB_X1Y332 RIOB18_X107Y331 IO_L9P_T1_DQS_AD3P_35
303 K16 501 IOPAD_X1Y113 PSS2_X32Y313 PS_MIO36_501
304 K17 501 IOPAD_X1Y109 PSS2_X32Y313 PS_MIO32_501
305 K19 501 IOPAD_X1Y107 PSS2_X32Y313 PS_MIO30_501
306 K20 502 IOPAD_X1Y5 PSS2_X32Y313 PS_DDR_A1_502
307 K22 502 IOPAD_X1Y4 PSS2_X32Y313 PS_DDR_A0_502
308 K23 502 IOPAD_X1Y43 PSS2_X32Y313 PS_DDR_DQ11_502
309 K25 502 IOPAD_X1Y29 PSS2_X32Y313 PS_DDR_DM1_502
310 K26 502 IOPAD_X1Y40 PSS2_X32Y313 PS_DDR_DQ8_502
311 L2 33 IOB_X1Y217 RIOB18_X107Y217 IO_L16N_T2_33
312 L3 33 IOB_X1Y228 RIOB18_X107Y227 IO_L11P_T1_SRCC_33
313 L4 33 IOB_X1Y221 RIOB18_X107Y221 IO_L14N_T2_SRCC_33
314 L5 33 IOB_X1Y222 RIOB18_X107Y221 IO_L14P_T2_SRCC_33
315 L7 33 IOB_X1Y211 RIOB18_X107Y211 IO_L19N_T3_VREF_33
316 L8 33 IOB_X1Y207 RIOB18_X107Y207 IO_L21N_T3_DQS_33
317 L9 33 IOB_X1Y249 RIOB18_SING_X107Y249 IO_0_VRN_33
318 L20 502 IOPAD_X1Y10 PSS2_X32Y313 PS_DDR_A6_502
319 L22 502 IOPAD_X1Y7 PSS2_X32Y313 PS_DDR_A3_502
320 L23 502 IOPAD_X1Y41 PSS2_X32Y313 PS_DDR_DQ9_502
321 L24 502 IOPAD_X1Y69 PSS2_X32Y313 PS_DDR_DQS_P1_502
322 L25 502 IOPAD_X1Y65 PSS2_X32Y313 PS_DDR_DQS_N1_502
323 M1 33 IOB_X1Y213 RIOB18_X107Y213 IO_L18N_T2_33
324 M2 33 IOB_X1Y218 RIOB18_X107Y217 IO_L16P_T2_33
325 M4 33 IOB_X1Y215 RIOB18_X107Y215 IO_L17N_T2_33
326 M5 33 IOB_X1Y223 RIOB18_X107Y223 IO_L13N_T2_MRCC_33
327 M6 33 IOB_X1Y224 RIOB18_X107Y223 IO_L13P_T2_MRCC_33
328 M7 33 IOB_X1Y212 RIOB18_X107Y211 IO_L19P_T3_33
329 M8 33 IOB_X1Y208 RIOB18_X107Y207 IO_L21P_T3_DQS_33
330 M20 502 IOPAD_X1Y8 PSS2_X32Y313 PS_DDR_A4_502
331 M22 502 IOPAD_X1Y14 PSS2_X32Y313 PS_DDR_A10_502
332 M24 502 IOPAD_X1Y46 PSS2_X32Y313 PS_DDR_DQ14_502
333 M25 502 IOPAD_X1Y44 PSS2_X32Y313 PS_DDR_DQ12_502
334 M26 502 IOPAD_X1Y42 PSS2_X32Y313 PS_DDR_DQ10_502
335 N1 33 IOB_X1Y214 RIOB18_X107Y213 IO_L18P_T2_33
336 N2 33 IOB_X1Y219 RIOB18_X107Y219 IO_L15N_T2_DQS_33
337 N3 33 IOB_X1Y220 RIOB18_X107Y219 IO_L15P_T2_DQS_33
338 N4 33 IOB_X1Y216 RIOB18_X107Y215 IO_L17P_T2_33
339 N6 33 IOB_X1Y203 RIOB18_X107Y203 IO_L23N_T3_33
340 N7 33 IOB_X1Y204 RIOB18_X107Y203 IO_L23P_T3_33
341 N8 33 IOB_X1Y200 RIOB18_SING_X107Y200 IO_25_VRP_33
342 N14 0 IPAD_X0Y120 MONITOR_BOT_PELE1_X197Y339 VP_0
343 N21 502 IOPAD_X1Y6 PSS2_X32Y313 PS_DDR_A2_502
344 N22 502 IOPAD_X1Y9 PSS2_X32Y313 PS_DDR_A5_502
345 N23 502 IOPAD_X1Y47 PSS2_X32Y313 PS_DDR_DQ15_502
346 N24 502 IOPAD_X1Y45 PSS2_X32Y313 PS_DDR_DQ13_502
347 N26 502 IOPAD_X1Y50 PSS2_X32Y313 PS_DDR_DQ18_502
348 P13 0 IPAD_X0Y121 MONITOR_BOT_PELE1_X197Y339 VN_0
349 P20 502 IOPAD_X1Y16 PSS2_X32Y313 PS_DDR_A12_502
350 P21 502 IOPAD_X1Y24 PSS2_X32Y313 PS_DDR_CKN_502
351 P23 502 IOPAD_X1Y51 PSS2_X32Y313 PS_DDR_DQ19_502
352 P24 502 IOPAD_X1Y49 PSS2_X32Y313 PS_DDR_DQ17_502
353 P25 502 IOPAD_X1Y70 PSS2_X32Y313 PS_DDR_DQS_P2_502
354 P26 502 IOPAD_X1Y30 PSS2_X32Y313 PS_DDR_DM2_502
355 R1 112 OPAD_X0Y30 GTX_CHANNEL_3_X249Y202 MGTXTXN3_112
356 R2 112 OPAD_X0Y31 GTX_CHANNEL_3_X249Y202 MGTXTXP3_112
357 R5 112 IPAD_X1Y99 GTX_COMMON_X249Y179 MGTREFCLK0N_112
358 R6 112 IPAD_X1Y98 GTX_COMMON_X249Y179 MGTREFCLK0P_112
359 R20 502 IOPAD_X1Y17 PSS2_X32Y313 PS_DDR_A14_502
360 R21 502 IOPAD_X1Y25 PSS2_X32Y313 PS_DDR_CKP_502
361 R22 502 IOPAD_X1Y21 PSS2_X32Y313 PS_DDR_BA2_502
362 R23 502 IOPAD_X1Y55 PSS2_X32Y313 PS_DDR_DQ23_502
363 R25 502 IOPAD_X1Y66 PSS2_X32Y313 PS_DDR_DQS_N2_502
364 R26 502 IOPAD_X1Y48 PSS2_X32Y313 PS_DDR_DQ16_502
365 T3 112 IPAD_X1Y114 GTX_CHANNEL_3_X249Y202 MGTXRXN3_112
366 T4 112 IPAD_X1Y115 GTX_CHANNEL_3_X249Y202 MGTXRXP3_112
367 T20 502 IOPAD_X1Y12 PSS2_X32Y313 PS_DDR_A8_502
368 T22 502 IOPAD_X1Y20 PSS2_X32Y313 PS_DDR_BA1_502
369 T23 502 IOPAD_X1Y54 PSS2_X32Y313 PS_DDR_DQ22_502
370 T24 502 IOPAD_X1Y52 PSS2_X32Y313 PS_DDR_DQ20_502
371 T25 502 IOPAD_X1Y53 PSS2_X32Y313 PS_DDR_DQ21_502
372 U1 112 OPAD_X0Y28 GTX_CHANNEL_2_X249Y191 MGTXTXN2_112
373 U2 112 OPAD_X0Y29 GTX_CHANNEL_2_X249Y191 MGTXTXP2_112
374 U5 112 IPAD_X1Y101 GTX_COMMON_X249Y179 MGTREFCLK1N_112
375 U6 112 IPAD_X1Y100 GTX_COMMON_X249Y179 MGTREFCLK1P_112
376 U20 502 IOPAD_X1Y13 PSS2_X32Y313 PS_DDR_A9_502
377 U21 502 IOPAD_X1Y23 PSS2_X32Y313 PS_DDR_CKE_502
378 U22 502 IOPAD_X1Y19 PSS2_X32Y313 PS_DDR_BA0_502
379 U24 502 IOPAD_X1Y58 PSS2_X32Y313 PS_DDR_DQ26_502
380 U25 502 IOPAD_X1Y59 PSS2_X32Y313 PS_DDR_DQ27_502
381 U26 502 IOPAD_X1Y57 PSS2_X32Y313 PS_DDR_DQ25_502
382 V3 112 IPAD_X1Y108 GTX_CHANNEL_2_X249Y191 MGTXRXN2_112
383 V4 112 IPAD_X1Y109 GTX_CHANNEL_2_X249Y191 MGTXRXP2_112
384 V18 13 IOB_X0Y200 LIOB33_SING_X0Y200 IO_25_13
385 V19 13 IOB_X0Y249 LIOB33_SING_X0Y249 IO_0_13
386 V21 502 IOPAD_X1Y2 PSS2_X32Y313 PS_DDR_VRN_502
387 V22 502 IOPAD_X1Y1 PSS2_X32Y313 PS_DDR_WE_B_502
388 V23 502 IOPAD_X1Y133 PSS2_X32Y313 PS_DDR_RAS_B_502
389 V24 502 IOPAD_X1Y56 PSS2_X32Y313 PS_DDR_DQ24_502
390 V26 502 IOPAD_X1Y31 PSS2_X32Y313 PS_DDR_DM3_502
391 W1 112 OPAD_X0Y26 GTX_CHANNEL_1_X249Y173 MGTXTXN1_112
392 W2 112 OPAD_X0Y27 GTX_CHANNEL_1_X249Y173 MGTXTXP1_112
393 W5 111 IPAD_X1Y69 GTX_COMMON_X249Y127 MGTREFCLK0N_111
394 W6 111 IPAD_X1Y68 GTX_COMMON_X249Y127 MGTREFCLK0P_111
395 W13 12 IOB_X0Y190 LIOB33_X0Y189 IO_L5P_T0_12
396 W14 12 IOB_X0Y199 LIOB33_SING_X0Y199 IO_0_12
397 W15 12 IOB_X0Y151 LIOB33_X0Y151 IO_L24N_T3_12
398 W16 12 IOB_X0Y152 LIOB33_X0Y151 IO_L24P_T3_12
399 W17 12 IOB_X0Y150 LIOB33_SING_X0Y150 IO_25_12
400 W18 13 IOB_X0Y204 LIOB33_X0Y203 IO_L23P_T3_13
401 W19 13 IOB_X0Y203 LIOB33_X0Y203 IO_L23N_T3_13
402 W20 13 IOB_X0Y212 LIOB33_X0Y211 IO_L19P_T3_13
403 W21 502 IOPAD_X1Y3 PSS2_X32Y313 PS_DDR_VRP_502
404 W23 502 IOPAD_X1Y63 PSS2_X32Y313 PS_DDR_DQ31_502
405 W24 502 IOPAD_X1Y71 PSS2_X32Y313 PS_DDR_DQS_P3_502
406 W25 502 IOPAD_X1Y67 PSS2_X32Y313 PS_DDR_DQS_N3_502
407 W26 502 IOPAD_X1Y60 PSS2_X32Y313 PS_DDR_DQ28_502
408 Y3 112 IPAD_X1Y96 GTX_CHANNEL_1_X249Y173 MGTXRXN1_112
409 Y4 112 IPAD_X1Y97 GTX_CHANNEL_1_X249Y173 MGTXRXP1_112
410 Y10 12 IOB_X0Y194 LIOB33_X0Y193 IO_L3P_T0_DQS_12
411 Y11 12 IOB_X0Y197 LIOB33_X0Y197 IO_L1N_T0_12
412 Y12 12 IOB_X0Y198 LIOB33_X0Y197 IO_L1P_T0_12
413 Y13 12 IOB_X0Y189 LIOB33_X0Y189 IO_L5N_T0_12
414 Y15 12 IOB_X0Y153 LIOB33_X0Y153 IO_L23N_T3_12
415 Y16 12 IOB_X0Y154 LIOB33_X0Y153 IO_L23P_T3_12
416 Y17 12 IOB_X0Y162 LIOB33_X0Y161 IO_L19P_T3_12
417 Y18 13 IOB_X0Y202 LIOB33_X0Y201 IO_L24P_T3_13
418 Y20 13 IOB_X0Y211 LIOB33_X0Y211 IO_L19N_T3_VREF_13
419 Y21 502 IOPAD_X1Y27 PSS2_X32Y313 PS_DDR_CS_B_502
420 Y22 502 IOPAD_X1Y131 PSS2_X32Y313 PS_DDR_ODT_502
421 Y23 502 IOPAD_X1Y22 PSS2_X32Y313 PS_DDR_CAS_B_502
422 Y25 502 IOPAD_X1Y61 PSS2_X32Y313 PS_DDR_DQ29_502
423 Y26 502 IOPAD_X1Y62 PSS2_X32Y313 PS_DDR_DQ30_502

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File diff suppressed because it is too large Load Diff

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@ -0,0 +1,423 @@
pin,bank,site,tile,pin_function
A2,34,IOB_X1Y251,RIOB18_X107Y251,IO_L24N_T3_34
A3,34,IOB_X1Y255,RIOB18_X107Y255,IO_L22N_T3_34
A4,34,IOB_X1Y256,RIOB18_X107Y255,IO_L22P_T3_34
A5,34,IOB_X1Y257,RIOB18_X107Y257,IO_L21N_T3_DQS_34
A7,34,IOB_X1Y263,RIOB18_X107Y263,IO_L18N_T2_34
A8,34,IOB_X1Y265,RIOB18_X107Y265,IO_L17N_T2_34
A9,34,IOB_X1Y266,RIOB18_X107Y265,IO_L17P_T2_34
A10,34,IOB_X1Y267,RIOB18_X107Y267,IO_L16N_T2_34
A12,35,IOB_X1Y301,RIOB18_X107Y301,IO_L24N_T3_AD15N_35
A13,35,IOB_X1Y302,RIOB18_X107Y301,IO_L24P_T3_AD15P_35
A14,35,IOB_X1Y307,RIOB18_X107Y307,IO_L21N_T3_DQS_AD14N_35
A15,35,IOB_X1Y308,RIOB18_X107Y307,IO_L21P_T3_DQS_AD14P_35
A17,35,IOB_X1Y313,RIOB18_X107Y313,IO_L18N_T2_AD13N_35
A18,501,IOPAD_X1Y126,PSS2_X32Y313,PS_MIO49_501
A19,501,IOPAD_X1Y130,PSS2_X32Y313,PS_MIO53_501
A20,501,IOPAD_X1Y129,PSS2_X32Y313,PS_MIO52_501
A22,501,IOPAD_X1Y134,PSS2_X32Y313,PS_SRST_B_501
A23,500,IOPAD_X1Y89,PSS2_X32Y313,PS_MIO12_500
A24,500,IOPAD_X1Y85,PSS2_X32Y313,PS_MIO8_500
A25,500,IOPAD_X1Y87,PSS2_X32Y313,PS_MIO10_500
AA1,112,OPAD_X0Y24,GTX_CHANNEL_0_X249Y162,MGTXTXN0_112
AA2,112,OPAD_X0Y25,GTX_CHANNEL_0_X249Y162,MGTXTXP0_112
AA5,111,IPAD_X1Y71,GTX_COMMON_X249Y127,MGTREFCLK1N_111
AA6,111,IPAD_X1Y70,GTX_COMMON_X249Y127,MGTREFCLK1P_111
AA10,12,IOB_X0Y193,LIOB33_X0Y193,IO_L3N_T0_DQS_12
AA12,12,IOB_X0Y187,LIOB33_X0Y187,IO_L6N_T0_VREF_12
AA13,12,IOB_X0Y188,LIOB33_X0Y187,IO_L6P_T0_12
AA14,12,IOB_X0Y155,LIOB33_X0Y155,IO_L22N_T3_12
AA15,12,IOB_X0Y156,LIOB33_X0Y155,IO_L22P_T3_12
AA17,12,IOB_X0Y161,LIOB33_X0Y161,IO_L19N_T3_VREF_12
AA18,13,IOB_X0Y201,LIOB33_X0Y201,IO_L24N_T3_13
AA19,13,IOB_X0Y206,LIOB33_X0Y205,IO_L22P_T3_13
AA20,13,IOB_X0Y210,LIOB33_X0Y209,IO_L20P_T3_13
AA22,13,IOB_X0Y230,LIOB33_X0Y229,IO_L10P_T1_13
AA23,13,IOB_X0Y229,LIOB33_X0Y229,IO_L10N_T1_13
AA24,13,IOB_X0Y238,LIOB33_X0Y237,IO_L6P_T0_13
AA25,13,IOB_X0Y248,LIOB33_X0Y247,IO_L1P_T0_13
AB3,112,IPAD_X1Y90,GTX_CHANNEL_0_X249Y162,MGTXRXN0_112
AB4,112,IPAD_X1Y91,GTX_CHANNEL_0_X249Y162,MGTXRXP0_112
AB10,12,IOB_X0Y191,LIOB33_X0Y191,IO_L4N_T0_12
AB11,12,IOB_X0Y192,LIOB33_X0Y191,IO_L4P_T0_12
AB12,12,IOB_X0Y196,LIOB33_X0Y195,IO_L2P_T0_12
AB14,12,IOB_X0Y171,LIOB33_X0Y171,IO_L14N_T2_SRCC_12
AB15,12,IOB_X0Y172,LIOB33_X0Y171,IO_L14P_T2_SRCC_12
AB16,12,IOB_X0Y159,LIOB33_X0Y159,IO_L20N_T3_12
AB17,12,IOB_X0Y160,LIOB33_X0Y159,IO_L20P_T3_12
AB19,13,IOB_X0Y205,LIOB33_X0Y205,IO_L22N_T3_13
AB20,13,IOB_X0Y209,LIOB33_X0Y209,IO_L20N_T3_13
AB21,13,IOB_X0Y232,LIOB33_X0Y231,IO_L9P_T1_DQS_13
AB22,13,IOB_X0Y231,LIOB33_X0Y231,IO_L9N_T1_DQS_13
AB24,13,IOB_X0Y237,LIOB33_X0Y237,IO_L6N_T0_VREF_13
AB25,13,IOB_X0Y247,LIOB33_X0Y247,IO_L1N_T0_13
AB26,13,IOB_X0Y246,LIOB33_X0Y245,IO_L2P_T0_13
AC1,111,OPAD_X0Y22,GTX_CHANNEL_3_X249Y150,MGTXTXN3_111
AC2,111,OPAD_X0Y23,GTX_CHANNEL_3_X249Y150,MGTXTXP3_111
AC5,111,IPAD_X1Y78,GTX_CHANNEL_2_X249Y139,MGTXRXN2_111
AC6,111,IPAD_X1Y79,GTX_CHANNEL_2_X249Y139,MGTXRXP2_111
AC11,12,IOB_X0Y195,LIOB33_X0Y195,IO_L2N_T0_12
AC12,12,IOB_X0Y178,LIOB33_X0Y177,IO_L11P_T1_SRCC_12
AC13,12,IOB_X0Y176,LIOB33_X0Y175,IO_L12P_T1_MRCC_12
AC14,12,IOB_X0Y174,LIOB33_X0Y173,IO_L13P_T2_MRCC_12
AC16,12,IOB_X0Y157,LIOB33_X0Y157,IO_L21N_T3_DQS_12
AC17,12,IOB_X0Y158,LIOB33_X0Y157,IO_L21P_T3_DQS_12
AC18,13,IOB_X0Y208,LIOB33_X0Y207,IO_L21P_T3_DQS_13
AC19,13,IOB_X0Y207,LIOB33_X0Y207,IO_L21N_T3_DQS_13
AC21,13,IOB_X0Y222,LIOB33_X0Y221,IO_L14P_T2_SRCC_13
AC22,13,IOB_X0Y221,LIOB33_X0Y221,IO_L14N_T2_SRCC_13
AC23,13,IOB_X0Y226,LIOB33_X0Y225,IO_L12P_T1_MRCC_13
AC24,13,IOB_X0Y225,LIOB33_X0Y225,IO_L12N_T1_MRCC_13
AC26,13,IOB_X0Y245,LIOB33_X0Y245,IO_L2N_T0_13
AD3,111,IPAD_X1Y84,GTX_CHANNEL_3_X249Y150,MGTXRXN3_111
AD4,111,IPAD_X1Y85,GTX_CHANNEL_3_X249Y150,MGTXRXP3_111
AD7,111,IPAD_X1Y60,GTX_CHANNEL_0_X249Y110,MGTXRXN0_111
AD8,111,IPAD_X1Y61,GTX_CHANNEL_0_X249Y110,MGTXRXP0_111
AD10,12,IOB_X0Y185,LIOB33_X0Y185,IO_L7N_T1_12
AD11,12,IOB_X0Y177,LIOB33_X0Y177,IO_L11N_T1_SRCC_12
AD13,12,IOB_X0Y175,LIOB33_X0Y175,IO_L12N_T1_MRCC_12
AD14,12,IOB_X0Y173,LIOB33_X0Y173,IO_L13N_T2_MRCC_12
AD15,12,IOB_X0Y169,LIOB33_X0Y169,IO_L15N_T2_DQS_12
AD16,12,IOB_X0Y170,LIOB33_X0Y169,IO_L15P_T2_DQS_12
AD18,13,IOB_X0Y216,LIOB33_X0Y215,IO_L17P_T2_13
AD19,13,IOB_X0Y215,LIOB33_X0Y215,IO_L17N_T2_13
AD20,13,IOB_X0Y224,LIOB33_X0Y223,IO_L13P_T2_MRCC_13
AD21,13,IOB_X0Y223,LIOB33_X0Y223,IO_L13N_T2_MRCC_13
AD23,13,IOB_X0Y228,LIOB33_X0Y227,IO_L11P_T1_SRCC_13
AD24,13,IOB_X0Y227,LIOB33_X0Y227,IO_L11N_T1_SRCC_13
AD25,13,IOB_X0Y242,LIOB33_X0Y241,IO_L4P_T0_13
AD26,13,IOB_X0Y241,LIOB33_X0Y241,IO_L4N_T0_13
AE1,111,OPAD_X0Y20,GTX_CHANNEL_2_X249Y139,MGTXTXN2_111
AE2,111,OPAD_X0Y21,GTX_CHANNEL_2_X249Y139,MGTXTXP2_111
AE5,111,IPAD_X1Y66,GTX_CHANNEL_1_X249Y121,MGTXRXN1_111
AE6,111,IPAD_X1Y67,GTX_CHANNEL_1_X249Y121,MGTXRXP1_111
AE10,12,IOB_X0Y186,LIOB33_X0Y185,IO_L7P_T1_12
AE11,12,IOB_X0Y182,LIOB33_X0Y181,IO_L9P_T1_DQS_12
AE12,12,IOB_X0Y184,LIOB33_X0Y183,IO_L8P_T1_12
AE13,12,IOB_X0Y180,LIOB33_X0Y179,IO_L10P_T1_12
AE15,12,IOB_X0Y165,LIOB33_X0Y165,IO_L17N_T2_12
AE16,12,IOB_X0Y166,LIOB33_X0Y165,IO_L17P_T2_12
AE17,12,IOB_X0Y164,LIOB33_X0Y163,IO_L18P_T2_12
AE18,13,IOB_X0Y214,LIOB33_X0Y213,IO_L18P_T2_13
AE20,13,IOB_X0Y218,LIOB33_X0Y217,IO_L16P_T2_13
AE21,13,IOB_X0Y217,LIOB33_X0Y217,IO_L16N_T2_13
AE22,13,IOB_X0Y236,LIOB33_X0Y235,IO_L7P_T1_13
AE23,13,IOB_X0Y234,LIOB33_X0Y233,IO_L8P_T1_13
AE25,13,IOB_X0Y244,LIOB33_X0Y243,IO_L3P_T0_DQS_13
AE26,13,IOB_X0Y243,LIOB33_X0Y243,IO_L3N_T0_DQS_13
AF3,111,OPAD_X0Y18,GTX_CHANNEL_1_X249Y121,MGTXTXN1_111
AF4,111,OPAD_X0Y19,GTX_CHANNEL_1_X249Y121,MGTXTXP1_111
AF7,111,OPAD_X0Y16,GTX_CHANNEL_0_X249Y110,MGTXTXN0_111
AF8,111,OPAD_X0Y17,GTX_CHANNEL_0_X249Y110,MGTXTXP0_111
AF10,12,IOB_X0Y181,LIOB33_X0Y181,IO_L9N_T1_DQS_12
AF12,12,IOB_X0Y183,LIOB33_X0Y183,IO_L8N_T1_12
AF13,12,IOB_X0Y179,LIOB33_X0Y179,IO_L10N_T1_12
AF14,12,IOB_X0Y167,LIOB33_X0Y167,IO_L16N_T2_12
AF15,12,IOB_X0Y168,LIOB33_X0Y167,IO_L16P_T2_12
AF17,12,IOB_X0Y163,LIOB33_X0Y163,IO_L18N_T2_12
AF18,13,IOB_X0Y213,LIOB33_X0Y213,IO_L18N_T2_13
AF19,13,IOB_X0Y220,LIOB33_X0Y219,IO_L15P_T2_DQS_13
AF20,13,IOB_X0Y219,LIOB33_X0Y219,IO_L15N_T2_DQS_13
AF22,13,IOB_X0Y235,LIOB33_X0Y235,IO_L7N_T1_13
AF23,13,IOB_X0Y233,LIOB33_X0Y233,IO_L8N_T1_13
AF24,13,IOB_X0Y240,LIOB33_X0Y239,IO_L5P_T0_13
AF25,13,IOB_X0Y239,LIOB33_X0Y239,IO_L5N_T0_13
B1,34,IOB_X1Y253,RIOB18_X107Y253,IO_L23N_T3_34
B2,34,IOB_X1Y252,RIOB18_X107Y251,IO_L24P_T3_34
B4,34,IOB_X1Y259,RIOB18_X107Y259,IO_L20N_T3_34
B5,34,IOB_X1Y260,RIOB18_X107Y259,IO_L20P_T3_34
B6,34,IOB_X1Y258,RIOB18_X107Y257,IO_L21P_T3_DQS_34
B7,34,IOB_X1Y264,RIOB18_X107Y263,IO_L18P_T2_34
B9,34,IOB_X1Y269,RIOB18_X107Y269,IO_L15N_T2_DQS_34
B10,34,IOB_X1Y268,RIOB18_X107Y267,IO_L16P_T2_34
B11,35,IOB_X1Y303,RIOB18_X107Y303,IO_L23N_T3_35
B12,35,IOB_X1Y305,RIOB18_X107Y305,IO_L22N_T3_AD7N_35
B14,35,IOB_X1Y309,RIOB18_X107Y309,IO_L20N_T3_AD6N_35
B15,35,IOB_X1Y315,RIOB18_X107Y315,IO_L17N_T2_AD5N_35
B16,35,IOB_X1Y316,RIOB18_X107Y315,IO_L17P_T2_AD5P_35
B17,35,IOB_X1Y314,RIOB18_X107Y313,IO_L18P_T2_AD13P_35
B19,501,IOPAD_X1Y124,PSS2_X32Y313,PS_MIO47_501
B20,501,IOPAD_X1Y128,PSS2_X32Y313,PS_MIO51_501
B21,501,IOPAD_X1Y125,PSS2_X32Y313,PS_MIO48_501
B22,501,IOPAD_X1Y127,PSS2_X32Y313,PS_MIO50_501
B24,500,IOPAD_X1Y26,PSS2_X32Y313,PS_CLK_500
B25,500,IOPAD_X1Y90,PSS2_X32Y313,PS_MIO13_500
B26,500,IOPAD_X1Y88,PSS2_X32Y313,PS_MIO11_500
C1,33,IOB_X1Y241,RIOB18_X107Y241,IO_L4N_T0_33
C2,34,IOB_X1Y254,RIOB18_X107Y253,IO_L23P_T3_34
C3,34,IOB_X1Y261,RIOB18_X107Y261,IO_L19N_T3_VREF_34
C4,34,IOB_X1Y262,RIOB18_X107Y261,IO_L19P_T3_34
C6,34,IOB_X1Y271,RIOB18_X107Y271,IO_L14N_T2_SRCC_34
C7,34,IOB_X1Y273,RIOB18_X107Y273,IO_L13N_T2_MRCC_34
C8,34,IOB_X1Y274,RIOB18_X107Y273,IO_L13P_T2_MRCC_34
C9,34,IOB_X1Y270,RIOB18_X107Y269,IO_L15P_T2_DQS_34
C11,35,IOB_X1Y304,RIOB18_X107Y303,IO_L23P_T3_35
C12,35,IOB_X1Y306,RIOB18_X107Y305,IO_L22P_T3_AD7P_35
C13,35,IOB_X1Y311,RIOB18_X107Y311,IO_L19N_T3_VREF_35
C14,35,IOB_X1Y310,RIOB18_X107Y309,IO_L20P_T3_AD6P_35
C16,35,IOB_X1Y319,RIOB18_X107Y319,IO_L15N_T2_DQS_AD12N_35
C17,35,IOB_X1Y320,RIOB18_X107Y319,IO_L15P_T2_DQS_AD12P_35
C18,501,IOPAD_X1Y122,PSS2_X32Y313,PS_MIO45_501
C19,501,IOPAD_X1Y118,PSS2_X32Y313,PS_MIO41_501
C21,501,IOPAD_X1Y116,PSS2_X32Y313,PS_MIO39_501
C22,501,IOPAD_X1Y117,PSS2_X32Y313,PS_MIO40_501
C23,500,IOPAD_X1Y132,PSS2_X32Y313,PS_POR_B_500
C24,500,IOPAD_X1Y92,PSS2_X32Y313,PS_MIO15_500
C26,500,IOPAD_X1Y82,PSS2_X32Y313,PS_MIO5_500
D1,33,IOB_X1Y242,RIOB18_X107Y241,IO_L4P_T0_33
D3,33,IOB_X1Y245,RIOB18_X107Y245,IO_L2N_T0_33
D4,33,IOB_X1Y246,RIOB18_X107Y245,IO_L2P_T0_33
D5,34,IOB_X1Y279,RIOB18_X107Y279,IO_L10N_T1_34
D6,34,IOB_X1Y272,RIOB18_X107Y271,IO_L14P_T2_SRCC_34
D8,34,IOB_X1Y283,RIOB18_X107Y283,IO_L8N_T1_34
D9,34,IOB_X1Y284,RIOB18_X107Y283,IO_L8P_T1_34
D10,35,IOB_X1Y345,RIOB18_X107Y345,IO_L2N_T0_AD8N_35
D11,35,IOB_X1Y341,RIOB18_X107Y341,IO_L4N_T0_35
D13,35,IOB_X1Y312,RIOB18_X107Y311,IO_L19P_T3_35
D14,35,IOB_X1Y323,RIOB18_X107Y323,IO_L13N_T2_MRCC_35
D15,35,IOB_X1Y324,RIOB18_X107Y323,IO_L13P_T2_MRCC_35
D16,35,IOB_X1Y317,RIOB18_X107Y317,IO_L16N_T2_35
D18,501,IOPAD_X1Y120,PSS2_X32Y313,PS_MIO43_501
D19,501,IOPAD_X1Y112,PSS2_X32Y313,PS_MIO35_501
D20,501,IOPAD_X1Y114,PSS2_X32Y313,PS_MIO37_501
D21,501,IOPAD_X1Y115,PSS2_X32Y313,PS_MIO38_501
D23,500,IOPAD_X1Y91,PSS2_X32Y313,PS_MIO14_500
D24,500,IOPAD_X1Y86,PSS2_X32Y313,PS_MIO9_500
D25,500,IOPAD_X1Y80,PSS2_X32Y313,PS_MIO3_500
D26,500,IOPAD_X1Y78,PSS2_X32Y313,PS_MIO1_500
E1,33,IOB_X1Y239,RIOB18_X107Y239,IO_L5N_T0_33
E2,33,IOB_X1Y240,RIOB18_X107Y239,IO_L5P_T0_33
E3,33,IOB_X1Y237,RIOB18_X107Y237,IO_L6N_T0_VREF_33
E5,34,IOB_X1Y285,RIOB18_X107Y285,IO_L7N_T1_34
E6,34,IOB_X1Y280,RIOB18_X107Y279,IO_L10P_T1_34
E7,34,IOB_X1Y277,RIOB18_X107Y277,IO_L11N_T1_SRCC_34
E8,34,IOB_X1Y281,RIOB18_X107Y281,IO_L9N_T1_DQS_34
E10,35,IOB_X1Y346,RIOB18_X107Y345,IO_L2P_T0_AD8P_35
E11,35,IOB_X1Y342,RIOB18_X107Y341,IO_L4P_T0_35
E12,35,IOB_X1Y347,RIOB18_X107Y347,IO_L1N_T0_AD0N_35
E13,35,IOB_X1Y337,RIOB18_X107Y337,IO_L6N_T0_VREF_35
E15,35,IOB_X1Y321,RIOB18_X107Y321,IO_L14N_T2_AD4N_SRCC_35
E16,35,IOB_X1Y318,RIOB18_X107Y317,IO_L16P_T2_35
E17,501,IOPAD_X1Y123,PSS2_X32Y313,PS_MIO46_501
E18,501,IOPAD_X1Y121,PSS2_X32Y313,PS_MIO44_501
E20,501,IOPAD_X1Y106,PSS2_X32Y313,PS_MIO29_501
E21,501,IOPAD_X1Y108,PSS2_X32Y313,PS_MIO31_501
E22,501,IOPAD_X1Y110,PSS2_X32Y313,PS_MIO33_501
E23,500,IOPAD_X1Y84,PSS2_X32Y313,PS_MIO7_500
E25,500,IOPAD_X1Y79,PSS2_X32Y313,PS_MIO2_500
E26,500,IOPAD_X1Y77,PSS2_X32Y313,PS_MIO0_500
F2,33,IOB_X1Y243,RIOB18_X107Y243,IO_L3N_T0_DQS_33
F3,33,IOB_X1Y238,RIOB18_X107Y237,IO_L6P_T0_33
F4,33,IOB_X1Y247,RIOB18_X107Y247,IO_L1N_T0_33
F5,34,IOB_X1Y286,RIOB18_X107Y285,IO_L7P_T1_34
F7,34,IOB_X1Y275,RIOB18_X107Y275,IO_L12N_T1_MRCC_34
F8,34,IOB_X1Y278,RIOB18_X107Y277,IO_L11P_T1_SRCC_34
F9,34,IOB_X1Y282,RIOB18_X107Y281,IO_L9P_T1_DQS_34
F10,35,IOB_X1Y343,RIOB18_X107Y343,IO_L3N_T0_DQS_AD1N_35
F12,35,IOB_X1Y348,RIOB18_X107Y347,IO_L1P_T0_AD0P_35
F13,35,IOB_X1Y338,RIOB18_X107Y337,IO_L6P_T0_35
F14,35,IOB_X1Y327,RIOB18_X107Y327,IO_L11N_T1_SRCC_35
F15,35,IOB_X1Y322,RIOB18_X107Y321,IO_L14P_T2_AD4P_SRCC_35
F17,501,IOPAD_X1Y119,PSS2_X32Y313,PS_MIO42_501
F18,501,IOPAD_X1Y104,PSS2_X32Y313,PS_MIO27_501
F19,501,IOPAD_X1Y102,PSS2_X32Y313,PS_MIO25_501
F20,501,IOPAD_X1Y100,PSS2_X32Y313,PS_MIO23_501
F22,501,IOPAD_X1Y98,PSS2_X32Y313,PS_MIO21_501
F23,500,IOPAD_X1Y83,PSS2_X32Y313,PS_MIO6_500
F24,500,IOPAD_X1Y81,PSS2_X32Y313,PS_MIO4_500
F25,502,IOPAD_X1Y33,PSS2_X32Y313,PS_DDR_DQ1_502
G1,33,IOB_X1Y229,RIOB18_X107Y229,IO_L10N_T1_33
G2,33,IOB_X1Y244,RIOB18_X107Y243,IO_L3P_T0_DQS_33
G4,33,IOB_X1Y248,RIOB18_X107Y247,IO_L1P_T0_33
G5,34,IOB_X1Y295,RIOB18_X107Y295,IO_L2N_T0_34
G6,34,IOB_X1Y296,RIOB18_X107Y295,IO_L2P_T0_34
G7,34,IOB_X1Y276,RIOB18_X107Y275,IO_L12P_T1_MRCC_34
G9,34,IOB_X1Y293,RIOB18_X107Y293,IO_L3N_T0_DQS_34
G10,35,IOB_X1Y344,RIOB18_X107Y343,IO_L3P_T0_DQS_AD1P_35
G11,35,IOB_X1Y339,RIOB18_X107Y339,IO_L5N_T0_AD9N_35
G12,35,IOB_X1Y340,RIOB18_X107Y339,IO_L5P_T0_AD9P_35
G14,35,IOB_X1Y328,RIOB18_X107Y327,IO_L11P_T1_SRCC_35
G15,35,IOB_X1Y329,RIOB18_X107Y329,IO_L10N_T1_AD11N_35
G16,35,IOB_X1Y330,RIOB18_X107Y329,IO_L10P_T1_AD11P_35
G17,501,IOPAD_X1Y94,PSS2_X32Y313,PS_MIO17_501
G19,501,IOPAD_X1Y96,PSS2_X32Y313,PS_MIO19_501
G20,501,IOPAD_X1Y95,PSS2_X32Y313,PS_MIO18_501
G21,501,IOPAD_X1Y93,PSS2_X32Y313,PS_MIO16_501
G22,501,IOPAD_X1Y99,PSS2_X32Y313,PS_MIO22_501
G24,502,IOPAD_X1Y28,PSS2_X32Y313,PS_DDR_DM0_502
G25,502,IOPAD_X1Y64,PSS2_X32Y313,PS_DDR_DQS_N0_502
G26,502,IOPAD_X1Y35,PSS2_X32Y313,PS_DDR_DQ3_502
H1,33,IOB_X1Y235,RIOB18_X107Y235,IO_L7N_T1_33
H2,33,IOB_X1Y230,RIOB18_X107Y229,IO_L10P_T1_33
H3,33,IOB_X1Y233,RIOB18_X107Y233,IO_L8N_T1_33
H4,33,IOB_X1Y234,RIOB18_X107Y233,IO_L8P_T1_33
H6,34,IOB_X1Y291,RIOB18_X107Y291,IO_L4N_T0_34
H7,34,IOB_X1Y292,RIOB18_X107Y291,IO_L4P_T0_34
H8,34,IOB_X1Y287,RIOB18_X107Y287,IO_L6N_T0_VREF_34
H9,34,IOB_X1Y294,RIOB18_X107Y293,IO_L3P_T0_DQS_PUDC_B_34
H11,34,IOB_X1Y297,RIOB18_X107Y297,IO_L1N_T0_34
H12,35,IOB_X1Y335,RIOB18_X107Y335,IO_L7N_T1_AD2N_35
H13,35,IOB_X1Y336,RIOB18_X107Y335,IO_L7P_T1_AD2P_35
H14,35,IOB_X1Y325,RIOB18_X107Y325,IO_L12N_T1_MRCC_35
H16,35,IOB_X1Y349,RIOB18_SING_X107Y349,IO_0_VRN_35
H17,501,IOPAD_X1Y103,PSS2_X32Y313,PS_MIO26_501
H19,501,IOPAD_X1Y97,PSS2_X32Y313,PS_MIO20_501
H21,502,IOPAD_X1Y15,PSS2_X32Y313,PS_DDR_A11_502
H22,502,IOPAD_X1Y72,PSS2_X32Y313,PS_DDR_DRST_B_502
H23,502,IOPAD_X1Y37,PSS2_X32Y313,PS_DDR_DQ5_502
H24,502,IOPAD_X1Y68,PSS2_X32Y313,PS_DDR_DQS_P0_502
H26,502,IOPAD_X1Y36,PSS2_X32Y313,PS_DDR_DQ4_502
J1,33,IOB_X1Y236,RIOB18_X107Y235,IO_L7P_T1_33
J3,33,IOB_X1Y225,RIOB18_X107Y225,IO_L12N_T1_MRCC_33
J4,33,IOB_X1Y226,RIOB18_X107Y225,IO_L12P_T1_MRCC_33
J5,33,IOB_X1Y209,RIOB18_X107Y209,IO_L20N_T3_33
J6,33,IOB_X1Y205,RIOB18_X107Y205,IO_L22N_T3_33
J8,34,IOB_X1Y288,RIOB18_X107Y287,IO_L6P_T0_34
J9,34,IOB_X1Y289,RIOB18_X107Y289,IO_L5N_T0_34
J10,34,IOB_X1Y290,RIOB18_X107Y289,IO_L5P_T0_34
J11,34,IOB_X1Y298,RIOB18_X107Y297,IO_L1P_T0_34
J13,35,IOB_X1Y333,RIOB18_X107Y333,IO_L8N_T1_AD10N_35
J14,35,IOB_X1Y326,RIOB18_X107Y325,IO_L12P_T1_MRCC_35
J15,35,IOB_X1Y331,RIOB18_X107Y331,IO_L9N_T1_DQS_AD3N_35
J16,501,IOPAD_X1Y111,PSS2_X32Y313,PS_MIO34_501
J18,501,IOPAD_X1Y105,PSS2_X32Y313,PS_MIO28_501
J19,501,IOPAD_X1Y101,PSS2_X32Y313,PS_MIO24_501
J20,502,IOPAD_X1Y18,PSS2_X32Y313,PS_DDR_A13_502
J21,502,IOPAD_X1Y11,PSS2_X32Y313,PS_DDR_A7_502
J23,502,IOPAD_X1Y39,PSS2_X32Y313,PS_DDR_DQ7_502
J24,502,IOPAD_X1Y38,PSS2_X32Y313,PS_DDR_DQ6_502
J25,502,IOPAD_X1Y34,PSS2_X32Y313,PS_DDR_DQ2_502
J26,502,IOPAD_X1Y32,PSS2_X32Y313,PS_DDR_DQ0_502
K1,33,IOB_X1Y231,RIOB18_X107Y231,IO_L9N_T1_DQS_33
K2,33,IOB_X1Y232,RIOB18_X107Y231,IO_L9P_T1_DQS_33
K3,33,IOB_X1Y227,RIOB18_X107Y227,IO_L11N_T1_SRCC_33
K5,33,IOB_X1Y210,RIOB18_X107Y209,IO_L20P_T3_33
K6,33,IOB_X1Y206,RIOB18_X107Y205,IO_L22P_T3_33
K7,33,IOB_X1Y201,RIOB18_X107Y201,IO_L24N_T3_33
K8,33,IOB_X1Y202,RIOB18_X107Y201,IO_L24P_T3_33
K10,34,IOB_X1Y250,RIOB18_SING_X107Y250,IO_25_VRP_34
K11,34,IOB_X1Y299,RIOB18_SING_X107Y299,IO_0_VRN_34
K12,35,IOB_X1Y300,RIOB18_SING_X107Y300,IO_25_VRP_35
K13,35,IOB_X1Y334,RIOB18_X107Y333,IO_L8P_T1_AD10P_35
K15,35,IOB_X1Y332,RIOB18_X107Y331,IO_L9P_T1_DQS_AD3P_35
K16,501,IOPAD_X1Y113,PSS2_X32Y313,PS_MIO36_501
K17,501,IOPAD_X1Y109,PSS2_X32Y313,PS_MIO32_501
K19,501,IOPAD_X1Y107,PSS2_X32Y313,PS_MIO30_501
K20,502,IOPAD_X1Y5,PSS2_X32Y313,PS_DDR_A1_502
K22,502,IOPAD_X1Y4,PSS2_X32Y313,PS_DDR_A0_502
K23,502,IOPAD_X1Y43,PSS2_X32Y313,PS_DDR_DQ11_502
K25,502,IOPAD_X1Y29,PSS2_X32Y313,PS_DDR_DM1_502
K26,502,IOPAD_X1Y40,PSS2_X32Y313,PS_DDR_DQ8_502
L2,33,IOB_X1Y217,RIOB18_X107Y217,IO_L16N_T2_33
L3,33,IOB_X1Y228,RIOB18_X107Y227,IO_L11P_T1_SRCC_33
L4,33,IOB_X1Y221,RIOB18_X107Y221,IO_L14N_T2_SRCC_33
L5,33,IOB_X1Y222,RIOB18_X107Y221,IO_L14P_T2_SRCC_33
L7,33,IOB_X1Y211,RIOB18_X107Y211,IO_L19N_T3_VREF_33
L8,33,IOB_X1Y207,RIOB18_X107Y207,IO_L21N_T3_DQS_33
L9,33,IOB_X1Y249,RIOB18_SING_X107Y249,IO_0_VRN_33
L20,502,IOPAD_X1Y10,PSS2_X32Y313,PS_DDR_A6_502
L22,502,IOPAD_X1Y7,PSS2_X32Y313,PS_DDR_A3_502
L23,502,IOPAD_X1Y41,PSS2_X32Y313,PS_DDR_DQ9_502
L24,502,IOPAD_X1Y69,PSS2_X32Y313,PS_DDR_DQS_P1_502
L25,502,IOPAD_X1Y65,PSS2_X32Y313,PS_DDR_DQS_N1_502
M1,33,IOB_X1Y213,RIOB18_X107Y213,IO_L18N_T2_33
M2,33,IOB_X1Y218,RIOB18_X107Y217,IO_L16P_T2_33
M4,33,IOB_X1Y215,RIOB18_X107Y215,IO_L17N_T2_33
M5,33,IOB_X1Y223,RIOB18_X107Y223,IO_L13N_T2_MRCC_33
M6,33,IOB_X1Y224,RIOB18_X107Y223,IO_L13P_T2_MRCC_33
M7,33,IOB_X1Y212,RIOB18_X107Y211,IO_L19P_T3_33
M8,33,IOB_X1Y208,RIOB18_X107Y207,IO_L21P_T3_DQS_33
M20,502,IOPAD_X1Y8,PSS2_X32Y313,PS_DDR_A4_502
M22,502,IOPAD_X1Y14,PSS2_X32Y313,PS_DDR_A10_502
M24,502,IOPAD_X1Y46,PSS2_X32Y313,PS_DDR_DQ14_502
M25,502,IOPAD_X1Y44,PSS2_X32Y313,PS_DDR_DQ12_502
M26,502,IOPAD_X1Y42,PSS2_X32Y313,PS_DDR_DQ10_502
N1,33,IOB_X1Y214,RIOB18_X107Y213,IO_L18P_T2_33
N2,33,IOB_X1Y219,RIOB18_X107Y219,IO_L15N_T2_DQS_33
N3,33,IOB_X1Y220,RIOB18_X107Y219,IO_L15P_T2_DQS_33
N4,33,IOB_X1Y216,RIOB18_X107Y215,IO_L17P_T2_33
N6,33,IOB_X1Y203,RIOB18_X107Y203,IO_L23N_T3_33
N7,33,IOB_X1Y204,RIOB18_X107Y203,IO_L23P_T3_33
N8,33,IOB_X1Y200,RIOB18_SING_X107Y200,IO_25_VRP_33
N14,0,IPAD_X0Y120,MONITOR_BOT_PELE1_X197Y339,VP_0
N21,502,IOPAD_X1Y6,PSS2_X32Y313,PS_DDR_A2_502
N22,502,IOPAD_X1Y9,PSS2_X32Y313,PS_DDR_A5_502
N23,502,IOPAD_X1Y47,PSS2_X32Y313,PS_DDR_DQ15_502
N24,502,IOPAD_X1Y45,PSS2_X32Y313,PS_DDR_DQ13_502
N26,502,IOPAD_X1Y50,PSS2_X32Y313,PS_DDR_DQ18_502
P13,0,IPAD_X0Y121,MONITOR_BOT_PELE1_X197Y339,VN_0
P20,502,IOPAD_X1Y16,PSS2_X32Y313,PS_DDR_A12_502
P21,502,IOPAD_X1Y24,PSS2_X32Y313,PS_DDR_CKN_502
P23,502,IOPAD_X1Y51,PSS2_X32Y313,PS_DDR_DQ19_502
P24,502,IOPAD_X1Y49,PSS2_X32Y313,PS_DDR_DQ17_502
P25,502,IOPAD_X1Y70,PSS2_X32Y313,PS_DDR_DQS_P2_502
P26,502,IOPAD_X1Y30,PSS2_X32Y313,PS_DDR_DM2_502
R1,112,OPAD_X0Y30,GTX_CHANNEL_3_X249Y202,MGTXTXN3_112
R2,112,OPAD_X0Y31,GTX_CHANNEL_3_X249Y202,MGTXTXP3_112
R5,112,IPAD_X1Y99,GTX_COMMON_X249Y179,MGTREFCLK0N_112
R6,112,IPAD_X1Y98,GTX_COMMON_X249Y179,MGTREFCLK0P_112
R20,502,IOPAD_X1Y17,PSS2_X32Y313,PS_DDR_A14_502
R21,502,IOPAD_X1Y25,PSS2_X32Y313,PS_DDR_CKP_502
R22,502,IOPAD_X1Y21,PSS2_X32Y313,PS_DDR_BA2_502
R23,502,IOPAD_X1Y55,PSS2_X32Y313,PS_DDR_DQ23_502
R25,502,IOPAD_X1Y66,PSS2_X32Y313,PS_DDR_DQS_N2_502
R26,502,IOPAD_X1Y48,PSS2_X32Y313,PS_DDR_DQ16_502
T3,112,IPAD_X1Y114,GTX_CHANNEL_3_X249Y202,MGTXRXN3_112
T4,112,IPAD_X1Y115,GTX_CHANNEL_3_X249Y202,MGTXRXP3_112
T20,502,IOPAD_X1Y12,PSS2_X32Y313,PS_DDR_A8_502
T22,502,IOPAD_X1Y20,PSS2_X32Y313,PS_DDR_BA1_502
T23,502,IOPAD_X1Y54,PSS2_X32Y313,PS_DDR_DQ22_502
T24,502,IOPAD_X1Y52,PSS2_X32Y313,PS_DDR_DQ20_502
T25,502,IOPAD_X1Y53,PSS2_X32Y313,PS_DDR_DQ21_502
U1,112,OPAD_X0Y28,GTX_CHANNEL_2_X249Y191,MGTXTXN2_112
U2,112,OPAD_X0Y29,GTX_CHANNEL_2_X249Y191,MGTXTXP2_112
U5,112,IPAD_X1Y101,GTX_COMMON_X249Y179,MGTREFCLK1N_112
U6,112,IPAD_X1Y100,GTX_COMMON_X249Y179,MGTREFCLK1P_112
U20,502,IOPAD_X1Y13,PSS2_X32Y313,PS_DDR_A9_502
U21,502,IOPAD_X1Y23,PSS2_X32Y313,PS_DDR_CKE_502
U22,502,IOPAD_X1Y19,PSS2_X32Y313,PS_DDR_BA0_502
U24,502,IOPAD_X1Y58,PSS2_X32Y313,PS_DDR_DQ26_502
U25,502,IOPAD_X1Y59,PSS2_X32Y313,PS_DDR_DQ27_502
U26,502,IOPAD_X1Y57,PSS2_X32Y313,PS_DDR_DQ25_502
V3,112,IPAD_X1Y108,GTX_CHANNEL_2_X249Y191,MGTXRXN2_112
V4,112,IPAD_X1Y109,GTX_CHANNEL_2_X249Y191,MGTXRXP2_112
V18,13,IOB_X0Y200,LIOB33_SING_X0Y200,IO_25_13
V19,13,IOB_X0Y249,LIOB33_SING_X0Y249,IO_0_13
V21,502,IOPAD_X1Y2,PSS2_X32Y313,PS_DDR_VRN_502
V22,502,IOPAD_X1Y1,PSS2_X32Y313,PS_DDR_WE_B_502
V23,502,IOPAD_X1Y133,PSS2_X32Y313,PS_DDR_RAS_B_502
V24,502,IOPAD_X1Y56,PSS2_X32Y313,PS_DDR_DQ24_502
V26,502,IOPAD_X1Y31,PSS2_X32Y313,PS_DDR_DM3_502
W1,112,OPAD_X0Y26,GTX_CHANNEL_1_X249Y173,MGTXTXN1_112
W2,112,OPAD_X0Y27,GTX_CHANNEL_1_X249Y173,MGTXTXP1_112
W5,111,IPAD_X1Y69,GTX_COMMON_X249Y127,MGTREFCLK0N_111
W6,111,IPAD_X1Y68,GTX_COMMON_X249Y127,MGTREFCLK0P_111
W13,12,IOB_X0Y190,LIOB33_X0Y189,IO_L5P_T0_12
W14,12,IOB_X0Y199,LIOB33_SING_X0Y199,IO_0_12
W15,12,IOB_X0Y151,LIOB33_X0Y151,IO_L24N_T3_12
W16,12,IOB_X0Y152,LIOB33_X0Y151,IO_L24P_T3_12
W17,12,IOB_X0Y150,LIOB33_SING_X0Y150,IO_25_12
W18,13,IOB_X0Y204,LIOB33_X0Y203,IO_L23P_T3_13
W19,13,IOB_X0Y203,LIOB33_X0Y203,IO_L23N_T3_13
W20,13,IOB_X0Y212,LIOB33_X0Y211,IO_L19P_T3_13
W21,502,IOPAD_X1Y3,PSS2_X32Y313,PS_DDR_VRP_502
W23,502,IOPAD_X1Y63,PSS2_X32Y313,PS_DDR_DQ31_502
W24,502,IOPAD_X1Y71,PSS2_X32Y313,PS_DDR_DQS_P3_502
W25,502,IOPAD_X1Y67,PSS2_X32Y313,PS_DDR_DQS_N3_502
W26,502,IOPAD_X1Y60,PSS2_X32Y313,PS_DDR_DQ28_502
Y3,112,IPAD_X1Y96,GTX_CHANNEL_1_X249Y173,MGTXRXN1_112
Y4,112,IPAD_X1Y97,GTX_CHANNEL_1_X249Y173,MGTXRXP1_112
Y10,12,IOB_X0Y194,LIOB33_X0Y193,IO_L3P_T0_DQS_12
Y11,12,IOB_X0Y197,LIOB33_X0Y197,IO_L1N_T0_12
Y12,12,IOB_X0Y198,LIOB33_X0Y197,IO_L1P_T0_12
Y13,12,IOB_X0Y189,LIOB33_X0Y189,IO_L5N_T0_12
Y15,12,IOB_X0Y153,LIOB33_X0Y153,IO_L23N_T3_12
Y16,12,IOB_X0Y154,LIOB33_X0Y153,IO_L23P_T3_12
Y17,12,IOB_X0Y162,LIOB33_X0Y161,IO_L19P_T3_12
Y18,13,IOB_X0Y202,LIOB33_X0Y201,IO_L24P_T3_13
Y20,13,IOB_X0Y211,LIOB33_X0Y211,IO_L19N_T3_VREF_13
Y21,502,IOPAD_X1Y27,PSS2_X32Y313,PS_DDR_CS_B_502
Y22,502,IOPAD_X1Y131,PSS2_X32Y313,PS_DDR_ODT_502
Y23,502,IOPAD_X1Y22,PSS2_X32Y313,PS_DDR_CAS_B_502
Y25,502,IOPAD_X1Y61,PSS2_X32Y313,PS_DDR_DQ29_502
Y26,502,IOPAD_X1Y62,PSS2_X32Y313,PS_DDR_DQ30_502
1 pin bank site tile pin_function
2 A2 34 IOB_X1Y251 RIOB18_X107Y251 IO_L24N_T3_34
3 A3 34 IOB_X1Y255 RIOB18_X107Y255 IO_L22N_T3_34
4 A4 34 IOB_X1Y256 RIOB18_X107Y255 IO_L22P_T3_34
5 A5 34 IOB_X1Y257 RIOB18_X107Y257 IO_L21N_T3_DQS_34
6 A7 34 IOB_X1Y263 RIOB18_X107Y263 IO_L18N_T2_34
7 A8 34 IOB_X1Y265 RIOB18_X107Y265 IO_L17N_T2_34
8 A9 34 IOB_X1Y266 RIOB18_X107Y265 IO_L17P_T2_34
9 A10 34 IOB_X1Y267 RIOB18_X107Y267 IO_L16N_T2_34
10 A12 35 IOB_X1Y301 RIOB18_X107Y301 IO_L24N_T3_AD15N_35
11 A13 35 IOB_X1Y302 RIOB18_X107Y301 IO_L24P_T3_AD15P_35
12 A14 35 IOB_X1Y307 RIOB18_X107Y307 IO_L21N_T3_DQS_AD14N_35
13 A15 35 IOB_X1Y308 RIOB18_X107Y307 IO_L21P_T3_DQS_AD14P_35
14 A17 35 IOB_X1Y313 RIOB18_X107Y313 IO_L18N_T2_AD13N_35
15 A18 501 IOPAD_X1Y126 PSS2_X32Y313 PS_MIO49_501
16 A19 501 IOPAD_X1Y130 PSS2_X32Y313 PS_MIO53_501
17 A20 501 IOPAD_X1Y129 PSS2_X32Y313 PS_MIO52_501
18 A22 501 IOPAD_X1Y134 PSS2_X32Y313 PS_SRST_B_501
19 A23 500 IOPAD_X1Y89 PSS2_X32Y313 PS_MIO12_500
20 A24 500 IOPAD_X1Y85 PSS2_X32Y313 PS_MIO8_500
21 A25 500 IOPAD_X1Y87 PSS2_X32Y313 PS_MIO10_500
22 AA1 112 OPAD_X0Y24 GTX_CHANNEL_0_X249Y162 MGTXTXN0_112
23 AA2 112 OPAD_X0Y25 GTX_CHANNEL_0_X249Y162 MGTXTXP0_112
24 AA5 111 IPAD_X1Y71 GTX_COMMON_X249Y127 MGTREFCLK1N_111
25 AA6 111 IPAD_X1Y70 GTX_COMMON_X249Y127 MGTREFCLK1P_111
26 AA10 12 IOB_X0Y193 LIOB33_X0Y193 IO_L3N_T0_DQS_12
27 AA12 12 IOB_X0Y187 LIOB33_X0Y187 IO_L6N_T0_VREF_12
28 AA13 12 IOB_X0Y188 LIOB33_X0Y187 IO_L6P_T0_12
29 AA14 12 IOB_X0Y155 LIOB33_X0Y155 IO_L22N_T3_12
30 AA15 12 IOB_X0Y156 LIOB33_X0Y155 IO_L22P_T3_12
31 AA17 12 IOB_X0Y161 LIOB33_X0Y161 IO_L19N_T3_VREF_12
32 AA18 13 IOB_X0Y201 LIOB33_X0Y201 IO_L24N_T3_13
33 AA19 13 IOB_X0Y206 LIOB33_X0Y205 IO_L22P_T3_13
34 AA20 13 IOB_X0Y210 LIOB33_X0Y209 IO_L20P_T3_13
35 AA22 13 IOB_X0Y230 LIOB33_X0Y229 IO_L10P_T1_13
36 AA23 13 IOB_X0Y229 LIOB33_X0Y229 IO_L10N_T1_13
37 AA24 13 IOB_X0Y238 LIOB33_X0Y237 IO_L6P_T0_13
38 AA25 13 IOB_X0Y248 LIOB33_X0Y247 IO_L1P_T0_13
39 AB3 112 IPAD_X1Y90 GTX_CHANNEL_0_X249Y162 MGTXRXN0_112
40 AB4 112 IPAD_X1Y91 GTX_CHANNEL_0_X249Y162 MGTXRXP0_112
41 AB10 12 IOB_X0Y191 LIOB33_X0Y191 IO_L4N_T0_12
42 AB11 12 IOB_X0Y192 LIOB33_X0Y191 IO_L4P_T0_12
43 AB12 12 IOB_X0Y196 LIOB33_X0Y195 IO_L2P_T0_12
44 AB14 12 IOB_X0Y171 LIOB33_X0Y171 IO_L14N_T2_SRCC_12
45 AB15 12 IOB_X0Y172 LIOB33_X0Y171 IO_L14P_T2_SRCC_12
46 AB16 12 IOB_X0Y159 LIOB33_X0Y159 IO_L20N_T3_12
47 AB17 12 IOB_X0Y160 LIOB33_X0Y159 IO_L20P_T3_12
48 AB19 13 IOB_X0Y205 LIOB33_X0Y205 IO_L22N_T3_13
49 AB20 13 IOB_X0Y209 LIOB33_X0Y209 IO_L20N_T3_13
50 AB21 13 IOB_X0Y232 LIOB33_X0Y231 IO_L9P_T1_DQS_13
51 AB22 13 IOB_X0Y231 LIOB33_X0Y231 IO_L9N_T1_DQS_13
52 AB24 13 IOB_X0Y237 LIOB33_X0Y237 IO_L6N_T0_VREF_13
53 AB25 13 IOB_X0Y247 LIOB33_X0Y247 IO_L1N_T0_13
54 AB26 13 IOB_X0Y246 LIOB33_X0Y245 IO_L2P_T0_13
55 AC1 111 OPAD_X0Y22 GTX_CHANNEL_3_X249Y150 MGTXTXN3_111
56 AC2 111 OPAD_X0Y23 GTX_CHANNEL_3_X249Y150 MGTXTXP3_111
57 AC5 111 IPAD_X1Y78 GTX_CHANNEL_2_X249Y139 MGTXRXN2_111
58 AC6 111 IPAD_X1Y79 GTX_CHANNEL_2_X249Y139 MGTXRXP2_111
59 AC11 12 IOB_X0Y195 LIOB33_X0Y195 IO_L2N_T0_12
60 AC12 12 IOB_X0Y178 LIOB33_X0Y177 IO_L11P_T1_SRCC_12
61 AC13 12 IOB_X0Y176 LIOB33_X0Y175 IO_L12P_T1_MRCC_12
62 AC14 12 IOB_X0Y174 LIOB33_X0Y173 IO_L13P_T2_MRCC_12
63 AC16 12 IOB_X0Y157 LIOB33_X0Y157 IO_L21N_T3_DQS_12
64 AC17 12 IOB_X0Y158 LIOB33_X0Y157 IO_L21P_T3_DQS_12
65 AC18 13 IOB_X0Y208 LIOB33_X0Y207 IO_L21P_T3_DQS_13
66 AC19 13 IOB_X0Y207 LIOB33_X0Y207 IO_L21N_T3_DQS_13
67 AC21 13 IOB_X0Y222 LIOB33_X0Y221 IO_L14P_T2_SRCC_13
68 AC22 13 IOB_X0Y221 LIOB33_X0Y221 IO_L14N_T2_SRCC_13
69 AC23 13 IOB_X0Y226 LIOB33_X0Y225 IO_L12P_T1_MRCC_13
70 AC24 13 IOB_X0Y225 LIOB33_X0Y225 IO_L12N_T1_MRCC_13
71 AC26 13 IOB_X0Y245 LIOB33_X0Y245 IO_L2N_T0_13
72 AD3 111 IPAD_X1Y84 GTX_CHANNEL_3_X249Y150 MGTXRXN3_111
73 AD4 111 IPAD_X1Y85 GTX_CHANNEL_3_X249Y150 MGTXRXP3_111
74 AD7 111 IPAD_X1Y60 GTX_CHANNEL_0_X249Y110 MGTXRXN0_111
75 AD8 111 IPAD_X1Y61 GTX_CHANNEL_0_X249Y110 MGTXRXP0_111
76 AD10 12 IOB_X0Y185 LIOB33_X0Y185 IO_L7N_T1_12
77 AD11 12 IOB_X0Y177 LIOB33_X0Y177 IO_L11N_T1_SRCC_12
78 AD13 12 IOB_X0Y175 LIOB33_X0Y175 IO_L12N_T1_MRCC_12
79 AD14 12 IOB_X0Y173 LIOB33_X0Y173 IO_L13N_T2_MRCC_12
80 AD15 12 IOB_X0Y169 LIOB33_X0Y169 IO_L15N_T2_DQS_12
81 AD16 12 IOB_X0Y170 LIOB33_X0Y169 IO_L15P_T2_DQS_12
82 AD18 13 IOB_X0Y216 LIOB33_X0Y215 IO_L17P_T2_13
83 AD19 13 IOB_X0Y215 LIOB33_X0Y215 IO_L17N_T2_13
84 AD20 13 IOB_X0Y224 LIOB33_X0Y223 IO_L13P_T2_MRCC_13
85 AD21 13 IOB_X0Y223 LIOB33_X0Y223 IO_L13N_T2_MRCC_13
86 AD23 13 IOB_X0Y228 LIOB33_X0Y227 IO_L11P_T1_SRCC_13
87 AD24 13 IOB_X0Y227 LIOB33_X0Y227 IO_L11N_T1_SRCC_13
88 AD25 13 IOB_X0Y242 LIOB33_X0Y241 IO_L4P_T0_13
89 AD26 13 IOB_X0Y241 LIOB33_X0Y241 IO_L4N_T0_13
90 AE1 111 OPAD_X0Y20 GTX_CHANNEL_2_X249Y139 MGTXTXN2_111
91 AE2 111 OPAD_X0Y21 GTX_CHANNEL_2_X249Y139 MGTXTXP2_111
92 AE5 111 IPAD_X1Y66 GTX_CHANNEL_1_X249Y121 MGTXRXN1_111
93 AE6 111 IPAD_X1Y67 GTX_CHANNEL_1_X249Y121 MGTXRXP1_111
94 AE10 12 IOB_X0Y186 LIOB33_X0Y185 IO_L7P_T1_12
95 AE11 12 IOB_X0Y182 LIOB33_X0Y181 IO_L9P_T1_DQS_12
96 AE12 12 IOB_X0Y184 LIOB33_X0Y183 IO_L8P_T1_12
97 AE13 12 IOB_X0Y180 LIOB33_X0Y179 IO_L10P_T1_12
98 AE15 12 IOB_X0Y165 LIOB33_X0Y165 IO_L17N_T2_12
99 AE16 12 IOB_X0Y166 LIOB33_X0Y165 IO_L17P_T2_12
100 AE17 12 IOB_X0Y164 LIOB33_X0Y163 IO_L18P_T2_12
101 AE18 13 IOB_X0Y214 LIOB33_X0Y213 IO_L18P_T2_13
102 AE20 13 IOB_X0Y218 LIOB33_X0Y217 IO_L16P_T2_13
103 AE21 13 IOB_X0Y217 LIOB33_X0Y217 IO_L16N_T2_13
104 AE22 13 IOB_X0Y236 LIOB33_X0Y235 IO_L7P_T1_13
105 AE23 13 IOB_X0Y234 LIOB33_X0Y233 IO_L8P_T1_13
106 AE25 13 IOB_X0Y244 LIOB33_X0Y243 IO_L3P_T0_DQS_13
107 AE26 13 IOB_X0Y243 LIOB33_X0Y243 IO_L3N_T0_DQS_13
108 AF3 111 OPAD_X0Y18 GTX_CHANNEL_1_X249Y121 MGTXTXN1_111
109 AF4 111 OPAD_X0Y19 GTX_CHANNEL_1_X249Y121 MGTXTXP1_111
110 AF7 111 OPAD_X0Y16 GTX_CHANNEL_0_X249Y110 MGTXTXN0_111
111 AF8 111 OPAD_X0Y17 GTX_CHANNEL_0_X249Y110 MGTXTXP0_111
112 AF10 12 IOB_X0Y181 LIOB33_X0Y181 IO_L9N_T1_DQS_12
113 AF12 12 IOB_X0Y183 LIOB33_X0Y183 IO_L8N_T1_12
114 AF13 12 IOB_X0Y179 LIOB33_X0Y179 IO_L10N_T1_12
115 AF14 12 IOB_X0Y167 LIOB33_X0Y167 IO_L16N_T2_12
116 AF15 12 IOB_X0Y168 LIOB33_X0Y167 IO_L16P_T2_12
117 AF17 12 IOB_X0Y163 LIOB33_X0Y163 IO_L18N_T2_12
118 AF18 13 IOB_X0Y213 LIOB33_X0Y213 IO_L18N_T2_13
119 AF19 13 IOB_X0Y220 LIOB33_X0Y219 IO_L15P_T2_DQS_13
120 AF20 13 IOB_X0Y219 LIOB33_X0Y219 IO_L15N_T2_DQS_13
121 AF22 13 IOB_X0Y235 LIOB33_X0Y235 IO_L7N_T1_13
122 AF23 13 IOB_X0Y233 LIOB33_X0Y233 IO_L8N_T1_13
123 AF24 13 IOB_X0Y240 LIOB33_X0Y239 IO_L5P_T0_13
124 AF25 13 IOB_X0Y239 LIOB33_X0Y239 IO_L5N_T0_13
125 B1 34 IOB_X1Y253 RIOB18_X107Y253 IO_L23N_T3_34
126 B2 34 IOB_X1Y252 RIOB18_X107Y251 IO_L24P_T3_34
127 B4 34 IOB_X1Y259 RIOB18_X107Y259 IO_L20N_T3_34
128 B5 34 IOB_X1Y260 RIOB18_X107Y259 IO_L20P_T3_34
129 B6 34 IOB_X1Y258 RIOB18_X107Y257 IO_L21P_T3_DQS_34
130 B7 34 IOB_X1Y264 RIOB18_X107Y263 IO_L18P_T2_34
131 B9 34 IOB_X1Y269 RIOB18_X107Y269 IO_L15N_T2_DQS_34
132 B10 34 IOB_X1Y268 RIOB18_X107Y267 IO_L16P_T2_34
133 B11 35 IOB_X1Y303 RIOB18_X107Y303 IO_L23N_T3_35
134 B12 35 IOB_X1Y305 RIOB18_X107Y305 IO_L22N_T3_AD7N_35
135 B14 35 IOB_X1Y309 RIOB18_X107Y309 IO_L20N_T3_AD6N_35
136 B15 35 IOB_X1Y315 RIOB18_X107Y315 IO_L17N_T2_AD5N_35
137 B16 35 IOB_X1Y316 RIOB18_X107Y315 IO_L17P_T2_AD5P_35
138 B17 35 IOB_X1Y314 RIOB18_X107Y313 IO_L18P_T2_AD13P_35
139 B19 501 IOPAD_X1Y124 PSS2_X32Y313 PS_MIO47_501
140 B20 501 IOPAD_X1Y128 PSS2_X32Y313 PS_MIO51_501
141 B21 501 IOPAD_X1Y125 PSS2_X32Y313 PS_MIO48_501
142 B22 501 IOPAD_X1Y127 PSS2_X32Y313 PS_MIO50_501
143 B24 500 IOPAD_X1Y26 PSS2_X32Y313 PS_CLK_500
144 B25 500 IOPAD_X1Y90 PSS2_X32Y313 PS_MIO13_500
145 B26 500 IOPAD_X1Y88 PSS2_X32Y313 PS_MIO11_500
146 C1 33 IOB_X1Y241 RIOB18_X107Y241 IO_L4N_T0_33
147 C2 34 IOB_X1Y254 RIOB18_X107Y253 IO_L23P_T3_34
148 C3 34 IOB_X1Y261 RIOB18_X107Y261 IO_L19N_T3_VREF_34
149 C4 34 IOB_X1Y262 RIOB18_X107Y261 IO_L19P_T3_34
150 C6 34 IOB_X1Y271 RIOB18_X107Y271 IO_L14N_T2_SRCC_34
151 C7 34 IOB_X1Y273 RIOB18_X107Y273 IO_L13N_T2_MRCC_34
152 C8 34 IOB_X1Y274 RIOB18_X107Y273 IO_L13P_T2_MRCC_34
153 C9 34 IOB_X1Y270 RIOB18_X107Y269 IO_L15P_T2_DQS_34
154 C11 35 IOB_X1Y304 RIOB18_X107Y303 IO_L23P_T3_35
155 C12 35 IOB_X1Y306 RIOB18_X107Y305 IO_L22P_T3_AD7P_35
156 C13 35 IOB_X1Y311 RIOB18_X107Y311 IO_L19N_T3_VREF_35
157 C14 35 IOB_X1Y310 RIOB18_X107Y309 IO_L20P_T3_AD6P_35
158 C16 35 IOB_X1Y319 RIOB18_X107Y319 IO_L15N_T2_DQS_AD12N_35
159 C17 35 IOB_X1Y320 RIOB18_X107Y319 IO_L15P_T2_DQS_AD12P_35
160 C18 501 IOPAD_X1Y122 PSS2_X32Y313 PS_MIO45_501
161 C19 501 IOPAD_X1Y118 PSS2_X32Y313 PS_MIO41_501
162 C21 501 IOPAD_X1Y116 PSS2_X32Y313 PS_MIO39_501
163 C22 501 IOPAD_X1Y117 PSS2_X32Y313 PS_MIO40_501
164 C23 500 IOPAD_X1Y132 PSS2_X32Y313 PS_POR_B_500
165 C24 500 IOPAD_X1Y92 PSS2_X32Y313 PS_MIO15_500
166 C26 500 IOPAD_X1Y82 PSS2_X32Y313 PS_MIO5_500
167 D1 33 IOB_X1Y242 RIOB18_X107Y241 IO_L4P_T0_33
168 D3 33 IOB_X1Y245 RIOB18_X107Y245 IO_L2N_T0_33
169 D4 33 IOB_X1Y246 RIOB18_X107Y245 IO_L2P_T0_33
170 D5 34 IOB_X1Y279 RIOB18_X107Y279 IO_L10N_T1_34
171 D6 34 IOB_X1Y272 RIOB18_X107Y271 IO_L14P_T2_SRCC_34
172 D8 34 IOB_X1Y283 RIOB18_X107Y283 IO_L8N_T1_34
173 D9 34 IOB_X1Y284 RIOB18_X107Y283 IO_L8P_T1_34
174 D10 35 IOB_X1Y345 RIOB18_X107Y345 IO_L2N_T0_AD8N_35
175 D11 35 IOB_X1Y341 RIOB18_X107Y341 IO_L4N_T0_35
176 D13 35 IOB_X1Y312 RIOB18_X107Y311 IO_L19P_T3_35
177 D14 35 IOB_X1Y323 RIOB18_X107Y323 IO_L13N_T2_MRCC_35
178 D15 35 IOB_X1Y324 RIOB18_X107Y323 IO_L13P_T2_MRCC_35
179 D16 35 IOB_X1Y317 RIOB18_X107Y317 IO_L16N_T2_35
180 D18 501 IOPAD_X1Y120 PSS2_X32Y313 PS_MIO43_501
181 D19 501 IOPAD_X1Y112 PSS2_X32Y313 PS_MIO35_501
182 D20 501 IOPAD_X1Y114 PSS2_X32Y313 PS_MIO37_501
183 D21 501 IOPAD_X1Y115 PSS2_X32Y313 PS_MIO38_501
184 D23 500 IOPAD_X1Y91 PSS2_X32Y313 PS_MIO14_500
185 D24 500 IOPAD_X1Y86 PSS2_X32Y313 PS_MIO9_500
186 D25 500 IOPAD_X1Y80 PSS2_X32Y313 PS_MIO3_500
187 D26 500 IOPAD_X1Y78 PSS2_X32Y313 PS_MIO1_500
188 E1 33 IOB_X1Y239 RIOB18_X107Y239 IO_L5N_T0_33
189 E2 33 IOB_X1Y240 RIOB18_X107Y239 IO_L5P_T0_33
190 E3 33 IOB_X1Y237 RIOB18_X107Y237 IO_L6N_T0_VREF_33
191 E5 34 IOB_X1Y285 RIOB18_X107Y285 IO_L7N_T1_34
192 E6 34 IOB_X1Y280 RIOB18_X107Y279 IO_L10P_T1_34
193 E7 34 IOB_X1Y277 RIOB18_X107Y277 IO_L11N_T1_SRCC_34
194 E8 34 IOB_X1Y281 RIOB18_X107Y281 IO_L9N_T1_DQS_34
195 E10 35 IOB_X1Y346 RIOB18_X107Y345 IO_L2P_T0_AD8P_35
196 E11 35 IOB_X1Y342 RIOB18_X107Y341 IO_L4P_T0_35
197 E12 35 IOB_X1Y347 RIOB18_X107Y347 IO_L1N_T0_AD0N_35
198 E13 35 IOB_X1Y337 RIOB18_X107Y337 IO_L6N_T0_VREF_35
199 E15 35 IOB_X1Y321 RIOB18_X107Y321 IO_L14N_T2_AD4N_SRCC_35
200 E16 35 IOB_X1Y318 RIOB18_X107Y317 IO_L16P_T2_35
201 E17 501 IOPAD_X1Y123 PSS2_X32Y313 PS_MIO46_501
202 E18 501 IOPAD_X1Y121 PSS2_X32Y313 PS_MIO44_501
203 E20 501 IOPAD_X1Y106 PSS2_X32Y313 PS_MIO29_501
204 E21 501 IOPAD_X1Y108 PSS2_X32Y313 PS_MIO31_501
205 E22 501 IOPAD_X1Y110 PSS2_X32Y313 PS_MIO33_501
206 E23 500 IOPAD_X1Y84 PSS2_X32Y313 PS_MIO7_500
207 E25 500 IOPAD_X1Y79 PSS2_X32Y313 PS_MIO2_500
208 E26 500 IOPAD_X1Y77 PSS2_X32Y313 PS_MIO0_500
209 F2 33 IOB_X1Y243 RIOB18_X107Y243 IO_L3N_T0_DQS_33
210 F3 33 IOB_X1Y238 RIOB18_X107Y237 IO_L6P_T0_33
211 F4 33 IOB_X1Y247 RIOB18_X107Y247 IO_L1N_T0_33
212 F5 34 IOB_X1Y286 RIOB18_X107Y285 IO_L7P_T1_34
213 F7 34 IOB_X1Y275 RIOB18_X107Y275 IO_L12N_T1_MRCC_34
214 F8 34 IOB_X1Y278 RIOB18_X107Y277 IO_L11P_T1_SRCC_34
215 F9 34 IOB_X1Y282 RIOB18_X107Y281 IO_L9P_T1_DQS_34
216 F10 35 IOB_X1Y343 RIOB18_X107Y343 IO_L3N_T0_DQS_AD1N_35
217 F12 35 IOB_X1Y348 RIOB18_X107Y347 IO_L1P_T0_AD0P_35
218 F13 35 IOB_X1Y338 RIOB18_X107Y337 IO_L6P_T0_35
219 F14 35 IOB_X1Y327 RIOB18_X107Y327 IO_L11N_T1_SRCC_35
220 F15 35 IOB_X1Y322 RIOB18_X107Y321 IO_L14P_T2_AD4P_SRCC_35
221 F17 501 IOPAD_X1Y119 PSS2_X32Y313 PS_MIO42_501
222 F18 501 IOPAD_X1Y104 PSS2_X32Y313 PS_MIO27_501
223 F19 501 IOPAD_X1Y102 PSS2_X32Y313 PS_MIO25_501
224 F20 501 IOPAD_X1Y100 PSS2_X32Y313 PS_MIO23_501
225 F22 501 IOPAD_X1Y98 PSS2_X32Y313 PS_MIO21_501
226 F23 500 IOPAD_X1Y83 PSS2_X32Y313 PS_MIO6_500
227 F24 500 IOPAD_X1Y81 PSS2_X32Y313 PS_MIO4_500
228 F25 502 IOPAD_X1Y33 PSS2_X32Y313 PS_DDR_DQ1_502
229 G1 33 IOB_X1Y229 RIOB18_X107Y229 IO_L10N_T1_33
230 G2 33 IOB_X1Y244 RIOB18_X107Y243 IO_L3P_T0_DQS_33
231 G4 33 IOB_X1Y248 RIOB18_X107Y247 IO_L1P_T0_33
232 G5 34 IOB_X1Y295 RIOB18_X107Y295 IO_L2N_T0_34
233 G6 34 IOB_X1Y296 RIOB18_X107Y295 IO_L2P_T0_34
234 G7 34 IOB_X1Y276 RIOB18_X107Y275 IO_L12P_T1_MRCC_34
235 G9 34 IOB_X1Y293 RIOB18_X107Y293 IO_L3N_T0_DQS_34
236 G10 35 IOB_X1Y344 RIOB18_X107Y343 IO_L3P_T0_DQS_AD1P_35
237 G11 35 IOB_X1Y339 RIOB18_X107Y339 IO_L5N_T0_AD9N_35
238 G12 35 IOB_X1Y340 RIOB18_X107Y339 IO_L5P_T0_AD9P_35
239 G14 35 IOB_X1Y328 RIOB18_X107Y327 IO_L11P_T1_SRCC_35
240 G15 35 IOB_X1Y329 RIOB18_X107Y329 IO_L10N_T1_AD11N_35
241 G16 35 IOB_X1Y330 RIOB18_X107Y329 IO_L10P_T1_AD11P_35
242 G17 501 IOPAD_X1Y94 PSS2_X32Y313 PS_MIO17_501
243 G19 501 IOPAD_X1Y96 PSS2_X32Y313 PS_MIO19_501
244 G20 501 IOPAD_X1Y95 PSS2_X32Y313 PS_MIO18_501
245 G21 501 IOPAD_X1Y93 PSS2_X32Y313 PS_MIO16_501
246 G22 501 IOPAD_X1Y99 PSS2_X32Y313 PS_MIO22_501
247 G24 502 IOPAD_X1Y28 PSS2_X32Y313 PS_DDR_DM0_502
248 G25 502 IOPAD_X1Y64 PSS2_X32Y313 PS_DDR_DQS_N0_502
249 G26 502 IOPAD_X1Y35 PSS2_X32Y313 PS_DDR_DQ3_502
250 H1 33 IOB_X1Y235 RIOB18_X107Y235 IO_L7N_T1_33
251 H2 33 IOB_X1Y230 RIOB18_X107Y229 IO_L10P_T1_33
252 H3 33 IOB_X1Y233 RIOB18_X107Y233 IO_L8N_T1_33
253 H4 33 IOB_X1Y234 RIOB18_X107Y233 IO_L8P_T1_33
254 H6 34 IOB_X1Y291 RIOB18_X107Y291 IO_L4N_T0_34
255 H7 34 IOB_X1Y292 RIOB18_X107Y291 IO_L4P_T0_34
256 H8 34 IOB_X1Y287 RIOB18_X107Y287 IO_L6N_T0_VREF_34
257 H9 34 IOB_X1Y294 RIOB18_X107Y293 IO_L3P_T0_DQS_PUDC_B_34
258 H11 34 IOB_X1Y297 RIOB18_X107Y297 IO_L1N_T0_34
259 H12 35 IOB_X1Y335 RIOB18_X107Y335 IO_L7N_T1_AD2N_35
260 H13 35 IOB_X1Y336 RIOB18_X107Y335 IO_L7P_T1_AD2P_35
261 H14 35 IOB_X1Y325 RIOB18_X107Y325 IO_L12N_T1_MRCC_35
262 H16 35 IOB_X1Y349 RIOB18_SING_X107Y349 IO_0_VRN_35
263 H17 501 IOPAD_X1Y103 PSS2_X32Y313 PS_MIO26_501
264 H19 501 IOPAD_X1Y97 PSS2_X32Y313 PS_MIO20_501
265 H21 502 IOPAD_X1Y15 PSS2_X32Y313 PS_DDR_A11_502
266 H22 502 IOPAD_X1Y72 PSS2_X32Y313 PS_DDR_DRST_B_502
267 H23 502 IOPAD_X1Y37 PSS2_X32Y313 PS_DDR_DQ5_502
268 H24 502 IOPAD_X1Y68 PSS2_X32Y313 PS_DDR_DQS_P0_502
269 H26 502 IOPAD_X1Y36 PSS2_X32Y313 PS_DDR_DQ4_502
270 J1 33 IOB_X1Y236 RIOB18_X107Y235 IO_L7P_T1_33
271 J3 33 IOB_X1Y225 RIOB18_X107Y225 IO_L12N_T1_MRCC_33
272 J4 33 IOB_X1Y226 RIOB18_X107Y225 IO_L12P_T1_MRCC_33
273 J5 33 IOB_X1Y209 RIOB18_X107Y209 IO_L20N_T3_33
274 J6 33 IOB_X1Y205 RIOB18_X107Y205 IO_L22N_T3_33
275 J8 34 IOB_X1Y288 RIOB18_X107Y287 IO_L6P_T0_34
276 J9 34 IOB_X1Y289 RIOB18_X107Y289 IO_L5N_T0_34
277 J10 34 IOB_X1Y290 RIOB18_X107Y289 IO_L5P_T0_34
278 J11 34 IOB_X1Y298 RIOB18_X107Y297 IO_L1P_T0_34
279 J13 35 IOB_X1Y333 RIOB18_X107Y333 IO_L8N_T1_AD10N_35
280 J14 35 IOB_X1Y326 RIOB18_X107Y325 IO_L12P_T1_MRCC_35
281 J15 35 IOB_X1Y331 RIOB18_X107Y331 IO_L9N_T1_DQS_AD3N_35
282 J16 501 IOPAD_X1Y111 PSS2_X32Y313 PS_MIO34_501
283 J18 501 IOPAD_X1Y105 PSS2_X32Y313 PS_MIO28_501
284 J19 501 IOPAD_X1Y101 PSS2_X32Y313 PS_MIO24_501
285 J20 502 IOPAD_X1Y18 PSS2_X32Y313 PS_DDR_A13_502
286 J21 502 IOPAD_X1Y11 PSS2_X32Y313 PS_DDR_A7_502
287 J23 502 IOPAD_X1Y39 PSS2_X32Y313 PS_DDR_DQ7_502
288 J24 502 IOPAD_X1Y38 PSS2_X32Y313 PS_DDR_DQ6_502
289 J25 502 IOPAD_X1Y34 PSS2_X32Y313 PS_DDR_DQ2_502
290 J26 502 IOPAD_X1Y32 PSS2_X32Y313 PS_DDR_DQ0_502
291 K1 33 IOB_X1Y231 RIOB18_X107Y231 IO_L9N_T1_DQS_33
292 K2 33 IOB_X1Y232 RIOB18_X107Y231 IO_L9P_T1_DQS_33
293 K3 33 IOB_X1Y227 RIOB18_X107Y227 IO_L11N_T1_SRCC_33
294 K5 33 IOB_X1Y210 RIOB18_X107Y209 IO_L20P_T3_33
295 K6 33 IOB_X1Y206 RIOB18_X107Y205 IO_L22P_T3_33
296 K7 33 IOB_X1Y201 RIOB18_X107Y201 IO_L24N_T3_33
297 K8 33 IOB_X1Y202 RIOB18_X107Y201 IO_L24P_T3_33
298 K10 34 IOB_X1Y250 RIOB18_SING_X107Y250 IO_25_VRP_34
299 K11 34 IOB_X1Y299 RIOB18_SING_X107Y299 IO_0_VRN_34
300 K12 35 IOB_X1Y300 RIOB18_SING_X107Y300 IO_25_VRP_35
301 K13 35 IOB_X1Y334 RIOB18_X107Y333 IO_L8P_T1_AD10P_35
302 K15 35 IOB_X1Y332 RIOB18_X107Y331 IO_L9P_T1_DQS_AD3P_35
303 K16 501 IOPAD_X1Y113 PSS2_X32Y313 PS_MIO36_501
304 K17 501 IOPAD_X1Y109 PSS2_X32Y313 PS_MIO32_501
305 K19 501 IOPAD_X1Y107 PSS2_X32Y313 PS_MIO30_501
306 K20 502 IOPAD_X1Y5 PSS2_X32Y313 PS_DDR_A1_502
307 K22 502 IOPAD_X1Y4 PSS2_X32Y313 PS_DDR_A0_502
308 K23 502 IOPAD_X1Y43 PSS2_X32Y313 PS_DDR_DQ11_502
309 K25 502 IOPAD_X1Y29 PSS2_X32Y313 PS_DDR_DM1_502
310 K26 502 IOPAD_X1Y40 PSS2_X32Y313 PS_DDR_DQ8_502
311 L2 33 IOB_X1Y217 RIOB18_X107Y217 IO_L16N_T2_33
312 L3 33 IOB_X1Y228 RIOB18_X107Y227 IO_L11P_T1_SRCC_33
313 L4 33 IOB_X1Y221 RIOB18_X107Y221 IO_L14N_T2_SRCC_33
314 L5 33 IOB_X1Y222 RIOB18_X107Y221 IO_L14P_T2_SRCC_33
315 L7 33 IOB_X1Y211 RIOB18_X107Y211 IO_L19N_T3_VREF_33
316 L8 33 IOB_X1Y207 RIOB18_X107Y207 IO_L21N_T3_DQS_33
317 L9 33 IOB_X1Y249 RIOB18_SING_X107Y249 IO_0_VRN_33
318 L20 502 IOPAD_X1Y10 PSS2_X32Y313 PS_DDR_A6_502
319 L22 502 IOPAD_X1Y7 PSS2_X32Y313 PS_DDR_A3_502
320 L23 502 IOPAD_X1Y41 PSS2_X32Y313 PS_DDR_DQ9_502
321 L24 502 IOPAD_X1Y69 PSS2_X32Y313 PS_DDR_DQS_P1_502
322 L25 502 IOPAD_X1Y65 PSS2_X32Y313 PS_DDR_DQS_N1_502
323 M1 33 IOB_X1Y213 RIOB18_X107Y213 IO_L18N_T2_33
324 M2 33 IOB_X1Y218 RIOB18_X107Y217 IO_L16P_T2_33
325 M4 33 IOB_X1Y215 RIOB18_X107Y215 IO_L17N_T2_33
326 M5 33 IOB_X1Y223 RIOB18_X107Y223 IO_L13N_T2_MRCC_33
327 M6 33 IOB_X1Y224 RIOB18_X107Y223 IO_L13P_T2_MRCC_33
328 M7 33 IOB_X1Y212 RIOB18_X107Y211 IO_L19P_T3_33
329 M8 33 IOB_X1Y208 RIOB18_X107Y207 IO_L21P_T3_DQS_33
330 M20 502 IOPAD_X1Y8 PSS2_X32Y313 PS_DDR_A4_502
331 M22 502 IOPAD_X1Y14 PSS2_X32Y313 PS_DDR_A10_502
332 M24 502 IOPAD_X1Y46 PSS2_X32Y313 PS_DDR_DQ14_502
333 M25 502 IOPAD_X1Y44 PSS2_X32Y313 PS_DDR_DQ12_502
334 M26 502 IOPAD_X1Y42 PSS2_X32Y313 PS_DDR_DQ10_502
335 N1 33 IOB_X1Y214 RIOB18_X107Y213 IO_L18P_T2_33
336 N2 33 IOB_X1Y219 RIOB18_X107Y219 IO_L15N_T2_DQS_33
337 N3 33 IOB_X1Y220 RIOB18_X107Y219 IO_L15P_T2_DQS_33
338 N4 33 IOB_X1Y216 RIOB18_X107Y215 IO_L17P_T2_33
339 N6 33 IOB_X1Y203 RIOB18_X107Y203 IO_L23N_T3_33
340 N7 33 IOB_X1Y204 RIOB18_X107Y203 IO_L23P_T3_33
341 N8 33 IOB_X1Y200 RIOB18_SING_X107Y200 IO_25_VRP_33
342 N14 0 IPAD_X0Y120 MONITOR_BOT_PELE1_X197Y339 VP_0
343 N21 502 IOPAD_X1Y6 PSS2_X32Y313 PS_DDR_A2_502
344 N22 502 IOPAD_X1Y9 PSS2_X32Y313 PS_DDR_A5_502
345 N23 502 IOPAD_X1Y47 PSS2_X32Y313 PS_DDR_DQ15_502
346 N24 502 IOPAD_X1Y45 PSS2_X32Y313 PS_DDR_DQ13_502
347 N26 502 IOPAD_X1Y50 PSS2_X32Y313 PS_DDR_DQ18_502
348 P13 0 IPAD_X0Y121 MONITOR_BOT_PELE1_X197Y339 VN_0
349 P20 502 IOPAD_X1Y16 PSS2_X32Y313 PS_DDR_A12_502
350 P21 502 IOPAD_X1Y24 PSS2_X32Y313 PS_DDR_CKN_502
351 P23 502 IOPAD_X1Y51 PSS2_X32Y313 PS_DDR_DQ19_502
352 P24 502 IOPAD_X1Y49 PSS2_X32Y313 PS_DDR_DQ17_502
353 P25 502 IOPAD_X1Y70 PSS2_X32Y313 PS_DDR_DQS_P2_502
354 P26 502 IOPAD_X1Y30 PSS2_X32Y313 PS_DDR_DM2_502
355 R1 112 OPAD_X0Y30 GTX_CHANNEL_3_X249Y202 MGTXTXN3_112
356 R2 112 OPAD_X0Y31 GTX_CHANNEL_3_X249Y202 MGTXTXP3_112
357 R5 112 IPAD_X1Y99 GTX_COMMON_X249Y179 MGTREFCLK0N_112
358 R6 112 IPAD_X1Y98 GTX_COMMON_X249Y179 MGTREFCLK0P_112
359 R20 502 IOPAD_X1Y17 PSS2_X32Y313 PS_DDR_A14_502
360 R21 502 IOPAD_X1Y25 PSS2_X32Y313 PS_DDR_CKP_502
361 R22 502 IOPAD_X1Y21 PSS2_X32Y313 PS_DDR_BA2_502
362 R23 502 IOPAD_X1Y55 PSS2_X32Y313 PS_DDR_DQ23_502
363 R25 502 IOPAD_X1Y66 PSS2_X32Y313 PS_DDR_DQS_N2_502
364 R26 502 IOPAD_X1Y48 PSS2_X32Y313 PS_DDR_DQ16_502
365 T3 112 IPAD_X1Y114 GTX_CHANNEL_3_X249Y202 MGTXRXN3_112
366 T4 112 IPAD_X1Y115 GTX_CHANNEL_3_X249Y202 MGTXRXP3_112
367 T20 502 IOPAD_X1Y12 PSS2_X32Y313 PS_DDR_A8_502
368 T22 502 IOPAD_X1Y20 PSS2_X32Y313 PS_DDR_BA1_502
369 T23 502 IOPAD_X1Y54 PSS2_X32Y313 PS_DDR_DQ22_502
370 T24 502 IOPAD_X1Y52 PSS2_X32Y313 PS_DDR_DQ20_502
371 T25 502 IOPAD_X1Y53 PSS2_X32Y313 PS_DDR_DQ21_502
372 U1 112 OPAD_X0Y28 GTX_CHANNEL_2_X249Y191 MGTXTXN2_112
373 U2 112 OPAD_X0Y29 GTX_CHANNEL_2_X249Y191 MGTXTXP2_112
374 U5 112 IPAD_X1Y101 GTX_COMMON_X249Y179 MGTREFCLK1N_112
375 U6 112 IPAD_X1Y100 GTX_COMMON_X249Y179 MGTREFCLK1P_112
376 U20 502 IOPAD_X1Y13 PSS2_X32Y313 PS_DDR_A9_502
377 U21 502 IOPAD_X1Y23 PSS2_X32Y313 PS_DDR_CKE_502
378 U22 502 IOPAD_X1Y19 PSS2_X32Y313 PS_DDR_BA0_502
379 U24 502 IOPAD_X1Y58 PSS2_X32Y313 PS_DDR_DQ26_502
380 U25 502 IOPAD_X1Y59 PSS2_X32Y313 PS_DDR_DQ27_502
381 U26 502 IOPAD_X1Y57 PSS2_X32Y313 PS_DDR_DQ25_502
382 V3 112 IPAD_X1Y108 GTX_CHANNEL_2_X249Y191 MGTXRXN2_112
383 V4 112 IPAD_X1Y109 GTX_CHANNEL_2_X249Y191 MGTXRXP2_112
384 V18 13 IOB_X0Y200 LIOB33_SING_X0Y200 IO_25_13
385 V19 13 IOB_X0Y249 LIOB33_SING_X0Y249 IO_0_13
386 V21 502 IOPAD_X1Y2 PSS2_X32Y313 PS_DDR_VRN_502
387 V22 502 IOPAD_X1Y1 PSS2_X32Y313 PS_DDR_WE_B_502
388 V23 502 IOPAD_X1Y133 PSS2_X32Y313 PS_DDR_RAS_B_502
389 V24 502 IOPAD_X1Y56 PSS2_X32Y313 PS_DDR_DQ24_502
390 V26 502 IOPAD_X1Y31 PSS2_X32Y313 PS_DDR_DM3_502
391 W1 112 OPAD_X0Y26 GTX_CHANNEL_1_X249Y173 MGTXTXN1_112
392 W2 112 OPAD_X0Y27 GTX_CHANNEL_1_X249Y173 MGTXTXP1_112
393 W5 111 IPAD_X1Y69 GTX_COMMON_X249Y127 MGTREFCLK0N_111
394 W6 111 IPAD_X1Y68 GTX_COMMON_X249Y127 MGTREFCLK0P_111
395 W13 12 IOB_X0Y190 LIOB33_X0Y189 IO_L5P_T0_12
396 W14 12 IOB_X0Y199 LIOB33_SING_X0Y199 IO_0_12
397 W15 12 IOB_X0Y151 LIOB33_X0Y151 IO_L24N_T3_12
398 W16 12 IOB_X0Y152 LIOB33_X0Y151 IO_L24P_T3_12
399 W17 12 IOB_X0Y150 LIOB33_SING_X0Y150 IO_25_12
400 W18 13 IOB_X0Y204 LIOB33_X0Y203 IO_L23P_T3_13
401 W19 13 IOB_X0Y203 LIOB33_X0Y203 IO_L23N_T3_13
402 W20 13 IOB_X0Y212 LIOB33_X0Y211 IO_L19P_T3_13
403 W21 502 IOPAD_X1Y3 PSS2_X32Y313 PS_DDR_VRP_502
404 W23 502 IOPAD_X1Y63 PSS2_X32Y313 PS_DDR_DQ31_502
405 W24 502 IOPAD_X1Y71 PSS2_X32Y313 PS_DDR_DQS_P3_502
406 W25 502 IOPAD_X1Y67 PSS2_X32Y313 PS_DDR_DQS_N3_502
407 W26 502 IOPAD_X1Y60 PSS2_X32Y313 PS_DDR_DQ28_502
408 Y3 112 IPAD_X1Y96 GTX_CHANNEL_1_X249Y173 MGTXRXN1_112
409 Y4 112 IPAD_X1Y97 GTX_CHANNEL_1_X249Y173 MGTXRXP1_112
410 Y10 12 IOB_X0Y194 LIOB33_X0Y193 IO_L3P_T0_DQS_12
411 Y11 12 IOB_X0Y197 LIOB33_X0Y197 IO_L1N_T0_12
412 Y12 12 IOB_X0Y198 LIOB33_X0Y197 IO_L1P_T0_12
413 Y13 12 IOB_X0Y189 LIOB33_X0Y189 IO_L5N_T0_12
414 Y15 12 IOB_X0Y153 LIOB33_X0Y153 IO_L23N_T3_12
415 Y16 12 IOB_X0Y154 LIOB33_X0Y153 IO_L23P_T3_12
416 Y17 12 IOB_X0Y162 LIOB33_X0Y161 IO_L19P_T3_12
417 Y18 13 IOB_X0Y202 LIOB33_X0Y201 IO_L24P_T3_13
418 Y20 13 IOB_X0Y211 LIOB33_X0Y211 IO_L19N_T3_VREF_13
419 Y21 502 IOPAD_X1Y27 PSS2_X32Y313 PS_DDR_CS_B_502
420 Y22 502 IOPAD_X1Y131 PSS2_X32Y313 PS_DDR_ODT_502
421 Y23 502 IOPAD_X1Y22 PSS2_X32Y313 PS_DDR_CAS_B_502
422 Y25 502 IOPAD_X1Y61 PSS2_X32Y313 PS_DDR_DQ29_502
423 Y26 502 IOPAD_X1Y62 PSS2_X32Y313 PS_DDR_DQ30_502

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File diff suppressed because it is too large Load Diff

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@ -0,0 +1,423 @@
pin,bank,site,tile,pin_function
A2,34,IOB_X1Y251,RIOB18_X107Y251,IO_L24N_T3_34
A3,34,IOB_X1Y255,RIOB18_X107Y255,IO_L22N_T3_34
A4,34,IOB_X1Y256,RIOB18_X107Y255,IO_L22P_T3_34
A5,34,IOB_X1Y257,RIOB18_X107Y257,IO_L21N_T3_DQS_34
A7,34,IOB_X1Y263,RIOB18_X107Y263,IO_L18N_T2_34
A8,34,IOB_X1Y265,RIOB18_X107Y265,IO_L17N_T2_34
A9,34,IOB_X1Y266,RIOB18_X107Y265,IO_L17P_T2_34
A10,34,IOB_X1Y267,RIOB18_X107Y267,IO_L16N_T2_34
A12,35,IOB_X1Y301,RIOB18_X107Y301,IO_L24N_T3_AD15N_35
A13,35,IOB_X1Y302,RIOB18_X107Y301,IO_L24P_T3_AD15P_35
A14,35,IOB_X1Y307,RIOB18_X107Y307,IO_L21N_T3_DQS_AD14N_35
A15,35,IOB_X1Y308,RIOB18_X107Y307,IO_L21P_T3_DQS_AD14P_35
A17,35,IOB_X1Y313,RIOB18_X107Y313,IO_L18N_T2_AD13N_35
A18,501,IOPAD_X1Y126,PSS2_X32Y313,PS_MIO49_501
A19,501,IOPAD_X1Y130,PSS2_X32Y313,PS_MIO53_501
A20,501,IOPAD_X1Y129,PSS2_X32Y313,PS_MIO52_501
A22,501,IOPAD_X1Y134,PSS2_X32Y313,PS_SRST_B_501
A23,500,IOPAD_X1Y89,PSS2_X32Y313,PS_MIO12_500
A24,500,IOPAD_X1Y85,PSS2_X32Y313,PS_MIO8_500
A25,500,IOPAD_X1Y87,PSS2_X32Y313,PS_MIO10_500
AA1,112,OPAD_X0Y24,GTX_CHANNEL_0_X249Y162,MGTXTXN0_112
AA2,112,OPAD_X0Y25,GTX_CHANNEL_0_X249Y162,MGTXTXP0_112
AA5,111,IPAD_X1Y71,GTX_COMMON_X249Y127,MGTREFCLK1N_111
AA6,111,IPAD_X1Y70,GTX_COMMON_X249Y127,MGTREFCLK1P_111
AA10,12,IOB_X0Y193,LIOB33_X0Y193,IO_L3N_T0_DQS_12
AA12,12,IOB_X0Y187,LIOB33_X0Y187,IO_L6N_T0_VREF_12
AA13,12,IOB_X0Y188,LIOB33_X0Y187,IO_L6P_T0_12
AA14,12,IOB_X0Y155,LIOB33_X0Y155,IO_L22N_T3_12
AA15,12,IOB_X0Y156,LIOB33_X0Y155,IO_L22P_T3_12
AA17,12,IOB_X0Y161,LIOB33_X0Y161,IO_L19N_T3_VREF_12
AA18,13,IOB_X0Y201,LIOB33_X0Y201,IO_L24N_T3_13
AA19,13,IOB_X0Y206,LIOB33_X0Y205,IO_L22P_T3_13
AA20,13,IOB_X0Y210,LIOB33_X0Y209,IO_L20P_T3_13
AA22,13,IOB_X0Y230,LIOB33_X0Y229,IO_L10P_T1_13
AA23,13,IOB_X0Y229,LIOB33_X0Y229,IO_L10N_T1_13
AA24,13,IOB_X0Y238,LIOB33_X0Y237,IO_L6P_T0_13
AA25,13,IOB_X0Y248,LIOB33_X0Y247,IO_L1P_T0_13
AB3,112,IPAD_X1Y90,GTX_CHANNEL_0_X249Y162,MGTXRXN0_112
AB4,112,IPAD_X1Y91,GTX_CHANNEL_0_X249Y162,MGTXRXP0_112
AB10,12,IOB_X0Y191,LIOB33_X0Y191,IO_L4N_T0_12
AB11,12,IOB_X0Y192,LIOB33_X0Y191,IO_L4P_T0_12
AB12,12,IOB_X0Y196,LIOB33_X0Y195,IO_L2P_T0_12
AB14,12,IOB_X0Y171,LIOB33_X0Y171,IO_L14N_T2_SRCC_12
AB15,12,IOB_X0Y172,LIOB33_X0Y171,IO_L14P_T2_SRCC_12
AB16,12,IOB_X0Y159,LIOB33_X0Y159,IO_L20N_T3_12
AB17,12,IOB_X0Y160,LIOB33_X0Y159,IO_L20P_T3_12
AB19,13,IOB_X0Y205,LIOB33_X0Y205,IO_L22N_T3_13
AB20,13,IOB_X0Y209,LIOB33_X0Y209,IO_L20N_T3_13
AB21,13,IOB_X0Y232,LIOB33_X0Y231,IO_L9P_T1_DQS_13
AB22,13,IOB_X0Y231,LIOB33_X0Y231,IO_L9N_T1_DQS_13
AB24,13,IOB_X0Y237,LIOB33_X0Y237,IO_L6N_T0_VREF_13
AB25,13,IOB_X0Y247,LIOB33_X0Y247,IO_L1N_T0_13
AB26,13,IOB_X0Y246,LIOB33_X0Y245,IO_L2P_T0_13
AC1,111,OPAD_X0Y22,GTX_CHANNEL_3_X249Y150,MGTXTXN3_111
AC2,111,OPAD_X0Y23,GTX_CHANNEL_3_X249Y150,MGTXTXP3_111
AC5,111,IPAD_X1Y78,GTX_CHANNEL_2_X249Y139,MGTXRXN2_111
AC6,111,IPAD_X1Y79,GTX_CHANNEL_2_X249Y139,MGTXRXP2_111
AC11,12,IOB_X0Y195,LIOB33_X0Y195,IO_L2N_T0_12
AC12,12,IOB_X0Y178,LIOB33_X0Y177,IO_L11P_T1_SRCC_12
AC13,12,IOB_X0Y176,LIOB33_X0Y175,IO_L12P_T1_MRCC_12
AC14,12,IOB_X0Y174,LIOB33_X0Y173,IO_L13P_T2_MRCC_12
AC16,12,IOB_X0Y157,LIOB33_X0Y157,IO_L21N_T3_DQS_12
AC17,12,IOB_X0Y158,LIOB33_X0Y157,IO_L21P_T3_DQS_12
AC18,13,IOB_X0Y208,LIOB33_X0Y207,IO_L21P_T3_DQS_13
AC19,13,IOB_X0Y207,LIOB33_X0Y207,IO_L21N_T3_DQS_13
AC21,13,IOB_X0Y222,LIOB33_X0Y221,IO_L14P_T2_SRCC_13
AC22,13,IOB_X0Y221,LIOB33_X0Y221,IO_L14N_T2_SRCC_13
AC23,13,IOB_X0Y226,LIOB33_X0Y225,IO_L12P_T1_MRCC_13
AC24,13,IOB_X0Y225,LIOB33_X0Y225,IO_L12N_T1_MRCC_13
AC26,13,IOB_X0Y245,LIOB33_X0Y245,IO_L2N_T0_13
AD3,111,IPAD_X1Y84,GTX_CHANNEL_3_X249Y150,MGTXRXN3_111
AD4,111,IPAD_X1Y85,GTX_CHANNEL_3_X249Y150,MGTXRXP3_111
AD7,111,IPAD_X1Y60,GTX_CHANNEL_0_X249Y110,MGTXRXN0_111
AD8,111,IPAD_X1Y61,GTX_CHANNEL_0_X249Y110,MGTXRXP0_111
AD10,12,IOB_X0Y185,LIOB33_X0Y185,IO_L7N_T1_12
AD11,12,IOB_X0Y177,LIOB33_X0Y177,IO_L11N_T1_SRCC_12
AD13,12,IOB_X0Y175,LIOB33_X0Y175,IO_L12N_T1_MRCC_12
AD14,12,IOB_X0Y173,LIOB33_X0Y173,IO_L13N_T2_MRCC_12
AD15,12,IOB_X0Y169,LIOB33_X0Y169,IO_L15N_T2_DQS_12
AD16,12,IOB_X0Y170,LIOB33_X0Y169,IO_L15P_T2_DQS_12
AD18,13,IOB_X0Y216,LIOB33_X0Y215,IO_L17P_T2_13
AD19,13,IOB_X0Y215,LIOB33_X0Y215,IO_L17N_T2_13
AD20,13,IOB_X0Y224,LIOB33_X0Y223,IO_L13P_T2_MRCC_13
AD21,13,IOB_X0Y223,LIOB33_X0Y223,IO_L13N_T2_MRCC_13
AD23,13,IOB_X0Y228,LIOB33_X0Y227,IO_L11P_T1_SRCC_13
AD24,13,IOB_X0Y227,LIOB33_X0Y227,IO_L11N_T1_SRCC_13
AD25,13,IOB_X0Y242,LIOB33_X0Y241,IO_L4P_T0_13
AD26,13,IOB_X0Y241,LIOB33_X0Y241,IO_L4N_T0_13
AE1,111,OPAD_X0Y20,GTX_CHANNEL_2_X249Y139,MGTXTXN2_111
AE2,111,OPAD_X0Y21,GTX_CHANNEL_2_X249Y139,MGTXTXP2_111
AE5,111,IPAD_X1Y66,GTX_CHANNEL_1_X249Y121,MGTXRXN1_111
AE6,111,IPAD_X1Y67,GTX_CHANNEL_1_X249Y121,MGTXRXP1_111
AE10,12,IOB_X0Y186,LIOB33_X0Y185,IO_L7P_T1_12
AE11,12,IOB_X0Y182,LIOB33_X0Y181,IO_L9P_T1_DQS_12
AE12,12,IOB_X0Y184,LIOB33_X0Y183,IO_L8P_T1_12
AE13,12,IOB_X0Y180,LIOB33_X0Y179,IO_L10P_T1_12
AE15,12,IOB_X0Y165,LIOB33_X0Y165,IO_L17N_T2_12
AE16,12,IOB_X0Y166,LIOB33_X0Y165,IO_L17P_T2_12
AE17,12,IOB_X0Y164,LIOB33_X0Y163,IO_L18P_T2_12
AE18,13,IOB_X0Y214,LIOB33_X0Y213,IO_L18P_T2_13
AE20,13,IOB_X0Y218,LIOB33_X0Y217,IO_L16P_T2_13
AE21,13,IOB_X0Y217,LIOB33_X0Y217,IO_L16N_T2_13
AE22,13,IOB_X0Y236,LIOB33_X0Y235,IO_L7P_T1_13
AE23,13,IOB_X0Y234,LIOB33_X0Y233,IO_L8P_T1_13
AE25,13,IOB_X0Y244,LIOB33_X0Y243,IO_L3P_T0_DQS_13
AE26,13,IOB_X0Y243,LIOB33_X0Y243,IO_L3N_T0_DQS_13
AF3,111,OPAD_X0Y18,GTX_CHANNEL_1_X249Y121,MGTXTXN1_111
AF4,111,OPAD_X0Y19,GTX_CHANNEL_1_X249Y121,MGTXTXP1_111
AF7,111,OPAD_X0Y16,GTX_CHANNEL_0_X249Y110,MGTXTXN0_111
AF8,111,OPAD_X0Y17,GTX_CHANNEL_0_X249Y110,MGTXTXP0_111
AF10,12,IOB_X0Y181,LIOB33_X0Y181,IO_L9N_T1_DQS_12
AF12,12,IOB_X0Y183,LIOB33_X0Y183,IO_L8N_T1_12
AF13,12,IOB_X0Y179,LIOB33_X0Y179,IO_L10N_T1_12
AF14,12,IOB_X0Y167,LIOB33_X0Y167,IO_L16N_T2_12
AF15,12,IOB_X0Y168,LIOB33_X0Y167,IO_L16P_T2_12
AF17,12,IOB_X0Y163,LIOB33_X0Y163,IO_L18N_T2_12
AF18,13,IOB_X0Y213,LIOB33_X0Y213,IO_L18N_T2_13
AF19,13,IOB_X0Y220,LIOB33_X0Y219,IO_L15P_T2_DQS_13
AF20,13,IOB_X0Y219,LIOB33_X0Y219,IO_L15N_T2_DQS_13
AF22,13,IOB_X0Y235,LIOB33_X0Y235,IO_L7N_T1_13
AF23,13,IOB_X0Y233,LIOB33_X0Y233,IO_L8N_T1_13
AF24,13,IOB_X0Y240,LIOB33_X0Y239,IO_L5P_T0_13
AF25,13,IOB_X0Y239,LIOB33_X0Y239,IO_L5N_T0_13
B1,34,IOB_X1Y253,RIOB18_X107Y253,IO_L23N_T3_34
B2,34,IOB_X1Y252,RIOB18_X107Y251,IO_L24P_T3_34
B4,34,IOB_X1Y259,RIOB18_X107Y259,IO_L20N_T3_34
B5,34,IOB_X1Y260,RIOB18_X107Y259,IO_L20P_T3_34
B6,34,IOB_X1Y258,RIOB18_X107Y257,IO_L21P_T3_DQS_34
B7,34,IOB_X1Y264,RIOB18_X107Y263,IO_L18P_T2_34
B9,34,IOB_X1Y269,RIOB18_X107Y269,IO_L15N_T2_DQS_34
B10,34,IOB_X1Y268,RIOB18_X107Y267,IO_L16P_T2_34
B11,35,IOB_X1Y303,RIOB18_X107Y303,IO_L23N_T3_35
B12,35,IOB_X1Y305,RIOB18_X107Y305,IO_L22N_T3_AD7N_35
B14,35,IOB_X1Y309,RIOB18_X107Y309,IO_L20N_T3_AD6N_35
B15,35,IOB_X1Y315,RIOB18_X107Y315,IO_L17N_T2_AD5N_35
B16,35,IOB_X1Y316,RIOB18_X107Y315,IO_L17P_T2_AD5P_35
B17,35,IOB_X1Y314,RIOB18_X107Y313,IO_L18P_T2_AD13P_35
B19,501,IOPAD_X1Y124,PSS2_X32Y313,PS_MIO47_501
B20,501,IOPAD_X1Y128,PSS2_X32Y313,PS_MIO51_501
B21,501,IOPAD_X1Y125,PSS2_X32Y313,PS_MIO48_501
B22,501,IOPAD_X1Y127,PSS2_X32Y313,PS_MIO50_501
B24,500,IOPAD_X1Y26,PSS2_X32Y313,PS_CLK_500
B25,500,IOPAD_X1Y90,PSS2_X32Y313,PS_MIO13_500
B26,500,IOPAD_X1Y88,PSS2_X32Y313,PS_MIO11_500
C1,33,IOB_X1Y241,RIOB18_X107Y241,IO_L4N_T0_33
C2,34,IOB_X1Y254,RIOB18_X107Y253,IO_L23P_T3_34
C3,34,IOB_X1Y261,RIOB18_X107Y261,IO_L19N_T3_VREF_34
C4,34,IOB_X1Y262,RIOB18_X107Y261,IO_L19P_T3_34
C6,34,IOB_X1Y271,RIOB18_X107Y271,IO_L14N_T2_SRCC_34
C7,34,IOB_X1Y273,RIOB18_X107Y273,IO_L13N_T2_MRCC_34
C8,34,IOB_X1Y274,RIOB18_X107Y273,IO_L13P_T2_MRCC_34
C9,34,IOB_X1Y270,RIOB18_X107Y269,IO_L15P_T2_DQS_34
C11,35,IOB_X1Y304,RIOB18_X107Y303,IO_L23P_T3_35
C12,35,IOB_X1Y306,RIOB18_X107Y305,IO_L22P_T3_AD7P_35
C13,35,IOB_X1Y311,RIOB18_X107Y311,IO_L19N_T3_VREF_35
C14,35,IOB_X1Y310,RIOB18_X107Y309,IO_L20P_T3_AD6P_35
C16,35,IOB_X1Y319,RIOB18_X107Y319,IO_L15N_T2_DQS_AD12N_35
C17,35,IOB_X1Y320,RIOB18_X107Y319,IO_L15P_T2_DQS_AD12P_35
C18,501,IOPAD_X1Y122,PSS2_X32Y313,PS_MIO45_501
C19,501,IOPAD_X1Y118,PSS2_X32Y313,PS_MIO41_501
C21,501,IOPAD_X1Y116,PSS2_X32Y313,PS_MIO39_501
C22,501,IOPAD_X1Y117,PSS2_X32Y313,PS_MIO40_501
C23,500,IOPAD_X1Y132,PSS2_X32Y313,PS_POR_B_500
C24,500,IOPAD_X1Y92,PSS2_X32Y313,PS_MIO15_500
C26,500,IOPAD_X1Y82,PSS2_X32Y313,PS_MIO5_500
D1,33,IOB_X1Y242,RIOB18_X107Y241,IO_L4P_T0_33
D3,33,IOB_X1Y245,RIOB18_X107Y245,IO_L2N_T0_33
D4,33,IOB_X1Y246,RIOB18_X107Y245,IO_L2P_T0_33
D5,34,IOB_X1Y279,RIOB18_X107Y279,IO_L10N_T1_34
D6,34,IOB_X1Y272,RIOB18_X107Y271,IO_L14P_T2_SRCC_34
D8,34,IOB_X1Y283,RIOB18_X107Y283,IO_L8N_T1_34
D9,34,IOB_X1Y284,RIOB18_X107Y283,IO_L8P_T1_34
D10,35,IOB_X1Y345,RIOB18_X107Y345,IO_L2N_T0_AD8N_35
D11,35,IOB_X1Y341,RIOB18_X107Y341,IO_L4N_T0_35
D13,35,IOB_X1Y312,RIOB18_X107Y311,IO_L19P_T3_35
D14,35,IOB_X1Y323,RIOB18_X107Y323,IO_L13N_T2_MRCC_35
D15,35,IOB_X1Y324,RIOB18_X107Y323,IO_L13P_T2_MRCC_35
D16,35,IOB_X1Y317,RIOB18_X107Y317,IO_L16N_T2_35
D18,501,IOPAD_X1Y120,PSS2_X32Y313,PS_MIO43_501
D19,501,IOPAD_X1Y112,PSS2_X32Y313,PS_MIO35_501
D20,501,IOPAD_X1Y114,PSS2_X32Y313,PS_MIO37_501
D21,501,IOPAD_X1Y115,PSS2_X32Y313,PS_MIO38_501
D23,500,IOPAD_X1Y91,PSS2_X32Y313,PS_MIO14_500
D24,500,IOPAD_X1Y86,PSS2_X32Y313,PS_MIO9_500
D25,500,IOPAD_X1Y80,PSS2_X32Y313,PS_MIO3_500
D26,500,IOPAD_X1Y78,PSS2_X32Y313,PS_MIO1_500
E1,33,IOB_X1Y239,RIOB18_X107Y239,IO_L5N_T0_33
E2,33,IOB_X1Y240,RIOB18_X107Y239,IO_L5P_T0_33
E3,33,IOB_X1Y237,RIOB18_X107Y237,IO_L6N_T0_VREF_33
E5,34,IOB_X1Y285,RIOB18_X107Y285,IO_L7N_T1_34
E6,34,IOB_X1Y280,RIOB18_X107Y279,IO_L10P_T1_34
E7,34,IOB_X1Y277,RIOB18_X107Y277,IO_L11N_T1_SRCC_34
E8,34,IOB_X1Y281,RIOB18_X107Y281,IO_L9N_T1_DQS_34
E10,35,IOB_X1Y346,RIOB18_X107Y345,IO_L2P_T0_AD8P_35
E11,35,IOB_X1Y342,RIOB18_X107Y341,IO_L4P_T0_35
E12,35,IOB_X1Y347,RIOB18_X107Y347,IO_L1N_T0_AD0N_35
E13,35,IOB_X1Y337,RIOB18_X107Y337,IO_L6N_T0_VREF_35
E15,35,IOB_X1Y321,RIOB18_X107Y321,IO_L14N_T2_AD4N_SRCC_35
E16,35,IOB_X1Y318,RIOB18_X107Y317,IO_L16P_T2_35
E17,501,IOPAD_X1Y123,PSS2_X32Y313,PS_MIO46_501
E18,501,IOPAD_X1Y121,PSS2_X32Y313,PS_MIO44_501
E20,501,IOPAD_X1Y106,PSS2_X32Y313,PS_MIO29_501
E21,501,IOPAD_X1Y108,PSS2_X32Y313,PS_MIO31_501
E22,501,IOPAD_X1Y110,PSS2_X32Y313,PS_MIO33_501
E23,500,IOPAD_X1Y84,PSS2_X32Y313,PS_MIO7_500
E25,500,IOPAD_X1Y79,PSS2_X32Y313,PS_MIO2_500
E26,500,IOPAD_X1Y77,PSS2_X32Y313,PS_MIO0_500
F2,33,IOB_X1Y243,RIOB18_X107Y243,IO_L3N_T0_DQS_33
F3,33,IOB_X1Y238,RIOB18_X107Y237,IO_L6P_T0_33
F4,33,IOB_X1Y247,RIOB18_X107Y247,IO_L1N_T0_33
F5,34,IOB_X1Y286,RIOB18_X107Y285,IO_L7P_T1_34
F7,34,IOB_X1Y275,RIOB18_X107Y275,IO_L12N_T1_MRCC_34
F8,34,IOB_X1Y278,RIOB18_X107Y277,IO_L11P_T1_SRCC_34
F9,34,IOB_X1Y282,RIOB18_X107Y281,IO_L9P_T1_DQS_34
F10,35,IOB_X1Y343,RIOB18_X107Y343,IO_L3N_T0_DQS_AD1N_35
F12,35,IOB_X1Y348,RIOB18_X107Y347,IO_L1P_T0_AD0P_35
F13,35,IOB_X1Y338,RIOB18_X107Y337,IO_L6P_T0_35
F14,35,IOB_X1Y327,RIOB18_X107Y327,IO_L11N_T1_SRCC_35
F15,35,IOB_X1Y322,RIOB18_X107Y321,IO_L14P_T2_AD4P_SRCC_35
F17,501,IOPAD_X1Y119,PSS2_X32Y313,PS_MIO42_501
F18,501,IOPAD_X1Y104,PSS2_X32Y313,PS_MIO27_501
F19,501,IOPAD_X1Y102,PSS2_X32Y313,PS_MIO25_501
F20,501,IOPAD_X1Y100,PSS2_X32Y313,PS_MIO23_501
F22,501,IOPAD_X1Y98,PSS2_X32Y313,PS_MIO21_501
F23,500,IOPAD_X1Y83,PSS2_X32Y313,PS_MIO6_500
F24,500,IOPAD_X1Y81,PSS2_X32Y313,PS_MIO4_500
F25,502,IOPAD_X1Y33,PSS2_X32Y313,PS_DDR_DQ1_502
G1,33,IOB_X1Y229,RIOB18_X107Y229,IO_L10N_T1_33
G2,33,IOB_X1Y244,RIOB18_X107Y243,IO_L3P_T0_DQS_33
G4,33,IOB_X1Y248,RIOB18_X107Y247,IO_L1P_T0_33
G5,34,IOB_X1Y295,RIOB18_X107Y295,IO_L2N_T0_34
G6,34,IOB_X1Y296,RIOB18_X107Y295,IO_L2P_T0_34
G7,34,IOB_X1Y276,RIOB18_X107Y275,IO_L12P_T1_MRCC_34
G9,34,IOB_X1Y293,RIOB18_X107Y293,IO_L3N_T0_DQS_34
G10,35,IOB_X1Y344,RIOB18_X107Y343,IO_L3P_T0_DQS_AD1P_35
G11,35,IOB_X1Y339,RIOB18_X107Y339,IO_L5N_T0_AD9N_35
G12,35,IOB_X1Y340,RIOB18_X107Y339,IO_L5P_T0_AD9P_35
G14,35,IOB_X1Y328,RIOB18_X107Y327,IO_L11P_T1_SRCC_35
G15,35,IOB_X1Y329,RIOB18_X107Y329,IO_L10N_T1_AD11N_35
G16,35,IOB_X1Y330,RIOB18_X107Y329,IO_L10P_T1_AD11P_35
G17,501,IOPAD_X1Y94,PSS2_X32Y313,PS_MIO17_501
G19,501,IOPAD_X1Y96,PSS2_X32Y313,PS_MIO19_501
G20,501,IOPAD_X1Y95,PSS2_X32Y313,PS_MIO18_501
G21,501,IOPAD_X1Y93,PSS2_X32Y313,PS_MIO16_501
G22,501,IOPAD_X1Y99,PSS2_X32Y313,PS_MIO22_501
G24,502,IOPAD_X1Y28,PSS2_X32Y313,PS_DDR_DM0_502
G25,502,IOPAD_X1Y64,PSS2_X32Y313,PS_DDR_DQS_N0_502
G26,502,IOPAD_X1Y35,PSS2_X32Y313,PS_DDR_DQ3_502
H1,33,IOB_X1Y235,RIOB18_X107Y235,IO_L7N_T1_33
H2,33,IOB_X1Y230,RIOB18_X107Y229,IO_L10P_T1_33
H3,33,IOB_X1Y233,RIOB18_X107Y233,IO_L8N_T1_33
H4,33,IOB_X1Y234,RIOB18_X107Y233,IO_L8P_T1_33
H6,34,IOB_X1Y291,RIOB18_X107Y291,IO_L4N_T0_34
H7,34,IOB_X1Y292,RIOB18_X107Y291,IO_L4P_T0_34
H8,34,IOB_X1Y287,RIOB18_X107Y287,IO_L6N_T0_VREF_34
H9,34,IOB_X1Y294,RIOB18_X107Y293,IO_L3P_T0_DQS_PUDC_B_34
H11,34,IOB_X1Y297,RIOB18_X107Y297,IO_L1N_T0_34
H12,35,IOB_X1Y335,RIOB18_X107Y335,IO_L7N_T1_AD2N_35
H13,35,IOB_X1Y336,RIOB18_X107Y335,IO_L7P_T1_AD2P_35
H14,35,IOB_X1Y325,RIOB18_X107Y325,IO_L12N_T1_MRCC_35
H16,35,IOB_X1Y349,RIOB18_SING_X107Y349,IO_0_VRN_35
H17,501,IOPAD_X1Y103,PSS2_X32Y313,PS_MIO26_501
H19,501,IOPAD_X1Y97,PSS2_X32Y313,PS_MIO20_501
H21,502,IOPAD_X1Y15,PSS2_X32Y313,PS_DDR_A11_502
H22,502,IOPAD_X1Y72,PSS2_X32Y313,PS_DDR_DRST_B_502
H23,502,IOPAD_X1Y37,PSS2_X32Y313,PS_DDR_DQ5_502
H24,502,IOPAD_X1Y68,PSS2_X32Y313,PS_DDR_DQS_P0_502
H26,502,IOPAD_X1Y36,PSS2_X32Y313,PS_DDR_DQ4_502
J1,33,IOB_X1Y236,RIOB18_X107Y235,IO_L7P_T1_33
J3,33,IOB_X1Y225,RIOB18_X107Y225,IO_L12N_T1_MRCC_33
J4,33,IOB_X1Y226,RIOB18_X107Y225,IO_L12P_T1_MRCC_33
J5,33,IOB_X1Y209,RIOB18_X107Y209,IO_L20N_T3_33
J6,33,IOB_X1Y205,RIOB18_X107Y205,IO_L22N_T3_33
J8,34,IOB_X1Y288,RIOB18_X107Y287,IO_L6P_T0_34
J9,34,IOB_X1Y289,RIOB18_X107Y289,IO_L5N_T0_34
J10,34,IOB_X1Y290,RIOB18_X107Y289,IO_L5P_T0_34
J11,34,IOB_X1Y298,RIOB18_X107Y297,IO_L1P_T0_34
J13,35,IOB_X1Y333,RIOB18_X107Y333,IO_L8N_T1_AD10N_35
J14,35,IOB_X1Y326,RIOB18_X107Y325,IO_L12P_T1_MRCC_35
J15,35,IOB_X1Y331,RIOB18_X107Y331,IO_L9N_T1_DQS_AD3N_35
J16,501,IOPAD_X1Y111,PSS2_X32Y313,PS_MIO34_501
J18,501,IOPAD_X1Y105,PSS2_X32Y313,PS_MIO28_501
J19,501,IOPAD_X1Y101,PSS2_X32Y313,PS_MIO24_501
J20,502,IOPAD_X1Y18,PSS2_X32Y313,PS_DDR_A13_502
J21,502,IOPAD_X1Y11,PSS2_X32Y313,PS_DDR_A7_502
J23,502,IOPAD_X1Y39,PSS2_X32Y313,PS_DDR_DQ7_502
J24,502,IOPAD_X1Y38,PSS2_X32Y313,PS_DDR_DQ6_502
J25,502,IOPAD_X1Y34,PSS2_X32Y313,PS_DDR_DQ2_502
J26,502,IOPAD_X1Y32,PSS2_X32Y313,PS_DDR_DQ0_502
K1,33,IOB_X1Y231,RIOB18_X107Y231,IO_L9N_T1_DQS_33
K2,33,IOB_X1Y232,RIOB18_X107Y231,IO_L9P_T1_DQS_33
K3,33,IOB_X1Y227,RIOB18_X107Y227,IO_L11N_T1_SRCC_33
K5,33,IOB_X1Y210,RIOB18_X107Y209,IO_L20P_T3_33
K6,33,IOB_X1Y206,RIOB18_X107Y205,IO_L22P_T3_33
K7,33,IOB_X1Y201,RIOB18_X107Y201,IO_L24N_T3_33
K8,33,IOB_X1Y202,RIOB18_X107Y201,IO_L24P_T3_33
K10,34,IOB_X1Y250,RIOB18_SING_X107Y250,IO_25_VRP_34
K11,34,IOB_X1Y299,RIOB18_SING_X107Y299,IO_0_VRN_34
K12,35,IOB_X1Y300,RIOB18_SING_X107Y300,IO_25_VRP_35
K13,35,IOB_X1Y334,RIOB18_X107Y333,IO_L8P_T1_AD10P_35
K15,35,IOB_X1Y332,RIOB18_X107Y331,IO_L9P_T1_DQS_AD3P_35
K16,501,IOPAD_X1Y113,PSS2_X32Y313,PS_MIO36_501
K17,501,IOPAD_X1Y109,PSS2_X32Y313,PS_MIO32_501
K19,501,IOPAD_X1Y107,PSS2_X32Y313,PS_MIO30_501
K20,502,IOPAD_X1Y5,PSS2_X32Y313,PS_DDR_A1_502
K22,502,IOPAD_X1Y4,PSS2_X32Y313,PS_DDR_A0_502
K23,502,IOPAD_X1Y43,PSS2_X32Y313,PS_DDR_DQ11_502
K25,502,IOPAD_X1Y29,PSS2_X32Y313,PS_DDR_DM1_502
K26,502,IOPAD_X1Y40,PSS2_X32Y313,PS_DDR_DQ8_502
L2,33,IOB_X1Y217,RIOB18_X107Y217,IO_L16N_T2_33
L3,33,IOB_X1Y228,RIOB18_X107Y227,IO_L11P_T1_SRCC_33
L4,33,IOB_X1Y221,RIOB18_X107Y221,IO_L14N_T2_SRCC_33
L5,33,IOB_X1Y222,RIOB18_X107Y221,IO_L14P_T2_SRCC_33
L7,33,IOB_X1Y211,RIOB18_X107Y211,IO_L19N_T3_VREF_33
L8,33,IOB_X1Y207,RIOB18_X107Y207,IO_L21N_T3_DQS_33
L9,33,IOB_X1Y249,RIOB18_SING_X107Y249,IO_0_VRN_33
L20,502,IOPAD_X1Y10,PSS2_X32Y313,PS_DDR_A6_502
L22,502,IOPAD_X1Y7,PSS2_X32Y313,PS_DDR_A3_502
L23,502,IOPAD_X1Y41,PSS2_X32Y313,PS_DDR_DQ9_502
L24,502,IOPAD_X1Y69,PSS2_X32Y313,PS_DDR_DQS_P1_502
L25,502,IOPAD_X1Y65,PSS2_X32Y313,PS_DDR_DQS_N1_502
M1,33,IOB_X1Y213,RIOB18_X107Y213,IO_L18N_T2_33
M2,33,IOB_X1Y218,RIOB18_X107Y217,IO_L16P_T2_33
M4,33,IOB_X1Y215,RIOB18_X107Y215,IO_L17N_T2_33
M5,33,IOB_X1Y223,RIOB18_X107Y223,IO_L13N_T2_MRCC_33
M6,33,IOB_X1Y224,RIOB18_X107Y223,IO_L13P_T2_MRCC_33
M7,33,IOB_X1Y212,RIOB18_X107Y211,IO_L19P_T3_33
M8,33,IOB_X1Y208,RIOB18_X107Y207,IO_L21P_T3_DQS_33
M20,502,IOPAD_X1Y8,PSS2_X32Y313,PS_DDR_A4_502
M22,502,IOPAD_X1Y14,PSS2_X32Y313,PS_DDR_A10_502
M24,502,IOPAD_X1Y46,PSS2_X32Y313,PS_DDR_DQ14_502
M25,502,IOPAD_X1Y44,PSS2_X32Y313,PS_DDR_DQ12_502
M26,502,IOPAD_X1Y42,PSS2_X32Y313,PS_DDR_DQ10_502
N1,33,IOB_X1Y214,RIOB18_X107Y213,IO_L18P_T2_33
N2,33,IOB_X1Y219,RIOB18_X107Y219,IO_L15N_T2_DQS_33
N3,33,IOB_X1Y220,RIOB18_X107Y219,IO_L15P_T2_DQS_33
N4,33,IOB_X1Y216,RIOB18_X107Y215,IO_L17P_T2_33
N6,33,IOB_X1Y203,RIOB18_X107Y203,IO_L23N_T3_33
N7,33,IOB_X1Y204,RIOB18_X107Y203,IO_L23P_T3_33
N8,33,IOB_X1Y200,RIOB18_SING_X107Y200,IO_25_VRP_33
N14,0,IPAD_X0Y120,MONITOR_BOT_PELE1_X197Y339,VP_0
N21,502,IOPAD_X1Y6,PSS2_X32Y313,PS_DDR_A2_502
N22,502,IOPAD_X1Y9,PSS2_X32Y313,PS_DDR_A5_502
N23,502,IOPAD_X1Y47,PSS2_X32Y313,PS_DDR_DQ15_502
N24,502,IOPAD_X1Y45,PSS2_X32Y313,PS_DDR_DQ13_502
N26,502,IOPAD_X1Y50,PSS2_X32Y313,PS_DDR_DQ18_502
P13,0,IPAD_X0Y121,MONITOR_BOT_PELE1_X197Y339,VN_0
P20,502,IOPAD_X1Y16,PSS2_X32Y313,PS_DDR_A12_502
P21,502,IOPAD_X1Y24,PSS2_X32Y313,PS_DDR_CKN_502
P23,502,IOPAD_X1Y51,PSS2_X32Y313,PS_DDR_DQ19_502
P24,502,IOPAD_X1Y49,PSS2_X32Y313,PS_DDR_DQ17_502
P25,502,IOPAD_X1Y70,PSS2_X32Y313,PS_DDR_DQS_P2_502
P26,502,IOPAD_X1Y30,PSS2_X32Y313,PS_DDR_DM2_502
R1,112,OPAD_X0Y30,GTX_CHANNEL_3_X249Y202,MGTXTXN3_112
R2,112,OPAD_X0Y31,GTX_CHANNEL_3_X249Y202,MGTXTXP3_112
R5,112,IPAD_X1Y99,GTX_COMMON_X249Y179,MGTREFCLK0N_112
R6,112,IPAD_X1Y98,GTX_COMMON_X249Y179,MGTREFCLK0P_112
R20,502,IOPAD_X1Y17,PSS2_X32Y313,PS_DDR_A14_502
R21,502,IOPAD_X1Y25,PSS2_X32Y313,PS_DDR_CKP_502
R22,502,IOPAD_X1Y21,PSS2_X32Y313,PS_DDR_BA2_502
R23,502,IOPAD_X1Y55,PSS2_X32Y313,PS_DDR_DQ23_502
R25,502,IOPAD_X1Y66,PSS2_X32Y313,PS_DDR_DQS_N2_502
R26,502,IOPAD_X1Y48,PSS2_X32Y313,PS_DDR_DQ16_502
T3,112,IPAD_X1Y114,GTX_CHANNEL_3_X249Y202,MGTXRXN3_112
T4,112,IPAD_X1Y115,GTX_CHANNEL_3_X249Y202,MGTXRXP3_112
T20,502,IOPAD_X1Y12,PSS2_X32Y313,PS_DDR_A8_502
T22,502,IOPAD_X1Y20,PSS2_X32Y313,PS_DDR_BA1_502
T23,502,IOPAD_X1Y54,PSS2_X32Y313,PS_DDR_DQ22_502
T24,502,IOPAD_X1Y52,PSS2_X32Y313,PS_DDR_DQ20_502
T25,502,IOPAD_X1Y53,PSS2_X32Y313,PS_DDR_DQ21_502
U1,112,OPAD_X0Y28,GTX_CHANNEL_2_X249Y191,MGTXTXN2_112
U2,112,OPAD_X0Y29,GTX_CHANNEL_2_X249Y191,MGTXTXP2_112
U5,112,IPAD_X1Y101,GTX_COMMON_X249Y179,MGTREFCLK1N_112
U6,112,IPAD_X1Y100,GTX_COMMON_X249Y179,MGTREFCLK1P_112
U20,502,IOPAD_X1Y13,PSS2_X32Y313,PS_DDR_A9_502
U21,502,IOPAD_X1Y23,PSS2_X32Y313,PS_DDR_CKE_502
U22,502,IOPAD_X1Y19,PSS2_X32Y313,PS_DDR_BA0_502
U24,502,IOPAD_X1Y58,PSS2_X32Y313,PS_DDR_DQ26_502
U25,502,IOPAD_X1Y59,PSS2_X32Y313,PS_DDR_DQ27_502
U26,502,IOPAD_X1Y57,PSS2_X32Y313,PS_DDR_DQ25_502
V3,112,IPAD_X1Y108,GTX_CHANNEL_2_X249Y191,MGTXRXN2_112
V4,112,IPAD_X1Y109,GTX_CHANNEL_2_X249Y191,MGTXRXP2_112
V18,13,IOB_X0Y200,LIOB33_SING_X0Y200,IO_25_13
V19,13,IOB_X0Y249,LIOB33_SING_X0Y249,IO_0_13
V21,502,IOPAD_X1Y2,PSS2_X32Y313,PS_DDR_VRN_502
V22,502,IOPAD_X1Y1,PSS2_X32Y313,PS_DDR_WE_B_502
V23,502,IOPAD_X1Y133,PSS2_X32Y313,PS_DDR_RAS_B_502
V24,502,IOPAD_X1Y56,PSS2_X32Y313,PS_DDR_DQ24_502
V26,502,IOPAD_X1Y31,PSS2_X32Y313,PS_DDR_DM3_502
W1,112,OPAD_X0Y26,GTX_CHANNEL_1_X249Y173,MGTXTXN1_112
W2,112,OPAD_X0Y27,GTX_CHANNEL_1_X249Y173,MGTXTXP1_112
W5,111,IPAD_X1Y69,GTX_COMMON_X249Y127,MGTREFCLK0N_111
W6,111,IPAD_X1Y68,GTX_COMMON_X249Y127,MGTREFCLK0P_111
W13,12,IOB_X0Y190,LIOB33_X0Y189,IO_L5P_T0_12
W14,12,IOB_X0Y199,LIOB33_SING_X0Y199,IO_0_12
W15,12,IOB_X0Y151,LIOB33_X0Y151,IO_L24N_T3_12
W16,12,IOB_X0Y152,LIOB33_X0Y151,IO_L24P_T3_12
W17,12,IOB_X0Y150,LIOB33_SING_X0Y150,IO_25_12
W18,13,IOB_X0Y204,LIOB33_X0Y203,IO_L23P_T3_13
W19,13,IOB_X0Y203,LIOB33_X0Y203,IO_L23N_T3_13
W20,13,IOB_X0Y212,LIOB33_X0Y211,IO_L19P_T3_13
W21,502,IOPAD_X1Y3,PSS2_X32Y313,PS_DDR_VRP_502
W23,502,IOPAD_X1Y63,PSS2_X32Y313,PS_DDR_DQ31_502
W24,502,IOPAD_X1Y71,PSS2_X32Y313,PS_DDR_DQS_P3_502
W25,502,IOPAD_X1Y67,PSS2_X32Y313,PS_DDR_DQS_N3_502
W26,502,IOPAD_X1Y60,PSS2_X32Y313,PS_DDR_DQ28_502
Y3,112,IPAD_X1Y96,GTX_CHANNEL_1_X249Y173,MGTXRXN1_112
Y4,112,IPAD_X1Y97,GTX_CHANNEL_1_X249Y173,MGTXRXP1_112
Y10,12,IOB_X0Y194,LIOB33_X0Y193,IO_L3P_T0_DQS_12
Y11,12,IOB_X0Y197,LIOB33_X0Y197,IO_L1N_T0_12
Y12,12,IOB_X0Y198,LIOB33_X0Y197,IO_L1P_T0_12
Y13,12,IOB_X0Y189,LIOB33_X0Y189,IO_L5N_T0_12
Y15,12,IOB_X0Y153,LIOB33_X0Y153,IO_L23N_T3_12
Y16,12,IOB_X0Y154,LIOB33_X0Y153,IO_L23P_T3_12
Y17,12,IOB_X0Y162,LIOB33_X0Y161,IO_L19P_T3_12
Y18,13,IOB_X0Y202,LIOB33_X0Y201,IO_L24P_T3_13
Y20,13,IOB_X0Y211,LIOB33_X0Y211,IO_L19N_T3_VREF_13
Y21,502,IOPAD_X1Y27,PSS2_X32Y313,PS_DDR_CS_B_502
Y22,502,IOPAD_X1Y131,PSS2_X32Y313,PS_DDR_ODT_502
Y23,502,IOPAD_X1Y22,PSS2_X32Y313,PS_DDR_CAS_B_502
Y25,502,IOPAD_X1Y61,PSS2_X32Y313,PS_DDR_DQ29_502
Y26,502,IOPAD_X1Y62,PSS2_X32Y313,PS_DDR_DQ30_502
1 pin bank site tile pin_function
2 A2 34 IOB_X1Y251 RIOB18_X107Y251 IO_L24N_T3_34
3 A3 34 IOB_X1Y255 RIOB18_X107Y255 IO_L22N_T3_34
4 A4 34 IOB_X1Y256 RIOB18_X107Y255 IO_L22P_T3_34
5 A5 34 IOB_X1Y257 RIOB18_X107Y257 IO_L21N_T3_DQS_34
6 A7 34 IOB_X1Y263 RIOB18_X107Y263 IO_L18N_T2_34
7 A8 34 IOB_X1Y265 RIOB18_X107Y265 IO_L17N_T2_34
8 A9 34 IOB_X1Y266 RIOB18_X107Y265 IO_L17P_T2_34
9 A10 34 IOB_X1Y267 RIOB18_X107Y267 IO_L16N_T2_34
10 A12 35 IOB_X1Y301 RIOB18_X107Y301 IO_L24N_T3_AD15N_35
11 A13 35 IOB_X1Y302 RIOB18_X107Y301 IO_L24P_T3_AD15P_35
12 A14 35 IOB_X1Y307 RIOB18_X107Y307 IO_L21N_T3_DQS_AD14N_35
13 A15 35 IOB_X1Y308 RIOB18_X107Y307 IO_L21P_T3_DQS_AD14P_35
14 A17 35 IOB_X1Y313 RIOB18_X107Y313 IO_L18N_T2_AD13N_35
15 A18 501 IOPAD_X1Y126 PSS2_X32Y313 PS_MIO49_501
16 A19 501 IOPAD_X1Y130 PSS2_X32Y313 PS_MIO53_501
17 A20 501 IOPAD_X1Y129 PSS2_X32Y313 PS_MIO52_501
18 A22 501 IOPAD_X1Y134 PSS2_X32Y313 PS_SRST_B_501
19 A23 500 IOPAD_X1Y89 PSS2_X32Y313 PS_MIO12_500
20 A24 500 IOPAD_X1Y85 PSS2_X32Y313 PS_MIO8_500
21 A25 500 IOPAD_X1Y87 PSS2_X32Y313 PS_MIO10_500
22 AA1 112 OPAD_X0Y24 GTX_CHANNEL_0_X249Y162 MGTXTXN0_112
23 AA2 112 OPAD_X0Y25 GTX_CHANNEL_0_X249Y162 MGTXTXP0_112
24 AA5 111 IPAD_X1Y71 GTX_COMMON_X249Y127 MGTREFCLK1N_111
25 AA6 111 IPAD_X1Y70 GTX_COMMON_X249Y127 MGTREFCLK1P_111
26 AA10 12 IOB_X0Y193 LIOB33_X0Y193 IO_L3N_T0_DQS_12
27 AA12 12 IOB_X0Y187 LIOB33_X0Y187 IO_L6N_T0_VREF_12
28 AA13 12 IOB_X0Y188 LIOB33_X0Y187 IO_L6P_T0_12
29 AA14 12 IOB_X0Y155 LIOB33_X0Y155 IO_L22N_T3_12
30 AA15 12 IOB_X0Y156 LIOB33_X0Y155 IO_L22P_T3_12
31 AA17 12 IOB_X0Y161 LIOB33_X0Y161 IO_L19N_T3_VREF_12
32 AA18 13 IOB_X0Y201 LIOB33_X0Y201 IO_L24N_T3_13
33 AA19 13 IOB_X0Y206 LIOB33_X0Y205 IO_L22P_T3_13
34 AA20 13 IOB_X0Y210 LIOB33_X0Y209 IO_L20P_T3_13
35 AA22 13 IOB_X0Y230 LIOB33_X0Y229 IO_L10P_T1_13
36 AA23 13 IOB_X0Y229 LIOB33_X0Y229 IO_L10N_T1_13
37 AA24 13 IOB_X0Y238 LIOB33_X0Y237 IO_L6P_T0_13
38 AA25 13 IOB_X0Y248 LIOB33_X0Y247 IO_L1P_T0_13
39 AB3 112 IPAD_X1Y90 GTX_CHANNEL_0_X249Y162 MGTXRXN0_112
40 AB4 112 IPAD_X1Y91 GTX_CHANNEL_0_X249Y162 MGTXRXP0_112
41 AB10 12 IOB_X0Y191 LIOB33_X0Y191 IO_L4N_T0_12
42 AB11 12 IOB_X0Y192 LIOB33_X0Y191 IO_L4P_T0_12
43 AB12 12 IOB_X0Y196 LIOB33_X0Y195 IO_L2P_T0_12
44 AB14 12 IOB_X0Y171 LIOB33_X0Y171 IO_L14N_T2_SRCC_12
45 AB15 12 IOB_X0Y172 LIOB33_X0Y171 IO_L14P_T2_SRCC_12
46 AB16 12 IOB_X0Y159 LIOB33_X0Y159 IO_L20N_T3_12
47 AB17 12 IOB_X0Y160 LIOB33_X0Y159 IO_L20P_T3_12
48 AB19 13 IOB_X0Y205 LIOB33_X0Y205 IO_L22N_T3_13
49 AB20 13 IOB_X0Y209 LIOB33_X0Y209 IO_L20N_T3_13
50 AB21 13 IOB_X0Y232 LIOB33_X0Y231 IO_L9P_T1_DQS_13
51 AB22 13 IOB_X0Y231 LIOB33_X0Y231 IO_L9N_T1_DQS_13
52 AB24 13 IOB_X0Y237 LIOB33_X0Y237 IO_L6N_T0_VREF_13
53 AB25 13 IOB_X0Y247 LIOB33_X0Y247 IO_L1N_T0_13
54 AB26 13 IOB_X0Y246 LIOB33_X0Y245 IO_L2P_T0_13
55 AC1 111 OPAD_X0Y22 GTX_CHANNEL_3_X249Y150 MGTXTXN3_111
56 AC2 111 OPAD_X0Y23 GTX_CHANNEL_3_X249Y150 MGTXTXP3_111
57 AC5 111 IPAD_X1Y78 GTX_CHANNEL_2_X249Y139 MGTXRXN2_111
58 AC6 111 IPAD_X1Y79 GTX_CHANNEL_2_X249Y139 MGTXRXP2_111
59 AC11 12 IOB_X0Y195 LIOB33_X0Y195 IO_L2N_T0_12
60 AC12 12 IOB_X0Y178 LIOB33_X0Y177 IO_L11P_T1_SRCC_12
61 AC13 12 IOB_X0Y176 LIOB33_X0Y175 IO_L12P_T1_MRCC_12
62 AC14 12 IOB_X0Y174 LIOB33_X0Y173 IO_L13P_T2_MRCC_12
63 AC16 12 IOB_X0Y157 LIOB33_X0Y157 IO_L21N_T3_DQS_12
64 AC17 12 IOB_X0Y158 LIOB33_X0Y157 IO_L21P_T3_DQS_12
65 AC18 13 IOB_X0Y208 LIOB33_X0Y207 IO_L21P_T3_DQS_13
66 AC19 13 IOB_X0Y207 LIOB33_X0Y207 IO_L21N_T3_DQS_13
67 AC21 13 IOB_X0Y222 LIOB33_X0Y221 IO_L14P_T2_SRCC_13
68 AC22 13 IOB_X0Y221 LIOB33_X0Y221 IO_L14N_T2_SRCC_13
69 AC23 13 IOB_X0Y226 LIOB33_X0Y225 IO_L12P_T1_MRCC_13
70 AC24 13 IOB_X0Y225 LIOB33_X0Y225 IO_L12N_T1_MRCC_13
71 AC26 13 IOB_X0Y245 LIOB33_X0Y245 IO_L2N_T0_13
72 AD3 111 IPAD_X1Y84 GTX_CHANNEL_3_X249Y150 MGTXRXN3_111
73 AD4 111 IPAD_X1Y85 GTX_CHANNEL_3_X249Y150 MGTXRXP3_111
74 AD7 111 IPAD_X1Y60 GTX_CHANNEL_0_X249Y110 MGTXRXN0_111
75 AD8 111 IPAD_X1Y61 GTX_CHANNEL_0_X249Y110 MGTXRXP0_111
76 AD10 12 IOB_X0Y185 LIOB33_X0Y185 IO_L7N_T1_12
77 AD11 12 IOB_X0Y177 LIOB33_X0Y177 IO_L11N_T1_SRCC_12
78 AD13 12 IOB_X0Y175 LIOB33_X0Y175 IO_L12N_T1_MRCC_12
79 AD14 12 IOB_X0Y173 LIOB33_X0Y173 IO_L13N_T2_MRCC_12
80 AD15 12 IOB_X0Y169 LIOB33_X0Y169 IO_L15N_T2_DQS_12
81 AD16 12 IOB_X0Y170 LIOB33_X0Y169 IO_L15P_T2_DQS_12
82 AD18 13 IOB_X0Y216 LIOB33_X0Y215 IO_L17P_T2_13
83 AD19 13 IOB_X0Y215 LIOB33_X0Y215 IO_L17N_T2_13
84 AD20 13 IOB_X0Y224 LIOB33_X0Y223 IO_L13P_T2_MRCC_13
85 AD21 13 IOB_X0Y223 LIOB33_X0Y223 IO_L13N_T2_MRCC_13
86 AD23 13 IOB_X0Y228 LIOB33_X0Y227 IO_L11P_T1_SRCC_13
87 AD24 13 IOB_X0Y227 LIOB33_X0Y227 IO_L11N_T1_SRCC_13
88 AD25 13 IOB_X0Y242 LIOB33_X0Y241 IO_L4P_T0_13
89 AD26 13 IOB_X0Y241 LIOB33_X0Y241 IO_L4N_T0_13
90 AE1 111 OPAD_X0Y20 GTX_CHANNEL_2_X249Y139 MGTXTXN2_111
91 AE2 111 OPAD_X0Y21 GTX_CHANNEL_2_X249Y139 MGTXTXP2_111
92 AE5 111 IPAD_X1Y66 GTX_CHANNEL_1_X249Y121 MGTXRXN1_111
93 AE6 111 IPAD_X1Y67 GTX_CHANNEL_1_X249Y121 MGTXRXP1_111
94 AE10 12 IOB_X0Y186 LIOB33_X0Y185 IO_L7P_T1_12
95 AE11 12 IOB_X0Y182 LIOB33_X0Y181 IO_L9P_T1_DQS_12
96 AE12 12 IOB_X0Y184 LIOB33_X0Y183 IO_L8P_T1_12
97 AE13 12 IOB_X0Y180 LIOB33_X0Y179 IO_L10P_T1_12
98 AE15 12 IOB_X0Y165 LIOB33_X0Y165 IO_L17N_T2_12
99 AE16 12 IOB_X0Y166 LIOB33_X0Y165 IO_L17P_T2_12
100 AE17 12 IOB_X0Y164 LIOB33_X0Y163 IO_L18P_T2_12
101 AE18 13 IOB_X0Y214 LIOB33_X0Y213 IO_L18P_T2_13
102 AE20 13 IOB_X0Y218 LIOB33_X0Y217 IO_L16P_T2_13
103 AE21 13 IOB_X0Y217 LIOB33_X0Y217 IO_L16N_T2_13
104 AE22 13 IOB_X0Y236 LIOB33_X0Y235 IO_L7P_T1_13
105 AE23 13 IOB_X0Y234 LIOB33_X0Y233 IO_L8P_T1_13
106 AE25 13 IOB_X0Y244 LIOB33_X0Y243 IO_L3P_T0_DQS_13
107 AE26 13 IOB_X0Y243 LIOB33_X0Y243 IO_L3N_T0_DQS_13
108 AF3 111 OPAD_X0Y18 GTX_CHANNEL_1_X249Y121 MGTXTXN1_111
109 AF4 111 OPAD_X0Y19 GTX_CHANNEL_1_X249Y121 MGTXTXP1_111
110 AF7 111 OPAD_X0Y16 GTX_CHANNEL_0_X249Y110 MGTXTXN0_111
111 AF8 111 OPAD_X0Y17 GTX_CHANNEL_0_X249Y110 MGTXTXP0_111
112 AF10 12 IOB_X0Y181 LIOB33_X0Y181 IO_L9N_T1_DQS_12
113 AF12 12 IOB_X0Y183 LIOB33_X0Y183 IO_L8N_T1_12
114 AF13 12 IOB_X0Y179 LIOB33_X0Y179 IO_L10N_T1_12
115 AF14 12 IOB_X0Y167 LIOB33_X0Y167 IO_L16N_T2_12
116 AF15 12 IOB_X0Y168 LIOB33_X0Y167 IO_L16P_T2_12
117 AF17 12 IOB_X0Y163 LIOB33_X0Y163 IO_L18N_T2_12
118 AF18 13 IOB_X0Y213 LIOB33_X0Y213 IO_L18N_T2_13
119 AF19 13 IOB_X0Y220 LIOB33_X0Y219 IO_L15P_T2_DQS_13
120 AF20 13 IOB_X0Y219 LIOB33_X0Y219 IO_L15N_T2_DQS_13
121 AF22 13 IOB_X0Y235 LIOB33_X0Y235 IO_L7N_T1_13
122 AF23 13 IOB_X0Y233 LIOB33_X0Y233 IO_L8N_T1_13
123 AF24 13 IOB_X0Y240 LIOB33_X0Y239 IO_L5P_T0_13
124 AF25 13 IOB_X0Y239 LIOB33_X0Y239 IO_L5N_T0_13
125 B1 34 IOB_X1Y253 RIOB18_X107Y253 IO_L23N_T3_34
126 B2 34 IOB_X1Y252 RIOB18_X107Y251 IO_L24P_T3_34
127 B4 34 IOB_X1Y259 RIOB18_X107Y259 IO_L20N_T3_34
128 B5 34 IOB_X1Y260 RIOB18_X107Y259 IO_L20P_T3_34
129 B6 34 IOB_X1Y258 RIOB18_X107Y257 IO_L21P_T3_DQS_34
130 B7 34 IOB_X1Y264 RIOB18_X107Y263 IO_L18P_T2_34
131 B9 34 IOB_X1Y269 RIOB18_X107Y269 IO_L15N_T2_DQS_34
132 B10 34 IOB_X1Y268 RIOB18_X107Y267 IO_L16P_T2_34
133 B11 35 IOB_X1Y303 RIOB18_X107Y303 IO_L23N_T3_35
134 B12 35 IOB_X1Y305 RIOB18_X107Y305 IO_L22N_T3_AD7N_35
135 B14 35 IOB_X1Y309 RIOB18_X107Y309 IO_L20N_T3_AD6N_35
136 B15 35 IOB_X1Y315 RIOB18_X107Y315 IO_L17N_T2_AD5N_35
137 B16 35 IOB_X1Y316 RIOB18_X107Y315 IO_L17P_T2_AD5P_35
138 B17 35 IOB_X1Y314 RIOB18_X107Y313 IO_L18P_T2_AD13P_35
139 B19 501 IOPAD_X1Y124 PSS2_X32Y313 PS_MIO47_501
140 B20 501 IOPAD_X1Y128 PSS2_X32Y313 PS_MIO51_501
141 B21 501 IOPAD_X1Y125 PSS2_X32Y313 PS_MIO48_501
142 B22 501 IOPAD_X1Y127 PSS2_X32Y313 PS_MIO50_501
143 B24 500 IOPAD_X1Y26 PSS2_X32Y313 PS_CLK_500
144 B25 500 IOPAD_X1Y90 PSS2_X32Y313 PS_MIO13_500
145 B26 500 IOPAD_X1Y88 PSS2_X32Y313 PS_MIO11_500
146 C1 33 IOB_X1Y241 RIOB18_X107Y241 IO_L4N_T0_33
147 C2 34 IOB_X1Y254 RIOB18_X107Y253 IO_L23P_T3_34
148 C3 34 IOB_X1Y261 RIOB18_X107Y261 IO_L19N_T3_VREF_34
149 C4 34 IOB_X1Y262 RIOB18_X107Y261 IO_L19P_T3_34
150 C6 34 IOB_X1Y271 RIOB18_X107Y271 IO_L14N_T2_SRCC_34
151 C7 34 IOB_X1Y273 RIOB18_X107Y273 IO_L13N_T2_MRCC_34
152 C8 34 IOB_X1Y274 RIOB18_X107Y273 IO_L13P_T2_MRCC_34
153 C9 34 IOB_X1Y270 RIOB18_X107Y269 IO_L15P_T2_DQS_34
154 C11 35 IOB_X1Y304 RIOB18_X107Y303 IO_L23P_T3_35
155 C12 35 IOB_X1Y306 RIOB18_X107Y305 IO_L22P_T3_AD7P_35
156 C13 35 IOB_X1Y311 RIOB18_X107Y311 IO_L19N_T3_VREF_35
157 C14 35 IOB_X1Y310 RIOB18_X107Y309 IO_L20P_T3_AD6P_35
158 C16 35 IOB_X1Y319 RIOB18_X107Y319 IO_L15N_T2_DQS_AD12N_35
159 C17 35 IOB_X1Y320 RIOB18_X107Y319 IO_L15P_T2_DQS_AD12P_35
160 C18 501 IOPAD_X1Y122 PSS2_X32Y313 PS_MIO45_501
161 C19 501 IOPAD_X1Y118 PSS2_X32Y313 PS_MIO41_501
162 C21 501 IOPAD_X1Y116 PSS2_X32Y313 PS_MIO39_501
163 C22 501 IOPAD_X1Y117 PSS2_X32Y313 PS_MIO40_501
164 C23 500 IOPAD_X1Y132 PSS2_X32Y313 PS_POR_B_500
165 C24 500 IOPAD_X1Y92 PSS2_X32Y313 PS_MIO15_500
166 C26 500 IOPAD_X1Y82 PSS2_X32Y313 PS_MIO5_500
167 D1 33 IOB_X1Y242 RIOB18_X107Y241 IO_L4P_T0_33
168 D3 33 IOB_X1Y245 RIOB18_X107Y245 IO_L2N_T0_33
169 D4 33 IOB_X1Y246 RIOB18_X107Y245 IO_L2P_T0_33
170 D5 34 IOB_X1Y279 RIOB18_X107Y279 IO_L10N_T1_34
171 D6 34 IOB_X1Y272 RIOB18_X107Y271 IO_L14P_T2_SRCC_34
172 D8 34 IOB_X1Y283 RIOB18_X107Y283 IO_L8N_T1_34
173 D9 34 IOB_X1Y284 RIOB18_X107Y283 IO_L8P_T1_34
174 D10 35 IOB_X1Y345 RIOB18_X107Y345 IO_L2N_T0_AD8N_35
175 D11 35 IOB_X1Y341 RIOB18_X107Y341 IO_L4N_T0_35
176 D13 35 IOB_X1Y312 RIOB18_X107Y311 IO_L19P_T3_35
177 D14 35 IOB_X1Y323 RIOB18_X107Y323 IO_L13N_T2_MRCC_35
178 D15 35 IOB_X1Y324 RIOB18_X107Y323 IO_L13P_T2_MRCC_35
179 D16 35 IOB_X1Y317 RIOB18_X107Y317 IO_L16N_T2_35
180 D18 501 IOPAD_X1Y120 PSS2_X32Y313 PS_MIO43_501
181 D19 501 IOPAD_X1Y112 PSS2_X32Y313 PS_MIO35_501
182 D20 501 IOPAD_X1Y114 PSS2_X32Y313 PS_MIO37_501
183 D21 501 IOPAD_X1Y115 PSS2_X32Y313 PS_MIO38_501
184 D23 500 IOPAD_X1Y91 PSS2_X32Y313 PS_MIO14_500
185 D24 500 IOPAD_X1Y86 PSS2_X32Y313 PS_MIO9_500
186 D25 500 IOPAD_X1Y80 PSS2_X32Y313 PS_MIO3_500
187 D26 500 IOPAD_X1Y78 PSS2_X32Y313 PS_MIO1_500
188 E1 33 IOB_X1Y239 RIOB18_X107Y239 IO_L5N_T0_33
189 E2 33 IOB_X1Y240 RIOB18_X107Y239 IO_L5P_T0_33
190 E3 33 IOB_X1Y237 RIOB18_X107Y237 IO_L6N_T0_VREF_33
191 E5 34 IOB_X1Y285 RIOB18_X107Y285 IO_L7N_T1_34
192 E6 34 IOB_X1Y280 RIOB18_X107Y279 IO_L10P_T1_34
193 E7 34 IOB_X1Y277 RIOB18_X107Y277 IO_L11N_T1_SRCC_34
194 E8 34 IOB_X1Y281 RIOB18_X107Y281 IO_L9N_T1_DQS_34
195 E10 35 IOB_X1Y346 RIOB18_X107Y345 IO_L2P_T0_AD8P_35
196 E11 35 IOB_X1Y342 RIOB18_X107Y341 IO_L4P_T0_35
197 E12 35 IOB_X1Y347 RIOB18_X107Y347 IO_L1N_T0_AD0N_35
198 E13 35 IOB_X1Y337 RIOB18_X107Y337 IO_L6N_T0_VREF_35
199 E15 35 IOB_X1Y321 RIOB18_X107Y321 IO_L14N_T2_AD4N_SRCC_35
200 E16 35 IOB_X1Y318 RIOB18_X107Y317 IO_L16P_T2_35
201 E17 501 IOPAD_X1Y123 PSS2_X32Y313 PS_MIO46_501
202 E18 501 IOPAD_X1Y121 PSS2_X32Y313 PS_MIO44_501
203 E20 501 IOPAD_X1Y106 PSS2_X32Y313 PS_MIO29_501
204 E21 501 IOPAD_X1Y108 PSS2_X32Y313 PS_MIO31_501
205 E22 501 IOPAD_X1Y110 PSS2_X32Y313 PS_MIO33_501
206 E23 500 IOPAD_X1Y84 PSS2_X32Y313 PS_MIO7_500
207 E25 500 IOPAD_X1Y79 PSS2_X32Y313 PS_MIO2_500
208 E26 500 IOPAD_X1Y77 PSS2_X32Y313 PS_MIO0_500
209 F2 33 IOB_X1Y243 RIOB18_X107Y243 IO_L3N_T0_DQS_33
210 F3 33 IOB_X1Y238 RIOB18_X107Y237 IO_L6P_T0_33
211 F4 33 IOB_X1Y247 RIOB18_X107Y247 IO_L1N_T0_33
212 F5 34 IOB_X1Y286 RIOB18_X107Y285 IO_L7P_T1_34
213 F7 34 IOB_X1Y275 RIOB18_X107Y275 IO_L12N_T1_MRCC_34
214 F8 34 IOB_X1Y278 RIOB18_X107Y277 IO_L11P_T1_SRCC_34
215 F9 34 IOB_X1Y282 RIOB18_X107Y281 IO_L9P_T1_DQS_34
216 F10 35 IOB_X1Y343 RIOB18_X107Y343 IO_L3N_T0_DQS_AD1N_35
217 F12 35 IOB_X1Y348 RIOB18_X107Y347 IO_L1P_T0_AD0P_35
218 F13 35 IOB_X1Y338 RIOB18_X107Y337 IO_L6P_T0_35
219 F14 35 IOB_X1Y327 RIOB18_X107Y327 IO_L11N_T1_SRCC_35
220 F15 35 IOB_X1Y322 RIOB18_X107Y321 IO_L14P_T2_AD4P_SRCC_35
221 F17 501 IOPAD_X1Y119 PSS2_X32Y313 PS_MIO42_501
222 F18 501 IOPAD_X1Y104 PSS2_X32Y313 PS_MIO27_501
223 F19 501 IOPAD_X1Y102 PSS2_X32Y313 PS_MIO25_501
224 F20 501 IOPAD_X1Y100 PSS2_X32Y313 PS_MIO23_501
225 F22 501 IOPAD_X1Y98 PSS2_X32Y313 PS_MIO21_501
226 F23 500 IOPAD_X1Y83 PSS2_X32Y313 PS_MIO6_500
227 F24 500 IOPAD_X1Y81 PSS2_X32Y313 PS_MIO4_500
228 F25 502 IOPAD_X1Y33 PSS2_X32Y313 PS_DDR_DQ1_502
229 G1 33 IOB_X1Y229 RIOB18_X107Y229 IO_L10N_T1_33
230 G2 33 IOB_X1Y244 RIOB18_X107Y243 IO_L3P_T0_DQS_33
231 G4 33 IOB_X1Y248 RIOB18_X107Y247 IO_L1P_T0_33
232 G5 34 IOB_X1Y295 RIOB18_X107Y295 IO_L2N_T0_34
233 G6 34 IOB_X1Y296 RIOB18_X107Y295 IO_L2P_T0_34
234 G7 34 IOB_X1Y276 RIOB18_X107Y275 IO_L12P_T1_MRCC_34
235 G9 34 IOB_X1Y293 RIOB18_X107Y293 IO_L3N_T0_DQS_34
236 G10 35 IOB_X1Y344 RIOB18_X107Y343 IO_L3P_T0_DQS_AD1P_35
237 G11 35 IOB_X1Y339 RIOB18_X107Y339 IO_L5N_T0_AD9N_35
238 G12 35 IOB_X1Y340 RIOB18_X107Y339 IO_L5P_T0_AD9P_35
239 G14 35 IOB_X1Y328 RIOB18_X107Y327 IO_L11P_T1_SRCC_35
240 G15 35 IOB_X1Y329 RIOB18_X107Y329 IO_L10N_T1_AD11N_35
241 G16 35 IOB_X1Y330 RIOB18_X107Y329 IO_L10P_T1_AD11P_35
242 G17 501 IOPAD_X1Y94 PSS2_X32Y313 PS_MIO17_501
243 G19 501 IOPAD_X1Y96 PSS2_X32Y313 PS_MIO19_501
244 G20 501 IOPAD_X1Y95 PSS2_X32Y313 PS_MIO18_501
245 G21 501 IOPAD_X1Y93 PSS2_X32Y313 PS_MIO16_501
246 G22 501 IOPAD_X1Y99 PSS2_X32Y313 PS_MIO22_501
247 G24 502 IOPAD_X1Y28 PSS2_X32Y313 PS_DDR_DM0_502
248 G25 502 IOPAD_X1Y64 PSS2_X32Y313 PS_DDR_DQS_N0_502
249 G26 502 IOPAD_X1Y35 PSS2_X32Y313 PS_DDR_DQ3_502
250 H1 33 IOB_X1Y235 RIOB18_X107Y235 IO_L7N_T1_33
251 H2 33 IOB_X1Y230 RIOB18_X107Y229 IO_L10P_T1_33
252 H3 33 IOB_X1Y233 RIOB18_X107Y233 IO_L8N_T1_33
253 H4 33 IOB_X1Y234 RIOB18_X107Y233 IO_L8P_T1_33
254 H6 34 IOB_X1Y291 RIOB18_X107Y291 IO_L4N_T0_34
255 H7 34 IOB_X1Y292 RIOB18_X107Y291 IO_L4P_T0_34
256 H8 34 IOB_X1Y287 RIOB18_X107Y287 IO_L6N_T0_VREF_34
257 H9 34 IOB_X1Y294 RIOB18_X107Y293 IO_L3P_T0_DQS_PUDC_B_34
258 H11 34 IOB_X1Y297 RIOB18_X107Y297 IO_L1N_T0_34
259 H12 35 IOB_X1Y335 RIOB18_X107Y335 IO_L7N_T1_AD2N_35
260 H13 35 IOB_X1Y336 RIOB18_X107Y335 IO_L7P_T1_AD2P_35
261 H14 35 IOB_X1Y325 RIOB18_X107Y325 IO_L12N_T1_MRCC_35
262 H16 35 IOB_X1Y349 RIOB18_SING_X107Y349 IO_0_VRN_35
263 H17 501 IOPAD_X1Y103 PSS2_X32Y313 PS_MIO26_501
264 H19 501 IOPAD_X1Y97 PSS2_X32Y313 PS_MIO20_501
265 H21 502 IOPAD_X1Y15 PSS2_X32Y313 PS_DDR_A11_502
266 H22 502 IOPAD_X1Y72 PSS2_X32Y313 PS_DDR_DRST_B_502
267 H23 502 IOPAD_X1Y37 PSS2_X32Y313 PS_DDR_DQ5_502
268 H24 502 IOPAD_X1Y68 PSS2_X32Y313 PS_DDR_DQS_P0_502
269 H26 502 IOPAD_X1Y36 PSS2_X32Y313 PS_DDR_DQ4_502
270 J1 33 IOB_X1Y236 RIOB18_X107Y235 IO_L7P_T1_33
271 J3 33 IOB_X1Y225 RIOB18_X107Y225 IO_L12N_T1_MRCC_33
272 J4 33 IOB_X1Y226 RIOB18_X107Y225 IO_L12P_T1_MRCC_33
273 J5 33 IOB_X1Y209 RIOB18_X107Y209 IO_L20N_T3_33
274 J6 33 IOB_X1Y205 RIOB18_X107Y205 IO_L22N_T3_33
275 J8 34 IOB_X1Y288 RIOB18_X107Y287 IO_L6P_T0_34
276 J9 34 IOB_X1Y289 RIOB18_X107Y289 IO_L5N_T0_34
277 J10 34 IOB_X1Y290 RIOB18_X107Y289 IO_L5P_T0_34
278 J11 34 IOB_X1Y298 RIOB18_X107Y297 IO_L1P_T0_34
279 J13 35 IOB_X1Y333 RIOB18_X107Y333 IO_L8N_T1_AD10N_35
280 J14 35 IOB_X1Y326 RIOB18_X107Y325 IO_L12P_T1_MRCC_35
281 J15 35 IOB_X1Y331 RIOB18_X107Y331 IO_L9N_T1_DQS_AD3N_35
282 J16 501 IOPAD_X1Y111 PSS2_X32Y313 PS_MIO34_501
283 J18 501 IOPAD_X1Y105 PSS2_X32Y313 PS_MIO28_501
284 J19 501 IOPAD_X1Y101 PSS2_X32Y313 PS_MIO24_501
285 J20 502 IOPAD_X1Y18 PSS2_X32Y313 PS_DDR_A13_502
286 J21 502 IOPAD_X1Y11 PSS2_X32Y313 PS_DDR_A7_502
287 J23 502 IOPAD_X1Y39 PSS2_X32Y313 PS_DDR_DQ7_502
288 J24 502 IOPAD_X1Y38 PSS2_X32Y313 PS_DDR_DQ6_502
289 J25 502 IOPAD_X1Y34 PSS2_X32Y313 PS_DDR_DQ2_502
290 J26 502 IOPAD_X1Y32 PSS2_X32Y313 PS_DDR_DQ0_502
291 K1 33 IOB_X1Y231 RIOB18_X107Y231 IO_L9N_T1_DQS_33
292 K2 33 IOB_X1Y232 RIOB18_X107Y231 IO_L9P_T1_DQS_33
293 K3 33 IOB_X1Y227 RIOB18_X107Y227 IO_L11N_T1_SRCC_33
294 K5 33 IOB_X1Y210 RIOB18_X107Y209 IO_L20P_T3_33
295 K6 33 IOB_X1Y206 RIOB18_X107Y205 IO_L22P_T3_33
296 K7 33 IOB_X1Y201 RIOB18_X107Y201 IO_L24N_T3_33
297 K8 33 IOB_X1Y202 RIOB18_X107Y201 IO_L24P_T3_33
298 K10 34 IOB_X1Y250 RIOB18_SING_X107Y250 IO_25_VRP_34
299 K11 34 IOB_X1Y299 RIOB18_SING_X107Y299 IO_0_VRN_34
300 K12 35 IOB_X1Y300 RIOB18_SING_X107Y300 IO_25_VRP_35
301 K13 35 IOB_X1Y334 RIOB18_X107Y333 IO_L8P_T1_AD10P_35
302 K15 35 IOB_X1Y332 RIOB18_X107Y331 IO_L9P_T1_DQS_AD3P_35
303 K16 501 IOPAD_X1Y113 PSS2_X32Y313 PS_MIO36_501
304 K17 501 IOPAD_X1Y109 PSS2_X32Y313 PS_MIO32_501
305 K19 501 IOPAD_X1Y107 PSS2_X32Y313 PS_MIO30_501
306 K20 502 IOPAD_X1Y5 PSS2_X32Y313 PS_DDR_A1_502
307 K22 502 IOPAD_X1Y4 PSS2_X32Y313 PS_DDR_A0_502
308 K23 502 IOPAD_X1Y43 PSS2_X32Y313 PS_DDR_DQ11_502
309 K25 502 IOPAD_X1Y29 PSS2_X32Y313 PS_DDR_DM1_502
310 K26 502 IOPAD_X1Y40 PSS2_X32Y313 PS_DDR_DQ8_502
311 L2 33 IOB_X1Y217 RIOB18_X107Y217 IO_L16N_T2_33
312 L3 33 IOB_X1Y228 RIOB18_X107Y227 IO_L11P_T1_SRCC_33
313 L4 33 IOB_X1Y221 RIOB18_X107Y221 IO_L14N_T2_SRCC_33
314 L5 33 IOB_X1Y222 RIOB18_X107Y221 IO_L14P_T2_SRCC_33
315 L7 33 IOB_X1Y211 RIOB18_X107Y211 IO_L19N_T3_VREF_33
316 L8 33 IOB_X1Y207 RIOB18_X107Y207 IO_L21N_T3_DQS_33
317 L9 33 IOB_X1Y249 RIOB18_SING_X107Y249 IO_0_VRN_33
318 L20 502 IOPAD_X1Y10 PSS2_X32Y313 PS_DDR_A6_502
319 L22 502 IOPAD_X1Y7 PSS2_X32Y313 PS_DDR_A3_502
320 L23 502 IOPAD_X1Y41 PSS2_X32Y313 PS_DDR_DQ9_502
321 L24 502 IOPAD_X1Y69 PSS2_X32Y313 PS_DDR_DQS_P1_502
322 L25 502 IOPAD_X1Y65 PSS2_X32Y313 PS_DDR_DQS_N1_502
323 M1 33 IOB_X1Y213 RIOB18_X107Y213 IO_L18N_T2_33
324 M2 33 IOB_X1Y218 RIOB18_X107Y217 IO_L16P_T2_33
325 M4 33 IOB_X1Y215 RIOB18_X107Y215 IO_L17N_T2_33
326 M5 33 IOB_X1Y223 RIOB18_X107Y223 IO_L13N_T2_MRCC_33
327 M6 33 IOB_X1Y224 RIOB18_X107Y223 IO_L13P_T2_MRCC_33
328 M7 33 IOB_X1Y212 RIOB18_X107Y211 IO_L19P_T3_33
329 M8 33 IOB_X1Y208 RIOB18_X107Y207 IO_L21P_T3_DQS_33
330 M20 502 IOPAD_X1Y8 PSS2_X32Y313 PS_DDR_A4_502
331 M22 502 IOPAD_X1Y14 PSS2_X32Y313 PS_DDR_A10_502
332 M24 502 IOPAD_X1Y46 PSS2_X32Y313 PS_DDR_DQ14_502
333 M25 502 IOPAD_X1Y44 PSS2_X32Y313 PS_DDR_DQ12_502
334 M26 502 IOPAD_X1Y42 PSS2_X32Y313 PS_DDR_DQ10_502
335 N1 33 IOB_X1Y214 RIOB18_X107Y213 IO_L18P_T2_33
336 N2 33 IOB_X1Y219 RIOB18_X107Y219 IO_L15N_T2_DQS_33
337 N3 33 IOB_X1Y220 RIOB18_X107Y219 IO_L15P_T2_DQS_33
338 N4 33 IOB_X1Y216 RIOB18_X107Y215 IO_L17P_T2_33
339 N6 33 IOB_X1Y203 RIOB18_X107Y203 IO_L23N_T3_33
340 N7 33 IOB_X1Y204 RIOB18_X107Y203 IO_L23P_T3_33
341 N8 33 IOB_X1Y200 RIOB18_SING_X107Y200 IO_25_VRP_33
342 N14 0 IPAD_X0Y120 MONITOR_BOT_PELE1_X197Y339 VP_0
343 N21 502 IOPAD_X1Y6 PSS2_X32Y313 PS_DDR_A2_502
344 N22 502 IOPAD_X1Y9 PSS2_X32Y313 PS_DDR_A5_502
345 N23 502 IOPAD_X1Y47 PSS2_X32Y313 PS_DDR_DQ15_502
346 N24 502 IOPAD_X1Y45 PSS2_X32Y313 PS_DDR_DQ13_502
347 N26 502 IOPAD_X1Y50 PSS2_X32Y313 PS_DDR_DQ18_502
348 P13 0 IPAD_X0Y121 MONITOR_BOT_PELE1_X197Y339 VN_0
349 P20 502 IOPAD_X1Y16 PSS2_X32Y313 PS_DDR_A12_502
350 P21 502 IOPAD_X1Y24 PSS2_X32Y313 PS_DDR_CKN_502
351 P23 502 IOPAD_X1Y51 PSS2_X32Y313 PS_DDR_DQ19_502
352 P24 502 IOPAD_X1Y49 PSS2_X32Y313 PS_DDR_DQ17_502
353 P25 502 IOPAD_X1Y70 PSS2_X32Y313 PS_DDR_DQS_P2_502
354 P26 502 IOPAD_X1Y30 PSS2_X32Y313 PS_DDR_DM2_502
355 R1 112 OPAD_X0Y30 GTX_CHANNEL_3_X249Y202 MGTXTXN3_112
356 R2 112 OPAD_X0Y31 GTX_CHANNEL_3_X249Y202 MGTXTXP3_112
357 R5 112 IPAD_X1Y99 GTX_COMMON_X249Y179 MGTREFCLK0N_112
358 R6 112 IPAD_X1Y98 GTX_COMMON_X249Y179 MGTREFCLK0P_112
359 R20 502 IOPAD_X1Y17 PSS2_X32Y313 PS_DDR_A14_502
360 R21 502 IOPAD_X1Y25 PSS2_X32Y313 PS_DDR_CKP_502
361 R22 502 IOPAD_X1Y21 PSS2_X32Y313 PS_DDR_BA2_502
362 R23 502 IOPAD_X1Y55 PSS2_X32Y313 PS_DDR_DQ23_502
363 R25 502 IOPAD_X1Y66 PSS2_X32Y313 PS_DDR_DQS_N2_502
364 R26 502 IOPAD_X1Y48 PSS2_X32Y313 PS_DDR_DQ16_502
365 T3 112 IPAD_X1Y114 GTX_CHANNEL_3_X249Y202 MGTXRXN3_112
366 T4 112 IPAD_X1Y115 GTX_CHANNEL_3_X249Y202 MGTXRXP3_112
367 T20 502 IOPAD_X1Y12 PSS2_X32Y313 PS_DDR_A8_502
368 T22 502 IOPAD_X1Y20 PSS2_X32Y313 PS_DDR_BA1_502
369 T23 502 IOPAD_X1Y54 PSS2_X32Y313 PS_DDR_DQ22_502
370 T24 502 IOPAD_X1Y52 PSS2_X32Y313 PS_DDR_DQ20_502
371 T25 502 IOPAD_X1Y53 PSS2_X32Y313 PS_DDR_DQ21_502
372 U1 112 OPAD_X0Y28 GTX_CHANNEL_2_X249Y191 MGTXTXN2_112
373 U2 112 OPAD_X0Y29 GTX_CHANNEL_2_X249Y191 MGTXTXP2_112
374 U5 112 IPAD_X1Y101 GTX_COMMON_X249Y179 MGTREFCLK1N_112
375 U6 112 IPAD_X1Y100 GTX_COMMON_X249Y179 MGTREFCLK1P_112
376 U20 502 IOPAD_X1Y13 PSS2_X32Y313 PS_DDR_A9_502
377 U21 502 IOPAD_X1Y23 PSS2_X32Y313 PS_DDR_CKE_502
378 U22 502 IOPAD_X1Y19 PSS2_X32Y313 PS_DDR_BA0_502
379 U24 502 IOPAD_X1Y58 PSS2_X32Y313 PS_DDR_DQ26_502
380 U25 502 IOPAD_X1Y59 PSS2_X32Y313 PS_DDR_DQ27_502
381 U26 502 IOPAD_X1Y57 PSS2_X32Y313 PS_DDR_DQ25_502
382 V3 112 IPAD_X1Y108 GTX_CHANNEL_2_X249Y191 MGTXRXN2_112
383 V4 112 IPAD_X1Y109 GTX_CHANNEL_2_X249Y191 MGTXRXP2_112
384 V18 13 IOB_X0Y200 LIOB33_SING_X0Y200 IO_25_13
385 V19 13 IOB_X0Y249 LIOB33_SING_X0Y249 IO_0_13
386 V21 502 IOPAD_X1Y2 PSS2_X32Y313 PS_DDR_VRN_502
387 V22 502 IOPAD_X1Y1 PSS2_X32Y313 PS_DDR_WE_B_502
388 V23 502 IOPAD_X1Y133 PSS2_X32Y313 PS_DDR_RAS_B_502
389 V24 502 IOPAD_X1Y56 PSS2_X32Y313 PS_DDR_DQ24_502
390 V26 502 IOPAD_X1Y31 PSS2_X32Y313 PS_DDR_DM3_502
391 W1 112 OPAD_X0Y26 GTX_CHANNEL_1_X249Y173 MGTXTXN1_112
392 W2 112 OPAD_X0Y27 GTX_CHANNEL_1_X249Y173 MGTXTXP1_112
393 W5 111 IPAD_X1Y69 GTX_COMMON_X249Y127 MGTREFCLK0N_111
394 W6 111 IPAD_X1Y68 GTX_COMMON_X249Y127 MGTREFCLK0P_111
395 W13 12 IOB_X0Y190 LIOB33_X0Y189 IO_L5P_T0_12
396 W14 12 IOB_X0Y199 LIOB33_SING_X0Y199 IO_0_12
397 W15 12 IOB_X0Y151 LIOB33_X0Y151 IO_L24N_T3_12
398 W16 12 IOB_X0Y152 LIOB33_X0Y151 IO_L24P_T3_12
399 W17 12 IOB_X0Y150 LIOB33_SING_X0Y150 IO_25_12
400 W18 13 IOB_X0Y204 LIOB33_X0Y203 IO_L23P_T3_13
401 W19 13 IOB_X0Y203 LIOB33_X0Y203 IO_L23N_T3_13
402 W20 13 IOB_X0Y212 LIOB33_X0Y211 IO_L19P_T3_13
403 W21 502 IOPAD_X1Y3 PSS2_X32Y313 PS_DDR_VRP_502
404 W23 502 IOPAD_X1Y63 PSS2_X32Y313 PS_DDR_DQ31_502
405 W24 502 IOPAD_X1Y71 PSS2_X32Y313 PS_DDR_DQS_P3_502
406 W25 502 IOPAD_X1Y67 PSS2_X32Y313 PS_DDR_DQS_N3_502
407 W26 502 IOPAD_X1Y60 PSS2_X32Y313 PS_DDR_DQ28_502
408 Y3 112 IPAD_X1Y96 GTX_CHANNEL_1_X249Y173 MGTXRXN1_112
409 Y4 112 IPAD_X1Y97 GTX_CHANNEL_1_X249Y173 MGTXRXP1_112
410 Y10 12 IOB_X0Y194 LIOB33_X0Y193 IO_L3P_T0_DQS_12
411 Y11 12 IOB_X0Y197 LIOB33_X0Y197 IO_L1N_T0_12
412 Y12 12 IOB_X0Y198 LIOB33_X0Y197 IO_L1P_T0_12
413 Y13 12 IOB_X0Y189 LIOB33_X0Y189 IO_L5N_T0_12
414 Y15 12 IOB_X0Y153 LIOB33_X0Y153 IO_L23N_T3_12
415 Y16 12 IOB_X0Y154 LIOB33_X0Y153 IO_L23P_T3_12
416 Y17 12 IOB_X0Y162 LIOB33_X0Y161 IO_L19P_T3_12
417 Y18 13 IOB_X0Y202 LIOB33_X0Y201 IO_L24P_T3_13
418 Y20 13 IOB_X0Y211 LIOB33_X0Y211 IO_L19N_T3_VREF_13
419 Y21 502 IOPAD_X1Y27 PSS2_X32Y313 PS_DDR_CS_B_502
420 Y22 502 IOPAD_X1Y131 PSS2_X32Y313 PS_DDR_ODT_502
421 Y23 502 IOPAD_X1Y22 PSS2_X32Y313 PS_DDR_CAS_B_502
422 Y25 502 IOPAD_X1Y61 PSS2_X32Y313 PS_DDR_DQ29_502
423 Y26 502 IOPAD_X1Y62 PSS2_X32Y313 PS_DDR_DQ30_502

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File diff suppressed because it is too large Load Diff

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@ -0,0 +1,423 @@
pin,bank,site,tile,pin_function
A2,34,IOB_X1Y251,RIOB18_X107Y251,IO_L24N_T3_34
A3,34,IOB_X1Y255,RIOB18_X107Y255,IO_L22N_T3_34
A4,34,IOB_X1Y256,RIOB18_X107Y255,IO_L22P_T3_34
A5,34,IOB_X1Y257,RIOB18_X107Y257,IO_L21N_T3_DQS_34
A7,34,IOB_X1Y263,RIOB18_X107Y263,IO_L18N_T2_34
A8,34,IOB_X1Y265,RIOB18_X107Y265,IO_L17N_T2_34
A9,34,IOB_X1Y266,RIOB18_X107Y265,IO_L17P_T2_34
A10,34,IOB_X1Y267,RIOB18_X107Y267,IO_L16N_T2_34
A12,35,IOB_X1Y301,RIOB18_X107Y301,IO_L24N_T3_AD15N_35
A13,35,IOB_X1Y302,RIOB18_X107Y301,IO_L24P_T3_AD15P_35
A14,35,IOB_X1Y307,RIOB18_X107Y307,IO_L21N_T3_DQS_AD14N_35
A15,35,IOB_X1Y308,RIOB18_X107Y307,IO_L21P_T3_DQS_AD14P_35
A17,35,IOB_X1Y313,RIOB18_X107Y313,IO_L18N_T2_AD13N_35
A18,501,IOPAD_X1Y126,PSS2_X32Y313,PS_MIO49_501
A19,501,IOPAD_X1Y130,PSS2_X32Y313,PS_MIO53_501
A20,501,IOPAD_X1Y129,PSS2_X32Y313,PS_MIO52_501
A22,501,IOPAD_X1Y134,PSS2_X32Y313,PS_SRST_B_501
A23,500,IOPAD_X1Y89,PSS2_X32Y313,PS_MIO12_500
A24,500,IOPAD_X1Y85,PSS2_X32Y313,PS_MIO8_500
A25,500,IOPAD_X1Y87,PSS2_X32Y313,PS_MIO10_500
AA1,112,OPAD_X0Y24,GTX_CHANNEL_0_X249Y162,MGTXTXN0_112
AA2,112,OPAD_X0Y25,GTX_CHANNEL_0_X249Y162,MGTXTXP0_112
AA5,111,IPAD_X1Y71,GTX_COMMON_X249Y127,MGTREFCLK1N_111
AA6,111,IPAD_X1Y70,GTX_COMMON_X249Y127,MGTREFCLK1P_111
AA10,12,IOB_X0Y193,LIOB33_X0Y193,IO_L3N_T0_DQS_12
AA12,12,IOB_X0Y187,LIOB33_X0Y187,IO_L6N_T0_VREF_12
AA13,12,IOB_X0Y188,LIOB33_X0Y187,IO_L6P_T0_12
AA14,12,IOB_X0Y155,LIOB33_X0Y155,IO_L22N_T3_12
AA15,12,IOB_X0Y156,LIOB33_X0Y155,IO_L22P_T3_12
AA17,12,IOB_X0Y161,LIOB33_X0Y161,IO_L19N_T3_VREF_12
AA18,13,IOB_X0Y201,LIOB33_X0Y201,IO_L24N_T3_13
AA19,13,IOB_X0Y206,LIOB33_X0Y205,IO_L22P_T3_13
AA20,13,IOB_X0Y210,LIOB33_X0Y209,IO_L20P_T3_13
AA22,13,IOB_X0Y230,LIOB33_X0Y229,IO_L10P_T1_13
AA23,13,IOB_X0Y229,LIOB33_X0Y229,IO_L10N_T1_13
AA24,13,IOB_X0Y238,LIOB33_X0Y237,IO_L6P_T0_13
AA25,13,IOB_X0Y248,LIOB33_X0Y247,IO_L1P_T0_13
AB3,112,IPAD_X1Y90,GTX_CHANNEL_0_X249Y162,MGTXRXN0_112
AB4,112,IPAD_X1Y91,GTX_CHANNEL_0_X249Y162,MGTXRXP0_112
AB10,12,IOB_X0Y191,LIOB33_X0Y191,IO_L4N_T0_12
AB11,12,IOB_X0Y192,LIOB33_X0Y191,IO_L4P_T0_12
AB12,12,IOB_X0Y196,LIOB33_X0Y195,IO_L2P_T0_12
AB14,12,IOB_X0Y171,LIOB33_X0Y171,IO_L14N_T2_SRCC_12
AB15,12,IOB_X0Y172,LIOB33_X0Y171,IO_L14P_T2_SRCC_12
AB16,12,IOB_X0Y159,LIOB33_X0Y159,IO_L20N_T3_12
AB17,12,IOB_X0Y160,LIOB33_X0Y159,IO_L20P_T3_12
AB19,13,IOB_X0Y205,LIOB33_X0Y205,IO_L22N_T3_13
AB20,13,IOB_X0Y209,LIOB33_X0Y209,IO_L20N_T3_13
AB21,13,IOB_X0Y232,LIOB33_X0Y231,IO_L9P_T1_DQS_13
AB22,13,IOB_X0Y231,LIOB33_X0Y231,IO_L9N_T1_DQS_13
AB24,13,IOB_X0Y237,LIOB33_X0Y237,IO_L6N_T0_VREF_13
AB25,13,IOB_X0Y247,LIOB33_X0Y247,IO_L1N_T0_13
AB26,13,IOB_X0Y246,LIOB33_X0Y245,IO_L2P_T0_13
AC1,111,OPAD_X0Y22,GTX_CHANNEL_3_X249Y150,MGTXTXN3_111
AC2,111,OPAD_X0Y23,GTX_CHANNEL_3_X249Y150,MGTXTXP3_111
AC5,111,IPAD_X1Y78,GTX_CHANNEL_2_X249Y139,MGTXRXN2_111
AC6,111,IPAD_X1Y79,GTX_CHANNEL_2_X249Y139,MGTXRXP2_111
AC11,12,IOB_X0Y195,LIOB33_X0Y195,IO_L2N_T0_12
AC12,12,IOB_X0Y178,LIOB33_X0Y177,IO_L11P_T1_SRCC_12
AC13,12,IOB_X0Y176,LIOB33_X0Y175,IO_L12P_T1_MRCC_12
AC14,12,IOB_X0Y174,LIOB33_X0Y173,IO_L13P_T2_MRCC_12
AC16,12,IOB_X0Y157,LIOB33_X0Y157,IO_L21N_T3_DQS_12
AC17,12,IOB_X0Y158,LIOB33_X0Y157,IO_L21P_T3_DQS_12
AC18,13,IOB_X0Y208,LIOB33_X0Y207,IO_L21P_T3_DQS_13
AC19,13,IOB_X0Y207,LIOB33_X0Y207,IO_L21N_T3_DQS_13
AC21,13,IOB_X0Y222,LIOB33_X0Y221,IO_L14P_T2_SRCC_13
AC22,13,IOB_X0Y221,LIOB33_X0Y221,IO_L14N_T2_SRCC_13
AC23,13,IOB_X0Y226,LIOB33_X0Y225,IO_L12P_T1_MRCC_13
AC24,13,IOB_X0Y225,LIOB33_X0Y225,IO_L12N_T1_MRCC_13
AC26,13,IOB_X0Y245,LIOB33_X0Y245,IO_L2N_T0_13
AD3,111,IPAD_X1Y84,GTX_CHANNEL_3_X249Y150,MGTXRXN3_111
AD4,111,IPAD_X1Y85,GTX_CHANNEL_3_X249Y150,MGTXRXP3_111
AD7,111,IPAD_X1Y60,GTX_CHANNEL_0_X249Y110,MGTXRXN0_111
AD8,111,IPAD_X1Y61,GTX_CHANNEL_0_X249Y110,MGTXRXP0_111
AD10,12,IOB_X0Y185,LIOB33_X0Y185,IO_L7N_T1_12
AD11,12,IOB_X0Y177,LIOB33_X0Y177,IO_L11N_T1_SRCC_12
AD13,12,IOB_X0Y175,LIOB33_X0Y175,IO_L12N_T1_MRCC_12
AD14,12,IOB_X0Y173,LIOB33_X0Y173,IO_L13N_T2_MRCC_12
AD15,12,IOB_X0Y169,LIOB33_X0Y169,IO_L15N_T2_DQS_12
AD16,12,IOB_X0Y170,LIOB33_X0Y169,IO_L15P_T2_DQS_12
AD18,13,IOB_X0Y216,LIOB33_X0Y215,IO_L17P_T2_13
AD19,13,IOB_X0Y215,LIOB33_X0Y215,IO_L17N_T2_13
AD20,13,IOB_X0Y224,LIOB33_X0Y223,IO_L13P_T2_MRCC_13
AD21,13,IOB_X0Y223,LIOB33_X0Y223,IO_L13N_T2_MRCC_13
AD23,13,IOB_X0Y228,LIOB33_X0Y227,IO_L11P_T1_SRCC_13
AD24,13,IOB_X0Y227,LIOB33_X0Y227,IO_L11N_T1_SRCC_13
AD25,13,IOB_X0Y242,LIOB33_X0Y241,IO_L4P_T0_13
AD26,13,IOB_X0Y241,LIOB33_X0Y241,IO_L4N_T0_13
AE1,111,OPAD_X0Y20,GTX_CHANNEL_2_X249Y139,MGTXTXN2_111
AE2,111,OPAD_X0Y21,GTX_CHANNEL_2_X249Y139,MGTXTXP2_111
AE5,111,IPAD_X1Y66,GTX_CHANNEL_1_X249Y121,MGTXRXN1_111
AE6,111,IPAD_X1Y67,GTX_CHANNEL_1_X249Y121,MGTXRXP1_111
AE10,12,IOB_X0Y186,LIOB33_X0Y185,IO_L7P_T1_12
AE11,12,IOB_X0Y182,LIOB33_X0Y181,IO_L9P_T1_DQS_12
AE12,12,IOB_X0Y184,LIOB33_X0Y183,IO_L8P_T1_12
AE13,12,IOB_X0Y180,LIOB33_X0Y179,IO_L10P_T1_12
AE15,12,IOB_X0Y165,LIOB33_X0Y165,IO_L17N_T2_12
AE16,12,IOB_X0Y166,LIOB33_X0Y165,IO_L17P_T2_12
AE17,12,IOB_X0Y164,LIOB33_X0Y163,IO_L18P_T2_12
AE18,13,IOB_X0Y214,LIOB33_X0Y213,IO_L18P_T2_13
AE20,13,IOB_X0Y218,LIOB33_X0Y217,IO_L16P_T2_13
AE21,13,IOB_X0Y217,LIOB33_X0Y217,IO_L16N_T2_13
AE22,13,IOB_X0Y236,LIOB33_X0Y235,IO_L7P_T1_13
AE23,13,IOB_X0Y234,LIOB33_X0Y233,IO_L8P_T1_13
AE25,13,IOB_X0Y244,LIOB33_X0Y243,IO_L3P_T0_DQS_13
AE26,13,IOB_X0Y243,LIOB33_X0Y243,IO_L3N_T0_DQS_13
AF3,111,OPAD_X0Y18,GTX_CHANNEL_1_X249Y121,MGTXTXN1_111
AF4,111,OPAD_X0Y19,GTX_CHANNEL_1_X249Y121,MGTXTXP1_111
AF7,111,OPAD_X0Y16,GTX_CHANNEL_0_X249Y110,MGTXTXN0_111
AF8,111,OPAD_X0Y17,GTX_CHANNEL_0_X249Y110,MGTXTXP0_111
AF10,12,IOB_X0Y181,LIOB33_X0Y181,IO_L9N_T1_DQS_12
AF12,12,IOB_X0Y183,LIOB33_X0Y183,IO_L8N_T1_12
AF13,12,IOB_X0Y179,LIOB33_X0Y179,IO_L10N_T1_12
AF14,12,IOB_X0Y167,LIOB33_X0Y167,IO_L16N_T2_12
AF15,12,IOB_X0Y168,LIOB33_X0Y167,IO_L16P_T2_12
AF17,12,IOB_X0Y163,LIOB33_X0Y163,IO_L18N_T2_12
AF18,13,IOB_X0Y213,LIOB33_X0Y213,IO_L18N_T2_13
AF19,13,IOB_X0Y220,LIOB33_X0Y219,IO_L15P_T2_DQS_13
AF20,13,IOB_X0Y219,LIOB33_X0Y219,IO_L15N_T2_DQS_13
AF22,13,IOB_X0Y235,LIOB33_X0Y235,IO_L7N_T1_13
AF23,13,IOB_X0Y233,LIOB33_X0Y233,IO_L8N_T1_13
AF24,13,IOB_X0Y240,LIOB33_X0Y239,IO_L5P_T0_13
AF25,13,IOB_X0Y239,LIOB33_X0Y239,IO_L5N_T0_13
B1,34,IOB_X1Y253,RIOB18_X107Y253,IO_L23N_T3_34
B2,34,IOB_X1Y252,RIOB18_X107Y251,IO_L24P_T3_34
B4,34,IOB_X1Y259,RIOB18_X107Y259,IO_L20N_T3_34
B5,34,IOB_X1Y260,RIOB18_X107Y259,IO_L20P_T3_34
B6,34,IOB_X1Y258,RIOB18_X107Y257,IO_L21P_T3_DQS_34
B7,34,IOB_X1Y264,RIOB18_X107Y263,IO_L18P_T2_34
B9,34,IOB_X1Y269,RIOB18_X107Y269,IO_L15N_T2_DQS_34
B10,34,IOB_X1Y268,RIOB18_X107Y267,IO_L16P_T2_34
B11,35,IOB_X1Y303,RIOB18_X107Y303,IO_L23N_T3_35
B12,35,IOB_X1Y305,RIOB18_X107Y305,IO_L22N_T3_AD7N_35
B14,35,IOB_X1Y309,RIOB18_X107Y309,IO_L20N_T3_AD6N_35
B15,35,IOB_X1Y315,RIOB18_X107Y315,IO_L17N_T2_AD5N_35
B16,35,IOB_X1Y316,RIOB18_X107Y315,IO_L17P_T2_AD5P_35
B17,35,IOB_X1Y314,RIOB18_X107Y313,IO_L18P_T2_AD13P_35
B19,501,IOPAD_X1Y124,PSS2_X32Y313,PS_MIO47_501
B20,501,IOPAD_X1Y128,PSS2_X32Y313,PS_MIO51_501
B21,501,IOPAD_X1Y125,PSS2_X32Y313,PS_MIO48_501
B22,501,IOPAD_X1Y127,PSS2_X32Y313,PS_MIO50_501
B24,500,IOPAD_X1Y26,PSS2_X32Y313,PS_CLK_500
B25,500,IOPAD_X1Y90,PSS2_X32Y313,PS_MIO13_500
B26,500,IOPAD_X1Y88,PSS2_X32Y313,PS_MIO11_500
C1,33,IOB_X1Y241,RIOB18_X107Y241,IO_L4N_T0_33
C2,34,IOB_X1Y254,RIOB18_X107Y253,IO_L23P_T3_34
C3,34,IOB_X1Y261,RIOB18_X107Y261,IO_L19N_T3_VREF_34
C4,34,IOB_X1Y262,RIOB18_X107Y261,IO_L19P_T3_34
C6,34,IOB_X1Y271,RIOB18_X107Y271,IO_L14N_T2_SRCC_34
C7,34,IOB_X1Y273,RIOB18_X107Y273,IO_L13N_T2_MRCC_34
C8,34,IOB_X1Y274,RIOB18_X107Y273,IO_L13P_T2_MRCC_34
C9,34,IOB_X1Y270,RIOB18_X107Y269,IO_L15P_T2_DQS_34
C11,35,IOB_X1Y304,RIOB18_X107Y303,IO_L23P_T3_35
C12,35,IOB_X1Y306,RIOB18_X107Y305,IO_L22P_T3_AD7P_35
C13,35,IOB_X1Y311,RIOB18_X107Y311,IO_L19N_T3_VREF_35
C14,35,IOB_X1Y310,RIOB18_X107Y309,IO_L20P_T3_AD6P_35
C16,35,IOB_X1Y319,RIOB18_X107Y319,IO_L15N_T2_DQS_AD12N_35
C17,35,IOB_X1Y320,RIOB18_X107Y319,IO_L15P_T2_DQS_AD12P_35
C18,501,IOPAD_X1Y122,PSS2_X32Y313,PS_MIO45_501
C19,501,IOPAD_X1Y118,PSS2_X32Y313,PS_MIO41_501
C21,501,IOPAD_X1Y116,PSS2_X32Y313,PS_MIO39_501
C22,501,IOPAD_X1Y117,PSS2_X32Y313,PS_MIO40_501
C23,500,IOPAD_X1Y132,PSS2_X32Y313,PS_POR_B_500
C24,500,IOPAD_X1Y92,PSS2_X32Y313,PS_MIO15_500
C26,500,IOPAD_X1Y82,PSS2_X32Y313,PS_MIO5_500
D1,33,IOB_X1Y242,RIOB18_X107Y241,IO_L4P_T0_33
D3,33,IOB_X1Y245,RIOB18_X107Y245,IO_L2N_T0_33
D4,33,IOB_X1Y246,RIOB18_X107Y245,IO_L2P_T0_33
D5,34,IOB_X1Y279,RIOB18_X107Y279,IO_L10N_T1_34
D6,34,IOB_X1Y272,RIOB18_X107Y271,IO_L14P_T2_SRCC_34
D8,34,IOB_X1Y283,RIOB18_X107Y283,IO_L8N_T1_34
D9,34,IOB_X1Y284,RIOB18_X107Y283,IO_L8P_T1_34
D10,35,IOB_X1Y345,RIOB18_X107Y345,IO_L2N_T0_AD8N_35
D11,35,IOB_X1Y341,RIOB18_X107Y341,IO_L4N_T0_35
D13,35,IOB_X1Y312,RIOB18_X107Y311,IO_L19P_T3_35
D14,35,IOB_X1Y323,RIOB18_X107Y323,IO_L13N_T2_MRCC_35
D15,35,IOB_X1Y324,RIOB18_X107Y323,IO_L13P_T2_MRCC_35
D16,35,IOB_X1Y317,RIOB18_X107Y317,IO_L16N_T2_35
D18,501,IOPAD_X1Y120,PSS2_X32Y313,PS_MIO43_501
D19,501,IOPAD_X1Y112,PSS2_X32Y313,PS_MIO35_501
D20,501,IOPAD_X1Y114,PSS2_X32Y313,PS_MIO37_501
D21,501,IOPAD_X1Y115,PSS2_X32Y313,PS_MIO38_501
D23,500,IOPAD_X1Y91,PSS2_X32Y313,PS_MIO14_500
D24,500,IOPAD_X1Y86,PSS2_X32Y313,PS_MIO9_500
D25,500,IOPAD_X1Y80,PSS2_X32Y313,PS_MIO3_500
D26,500,IOPAD_X1Y78,PSS2_X32Y313,PS_MIO1_500
E1,33,IOB_X1Y239,RIOB18_X107Y239,IO_L5N_T0_33
E2,33,IOB_X1Y240,RIOB18_X107Y239,IO_L5P_T0_33
E3,33,IOB_X1Y237,RIOB18_X107Y237,IO_L6N_T0_VREF_33
E5,34,IOB_X1Y285,RIOB18_X107Y285,IO_L7N_T1_34
E6,34,IOB_X1Y280,RIOB18_X107Y279,IO_L10P_T1_34
E7,34,IOB_X1Y277,RIOB18_X107Y277,IO_L11N_T1_SRCC_34
E8,34,IOB_X1Y281,RIOB18_X107Y281,IO_L9N_T1_DQS_34
E10,35,IOB_X1Y346,RIOB18_X107Y345,IO_L2P_T0_AD8P_35
E11,35,IOB_X1Y342,RIOB18_X107Y341,IO_L4P_T0_35
E12,35,IOB_X1Y347,RIOB18_X107Y347,IO_L1N_T0_AD0N_35
E13,35,IOB_X1Y337,RIOB18_X107Y337,IO_L6N_T0_VREF_35
E15,35,IOB_X1Y321,RIOB18_X107Y321,IO_L14N_T2_AD4N_SRCC_35
E16,35,IOB_X1Y318,RIOB18_X107Y317,IO_L16P_T2_35
E17,501,IOPAD_X1Y123,PSS2_X32Y313,PS_MIO46_501
E18,501,IOPAD_X1Y121,PSS2_X32Y313,PS_MIO44_501
E20,501,IOPAD_X1Y106,PSS2_X32Y313,PS_MIO29_501
E21,501,IOPAD_X1Y108,PSS2_X32Y313,PS_MIO31_501
E22,501,IOPAD_X1Y110,PSS2_X32Y313,PS_MIO33_501
E23,500,IOPAD_X1Y84,PSS2_X32Y313,PS_MIO7_500
E25,500,IOPAD_X1Y79,PSS2_X32Y313,PS_MIO2_500
E26,500,IOPAD_X1Y77,PSS2_X32Y313,PS_MIO0_500
F2,33,IOB_X1Y243,RIOB18_X107Y243,IO_L3N_T0_DQS_33
F3,33,IOB_X1Y238,RIOB18_X107Y237,IO_L6P_T0_33
F4,33,IOB_X1Y247,RIOB18_X107Y247,IO_L1N_T0_33
F5,34,IOB_X1Y286,RIOB18_X107Y285,IO_L7P_T1_34
F7,34,IOB_X1Y275,RIOB18_X107Y275,IO_L12N_T1_MRCC_34
F8,34,IOB_X1Y278,RIOB18_X107Y277,IO_L11P_T1_SRCC_34
F9,34,IOB_X1Y282,RIOB18_X107Y281,IO_L9P_T1_DQS_34
F10,35,IOB_X1Y343,RIOB18_X107Y343,IO_L3N_T0_DQS_AD1N_35
F12,35,IOB_X1Y348,RIOB18_X107Y347,IO_L1P_T0_AD0P_35
F13,35,IOB_X1Y338,RIOB18_X107Y337,IO_L6P_T0_35
F14,35,IOB_X1Y327,RIOB18_X107Y327,IO_L11N_T1_SRCC_35
F15,35,IOB_X1Y322,RIOB18_X107Y321,IO_L14P_T2_AD4P_SRCC_35
F17,501,IOPAD_X1Y119,PSS2_X32Y313,PS_MIO42_501
F18,501,IOPAD_X1Y104,PSS2_X32Y313,PS_MIO27_501
F19,501,IOPAD_X1Y102,PSS2_X32Y313,PS_MIO25_501
F20,501,IOPAD_X1Y100,PSS2_X32Y313,PS_MIO23_501
F22,501,IOPAD_X1Y98,PSS2_X32Y313,PS_MIO21_501
F23,500,IOPAD_X1Y83,PSS2_X32Y313,PS_MIO6_500
F24,500,IOPAD_X1Y81,PSS2_X32Y313,PS_MIO4_500
F25,502,IOPAD_X1Y33,PSS2_X32Y313,PS_DDR_DQ1_502
G1,33,IOB_X1Y229,RIOB18_X107Y229,IO_L10N_T1_33
G2,33,IOB_X1Y244,RIOB18_X107Y243,IO_L3P_T0_DQS_33
G4,33,IOB_X1Y248,RIOB18_X107Y247,IO_L1P_T0_33
G5,34,IOB_X1Y295,RIOB18_X107Y295,IO_L2N_T0_34
G6,34,IOB_X1Y296,RIOB18_X107Y295,IO_L2P_T0_34
G7,34,IOB_X1Y276,RIOB18_X107Y275,IO_L12P_T1_MRCC_34
G9,34,IOB_X1Y293,RIOB18_X107Y293,IO_L3N_T0_DQS_34
G10,35,IOB_X1Y344,RIOB18_X107Y343,IO_L3P_T0_DQS_AD1P_35
G11,35,IOB_X1Y339,RIOB18_X107Y339,IO_L5N_T0_AD9N_35
G12,35,IOB_X1Y340,RIOB18_X107Y339,IO_L5P_T0_AD9P_35
G14,35,IOB_X1Y328,RIOB18_X107Y327,IO_L11P_T1_SRCC_35
G15,35,IOB_X1Y329,RIOB18_X107Y329,IO_L10N_T1_AD11N_35
G16,35,IOB_X1Y330,RIOB18_X107Y329,IO_L10P_T1_AD11P_35
G17,501,IOPAD_X1Y94,PSS2_X32Y313,PS_MIO17_501
G19,501,IOPAD_X1Y96,PSS2_X32Y313,PS_MIO19_501
G20,501,IOPAD_X1Y95,PSS2_X32Y313,PS_MIO18_501
G21,501,IOPAD_X1Y93,PSS2_X32Y313,PS_MIO16_501
G22,501,IOPAD_X1Y99,PSS2_X32Y313,PS_MIO22_501
G24,502,IOPAD_X1Y28,PSS2_X32Y313,PS_DDR_DM0_502
G25,502,IOPAD_X1Y64,PSS2_X32Y313,PS_DDR_DQS_N0_502
G26,502,IOPAD_X1Y35,PSS2_X32Y313,PS_DDR_DQ3_502
H1,33,IOB_X1Y235,RIOB18_X107Y235,IO_L7N_T1_33
H2,33,IOB_X1Y230,RIOB18_X107Y229,IO_L10P_T1_33
H3,33,IOB_X1Y233,RIOB18_X107Y233,IO_L8N_T1_33
H4,33,IOB_X1Y234,RIOB18_X107Y233,IO_L8P_T1_33
H6,34,IOB_X1Y291,RIOB18_X107Y291,IO_L4N_T0_34
H7,34,IOB_X1Y292,RIOB18_X107Y291,IO_L4P_T0_34
H8,34,IOB_X1Y287,RIOB18_X107Y287,IO_L6N_T0_VREF_34
H9,34,IOB_X1Y294,RIOB18_X107Y293,IO_L3P_T0_DQS_PUDC_B_34
H11,34,IOB_X1Y297,RIOB18_X107Y297,IO_L1N_T0_34
H12,35,IOB_X1Y335,RIOB18_X107Y335,IO_L7N_T1_AD2N_35
H13,35,IOB_X1Y336,RIOB18_X107Y335,IO_L7P_T1_AD2P_35
H14,35,IOB_X1Y325,RIOB18_X107Y325,IO_L12N_T1_MRCC_35
H16,35,IOB_X1Y349,RIOB18_SING_X107Y349,IO_0_VRN_35
H17,501,IOPAD_X1Y103,PSS2_X32Y313,PS_MIO26_501
H19,501,IOPAD_X1Y97,PSS2_X32Y313,PS_MIO20_501
H21,502,IOPAD_X1Y15,PSS2_X32Y313,PS_DDR_A11_502
H22,502,IOPAD_X1Y72,PSS2_X32Y313,PS_DDR_DRST_B_502
H23,502,IOPAD_X1Y37,PSS2_X32Y313,PS_DDR_DQ5_502
H24,502,IOPAD_X1Y68,PSS2_X32Y313,PS_DDR_DQS_P0_502
H26,502,IOPAD_X1Y36,PSS2_X32Y313,PS_DDR_DQ4_502
J1,33,IOB_X1Y236,RIOB18_X107Y235,IO_L7P_T1_33
J3,33,IOB_X1Y225,RIOB18_X107Y225,IO_L12N_T1_MRCC_33
J4,33,IOB_X1Y226,RIOB18_X107Y225,IO_L12P_T1_MRCC_33
J5,33,IOB_X1Y209,RIOB18_X107Y209,IO_L20N_T3_33
J6,33,IOB_X1Y205,RIOB18_X107Y205,IO_L22N_T3_33
J8,34,IOB_X1Y288,RIOB18_X107Y287,IO_L6P_T0_34
J9,34,IOB_X1Y289,RIOB18_X107Y289,IO_L5N_T0_34
J10,34,IOB_X1Y290,RIOB18_X107Y289,IO_L5P_T0_34
J11,34,IOB_X1Y298,RIOB18_X107Y297,IO_L1P_T0_34
J13,35,IOB_X1Y333,RIOB18_X107Y333,IO_L8N_T1_AD10N_35
J14,35,IOB_X1Y326,RIOB18_X107Y325,IO_L12P_T1_MRCC_35
J15,35,IOB_X1Y331,RIOB18_X107Y331,IO_L9N_T1_DQS_AD3N_35
J16,501,IOPAD_X1Y111,PSS2_X32Y313,PS_MIO34_501
J18,501,IOPAD_X1Y105,PSS2_X32Y313,PS_MIO28_501
J19,501,IOPAD_X1Y101,PSS2_X32Y313,PS_MIO24_501
J20,502,IOPAD_X1Y18,PSS2_X32Y313,PS_DDR_A13_502
J21,502,IOPAD_X1Y11,PSS2_X32Y313,PS_DDR_A7_502
J23,502,IOPAD_X1Y39,PSS2_X32Y313,PS_DDR_DQ7_502
J24,502,IOPAD_X1Y38,PSS2_X32Y313,PS_DDR_DQ6_502
J25,502,IOPAD_X1Y34,PSS2_X32Y313,PS_DDR_DQ2_502
J26,502,IOPAD_X1Y32,PSS2_X32Y313,PS_DDR_DQ0_502
K1,33,IOB_X1Y231,RIOB18_X107Y231,IO_L9N_T1_DQS_33
K2,33,IOB_X1Y232,RIOB18_X107Y231,IO_L9P_T1_DQS_33
K3,33,IOB_X1Y227,RIOB18_X107Y227,IO_L11N_T1_SRCC_33
K5,33,IOB_X1Y210,RIOB18_X107Y209,IO_L20P_T3_33
K6,33,IOB_X1Y206,RIOB18_X107Y205,IO_L22P_T3_33
K7,33,IOB_X1Y201,RIOB18_X107Y201,IO_L24N_T3_33
K8,33,IOB_X1Y202,RIOB18_X107Y201,IO_L24P_T3_33
K10,34,IOB_X1Y250,RIOB18_SING_X107Y250,IO_25_VRP_34
K11,34,IOB_X1Y299,RIOB18_SING_X107Y299,IO_0_VRN_34
K12,35,IOB_X1Y300,RIOB18_SING_X107Y300,IO_25_VRP_35
K13,35,IOB_X1Y334,RIOB18_X107Y333,IO_L8P_T1_AD10P_35
K15,35,IOB_X1Y332,RIOB18_X107Y331,IO_L9P_T1_DQS_AD3P_35
K16,501,IOPAD_X1Y113,PSS2_X32Y313,PS_MIO36_501
K17,501,IOPAD_X1Y109,PSS2_X32Y313,PS_MIO32_501
K19,501,IOPAD_X1Y107,PSS2_X32Y313,PS_MIO30_501
K20,502,IOPAD_X1Y5,PSS2_X32Y313,PS_DDR_A1_502
K22,502,IOPAD_X1Y4,PSS2_X32Y313,PS_DDR_A0_502
K23,502,IOPAD_X1Y43,PSS2_X32Y313,PS_DDR_DQ11_502
K25,502,IOPAD_X1Y29,PSS2_X32Y313,PS_DDR_DM1_502
K26,502,IOPAD_X1Y40,PSS2_X32Y313,PS_DDR_DQ8_502
L2,33,IOB_X1Y217,RIOB18_X107Y217,IO_L16N_T2_33
L3,33,IOB_X1Y228,RIOB18_X107Y227,IO_L11P_T1_SRCC_33
L4,33,IOB_X1Y221,RIOB18_X107Y221,IO_L14N_T2_SRCC_33
L5,33,IOB_X1Y222,RIOB18_X107Y221,IO_L14P_T2_SRCC_33
L7,33,IOB_X1Y211,RIOB18_X107Y211,IO_L19N_T3_VREF_33
L8,33,IOB_X1Y207,RIOB18_X107Y207,IO_L21N_T3_DQS_33
L9,33,IOB_X1Y249,RIOB18_SING_X107Y249,IO_0_VRN_33
L20,502,IOPAD_X1Y10,PSS2_X32Y313,PS_DDR_A6_502
L22,502,IOPAD_X1Y7,PSS2_X32Y313,PS_DDR_A3_502
L23,502,IOPAD_X1Y41,PSS2_X32Y313,PS_DDR_DQ9_502
L24,502,IOPAD_X1Y69,PSS2_X32Y313,PS_DDR_DQS_P1_502
L25,502,IOPAD_X1Y65,PSS2_X32Y313,PS_DDR_DQS_N1_502
M1,33,IOB_X1Y213,RIOB18_X107Y213,IO_L18N_T2_33
M2,33,IOB_X1Y218,RIOB18_X107Y217,IO_L16P_T2_33
M4,33,IOB_X1Y215,RIOB18_X107Y215,IO_L17N_T2_33
M5,33,IOB_X1Y223,RIOB18_X107Y223,IO_L13N_T2_MRCC_33
M6,33,IOB_X1Y224,RIOB18_X107Y223,IO_L13P_T2_MRCC_33
M7,33,IOB_X1Y212,RIOB18_X107Y211,IO_L19P_T3_33
M8,33,IOB_X1Y208,RIOB18_X107Y207,IO_L21P_T3_DQS_33
M20,502,IOPAD_X1Y8,PSS2_X32Y313,PS_DDR_A4_502
M22,502,IOPAD_X1Y14,PSS2_X32Y313,PS_DDR_A10_502
M24,502,IOPAD_X1Y46,PSS2_X32Y313,PS_DDR_DQ14_502
M25,502,IOPAD_X1Y44,PSS2_X32Y313,PS_DDR_DQ12_502
M26,502,IOPAD_X1Y42,PSS2_X32Y313,PS_DDR_DQ10_502
N1,33,IOB_X1Y214,RIOB18_X107Y213,IO_L18P_T2_33
N2,33,IOB_X1Y219,RIOB18_X107Y219,IO_L15N_T2_DQS_33
N3,33,IOB_X1Y220,RIOB18_X107Y219,IO_L15P_T2_DQS_33
N4,33,IOB_X1Y216,RIOB18_X107Y215,IO_L17P_T2_33
N6,33,IOB_X1Y203,RIOB18_X107Y203,IO_L23N_T3_33
N7,33,IOB_X1Y204,RIOB18_X107Y203,IO_L23P_T3_33
N8,33,IOB_X1Y200,RIOB18_SING_X107Y200,IO_25_VRP_33
N14,0,IPAD_X0Y120,MONITOR_BOT_PELE1_X197Y339,VP_0
N21,502,IOPAD_X1Y6,PSS2_X32Y313,PS_DDR_A2_502
N22,502,IOPAD_X1Y9,PSS2_X32Y313,PS_DDR_A5_502
N23,502,IOPAD_X1Y47,PSS2_X32Y313,PS_DDR_DQ15_502
N24,502,IOPAD_X1Y45,PSS2_X32Y313,PS_DDR_DQ13_502
N26,502,IOPAD_X1Y50,PSS2_X32Y313,PS_DDR_DQ18_502
P13,0,IPAD_X0Y121,MONITOR_BOT_PELE1_X197Y339,VN_0
P20,502,IOPAD_X1Y16,PSS2_X32Y313,PS_DDR_A12_502
P21,502,IOPAD_X1Y24,PSS2_X32Y313,PS_DDR_CKN_502
P23,502,IOPAD_X1Y51,PSS2_X32Y313,PS_DDR_DQ19_502
P24,502,IOPAD_X1Y49,PSS2_X32Y313,PS_DDR_DQ17_502
P25,502,IOPAD_X1Y70,PSS2_X32Y313,PS_DDR_DQS_P2_502
P26,502,IOPAD_X1Y30,PSS2_X32Y313,PS_DDR_DM2_502
R1,112,OPAD_X0Y30,GTX_CHANNEL_3_X249Y202,MGTXTXN3_112
R2,112,OPAD_X0Y31,GTX_CHANNEL_3_X249Y202,MGTXTXP3_112
R5,112,IPAD_X1Y99,GTX_COMMON_X249Y179,MGTREFCLK0N_112
R6,112,IPAD_X1Y98,GTX_COMMON_X249Y179,MGTREFCLK0P_112
R20,502,IOPAD_X1Y17,PSS2_X32Y313,PS_DDR_A14_502
R21,502,IOPAD_X1Y25,PSS2_X32Y313,PS_DDR_CKP_502
R22,502,IOPAD_X1Y21,PSS2_X32Y313,PS_DDR_BA2_502
R23,502,IOPAD_X1Y55,PSS2_X32Y313,PS_DDR_DQ23_502
R25,502,IOPAD_X1Y66,PSS2_X32Y313,PS_DDR_DQS_N2_502
R26,502,IOPAD_X1Y48,PSS2_X32Y313,PS_DDR_DQ16_502
T3,112,IPAD_X1Y114,GTX_CHANNEL_3_X249Y202,MGTXRXN3_112
T4,112,IPAD_X1Y115,GTX_CHANNEL_3_X249Y202,MGTXRXP3_112
T20,502,IOPAD_X1Y12,PSS2_X32Y313,PS_DDR_A8_502
T22,502,IOPAD_X1Y20,PSS2_X32Y313,PS_DDR_BA1_502
T23,502,IOPAD_X1Y54,PSS2_X32Y313,PS_DDR_DQ22_502
T24,502,IOPAD_X1Y52,PSS2_X32Y313,PS_DDR_DQ20_502
T25,502,IOPAD_X1Y53,PSS2_X32Y313,PS_DDR_DQ21_502
U1,112,OPAD_X0Y28,GTX_CHANNEL_2_X249Y191,MGTXTXN2_112
U2,112,OPAD_X0Y29,GTX_CHANNEL_2_X249Y191,MGTXTXP2_112
U5,112,IPAD_X1Y101,GTX_COMMON_X249Y179,MGTREFCLK1N_112
U6,112,IPAD_X1Y100,GTX_COMMON_X249Y179,MGTREFCLK1P_112
U20,502,IOPAD_X1Y13,PSS2_X32Y313,PS_DDR_A9_502
U21,502,IOPAD_X1Y23,PSS2_X32Y313,PS_DDR_CKE_502
U22,502,IOPAD_X1Y19,PSS2_X32Y313,PS_DDR_BA0_502
U24,502,IOPAD_X1Y58,PSS2_X32Y313,PS_DDR_DQ26_502
U25,502,IOPAD_X1Y59,PSS2_X32Y313,PS_DDR_DQ27_502
U26,502,IOPAD_X1Y57,PSS2_X32Y313,PS_DDR_DQ25_502
V3,112,IPAD_X1Y108,GTX_CHANNEL_2_X249Y191,MGTXRXN2_112
V4,112,IPAD_X1Y109,GTX_CHANNEL_2_X249Y191,MGTXRXP2_112
V18,13,IOB_X0Y200,LIOB33_SING_X0Y200,IO_25_13
V19,13,IOB_X0Y249,LIOB33_SING_X0Y249,IO_0_13
V21,502,IOPAD_X1Y2,PSS2_X32Y313,PS_DDR_VRN_502
V22,502,IOPAD_X1Y1,PSS2_X32Y313,PS_DDR_WE_B_502
V23,502,IOPAD_X1Y133,PSS2_X32Y313,PS_DDR_RAS_B_502
V24,502,IOPAD_X1Y56,PSS2_X32Y313,PS_DDR_DQ24_502
V26,502,IOPAD_X1Y31,PSS2_X32Y313,PS_DDR_DM3_502
W1,112,OPAD_X0Y26,GTX_CHANNEL_1_X249Y173,MGTXTXN1_112
W2,112,OPAD_X0Y27,GTX_CHANNEL_1_X249Y173,MGTXTXP1_112
W5,111,IPAD_X1Y69,GTX_COMMON_X249Y127,MGTREFCLK0N_111
W6,111,IPAD_X1Y68,GTX_COMMON_X249Y127,MGTREFCLK0P_111
W13,12,IOB_X0Y190,LIOB33_X0Y189,IO_L5P_T0_12
W14,12,IOB_X0Y199,LIOB33_SING_X0Y199,IO_0_12
W15,12,IOB_X0Y151,LIOB33_X0Y151,IO_L24N_T3_12
W16,12,IOB_X0Y152,LIOB33_X0Y151,IO_L24P_T3_12
W17,12,IOB_X0Y150,LIOB33_SING_X0Y150,IO_25_12
W18,13,IOB_X0Y204,LIOB33_X0Y203,IO_L23P_T3_13
W19,13,IOB_X0Y203,LIOB33_X0Y203,IO_L23N_T3_13
W20,13,IOB_X0Y212,LIOB33_X0Y211,IO_L19P_T3_13
W21,502,IOPAD_X1Y3,PSS2_X32Y313,PS_DDR_VRP_502
W23,502,IOPAD_X1Y63,PSS2_X32Y313,PS_DDR_DQ31_502
W24,502,IOPAD_X1Y71,PSS2_X32Y313,PS_DDR_DQS_P3_502
W25,502,IOPAD_X1Y67,PSS2_X32Y313,PS_DDR_DQS_N3_502
W26,502,IOPAD_X1Y60,PSS2_X32Y313,PS_DDR_DQ28_502
Y3,112,IPAD_X1Y96,GTX_CHANNEL_1_X249Y173,MGTXRXN1_112
Y4,112,IPAD_X1Y97,GTX_CHANNEL_1_X249Y173,MGTXRXP1_112
Y10,12,IOB_X0Y194,LIOB33_X0Y193,IO_L3P_T0_DQS_12
Y11,12,IOB_X0Y197,LIOB33_X0Y197,IO_L1N_T0_12
Y12,12,IOB_X0Y198,LIOB33_X0Y197,IO_L1P_T0_12
Y13,12,IOB_X0Y189,LIOB33_X0Y189,IO_L5N_T0_12
Y15,12,IOB_X0Y153,LIOB33_X0Y153,IO_L23N_T3_12
Y16,12,IOB_X0Y154,LIOB33_X0Y153,IO_L23P_T3_12
Y17,12,IOB_X0Y162,LIOB33_X0Y161,IO_L19P_T3_12
Y18,13,IOB_X0Y202,LIOB33_X0Y201,IO_L24P_T3_13
Y20,13,IOB_X0Y211,LIOB33_X0Y211,IO_L19N_T3_VREF_13
Y21,502,IOPAD_X1Y27,PSS2_X32Y313,PS_DDR_CS_B_502
Y22,502,IOPAD_X1Y131,PSS2_X32Y313,PS_DDR_ODT_502
Y23,502,IOPAD_X1Y22,PSS2_X32Y313,PS_DDR_CAS_B_502
Y25,502,IOPAD_X1Y61,PSS2_X32Y313,PS_DDR_DQ29_502
Y26,502,IOPAD_X1Y62,PSS2_X32Y313,PS_DDR_DQ30_502
1 pin bank site tile pin_function
2 A2 34 IOB_X1Y251 RIOB18_X107Y251 IO_L24N_T3_34
3 A3 34 IOB_X1Y255 RIOB18_X107Y255 IO_L22N_T3_34
4 A4 34 IOB_X1Y256 RIOB18_X107Y255 IO_L22P_T3_34
5 A5 34 IOB_X1Y257 RIOB18_X107Y257 IO_L21N_T3_DQS_34
6 A7 34 IOB_X1Y263 RIOB18_X107Y263 IO_L18N_T2_34
7 A8 34 IOB_X1Y265 RIOB18_X107Y265 IO_L17N_T2_34
8 A9 34 IOB_X1Y266 RIOB18_X107Y265 IO_L17P_T2_34
9 A10 34 IOB_X1Y267 RIOB18_X107Y267 IO_L16N_T2_34
10 A12 35 IOB_X1Y301 RIOB18_X107Y301 IO_L24N_T3_AD15N_35
11 A13 35 IOB_X1Y302 RIOB18_X107Y301 IO_L24P_T3_AD15P_35
12 A14 35 IOB_X1Y307 RIOB18_X107Y307 IO_L21N_T3_DQS_AD14N_35
13 A15 35 IOB_X1Y308 RIOB18_X107Y307 IO_L21P_T3_DQS_AD14P_35
14 A17 35 IOB_X1Y313 RIOB18_X107Y313 IO_L18N_T2_AD13N_35
15 A18 501 IOPAD_X1Y126 PSS2_X32Y313 PS_MIO49_501
16 A19 501 IOPAD_X1Y130 PSS2_X32Y313 PS_MIO53_501
17 A20 501 IOPAD_X1Y129 PSS2_X32Y313 PS_MIO52_501
18 A22 501 IOPAD_X1Y134 PSS2_X32Y313 PS_SRST_B_501
19 A23 500 IOPAD_X1Y89 PSS2_X32Y313 PS_MIO12_500
20 A24 500 IOPAD_X1Y85 PSS2_X32Y313 PS_MIO8_500
21 A25 500 IOPAD_X1Y87 PSS2_X32Y313 PS_MIO10_500
22 AA1 112 OPAD_X0Y24 GTX_CHANNEL_0_X249Y162 MGTXTXN0_112
23 AA2 112 OPAD_X0Y25 GTX_CHANNEL_0_X249Y162 MGTXTXP0_112
24 AA5 111 IPAD_X1Y71 GTX_COMMON_X249Y127 MGTREFCLK1N_111
25 AA6 111 IPAD_X1Y70 GTX_COMMON_X249Y127 MGTREFCLK1P_111
26 AA10 12 IOB_X0Y193 LIOB33_X0Y193 IO_L3N_T0_DQS_12
27 AA12 12 IOB_X0Y187 LIOB33_X0Y187 IO_L6N_T0_VREF_12
28 AA13 12 IOB_X0Y188 LIOB33_X0Y187 IO_L6P_T0_12
29 AA14 12 IOB_X0Y155 LIOB33_X0Y155 IO_L22N_T3_12
30 AA15 12 IOB_X0Y156 LIOB33_X0Y155 IO_L22P_T3_12
31 AA17 12 IOB_X0Y161 LIOB33_X0Y161 IO_L19N_T3_VREF_12
32 AA18 13 IOB_X0Y201 LIOB33_X0Y201 IO_L24N_T3_13
33 AA19 13 IOB_X0Y206 LIOB33_X0Y205 IO_L22P_T3_13
34 AA20 13 IOB_X0Y210 LIOB33_X0Y209 IO_L20P_T3_13
35 AA22 13 IOB_X0Y230 LIOB33_X0Y229 IO_L10P_T1_13
36 AA23 13 IOB_X0Y229 LIOB33_X0Y229 IO_L10N_T1_13
37 AA24 13 IOB_X0Y238 LIOB33_X0Y237 IO_L6P_T0_13
38 AA25 13 IOB_X0Y248 LIOB33_X0Y247 IO_L1P_T0_13
39 AB3 112 IPAD_X1Y90 GTX_CHANNEL_0_X249Y162 MGTXRXN0_112
40 AB4 112 IPAD_X1Y91 GTX_CHANNEL_0_X249Y162 MGTXRXP0_112
41 AB10 12 IOB_X0Y191 LIOB33_X0Y191 IO_L4N_T0_12
42 AB11 12 IOB_X0Y192 LIOB33_X0Y191 IO_L4P_T0_12
43 AB12 12 IOB_X0Y196 LIOB33_X0Y195 IO_L2P_T0_12
44 AB14 12 IOB_X0Y171 LIOB33_X0Y171 IO_L14N_T2_SRCC_12
45 AB15 12 IOB_X0Y172 LIOB33_X0Y171 IO_L14P_T2_SRCC_12
46 AB16 12 IOB_X0Y159 LIOB33_X0Y159 IO_L20N_T3_12
47 AB17 12 IOB_X0Y160 LIOB33_X0Y159 IO_L20P_T3_12
48 AB19 13 IOB_X0Y205 LIOB33_X0Y205 IO_L22N_T3_13
49 AB20 13 IOB_X0Y209 LIOB33_X0Y209 IO_L20N_T3_13
50 AB21 13 IOB_X0Y232 LIOB33_X0Y231 IO_L9P_T1_DQS_13
51 AB22 13 IOB_X0Y231 LIOB33_X0Y231 IO_L9N_T1_DQS_13
52 AB24 13 IOB_X0Y237 LIOB33_X0Y237 IO_L6N_T0_VREF_13
53 AB25 13 IOB_X0Y247 LIOB33_X0Y247 IO_L1N_T0_13
54 AB26 13 IOB_X0Y246 LIOB33_X0Y245 IO_L2P_T0_13
55 AC1 111 OPAD_X0Y22 GTX_CHANNEL_3_X249Y150 MGTXTXN3_111
56 AC2 111 OPAD_X0Y23 GTX_CHANNEL_3_X249Y150 MGTXTXP3_111
57 AC5 111 IPAD_X1Y78 GTX_CHANNEL_2_X249Y139 MGTXRXN2_111
58 AC6 111 IPAD_X1Y79 GTX_CHANNEL_2_X249Y139 MGTXRXP2_111
59 AC11 12 IOB_X0Y195 LIOB33_X0Y195 IO_L2N_T0_12
60 AC12 12 IOB_X0Y178 LIOB33_X0Y177 IO_L11P_T1_SRCC_12
61 AC13 12 IOB_X0Y176 LIOB33_X0Y175 IO_L12P_T1_MRCC_12
62 AC14 12 IOB_X0Y174 LIOB33_X0Y173 IO_L13P_T2_MRCC_12
63 AC16 12 IOB_X0Y157 LIOB33_X0Y157 IO_L21N_T3_DQS_12
64 AC17 12 IOB_X0Y158 LIOB33_X0Y157 IO_L21P_T3_DQS_12
65 AC18 13 IOB_X0Y208 LIOB33_X0Y207 IO_L21P_T3_DQS_13
66 AC19 13 IOB_X0Y207 LIOB33_X0Y207 IO_L21N_T3_DQS_13
67 AC21 13 IOB_X0Y222 LIOB33_X0Y221 IO_L14P_T2_SRCC_13
68 AC22 13 IOB_X0Y221 LIOB33_X0Y221 IO_L14N_T2_SRCC_13
69 AC23 13 IOB_X0Y226 LIOB33_X0Y225 IO_L12P_T1_MRCC_13
70 AC24 13 IOB_X0Y225 LIOB33_X0Y225 IO_L12N_T1_MRCC_13
71 AC26 13 IOB_X0Y245 LIOB33_X0Y245 IO_L2N_T0_13
72 AD3 111 IPAD_X1Y84 GTX_CHANNEL_3_X249Y150 MGTXRXN3_111
73 AD4 111 IPAD_X1Y85 GTX_CHANNEL_3_X249Y150 MGTXRXP3_111
74 AD7 111 IPAD_X1Y60 GTX_CHANNEL_0_X249Y110 MGTXRXN0_111
75 AD8 111 IPAD_X1Y61 GTX_CHANNEL_0_X249Y110 MGTXRXP0_111
76 AD10 12 IOB_X0Y185 LIOB33_X0Y185 IO_L7N_T1_12
77 AD11 12 IOB_X0Y177 LIOB33_X0Y177 IO_L11N_T1_SRCC_12
78 AD13 12 IOB_X0Y175 LIOB33_X0Y175 IO_L12N_T1_MRCC_12
79 AD14 12 IOB_X0Y173 LIOB33_X0Y173 IO_L13N_T2_MRCC_12
80 AD15 12 IOB_X0Y169 LIOB33_X0Y169 IO_L15N_T2_DQS_12
81 AD16 12 IOB_X0Y170 LIOB33_X0Y169 IO_L15P_T2_DQS_12
82 AD18 13 IOB_X0Y216 LIOB33_X0Y215 IO_L17P_T2_13
83 AD19 13 IOB_X0Y215 LIOB33_X0Y215 IO_L17N_T2_13
84 AD20 13 IOB_X0Y224 LIOB33_X0Y223 IO_L13P_T2_MRCC_13
85 AD21 13 IOB_X0Y223 LIOB33_X0Y223 IO_L13N_T2_MRCC_13
86 AD23 13 IOB_X0Y228 LIOB33_X0Y227 IO_L11P_T1_SRCC_13
87 AD24 13 IOB_X0Y227 LIOB33_X0Y227 IO_L11N_T1_SRCC_13
88 AD25 13 IOB_X0Y242 LIOB33_X0Y241 IO_L4P_T0_13
89 AD26 13 IOB_X0Y241 LIOB33_X0Y241 IO_L4N_T0_13
90 AE1 111 OPAD_X0Y20 GTX_CHANNEL_2_X249Y139 MGTXTXN2_111
91 AE2 111 OPAD_X0Y21 GTX_CHANNEL_2_X249Y139 MGTXTXP2_111
92 AE5 111 IPAD_X1Y66 GTX_CHANNEL_1_X249Y121 MGTXRXN1_111
93 AE6 111 IPAD_X1Y67 GTX_CHANNEL_1_X249Y121 MGTXRXP1_111
94 AE10 12 IOB_X0Y186 LIOB33_X0Y185 IO_L7P_T1_12
95 AE11 12 IOB_X0Y182 LIOB33_X0Y181 IO_L9P_T1_DQS_12
96 AE12 12 IOB_X0Y184 LIOB33_X0Y183 IO_L8P_T1_12
97 AE13 12 IOB_X0Y180 LIOB33_X0Y179 IO_L10P_T1_12
98 AE15 12 IOB_X0Y165 LIOB33_X0Y165 IO_L17N_T2_12
99 AE16 12 IOB_X0Y166 LIOB33_X0Y165 IO_L17P_T2_12
100 AE17 12 IOB_X0Y164 LIOB33_X0Y163 IO_L18P_T2_12
101 AE18 13 IOB_X0Y214 LIOB33_X0Y213 IO_L18P_T2_13
102 AE20 13 IOB_X0Y218 LIOB33_X0Y217 IO_L16P_T2_13
103 AE21 13 IOB_X0Y217 LIOB33_X0Y217 IO_L16N_T2_13
104 AE22 13 IOB_X0Y236 LIOB33_X0Y235 IO_L7P_T1_13
105 AE23 13 IOB_X0Y234 LIOB33_X0Y233 IO_L8P_T1_13
106 AE25 13 IOB_X0Y244 LIOB33_X0Y243 IO_L3P_T0_DQS_13
107 AE26 13 IOB_X0Y243 LIOB33_X0Y243 IO_L3N_T0_DQS_13
108 AF3 111 OPAD_X0Y18 GTX_CHANNEL_1_X249Y121 MGTXTXN1_111
109 AF4 111 OPAD_X0Y19 GTX_CHANNEL_1_X249Y121 MGTXTXP1_111
110 AF7 111 OPAD_X0Y16 GTX_CHANNEL_0_X249Y110 MGTXTXN0_111
111 AF8 111 OPAD_X0Y17 GTX_CHANNEL_0_X249Y110 MGTXTXP0_111
112 AF10 12 IOB_X0Y181 LIOB33_X0Y181 IO_L9N_T1_DQS_12
113 AF12 12 IOB_X0Y183 LIOB33_X0Y183 IO_L8N_T1_12
114 AF13 12 IOB_X0Y179 LIOB33_X0Y179 IO_L10N_T1_12
115 AF14 12 IOB_X0Y167 LIOB33_X0Y167 IO_L16N_T2_12
116 AF15 12 IOB_X0Y168 LIOB33_X0Y167 IO_L16P_T2_12
117 AF17 12 IOB_X0Y163 LIOB33_X0Y163 IO_L18N_T2_12
118 AF18 13 IOB_X0Y213 LIOB33_X0Y213 IO_L18N_T2_13
119 AF19 13 IOB_X0Y220 LIOB33_X0Y219 IO_L15P_T2_DQS_13
120 AF20 13 IOB_X0Y219 LIOB33_X0Y219 IO_L15N_T2_DQS_13
121 AF22 13 IOB_X0Y235 LIOB33_X0Y235 IO_L7N_T1_13
122 AF23 13 IOB_X0Y233 LIOB33_X0Y233 IO_L8N_T1_13
123 AF24 13 IOB_X0Y240 LIOB33_X0Y239 IO_L5P_T0_13
124 AF25 13 IOB_X0Y239 LIOB33_X0Y239 IO_L5N_T0_13
125 B1 34 IOB_X1Y253 RIOB18_X107Y253 IO_L23N_T3_34
126 B2 34 IOB_X1Y252 RIOB18_X107Y251 IO_L24P_T3_34
127 B4 34 IOB_X1Y259 RIOB18_X107Y259 IO_L20N_T3_34
128 B5 34 IOB_X1Y260 RIOB18_X107Y259 IO_L20P_T3_34
129 B6 34 IOB_X1Y258 RIOB18_X107Y257 IO_L21P_T3_DQS_34
130 B7 34 IOB_X1Y264 RIOB18_X107Y263 IO_L18P_T2_34
131 B9 34 IOB_X1Y269 RIOB18_X107Y269 IO_L15N_T2_DQS_34
132 B10 34 IOB_X1Y268 RIOB18_X107Y267 IO_L16P_T2_34
133 B11 35 IOB_X1Y303 RIOB18_X107Y303 IO_L23N_T3_35
134 B12 35 IOB_X1Y305 RIOB18_X107Y305 IO_L22N_T3_AD7N_35
135 B14 35 IOB_X1Y309 RIOB18_X107Y309 IO_L20N_T3_AD6N_35
136 B15 35 IOB_X1Y315 RIOB18_X107Y315 IO_L17N_T2_AD5N_35
137 B16 35 IOB_X1Y316 RIOB18_X107Y315 IO_L17P_T2_AD5P_35
138 B17 35 IOB_X1Y314 RIOB18_X107Y313 IO_L18P_T2_AD13P_35
139 B19 501 IOPAD_X1Y124 PSS2_X32Y313 PS_MIO47_501
140 B20 501 IOPAD_X1Y128 PSS2_X32Y313 PS_MIO51_501
141 B21 501 IOPAD_X1Y125 PSS2_X32Y313 PS_MIO48_501
142 B22 501 IOPAD_X1Y127 PSS2_X32Y313 PS_MIO50_501
143 B24 500 IOPAD_X1Y26 PSS2_X32Y313 PS_CLK_500
144 B25 500 IOPAD_X1Y90 PSS2_X32Y313 PS_MIO13_500
145 B26 500 IOPAD_X1Y88 PSS2_X32Y313 PS_MIO11_500
146 C1 33 IOB_X1Y241 RIOB18_X107Y241 IO_L4N_T0_33
147 C2 34 IOB_X1Y254 RIOB18_X107Y253 IO_L23P_T3_34
148 C3 34 IOB_X1Y261 RIOB18_X107Y261 IO_L19N_T3_VREF_34
149 C4 34 IOB_X1Y262 RIOB18_X107Y261 IO_L19P_T3_34
150 C6 34 IOB_X1Y271 RIOB18_X107Y271 IO_L14N_T2_SRCC_34
151 C7 34 IOB_X1Y273 RIOB18_X107Y273 IO_L13N_T2_MRCC_34
152 C8 34 IOB_X1Y274 RIOB18_X107Y273 IO_L13P_T2_MRCC_34
153 C9 34 IOB_X1Y270 RIOB18_X107Y269 IO_L15P_T2_DQS_34
154 C11 35 IOB_X1Y304 RIOB18_X107Y303 IO_L23P_T3_35
155 C12 35 IOB_X1Y306 RIOB18_X107Y305 IO_L22P_T3_AD7P_35
156 C13 35 IOB_X1Y311 RIOB18_X107Y311 IO_L19N_T3_VREF_35
157 C14 35 IOB_X1Y310 RIOB18_X107Y309 IO_L20P_T3_AD6P_35
158 C16 35 IOB_X1Y319 RIOB18_X107Y319 IO_L15N_T2_DQS_AD12N_35
159 C17 35 IOB_X1Y320 RIOB18_X107Y319 IO_L15P_T2_DQS_AD12P_35
160 C18 501 IOPAD_X1Y122 PSS2_X32Y313 PS_MIO45_501
161 C19 501 IOPAD_X1Y118 PSS2_X32Y313 PS_MIO41_501
162 C21 501 IOPAD_X1Y116 PSS2_X32Y313 PS_MIO39_501
163 C22 501 IOPAD_X1Y117 PSS2_X32Y313 PS_MIO40_501
164 C23 500 IOPAD_X1Y132 PSS2_X32Y313 PS_POR_B_500
165 C24 500 IOPAD_X1Y92 PSS2_X32Y313 PS_MIO15_500
166 C26 500 IOPAD_X1Y82 PSS2_X32Y313 PS_MIO5_500
167 D1 33 IOB_X1Y242 RIOB18_X107Y241 IO_L4P_T0_33
168 D3 33 IOB_X1Y245 RIOB18_X107Y245 IO_L2N_T0_33
169 D4 33 IOB_X1Y246 RIOB18_X107Y245 IO_L2P_T0_33
170 D5 34 IOB_X1Y279 RIOB18_X107Y279 IO_L10N_T1_34
171 D6 34 IOB_X1Y272 RIOB18_X107Y271 IO_L14P_T2_SRCC_34
172 D8 34 IOB_X1Y283 RIOB18_X107Y283 IO_L8N_T1_34
173 D9 34 IOB_X1Y284 RIOB18_X107Y283 IO_L8P_T1_34
174 D10 35 IOB_X1Y345 RIOB18_X107Y345 IO_L2N_T0_AD8N_35
175 D11 35 IOB_X1Y341 RIOB18_X107Y341 IO_L4N_T0_35
176 D13 35 IOB_X1Y312 RIOB18_X107Y311 IO_L19P_T3_35
177 D14 35 IOB_X1Y323 RIOB18_X107Y323 IO_L13N_T2_MRCC_35
178 D15 35 IOB_X1Y324 RIOB18_X107Y323 IO_L13P_T2_MRCC_35
179 D16 35 IOB_X1Y317 RIOB18_X107Y317 IO_L16N_T2_35
180 D18 501 IOPAD_X1Y120 PSS2_X32Y313 PS_MIO43_501
181 D19 501 IOPAD_X1Y112 PSS2_X32Y313 PS_MIO35_501
182 D20 501 IOPAD_X1Y114 PSS2_X32Y313 PS_MIO37_501
183 D21 501 IOPAD_X1Y115 PSS2_X32Y313 PS_MIO38_501
184 D23 500 IOPAD_X1Y91 PSS2_X32Y313 PS_MIO14_500
185 D24 500 IOPAD_X1Y86 PSS2_X32Y313 PS_MIO9_500
186 D25 500 IOPAD_X1Y80 PSS2_X32Y313 PS_MIO3_500
187 D26 500 IOPAD_X1Y78 PSS2_X32Y313 PS_MIO1_500
188 E1 33 IOB_X1Y239 RIOB18_X107Y239 IO_L5N_T0_33
189 E2 33 IOB_X1Y240 RIOB18_X107Y239 IO_L5P_T0_33
190 E3 33 IOB_X1Y237 RIOB18_X107Y237 IO_L6N_T0_VREF_33
191 E5 34 IOB_X1Y285 RIOB18_X107Y285 IO_L7N_T1_34
192 E6 34 IOB_X1Y280 RIOB18_X107Y279 IO_L10P_T1_34
193 E7 34 IOB_X1Y277 RIOB18_X107Y277 IO_L11N_T1_SRCC_34
194 E8 34 IOB_X1Y281 RIOB18_X107Y281 IO_L9N_T1_DQS_34
195 E10 35 IOB_X1Y346 RIOB18_X107Y345 IO_L2P_T0_AD8P_35
196 E11 35 IOB_X1Y342 RIOB18_X107Y341 IO_L4P_T0_35
197 E12 35 IOB_X1Y347 RIOB18_X107Y347 IO_L1N_T0_AD0N_35
198 E13 35 IOB_X1Y337 RIOB18_X107Y337 IO_L6N_T0_VREF_35
199 E15 35 IOB_X1Y321 RIOB18_X107Y321 IO_L14N_T2_AD4N_SRCC_35
200 E16 35 IOB_X1Y318 RIOB18_X107Y317 IO_L16P_T2_35
201 E17 501 IOPAD_X1Y123 PSS2_X32Y313 PS_MIO46_501
202 E18 501 IOPAD_X1Y121 PSS2_X32Y313 PS_MIO44_501
203 E20 501 IOPAD_X1Y106 PSS2_X32Y313 PS_MIO29_501
204 E21 501 IOPAD_X1Y108 PSS2_X32Y313 PS_MIO31_501
205 E22 501 IOPAD_X1Y110 PSS2_X32Y313 PS_MIO33_501
206 E23 500 IOPAD_X1Y84 PSS2_X32Y313 PS_MIO7_500
207 E25 500 IOPAD_X1Y79 PSS2_X32Y313 PS_MIO2_500
208 E26 500 IOPAD_X1Y77 PSS2_X32Y313 PS_MIO0_500
209 F2 33 IOB_X1Y243 RIOB18_X107Y243 IO_L3N_T0_DQS_33
210 F3 33 IOB_X1Y238 RIOB18_X107Y237 IO_L6P_T0_33
211 F4 33 IOB_X1Y247 RIOB18_X107Y247 IO_L1N_T0_33
212 F5 34 IOB_X1Y286 RIOB18_X107Y285 IO_L7P_T1_34
213 F7 34 IOB_X1Y275 RIOB18_X107Y275 IO_L12N_T1_MRCC_34
214 F8 34 IOB_X1Y278 RIOB18_X107Y277 IO_L11P_T1_SRCC_34
215 F9 34 IOB_X1Y282 RIOB18_X107Y281 IO_L9P_T1_DQS_34
216 F10 35 IOB_X1Y343 RIOB18_X107Y343 IO_L3N_T0_DQS_AD1N_35
217 F12 35 IOB_X1Y348 RIOB18_X107Y347 IO_L1P_T0_AD0P_35
218 F13 35 IOB_X1Y338 RIOB18_X107Y337 IO_L6P_T0_35
219 F14 35 IOB_X1Y327 RIOB18_X107Y327 IO_L11N_T1_SRCC_35
220 F15 35 IOB_X1Y322 RIOB18_X107Y321 IO_L14P_T2_AD4P_SRCC_35
221 F17 501 IOPAD_X1Y119 PSS2_X32Y313 PS_MIO42_501
222 F18 501 IOPAD_X1Y104 PSS2_X32Y313 PS_MIO27_501
223 F19 501 IOPAD_X1Y102 PSS2_X32Y313 PS_MIO25_501
224 F20 501 IOPAD_X1Y100 PSS2_X32Y313 PS_MIO23_501
225 F22 501 IOPAD_X1Y98 PSS2_X32Y313 PS_MIO21_501
226 F23 500 IOPAD_X1Y83 PSS2_X32Y313 PS_MIO6_500
227 F24 500 IOPAD_X1Y81 PSS2_X32Y313 PS_MIO4_500
228 F25 502 IOPAD_X1Y33 PSS2_X32Y313 PS_DDR_DQ1_502
229 G1 33 IOB_X1Y229 RIOB18_X107Y229 IO_L10N_T1_33
230 G2 33 IOB_X1Y244 RIOB18_X107Y243 IO_L3P_T0_DQS_33
231 G4 33 IOB_X1Y248 RIOB18_X107Y247 IO_L1P_T0_33
232 G5 34 IOB_X1Y295 RIOB18_X107Y295 IO_L2N_T0_34
233 G6 34 IOB_X1Y296 RIOB18_X107Y295 IO_L2P_T0_34
234 G7 34 IOB_X1Y276 RIOB18_X107Y275 IO_L12P_T1_MRCC_34
235 G9 34 IOB_X1Y293 RIOB18_X107Y293 IO_L3N_T0_DQS_34
236 G10 35 IOB_X1Y344 RIOB18_X107Y343 IO_L3P_T0_DQS_AD1P_35
237 G11 35 IOB_X1Y339 RIOB18_X107Y339 IO_L5N_T0_AD9N_35
238 G12 35 IOB_X1Y340 RIOB18_X107Y339 IO_L5P_T0_AD9P_35
239 G14 35 IOB_X1Y328 RIOB18_X107Y327 IO_L11P_T1_SRCC_35
240 G15 35 IOB_X1Y329 RIOB18_X107Y329 IO_L10N_T1_AD11N_35
241 G16 35 IOB_X1Y330 RIOB18_X107Y329 IO_L10P_T1_AD11P_35
242 G17 501 IOPAD_X1Y94 PSS2_X32Y313 PS_MIO17_501
243 G19 501 IOPAD_X1Y96 PSS2_X32Y313 PS_MIO19_501
244 G20 501 IOPAD_X1Y95 PSS2_X32Y313 PS_MIO18_501
245 G21 501 IOPAD_X1Y93 PSS2_X32Y313 PS_MIO16_501
246 G22 501 IOPAD_X1Y99 PSS2_X32Y313 PS_MIO22_501
247 G24 502 IOPAD_X1Y28 PSS2_X32Y313 PS_DDR_DM0_502
248 G25 502 IOPAD_X1Y64 PSS2_X32Y313 PS_DDR_DQS_N0_502
249 G26 502 IOPAD_X1Y35 PSS2_X32Y313 PS_DDR_DQ3_502
250 H1 33 IOB_X1Y235 RIOB18_X107Y235 IO_L7N_T1_33
251 H2 33 IOB_X1Y230 RIOB18_X107Y229 IO_L10P_T1_33
252 H3 33 IOB_X1Y233 RIOB18_X107Y233 IO_L8N_T1_33
253 H4 33 IOB_X1Y234 RIOB18_X107Y233 IO_L8P_T1_33
254 H6 34 IOB_X1Y291 RIOB18_X107Y291 IO_L4N_T0_34
255 H7 34 IOB_X1Y292 RIOB18_X107Y291 IO_L4P_T0_34
256 H8 34 IOB_X1Y287 RIOB18_X107Y287 IO_L6N_T0_VREF_34
257 H9 34 IOB_X1Y294 RIOB18_X107Y293 IO_L3P_T0_DQS_PUDC_B_34
258 H11 34 IOB_X1Y297 RIOB18_X107Y297 IO_L1N_T0_34
259 H12 35 IOB_X1Y335 RIOB18_X107Y335 IO_L7N_T1_AD2N_35
260 H13 35 IOB_X1Y336 RIOB18_X107Y335 IO_L7P_T1_AD2P_35
261 H14 35 IOB_X1Y325 RIOB18_X107Y325 IO_L12N_T1_MRCC_35
262 H16 35 IOB_X1Y349 RIOB18_SING_X107Y349 IO_0_VRN_35
263 H17 501 IOPAD_X1Y103 PSS2_X32Y313 PS_MIO26_501
264 H19 501 IOPAD_X1Y97 PSS2_X32Y313 PS_MIO20_501
265 H21 502 IOPAD_X1Y15 PSS2_X32Y313 PS_DDR_A11_502
266 H22 502 IOPAD_X1Y72 PSS2_X32Y313 PS_DDR_DRST_B_502
267 H23 502 IOPAD_X1Y37 PSS2_X32Y313 PS_DDR_DQ5_502
268 H24 502 IOPAD_X1Y68 PSS2_X32Y313 PS_DDR_DQS_P0_502
269 H26 502 IOPAD_X1Y36 PSS2_X32Y313 PS_DDR_DQ4_502
270 J1 33 IOB_X1Y236 RIOB18_X107Y235 IO_L7P_T1_33
271 J3 33 IOB_X1Y225 RIOB18_X107Y225 IO_L12N_T1_MRCC_33
272 J4 33 IOB_X1Y226 RIOB18_X107Y225 IO_L12P_T1_MRCC_33
273 J5 33 IOB_X1Y209 RIOB18_X107Y209 IO_L20N_T3_33
274 J6 33 IOB_X1Y205 RIOB18_X107Y205 IO_L22N_T3_33
275 J8 34 IOB_X1Y288 RIOB18_X107Y287 IO_L6P_T0_34
276 J9 34 IOB_X1Y289 RIOB18_X107Y289 IO_L5N_T0_34
277 J10 34 IOB_X1Y290 RIOB18_X107Y289 IO_L5P_T0_34
278 J11 34 IOB_X1Y298 RIOB18_X107Y297 IO_L1P_T0_34
279 J13 35 IOB_X1Y333 RIOB18_X107Y333 IO_L8N_T1_AD10N_35
280 J14 35 IOB_X1Y326 RIOB18_X107Y325 IO_L12P_T1_MRCC_35
281 J15 35 IOB_X1Y331 RIOB18_X107Y331 IO_L9N_T1_DQS_AD3N_35
282 J16 501 IOPAD_X1Y111 PSS2_X32Y313 PS_MIO34_501
283 J18 501 IOPAD_X1Y105 PSS2_X32Y313 PS_MIO28_501
284 J19 501 IOPAD_X1Y101 PSS2_X32Y313 PS_MIO24_501
285 J20 502 IOPAD_X1Y18 PSS2_X32Y313 PS_DDR_A13_502
286 J21 502 IOPAD_X1Y11 PSS2_X32Y313 PS_DDR_A7_502
287 J23 502 IOPAD_X1Y39 PSS2_X32Y313 PS_DDR_DQ7_502
288 J24 502 IOPAD_X1Y38 PSS2_X32Y313 PS_DDR_DQ6_502
289 J25 502 IOPAD_X1Y34 PSS2_X32Y313 PS_DDR_DQ2_502
290 J26 502 IOPAD_X1Y32 PSS2_X32Y313 PS_DDR_DQ0_502
291 K1 33 IOB_X1Y231 RIOB18_X107Y231 IO_L9N_T1_DQS_33
292 K2 33 IOB_X1Y232 RIOB18_X107Y231 IO_L9P_T1_DQS_33
293 K3 33 IOB_X1Y227 RIOB18_X107Y227 IO_L11N_T1_SRCC_33
294 K5 33 IOB_X1Y210 RIOB18_X107Y209 IO_L20P_T3_33
295 K6 33 IOB_X1Y206 RIOB18_X107Y205 IO_L22P_T3_33
296 K7 33 IOB_X1Y201 RIOB18_X107Y201 IO_L24N_T3_33
297 K8 33 IOB_X1Y202 RIOB18_X107Y201 IO_L24P_T3_33
298 K10 34 IOB_X1Y250 RIOB18_SING_X107Y250 IO_25_VRP_34
299 K11 34 IOB_X1Y299 RIOB18_SING_X107Y299 IO_0_VRN_34
300 K12 35 IOB_X1Y300 RIOB18_SING_X107Y300 IO_25_VRP_35
301 K13 35 IOB_X1Y334 RIOB18_X107Y333 IO_L8P_T1_AD10P_35
302 K15 35 IOB_X1Y332 RIOB18_X107Y331 IO_L9P_T1_DQS_AD3P_35
303 K16 501 IOPAD_X1Y113 PSS2_X32Y313 PS_MIO36_501
304 K17 501 IOPAD_X1Y109 PSS2_X32Y313 PS_MIO32_501
305 K19 501 IOPAD_X1Y107 PSS2_X32Y313 PS_MIO30_501
306 K20 502 IOPAD_X1Y5 PSS2_X32Y313 PS_DDR_A1_502
307 K22 502 IOPAD_X1Y4 PSS2_X32Y313 PS_DDR_A0_502
308 K23 502 IOPAD_X1Y43 PSS2_X32Y313 PS_DDR_DQ11_502
309 K25 502 IOPAD_X1Y29 PSS2_X32Y313 PS_DDR_DM1_502
310 K26 502 IOPAD_X1Y40 PSS2_X32Y313 PS_DDR_DQ8_502
311 L2 33 IOB_X1Y217 RIOB18_X107Y217 IO_L16N_T2_33
312 L3 33 IOB_X1Y228 RIOB18_X107Y227 IO_L11P_T1_SRCC_33
313 L4 33 IOB_X1Y221 RIOB18_X107Y221 IO_L14N_T2_SRCC_33
314 L5 33 IOB_X1Y222 RIOB18_X107Y221 IO_L14P_T2_SRCC_33
315 L7 33 IOB_X1Y211 RIOB18_X107Y211 IO_L19N_T3_VREF_33
316 L8 33 IOB_X1Y207 RIOB18_X107Y207 IO_L21N_T3_DQS_33
317 L9 33 IOB_X1Y249 RIOB18_SING_X107Y249 IO_0_VRN_33
318 L20 502 IOPAD_X1Y10 PSS2_X32Y313 PS_DDR_A6_502
319 L22 502 IOPAD_X1Y7 PSS2_X32Y313 PS_DDR_A3_502
320 L23 502 IOPAD_X1Y41 PSS2_X32Y313 PS_DDR_DQ9_502
321 L24 502 IOPAD_X1Y69 PSS2_X32Y313 PS_DDR_DQS_P1_502
322 L25 502 IOPAD_X1Y65 PSS2_X32Y313 PS_DDR_DQS_N1_502
323 M1 33 IOB_X1Y213 RIOB18_X107Y213 IO_L18N_T2_33
324 M2 33 IOB_X1Y218 RIOB18_X107Y217 IO_L16P_T2_33
325 M4 33 IOB_X1Y215 RIOB18_X107Y215 IO_L17N_T2_33
326 M5 33 IOB_X1Y223 RIOB18_X107Y223 IO_L13N_T2_MRCC_33
327 M6 33 IOB_X1Y224 RIOB18_X107Y223 IO_L13P_T2_MRCC_33
328 M7 33 IOB_X1Y212 RIOB18_X107Y211 IO_L19P_T3_33
329 M8 33 IOB_X1Y208 RIOB18_X107Y207 IO_L21P_T3_DQS_33
330 M20 502 IOPAD_X1Y8 PSS2_X32Y313 PS_DDR_A4_502
331 M22 502 IOPAD_X1Y14 PSS2_X32Y313 PS_DDR_A10_502
332 M24 502 IOPAD_X1Y46 PSS2_X32Y313 PS_DDR_DQ14_502
333 M25 502 IOPAD_X1Y44 PSS2_X32Y313 PS_DDR_DQ12_502
334 M26 502 IOPAD_X1Y42 PSS2_X32Y313 PS_DDR_DQ10_502
335 N1 33 IOB_X1Y214 RIOB18_X107Y213 IO_L18P_T2_33
336 N2 33 IOB_X1Y219 RIOB18_X107Y219 IO_L15N_T2_DQS_33
337 N3 33 IOB_X1Y220 RIOB18_X107Y219 IO_L15P_T2_DQS_33
338 N4 33 IOB_X1Y216 RIOB18_X107Y215 IO_L17P_T2_33
339 N6 33 IOB_X1Y203 RIOB18_X107Y203 IO_L23N_T3_33
340 N7 33 IOB_X1Y204 RIOB18_X107Y203 IO_L23P_T3_33
341 N8 33 IOB_X1Y200 RIOB18_SING_X107Y200 IO_25_VRP_33
342 N14 0 IPAD_X0Y120 MONITOR_BOT_PELE1_X197Y339 VP_0
343 N21 502 IOPAD_X1Y6 PSS2_X32Y313 PS_DDR_A2_502
344 N22 502 IOPAD_X1Y9 PSS2_X32Y313 PS_DDR_A5_502
345 N23 502 IOPAD_X1Y47 PSS2_X32Y313 PS_DDR_DQ15_502
346 N24 502 IOPAD_X1Y45 PSS2_X32Y313 PS_DDR_DQ13_502
347 N26 502 IOPAD_X1Y50 PSS2_X32Y313 PS_DDR_DQ18_502
348 P13 0 IPAD_X0Y121 MONITOR_BOT_PELE1_X197Y339 VN_0
349 P20 502 IOPAD_X1Y16 PSS2_X32Y313 PS_DDR_A12_502
350 P21 502 IOPAD_X1Y24 PSS2_X32Y313 PS_DDR_CKN_502
351 P23 502 IOPAD_X1Y51 PSS2_X32Y313 PS_DDR_DQ19_502
352 P24 502 IOPAD_X1Y49 PSS2_X32Y313 PS_DDR_DQ17_502
353 P25 502 IOPAD_X1Y70 PSS2_X32Y313 PS_DDR_DQS_P2_502
354 P26 502 IOPAD_X1Y30 PSS2_X32Y313 PS_DDR_DM2_502
355 R1 112 OPAD_X0Y30 GTX_CHANNEL_3_X249Y202 MGTXTXN3_112
356 R2 112 OPAD_X0Y31 GTX_CHANNEL_3_X249Y202 MGTXTXP3_112
357 R5 112 IPAD_X1Y99 GTX_COMMON_X249Y179 MGTREFCLK0N_112
358 R6 112 IPAD_X1Y98 GTX_COMMON_X249Y179 MGTREFCLK0P_112
359 R20 502 IOPAD_X1Y17 PSS2_X32Y313 PS_DDR_A14_502
360 R21 502 IOPAD_X1Y25 PSS2_X32Y313 PS_DDR_CKP_502
361 R22 502 IOPAD_X1Y21 PSS2_X32Y313 PS_DDR_BA2_502
362 R23 502 IOPAD_X1Y55 PSS2_X32Y313 PS_DDR_DQ23_502
363 R25 502 IOPAD_X1Y66 PSS2_X32Y313 PS_DDR_DQS_N2_502
364 R26 502 IOPAD_X1Y48 PSS2_X32Y313 PS_DDR_DQ16_502
365 T3 112 IPAD_X1Y114 GTX_CHANNEL_3_X249Y202 MGTXRXN3_112
366 T4 112 IPAD_X1Y115 GTX_CHANNEL_3_X249Y202 MGTXRXP3_112
367 T20 502 IOPAD_X1Y12 PSS2_X32Y313 PS_DDR_A8_502
368 T22 502 IOPAD_X1Y20 PSS2_X32Y313 PS_DDR_BA1_502
369 T23 502 IOPAD_X1Y54 PSS2_X32Y313 PS_DDR_DQ22_502
370 T24 502 IOPAD_X1Y52 PSS2_X32Y313 PS_DDR_DQ20_502
371 T25 502 IOPAD_X1Y53 PSS2_X32Y313 PS_DDR_DQ21_502
372 U1 112 OPAD_X0Y28 GTX_CHANNEL_2_X249Y191 MGTXTXN2_112
373 U2 112 OPAD_X0Y29 GTX_CHANNEL_2_X249Y191 MGTXTXP2_112
374 U5 112 IPAD_X1Y101 GTX_COMMON_X249Y179 MGTREFCLK1N_112
375 U6 112 IPAD_X1Y100 GTX_COMMON_X249Y179 MGTREFCLK1P_112
376 U20 502 IOPAD_X1Y13 PSS2_X32Y313 PS_DDR_A9_502
377 U21 502 IOPAD_X1Y23 PSS2_X32Y313 PS_DDR_CKE_502
378 U22 502 IOPAD_X1Y19 PSS2_X32Y313 PS_DDR_BA0_502
379 U24 502 IOPAD_X1Y58 PSS2_X32Y313 PS_DDR_DQ26_502
380 U25 502 IOPAD_X1Y59 PSS2_X32Y313 PS_DDR_DQ27_502
381 U26 502 IOPAD_X1Y57 PSS2_X32Y313 PS_DDR_DQ25_502
382 V3 112 IPAD_X1Y108 GTX_CHANNEL_2_X249Y191 MGTXRXN2_112
383 V4 112 IPAD_X1Y109 GTX_CHANNEL_2_X249Y191 MGTXRXP2_112
384 V18 13 IOB_X0Y200 LIOB33_SING_X0Y200 IO_25_13
385 V19 13 IOB_X0Y249 LIOB33_SING_X0Y249 IO_0_13
386 V21 502 IOPAD_X1Y2 PSS2_X32Y313 PS_DDR_VRN_502
387 V22 502 IOPAD_X1Y1 PSS2_X32Y313 PS_DDR_WE_B_502
388 V23 502 IOPAD_X1Y133 PSS2_X32Y313 PS_DDR_RAS_B_502
389 V24 502 IOPAD_X1Y56 PSS2_X32Y313 PS_DDR_DQ24_502
390 V26 502 IOPAD_X1Y31 PSS2_X32Y313 PS_DDR_DM3_502
391 W1 112 OPAD_X0Y26 GTX_CHANNEL_1_X249Y173 MGTXTXN1_112
392 W2 112 OPAD_X0Y27 GTX_CHANNEL_1_X249Y173 MGTXTXP1_112
393 W5 111 IPAD_X1Y69 GTX_COMMON_X249Y127 MGTREFCLK0N_111
394 W6 111 IPAD_X1Y68 GTX_COMMON_X249Y127 MGTREFCLK0P_111
395 W13 12 IOB_X0Y190 LIOB33_X0Y189 IO_L5P_T0_12
396 W14 12 IOB_X0Y199 LIOB33_SING_X0Y199 IO_0_12
397 W15 12 IOB_X0Y151 LIOB33_X0Y151 IO_L24N_T3_12
398 W16 12 IOB_X0Y152 LIOB33_X0Y151 IO_L24P_T3_12
399 W17 12 IOB_X0Y150 LIOB33_SING_X0Y150 IO_25_12
400 W18 13 IOB_X0Y204 LIOB33_X0Y203 IO_L23P_T3_13
401 W19 13 IOB_X0Y203 LIOB33_X0Y203 IO_L23N_T3_13
402 W20 13 IOB_X0Y212 LIOB33_X0Y211 IO_L19P_T3_13
403 W21 502 IOPAD_X1Y3 PSS2_X32Y313 PS_DDR_VRP_502
404 W23 502 IOPAD_X1Y63 PSS2_X32Y313 PS_DDR_DQ31_502
405 W24 502 IOPAD_X1Y71 PSS2_X32Y313 PS_DDR_DQS_P3_502
406 W25 502 IOPAD_X1Y67 PSS2_X32Y313 PS_DDR_DQS_N3_502
407 W26 502 IOPAD_X1Y60 PSS2_X32Y313 PS_DDR_DQ28_502
408 Y3 112 IPAD_X1Y96 GTX_CHANNEL_1_X249Y173 MGTXRXN1_112
409 Y4 112 IPAD_X1Y97 GTX_CHANNEL_1_X249Y173 MGTXRXP1_112
410 Y10 12 IOB_X0Y194 LIOB33_X0Y193 IO_L3P_T0_DQS_12
411 Y11 12 IOB_X0Y197 LIOB33_X0Y197 IO_L1N_T0_12
412 Y12 12 IOB_X0Y198 LIOB33_X0Y197 IO_L1P_T0_12
413 Y13 12 IOB_X0Y189 LIOB33_X0Y189 IO_L5N_T0_12
414 Y15 12 IOB_X0Y153 LIOB33_X0Y153 IO_L23N_T3_12
415 Y16 12 IOB_X0Y154 LIOB33_X0Y153 IO_L23P_T3_12
416 Y17 12 IOB_X0Y162 LIOB33_X0Y161 IO_L19P_T3_12
417 Y18 13 IOB_X0Y202 LIOB33_X0Y201 IO_L24P_T3_13
418 Y20 13 IOB_X0Y211 LIOB33_X0Y211 IO_L19N_T3_VREF_13
419 Y21 502 IOPAD_X1Y27 PSS2_X32Y313 PS_DDR_CS_B_502
420 Y22 502 IOPAD_X1Y131 PSS2_X32Y313 PS_DDR_ODT_502
421 Y23 502 IOPAD_X1Y22 PSS2_X32Y313 PS_DDR_CAS_B_502
422 Y25 502 IOPAD_X1Y61 PSS2_X32Y313 PS_DDR_DQ29_502
423 Y26 502 IOPAD_X1Y62 PSS2_X32Y313 PS_DDR_DQ30_502

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