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Updating all based on "Merge pull request #1301 from antmicro/licensing". 

See [Info File](Info.md) for details.

Including the new zynq7/xc7z0020clg400-1 part but excluding weird
changes in SDF files.

Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
This commit is contained in:
Tim 'mithro' Ansell 2020-05-28 10:39:17 -07:00 committed by Tim 'mithro' Ansell
parent 08c140e1c5
commit 20adf09d39
32 changed files with 936275 additions and 72 deletions
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97
Info.md
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@ -37,20 +37,20 @@ These files are released under the very permissive [CC0 1.0 Universal](COPYING).
# Details
Last updated on Tue 26 May 2020 03:52:53 PM UTC (2020-05-26T15:52:53+00:00).
Last updated on Fri May 29 22:38:36 UTC 2020 (2020-05-29T22:38:36+00:00).
Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [e81bd909](https://github.com/SymbiFlow/prjxray/commit/e81bd90964d0dac70db7d98e7ed7ecd2cc7b57e0).
Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [1f410829](https://github.com/SymbiFlow/prjxray/commit/1f410829371e774e0cfa0e01bd3c46d85dbb49b6).
Latest commit was;
```
commit e81bd90964d0dac70db7d98e7ed7ecd2cc7b57e0
Merge: a7d0c84c a20b821c
Author: SymbiFlow Robot <foss-fpga-tools-bot@google.com>
Date: Sat May 23 05:31:20 2020 -0700
commit 1f410829371e774e0cfa0e01bd3c46d85dbb49b6
Merge: a3615354 f0d4a713
Author: Tim Ansell <me@mith.ro>
Date: Tue May 26 09:01:50 2020 -0700
Merge pull request #1339 from SymbiFlow/dependabot/submodules/third_party/cctz-24e9dcf
Merge pull request #1301 from antmicro/licensing
Bump third_party/cctz from `00f4089` to `24e9dcf`
Updating copyright headers to match current best practices
```
@ -59,8 +59,15 @@ Date: Sat May 23 05:31:20 2020 -0700
### Settings
Created using following [settings/artix7.sh (sha256: e080f892077c6d49f06f4709a433771d273b5a79f59baaa3c6d85ca7540f5336)](https://github.com/SymbiFlow/prjxray/blob/e81bd90964d0dac70db7d98e7ed7ecd2cc7b57e0/settings/artix7.sh)
Created using following [settings/artix7.sh (sha256: 56ee1f9747510a62c9ea078738b273f4dcbaeca49aa98334db6ef1a9ececa9a7)](https://github.com/SymbiFlow/prjxray/blob/1f410829371e774e0cfa0e01bd3c46d85dbb49b6/settings/artix7.sh)
```shell
# Copyright (C) 2017-2020 The Project X-Ray Authors.
#
# Use of this source code is governed by a ISC-style
# license that can be found in the LICENSE file or at
# https://opensource.org/licenses/ISC
#
# SPDX-License-Identifier: ISC
export XRAY_DATABASE="artix7"
export XRAY_PART="xc7a50tfgg484-1"
export XRAY_ROI_FRAMES="0x00000000:0xffffffff"
@ -159,13 +166,13 @@ Results have checksums;
* [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd ./artix7/mask_hclk_r.db`](./artix7/mask_hclk_r.db)
* [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./artix7/mask_hclk_r.origin_info.db`](./artix7/mask_hclk_r.origin_info.db)
* [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6 ./artix7/mask_liob33.db`](./artix7/mask_liob33.db)
* [`42a673bf372466a9d6487b377b528c0cb0d33c6f1d31047b4a5db41c77feac8b ./artix7/mask_lioi3.db`](./artix7/mask_lioi3.db)
* [`42a673bf372466a9d6487b377b528c0cb0d33c6f1d31047b4a5db41c77feac8b ./artix7/mask_lioi3_tbytesrc.db`](./artix7/mask_lioi3_tbytesrc.db)
* [`42a673bf372466a9d6487b377b528c0cb0d33c6f1d31047b4a5db41c77feac8b ./artix7/mask_lioi3_tbyteterm.db`](./artix7/mask_lioi3_tbyteterm.db)
* [`f665e297181be0a1ed08f33873068b4fe4cefcb85118e30b85548c117d5fa63c ./artix7/mask_lioi3.db`](./artix7/mask_lioi3.db)
* [`f665e297181be0a1ed08f33873068b4fe4cefcb85118e30b85548c117d5fa63c ./artix7/mask_lioi3_tbytesrc.db`](./artix7/mask_lioi3_tbytesrc.db)
* [`f665e297181be0a1ed08f33873068b4fe4cefcb85118e30b85548c117d5fa63c ./artix7/mask_lioi3_tbyteterm.db`](./artix7/mask_lioi3_tbyteterm.db)
* [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6 ./artix7/mask_riob33.db`](./artix7/mask_riob33.db)
* [`42a673bf372466a9d6487b377b528c0cb0d33c6f1d31047b4a5db41c77feac8b ./artix7/mask_rioi3.db`](./artix7/mask_rioi3.db)
* [`42a673bf372466a9d6487b377b528c0cb0d33c6f1d31047b4a5db41c77feac8b ./artix7/mask_rioi3_tbytesrc.db`](./artix7/mask_rioi3_tbytesrc.db)
* [`42a673bf372466a9d6487b377b528c0cb0d33c6f1d31047b4a5db41c77feac8b ./artix7/mask_rioi3_tbyteterm.db`](./artix7/mask_rioi3_tbyteterm.db)
* [`f665e297181be0a1ed08f33873068b4fe4cefcb85118e30b85548c117d5fa63c ./artix7/mask_rioi3.db`](./artix7/mask_rioi3.db)
* [`f665e297181be0a1ed08f33873068b4fe4cefcb85118e30b85548c117d5fa63c ./artix7/mask_rioi3_tbytesrc.db`](./artix7/mask_rioi3_tbytesrc.db)
* [`f665e297181be0a1ed08f33873068b4fe4cefcb85118e30b85548c117d5fa63c ./artix7/mask_rioi3_tbyteterm.db`](./artix7/mask_rioi3_tbyteterm.db)
* [`d94e4d13df16da498224f0e94deaa310fbf471b6f9ec0ec8b2308fe62fa2eeaf ./artix7/ppips_bram_int_interface_l.db`](./artix7/ppips_bram_int_interface_l.db)
* [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./artix7/ppips_bram_int_interface_l.origin_info.db`](./artix7/ppips_bram_int_interface_l.origin_info.db)
* [`b48d766ac6f9dd0e21280d3a04dd448ea39016143309c0c7867fc00d730a59ae ./artix7/ppips_bram_int_interface_r.db`](./artix7/ppips_bram_int_interface_r.db)
@ -268,9 +275,9 @@ Results have checksums;
* [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9 ./artix7/segbits_hclk_r.db`](./artix7/segbits_hclk_r.db)
* [`61d05145f3613042e8f0c1d97d63f6c185cfb66df609b621b44422ebb27c77a0 ./artix7/segbits_hclk_r.origin_info.db`](./artix7/segbits_hclk_r.origin_info.db)
* [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520 ./artix7/segbits_int_l.db`](./artix7/segbits_int_l.db)
* [`9422a0e25afbca0dcdfa5ee5e5c24eb067b120dc1cdbd625ea250383cd11beba ./artix7/segbits_int_l.origin_info.db`](./artix7/segbits_int_l.origin_info.db)
* [`2121c60583cfd3e540e8e221062347bf3c8832ab2f48cd6aaa093a6b98faeb5f ./artix7/segbits_int_l.origin_info.db`](./artix7/segbits_int_l.origin_info.db)
* [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556 ./artix7/segbits_int_r.db`](./artix7/segbits_int_r.db)
* [`a8eace4ecc0832e8ddc26afec882037a51762ef24daad2a87e07244bb6a5852d ./artix7/segbits_int_r.origin_info.db`](./artix7/segbits_int_r.origin_info.db)
* [`dfc24f85f911506d462d789aa76a80f0441544ca0b83f2473859b5697521dfa3 ./artix7/segbits_int_r.origin_info.db`](./artix7/segbits_int_r.origin_info.db)
* [`392e91def4df6eebb3ce5ed15570c01f6090be793a79054e1880549082eb6f23 ./artix7/segbits_liob33.db`](./artix7/segbits_liob33.db)
* [`0fca9c6530589b14c77b738e68c63ed4246713e44e1e699e153b69907e77e09e ./artix7/segbits_liob33.origin_info.db`](./artix7/segbits_liob33.origin_info.db)
* [`c9dfa75f8b565b3c47813cdf7f1df2aa7c59402f41396e939dd97ec68f7638d8 ./artix7/segbits_lioi3.db`](./artix7/segbits_lioi3.db)
@ -556,8 +563,15 @@ Results have checksums;
### Settings
Created using following [settings/kintex7.sh (sha256: 845b1414faf8d98843ae2886a273625000548289cc8f0d3635c94599d38cdb81)](https://github.com/SymbiFlow/prjxray/blob/e81bd90964d0dac70db7d98e7ed7ecd2cc7b57e0/settings/kintex7.sh)
Created using following [settings/kintex7.sh (sha256: 8c4c506cbdc6a25696436bbe6359e3617c82a11931ad6e406a1c433b263527c4)](https://github.com/SymbiFlow/prjxray/blob/1f410829371e774e0cfa0e01bd3c46d85dbb49b6/settings/kintex7.sh)
```shell
# Copyright (C) 2017-2020 The Project X-Ray Authors.
#
# Use of this source code is governed by a ISC-style
# license that can be found in the LICENSE file or at
# https://opensource.org/licenses/ISC
#
# SPDX-License-Identifier: ISC
export XRAY_DATABASE="kintex7"
export XRAY_PART="xc7k70tfbg676-2"
export XRAY_ROI_FRAMES="0x00000000:0xffffffff"
@ -628,13 +642,13 @@ Results have checksums;
* [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd ./kintex7/mask_hclk_r.db`](./kintex7/mask_hclk_r.db)
* [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./kintex7/mask_hclk_r.origin_info.db`](./kintex7/mask_hclk_r.origin_info.db)
* [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6 ./kintex7/mask_liob33.db`](./kintex7/mask_liob33.db)
* [`7db4e012a058ddedde6f42fd3cf00105d56ae9695e6755b52c421bfc32e404a8 ./kintex7/mask_lioi3.db`](./kintex7/mask_lioi3.db)
* [`7db4e012a058ddedde6f42fd3cf00105d56ae9695e6755b52c421bfc32e404a8 ./kintex7/mask_lioi3_tbytesrc.db`](./kintex7/mask_lioi3_tbytesrc.db)
* [`7db4e012a058ddedde6f42fd3cf00105d56ae9695e6755b52c421bfc32e404a8 ./kintex7/mask_lioi3_tbyteterm.db`](./kintex7/mask_lioi3_tbyteterm.db)
* [`e9c5e8644b7f426944df2adaecb6e4813097034cfe78ab469d9b675e169b60d4 ./kintex7/mask_lioi3.db`](./kintex7/mask_lioi3.db)
* [`e9c5e8644b7f426944df2adaecb6e4813097034cfe78ab469d9b675e169b60d4 ./kintex7/mask_lioi3_tbytesrc.db`](./kintex7/mask_lioi3_tbytesrc.db)
* [`e9c5e8644b7f426944df2adaecb6e4813097034cfe78ab469d9b675e169b60d4 ./kintex7/mask_lioi3_tbyteterm.db`](./kintex7/mask_lioi3_tbyteterm.db)
* [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6 ./kintex7/mask_riob33.db`](./kintex7/mask_riob33.db)
* [`7db4e012a058ddedde6f42fd3cf00105d56ae9695e6755b52c421bfc32e404a8 ./kintex7/mask_rioi3.db`](./kintex7/mask_rioi3.db)
* [`7db4e012a058ddedde6f42fd3cf00105d56ae9695e6755b52c421bfc32e404a8 ./kintex7/mask_rioi3_tbytesrc.db`](./kintex7/mask_rioi3_tbytesrc.db)
* [`7db4e012a058ddedde6f42fd3cf00105d56ae9695e6755b52c421bfc32e404a8 ./kintex7/mask_rioi3_tbyteterm.db`](./kintex7/mask_rioi3_tbyteterm.db)
* [`e9c5e8644b7f426944df2adaecb6e4813097034cfe78ab469d9b675e169b60d4 ./kintex7/mask_rioi3.db`](./kintex7/mask_rioi3.db)
* [`e9c5e8644b7f426944df2adaecb6e4813097034cfe78ab469d9b675e169b60d4 ./kintex7/mask_rioi3_tbytesrc.db`](./kintex7/mask_rioi3_tbytesrc.db)
* [`e9c5e8644b7f426944df2adaecb6e4813097034cfe78ab469d9b675e169b60d4 ./kintex7/mask_rioi3_tbyteterm.db`](./kintex7/mask_rioi3_tbyteterm.db)
* [`d94e4d13df16da498224f0e94deaa310fbf471b6f9ec0ec8b2308fe62fa2eeaf ./kintex7/ppips_bram_int_interface_l.db`](./kintex7/ppips_bram_int_interface_l.db)
* [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./kintex7/ppips_bram_int_interface_l.origin_info.db`](./kintex7/ppips_bram_int_interface_l.origin_info.db)
* [`b48d766ac6f9dd0e21280d3a04dd448ea39016143309c0c7867fc00d730a59ae ./kintex7/ppips_bram_int_interface_r.db`](./kintex7/ppips_bram_int_interface_r.db)
@ -733,9 +747,9 @@ Results have checksums;
* [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9 ./kintex7/segbits_hclk_r.db`](./kintex7/segbits_hclk_r.db)
* [`61d05145f3613042e8f0c1d97d63f6c185cfb66df609b621b44422ebb27c77a0 ./kintex7/segbits_hclk_r.origin_info.db`](./kintex7/segbits_hclk_r.origin_info.db)
* [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520 ./kintex7/segbits_int_l.db`](./kintex7/segbits_int_l.db)
* [`532c60af07228baf62517db058f7b424a53ba5a52f291fb45269f63e76a58815 ./kintex7/segbits_int_l.origin_info.db`](./kintex7/segbits_int_l.origin_info.db)
* [`f1cf867719f47f3a0f3e001e9f94884d670b85b44f2eec8395054da046f95e38 ./kintex7/segbits_int_l.origin_info.db`](./kintex7/segbits_int_l.origin_info.db)
* [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556 ./kintex7/segbits_int_r.db`](./kintex7/segbits_int_r.db)
* [`57c7c689eec4fb91d8fbda87d2c09d1def8f6cd71be8dd85f6f8951921a4b3c5 ./kintex7/segbits_int_r.origin_info.db`](./kintex7/segbits_int_r.origin_info.db)
* [`a7d2db6a3ebf7252638dc77dc9c558ff8d792ceeb50f3cd585a88d9231c9651f ./kintex7/segbits_int_r.origin_info.db`](./kintex7/segbits_int_r.origin_info.db)
* [`392e91def4df6eebb3ce5ed15570c01f6090be793a79054e1880549082eb6f23 ./kintex7/segbits_liob33.db`](./kintex7/segbits_liob33.db)
* [`0fca9c6530589b14c77b738e68c63ed4246713e44e1e699e153b69907e77e09e ./kintex7/segbits_liob33.origin_info.db`](./kintex7/segbits_liob33.origin_info.db)
* [`c9dfa75f8b565b3c47813cdf7f1df2aa7c59402f41396e939dd97ec68f7638d8 ./kintex7/segbits_lioi3.db`](./kintex7/segbits_lioi3.db)
@ -928,8 +942,15 @@ Results have checksums;
### Settings
Created using following [settings/zynq7.sh (sha256: b2055ef65885124f2f229a181100b6b73852464aa260b38691a4d84aa351475b)](https://github.com/SymbiFlow/prjxray/blob/e81bd90964d0dac70db7d98e7ed7ecd2cc7b57e0/settings/zynq7.sh)
Created using following [settings/zynq7.sh (sha256: 790d0886285b195daff0950f82ddb42635257c7c6400dcc5c7fb5b13f66ee6ba)](https://github.com/SymbiFlow/prjxray/blob/1f410829371e774e0cfa0e01bd3c46d85dbb49b6/settings/zynq7.sh)
```shell
# Copyright (C) 2017-2020 The Project X-Ray Authors.
#
# Use of this source code is governed by a ISC-style
# license that can be found in the LICENSE file or at
# https://opensource.org/licenses/ISC
#
# SPDX-License-Identifier: ISC
export XRAY_DATABASE="zynq7"
export XRAY_PART="xc7z020clg484-1"
export XRAY_ROI_FRAMES="0x00000000:0xffffffff"
@ -1003,13 +1024,13 @@ Results have checksums;
* [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd ./zynq7/mask_hclk_r.db`](./zynq7/mask_hclk_r.db)
* [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./zynq7/mask_hclk_r.origin_info.db`](./zynq7/mask_hclk_r.origin_info.db)
* [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6 ./zynq7/mask_liob33.db`](./zynq7/mask_liob33.db)
* [`21473e9cb688d2299659ed9011a5ddaa4c98fdc752851ac57bddffca06dd6d1c ./zynq7/mask_lioi3.db`](./zynq7/mask_lioi3.db)
* [`21473e9cb688d2299659ed9011a5ddaa4c98fdc752851ac57bddffca06dd6d1c ./zynq7/mask_lioi3_tbytesrc.db`](./zynq7/mask_lioi3_tbytesrc.db)
* [`21473e9cb688d2299659ed9011a5ddaa4c98fdc752851ac57bddffca06dd6d1c ./zynq7/mask_lioi3_tbyteterm.db`](./zynq7/mask_lioi3_tbyteterm.db)
* [`04905dcedfe5b075d28c7ca2af92f4c3b9677675fc27d64813c43b8569f493ae ./zynq7/mask_lioi3.db`](./zynq7/mask_lioi3.db)
* [`04905dcedfe5b075d28c7ca2af92f4c3b9677675fc27d64813c43b8569f493ae ./zynq7/mask_lioi3_tbytesrc.db`](./zynq7/mask_lioi3_tbytesrc.db)
* [`04905dcedfe5b075d28c7ca2af92f4c3b9677675fc27d64813c43b8569f493ae ./zynq7/mask_lioi3_tbyteterm.db`](./zynq7/mask_lioi3_tbyteterm.db)
* [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6 ./zynq7/mask_riob33.db`](./zynq7/mask_riob33.db)
* [`21473e9cb688d2299659ed9011a5ddaa4c98fdc752851ac57bddffca06dd6d1c ./zynq7/mask_rioi3.db`](./zynq7/mask_rioi3.db)
* [`21473e9cb688d2299659ed9011a5ddaa4c98fdc752851ac57bddffca06dd6d1c ./zynq7/mask_rioi3_tbytesrc.db`](./zynq7/mask_rioi3_tbytesrc.db)
* [`21473e9cb688d2299659ed9011a5ddaa4c98fdc752851ac57bddffca06dd6d1c ./zynq7/mask_rioi3_tbyteterm.db`](./zynq7/mask_rioi3_tbyteterm.db)
* [`04905dcedfe5b075d28c7ca2af92f4c3b9677675fc27d64813c43b8569f493ae ./zynq7/mask_rioi3.db`](./zynq7/mask_rioi3.db)
* [`04905dcedfe5b075d28c7ca2af92f4c3b9677675fc27d64813c43b8569f493ae ./zynq7/mask_rioi3_tbytesrc.db`](./zynq7/mask_rioi3_tbytesrc.db)
* [`04905dcedfe5b075d28c7ca2af92f4c3b9677675fc27d64813c43b8569f493ae ./zynq7/mask_rioi3_tbyteterm.db`](./zynq7/mask_rioi3_tbyteterm.db)
* [`d94e4d13df16da498224f0e94deaa310fbf471b6f9ec0ec8b2308fe62fa2eeaf ./zynq7/ppips_bram_int_interface_l.db`](./zynq7/ppips_bram_int_interface_l.db)
* [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./zynq7/ppips_bram_int_interface_l.origin_info.db`](./zynq7/ppips_bram_int_interface_l.origin_info.db)
* [`b48d766ac6f9dd0e21280d3a04dd448ea39016143309c0c7867fc00d730a59ae ./zynq7/ppips_bram_int_interface_r.db`](./zynq7/ppips_bram_int_interface_r.db)
@ -1119,9 +1140,9 @@ Results have checksums;
* [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9 ./zynq7/segbits_hclk_r.db`](./zynq7/segbits_hclk_r.db)
* [`61d05145f3613042e8f0c1d97d63f6c185cfb66df609b621b44422ebb27c77a0 ./zynq7/segbits_hclk_r.origin_info.db`](./zynq7/segbits_hclk_r.origin_info.db)
* [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520 ./zynq7/segbits_int_l.db`](./zynq7/segbits_int_l.db)
* [`6c40ae95b616e7fc37471d2b6a217028ffddae72a4bbc2b4eac992f5dc2dcfda ./zynq7/segbits_int_l.origin_info.db`](./zynq7/segbits_int_l.origin_info.db)
* [`c259e0cb3929fbf24bf0cef837f01e29d8699d414d980cf4c52e01509910bed9 ./zynq7/segbits_int_l.origin_info.db`](./zynq7/segbits_int_l.origin_info.db)
* [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556 ./zynq7/segbits_int_r.db`](./zynq7/segbits_int_r.db)
* [`51cf5676754a846fde6db6b2390a248a3aa3806e45b489a3e79e5f06dfc44f5e ./zynq7/segbits_int_r.origin_info.db`](./zynq7/segbits_int_r.origin_info.db)
* [`0d43700acd573ea0556a19f4e418b10a62398a828476233e83c95aa733be3fe0 ./zynq7/segbits_int_r.origin_info.db`](./zynq7/segbits_int_r.origin_info.db)
* [`392e91def4df6eebb3ce5ed15570c01f6090be793a79054e1880549082eb6f23 ./zynq7/segbits_liob33.db`](./zynq7/segbits_liob33.db)
* [`0fca9c6530589b14c77b738e68c63ed4246713e44e1e699e153b69907e77e09e ./zynq7/segbits_liob33.origin_info.db`](./zynq7/segbits_liob33.origin_info.db)
* [`c9dfa75f8b565b3c47813cdf7f1df2aa7c59402f41396e939dd97ec68f7638d8 ./zynq7/segbits_lioi3.db`](./zynq7/segbits_lioi3.db)
@ -1338,6 +1359,12 @@ Results have checksums;
* [`899966167308aa91e3651f66bba8611ee465acaf8e58bd3ba87d5b1777c0f625 ./zynq7/xc7z010clg400-1/required_features.fasm`](./zynq7/xc7z010clg400-1/required_features.fasm)
* [`e6d0ebf9b27f60f4afdab85a357bff4d7cf2cd77c3a6c0f2d887022cda874066 ./zynq7/xc7z010clg400-1/tileconn.json`](./zynq7/xc7z010clg400-1/tileconn.json)
* [`83207014af5c82fa0201164ce5f8f3838a2463fdd0a36a7a4b655aecedd0f8b4 ./zynq7/xc7z010clg400-1/tilegrid.json`](./zynq7/xc7z010clg400-1/tilegrid.json)
* [`52eac7be98da1e8bda491fa07699ae84c0e7eca1e09cde8b308be1df2ab5590f ./zynq7/xc7z020clg400-1/package_pins.csv`](./zynq7/xc7z020clg400-1/package_pins.csv)
* [`40734e0dad409b7728403109f9eeb47adfbfcdcb8780414a8e81c04c44b96c49 ./zynq7/xc7z020clg400-1/part.json`](./zynq7/xc7z020clg400-1/part.json)
* [`a5e33398424d02770e3fdccc4d7fe41f0ba8b8440b79a62ad09b60cae6048174 ./zynq7/xc7z020clg400-1/part.yaml`](./zynq7/xc7z020clg400-1/part.yaml)
* [`aedbb30dc143aaec2ca2bc76597ca4ebe546aa7913f0e4de710cecf3e0f31f23 ./zynq7/xc7z020clg400-1/required_features.fasm`](./zynq7/xc7z020clg400-1/required_features.fasm)
* [`8c3c23f987f1c0a2e55ab2a7467a9724f30762d1268e6cc5fce00eb65bf00ad3 ./zynq7/xc7z020clg400-1/tileconn.json`](./zynq7/xc7z020clg400-1/tileconn.json)
* [`e9f5a30f17f3c1aec9ae3cc421f4f4bbe0f74c94b4386d73450f195efd736379 ./zynq7/xc7z020clg400-1/tilegrid.json`](./zynq7/xc7z020clg400-1/tilegrid.json)
* [`55a9a5d444f71774d8b072adb3de03338d68f78ba18f9c817ab1bf239613b1dc ./zynq7/xc7z020clg484-1/package_pins.csv`](./zynq7/xc7z020clg484-1/package_pins.csv)
* [`47d494b96865d61458ec9c5e0d720886bcd755d9eebcae46ca9045fd679d2f2d ./zynq7/xc7z020clg484-1/part.json`](./zynq7/xc7z020clg484-1/part.json)
* [`a5e33398424d02770e3fdccc4d7fe41f0ba8b8440b79a62ad09b60cae6048174 ./zynq7/xc7z020clg484-1/part.yaml`](./zynq7/xc7z020clg484-1/part.yaml)

7
Makefile
View File

@ -1,3 +1,10 @@
# Copyright (C) 2017-2020 The Project X-Ray Authors.
#
# Use of this source code is governed by a ISC-style
# license that can be found in the LICENSE file or at
# https://opensource.org/licenses/ISC
#
# SPDX-License-Identifier: ISC
DATABASE_FILES = *.csv *.db *.json *.yaml *.fasm
TIMINGS_FILES = *.sdf
PART_DIRECTORIES = xc7*/

1
artix7/mask_lioi3.db
View File

@ -16,6 +16,7 @@ bit 25_71
bit 25_84
bit 25_85
bit 25_95
bit 25_96
bit 25_98
bit 25_99
bit 25_111

1
artix7/mask_lioi3_tbytesrc.db
View File

@ -16,6 +16,7 @@ bit 25_71
bit 25_84
bit 25_85
bit 25_95
bit 25_96
bit 25_98
bit 25_99
bit 25_111

1
artix7/mask_lioi3_tbyteterm.db
View File

@ -16,6 +16,7 @@ bit 25_71
bit 25_84
bit 25_85
bit 25_95
bit 25_96
bit 25_98
bit 25_99
bit 25_111

1
artix7/mask_rioi3.db
View File

@ -16,6 +16,7 @@ bit 25_71
bit 25_84
bit 25_85
bit 25_95
bit 25_96
bit 25_98
bit 25_99
bit 25_111

1
artix7/mask_rioi3_tbytesrc.db
View File

@ -16,6 +16,7 @@ bit 25_71
bit 25_84
bit 25_85
bit 25_95
bit 25_96
bit 25_98
bit 25_99
bit 25_111

1
artix7/mask_rioi3_tbyteterm.db
View File

@ -16,6 +16,7 @@ bit 25_71
bit 25_84
bit 25_85
bit 25_95
bit 25_96
bit 25_98
bit 25_99
bit 25_111

12
artix7/segbits_int_l.origin_info.db
View File

@ -392,7 +392,7 @@ INT_L.FAN_ALT3.WR1END3 origin:050-pip-seed !23_56 16_56 22_56 24_56 25_56
INT_L.FAN_ALT3.WW2END3 origin:050-pip-seed !22_56 !23_56 !24_56 19_57 25_56
INT_L.FAN_ALT4.BYP_BOUNCE_N3_3 origin:059-pip-byp-bounce !22_08 !23_08 !24_08 20_08 25_08
INT_L.FAN_ALT4.BYP_BOUNCE_N3_7 origin:059-pip-byp-bounce !22_08 !23_08 !25_08 20_08 24_08
INT_L.FAN_ALT4.FAN_BOUNCE2 origin:050-pip-seed !23_08 20_08 22_08 24_08 25_08
INT_L.FAN_ALT4.FAN_BOUNCE2 origin:056-pip-rem !23_08 20_08 22_08 24_08 25_08
INT_L.FAN_ALT4.FAN_BOUNCE7 origin:056-pip-rem !22_08 20_08 23_08 24_08 25_08
INT_L.FAN_ALT4.LOGIC_OUTS_L4 origin:050-pip-seed !23_08 21_08 22_08 24_08 25_08
INT_L.FAN_ALT4.LOGIC_OUTS_L8 origin:050-pip-seed !22_08 21_08 23_08 24_08 25_08
@ -2273,7 +2273,7 @@ INT_L.NE6BEG3.NW6END3 origin:050-pip-seed 04_53 06_52
INT_L.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55
INT_L.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52
INT_L.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53
INT_L.NE6BEG3.WW4END3 origin:056-pip-rem 04_53 05_52
INT_L.NE6BEG3.WW4END3 origin:050-pip-seed 04_53 05_52
INT_L.NL1BEG0.LOGIC_OUTS_L1 origin:050-pip-seed 07_16 14_17
INT_L.NL1BEG0.LOGIC_OUTS_L5 origin:050-pip-seed 11_17 14_17
INT_L.NL1BEG0.LOGIC_OUTS_L9 origin:050-pip-seed 10_17 13_17
@ -2491,7 +2491,7 @@ INT_L.NN6BEG3.NN6END3 origin:050-pip-seed 02_54 07_55
INT_L.NN6BEG3.NW2END3 origin:050-pip-seed 03_54 04_52
INT_L.NN6BEG3.NW6END3 origin:050-pip-seed 04_52 07_55
INT_L.NN6BEG3.SE2END3 origin:050-pip-seed 03_54 05_54
INT_L.NN6BEG3.SE6END3 origin:050-pip-seed 05_54 07_55
INT_L.NN6BEG3.SE6END3 origin:056-pip-rem 05_54 07_55
INT_L.NN6BEG3.WW2END2 origin:050-pip-seed 02_55 04_52
INT_L.NN6BEG3.WW4END3 origin:050-pip-seed 04_52 04_55
INT_L.NR1BEG0.LOGIC_OUTS_L0 origin:050-pip-seed 11_07 14_07
@ -2887,7 +2887,7 @@ INT_L.SE6BEG3.LH0 origin:056-pip-rem 04_59 06_58
INT_L.SE6BEG3.NE2END3 origin:050-pip-seed 03_58 04_56
INT_L.SE6BEG3.NE6END3 origin:050-pip-seed 04_56 04_59
INT_L.SE6BEG3.NN2END3 origin:050-pip-seed 02_59 04_56
INT_L.SE6BEG3.NN6END3 origin:056-pip-rem 04_56 07_59
INT_L.SE6BEG3.NN6END3 origin:050-pip-seed 04_56 07_59
INT_L.SE6BEG3.SE2END3 origin:050-pip-seed 02_58 03_58
INT_L.SE6BEG3.SE6END3 origin:050-pip-seed 02_58 07_59
INT_L.SE6BEG3.SS2END3 origin:050-pip-seed 02_59 05_58
@ -3568,7 +3568,7 @@ INT_L.WW4BEG0.SW6END_N0_3 origin:050-pip-seed 04_01 05_00
INT_L.WW4BEG0.WW2END_N0_3 origin:050-pip-seed 03_00 03_01
INT_L.WW4BEG0.LH12 origin:056-pip-rem 05_00 07_01
INT_L.WW4BEG0.NE2END0 origin:050-pip-seed 02_01 05_03
INT_L.WW4BEG0.NE6END0 origin:056-pip-rem 05_00 05_03
INT_L.WW4BEG0.NE6END0 origin:050-pip-seed 05_00 05_03
INT_L.WW4BEG0.NN2END0 origin:050-pip-seed 03_00 05_03
INT_L.WW4BEG0.NN6END0 origin:050-pip-seed 05_03 06_00
INT_L.WW4BEG0.NW2END0 origin:050-pip-seed 02_01 03_01
@ -3583,7 +3583,7 @@ INT_L.WW4BEG1.LOGIC_OUTS_L23 origin:050-pip-seed 06_16 07_17
INT_L.WW4BEG1.LV_L9 origin:056-pip-rem 04_18 05_16
INT_L.WW4BEG1.LH6 origin:056-pip-rem 05_16 07_17
INT_L.WW4BEG1.NE2END1 origin:050-pip-seed 02_17 05_19
INT_L.WW4BEG1.NE6END1 origin:050-pip-seed 05_16 05_19
INT_L.WW4BEG1.NE6END1 origin:056-pip-rem 05_16 05_19
INT_L.WW4BEG1.NN2END1 origin:050-pip-seed 03_16 05_19
INT_L.WW4BEG1.NN6END1 origin:050-pip-seed 05_19 06_16
INT_L.WW4BEG1.NW2END1 origin:050-pip-seed 02_17 03_17

8
artix7/segbits_int_r.origin_info.db
View File

@ -705,7 +705,7 @@ INT_R.EE4BEG2.SE6END2 origin:050-pip-seed 03_41 06_40
INT_R.EE4BEG2.SS2END2 origin:050-pip-seed 03_40 05_43
INT_R.EE4BEG2.SS6END2 origin:050-pip-seed 05_43 06_40
INT_R.EE4BEG2.SW2END2 origin:050-pip-seed 02_41 05_43
INT_R.EE4BEG2.SW6END2 origin:050-pip-seed 05_40 05_43
INT_R.EE4BEG2.SW6END2 origin:056-pip-rem 05_40 05_43
INT_R.EE4BEG3.LOGIC_OUTS3 origin:050-pip-seed 02_57 07_57
INT_R.EE4BEG3.LOGIC_OUTS7 origin:050-pip-seed 02_57 04_58
INT_R.EE4BEG3.LOGIC_OUTS11 origin:050-pip-seed 03_56 04_58
@ -2253,7 +2253,7 @@ INT_R.NE6BEG2.NW6END2 origin:050-pip-seed 04_37 06_36
INT_R.NE6BEG2.SE2END2 origin:050-pip-seed 02_37 05_39
INT_R.NE6BEG2.SE6END2 origin:050-pip-seed 05_39 06_36
INT_R.NE6BEG2.WW2END1 origin:050-pip-seed 03_36 04_37
INT_R.NE6BEG2.WW4END2 origin:056-pip-rem 04_37 05_36
INT_R.NE6BEG2.WW4END2 origin:050-pip-seed 04_37 05_36
INT_R.NE6BEG3.LOGIC_OUTS3 origin:050-pip-seed 02_53 04_54
INT_R.NE6BEG3.LOGIC_OUTS7 origin:050-pip-seed 02_53 07_53
INT_R.NE6BEG3.LOGIC_OUTS11 origin:050-pip-seed 03_52 07_53
@ -2273,7 +2273,7 @@ INT_R.NE6BEG3.NW6END3 origin:050-pip-seed 04_53 06_52
INT_R.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55
INT_R.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52
INT_R.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53
INT_R.NE6BEG3.WW4END3 origin:056-pip-rem 04_53 05_52
INT_R.NE6BEG3.WW4END3 origin:050-pip-seed 04_53 05_52
INT_R.NL1BEG0.LOGIC_OUTS1 origin:050-pip-seed 07_16 14_17
INT_R.NL1BEG0.LOGIC_OUTS5 origin:050-pip-seed 11_17 14_17
INT_R.NL1BEG0.LOGIC_OUTS9 origin:050-pip-seed 10_17 13_17
@ -3321,7 +3321,7 @@ INT_R.SW6BEG2.LOGIC_OUTS14 origin:050-pip-seed 03_44 07_45
INT_R.SW6BEG2.LOGIC_OUTS16 origin:050-pip-seed 04_46 06_44
INT_R.SW6BEG2.LOGIC_OUTS20 origin:050-pip-seed 06_44 07_45
INT_R.SW6BEG2.EE2END2 origin:050-pip-seed 03_44 04_45
INT_R.SW6BEG2.EE4END2 origin:050-pip-seed 04_45 05_44
INT_R.SW6BEG2.EE4END2 origin:056-pip-rem 04_45 05_44
INT_R.SW6BEG2.LVB0 origin:056-pip-rem 04_46 05_44
INT_R.SW6BEG2.LVB12 origin:056-pip-rem 05_44 07_45
INT_R.SW6BEG2.NW2END3 origin:050-pip-seed 02_45 05_47

1
kintex7/mask_lioi3.db
View File

@ -15,7 +15,6 @@ bit 25_71
bit 25_84
bit 25_85
bit 25_95
bit 25_96
bit 25_98
bit 25_99
bit 25_111

1
kintex7/mask_lioi3_tbytesrc.db
View File

@ -15,7 +15,6 @@ bit 25_71
bit 25_84
bit 25_85
bit 25_95
bit 25_96
bit 25_98
bit 25_99
bit 25_111

1
kintex7/mask_lioi3_tbyteterm.db
View File

@ -15,7 +15,6 @@ bit 25_71
bit 25_84
bit 25_85
bit 25_95
bit 25_96
bit 25_98
bit 25_99
bit 25_111

1
kintex7/mask_rioi3.db
View File

@ -15,7 +15,6 @@ bit 25_71
bit 25_84
bit 25_85
bit 25_95
bit 25_96
bit 25_98
bit 25_99
bit 25_111

1
kintex7/mask_rioi3_tbytesrc.db
View File

@ -15,7 +15,6 @@ bit 25_71
bit 25_84
bit 25_85
bit 25_95
bit 25_96
bit 25_98
bit 25_99
bit 25_111

1
kintex7/mask_rioi3_tbyteterm.db
View File

@ -15,7 +15,6 @@ bit 25_71
bit 25_84
bit 25_85
bit 25_95
bit 25_96
bit 25_98
bit 25_99
bit 25_111

6
kintex7/segbits_int_l.origin_info.db
View File

@ -170,7 +170,7 @@ INT_L.BYP_ALT7.BYP_BOUNCE2 origin:050-pip-seed !22_63 !23_63 !24_63 21_63 25_63
INT_L.BYP_ALT7.BYP_BOUNCE6 origin:050-pip-seed !22_63 !23_63 !25_63 21_63 24_63
INT_L.BYP_ALT7.EL1END_S3_0 origin:050-pip-seed !23_63 17_63 22_63 24_63 25_63
INT_L.BYP_ALT7.FAN_BOUNCE_S3_4 origin:050-pip-seed !23_63 21_63 22_63 24_63 25_63
INT_L.BYP_ALT7.FAN_BOUNCE_S3_6 origin:056-pip-rem !22_63 21_63 23_63 24_63 25_63
INT_L.BYP_ALT7.FAN_BOUNCE_S3_6 origin:050-pip-seed !22_63 21_63 23_63 24_63 25_63
INT_L.BYP_ALT7.LOGIC_OUTS_L3 origin:051-pip-imuxlout-bypalts !22_63 20_63 23_63 24_63 25_63
INT_L.BYP_ALT7.LOGIC_OUTS_L15 origin:051-pip-imuxlout-bypalts !23_63 20_63 22_63 24_63 25_63
INT_L.BYP_ALT7.LOGIC_OUTS_L21 origin:051-pip-imuxlout-bypalts !22_63 !23_63 !24_63 20_63 25_63
@ -2885,7 +2885,7 @@ INT_L.SE6BEG3.EE2END3 origin:050-pip-seed 02_58 02_59
INT_L.SE6BEG3.EE4END3 origin:050-pip-seed 02_58 04_59
INT_L.SE6BEG3.LH0 origin:056-pip-rem 04_59 06_58
INT_L.SE6BEG3.NE2END3 origin:050-pip-seed 03_58 04_56
INT_L.SE6BEG3.NE6END3 origin:056-pip-rem 04_56 04_59
INT_L.SE6BEG3.NE6END3 origin:050-pip-seed 04_56 04_59
INT_L.SE6BEG3.NN2END3 origin:050-pip-seed 02_59 04_56
INT_L.SE6BEG3.NN6END3 origin:050-pip-seed 04_56 07_59
INT_L.SE6BEG3.SE2END3 origin:050-pip-seed 02_58 03_58
@ -3603,7 +3603,7 @@ INT_L.WW4BEG2.LOGIC_OUTS_L20 origin:050-pip-seed 04_34 06_32
INT_L.WW4BEG2.LVB_L0 origin:056-pip-rem 04_34 05_32
INT_L.WW4BEG2.LVB_L12 origin:056-pip-rem 05_32 07_33
INT_L.WW4BEG2.NE2END2 origin:050-pip-seed 02_33 05_35
INT_L.WW4BEG2.NE6END2 origin:056-pip-rem 05_32 05_35
INT_L.WW4BEG2.NE6END2 origin:050-pip-seed 05_32 05_35
INT_L.WW4BEG2.NN2END2 origin:050-pip-seed 03_32 05_35
INT_L.WW4BEG2.NN6END2 origin:050-pip-seed 05_35 06_32
INT_L.WW4BEG2.NW2END2 origin:050-pip-seed 02_33 03_33

8
kintex7/segbits_int_r.origin_info.db
View File

@ -685,7 +685,7 @@ INT_R.EE4BEG1.SE6END1 origin:050-pip-seed 03_25 06_24
INT_R.EE4BEG1.SS2END1 origin:050-pip-seed 03_24 05_27
INT_R.EE4BEG1.SS6END1 origin:050-pip-seed 05_27 06_24
INT_R.EE4BEG1.SW2END1 origin:050-pip-seed 02_25 05_27
INT_R.EE4BEG1.SW6END1 origin:050-pip-seed 05_24 05_27
INT_R.EE4BEG1.SW6END1 origin:056-pip-rem 05_24 05_27
INT_R.EE4BEG2.LOGIC_OUTS2 origin:050-pip-seed 02_41 04_42
INT_R.EE4BEG2.LOGIC_OUTS6 origin:050-pip-seed 02_41 07_41
INT_R.EE4BEG2.LOGIC_OUTS10 origin:050-pip-seed 03_40 07_41
@ -2273,7 +2273,7 @@ INT_R.NE6BEG3.NW6END3 origin:050-pip-seed 04_53 06_52
INT_R.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55
INT_R.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52
INT_R.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53
INT_R.NE6BEG3.WW4END3 origin:050-pip-seed 04_53 05_52
INT_R.NE6BEG3.WW4END3 origin:056-pip-rem 04_53 05_52
INT_R.NL1BEG0.LOGIC_OUTS1 origin:050-pip-seed 07_16 14_17
INT_R.NL1BEG0.LOGIC_OUTS5 origin:050-pip-seed 11_17 14_17
INT_R.NL1BEG0.LOGIC_OUTS9 origin:050-pip-seed 10_17 13_17
@ -3321,7 +3321,7 @@ INT_R.SW6BEG2.LOGIC_OUTS14 origin:050-pip-seed 03_44 07_45
INT_R.SW6BEG2.LOGIC_OUTS16 origin:050-pip-seed 04_46 06_44
INT_R.SW6BEG2.LOGIC_OUTS20 origin:050-pip-seed 06_44 07_45
INT_R.SW6BEG2.EE2END2 origin:050-pip-seed 03_44 04_45
INT_R.SW6BEG2.EE4END2 origin:056-pip-rem 04_45 05_44
INT_R.SW6BEG2.EE4END2 origin:050-pip-seed 04_45 05_44
INT_R.SW6BEG2.LVB0 origin:056-pip-rem 04_46 05_44
INT_R.SW6BEG2.LVB12 origin:056-pip-rem 05_44 07_45
INT_R.SW6BEG2.NW2END3 origin:050-pip-seed 02_45 05_47
@ -3344,7 +3344,7 @@ INT_R.SW6BEG3.NW2END_S0_0 origin:050-pip-seed 02_61 05_63
INT_R.SW6BEG3.NW6END_S0_0 origin:050-pip-seed 05_63 06_60
INT_R.SW6BEG3.WW4END_S0_0 origin:050-pip-seed 05_60 05_63
INT_R.SW6BEG3.EE2END3 origin:050-pip-seed 03_60 04_61
INT_R.SW6BEG3.EE4END3 origin:050-pip-seed 04_61 05_60
INT_R.SW6BEG3.EE4END3 origin:056-pip-rem 04_61 05_60
INT_R.SW6BEG3.LH0 origin:056-pip-rem 04_62 05_60
INT_R.SW6BEG3.LV18 origin:056-pip-rem 05_60 07_61
INT_R.SW6BEG3.SE2END3 origin:050-pip-seed 02_61 04_61

1
zynq7/mask_lioi3.db
View File

@ -1,5 +1,6 @@
bit 25_07
bit 25_08
bit 25_16
bit 25_20
bit 25_21
bit 25_23

1
zynq7/mask_lioi3_tbytesrc.db
View File

@ -1,5 +1,6 @@
bit 25_07
bit 25_08
bit 25_16
bit 25_20
bit 25_21
bit 25_23

1
zynq7/mask_lioi3_tbyteterm.db
View File

@ -1,5 +1,6 @@
bit 25_07
bit 25_08
bit 25_16
bit 25_20
bit 25_21
bit 25_23

1
zynq7/mask_rioi3.db
View File

@ -1,5 +1,6 @@
bit 25_07
bit 25_08
bit 25_16
bit 25_20
bit 25_21
bit 25_23

1
zynq7/mask_rioi3_tbytesrc.db
View File

@ -1,5 +1,6 @@
bit 25_07
bit 25_08
bit 25_16
bit 25_20
bit 25_21
bit 25_23

1
zynq7/mask_rioi3_tbyteterm.db
View File

@ -1,5 +1,6 @@
bit 25_07
bit 25_08
bit 25_16
bit 25_20
bit 25_21
bit 25_23

14
zynq7/segbits_int_l.origin_info.db
View File

@ -301,7 +301,7 @@ INT_L.FAN_ALT0.FAN_BOUNCE4 origin:050-pip-seed !22_00 20_00 23_00 24_00 25_00
INT_L.FAN_ALT0.FAN_BOUNCE6 origin:050-pip-seed !23_00 20_00 22_00 24_00 25_00
INT_L.FAN_ALT0.LOGIC_OUTS_L0 origin:050-pip-seed !23_00 21_00 22_00 24_00 25_00
INT_L.FAN_ALT0.LOGIC_OUTS_L12 origin:050-pip-seed !22_00 21_00 23_00 24_00 25_00
INT_L.FAN_ALT0.LOGIC_OUTS_L22 origin:056-pip-rem !22_00 !23_00 !25_00 21_00 24_00
INT_L.FAN_ALT0.LOGIC_OUTS_L22 origin:050-pip-seed !22_00 !23_00 !25_00 21_00 24_00
INT_L.FAN_ALT0.SR1END_N3_3 origin:050-pip-seed !23_00 19_01 22_00 24_00 25_00
INT_L.FAN_ALT0.SS2END_N0_3 origin:050-pip-seed !22_00 !23_00 !24_00 17_00 25_00
INT_L.FAN_ALT0.SW2END_N0_3 origin:050-pip-seed !22_00 !23_00 !25_00 17_00 24_00
@ -2253,7 +2253,7 @@ INT_L.NE6BEG2.NW6END2 origin:050-pip-seed 04_37 06_36
INT_L.NE6BEG2.SE2END2 origin:050-pip-seed 02_37 05_39
INT_L.NE6BEG2.SE6END2 origin:050-pip-seed 05_39 06_36
INT_L.NE6BEG2.WW2END1 origin:050-pip-seed 03_36 04_37
INT_L.NE6BEG2.WW4END2 origin:056-pip-rem 04_37 05_36
INT_L.NE6BEG2.WW4END2 origin:050-pip-seed 04_37 05_36
INT_L.NE6BEG3.LOGIC_OUTS_L3 origin:050-pip-seed 02_53 04_54
INT_L.NE6BEG3.LOGIC_OUTS_L7 origin:050-pip-seed 02_53 07_53
INT_L.NE6BEG3.LOGIC_OUTS_L11 origin:050-pip-seed 03_52 07_53
@ -3302,7 +3302,7 @@ INT_L.SW6BEG1.LOGIC_OUTS_L19 origin:050-pip-seed 06_28 07_29
INT_L.SW6BEG1.LOGIC_OUTS_L23 origin:050-pip-seed 04_30 06_28
INT_L.SW6BEG1.LV_L9 origin:056-pip-rem 04_30 05_28
INT_L.SW6BEG1.EE2END1 origin:050-pip-seed 03_28 04_29
INT_L.SW6BEG1.EE4END1 origin:056-pip-rem 04_29 05_28
INT_L.SW6BEG1.EE4END1 origin:050-pip-seed 04_29 05_28
INT_L.SW6BEG1.LH6 origin:056-pip-rem 05_28 07_29
INT_L.SW6BEG1.NW2END2 origin:050-pip-seed 02_29 05_31
INT_L.SW6BEG1.NW6END2 origin:050-pip-seed 05_31 06_28
@ -3323,7 +3323,7 @@ INT_L.SW6BEG2.LOGIC_OUTS_L20 origin:050-pip-seed 06_44 07_45
INT_L.SW6BEG2.LVB_L0 origin:056-pip-rem 04_46 05_44
INT_L.SW6BEG2.LVB_L12 origin:056-pip-rem 05_44 07_45
INT_L.SW6BEG2.EE2END2 origin:050-pip-seed 03_44 04_45
INT_L.SW6BEG2.EE4END2 origin:056-pip-rem 04_45 05_44
INT_L.SW6BEG2.EE4END2 origin:050-pip-seed 04_45 05_44
INT_L.SW6BEG2.NW2END3 origin:050-pip-seed 02_45 05_47
INT_L.SW6BEG2.NW6END3 origin:050-pip-seed 05_47 06_44
INT_L.SW6BEG2.SE2END2 origin:050-pip-seed 02_45 04_45
@ -3345,7 +3345,7 @@ INT_L.SW6BEG3.NW2END_S0_0 origin:050-pip-seed 02_61 05_63
INT_L.SW6BEG3.NW6END_S0_0 origin:050-pip-seed 05_63 06_60
INT_L.SW6BEG3.WW4END_S0_0 origin:050-pip-seed 05_60 05_63
INT_L.SW6BEG3.EE2END3 origin:050-pip-seed 03_60 04_61
INT_L.SW6BEG3.EE4END3 origin:056-pip-rem 04_61 05_60
INT_L.SW6BEG3.EE4END3 origin:050-pip-seed 04_61 05_60
INT_L.SW6BEG3.LH0 origin:056-pip-rem 04_62 05_60
INT_L.SW6BEG3.SE2END3 origin:050-pip-seed 02_61 04_61
INT_L.SW6BEG3.SE6END3 origin:050-pip-seed 04_61 06_60
@ -3568,7 +3568,7 @@ INT_L.WW4BEG0.SW6END_N0_3 origin:050-pip-seed 04_01 05_00
INT_L.WW4BEG0.WW2END_N0_3 origin:050-pip-seed 03_00 03_01
INT_L.WW4BEG0.LH12 origin:056-pip-rem 05_00 07_01
INT_L.WW4BEG0.NE2END0 origin:050-pip-seed 02_01 05_03
INT_L.WW4BEG0.NE6END0 origin:056-pip-rem 05_00 05_03
INT_L.WW4BEG0.NE6END0 origin:050-pip-seed 05_00 05_03
INT_L.WW4BEG0.NN2END0 origin:050-pip-seed 03_00 05_03
INT_L.WW4BEG0.NN6END0 origin:050-pip-seed 05_03 06_00
INT_L.WW4BEG0.NW2END0 origin:050-pip-seed 02_01 03_01
@ -3603,7 +3603,7 @@ INT_L.WW4BEG2.LOGIC_OUTS_L20 origin:050-pip-seed 04_34 06_32
INT_L.WW4BEG2.LVB_L0 origin:056-pip-rem 04_34 05_32
INT_L.WW4BEG2.LVB_L12 origin:056-pip-rem 05_32 07_33
INT_L.WW4BEG2.NE2END2 origin:050-pip-seed 02_33 05_35
INT_L.WW4BEG2.NE6END2 origin:056-pip-rem 05_32 05_35
INT_L.WW4BEG2.NE6END2 origin:050-pip-seed 05_32 05_35
INT_L.WW4BEG2.NN2END2 origin:050-pip-seed 03_32 05_35
INT_L.WW4BEG2.NN6END2 origin:050-pip-seed 05_35 06_32
INT_L.WW4BEG2.NW2END2 origin:050-pip-seed 02_33 03_33

14
zynq7/segbits_int_r.origin_info.db
View File

@ -329,7 +329,7 @@ INT_R.FAN_ALT3.WW2END3 origin:050-pip-seed !22_56 !23_56 !24_56 19_57 25_56
INT_R.FAN_ALT4.BYP_BOUNCE_N3_3 origin:059-pip-byp-bounce !22_08 !23_08 !24_08 20_08 25_08
INT_R.FAN_ALT4.BYP_BOUNCE_N3_7 origin:059-pip-byp-bounce !22_08 !23_08 !25_08 20_08 24_08
INT_R.FAN_ALT4.FAN_BOUNCE2 origin:050-pip-seed !23_08 20_08 22_08 24_08 25_08
INT_R.FAN_ALT4.FAN_BOUNCE7 origin:050-pip-seed !22_08 20_08 23_08 24_08 25_08
INT_R.FAN_ALT4.FAN_BOUNCE7 origin:056-pip-rem !22_08 20_08 23_08 24_08 25_08
INT_R.FAN_ALT4.LOGIC_OUTS4 origin:050-pip-seed !23_08 21_08 22_08 24_08 25_08
INT_R.FAN_ALT4.LOGIC_OUTS8 origin:050-pip-seed !22_08 21_08 23_08 24_08 25_08
INT_R.FAN_ALT4.LOGIC_OUTS18 origin:050-pip-seed !22_08 !23_08 !25_08 21_08 24_08
@ -665,7 +665,7 @@ INT_R.EE4BEG0.SE6END0 origin:050-pip-seed 03_09 06_08
INT_R.EE4BEG0.SS2END0 origin:050-pip-seed 03_08 05_11
INT_R.EE4BEG0.SS6END0 origin:050-pip-seed 05_11 06_08
INT_R.EE4BEG0.SW2END0 origin:050-pip-seed 02_09 05_11
INT_R.EE4BEG0.SW6END0 origin:056-pip-rem 05_08 05_11
INT_R.EE4BEG0.SW6END0 origin:050-pip-seed 05_08 05_11
INT_R.EE4BEG1.LOGIC_OUTS1 origin:050-pip-seed 02_25 07_25
INT_R.EE4BEG1.LOGIC_OUTS5 origin:050-pip-seed 02_25 04_26
INT_R.EE4BEG1.LOGIC_OUTS9 origin:050-pip-seed 03_24 04_26
@ -705,7 +705,7 @@ INT_R.EE4BEG2.SE6END2 origin:050-pip-seed 03_41 06_40
INT_R.EE4BEG2.SS2END2 origin:050-pip-seed 03_40 05_43
INT_R.EE4BEG2.SS6END2 origin:050-pip-seed 05_43 06_40
INT_R.EE4BEG2.SW2END2 origin:050-pip-seed 02_41 05_43
INT_R.EE4BEG2.SW6END2 origin:056-pip-rem 05_40 05_43
INT_R.EE4BEG2.SW6END2 origin:050-pip-seed 05_40 05_43
INT_R.EE4BEG3.LOGIC_OUTS3 origin:050-pip-seed 02_57 07_57
INT_R.EE4BEG3.LOGIC_OUTS7 origin:050-pip-seed 02_57 04_58
INT_R.EE4BEG3.LOGIC_OUTS11 origin:050-pip-seed 03_56 04_58
@ -725,7 +725,7 @@ INT_R.EE4BEG3.SE6END3 origin:050-pip-seed 03_57 06_56
INT_R.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59
INT_R.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56
INT_R.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59
INT_R.EE4BEG3.SW6END3 origin:056-pip-rem 05_56 05_59
INT_R.EE4BEG3.SW6END3 origin:050-pip-seed 05_56 05_59
INT_R.EL1BEG0.LOGIC_OUTS1 origin:050-pip-seed 07_20 14_21
INT_R.EL1BEG0.LOGIC_OUTS5 origin:050-pip-seed 11_21 14_21
INT_R.EL1BEG0.LOGIC_OUTS9 origin:050-pip-seed 10_21 13_21
@ -2273,7 +2273,7 @@ INT_R.NE6BEG3.NW6END3 origin:050-pip-seed 04_53 06_52
INT_R.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55
INT_R.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52
INT_R.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53
INT_R.NE6BEG3.WW4END3 origin:056-pip-rem 04_53 05_52
INT_R.NE6BEG3.WW4END3 origin:050-pip-seed 04_53 05_52
INT_R.NL1BEG0.LOGIC_OUTS1 origin:050-pip-seed 07_16 14_17
INT_R.NL1BEG0.LOGIC_OUTS5 origin:050-pip-seed 11_17 14_17
INT_R.NL1BEG0.LOGIC_OUTS9 origin:050-pip-seed 10_17 13_17
@ -2491,7 +2491,7 @@ INT_R.NN6BEG3.NN6END3 origin:050-pip-seed 02_54 07_55
INT_R.NN6BEG3.NW2END3 origin:050-pip-seed 03_54 04_52
INT_R.NN6BEG3.NW6END3 origin:050-pip-seed 04_52 07_55
INT_R.NN6BEG3.SE2END3 origin:050-pip-seed 03_54 05_54
INT_R.NN6BEG3.SE6END3 origin:056-pip-rem 05_54 07_55
INT_R.NN6BEG3.SE6END3 origin:050-pip-seed 05_54 07_55
INT_R.NN6BEG3.WW2END2 origin:050-pip-seed 02_55 04_52
INT_R.NN6BEG3.WW4END3 origin:050-pip-seed 04_52 04_55
INT_R.NR1BEG0.LOGIC_OUTS0 origin:050-pip-seed 11_07 14_07
@ -3321,7 +3321,7 @@ INT_R.SW6BEG2.LOGIC_OUTS14 origin:050-pip-seed 03_44 07_45
INT_R.SW6BEG2.LOGIC_OUTS16 origin:050-pip-seed 04_46 06_44
INT_R.SW6BEG2.LOGIC_OUTS20 origin:050-pip-seed 06_44 07_45
INT_R.SW6BEG2.EE2END2 origin:050-pip-seed 03_44 04_45
INT_R.SW6BEG2.EE4END2 origin:056-pip-rem 04_45 05_44
INT_R.SW6BEG2.EE4END2 origin:050-pip-seed 04_45 05_44
INT_R.SW6BEG2.LVB0 origin:056-pip-rem 04_46 05_44
INT_R.SW6BEG2.LVB12 origin:056-pip-rem 05_44 07_45
INT_R.SW6BEG2.NW2END3 origin:050-pip-seed 02_45 05_47

258
zynq7/xc7z020clg400-1/package_pins.csv Normal file
View File

@ -0,0 +1,258 @@
pin,bank,site,tile,pin_function
A1,502,IOPAD_X1Y28,PSS2_X32Y105,PS_DDR_DM0_502
A2,502,IOPAD_X1Y34,PSS2_X32Y105,PS_DDR_DQ2_502
A4,502,IOPAD_X1Y35,PSS2_X32Y105,PS_DDR_DQ3_502
A5,500,IOPAD_X1Y83,PSS2_X32Y105,PS_MIO6_500
A6,500,IOPAD_X1Y82,PSS2_X32Y105,PS_MIO5_500
A7,500,IOPAD_X1Y78,PSS2_X32Y105,PS_MIO1_500
A9,501,IOPAD_X1Y120,PSS2_X32Y105,PS_MIO43_501
A10,501,IOPAD_X1Y114,PSS2_X32Y105,PS_MIO37_501
A11,501,IOPAD_X1Y113,PSS2_X32Y105,PS_MIO36_501
A12,501,IOPAD_X1Y111,PSS2_X32Y105,PS_MIO34_501
A14,501,IOPAD_X1Y109,PSS2_X32Y105,PS_MIO32_501
A15,501,IOPAD_X1Y103,PSS2_X32Y105,PS_MIO26_501
A16,501,IOPAD_X1Y101,PSS2_X32Y105,PS_MIO24_501
A17,501,IOPAD_X1Y97,PSS2_X32Y105,PS_MIO20_501
A19,501,IOPAD_X1Y93,PSS2_X32Y105,PS_MIO16_501
A20,35,IOB_X1Y145,RIOB33_X73Y145,IO_L2N_T0_AD8N_35
B2,502,IOPAD_X1Y64,PSS2_X32Y105,PS_DDR_DQS_N0_502
B3,502,IOPAD_X1Y33,PSS2_X32Y105,PS_DDR_DQ1_502
B4,502,IOPAD_X1Y72,PSS2_X32Y105,PS_DDR_DRST_B_502
B5,500,IOPAD_X1Y86,PSS2_X32Y105,PS_MIO9_500
B7,500,IOPAD_X1Y81,PSS2_X32Y105,PS_MIO4_500
B8,500,IOPAD_X1Y79,PSS2_X32Y105,PS_MIO2_500
B9,501,IOPAD_X1Y128,PSS2_X32Y105,PS_MIO51_501
B10,501,IOPAD_X1Y134,PSS2_X32Y105,PS_SRST_B_501
B12,501,IOPAD_X1Y125,PSS2_X32Y105,PS_MIO48_501
B13,501,IOPAD_X1Y127,PSS2_X32Y105,PS_MIO50_501
B14,501,IOPAD_X1Y124,PSS2_X32Y105,PS_MIO47_501
B15,501,IOPAD_X1Y122,PSS2_X32Y105,PS_MIO45_501
B17,501,IOPAD_X1Y99,PSS2_X32Y105,PS_MIO22_501
B18,501,IOPAD_X1Y95,PSS2_X32Y105,PS_MIO18_501
B19,35,IOB_X1Y146,RIOB33_X73Y145,IO_L2P_T0_AD8P_35
B20,35,IOB_X1Y147,RIOB33_X73Y147,IO_L1N_T0_AD0N_35
C1,502,IOPAD_X1Y38,PSS2_X32Y105,PS_DDR_DQ6_502
C2,502,IOPAD_X1Y68,PSS2_X32Y105,PS_DDR_DQS_P0_502
C3,502,IOPAD_X1Y32,PSS2_X32Y105,PS_DDR_DQ0_502
C5,500,IOPAD_X1Y91,PSS2_X32Y105,PS_MIO14_500
C6,500,IOPAD_X1Y88,PSS2_X32Y105,PS_MIO11_500
C7,500,IOPAD_X1Y132,PSS2_X32Y105,PS_POR_B_500
C8,500,IOPAD_X1Y92,PSS2_X32Y105,PS_MIO15_500
C10,501,IOPAD_X1Y129,PSS2_X32Y105,PS_MIO52_501
C11,501,IOPAD_X1Y130,PSS2_X32Y105,PS_MIO53_501
C12,501,IOPAD_X1Y126,PSS2_X32Y105,PS_MIO49_501
C13,501,IOPAD_X1Y106,PSS2_X32Y105,PS_MIO29_501
C15,501,IOPAD_X1Y107,PSS2_X32Y105,PS_MIO30_501
C16,501,IOPAD_X1Y105,PSS2_X32Y105,PS_MIO28_501
C17,501,IOPAD_X1Y118,PSS2_X32Y105,PS_MIO41_501
C18,501,IOPAD_X1Y116,PSS2_X32Y105,PS_MIO39_501
C20,35,IOB_X1Y148,RIOB33_X73Y147,IO_L1P_T0_AD0P_35
D1,502,IOPAD_X1Y37,PSS2_X32Y105,PS_DDR_DQ5_502
D3,502,IOPAD_X1Y36,PSS2_X32Y105,PS_DDR_DQ4_502
D4,502,IOPAD_X1Y18,PSS2_X32Y105,PS_DDR_A13_502
D5,500,IOPAD_X1Y85,PSS2_X32Y105,PS_MIO8_500
D6,500,IOPAD_X1Y80,PSS2_X32Y105,PS_MIO3_500
D8,500,IOPAD_X1Y84,PSS2_X32Y105,PS_MIO7_500
D9,500,IOPAD_X1Y89,PSS2_X32Y105,PS_MIO12_500
D10,501,IOPAD_X1Y96,PSS2_X32Y105,PS_MIO19_501
D11,501,IOPAD_X1Y100,PSS2_X32Y105,PS_MIO23_501
D13,501,IOPAD_X1Y104,PSS2_X32Y105,PS_MIO27_501
D14,501,IOPAD_X1Y117,PSS2_X32Y105,PS_MIO40_501
D15,501,IOPAD_X1Y110,PSS2_X32Y105,PS_MIO33_501
D16,501,IOPAD_X1Y123,PSS2_X32Y105,PS_MIO46_501
D18,35,IOB_X1Y143,RIOB33_X73Y143,IO_L3N_T0_DQS_AD1N_35
D19,35,IOB_X1Y142,RIOB33_X73Y141,IO_L4P_T0_35
D20,35,IOB_X1Y141,RIOB33_X73Y141,IO_L4N_T0_35
E1,502,IOPAD_X1Y39,PSS2_X32Y105,PS_DDR_DQ7_502
E2,502,IOPAD_X1Y40,PSS2_X32Y105,PS_DDR_DQ8_502
E3,502,IOPAD_X1Y41,PSS2_X32Y105,PS_DDR_DQ9_502
E4,502,IOPAD_X1Y16,PSS2_X32Y105,PS_DDR_A12_502
E6,500,IOPAD_X1Y77,PSS2_X32Y105,PS_MIO0_500
E7,500,IOPAD_X1Y26,PSS2_X32Y105,PS_CLK_500
E8,500,IOPAD_X1Y90,PSS2_X32Y105,PS_MIO13_500
E9,500,IOPAD_X1Y87,PSS2_X32Y105,PS_MIO10_500
E12,501,IOPAD_X1Y119,PSS2_X32Y105,PS_MIO42_501
E13,501,IOPAD_X1Y115,PSS2_X32Y105,PS_MIO38_501
E14,501,IOPAD_X1Y94,PSS2_X32Y105,PS_MIO17_501
E16,501,IOPAD_X1Y108,PSS2_X32Y105,PS_MIO31_501
E17,35,IOB_X1Y144,RIOB33_X73Y143,IO_L3P_T0_DQS_AD1P_35
E18,35,IOB_X1Y140,RIOB33_X73Y139,IO_L5P_T0_AD9P_35
E19,35,IOB_X1Y139,RIOB33_X73Y139,IO_L5N_T0_AD9N_35
F1,502,IOPAD_X1Y29,PSS2_X32Y105,PS_DDR_DM1_502
F2,502,IOPAD_X1Y65,PSS2_X32Y105,PS_DDR_DQS_N1_502
F4,502,IOPAD_X1Y17,PSS2_X32Y105,PS_DDR_A14_502
F5,502,IOPAD_X1Y14,PSS2_X32Y105,PS_DDR_A10_502
F12,501,IOPAD_X1Y112,PSS2_X32Y105,PS_MIO35_501
F13,501,IOPAD_X1Y121,PSS2_X32Y105,PS_MIO44_501
F14,501,IOPAD_X1Y98,PSS2_X32Y105,PS_MIO21_501
F15,501,IOPAD_X1Y102,PSS2_X32Y105,PS_MIO25_501
F16,35,IOB_X1Y138,RIOB33_X73Y137,IO_L6P_T0_35
F17,35,IOB_X1Y137,RIOB33_X73Y137,IO_L6N_T0_VREF_35
F19,35,IOB_X1Y120,RIOB33_X73Y119,IO_L15P_T2_DQS_AD12P_35
F20,35,IOB_X1Y119,RIOB33_X73Y119,IO_L15N_T2_DQS_AD12N_35
G2,502,IOPAD_X1Y69,PSS2_X32Y105,PS_DDR_DQS_P1_502
G3,502,IOPAD_X1Y42,PSS2_X32Y105,PS_DDR_DQ10_502
G4,502,IOPAD_X1Y15,PSS2_X32Y105,PS_DDR_A11_502
G5,502,IOPAD_X1Y2,PSS2_X32Y105,PS_DDR_VRN_502
G14,35,IOB_X1Y149,RIOB33_SING_X73Y149,IO_0_35
G15,35,IOB_X1Y111,RIOB33_X73Y111,IO_L19N_T3_VREF_35
G17,35,IOB_X1Y118,RIOB33_X73Y117,IO_L16P_T2_35
G18,35,IOB_X1Y117,RIOB33_X73Y117,IO_L16N_T2_35
G19,35,IOB_X1Y114,RIOB33_X73Y113,IO_L18P_T2_AD13P_35
G20,35,IOB_X1Y113,RIOB33_X73Y113,IO_L18N_T2_AD13N_35
H1,502,IOPAD_X1Y46,PSS2_X32Y105,PS_DDR_DQ14_502
H2,502,IOPAD_X1Y45,PSS2_X32Y105,PS_DDR_DQ13_502
H3,502,IOPAD_X1Y43,PSS2_X32Y105,PS_DDR_DQ11_502
H5,502,IOPAD_X1Y3,PSS2_X32Y105,PS_DDR_VRP_502
H15,35,IOB_X1Y112,RIOB33_X73Y111,IO_L19P_T3_35
H16,35,IOB_X1Y124,RIOB33_X73Y123,IO_L13P_T2_MRCC_35
H17,35,IOB_X1Y123,RIOB33_X73Y123,IO_L13N_T2_MRCC_35
H18,35,IOB_X1Y121,RIOB33_X73Y121,IO_L14N_T2_AD4N_SRCC_35
H20,35,IOB_X1Y115,RIOB33_X73Y115,IO_L17N_T2_AD5N_35
J1,502,IOPAD_X1Y47,PSS2_X32Y105,PS_DDR_DQ15_502
J3,502,IOPAD_X1Y44,PSS2_X32Y105,PS_DDR_DQ12_502
J4,502,IOPAD_X1Y13,PSS2_X32Y105,PS_DDR_A9_502
J5,502,IOPAD_X1Y21,PSS2_X32Y105,PS_DDR_BA2_502
J14,35,IOB_X1Y109,RIOB33_X73Y109,IO_L20N_T3_AD6N_35
J15,35,IOB_X1Y100,RIOB33_SING_X73Y100,IO_25_35
J16,35,IOB_X1Y101,RIOB33_X73Y101,IO_L24N_T3_AD15N_35
J18,35,IOB_X1Y122,RIOB33_X73Y121,IO_L14P_T2_AD4P_SRCC_35
J19,35,IOB_X1Y129,RIOB33_X73Y129,IO_L10N_T1_AD11N_35
J20,35,IOB_X1Y116,RIOB33_X73Y115,IO_L17P_T2_AD5P_35
K1,502,IOPAD_X1Y12,PSS2_X32Y105,PS_DDR_A8_502
K2,502,IOPAD_X1Y5,PSS2_X32Y105,PS_DDR_A1_502
K3,502,IOPAD_X1Y7,PSS2_X32Y105,PS_DDR_A3_502
K4,502,IOPAD_X1Y11,PSS2_X32Y105,PS_DDR_A7_502
K9,0,IPAD_X0Y0,MONITOR_BOT_PELE1_X123Y131,VP_0
K14,35,IOB_X1Y110,RIOB33_X73Y109,IO_L20P_T3_AD6P_35
K16,35,IOB_X1Y102,RIOB33_X73Y101,IO_L24P_T3_AD15P_35
K17,35,IOB_X1Y126,RIOB33_X73Y125,IO_L12P_T1_MRCC_35
K18,35,IOB_X1Y125,RIOB33_X73Y125,IO_L12N_T1_MRCC_35
K19,35,IOB_X1Y130,RIOB33_X73Y129,IO_L10P_T1_AD11P_35
L1,502,IOPAD_X1Y9,PSS2_X32Y105,PS_DDR_A5_502
L2,502,IOPAD_X1Y25,PSS2_X32Y105,PS_DDR_CKP_502
L4,502,IOPAD_X1Y10,PSS2_X32Y105,PS_DDR_A6_502
L5,502,IOPAD_X1Y19,PSS2_X32Y105,PS_DDR_BA0_502
L10,0,IPAD_X0Y1,MONITOR_BOT_PELE1_X123Y131,VN_0
L14,35,IOB_X1Y106,RIOB33_X73Y105,IO_L22P_T3_AD7P_35
L15,35,IOB_X1Y105,RIOB33_X73Y105,IO_L22N_T3_AD7N_35
L16,35,IOB_X1Y128,RIOB33_X73Y127,IO_L11P_T1_SRCC_35
L17,35,IOB_X1Y127,RIOB33_X73Y127,IO_L11N_T1_SRCC_35
L19,35,IOB_X1Y132,RIOB33_X73Y131,IO_L9P_T1_DQS_AD3P_35
L20,35,IOB_X1Y131,RIOB33_X73Y131,IO_L9N_T1_DQS_AD3N_35
M2,502,IOPAD_X1Y24,PSS2_X32Y105,PS_DDR_CKN_502
M3,502,IOPAD_X1Y6,PSS2_X32Y105,PS_DDR_A2_502
M4,502,IOPAD_X1Y8,PSS2_X32Y105,PS_DDR_A4_502
M5,502,IOPAD_X1Y1,PSS2_X32Y105,PS_DDR_WE_B_502
M14,35,IOB_X1Y104,RIOB33_X73Y103,IO_L23P_T3_35
M15,35,IOB_X1Y103,RIOB33_X73Y103,IO_L23N_T3_35
M17,35,IOB_X1Y134,RIOB33_X73Y133,IO_L8P_T1_AD10P_35
M18,35,IOB_X1Y133,RIOB33_X73Y133,IO_L8N_T1_AD10N_35
M19,35,IOB_X1Y136,RIOB33_X73Y135,IO_L7P_T1_AD2P_35
M20,35,IOB_X1Y135,RIOB33_X73Y135,IO_L7N_T1_AD2N_35
N1,502,IOPAD_X1Y27,PSS2_X32Y105,PS_DDR_CS_B_502
N2,502,IOPAD_X1Y4,PSS2_X32Y105,PS_DDR_A0_502
N3,502,IOPAD_X1Y23,PSS2_X32Y105,PS_DDR_CKE_502
N5,502,IOPAD_X1Y131,PSS2_X32Y105,PS_DDR_ODT_502
N15,35,IOB_X1Y108,RIOB33_X73Y107,IO_L21P_T3_DQS_AD14P_35
N16,35,IOB_X1Y107,RIOB33_X73Y107,IO_L21N_T3_DQS_AD14N_35
N17,34,IOB_X1Y54,RIOB33_X73Y53,IO_L23P_T3_34
N18,34,IOB_X1Y74,RIOB33_X73Y73,IO_L13P_T2_MRCC_34
N20,34,IOB_X1Y72,RIOB33_X73Y71,IO_L14P_T2_SRCC_34
P1,502,IOPAD_X1Y48,PSS2_X32Y105,PS_DDR_DQ16_502
P3,502,IOPAD_X1Y49,PSS2_X32Y105,PS_DDR_DQ17_502
P4,502,IOPAD_X1Y133,PSS2_X32Y105,PS_DDR_RAS_B_502
P5,502,IOPAD_X1Y22,PSS2_X32Y105,PS_DDR_CAS_B_502
P14,34,IOB_X1Y88,RIOB33_X73Y87,IO_L6P_T0_34
P15,34,IOB_X1Y52,RIOB33_X73Y51,IO_L24P_T3_34
P16,34,IOB_X1Y51,RIOB33_X73Y51,IO_L24N_T3_34
P18,34,IOB_X1Y53,RIOB33_X73Y53,IO_L23N_T3_34
P19,34,IOB_X1Y73,RIOB33_X73Y73,IO_L13N_T2_MRCC_34
P20,34,IOB_X1Y71,RIOB33_X73Y71,IO_L14N_T2_SRCC_34
R1,502,IOPAD_X1Y51,PSS2_X32Y105,PS_DDR_DQ19_502
R2,502,IOPAD_X1Y70,PSS2_X32Y105,PS_DDR_DQS_P2_502
R3,502,IOPAD_X1Y50,PSS2_X32Y105,PS_DDR_DQ18_502
R4,502,IOPAD_X1Y20,PSS2_X32Y105,PS_DDR_BA1_502
R14,34,IOB_X1Y87,RIOB33_X73Y87,IO_L6N_T0_VREF_34
R16,34,IOB_X1Y62,RIOB33_X73Y61,IO_L19P_T3_34
R17,34,IOB_X1Y61,RIOB33_X73Y61,IO_L19N_T3_VREF_34
R18,34,IOB_X1Y59,RIOB33_X73Y59,IO_L20N_T3_34
R19,34,IOB_X1Y99,RIOB33_SING_X73Y99,IO_0_34
T1,502,IOPAD_X1Y30,PSS2_X32Y105,PS_DDR_DM2_502
T2,502,IOPAD_X1Y66,PSS2_X32Y105,PS_DDR_DQS_N2_502
T4,502,IOPAD_X1Y52,PSS2_X32Y105,PS_DDR_DQ20_502
T5,13,IOB_X0Y12,LIOB33_X0Y11,IO_L19P_T3_13
T9,13,IOB_X0Y26,LIOB33_X0Y25,IO_L12P_T1_MRCC_13
T10,34,IOB_X1Y97,RIOB33_X73Y97,IO_L1N_T0_34
T11,34,IOB_X1Y98,RIOB33_X73Y97,IO_L1P_T0_34
T12,34,IOB_X1Y96,RIOB33_X73Y95,IO_L2P_T0_34
T14,34,IOB_X1Y90,RIOB33_X73Y89,IO_L5P_T0_34
T15,34,IOB_X1Y89,RIOB33_X73Y89,IO_L5N_T0_34
T16,34,IOB_X1Y82,RIOB33_X73Y81,IO_L9P_T1_DQS_34
T17,34,IOB_X1Y60,RIOB33_X73Y59,IO_L20P_T3_34
T19,34,IOB_X1Y50,RIOB33_SING_X73Y50,IO_25_34
T20,34,IOB_X1Y70,RIOB33_X73Y69,IO_L15P_T2_DQS_34
U2,502,IOPAD_X1Y54,PSS2_X32Y105,PS_DDR_DQ22_502
U3,502,IOPAD_X1Y55,PSS2_X32Y105,PS_DDR_DQ23_502
U4,502,IOPAD_X1Y53,PSS2_X32Y105,PS_DDR_DQ21_502
U5,13,IOB_X0Y11,LIOB33_X0Y11,IO_L19N_T3_VREF_13
U7,13,IOB_X0Y28,LIOB33_X0Y27,IO_L11P_T1_SRCC_13
U8,13,IOB_X0Y15,LIOB33_X0Y15,IO_L17N_T2_13
U9,13,IOB_X0Y16,LIOB33_X0Y15,IO_L17P_T2_13
U10,13,IOB_X0Y25,LIOB33_X0Y25,IO_L12N_T1_MRCC_13
U12,34,IOB_X1Y95,RIOB33_X73Y95,IO_L2N_T0_34
U13,34,IOB_X1Y94,RIOB33_X73Y93,IO_L3P_T0_DQS_PUDC_B_34
U14,34,IOB_X1Y78,RIOB33_X73Y77,IO_L11P_T1_SRCC_34
U15,34,IOB_X1Y77,RIOB33_X73Y77,IO_L11N_T1_SRCC_34
U17,34,IOB_X1Y81,RIOB33_X73Y81,IO_L9N_T1_DQS_34
U18,34,IOB_X1Y76,RIOB33_X73Y75,IO_L12P_T1_MRCC_34
U19,34,IOB_X1Y75,RIOB33_X73Y75,IO_L12N_T1_MRCC_34
U20,34,IOB_X1Y69,RIOB33_X73Y69,IO_L15N_T2_DQS_34
V1,502,IOPAD_X1Y56,PSS2_X32Y105,PS_DDR_DQ24_502
V2,502,IOPAD_X1Y62,PSS2_X32Y105,PS_DDR_DQ30_502
V3,502,IOPAD_X1Y63,PSS2_X32Y105,PS_DDR_DQ31_502
V5,13,IOB_X0Y37,LIOB33_X0Y37,IO_L6N_T0_VREF_13
V6,13,IOB_X0Y6,LIOB33_X0Y5,IO_L22P_T3_13
V7,13,IOB_X0Y27,LIOB33_X0Y27,IO_L11N_T1_SRCC_13
V8,13,IOB_X0Y20,LIOB33_X0Y19,IO_L15P_T2_DQS_13
V10,13,IOB_X0Y7,LIOB33_X0Y7,IO_L21N_T3_DQS_13
V11,13,IOB_X0Y8,LIOB33_X0Y7,IO_L21P_T3_DQS_13
V12,34,IOB_X1Y92,RIOB33_X73Y91,IO_L4P_T0_34
V13,34,IOB_X1Y93,RIOB33_X73Y93,IO_L3N_T0_DQS_34
V15,34,IOB_X1Y80,RIOB33_X73Y79,IO_L10P_T1_34
V16,34,IOB_X1Y64,RIOB33_X73Y63,IO_L18P_T2_34
V17,34,IOB_X1Y58,RIOB33_X73Y57,IO_L21P_T3_DQS_34
V18,34,IOB_X1Y57,RIOB33_X73Y57,IO_L21N_T3_DQS_34
V20,34,IOB_X1Y68,RIOB33_X73Y67,IO_L16P_T2_34
W1,502,IOPAD_X1Y58,PSS2_X32Y105,PS_DDR_DQ26_502
W3,502,IOPAD_X1Y61,PSS2_X32Y105,PS_DDR_DQ29_502
W4,502,IOPAD_X1Y67,PSS2_X32Y105,PS_DDR_DQS_N3_502
W5,502,IOPAD_X1Y71,PSS2_X32Y105,PS_DDR_DQS_P3_502
W6,13,IOB_X0Y5,LIOB33_X0Y5,IO_L22N_T3_13
W8,13,IOB_X0Y19,LIOB33_X0Y19,IO_L15N_T2_DQS_13
W9,13,IOB_X0Y17,LIOB33_X0Y17,IO_L16N_T2_13
W10,13,IOB_X0Y18,LIOB33_X0Y17,IO_L16P_T2_13
W11,13,IOB_X0Y14,LIOB33_X0Y13,IO_L18P_T2_13
W13,34,IOB_X1Y91,RIOB33_X73Y91,IO_L4N_T0_34
W14,34,IOB_X1Y84,RIOB33_X73Y83,IO_L8P_T1_34
W15,34,IOB_X1Y79,RIOB33_X73Y79,IO_L10N_T1_34
W16,34,IOB_X1Y63,RIOB33_X73Y63,IO_L18N_T2_34
W18,34,IOB_X1Y56,RIOB33_X73Y55,IO_L22P_T3_34
W19,34,IOB_X1Y55,RIOB33_X73Y55,IO_L22N_T3_34
W20,34,IOB_X1Y67,RIOB33_X73Y67,IO_L16N_T2_34
Y1,502,IOPAD_X1Y31,PSS2_X32Y105,PS_DDR_DM3_502
Y2,502,IOPAD_X1Y60,PSS2_X32Y105,PS_DDR_DQ28_502
Y3,502,IOPAD_X1Y57,PSS2_X32Y105,PS_DDR_DQ25_502
Y4,502,IOPAD_X1Y59,PSS2_X32Y105,PS_DDR_DQ27_502
Y6,13,IOB_X0Y23,LIOB33_X0Y23,IO_L13N_T2_MRCC_13
Y7,13,IOB_X0Y24,LIOB33_X0Y23,IO_L13P_T2_MRCC_13
Y8,13,IOB_X0Y21,LIOB33_X0Y21,IO_L14N_T2_SRCC_13
Y9,13,IOB_X0Y22,LIOB33_X0Y21,IO_L14P_T2_SRCC_13
Y11,13,IOB_X0Y13,LIOB33_X0Y13,IO_L18N_T2_13
Y12,13,IOB_X0Y10,LIOB33_X0Y9,IO_L20P_T3_13
Y13,13,IOB_X0Y9,LIOB33_X0Y9,IO_L20N_T3_13
Y14,34,IOB_X1Y83,RIOB33_X73Y83,IO_L8N_T1_34
Y16,34,IOB_X1Y86,RIOB33_X73Y85,IO_L7P_T1_34
Y17,34,IOB_X1Y85,RIOB33_X73Y85,IO_L7N_T1_34
Y18,34,IOB_X1Y66,RIOB33_X73Y65,IO_L17P_T2_34
Y19,34,IOB_X1Y65,RIOB33_X73Y65,IO_L17N_T2_34
1 pin bank site tile pin_function
2 A1 502 IOPAD_X1Y28 PSS2_X32Y105 PS_DDR_DM0_502
3 A2 502 IOPAD_X1Y34 PSS2_X32Y105 PS_DDR_DQ2_502
4 A4 502 IOPAD_X1Y35 PSS2_X32Y105 PS_DDR_DQ3_502
5 A5 500 IOPAD_X1Y83 PSS2_X32Y105 PS_MIO6_500
6 A6 500 IOPAD_X1Y82 PSS2_X32Y105 PS_MIO5_500
7 A7 500 IOPAD_X1Y78 PSS2_X32Y105 PS_MIO1_500
8 A9 501 IOPAD_X1Y120 PSS2_X32Y105 PS_MIO43_501
9 A10 501 IOPAD_X1Y114 PSS2_X32Y105 PS_MIO37_501
10 A11 501 IOPAD_X1Y113 PSS2_X32Y105 PS_MIO36_501
11 A12 501 IOPAD_X1Y111 PSS2_X32Y105 PS_MIO34_501
12 A14 501 IOPAD_X1Y109 PSS2_X32Y105 PS_MIO32_501
13 A15 501 IOPAD_X1Y103 PSS2_X32Y105 PS_MIO26_501
14 A16 501 IOPAD_X1Y101 PSS2_X32Y105 PS_MIO24_501
15 A17 501 IOPAD_X1Y97 PSS2_X32Y105 PS_MIO20_501
16 A19 501 IOPAD_X1Y93 PSS2_X32Y105 PS_MIO16_501
17 A20 35 IOB_X1Y145 RIOB33_X73Y145 IO_L2N_T0_AD8N_35
18 B2 502 IOPAD_X1Y64 PSS2_X32Y105 PS_DDR_DQS_N0_502
19 B3 502 IOPAD_X1Y33 PSS2_X32Y105 PS_DDR_DQ1_502
20 B4 502 IOPAD_X1Y72 PSS2_X32Y105 PS_DDR_DRST_B_502
21 B5 500 IOPAD_X1Y86 PSS2_X32Y105 PS_MIO9_500
22 B7 500 IOPAD_X1Y81 PSS2_X32Y105 PS_MIO4_500
23 B8 500 IOPAD_X1Y79 PSS2_X32Y105 PS_MIO2_500
24 B9 501 IOPAD_X1Y128 PSS2_X32Y105 PS_MIO51_501
25 B10 501 IOPAD_X1Y134 PSS2_X32Y105 PS_SRST_B_501
26 B12 501 IOPAD_X1Y125 PSS2_X32Y105 PS_MIO48_501
27 B13 501 IOPAD_X1Y127 PSS2_X32Y105 PS_MIO50_501
28 B14 501 IOPAD_X1Y124 PSS2_X32Y105 PS_MIO47_501
29 B15 501 IOPAD_X1Y122 PSS2_X32Y105 PS_MIO45_501
30 B17 501 IOPAD_X1Y99 PSS2_X32Y105 PS_MIO22_501
31 B18 501 IOPAD_X1Y95 PSS2_X32Y105 PS_MIO18_501
32 B19 35 IOB_X1Y146 RIOB33_X73Y145 IO_L2P_T0_AD8P_35
33 B20 35 IOB_X1Y147 RIOB33_X73Y147 IO_L1N_T0_AD0N_35
34 C1 502 IOPAD_X1Y38 PSS2_X32Y105 PS_DDR_DQ6_502
35 C2 502 IOPAD_X1Y68 PSS2_X32Y105 PS_DDR_DQS_P0_502
36 C3 502 IOPAD_X1Y32 PSS2_X32Y105 PS_DDR_DQ0_502
37 C5 500 IOPAD_X1Y91 PSS2_X32Y105 PS_MIO14_500
38 C6 500 IOPAD_X1Y88 PSS2_X32Y105 PS_MIO11_500
39 C7 500 IOPAD_X1Y132 PSS2_X32Y105 PS_POR_B_500
40 C8 500 IOPAD_X1Y92 PSS2_X32Y105 PS_MIO15_500
41 C10 501 IOPAD_X1Y129 PSS2_X32Y105 PS_MIO52_501
42 C11 501 IOPAD_X1Y130 PSS2_X32Y105 PS_MIO53_501
43 C12 501 IOPAD_X1Y126 PSS2_X32Y105 PS_MIO49_501
44 C13 501 IOPAD_X1Y106 PSS2_X32Y105 PS_MIO29_501
45 C15 501 IOPAD_X1Y107 PSS2_X32Y105 PS_MIO30_501
46 C16 501 IOPAD_X1Y105 PSS2_X32Y105 PS_MIO28_501
47 C17 501 IOPAD_X1Y118 PSS2_X32Y105 PS_MIO41_501
48 C18 501 IOPAD_X1Y116 PSS2_X32Y105 PS_MIO39_501
49 C20 35 IOB_X1Y148 RIOB33_X73Y147 IO_L1P_T0_AD0P_35
50 D1 502 IOPAD_X1Y37 PSS2_X32Y105 PS_DDR_DQ5_502
51 D3 502 IOPAD_X1Y36 PSS2_X32Y105 PS_DDR_DQ4_502
52 D4 502 IOPAD_X1Y18 PSS2_X32Y105 PS_DDR_A13_502
53 D5 500 IOPAD_X1Y85 PSS2_X32Y105 PS_MIO8_500
54 D6 500 IOPAD_X1Y80 PSS2_X32Y105 PS_MIO3_500
55 D8 500 IOPAD_X1Y84 PSS2_X32Y105 PS_MIO7_500
56 D9 500 IOPAD_X1Y89 PSS2_X32Y105 PS_MIO12_500
57 D10 501 IOPAD_X1Y96 PSS2_X32Y105 PS_MIO19_501
58 D11 501 IOPAD_X1Y100 PSS2_X32Y105 PS_MIO23_501
59 D13 501 IOPAD_X1Y104 PSS2_X32Y105 PS_MIO27_501
60 D14 501 IOPAD_X1Y117 PSS2_X32Y105 PS_MIO40_501
61 D15 501 IOPAD_X1Y110 PSS2_X32Y105 PS_MIO33_501
62 D16 501 IOPAD_X1Y123 PSS2_X32Y105 PS_MIO46_501
63 D18 35 IOB_X1Y143 RIOB33_X73Y143 IO_L3N_T0_DQS_AD1N_35
64 D19 35 IOB_X1Y142 RIOB33_X73Y141 IO_L4P_T0_35
65 D20 35 IOB_X1Y141 RIOB33_X73Y141 IO_L4N_T0_35
66 E1 502 IOPAD_X1Y39 PSS2_X32Y105 PS_DDR_DQ7_502
67 E2 502 IOPAD_X1Y40 PSS2_X32Y105 PS_DDR_DQ8_502
68 E3 502 IOPAD_X1Y41 PSS2_X32Y105 PS_DDR_DQ9_502
69 E4 502 IOPAD_X1Y16 PSS2_X32Y105 PS_DDR_A12_502
70 E6 500 IOPAD_X1Y77 PSS2_X32Y105 PS_MIO0_500
71 E7 500 IOPAD_X1Y26 PSS2_X32Y105 PS_CLK_500
72 E8 500 IOPAD_X1Y90 PSS2_X32Y105 PS_MIO13_500
73 E9 500 IOPAD_X1Y87 PSS2_X32Y105 PS_MIO10_500
74 E12 501 IOPAD_X1Y119 PSS2_X32Y105 PS_MIO42_501
75 E13 501 IOPAD_X1Y115 PSS2_X32Y105 PS_MIO38_501
76 E14 501 IOPAD_X1Y94 PSS2_X32Y105 PS_MIO17_501
77 E16 501 IOPAD_X1Y108 PSS2_X32Y105 PS_MIO31_501
78 E17 35 IOB_X1Y144 RIOB33_X73Y143 IO_L3P_T0_DQS_AD1P_35
79 E18 35 IOB_X1Y140 RIOB33_X73Y139 IO_L5P_T0_AD9P_35
80 E19 35 IOB_X1Y139 RIOB33_X73Y139 IO_L5N_T0_AD9N_35
81 F1 502 IOPAD_X1Y29 PSS2_X32Y105 PS_DDR_DM1_502
82 F2 502 IOPAD_X1Y65 PSS2_X32Y105 PS_DDR_DQS_N1_502
83 F4 502 IOPAD_X1Y17 PSS2_X32Y105 PS_DDR_A14_502
84 F5 502 IOPAD_X1Y14 PSS2_X32Y105 PS_DDR_A10_502
85 F12 501 IOPAD_X1Y112 PSS2_X32Y105 PS_MIO35_501
86 F13 501 IOPAD_X1Y121 PSS2_X32Y105 PS_MIO44_501
87 F14 501 IOPAD_X1Y98 PSS2_X32Y105 PS_MIO21_501
88 F15 501 IOPAD_X1Y102 PSS2_X32Y105 PS_MIO25_501
89 F16 35 IOB_X1Y138 RIOB33_X73Y137 IO_L6P_T0_35
90 F17 35 IOB_X1Y137 RIOB33_X73Y137 IO_L6N_T0_VREF_35
91 F19 35 IOB_X1Y120 RIOB33_X73Y119 IO_L15P_T2_DQS_AD12P_35
92 F20 35 IOB_X1Y119 RIOB33_X73Y119 IO_L15N_T2_DQS_AD12N_35
93 G2 502 IOPAD_X1Y69 PSS2_X32Y105 PS_DDR_DQS_P1_502
94 G3 502 IOPAD_X1Y42 PSS2_X32Y105 PS_DDR_DQ10_502
95 G4 502 IOPAD_X1Y15 PSS2_X32Y105 PS_DDR_A11_502
96 G5 502 IOPAD_X1Y2 PSS2_X32Y105 PS_DDR_VRN_502
97 G14 35 IOB_X1Y149 RIOB33_SING_X73Y149 IO_0_35
98 G15 35 IOB_X1Y111 RIOB33_X73Y111 IO_L19N_T3_VREF_35
99 G17 35 IOB_X1Y118 RIOB33_X73Y117 IO_L16P_T2_35
100 G18 35 IOB_X1Y117 RIOB33_X73Y117 IO_L16N_T2_35
101 G19 35 IOB_X1Y114 RIOB33_X73Y113 IO_L18P_T2_AD13P_35
102 G20 35 IOB_X1Y113 RIOB33_X73Y113 IO_L18N_T2_AD13N_35
103 H1 502 IOPAD_X1Y46 PSS2_X32Y105 PS_DDR_DQ14_502
104 H2 502 IOPAD_X1Y45 PSS2_X32Y105 PS_DDR_DQ13_502
105 H3 502 IOPAD_X1Y43 PSS2_X32Y105 PS_DDR_DQ11_502
106 H5 502 IOPAD_X1Y3 PSS2_X32Y105 PS_DDR_VRP_502
107 H15 35 IOB_X1Y112 RIOB33_X73Y111 IO_L19P_T3_35
108 H16 35 IOB_X1Y124 RIOB33_X73Y123 IO_L13P_T2_MRCC_35
109 H17 35 IOB_X1Y123 RIOB33_X73Y123 IO_L13N_T2_MRCC_35
110 H18 35 IOB_X1Y121 RIOB33_X73Y121 IO_L14N_T2_AD4N_SRCC_35
111 H20 35 IOB_X1Y115 RIOB33_X73Y115 IO_L17N_T2_AD5N_35
112 J1 502 IOPAD_X1Y47 PSS2_X32Y105 PS_DDR_DQ15_502
113 J3 502 IOPAD_X1Y44 PSS2_X32Y105 PS_DDR_DQ12_502
114 J4 502 IOPAD_X1Y13 PSS2_X32Y105 PS_DDR_A9_502
115 J5 502 IOPAD_X1Y21 PSS2_X32Y105 PS_DDR_BA2_502
116 J14 35 IOB_X1Y109 RIOB33_X73Y109 IO_L20N_T3_AD6N_35
117 J15 35 IOB_X1Y100 RIOB33_SING_X73Y100 IO_25_35
118 J16 35 IOB_X1Y101 RIOB33_X73Y101 IO_L24N_T3_AD15N_35
119 J18 35 IOB_X1Y122 RIOB33_X73Y121 IO_L14P_T2_AD4P_SRCC_35
120 J19 35 IOB_X1Y129 RIOB33_X73Y129 IO_L10N_T1_AD11N_35
121 J20 35 IOB_X1Y116 RIOB33_X73Y115 IO_L17P_T2_AD5P_35
122 K1 502 IOPAD_X1Y12 PSS2_X32Y105 PS_DDR_A8_502
123 K2 502 IOPAD_X1Y5 PSS2_X32Y105 PS_DDR_A1_502
124 K3 502 IOPAD_X1Y7 PSS2_X32Y105 PS_DDR_A3_502
125 K4 502 IOPAD_X1Y11 PSS2_X32Y105 PS_DDR_A7_502
126 K9 0 IPAD_X0Y0 MONITOR_BOT_PELE1_X123Y131 VP_0
127 K14 35 IOB_X1Y110 RIOB33_X73Y109 IO_L20P_T3_AD6P_35
128 K16 35 IOB_X1Y102 RIOB33_X73Y101 IO_L24P_T3_AD15P_35
129 K17 35 IOB_X1Y126 RIOB33_X73Y125 IO_L12P_T1_MRCC_35
130 K18 35 IOB_X1Y125 RIOB33_X73Y125 IO_L12N_T1_MRCC_35
131 K19 35 IOB_X1Y130 RIOB33_X73Y129 IO_L10P_T1_AD11P_35
132 L1 502 IOPAD_X1Y9 PSS2_X32Y105 PS_DDR_A5_502
133 L2 502 IOPAD_X1Y25 PSS2_X32Y105 PS_DDR_CKP_502
134 L4 502 IOPAD_X1Y10 PSS2_X32Y105 PS_DDR_A6_502
135 L5 502 IOPAD_X1Y19 PSS2_X32Y105 PS_DDR_BA0_502
136 L10 0 IPAD_X0Y1 MONITOR_BOT_PELE1_X123Y131 VN_0
137 L14 35 IOB_X1Y106 RIOB33_X73Y105 IO_L22P_T3_AD7P_35
138 L15 35 IOB_X1Y105 RIOB33_X73Y105 IO_L22N_T3_AD7N_35
139 L16 35 IOB_X1Y128 RIOB33_X73Y127 IO_L11P_T1_SRCC_35
140 L17 35 IOB_X1Y127 RIOB33_X73Y127 IO_L11N_T1_SRCC_35
141 L19 35 IOB_X1Y132 RIOB33_X73Y131 IO_L9P_T1_DQS_AD3P_35
142 L20 35 IOB_X1Y131 RIOB33_X73Y131 IO_L9N_T1_DQS_AD3N_35
143 M2 502 IOPAD_X1Y24 PSS2_X32Y105 PS_DDR_CKN_502
144 M3 502 IOPAD_X1Y6 PSS2_X32Y105 PS_DDR_A2_502
145 M4 502 IOPAD_X1Y8 PSS2_X32Y105 PS_DDR_A4_502
146 M5 502 IOPAD_X1Y1 PSS2_X32Y105 PS_DDR_WE_B_502
147 M14 35 IOB_X1Y104 RIOB33_X73Y103 IO_L23P_T3_35
148 M15 35 IOB_X1Y103 RIOB33_X73Y103 IO_L23N_T3_35
149 M17 35 IOB_X1Y134 RIOB33_X73Y133 IO_L8P_T1_AD10P_35
150 M18 35 IOB_X1Y133 RIOB33_X73Y133 IO_L8N_T1_AD10N_35
151 M19 35 IOB_X1Y136 RIOB33_X73Y135 IO_L7P_T1_AD2P_35
152 M20 35 IOB_X1Y135 RIOB33_X73Y135 IO_L7N_T1_AD2N_35
153 N1 502 IOPAD_X1Y27 PSS2_X32Y105 PS_DDR_CS_B_502
154 N2 502 IOPAD_X1Y4 PSS2_X32Y105 PS_DDR_A0_502
155 N3 502 IOPAD_X1Y23 PSS2_X32Y105 PS_DDR_CKE_502
156 N5 502 IOPAD_X1Y131 PSS2_X32Y105 PS_DDR_ODT_502
157 N15 35 IOB_X1Y108 RIOB33_X73Y107 IO_L21P_T3_DQS_AD14P_35
158 N16 35 IOB_X1Y107 RIOB33_X73Y107 IO_L21N_T3_DQS_AD14N_35
159 N17 34 IOB_X1Y54 RIOB33_X73Y53 IO_L23P_T3_34
160 N18 34 IOB_X1Y74 RIOB33_X73Y73 IO_L13P_T2_MRCC_34
161 N20 34 IOB_X1Y72 RIOB33_X73Y71 IO_L14P_T2_SRCC_34
162 P1 502 IOPAD_X1Y48 PSS2_X32Y105 PS_DDR_DQ16_502
163 P3 502 IOPAD_X1Y49 PSS2_X32Y105 PS_DDR_DQ17_502
164 P4 502 IOPAD_X1Y133 PSS2_X32Y105 PS_DDR_RAS_B_502
165 P5 502 IOPAD_X1Y22 PSS2_X32Y105 PS_DDR_CAS_B_502
166 P14 34 IOB_X1Y88 RIOB33_X73Y87 IO_L6P_T0_34
167 P15 34 IOB_X1Y52 RIOB33_X73Y51 IO_L24P_T3_34
168 P16 34 IOB_X1Y51 RIOB33_X73Y51 IO_L24N_T3_34
169 P18 34 IOB_X1Y53 RIOB33_X73Y53 IO_L23N_T3_34
170 P19 34 IOB_X1Y73 RIOB33_X73Y73 IO_L13N_T2_MRCC_34
171 P20 34 IOB_X1Y71 RIOB33_X73Y71 IO_L14N_T2_SRCC_34
172 R1 502 IOPAD_X1Y51 PSS2_X32Y105 PS_DDR_DQ19_502
173 R2 502 IOPAD_X1Y70 PSS2_X32Y105 PS_DDR_DQS_P2_502
174 R3 502 IOPAD_X1Y50 PSS2_X32Y105 PS_DDR_DQ18_502
175 R4 502 IOPAD_X1Y20 PSS2_X32Y105 PS_DDR_BA1_502
176 R14 34 IOB_X1Y87 RIOB33_X73Y87 IO_L6N_T0_VREF_34
177 R16 34 IOB_X1Y62 RIOB33_X73Y61 IO_L19P_T3_34
178 R17 34 IOB_X1Y61 RIOB33_X73Y61 IO_L19N_T3_VREF_34
179 R18 34 IOB_X1Y59 RIOB33_X73Y59 IO_L20N_T3_34
180 R19 34 IOB_X1Y99 RIOB33_SING_X73Y99 IO_0_34
181 T1 502 IOPAD_X1Y30 PSS2_X32Y105 PS_DDR_DM2_502
182 T2 502 IOPAD_X1Y66 PSS2_X32Y105 PS_DDR_DQS_N2_502
183 T4 502 IOPAD_X1Y52 PSS2_X32Y105 PS_DDR_DQ20_502
184 T5 13 IOB_X0Y12 LIOB33_X0Y11 IO_L19P_T3_13
185 T9 13 IOB_X0Y26 LIOB33_X0Y25 IO_L12P_T1_MRCC_13
186 T10 34 IOB_X1Y97 RIOB33_X73Y97 IO_L1N_T0_34
187 T11 34 IOB_X1Y98 RIOB33_X73Y97 IO_L1P_T0_34
188 T12 34 IOB_X1Y96 RIOB33_X73Y95 IO_L2P_T0_34
189 T14 34 IOB_X1Y90 RIOB33_X73Y89 IO_L5P_T0_34
190 T15 34 IOB_X1Y89 RIOB33_X73Y89 IO_L5N_T0_34
191 T16 34 IOB_X1Y82 RIOB33_X73Y81 IO_L9P_T1_DQS_34
192 T17 34 IOB_X1Y60 RIOB33_X73Y59 IO_L20P_T3_34
193 T19 34 IOB_X1Y50 RIOB33_SING_X73Y50 IO_25_34
194 T20 34 IOB_X1Y70 RIOB33_X73Y69 IO_L15P_T2_DQS_34
195 U2 502 IOPAD_X1Y54 PSS2_X32Y105 PS_DDR_DQ22_502
196 U3 502 IOPAD_X1Y55 PSS2_X32Y105 PS_DDR_DQ23_502
197 U4 502 IOPAD_X1Y53 PSS2_X32Y105 PS_DDR_DQ21_502
198 U5 13 IOB_X0Y11 LIOB33_X0Y11 IO_L19N_T3_VREF_13
199 U7 13 IOB_X0Y28 LIOB33_X0Y27 IO_L11P_T1_SRCC_13
200 U8 13 IOB_X0Y15 LIOB33_X0Y15 IO_L17N_T2_13
201 U9 13 IOB_X0Y16 LIOB33_X0Y15 IO_L17P_T2_13
202 U10 13 IOB_X0Y25 LIOB33_X0Y25 IO_L12N_T1_MRCC_13
203 U12 34 IOB_X1Y95 RIOB33_X73Y95 IO_L2N_T0_34
204 U13 34 IOB_X1Y94 RIOB33_X73Y93 IO_L3P_T0_DQS_PUDC_B_34
205 U14 34 IOB_X1Y78 RIOB33_X73Y77 IO_L11P_T1_SRCC_34
206 U15 34 IOB_X1Y77 RIOB33_X73Y77 IO_L11N_T1_SRCC_34
207 U17 34 IOB_X1Y81 RIOB33_X73Y81 IO_L9N_T1_DQS_34
208 U18 34 IOB_X1Y76 RIOB33_X73Y75 IO_L12P_T1_MRCC_34
209 U19 34 IOB_X1Y75 RIOB33_X73Y75 IO_L12N_T1_MRCC_34
210 U20 34 IOB_X1Y69 RIOB33_X73Y69 IO_L15N_T2_DQS_34
211 V1 502 IOPAD_X1Y56 PSS2_X32Y105 PS_DDR_DQ24_502
212 V2 502 IOPAD_X1Y62 PSS2_X32Y105 PS_DDR_DQ30_502
213 V3 502 IOPAD_X1Y63 PSS2_X32Y105 PS_DDR_DQ31_502
214 V5 13 IOB_X0Y37 LIOB33_X0Y37 IO_L6N_T0_VREF_13
215 V6 13 IOB_X0Y6 LIOB33_X0Y5 IO_L22P_T3_13
216 V7 13 IOB_X0Y27 LIOB33_X0Y27 IO_L11N_T1_SRCC_13
217 V8 13 IOB_X0Y20 LIOB33_X0Y19 IO_L15P_T2_DQS_13
218 V10 13 IOB_X0Y7 LIOB33_X0Y7 IO_L21N_T3_DQS_13
219 V11 13 IOB_X0Y8 LIOB33_X0Y7 IO_L21P_T3_DQS_13
220 V12 34 IOB_X1Y92 RIOB33_X73Y91 IO_L4P_T0_34
221 V13 34 IOB_X1Y93 RIOB33_X73Y93 IO_L3N_T0_DQS_34
222 V15 34 IOB_X1Y80 RIOB33_X73Y79 IO_L10P_T1_34
223 V16 34 IOB_X1Y64 RIOB33_X73Y63 IO_L18P_T2_34
224 V17 34 IOB_X1Y58 RIOB33_X73Y57 IO_L21P_T3_DQS_34
225 V18 34 IOB_X1Y57 RIOB33_X73Y57 IO_L21N_T3_DQS_34
226 V20 34 IOB_X1Y68 RIOB33_X73Y67 IO_L16P_T2_34
227 W1 502 IOPAD_X1Y58 PSS2_X32Y105 PS_DDR_DQ26_502
228 W3 502 IOPAD_X1Y61 PSS2_X32Y105 PS_DDR_DQ29_502
229 W4 502 IOPAD_X1Y67 PSS2_X32Y105 PS_DDR_DQS_N3_502
230 W5 502 IOPAD_X1Y71 PSS2_X32Y105 PS_DDR_DQS_P3_502
231 W6 13 IOB_X0Y5 LIOB33_X0Y5 IO_L22N_T3_13
232 W8 13 IOB_X0Y19 LIOB33_X0Y19 IO_L15N_T2_DQS_13
233 W9 13 IOB_X0Y17 LIOB33_X0Y17 IO_L16N_T2_13
234 W10 13 IOB_X0Y18 LIOB33_X0Y17 IO_L16P_T2_13
235 W11 13 IOB_X0Y14 LIOB33_X0Y13 IO_L18P_T2_13
236 W13 34 IOB_X1Y91 RIOB33_X73Y91 IO_L4N_T0_34
237 W14 34 IOB_X1Y84 RIOB33_X73Y83 IO_L8P_T1_34
238 W15 34 IOB_X1Y79 RIOB33_X73Y79 IO_L10N_T1_34
239 W16 34 IOB_X1Y63 RIOB33_X73Y63 IO_L18N_T2_34
240 W18 34 IOB_X1Y56 RIOB33_X73Y55 IO_L22P_T3_34
241 W19 34 IOB_X1Y55 RIOB33_X73Y55 IO_L22N_T3_34
242 W20 34 IOB_X1Y67 RIOB33_X73Y67 IO_L16N_T2_34
243 Y1 502 IOPAD_X1Y31 PSS2_X32Y105 PS_DDR_DM3_502
244 Y2 502 IOPAD_X1Y60 PSS2_X32Y105 PS_DDR_DQ28_502
245 Y3 502 IOPAD_X1Y57 PSS2_X32Y105 PS_DDR_DQ25_502
246 Y4 502 IOPAD_X1Y59 PSS2_X32Y105 PS_DDR_DQ27_502
247 Y6 13 IOB_X0Y23 LIOB33_X0Y23 IO_L13N_T2_MRCC_13
248 Y7 13 IOB_X0Y24 LIOB33_X0Y23 IO_L13P_T2_MRCC_13
249 Y8 13 IOB_X0Y21 LIOB33_X0Y21 IO_L14N_T2_SRCC_13
250 Y9 13 IOB_X0Y22 LIOB33_X0Y21 IO_L14P_T2_SRCC_13
251 Y11 13 IOB_X0Y13 LIOB33_X0Y13 IO_L18N_T2_13
252 Y12 13 IOB_X0Y10 LIOB33_X0Y9 IO_L20P_T3_13
253 Y13 13 IOB_X0Y9 LIOB33_X0Y9 IO_L20N_T3_13
254 Y14 34 IOB_X1Y83 RIOB33_X73Y83 IO_L8N_T1_34
255 Y16 34 IOB_X1Y86 RIOB33_X73Y85 IO_L7P_T1_34
256 Y17 34 IOB_X1Y85 RIOB33_X73Y85 IO_L7N_T1_34
257 Y18 34 IOB_X1Y66 RIOB33_X73Y65 IO_L17P_T2_34
258 Y19 34 IOB_X1Y65 RIOB33_X73Y65 IO_L17N_T2_34

775
zynq7/xc7z020clg400-1/part.json Normal file
View File

@ -0,0 +1,775 @@
{
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}
}

505
zynq7/xc7z020clg400-1/part.yaml Normal file
View File

@ -0,0 +1,505 @@
!<xilinx/xc7series/part>
idcode: 0x3727093
global_clock_regions:
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rows:
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BLOCK_RAM: !<xilinx/xc7series/configuration_bus>
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frame_count: 128
bottom: !<xilinx/xc7series/global_clock_region>
rows:
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configuration_buses:
CLB_IO_CLK: !<xilinx/xc7series/configuration_bus>
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configuration_buses:
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frame_count: 128

3
zynq7/xc7z020clg400-1/required_features.fasm Normal file
View File

@ -0,0 +1,3 @@
CFG_CENTER_MID_X123Y84.ALWAYS_ON_PROP1
CFG_CENTER_MID_X123Y84.ALWAYS_ON_PROP2
CFG_CENTER_MID_X123Y84.ALWAYS_ON_PROP3

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