luke
/
prjpeppercorn
mirror of https://github.com/YosysHQ/prjpeppercorn.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity
Project Peppercorn - GateMate FPGA Bitstream Documentation
99 Commits 2 Branches 15 Tags 11 MiB
Python 70.2%
C++ 28.6%
CMake 1.1%
Shell 0.1%
Go to file
Miodrag Milanovic 9ccc8588c0 RAM configuration bits 2025-03-21 10:01:41 +01:00
docs Update readthedocs config 2024-12-04 17:19:41 +01:00
gatemate Add flags for clock source 2025-03-18 09:20:12 +01:00
libgm RAM configuration bits 2025-03-21 10:01:41 +01:00
tools Added CFG_CTRL 2025-03-04 14:58:54 +01:00
.gitignore Start modeling chip die 2024-12-09 10:57:04 +01:00
.readthedocs.yaml Update readthedocs config 2024-12-04 17:19:41 +01:00
COPYING License and README 2024-12-04 11:45:48 +01:00
README.md License and README 2024-12-04 11:45:48 +01:00
environment.sh Start modeling chip die 2024-12-09 10:57:04 +01:00

README.md

Project Peppercorn

GateMate FPGAs Bitstream Documentation and Tools

Credits

Code is heavily based on prjtrellis. Special thanks goes to @gatecat

License

All software (code, associated documentation, support files, etc) in the Project Peppercorn repository are licensed under the very permissive ISC Licence. A copy can be found in the COPYING file.

All new contributions must also be released under this license.