Fix IOES mux, change mux name forming
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de9e9d3554
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@ -185,6 +185,9 @@ PRIMITIVES_PINS = {
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Pin("CLOCK2", PinType.INPUT, "GPIO_WIRE"),
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Pin("CLOCK3", PinType.INPUT, "GPIO_WIRE"),
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Pin("CLOCK4", PinType.INPUT, "GPIO_WIRE"),
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Pin("DI" , PinType.INPUT, "GPIO_WIRE"),
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Pin("DO" , PinType.OUTPUT,"GPIO_WIRE"),
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Pin("OE" , PinType.OUTPUT,"GPIO_WIRE"),
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]
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}
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@ -298,8 +301,8 @@ def get_endpoints_for_type(type):
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def get_mux_connections_for_type(type):
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muxes = []
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def create_mux(src, dst, bits, value, invert):
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name = dst.replace(".","_") + "_MUX"
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def create_mux(src, dst, bits, value, invert, name = None):
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name = dst if name is None else name
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muxes.append(MUX(src, dst, name, bits, value, invert))
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if "CPE" in type:
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@ -338,7 +341,7 @@ def get_mux_connections_for_type(type):
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create_mux(f"SB_BIG.P{plane}.X23", f"SB_BIG.P{plane}.YDIAG", 3, 7, True)
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for i in range(1,5):
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create_mux(f"SB_DRIVE.P{plane}.D{i}.IN", f"SB_DRIVE.P{plane}.D{i}.OUT", 1, 1, False)
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create_mux(f"SB_DRIVE.P{plane}.D{i}.IN", f"SB_DRIVE.P{plane}.D{i}.OUT", 1, 1, False, f"SB_DRIVE.P{plane}.D{i}")
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if "SB_SML" in type:
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# SB_SML
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@ -368,7 +371,7 @@ def get_mux_connections_for_type(type):
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for p in range(1,13):
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plane = f"{p:02d}"
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io_in = 1 if p % 2 else 2
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create_mux(f"IOES.IO_IN{io_in}", f"IOES.SB_IN_{plane}", 0, 1, False)
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create_mux(f"IOES.IO_IN{io_in}", f"IOES.SB_IN_{plane}", 1, 0, False)
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create_mux(f"IOES.ALTIN_{plane}", f"IOES.SB_IN_{plane}", 1, 1, False)
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return muxes
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