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prjpeppercorn
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Add pin connection aliases for BUFG

This commit is contained in:
Miodrag Milanovic 2025-01-03 15:06:20 +01:00
parent 2973f64c61
commit a9176c42d6
1 changed files with 18 additions and 3 deletions
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19
gatemate/die.py
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@ -166,6 +166,7 @@ class Pin:
name : str
dir : PinType
wire_type : str
use_alias_conn: bool = False
@dataclass
class Group:
@ -249,8 +250,8 @@ PRIMITIVES_PINS = {
Pin("OE" , PinType.OUTPUT,"GPIO_WIRE"),
],
"BUFG" : [
Pin("I" , PinType.INPUT, "BUFG_WIRE"),
Pin("O" , PinType.OUTPUT,"BUFG_WIRE"),
Pin("I" , PinType.INPUT, "BUFG_WIRE", True),
Pin("O" , PinType.OUTPUT,"BUFG_WIRE", True),
],
"PLL" : [
Pin("CLK_REF", PinType.INPUT, "PLL_WIRE"),
@ -326,6 +327,14 @@ def get_primitives_for_type(type):
def get_primitive_pins(bel):
return PRIMITIVES_PINS[bel]
def get_pin_connection_name(prim, pin):
if prim.type == "BUFG":
if pin.dir == PinType.INPUT:
return f"GLBOUT.CLK_SEL_INT_{prim.z}"
else:
return f"GLBOUT.USR_GLB{prim.z}"
return f"{prim.name}.{pin.name}"
def get_endpoints_for_type(type):
wires = []
def create_wire(name, type):
@ -333,6 +342,7 @@ def get_endpoints_for_type(type):
for prim in get_primitives_for_type(type):
for pin in get_primitive_pins(prim.type):
if not pin.use_alias_conn:
create_wire(f"{prim.name}.{pin.name}", type=f"{pin.wire_type}")
if "CPE" in type:
@ -932,6 +942,11 @@ class Die:
loc = self.gpio_to_loc["GPIO_W2_A[5]"]
self.create_conn(loc.x, loc.y, "GPIO.IN1", PLL_X_POS, PLL_Y_POS, "CLKIN.CLK3")
self.create_conn(1, 128, "CPE.RAM_O1", PLL_X_POS, PLL_Y_POS, "GLBOUT.USR_GLB0")
self.create_conn(1, 127, "CPE.RAM_O1", PLL_X_POS, PLL_Y_POS, "GLBOUT.USR_GLB1")
self.create_conn(1, 126, "CPE.RAM_O1", PLL_X_POS, PLL_Y_POS, "GLBOUT.USR_GLB2")
self.create_conn(1, 125, "CPE.RAM_O1", PLL_X_POS, PLL_Y_POS, "GLBOUT.USR_GLB3")
def create_in_die_connections(self, conn):
self.conn = conn
for y in range(-2, max_row()+1):