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Add alternate clock routes

This commit is contained in:
Miodrag Milanovic 2025-12-24 10:43:57 +01:00
parent 8f0b8a06f2
commit 2590f03408
1 changed files with 6 additions and 2 deletions
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8
gatemate/die.py
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@ -3528,9 +3528,13 @@ def get_mux_connections_for_type(type):
create_mux("CPE.D0_02_int", "CPE.D1_11_int", 1, 1, False, "LUT2_11", False, delay="del_dummy")
create_mux("CPE.CLK", "CPE.CLK_int", 1, 0, False, "C_CLKSEL", False, delay="del_dummy")
#create_mux("CPE.CINY2", "CPE.CLK_int", 1, 1, False, "C_CLKSEL", False, delay="del_dummy")
create_mux("CPE.CINY2", "CPE.CLK_int", 1, 1, False, "C_CLKSEL", False, delay="del_dummy")
create_mux("CPE.EN", "CPE.EN_int", 1, 0, False, "C_ENSEL", False, delay="del_dummy")
#create_mux("CPE.PINY2", "CPE.EN_int", 1, 1, False, "C_ENSEL", False, delay="del_dummy")
create_mux("CPE.PINY2", "CPE.EN_int", 1, 1, False, "C_ENSEL", False, delay="del_dummy")
#create_mux("CPE.PINY2", "CPE.POUTY2", 1, 1, False, "PASS", False, delay="_ROUTING_PINY2_POUTY2")
#create_mux("CPE.CINY1", "CPE.COUTY1", 1, 1, False, "PASS", False, delay="_ROUTING_CINY2_COUTY2")
create_mux("CPE.CINY2", "CPE.COUTY2", 1, 1, False, "PASS", False, delay="_ROUTING_CINY2_COUTY2")
for p in range(1,13):
plane = f"{p:02d}"