basic code for packing/unpacking

This commit is contained in:
Miodrag Milanovic 2024-12-04 12:13:51 +01:00
parent fd2978dbf2
commit 0666b68314
17 changed files with 1610 additions and 344 deletions

87
libgm/.clang-format Normal file
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...

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/*
* prjpeppercorn -- GateMate FPGAs Bitstream Documentation and Tools
*
* Copyright (C) 2024 The Project Peppercorn Authors.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#ifndef LIBGATEMATE_BITSTREAM_HPP
#define LIBGATEMATE_BITSTREAM_HPP
#include <cstdint>
#include <memory>
#include <iostream>
#include <memory>
#include <vector>
#include <string>
#include <stdexcept>
#include <map>
#include <boost/optional.hpp>
#include <map>
#include <stdexcept>
#include <string>
#include <vector>
namespace GateMate {
@ -27,6 +45,7 @@ class Bitstream
Chip deserialise_chip();
void write_bit(std::ostream &out);
private:
Bitstream(const std::vector<uint8_t> &data);

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/*
* prjpeppercorn -- GateMate FPGAs Bitstream Documentation and Tools
*
* Copyright (C) 2024 The Project Peppercorn Authors.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#ifndef LIBGATEMATE_CHIP_HPP
#define LIBGATEMATE_CHIP_HPP
#include <string>
#include <vector>
#include "Die.hpp"
using namespace std;
namespace GateMate {
class Chip
{
public:
explicit Chip();
public:
explicit Chip(std::string name);
explicit Chip(int num);
int get_max_die() const;
std::string get_name() const;
const Die &get_die(int num) const { return dies.at(num); }
Die &get_die(int num) { return dies.at(num); }
private:
int die_num;
std::vector<Die> dies;
};
}
} // namespace GateMate
#endif //LIBGATEMATE_CHIP_HPP
#endif // LIBGATEMATE_CHIP_HPP

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@ -0,0 +1,68 @@
/*
* prjpeppercorn -- GateMate FPGAs Bitstream Documentation and Tools
*
* Copyright (C) 2024 The Project Peppercorn Authors.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#ifndef LIBGATEMATE_CHIPCONFIG_HPP
#define LIBGATEMATE_CHIPCONFIG_HPP
#include <cstdint>
#include <map>
#include <string>
#include <vector>
#include "TileConfig.hpp"
namespace GateMate {
class Chip;
struct CfgLoc
{
int die;
int x;
int y;
inline bool operator==(const CfgLoc &other) const { return other.die == die && other.x == x && other.y == y; }
inline bool operator!=(const CfgLoc &other) const { return other.die != die || x != other.x || y == other.y; }
inline bool operator<(const CfgLoc &other) const
{
return die < other.die ||
((die == other.die && y < other.y) || (die == other.die && y == other.y && x < other.x));
}
};
class ChipConfig
{
public:
string chip_name;
string chip_package;
std::map<CfgLoc, TileConfig> tiles;
std::map<CfgLoc, TileConfig> rams;
// Block RAM initialisation
std::map<CfgLoc, std::vector<uint8_t>> bram_data;
std::string to_string() const;
static ChipConfig from_string(const std::string &config);
Chip to_chip() const;
static ChipConfig from_chip(const Chip &chip);
};
} // namespace GateMate
#endif // LIBGATEMATE_CHIPCONFIG_HPP

72
libgm/include/Die.hpp Normal file
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/*
* prjpeppercorn -- GateMate FPGAs Bitstream Documentation and Tools
*
* Copyright (C) 2024 The Project Peppercorn Authors.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#ifndef LIBGATEMATE_DIE_HPP
#define LIBGATEMATE_DIE_HPP
#include <cstdint>
#include <string>
#include <vector>
namespace GateMate {
class Die
{
public:
static constexpr int MAX_ROWS = 66;
static constexpr int MAX_COLS = 82;
static constexpr int MAX_RAM = 32;
static constexpr int MAX_RAM_ROWS = 8;
static constexpr int MAX_RAM_COLS = 4;
static constexpr int LATCH_BLOCK_SIZE = 112;
static constexpr int RAM_BLOCK_SIZE = 27;
static constexpr int MEMORY_SIZE = 5120;
public:
explicit Die();
// Get max row and column
int get_max_row() const { return MAX_ROWS; }
int get_max_col() const { return MAX_COLS; }
int get_max_ram_row() const { return MAX_RAM_ROWS; }
int get_max_ram_col() const { return MAX_RAM_COLS; }
void clear();
bool is_latch_empty(int x, int y) const;
bool is_ram_empty(int x, int y) const;
bool is_ram_data_empty(int x, int y) const;
void write_latch(int x, int y, const std::vector<uint8_t> &data);
void write_ram(int x, int y, const std::vector<uint8_t> &data);
void write_ram_data(int x, int y, const std::vector<uint8_t> &data, uint16_t addr);
const uint8_t *get_latch_config(int x, int y) const { return &latch[y * MAX_COLS + x][0]; }
const uint8_t *get_ram_config(int x, int y) const { return &ram[y * MAX_RAM_COLS + x][0]; }
const uint8_t *get_ram_data(int x, int y) const { return &ram_data[y * MAX_RAM_COLS + x][0]; }
private:
uint8_t latch[MAX_ROWS * MAX_COLS][LATCH_BLOCK_SIZE]; // Config latches
uint8_t ram[MAX_RAM][RAM_BLOCK_SIZE]; // Config RAM
uint8_t ram_data[MAX_RAM][MEMORY_SIZE]; // RAM data content FRAM
};
} // namespace GateMate
#endif // LIBGATEMATE_DIE_HPP

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@ -0,0 +1,95 @@
/*
* prjpeppercorn -- GateMate FPGAs Bitstream Documentation and Tools
*
* Copyright (C) 2024 The Project Peppercorn Authors.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#ifndef LIBGATEMATE_TILEBITDATABASE_HPP
#define LIBGATEMATE_TILEBITDATABASE_HPP
#include <cstdint>
#include <map>
#include <string>
#include <vector>
#include "TileConfig.hpp"
namespace GateMate {
struct WordSettingBits
{
int start;
int end;
vector<bool> get_value(const vector<bool> &tile) const;
void set_value(vector<bool> &tile, const vector<bool> &value) const;
inline bool operator==(const WordSettingBits &other) const { return (start == other.start) && (end == other.end); }
};
class BaseBitDatabase
{
public:
BaseBitDatabase();
virtual ~BaseBitDatabase();
protected:
void add_word_settings(const std::string &name, int start, int end);
std::vector<uint8_t> bits_to_bytes(std::vector<bool> &bits);
map<std::string, WordSettingBits> words;
};
class TileBitDatabase : BaseBitDatabase
{
public:
TileBitDatabase(const int x, const int y);
TileConfig tile_data_to_config(const uint8_t *data);
std::vector<uint8_t> config_to_tile_data(const TileConfig &cfg);
private:
void add_sb_big(int index, int start);
void add_sb_sml(int index, int start);
void add_sb_drive(int index, int start);
void add_cpe(int index, int start);
void add_inmux(int index, int plane, int start);
void add_gpio(int start);
void add_edge_io(int index, int start);
void add_right_edge(int index, int start);
void add_left_edge(int index, int start);
void add_top_edge(int index, int start);
void add_bottom_edge(int index, int start);
};
class RamBitDatabase : BaseBitDatabase
{
public:
RamBitDatabase();
TileConfig ram_data_to_config(const uint8_t *data);
std::vector<uint8_t> config_to_ram_data(const TileConfig &cfg);
};
class DatabaseConflictError : public runtime_error
{
public:
explicit DatabaseConflictError(const string &desc);
};
} // namespace GateMate
#endif // LIBGATEMATE_TILEBITDATABASE_HPP

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@ -0,0 +1,63 @@
/*
* prjpeppercorn -- GateMate FPGAs Bitstream Documentation and Tools
*
* Copyright (C) 2024 The Project Peppercorn Authors.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#ifndef LIBGATEMATE_TILECONFIG_HPP
#define LIBGATEMATE_TILECONFIG_HPP
#include <cstdint>
#include <iostream>
#include <map>
#include <string>
#include <vector>
using namespace std;
namespace GateMate {
struct ConfigWord
{
string name;
vector<bool> value;
inline bool operator==(const ConfigWord &other) const { return other.name == name && other.value == value; }
};
ostream &operator<<(ostream &out, const ConfigWord &cw);
istream &operator>>(istream &in, ConfigWord &cw);
struct TileConfig
{
vector<ConfigWord> cwords;
int total_known_bits = 0;
void add_word(const string &name, const vector<bool> &value);
string to_string() const;
static TileConfig from_string(const string &str);
bool empty() const;
};
ostream &operator<<(ostream &out, const TileConfig &tc);
istream &operator>>(istream &in, TileConfig &ce);
} // namespace GateMate
#endif // LIBGATEMATE_TILECONFIG_HPP

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@ -1,43 +1,64 @@
/*
* prjpeppercorn -- GateMate FPGAs Bitstream Documentation and Tools
*
* Copyright (C) 2024 The Project Peppercorn Authors.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#ifndef LIBGATEMATE_UTIL_HPP
#define LIBGATEMATE_UTIL_HPP
#include <string>
#include <sstream>
#include <iomanip>
#include <cstdint>
#include <vector>
#include <boost/range/adaptor/reversed.hpp>
#include <cstdint>
#include <iomanip>
#include <sstream>
#include <string>
#include <vector>
using namespace std;
namespace GateMate {
enum class VerbosityLevel {
enum class VerbosityLevel
{
ERROR,
NOTE,
DEBUG,
};
extern VerbosityLevel verbosity;
inline string uint32_to_hexstr(uint32_t val) {
inline string uint32_to_hexstr(uint32_t val)
{
ostringstream os;
os << "0x" << hex << setw(8) << setfill('0') << val;
return os.str();
}
// Hex is not allowed in JSON, to avoid an ugly decimal integer use a string instead
// But we need to parse this back to a uint32_t
inline uint32_t parse_uint32(string str) {
return uint32_t(strtoul(str.c_str(), nullptr, 0));
}
// Hex is not allowed in JSON, to avoid an ugly decimal integer use a string
// instead But we need to parse this back to a uint32_t
inline uint32_t parse_uint32(string str) { return uint32_t(strtoul(str.c_str(), nullptr, 0)); }
inline string to_string(const vector<bool> &bv) {
inline string to_string(const vector<bool> &bv)
{
ostringstream os;
for (auto bit : boost::adaptors::reverse(bv))
os << (bit ? '1' : '0');
return os.str();
}
inline istream &operator>>(istream &in, vector<bool> &bv) {
inline istream &operator>>(istream &in, vector<bool> &bv)
{
bv.clear();
string s;
in >> s;
@ -49,7 +70,8 @@ inline istream &operator>>(istream &in, vector<bool> &bv) {
}
// Skip whitespace, optionally including newlines
inline void skip_blank(istream &in, bool nl = false) {
inline void skip_blank(istream &in, bool nl = false)
{
int c = in.peek();
while (in && (((c == ' ') || (c == '\t')) || (nl && ((c == '\n') || (c == '\r'))))) {
in.get();
@ -57,7 +79,8 @@ inline void skip_blank(istream &in, bool nl = false) {
}
}
// Return true if end of line (or file)
inline bool skip_check_eol(istream &in) {
inline bool skip_check_eol(istream &in)
{
skip_blank(in, false);
if (!in)
return false;
@ -75,9 +98,9 @@ inline bool skip_check_eol(istream &in) {
return (c == EOF || c == '\n');
}
// Skip past blank lines and comments
inline void skip(istream &in) {
inline void skip(istream &in)
{
skip_blank(in, true);
while (in && (in.peek() == '#')) {
// Skip comment line
@ -87,23 +110,27 @@ inline void skip(istream &in) {
}
// Return true if at the end of a record (or file)
inline bool skip_check_eor(istream &in) {
inline bool skip_check_eor(istream &in)
{
skip(in);
int c = in.peek();
return (c == EOF || c == '.');
}
// Return true if at the end of file
inline bool skip_check_eof(istream &in) {
inline bool skip_check_eof(istream &in)
{
skip(in);
int c = in.peek();
return (c == EOF);
}
std::string stringf(const char *fmt, ...);
std::string vstringf(const char *fmt, va_list ap);
}
#define fmt(x) (static_cast<const std::ostringstream&>(std::ostringstream() << x).str())
} // namespace GateMate
#define fmt(x) (static_cast<const std::ostringstream &>(std::ostringstream() << x).str())
#define UNUSED(x) (void)(x)
#endif //LIBGATEMATE_UTIL_HPP
#endif // LIBGATEMATE_UTIL_HPP

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@ -1,91 +1,92 @@
/*
* prjpeppercorn -- GateMate FPGAs Bitstream Documentation and Tools
*
* Copyright (C) 2024 The Project Peppercorn Authors.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include "Bitstream.hpp"
#include "Chip.hpp"
#include "Util.hpp"
#include <bitset>
#include <boost/algorithm/string/predicate.hpp>
#include <boost/optional.hpp>
#include <cstring>
#include <iostream>
#include "Chip.hpp"
#include "Util.hpp"
namespace GateMate {
static constexpr const uint8_t CMD_PLL = 0xc1;
static constexpr const uint8_t CMD_CFGMODE = 0xc2;
static constexpr const uint8_t CMD_CFGRST = 0xc3; //
static constexpr const uint8_t CMD_FLASH = 0xc5;
static constexpr const uint8_t CMD_DLXP = 0xc6; //
static constexpr const uint8_t CMD_DLYP = 0xc7; //
static constexpr const uint8_t CMD_LXLYS = 0xc8;
static constexpr const uint8_t CMD_ACLCU = 0xc9;
static constexpr const uint8_t CMD_DLCU = 0xca;
static constexpr const uint8_t CMD_DRXP = 0xcc; //
static constexpr const uint8_t CMD_RXRYS = 0xce;
static constexpr const uint8_t CMD_FRAM = 0xd2;
static constexpr const uint8_t CMD_SERDES = 0xd7; //
static constexpr const uint8_t CMD_D2D = 0xd8; //
static constexpr const uint8_t CMD_PATH = 0xd9;
static constexpr const uint8_t CMD_JUMP = 0xda; //
static constexpr const uint8_t CMD_CHG_STATUS = 0xdb;
static constexpr const uint8_t CMD_WAIT_PLL = 0xdc; //
static constexpr const uint8_t CMD_SPLL = 0xdd;
static constexpr const uint8_t CMD_SLAVE_MODE = 0xde;
static constexpr const uint8_t CMD_PLL = 0xc1;
static constexpr const uint8_t CMD_CFGMODE = 0xc2;
static constexpr const uint8_t CMD_CFGRST = 0xc3; //
static constexpr const uint8_t CMD_FLASH = 0xc5;
static constexpr const uint8_t CMD_DLXP = 0xc6; //
static constexpr const uint8_t CMD_DLYP = 0xc7; //
static constexpr const uint8_t CMD_LXLYS = 0xc8;
static constexpr const uint8_t CMD_ACLCU = 0xc9;
static constexpr const uint8_t CMD_DLCU = 0xca;
static constexpr const uint8_t CMD_DRXP = 0xcc; //
static constexpr const uint8_t CMD_RXRYS = 0xce;
static constexpr const uint8_t CMD_FRAM = 0xd2;
static constexpr const uint8_t CMD_SERDES = 0xd7; //
static constexpr const uint8_t CMD_D2D = 0xd8; //
static constexpr const uint8_t CMD_PATH = 0xd9;
static constexpr const uint8_t CMD_JUMP = 0xda; //
static constexpr const uint8_t CMD_CHG_STATUS = 0xdb;
static constexpr const uint8_t CMD_WAIT_PLL = 0xdc; //
static constexpr const uint8_t CMD_SPLL = 0xdd;
static constexpr const uint8_t CMD_SLAVE_MODE = 0xde;
static const uint16_t crc_table_x25[256] = {
0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf,
0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7,
0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e,
0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876,
0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd,
0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5,
0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c,
0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974,
0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb,
0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3,
0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a,
0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72,
0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9,
0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1,
0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738,
0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70,
0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7,
0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff,
0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036,
0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e,
0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5,
0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd,
0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134,
0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c,
0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3,
0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb,
0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232,
0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a,
0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1,
0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9,
0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330,
0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78 };
0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf, 0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5,
0xe97e, 0xf8f7, 0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e, 0x9cc9, 0x8d40, 0xbfdb, 0xae52,
0xdaed, 0xcb64, 0xf9ff, 0xe876, 0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd, 0xad4a, 0xbcc3,
0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5, 0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c,
0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974, 0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9,
0x2732, 0x36bb, 0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3, 0x5285, 0x430c, 0x7197, 0x601e,
0x14a1, 0x0528, 0x37b3, 0x263a, 0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72, 0x6306, 0x728f,
0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9, 0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1,
0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738, 0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862,
0x9af9, 0x8b70, 0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7, 0x0840, 0x19c9, 0x2b52, 0x3adb,
0x4e64, 0x5fed, 0x6d76, 0x7cff, 0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036, 0x18c1, 0x0948,
0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e, 0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5,
0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd, 0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226,
0xd0bd, 0xc134, 0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c, 0xc60c, 0xd785, 0xe51e, 0xf497,
0x8028, 0x91a1, 0xa33a, 0xb2b3, 0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb, 0xd68d, 0xc704,
0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232, 0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a,
0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1, 0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb,
0x0e70, 0x1ff9, 0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330, 0x7bc7, 0x6a4e, 0x58d5, 0x495c,
0x3de3, 0x2c6a, 0x1ef1, 0x0f78};
class Crc16 {
public:
class Crc16
{
public:
uint16_t crc16 = 0xFFFF;
void update_crc16(uint8_t val) {
crc16 = (crc16 >> 8) ^ crc_table_x25[(crc16 & 0xFF) ^ val];
}
void update_crc16(uint8_t val) { crc16 = (crc16 >> 8) ^ crc_table_x25[(crc16 & 0xFF) ^ val]; }
uint16_t get_crc16() {
return crc16 ^ 0xFFFF;
}
uint16_t get_crc16() { return crc16 ^ 0xFFFF; }
void reset_crc16() {
crc16 = 0xFFFF;
}
void reset_crc16() { crc16 = 0xFFFF; }
};
// The BitstreamReadWriter class stores state (including CRC16) whilst reading
// the bitstream
class BitstreamReadWriter {
public:
class BitstreamReadWriter
{
public:
BitstreamReadWriter() : data(), iter(data.begin()) {};
BitstreamReadWriter(const vector<uint8_t> &data) : data(data), iter(this->data.begin()) {};
@ -95,7 +96,8 @@ public:
Crc16 crc16;
// Return a single byte and update CRC
inline uint8_t get_byte() {
inline uint8_t get_byte()
{
assert(iter < data.end());
uint8_t val = *(iter++);
crc16.update_crc16(val);
@ -103,28 +105,32 @@ public:
}
// Read a little endian uint16 from the bitstream and update CRC
uint16_t get_uint16() {
uint16_t get_uint16()
{
uint8_t tmp[2];
get_bytes(tmp, 2);
return (tmp[0] << 8UL) | (tmp[1]);
}
// Read a little endian uint32 from the bitstream and update CRC
uint32_t get_uint32() {
uint32_t get_uint32()
{
uint8_t tmp[4];
get_bytes(tmp, 4);
return (tmp[0] << 24UL) | (tmp[1] << 16UL) | (tmp[2] << 8UL) | (tmp[3]);
}
// CRC is in big endian order
uint16_t get_crc() {
uint16_t get_crc()
{
uint8_t tmp[2];
get_bytes(tmp, 2);
return (tmp[1] << 8UL) | (tmp[0]);
}
// The command opcode is a byte so this works like get_byte
inline uint8_t get_command_opcode() {
inline uint8_t get_command_opcode()
{
assert(iter < data.end());
uint8_t val = *(iter++);
crc16.update_crc16(val);
@ -132,46 +138,52 @@ public:
}
// Write a single byte and update CRC
inline void write_byte(uint8_t b) {
inline void write_byte(uint8_t b)
{
data.push_back(b);
crc16.update_crc16(b);
}
// Copy multiple bytes into an OutputIterator and update CRC
template<typename T>
void get_bytes(T out, size_t count) {
template <typename T> void get_bytes(T out, size_t count)
{
for (size_t i = 0; i < count; i++) {
*out = get_byte();
++out;
}
}
void get_vector(std::vector<uint8_t> &out, size_t count) {
void get_vector(std::vector<uint8_t> &out, size_t count)
{
for (size_t i = 0; i < count; i++) {
out.push_back(get_byte());
}
}
// Write multiple bytes from an InputIterator and update CRC
template<typename T>
void write_bytes(T in, size_t count) {
template <typename T> void write_bytes(T in, size_t count)
{
for (size_t i = 0; i < count; i++)
write_byte(*(in++));
}
// Skip over bytes while updating CRC
void skip_bytes(size_t count) {
for (size_t i = 0; i < count; i++) get_byte();
void skip_bytes(size_t count)
{
for (size_t i = 0; i < count; i++)
get_byte();
}
// Write a little endian uint16_t into the bitstream
void write_uint16(uint16_t val) {
void write_uint16(uint16_t val)
{
write_byte(uint8_t((val >> 8UL) & 0xFF));
write_byte(uint8_t(val & 0xFF));
}
// Write a little endian uint32_t into the bitstream
void write_uint32(uint32_t val) {
void write_uint32(uint32_t val)
{
write_byte(uint8_t((val >> 24UL) & 0xFF));
write_byte(uint8_t((val >> 16UL) & 0xFF));
write_byte(uint8_t((val >> 8UL) & 0xFF));
@ -179,12 +191,12 @@ public:
}
// Get the offset into the bitstream
size_t get_offset() {
return size_t(distance(data.begin(), iter));
}
size_t get_offset() { return size_t(distance(data.begin(), iter)); }
// Check the calculated CRC16 against an actual CRC16, expected in the next 2 bytes
void check_crc16() {
// Check the calculated CRC16 against an actual CRC16, expected in the next 2
// bytes
void check_crc16()
{
uint8_t crc_bytes[2];
uint16_t actual_crc = crc16.get_crc16();
get_bytes(crc_bytes, 2);
@ -199,22 +211,21 @@ public:
}
// Insert the calculated CRC16 into the bitstream
void insert_crc16() {
void insert_crc16()
{
uint16_t actual_crc = crc16.get_crc16();
write_byte(uint8_t((actual_crc) & 0xFF));
write_byte(uint8_t((actual_crc>>8) & 0xFF));
write_byte(uint8_t((actual_crc >> 8) & 0xFF));
}
bool is_end() {
return (iter >= data.end());
}
bool is_end() { return (iter >= data.end()); }
const vector<uint8_t> &get() {
return data;
};
const vector<uint8_t> &get() { return data; };
void write_nops(size_t count) {
for (size_t i = 0; i < count; i++) write_byte(0);
void write_nops(size_t count)
{
for (size_t i = 0; i < count; i++)
write_byte(0);
}
// Writing commands
@ -226,7 +237,7 @@ public:
write_uint16(len);
else
write_byte(len & 0xff);
insert_crc16();
insert_crc16();
}
void write_cmd_path(uint8_t data)
@ -293,17 +304,25 @@ public:
void write_cmd_aclcu(uint16_t data)
{
write_header(CMD_LXLYS, 2);
write_header(CMD_ACLCU, 2);
write_uint16(data);
insert_crc16();
}
void write_cmd_pll()
{
write_header(CMD_PLL, 12);
for (int i = 0; i < 12; i++)
write_byte(0);
insert_crc16();
write_nops(6);
}
};
void check_crc(BitstreamReadWriter &rd)
void check_crc(BitstreamReadWriter &rd)
{
uint16_t actual_crc = rd.crc16.get_crc16();
uint16_t exp_crc = rd.get_crc(); // crc
uint16_t exp_crc = rd.get_crc(); // crc
if (actual_crc != exp_crc) {
ostringstream err;
err << "crc fail, calculated 0x" << hex << actual_crc << " but expecting 0x" << exp_crc;
@ -311,11 +330,20 @@ void check_crc(BitstreamReadWriter &rd)
}
}
#define BITSTREAM_DEBUG(x) if (verbosity >= VerbosityLevel::DEBUG) cerr << "bitstream: " << x << endl
#define BITSTREAM_NOTE(x) if (verbosity >= VerbosityLevel::NOTE) cerr << "bitstream: " << x << endl
#define BITSTREAM_FATAL(x, pos) { ostringstream ss; ss << x; throw BitstreamParseError(ss.str(), pos); }
#define BITSTREAM_DEBUG(x) \
if (verbosity >= VerbosityLevel::DEBUG) \
cerr << "bitstream: " << x << endl
#define BITSTREAM_NOTE(x) \
if (verbosity >= VerbosityLevel::NOTE) \
cerr << "bitstream: " << x << endl
#define BITSTREAM_FATAL(x, pos) \
{ \
ostringstream ss; \
ss << x; \
throw BitstreamParseError(ss.str(), pos); \
}
Bitstream::Bitstream(const std::vector<uint8_t> &data) : data(data) { }
Bitstream::Bitstream(const std::vector<uint8_t> &data) : data(data) {}
Bitstream Bitstream::read(std::istream &in)
{
@ -331,204 +359,258 @@ Bitstream Bitstream::read(std::istream &in)
Chip Bitstream::deserialise_chip()
{
cerr << "bitstream size: " << data.size() * 8 << " bits" << endl;
Chip chip;
Chip chip(1);
Die &die = chip.get_die(0);
BitstreamReadWriter rd(data);
while(!rd.is_end()) {
bool is_block_ram = false;
uint8_t x_pos = 0, y_pos = 0;
uint16_t aclcu = 0;
while (!rd.is_end()) {
rd.crc16.reset_crc16();
uint8_t cmd = rd.get_command_opcode();
uint16_t length = (cmd==CMD_FRAM) ? rd.get_uint16() : rd.get_byte();
uint16_t length = (cmd == CMD_FRAM) ? rd.get_uint16() : rd.get_byte();
std::vector<uint8_t> block;
bool is_block_ram = false;
uint8_t x_pos, y_pos;
switch (cmd) {
case CMD_DLCU:
BITSTREAM_DEBUG("CMD_DLCU");
//if (length>112)
// BITSTREAM_FATAL("DLCU data longer than expected", rd.get_offset());
if (is_block_ram) {
if (length>27)
BITSTREAM_FATAL("RAM configuration must be up to 27 bytes", rd.get_offset());
} else {
if (length>112)
BITSTREAM_FATAL("Tile configuration must be up to 112 bytes", rd.get_offset());
}
// Check header CRC
check_crc(rd);
case CMD_DLCU:
BITSTREAM_DEBUG("CMD_DLCU");
// if (length>112)
// BITSTREAM_FATAL("DLCU data longer than expected", rd.get_offset());
if (is_block_ram) {
if (length > 27)
BITSTREAM_FATAL("RAM configuration must be up to 27 bytes", rd.get_offset());
} else {
if (length > 112)
BITSTREAM_FATAL("Tile configuration must be up to 112 bytes", rd.get_offset());
}
// Check header CRC
check_crc(rd);
// Read data block
rd.get_vector(block, length);
// Check data CRC
check_crc(rd);
break;
case CMD_PATH:
BITSTREAM_DEBUG("CMD_PATH");
if (length!=1)
BITSTREAM_FATAL("PATH data must be one byte long", rd.get_offset());
// Check header CRC
check_crc(rd);
// Read data block
rd.get_byte();
// Check data CRC
check_crc(rd);
// Read data block
rd.get_vector(block, length);
// Check data CRC
check_crc(rd);
// Skip bytes
rd.skip_bytes(9);
break;
case CMD_SPLL:
BITSTREAM_DEBUG("CMD_SPLL");
if (length!=1)
BITSTREAM_FATAL("SPLL data must be one byte long", rd.get_offset());
// Check header CRC
check_crc(rd);
// Read data block
rd.get_byte();
// Check data CRC
check_crc(rd);
break;
case CMD_PLL:
BITSTREAM_DEBUG("CMD_PLL");
if (length<12)
BITSTREAM_FATAL("PLL data smaller than expected", rd.get_offset());
if (length>24)
BITSTREAM_FATAL("PLL data longer than expected", rd.get_offset());
// Check header CRC
check_crc(rd);
if (is_block_ram)
die.write_ram(x_pos, y_pos, block);
else
die.write_latch(x_pos, y_pos, block);
break;
case CMD_PATH:
BITSTREAM_DEBUG("CMD_PATH");
if (length != 1)
BITSTREAM_FATAL("PATH data must be one byte long", rd.get_offset());
// Check header CRC
check_crc(rd);
// Read data block
rd.get_byte();
// Check data CRC
check_crc(rd);
// Read data block
rd.get_vector(block, length);
// Check data CRC
check_crc(rd);
// Skip bytes
rd.skip_bytes(9);
break;
case CMD_SPLL:
BITSTREAM_DEBUG("CMD_SPLL");
if (length != 1)
BITSTREAM_FATAL("SPLL data must be one byte long", rd.get_offset());
// Check header CRC
check_crc(rd);
// Read data block
rd.get_byte();
// Check data CRC
check_crc(rd);
break;
case CMD_PLL:
BITSTREAM_DEBUG("CMD_PLL");
if (length < 12)
BITSTREAM_FATAL("PLL data smaller than expected", rd.get_offset());
if (length > 24)
BITSTREAM_FATAL("PLL data longer than expected", rd.get_offset());
// Check header CRC
check_crc(rd);
// Skip bytes
rd.skip_bytes(6);
break;
case CMD_LXLYS:
if (length!=2)
BITSTREAM_FATAL("LXLYS data must be two bytes long", rd.get_offset());
// Check header CRC
check_crc(rd);
// Read data block
rd.get_vector(block, length);
// Check data CRC
check_crc(rd);
BITSTREAM_DEBUG("CMD_LXLYS");
is_block_ram = false;
x_pos = rd.get_byte();
if (x_pos > 81)
BITSTREAM_FATAL("Tile column (X) must be in range 0-81, current value " << x_pos, rd.get_offset());
y_pos = rd.get_byte();
if (y_pos > 65)
BITSTREAM_FATAL("Tile row (Y) must be in range 0-65, current value " << y_pos, rd.get_offset());
// Check data CRC
check_crc(rd);
break;
case CMD_ACLCU:
BITSTREAM_DEBUG("CMD_ACLCU");
if (length!=2)
BITSTREAM_FATAL("ACLCU data must be two bytes long", rd.get_offset());
// Check header CRC
check_crc(rd);
rd.get_uint16();
// Check data CRC
check_crc(rd);
break;
case CMD_RXRYS:
BITSTREAM_DEBUG("CMD_RXRYS");
if (length!=2)
BITSTREAM_FATAL("RXRYS data must be two bytes long", rd.get_offset());
// Check header CRC
check_crc(rd);
is_block_ram = true;
// Skip bytes
rd.skip_bytes(6);
break;
case CMD_LXLYS:
if (length != 2)
BITSTREAM_FATAL("LXLYS data must be two bytes long", rd.get_offset());
// Check header CRC
check_crc(rd);
x_pos = rd.get_byte();
if (x_pos > 3)
BITSTREAM_FATAL("RAM column (X) must be in range 0-3, current value " << x_pos, rd.get_offset());
y_pos = rd.get_byte();
if (y_pos > 7)
BITSTREAM_FATAL("RAM row (Y) must be in range 0-7, current value " << y_pos, rd.get_offset());
// Check data CRC
check_crc(rd);
break;
case CMD_FRAM:
BITSTREAM_DEBUG("CMD_FRAM");
if (length>5120)
BITSTREAM_FATAL("FRAM data longer than expected", rd.get_offset());
// Check header CRC
check_crc(rd);
BITSTREAM_DEBUG("CMD_LXLYS");
is_block_ram = false;
x_pos = rd.get_byte();
if (x_pos > 81)
BITSTREAM_FATAL("Tile column (X) must be in range 0-81, current value " << x_pos, rd.get_offset());
y_pos = rd.get_byte();
if (y_pos > 65)
BITSTREAM_FATAL("Tile row (Y) must be in range 0-65, current value " << y_pos, rd.get_offset());
// Check data CRC
check_crc(rd);
break;
case CMD_ACLCU:
BITSTREAM_DEBUG("CMD_ACLCU");
if (length != 2)
BITSTREAM_FATAL("ACLCU data must be two bytes long", rd.get_offset());
// Check header CRC
check_crc(rd);
aclcu = rd.get_uint16();
// Check data CRC
check_crc(rd);
break;
case CMD_RXRYS:
BITSTREAM_DEBUG("CMD_RXRYS");
if (length != 2)
BITSTREAM_FATAL("RXRYS data must be two bytes long", rd.get_offset());
// Check header CRC
check_crc(rd);
is_block_ram = true;
// Read data block
rd.get_vector(block, length);
// Check data CRC
check_crc(rd);
break;
case CMD_CHG_STATUS:
BITSTREAM_DEBUG("CMD_CHG_STATUS");
if (length>12)
BITSTREAM_FATAL("CHG_STATUS data longer than expected", rd.get_offset());
// Check header CRC
check_crc(rd);
x_pos = rd.get_byte();
if (x_pos > 3)
BITSTREAM_FATAL("RAM column (X) must be in range 0-3, current value " << x_pos, rd.get_offset());
y_pos = rd.get_byte();
if (y_pos > 7)
BITSTREAM_FATAL("RAM row (Y) must be in range 0-7, current value " << y_pos, rd.get_offset());
// Check data CRC
check_crc(rd);
break;
case CMD_FRAM:
BITSTREAM_DEBUG("CMD_FRAM");
if (length > 5120)
BITSTREAM_FATAL("FRAM data longer than expected", rd.get_offset());
// Check header CRC
check_crc(rd);
// Read data block
rd.get_vector(block, length);
// Check data CRC
check_crc(rd);
// Read data block
rd.get_vector(block, length);
// Check data CRC
check_crc(rd);
// Skip bytes
rd.skip_bytes(9);
break;
case CMD_SLAVE_MODE:
BITSTREAM_DEBUG("CMD_SLAVE_MODE");
if (length>1)
BITSTREAM_FATAL("SLAVE_MODE must be one byte long", rd.get_offset());
// Check header CRC
check_crc(rd);
die.write_ram_data(x_pos, y_pos, block, aclcu);
break;
case CMD_CHG_STATUS:
BITSTREAM_DEBUG("CMD_CHG_STATUS");
if (length > 12)
BITSTREAM_FATAL("CHG_STATUS data longer than expected", rd.get_offset());
// Check header CRC
check_crc(rd);
// Read data block
rd.get_byte();
// Check data CRC
check_crc(rd);
// Read data block
rd.get_vector(block, length);
// Check data CRC
check_crc(rd);
// Skip bytes
rd.skip_bytes(3);
break;
case CMD_FLASH:
BITSTREAM_DEBUG("CMD_FLASH");
if (length>11)
BITSTREAM_FATAL("FLASH data longer than expected", rd.get_offset());
// Check header CRC
check_crc(rd);
// Skip bytes
rd.skip_bytes(9);
break;
case CMD_SLAVE_MODE:
BITSTREAM_DEBUG("CMD_SLAVE_MODE");
if (length > 1)
BITSTREAM_FATAL("SLAVE_MODE must be one byte long", rd.get_offset());
// Check header CRC
check_crc(rd);
// Read data block
rd.get_vector(block, length);
// Check data CRC
check_crc(rd);
break;
case CMD_CFGMODE:
BITSTREAM_DEBUG("CMD_CFGMODE");
if (length>20)
BITSTREAM_FATAL("PLL data longer than expected", rd.get_offset());
// Check header CRC
check_crc(rd);
// Read data block
rd.get_byte();
// Check data CRC
check_crc(rd);
// Read data block
rd.get_vector(block, length);
// Check data CRC
check_crc(rd);
// Skip bytes
rd.skip_bytes(3);
break;
case CMD_FLASH:
BITSTREAM_DEBUG("CMD_FLASH");
if (length > 11)
BITSTREAM_FATAL("FLASH data longer than expected", rd.get_offset());
// Check header CRC
check_crc(rd);
// Skip bytes
rd.skip_bytes(3);
break;
default:
BITSTREAM_FATAL("Unhandled command 0x" << hex << setw(2) << setfill('0') << int(cmd),
rd.get_offset());
break;
// Read data block
rd.get_vector(block, length);
// Check data CRC
check_crc(rd);
break;
case CMD_CFGMODE:
BITSTREAM_DEBUG("CMD_CFGMODE");
if (length > 20)
BITSTREAM_FATAL("PLL data longer than expected", rd.get_offset());
// Check header CRC
check_crc(rd);
// Read data block
rd.get_vector(block, length);
// Check data CRC
check_crc(rd);
// Skip bytes
rd.skip_bytes(3);
break;
default:
BITSTREAM_FATAL("Unhandled command 0x" << hex << setw(2) << setfill('0') << int(cmd), rd.get_offset());
break;
}
}
return chip;
}
Bitstream Bitstream::serialise_chip(const Chip &/*chip*/) {
bool is_edge_location(int x, int y)
{
return ((x == 0) || (x == Die::MAX_COLS - 1) || (y == 0) || (y == Die::MAX_ROWS - 1));
}
Bitstream Bitstream::serialise_chip(const Chip &chip)
{
BitstreamReadWriter wr;
wr.write_cmd_path(0x10);
//wr.write_cmd_spll(0x01);
wr.write_cmd_pll();
auto &die = chip.get_die(0);
for (int iteration = 0; iteration < 2; iteration++) {
for (int y = 0; y < Die::MAX_ROWS; y++) {
for (int x = 0; x < Die::MAX_COLS; x++) {
if (die.is_latch_empty(x, y))
continue;
if (iteration != 0 && is_edge_location(x, y))
continue;
wr.write_cmd_lxlys(x, y);
const uint8_t *ptr = die.get_latch_config(x, y);
int size = 112;
for (int i = 111; i > 0; i--)
if (ptr[i] == 0)
size--;
else
break;
wr.write_header(CMD_DLCU, size);
for (int i = 0; i < size; i++)
wr.write_byte(ptr[i]);
wr.insert_crc16();
}
}
}
wr.write_header(CMD_CHG_STATUS, 12);
wr.write_byte(0x13); // 0
wr.write_byte(0x00); // 1
wr.write_byte(0x33); // 2
wr.write_byte(0x33); // 3
wr.write_byte(0x00); // 4
wr.write_byte(0x00); // 5
wr.write_byte(0x00); // 6
wr.write_byte(0x00); // 7
wr.write_byte(0x00); // 8
wr.write_byte(0x00); // 9
wr.write_byte(0x00); // 10
wr.write_byte(0x00); // 11
wr.insert_crc16();
wr.write_nops(4);
wr.write_byte(0x33);
wr.write_nops(4);
return Bitstream(wr.get());
}
@ -549,7 +631,7 @@ BitstreamParseError::BitstreamParseError(const std::string &desc, size_t offset)
const char *BitstreamParseError::what() const noexcept
{
std::ostringstream ss;
std::ostringstream ss;
ss << "Bitstream Parse Error: ";
ss << desc;
if (offset != -1)

View File

@ -1,11 +1,37 @@
/*
* prjpeppercorn -- GateMate FPGAs Bitstream Documentation and Tools
*
* Copyright (C) 2024 The Project Peppercorn Authors.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include "Chip.hpp"
#include "Util.hpp"
using namespace std;
namespace GateMate {
Chip::Chip()
{}
Chip::Chip(std::string name) : Chip::Chip(1) {}
Chip::Chip(int num) : die_num(num)
{
Die die;
dies.push_back(die);
}
int Chip::get_max_die() const { return die_num; }
std::string Chip::get_name() const { return stringf("CCGM1A%d", die_num); }
} // namespace GateMate

184
libgm/src/ChipConfig.cpp Normal file
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@ -0,0 +1,184 @@
/*
* prjpeppercorn -- GateMate FPGAs Bitstream Documentation and Tools
*
* Copyright (C) 2024 The Project Peppercorn Authors.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include "ChipConfig.hpp"
#include <iomanip>
#include <iostream>
#include <sstream>
#include "Chip.hpp"
#include "TileBitDatabase.hpp"
#include "Util.hpp"
namespace GateMate {
std::string ChipConfig::to_string() const
{
std::stringstream ss;
ss << ".device " << chip_name << endl << endl;
for (const auto &tile : tiles) {
if (!tile.second.empty()) {
ss << ".tile " << tile.first.die << " " << tile.first.x << " " << tile.first.y << endl;
ss << tile.second;
ss << endl;
}
}
for (const auto &ram : rams) {
if (!ram.second.empty()) {
ss << ".ram " << ram.first.die << " " << ram.first.x << " " << ram.first.y << endl;
ss << ram.second;
ss << endl;
}
}
for (const auto &bram : bram_data) {
if (!bram.second.empty()) {
ss << ".bram_init " << bram.first.die << " " << bram.first.x << " " << bram.first.y << endl;
ios_base::fmtflags f(ss.flags());
for (size_t i = 0; i < bram.second.size(); i++) {
ss << setw(2) << setfill('0') << hex << (int)bram.second.at(i);
if (i % 32 == 31)
ss << endl;
else
ss << " ";
}
ss.flags(f);
ss << endl;
}
}
return ss.str();
}
ChipConfig ChipConfig::from_string(const std::string &config)
{
std::stringstream ss(config);
ChipConfig cc;
while (!skip_check_eof(ss)) {
std::string verb;
ss >> verb;
if (verb == ".device") {
ss >> cc.chip_name;
} else if (verb == ".tile") {
CfgLoc loc;
ss >> loc.die;
ss >> loc.x;
ss >> loc.y;
TileConfig tc;
ss >> tc;
cc.tiles.emplace(loc, tc);
} else if (verb == ".ram") {
CfgLoc loc;
ss >> loc.die;
ss >> loc.x;
ss >> loc.y;
TileConfig tc;
ss >> tc;
cc.rams.emplace(loc, tc);
} else if (verb == ".bram_init") {
CfgLoc loc;
ss >> loc.die;
ss >> loc.x;
ss >> loc.y;
ios_base::fmtflags f(ss.flags());
while (!skip_check_eor(ss)) {
uint8_t value;
ss >> hex >> value;
cc.bram_data[loc].push_back(value);
}
ss.flags(f);
} else {
throw runtime_error("unrecognised config entry " + verb);
}
}
return cc;
}
Chip ChipConfig::to_chip() const
{
Chip chip(chip_name);
for (int d = 0; d < chip.get_max_die(); d++) {
auto &die = chip.get_die(d);
CfgLoc loc;
loc.die = d;
for (int y = 0; y < die.get_max_row(); y++) {
loc.y = y;
for (int x = 0; x < die.get_max_col(); x++) {
loc.x = x;
if (tiles.count(loc)) {
TileBitDatabase db(x, y);
const TileConfig &cfg = tiles.at(loc);
die.write_latch(x, y, db.config_to_tile_data(cfg));
}
}
}
RamBitDatabase ram_db;
for (int y = 0; y < die.get_max_ram_row(); y++) {
loc.y = y;
for (int x = 0; x < die.get_max_ram_col(); x++) {
loc.x = x;
if (rams.count(loc)) {
const TileConfig &cfg = rams.at(loc);
die.write_ram(x, y, ram_db.config_to_ram_data(cfg));
}
if (bram_data.count(loc))
die.write_ram_data(x, y, bram_data.at(loc), 0);
}
}
}
return chip;
}
ChipConfig ChipConfig::from_chip(const Chip &chip)
{
ChipConfig cc;
cc.chip_name = chip.get_name();
for (int d = 0; d < chip.get_max_die(); d++) {
auto &die = chip.get_die(d);
CfgLoc loc;
loc.die = d;
for (int y = 0; y < die.get_max_row(); y++) {
loc.y = y;
for (int x = 0; x < die.get_max_col(); x++) {
loc.x = x;
TileBitDatabase db(x, y);
if (!die.is_latch_empty(x, y))
cc.tiles.emplace(loc, db.tile_data_to_config(die.get_latch_config(x, y)));
}
}
RamBitDatabase ram_db;
for (int y = 0; y < die.get_max_ram_row(); y++) {
loc.y = y;
for (int x = 0; x < die.get_max_ram_col(); x++) {
loc.x = x;
if (!die.is_ram_empty(x, y)) {
cc.rams.emplace(loc, ram_db.ram_data_to_config(die.get_ram_config(x, y)));
if (!die.is_ram_data_empty(x, y)) {
std::vector<uint8_t> content(Die::MEMORY_SIZE, 0);
const uint8_t *ptr = die.get_ram_data(x, y);
for (int i = 0; i < Die::MEMORY_SIZE; i++)
content.push_back(ptr[i]);
cc.bram_data.emplace(loc, content);
}
}
}
}
}
return cc;
}
} // namespace GateMate

79
libgm/src/Die.cpp Normal file
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@ -0,0 +1,79 @@
/*
* prjpeppercorn -- GateMate FPGAs Bitstream Documentation and Tools
*
* Copyright (C) 2024 The Project Peppercorn Authors.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include "Die.hpp"
#include "Util.hpp"
namespace GateMate {
Die::Die() { clear(); }
void Die::clear()
{
memset(latch, 0, sizeof(uint8_t) * MAX_ROWS * MAX_COLS * LATCH_BLOCK_SIZE);
memset(ram, 0, sizeof(uint8_t) * MAX_RAM * RAM_BLOCK_SIZE);
memset(ram_data, 0, sizeof(uint8_t) * MAX_RAM * MEMORY_SIZE);
}
bool Die::is_latch_empty(int x, int y) const
{
for (int i = 0; i < LATCH_BLOCK_SIZE; i++)
if (latch[y * MAX_COLS + x][i] != 0)
return false;
return true;
}
bool Die::is_ram_empty(int x, int y) const
{
for (int i = 0; i < RAM_BLOCK_SIZE; i++)
if (ram[y * MAX_RAM_COLS + x][i] != 0)
return false;
return true;
}
bool Die::is_ram_data_empty(int x, int y) const
{
for (int i = 0; i < MEMORY_SIZE; i++)
if (ram_data[y * MAX_RAM_COLS + x][i] != 0)
return false;
return true;
}
void Die::write_latch(int x, int y, const std::vector<uint8_t> &data)
{
int pos = 0;
for (auto d : data)
latch[y * MAX_COLS + x][pos++] = d;
}
void Die::write_ram(int x, int y, const std::vector<uint8_t> &data)
{
int pos = 0;
for (auto d : data)
ram[y * MAX_RAM_COLS + x][pos++] = d;
}
void Die::write_ram_data(int x, int y, const std::vector<uint8_t> &data, uint16_t addr)
{
int pos = addr;
for (auto d : data)
ram_data[y * MAX_RAM_COLS + x][pos++] = d;
}
} // namespace GateMate

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@ -0,0 +1,246 @@
/*
* prjpeppercorn -- GateMate FPGAs Bitstream Documentation and Tools
*
* Copyright (C) 2024 The Project Peppercorn Authors.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include "TileBitDatabase.hpp"
#include <iomanip>
#include <iostream>
#include <sstream>
#include "Chip.hpp"
#include "ChipConfig.hpp"
#include "Util.hpp"
namespace GateMate {
std::vector<bool> data_bytes_to_array(const uint8_t *data, size_t count)
{
std::vector<bool> result(count * 8);
for (size_t j = 0; j < count; j++) {
uint8_t val = data[j];
for (size_t i = 0; i < 8; i++) {
uint8_t temp = 1 << i;
if (val & temp)
result[j * 8 + i] = true;
else
result[j * 8 + i] = false;
}
}
return result;
}
bool is_array_empty(std::vector<bool> &array)
{
for (bool val : array)
if (val)
return false;
return true;
}
BaseBitDatabase::BaseBitDatabase() {}
BaseBitDatabase::~BaseBitDatabase() {}
void BaseBitDatabase::add_word_settings(const std::string &name, int start, int end)
{
if (words.find(name) != words.end())
throw DatabaseConflictError(fmt("word " << name << " already exists in DB"));
words[name] = {start, start + end};
}
std::vector<uint8_t> BaseBitDatabase::bits_to_bytes(std::vector<bool> &bits)
{
std::vector<uint8_t> val;
size_t pos = 0;
for (size_t j = 0; j < bits.size() / 8; j++) {
uint8_t data = 0;
for (int i = 0; i < 8; i++) {
data >>= 1;
data |= bits[pos] ? 0x80 : 0x00;
pos++;
}
val.push_back(data);
}
return val;
}
void TileBitDatabase::add_sb_big(int index, int start) { add_word_settings(stringf("SB_BIG_%02d", index), start, 15); }
void TileBitDatabase::add_sb_sml(int index, int start) { add_word_settings(stringf("SB_SML_%02d", index), start, 12); }
void TileBitDatabase::add_sb_drive(int index, int start)
{
add_word_settings(stringf("SB_DRIVE_%02d", index), start, 4);
}
void TileBitDatabase::add_cpe(int index, int start) { add_word_settings(stringf("CPE_%d", index), start, 80); }
void TileBitDatabase::add_inmux(int index, int plane, int start)
{
add_word_settings(stringf("INMUX_%d_%02d", index, plane), start, 4);
}
void TileBitDatabase::add_gpio(int start) { add_word_settings("GPIO", start, 72); }
void TileBitDatabase::add_edge_io(int index, int start) { add_word_settings(stringf("EDGE_IO_%d", index), start, 16); }
void TileBitDatabase::add_right_edge(int index, int start)
{
add_word_settings(stringf("RIGHT_EDGE_%d", index), start, 24);
}
void TileBitDatabase::add_left_edge(int index, int start)
{
add_word_settings(stringf("LEFT_EDGE_%d", index), start, 24);
}
void TileBitDatabase::add_top_edge(int index, int start)
{
add_word_settings(stringf("TOP_EDGE_%d", index), start, 24);
}
void TileBitDatabase::add_bottom_edge(int index, int start)
{
add_word_settings(stringf("BOTTOM_EDGE_%d", index), start, 48);
}
TileBitDatabase::TileBitDatabase(const int x, const int y) : BaseBitDatabase()
{
bool is_core = false;
if (y == 0) {
add_bottom_edge(1, 13 * 8);
add_bottom_edge(2, 19 * 8);
} else if (x == 0) {
add_left_edge(1, 13 * 8);
add_left_edge(2, 16 * 8);
} else if (y == 66 - 1) {
add_top_edge(1, 13 * 8);
add_top_edge(2, 16 * 8);
} else if (x == 82 - 1) {
add_right_edge(1, 13 * 8);
add_right_edge(2, 16 * 8);
} else {
is_core = true;
for (int i = 0; i < 4; i++) {
add_cpe(i + 1, 10 * i * 8);
}
int pos = 40;
for (int i = 0; i < 4; i++) {
for (int j = 0; j < 6; j++) {
add_inmux(i + 1, j * 2 + 1, pos * 8);
add_inmux(i + 1, j * 2 + 2, pos * 8 + 4);
pos++;
}
}
}
if (!is_core) {
add_gpio(0);
add_edge_io(1, 9 * 8);
add_edge_io(2, 10 * 8);
}
int pos = 64;
// All tiles have switch boxes
// 64 SB_BIG plane 1
// 65 SB_BIG plane 1
// 66 SB_DRIVE plane 2,1
// 67 SB_BIG plane 2
// 68 SB_BIG plane 2
// repeated to cover all 12 planes
for (int i = 0; i < 6; i++) {
add_sb_big(i * 2 + 1, pos * 8);
add_sb_drive(i * 2 + 1, (pos + 2) * 8);
add_sb_drive(i * 2 + 2, (pos + 2) * 8 + 4);
add_sb_big(i * 2 + 2, (pos + 3) * 8);
pos += 5;
}
// 94 SB_SML plane 1
// 95 SB_SML plane 2,1
// 96 SB_SML plane 2
// repeated to cover all 12 planes
for (int i = 0; i < 6; i++) {
add_sb_sml(i * 2 + 1, pos * 8);
add_sb_sml(i * 2 + 2, (pos + 1) * 8 + 4);
pos += 3;
}
}
std::vector<uint8_t> TileBitDatabase::config_to_tile_data(const TileConfig &cfg)
{
std::vector<bool> tile(Die::LATCH_BLOCK_SIZE * 8, false);
for (auto &w : cfg.cwords) {
words[w.name].set_value(tile, w.value);
}
return bits_to_bytes(tile);
}
TileConfig TileBitDatabase::tile_data_to_config(const uint8_t *data)
{
TileConfig cfg;
std::vector<bool> d = data_bytes_to_array(&data[0], Die::LATCH_BLOCK_SIZE);
for (auto &w : words) {
auto val = w.second.get_value(d);
if (is_array_empty(val))
continue;
cfg.add_word(w.first, val);
}
return cfg;
}
RamBitDatabase::RamBitDatabase() : BaseBitDatabase() {}
std::vector<uint8_t> RamBitDatabase::config_to_ram_data(const TileConfig &cfg)
{
std::vector<bool> tile(Die::RAM_BLOCK_SIZE * 8, false);
for (auto &w : cfg.cwords) {
words[w.name].set_value(tile, w.value);
}
return bits_to_bytes(tile);
}
TileConfig RamBitDatabase::ram_data_to_config(const uint8_t *data)
{
TileConfig cfg;
std::vector<bool> d = data_bytes_to_array(&data[0], Die::RAM_BLOCK_SIZE);
for (auto &w : words) {
auto val = w.second.get_value(d);
if (is_array_empty(val))
continue;
cfg.add_word(w.first, val);
}
return cfg;
}
vector<bool> WordSettingBits::get_value(const vector<bool> &tile) const
{
std::vector<bool> val;
for (int i = start; i < end; i++)
val.push_back(tile[i]);
return val;
}
void WordSettingBits::set_value(vector<bool> &tile, const vector<bool> &value) const
{
for (int i = start; i < end; i++)
tile[i] = value[i - start];
}
DatabaseConflictError::DatabaseConflictError(const string &desc) : runtime_error(desc) {}
} // namespace GateMate

78
libgm/src/TileConfig.cpp Normal file
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@ -0,0 +1,78 @@
/*
* prjpeppercorn -- GateMate FPGAs Bitstream Documentation and Tools
*
* Copyright (C) 2024 The Project Peppercorn Authors.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include "TileConfig.hpp"
#include <algorithm>
#include <sstream>
#include "Util.hpp"
using namespace std;
namespace GateMate {
ostream &operator<<(ostream &out, const ConfigWord &cw)
{
out << cw.name << " " << to_string(cw.value) << endl;
return out;
}
istream &operator>>(istream &in, ConfigWord &cw)
{
in >> cw.name;
in >> cw.value;
return in;
}
ostream &operator<<(ostream &out, const TileConfig &tc)
{
for (const auto &cword : tc.cwords)
out << cword;
return out;
}
istream &operator>>(istream &in, TileConfig &tc)
{
tc.cwords.clear();
while (!skip_check_eor(in)) {
ConfigWord w;
in >> w;
tc.cwords.push_back(w);
}
return in;
}
void TileConfig::add_word(const string &name, const vector<bool> &value) { cwords.push_back({name, value}); }
string TileConfig::to_string() const
{
stringstream ss;
ss << *this;
return ss.str();
}
TileConfig TileConfig::from_string(const string &str)
{
stringstream ss(str);
TileConfig tc;
ss >> tc;
return tc;
}
bool TileConfig::empty() const { return cwords.empty(); }
} // namespace GateMate

View File

@ -1,5 +1,68 @@
/*
* prjpeppercorn -- GateMate FPGAs Bitstream Documentation and Tools
*
* Copyright (C) 2024 The Project Peppercorn Authors.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include "Util.hpp"
#include <stdarg.h>
namespace GateMate {
VerbosityLevel verbosity = VerbosityLevel::DEBUG;
std::string stringf(const char *fmt, ...)
{
std::string string;
va_list ap;
va_start(ap, fmt);
string = vstringf(fmt, ap);
va_end(ap);
return string;
}
std::string vstringf(const char *fmt, va_list ap)
{
std::string string;
char *str = NULL;
#if defined(_WIN32) || defined(__CYGWIN__)
int sz = 64 + strlen(fmt), rc;
while (1) {
va_list apc;
va_copy(apc, ap);
str = (char *)realloc(str, sz);
rc = vsnprintf(str, sz, fmt, apc);
va_end(apc);
if (rc >= 0 && rc < sz)
break;
sz *= 2;
}
#else
if (vasprintf(&str, fmt, ap) < 0)
str = NULL;
#endif
if (str != NULL) {
string = str;
free(str);
}
return string;
}
} // namespace GateMate

View File

@ -1,13 +1,33 @@
#include "Bitstream.hpp"
#include "Chip.hpp"
#include "version.hpp"
#include <iostream>
#include <boost/program_options.hpp>
/*
* prjpeppercorn -- GateMate FPGAs Bitstream Documentation and Tools
*
* Copyright (C) 2024 The Project Peppercorn Authors.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include <boost/filesystem.hpp>
#include <stdexcept>
#include <streambuf>
#include <boost/program_options.hpp>
#include <fstream>
#include <iomanip>
#include <iostream>
#include <stdexcept>
#include <streambuf>
#include "Bitstream.hpp"
#include "Chip.hpp"
#include "ChipConfig.hpp"
#include "version.hpp"
using namespace std;
@ -31,21 +51,19 @@ int main(int argc, char *argv[])
po::parsed_options parsed = po::command_line_parser(argc, argv).options(options).positional(pos).run();
po::store(parsed, vm);
po::notify(vm);
}
catch (po::required_option& e) {
} catch (po::required_option &e) {
cerr << "Error: input file is mandatory." << endl << endl;
goto help;
}
catch (std::exception& e) {
} catch (std::exception &e) {
cerr << "Error: " << e.what() << endl << endl;
goto help;
}
if (vm.count("help")) {
help:
help:
boost::filesystem::path path(argv[0]);
cerr << "Open Source Tools for GateMate FPGAs Version " << git_describe_str << endl;
cerr << "Copyright (C) 2024 YosysHQ GmbH" << endl;
cerr << "Copyright (C) 2024 The Project Peppercorn Authors" << endl;
cerr << endl;
cerr << path.stem().c_str() << ": GateMate bitstream packer" << endl;
cerr << endl;
@ -62,7 +80,16 @@ help:
}
string textcfg((std::istreambuf_iterator<char>(config_file)), std::istreambuf_iterator<char>());
Chip c;
ChipConfig cc;
try {
cc = ChipConfig::from_string(textcfg);
} catch (runtime_error &e) {
cerr << "Failed to process input config: " << e.what() << endl;
return 1;
}
Chip c = cc.to_chip();
Bitstream b = Bitstream::serialise_chip(c);
if (vm.count("bit")) {
ofstream bit_file(vm["bit"].as<string>(), ios::binary);
@ -71,6 +98,6 @@ help:
return 1;
}
b.write_bit(bit_file);
}
}
return 0;
}

View File

@ -1,13 +1,33 @@
#include "Chip.hpp"
#include "Bitstream.hpp"
#include "version.hpp"
#include <iostream>
/*
* prjpeppercorn -- GateMate FPGAs Bitstream Documentation and Tools
*
* Copyright (C) 2024 The Project Peppercorn Authors.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include <boost/filesystem.hpp>
#include <boost/optional.hpp>
#include <boost/program_options.hpp>
#include <boost/filesystem.hpp>
#include <fstream>
#include <iostream>
#include <stdexcept>
#include <streambuf>
#include <fstream>
#include "Bitstream.hpp"
#include "Chip.hpp"
#include "ChipConfig.hpp"
#include "version.hpp"
using namespace std;
@ -30,21 +50,19 @@ int main(int argc, char *argv[])
po::parsed_options parsed = po::command_line_parser(argc, argv).options(options).positional(pos).run();
po::store(parsed, vm);
po::notify(vm);
}
catch (po::required_option &e) {
} catch (po::required_option &e) {
cerr << "Error: input file is mandatory." << endl << endl;
goto help;
}
catch (std::exception &e) {
} catch (std::exception &e) {
cerr << "Error: " << e.what() << endl << endl;
goto help;
}
if (vm.count("help")) {
help:
help:
boost::filesystem::path path(argv[0]);
cerr << "Open Source Tools for GateMate FPGAs Version " << git_describe_str << endl;
cerr << "Copyright (C) 2024 YosysHQ GmbH" << endl;
cerr << "Copyright (C) 2024 The Project Peppercorn Authors" << endl;
cerr << endl;
cerr << path.stem().c_str() << ": GateMate bitstream to text config converter" << endl;
cerr << endl;
@ -61,12 +79,14 @@ help:
}
try {
Bitstream::read(bit_file).deserialise_chip();
Chip c = Bitstream::read(bit_file).deserialise_chip();
ChipConfig cc = ChipConfig::from_chip(c);
ofstream out_file(vm["textcfg"].as<string>());
if (!out_file) {
cerr << "Failed to open output file" << endl;
return 1;
}
out_file << cc.to_string();
return 0;
} catch (BitstreamParseError &e) {
cerr << "Failed to process input bitstream: " << e.what() << endl;