96 lines
2.7 KiB
Python
Executable File
96 lines
2.7 KiB
Python
Executable File
#!/usr/bin/env python3
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from edalize import get_edatool
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import os
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if len(os.sys.argv) != 2:
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print("missing board param")
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os.sys.exit()
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part = os.sys.argv[1]
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build_dir="tmp_" + part
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if not os.path.isdir(build_dir):
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try:
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os.mkdir(build_dir)
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except OSError:
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print ("Creation of the directory %s failed" % build_dir)
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else:
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print ("Successfully created the directory %s " % build_dir)
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currDir = os.path.abspath(os.path.curdir) + '/'
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files = []
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parameters = {}
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subpart = part[0:4].lower()
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if subpart == '10cl':
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family = "Cyclone 10 LP"
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tool = "quartus"
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elif subpart == 'ep4c':
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family = "Cyclone IV E"
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tool = "quartus"
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elif subpart[0:2] == '5c':
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family = "Cyclone V"
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tool = "quartus"
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files.append({'name': currDir + 'constr_cycloneV.tcl',
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'file_type': 'tclSource'})
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elif subpart == "xc7a":
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family = "Artix"
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tool = "vivado"
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elif subpart == "xc7s":
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family = "Spartan 7"
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tool = "vivado"
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elif subpart == "xc6s":
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family = "Spartan 6"
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tool = "ise"
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else:
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print("Error: unknown device")
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os.sys.exit()
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if tool in ["ise", "vivado"]:
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pkg_name = {
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"xc7a35tcpg236" : "xc7a_cpg236",
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"xc7a35tcsg324" : "xc7a_csg324",
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"xc7a35tftg256" : "xc7a_ftg256",
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"xc7a50tcpg236" : "xc7a_cpg236",
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"xc7a75tfgg484" : "xc7a_fgg484",
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"xc7a100tfgg484" : "xc7a_fgg484",
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"xc7a200tsbg484" : "xc7a_sbg484",
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"xc7a200tfbg484" : "xc7a_fbg484",
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"xc7s50csga324" : "xc7s_csga324"
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}[part]
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if tool == "ise":
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cst_type = "UCF"
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else:
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cst_type = "xdc"
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cst_file = currDir + "constr_" + pkg_name + "." + cst_type
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files.append({'name': currDir + 'xilinx_spiOverJtag.v',
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'file_type': 'verilogSource'})
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files.append({'name': cst_file, 'file_type': cst_type})
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tool_options = {'part': part+ '-1'}
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else:
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full_part = {
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"10cl025256": "10CL025YU256C8G",
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"ep4ce2217" : "EP4CE22F17C6",
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"5ce223" : "5CEFA2F23I7"}[part]
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files.append({'name': currDir + 'altera_spiOverJtag.v',
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'file_type': 'verilogSource'})
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files.append({'name': currDir + 'test_jtag.sdc',
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'file_type': 'SDC'})
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tool_options = {'device': full_part, 'family':family}
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parameters[family.lower().replace(' ', '')]= {
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'datatype': 'int',
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'paramtype': 'vlogdefine',
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'description': 'fpga family',
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'default': 1}
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edam = {'name' : "spiOverJtag",
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'files': files,
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'tool_options': {tool: tool_options},
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'parameters': parameters,
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'toplevel' : 'spiOverJtag',
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}
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backend = get_edatool(tool)(edam=edam, work_root=build_dir)
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backend.configure()
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backend.build()
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