Gwenhael Goavec-Merou 5760676c73 spiOverJtag_xc7s50csga324: compress

2021-12-21 18:21:16 +01:00

..

xc6

Adds wpn and hldn signals.

2021-07-04 21:35:07 -04:00

.gitignore

Support Arty S7-50

2020-08-08 11:42:38 +02:00

altera_spiOverJtag.sdc

spiOverJtag: add real bridge (virtual jtag) for cyc1000 and build system based on edalize

2021-07-08 20:59:28 +02:00

altera_spiOverJtag.v

spiOverJtag: add real bridge (virtual jtag) for cyc1000 and build system based on edalize

2021-07-08 20:59:28 +02:00

build.py

spiOverJtag: xc7a100tcsg324

2021-12-21 07:02:14 +01:00

constr_cycloneV.tcl

altera: spi flash support for cycloneV and qmtech

2021-07-10 08:20:27 +02:00

constr_xc6s_csg324.ucf

spiOverJtag: add constr_xc6s_csg324

2021-07-11 09:05:15 +02:00

constr_xc7a_cpg236.xdc

rework xilinx fpga spiOverJtag to respect model/package

2021-04-19 21:17:08 +02:00

constr_xc7a_csg324.xdc

constr_xc7a_csg324.xdc: enable compression

2021-12-21 18:20:47 +01:00

constr_xc7a_fgg484.xdc

rework xilinx fpga spiOverJtag to respect model/package

2021-04-19 21:17:08 +02:00

constr_xc7a_ftg256.xdc

rework xilinx fpga spiOverJtag to respect model/package

2021-04-19 21:17:08 +02:00

constr_xc7a_sbg384.xdc

rework xilinx fpga spiOverJtag to respect model/package

2021-04-19 21:17:08 +02:00

constr_xc7s_csga324.xdc

spiOverJtag/constr_xc7s_csga324.xdc: set compress

2021-12-19 17:30:34 +01:00

Makefile

spiOverJtag: xc7a100tcsg324

2021-12-21 07:02:14 +01:00

spiOverJtag_5ce223.rbf

altera: spi flash support for cycloneV and qmtech

2021-07-10 08:20:27 +02:00

spiOverJtag_5ce423.rbf.gz

spiOverJtag: add spiOverJtag_5ce423.rbf.gz

2021-11-28 10:00:37 +01:00

spiOverJtag_10cl025256.rbf

spiOverJtag: add real bridge (virtual jtag) for cyc1000 and build system based on edalize

2021-07-08 20:59:28 +02:00

spiOverJtag_ep4ce1523.rbf.gz

spiOverJtag: add bitstream for ECP4CE15F23

2021-11-28 16:51:42 +01:00

spiOverJtag_ep4ce2217.rbf

altera: add spi flash support for de0nano (EP4CE22F17C6)

2021-07-09 07:40:55 +02:00

spiOverJtag_xc6slx45csg324.bit

spiOverJtag: use build.py for all devices, add xc6slx45

2021-07-11 08:57:46 +02:00

spiOverJtag_xc6slx100fgg484.bit

Adds support for the xc6slx100fgg484.

2021-07-03 05:01:56 -04:00

spiOverJtag_xc7a35tcpg236.bit

add basys3 support

2021-04-20 21:28:14 +02:00

spiOverJtag_xc7a35tcsg324.bit

rework xilinx fpga spiOverJtag to respect model/package

2021-04-19 21:17:08 +02:00

spiOverJtag_xc7a35tftg256.bit

rework xilinx fpga spiOverJtag to respect model/package

2021-04-19 21:17:08 +02:00

spiOverJtag_xc7a50tcpg236.bit

rework xilinx fpga spiOverJtag to respect model/package

2021-04-19 21:17:08 +02:00

spiOverJtag_xc7a75tfgg484.bit

rework xilinx fpga spiOverJtag to respect model/package

2021-04-19 21:17:08 +02:00

spiOverJtag_xc7a100tcsg324.bit.gz

spiOverJtag: fix spiOverJtag_xc7a100tcsg324 compression

2021-12-21 18:20:14 +01:00

spiOverJtag_xc7a100tfgg484.bit

rework xilinx fpga spiOverJtag to respect model/package

2021-04-19 21:17:08 +02:00

spiOverJtag_xc7a200tsbg484.bit

rework xilinx fpga spiOverJtag to respect model/package

2021-04-19 21:17:08 +02:00

spiOverJtag_xc7s25csga324.bit.gz

spiOverJtag: add missing spiOverJtag_xc7s25csga324.bit.gz

2021-12-20 18:11:52 +01:00

spiOverJtag_xc7s50csga324.bit.gz

spiOverJtag_xc7s50csga324: compress

2021-12-21 18:21:16 +01:00

xilinx_spiOverJtag.tcl

add basys3 support

2021-04-20 21:28:14 +02:00

xilinx_spiOverJtag.v

spiOverJtag: rewrite xilinx spiOverJtag vhd -> v

2021-07-11 08:57:00 +02:00