273 lines
9.8 KiB
Python
Executable File
273 lines
9.8 KiB
Python
Executable File
#!/usr/bin/env python3
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import os
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from edalize.edatool import get_edatool
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packages = {
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"Artix": {
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"xc7a12t" : ["cpg238", "csg325"],
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"xc7a15t" : ["cpg236", "csg324", "csg325", "ftg256", "fgg484"],
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"xc7a25t" : ["cpg238", "csg325"],
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"xc7a35t" : ["cpg236", "csg324", "csg325", "ftg256", "fgg484"],
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"xc7a50t" : ["cpg236", "csg324", "csg325", "ftg256", "fgg484"],
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"xc7a75t" : ["csg324", "ftg256", "fgg484", "fgg676"],
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"xc7a100t" : ["csg324", "ftg256", "fgg484", "fgg676"],
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"xc7a200t" : ["sbg484", "fbg484", "fbg676", "ffg1156"],
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},
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"Spartan 7": {
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"xc7s6" : ["ftgb196", "cpga196", "csga225"],
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"xc7s15" : ["ftgb196", "cpga196", "csga225"],
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"xc7s25" : ["ftgb196", "csga225", "csga324"],
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"xc7s50" : ["ftgb196", "csga324", "fgga484"],
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"xc7s75" : ["fgga484", "fgga676"],
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"xc7s100" : ["fgga484", "fgga676"],
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},
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}
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if len(os.sys.argv) != 2:
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print("missing board param")
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os.sys.exit()
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part = os.sys.argv[1]
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build_dir="tmp_" + part
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if not os.path.isdir(build_dir):
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try:
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os.mkdir(build_dir)
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except OSError:
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print ("Creation of the directory %s failed" % build_dir)
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else:
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print ("Successfully created the directory %s " % build_dir)
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currDir = os.path.abspath(os.path.curdir) + '/'
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files = []
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parameters = {}
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pkg_name = None
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subpart = part[0:4].lower()
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if subpart == '10cl':
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family = "Cyclone 10 LP"
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tool = "quartus"
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elif subpart == 'ep4c':
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family = "Cyclone IV E"
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tool = "quartus"
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elif subpart[0:2] == '5c':
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family = "Cyclone V"
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tool = "quartus"
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files.append({'name': currDir + 'constr_cycloneV.tcl',
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'file_type': 'tclSource'})
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elif subpart[0:2] == '5s':
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family = "Stratix V"
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tool = "quartus"
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files.append({'name': currDir + 'constr_cycloneV.tcl',
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'file_type': 'tclSource'})
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elif subpart == "xc7a":
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family = "Artix"
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tool = "vivado"
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model = subpart
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elif subpart == "xc7v":
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family = "Virtex 7"
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tool = "vivado"
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elif subpart == "xc7k":
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device_size = int(part.split('k')[1].split('t')[0])
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if device_size <= 160:
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family = "Kintex 7"
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tool = "vivado"
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else:
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family = "Kintex7"
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tool = "ise"
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speed = -2
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elif subpart == "xc7s":
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family = "Spartan 7"
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tool = "vivado"
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model = subpart
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elif subpart == "xc6s":
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family = "Spartan6"
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tool = "ise"
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speed = -3
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elif subpart == "xc3s":
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family = "Spartan3E"
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tool = "ise"
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speed = -4
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elif subpart == "xc6v":
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family = "Virtex6"
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tool = "ise"
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speed = -1
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elif subpart in ["xcvu", "xcku", "xcau"]:
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family = "Xilinx UltraScale"
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tool = "vivado"
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else:
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print("Error: unknown device")
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os.sys.exit()
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if model in ["xc7a", "xc7s"]:
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pkg = packages[family][part][0]
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pkg_name = f"{model}_{pkg}"
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if tool in ["ise", "vivado"]:
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pkg_name = {
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"xc3s500evq100" : "xc3s_vq100",
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"xc6slx9tqg144" : "xc6s_tqg144",
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"xc6slx9csg324" : "xc6s_csg324",
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"xc6slx16ftg256" : "xc6s_ftg256",
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"xc6slx16csg324" : "xc6s_csg324",
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"xc6slx25csg324" : "xc6s_csg324",
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"xc6slx25tcsg324" : "xc6s_t_csg324",
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"xc6slx45csg324" : "xc6s_csg324",
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"xc6slx45tfgg484" : "xc6s_t_fgg484",
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"xc6slx100fgg484" : "xc6s_fgg484",
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"xc6slx150tcsg484" : "xc6s_csg484",
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"xc6slx150tfgg484" : "xc6s_t_fgg484",
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"xc6vlx130tff784" : "xc6v_ff784",
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"xc7k70tfbg484" : "xc7k_fbg484",
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"xc7k70tfbg676" : "xc7k_fbg676",
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"xc7k160tffg676" : "xc7k_ffg676",
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"xc7k325tffg676" : "xc7k_ffg676",
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"xc7k325tffg900" : "xc7k_ffg900",
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"xc7k420tffg901" : "xc7k_ffg901",
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"xc7vx330tffg1157" : "xc7v_ffg1157",
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"xcku040-ffva1156" : "xcku040_ffva1156",
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"xcku060-ffva1156" : "xcku060_ffva1156",
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"xcvu9p-flga2104" : "xcvu9p_flga2104",
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"xcvu37p-fsvh2892" : "xcvu37p_fsvh2892",
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"xcku3p-ffva676" : "xcku3p_ffva676",
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"xcku5p-ffvb676" : "xcku5p_ffvb676",
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"xcau15p-ffvb676" : "xcau15p_ffvb676",
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}.get(part, pkg_name)
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if tool == "ise":
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cst_type = "UCF"
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tool_options = {'family': family,
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'device': {
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"xc3s500evq100": "xc3s500e",
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"xc6slx9tqg144": "xc6slx9",
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"xc6slx9csg324": "xc6slx9",
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"xc6slx16ftg256": "xc6slx16",
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"xc6slx16csg324": "xc6slx16",
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"xc6slx25csg324": "xc6slx25",
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"xc6slx25tcsg324": "xc6slx25t",
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"xc6slx45csg324": "xc6slx45",
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"xc6slx45tfgg484": "xc6slx45t",
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"xc6slx100fgg484": "xc6slx100",
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"xc6slx150tcsg484": "xc6slx150t",
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"xc6slx150tfgg484": "xc6slx150t",
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"xc6vlx130tff784": "xc6vlx130t",
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"xc7k325tffg676": "xc7k325t",
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"xc7k325tffg900": "xc7k325t",
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"xc7k420tffg901": "xc7k420t",
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}[part],
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'package': {
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"xc3s500evq100": "vq100",
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"xc6slx9tqg144": "tqg144",
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"xc6slx9csg324": "csg324",
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"xc6slx16ftg256": "ftg256",
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"xc6slx16csg324": "csg324",
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"xc6slx25csg324": "csg324",
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"xc6slx25tcsg324": "csg324",
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"xc6slx45csg324": "csg324",
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"xc6slx45tfgg484": "fgg484",
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"xc6slx100fgg484": "fgg484",
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"xc6slx150tcsg484": "csg484",
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"xc6slx150tfgg484": "fgg484",
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"xc6vlx130tff784": "ff784",
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"xc7k325tffg676": "ffg676",
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"xc7k325tffg900": "ffg900",
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"xc7k420tffg901": "ffg901",
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}[part],
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'speed' : speed
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}
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else:
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cst_type = "xdc"
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# Artix/Spartan 7 Specific use case:
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if family in ["Artix", "Spartan 7"]:
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tool_options = {'part': f"{part}{pkg}-1"}
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elif family == "Xilinx UltraScale":
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if part in ["xcvu9p-flga2104", "xcku5p-ffvb676"]:
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tool_options = {'part': part + '-1-e'}
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parameters["secondaryflash"]= {
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'datatype': 'int',
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'paramtype': 'vlogdefine',
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'description': 'secondary flash',
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'default': 1}
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elif part == "xcku3p-ffva676":
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tool_options = {'part': part + '-2-e'}
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elif part == "xcvu37p-fsvh2892":
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tool_options = {'part': part + '-2L-e'}
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elif part in ["xcku040-ffva1156", "xcku060-ffva1156"]:
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tool_options = {'part': part + '-2-e'}
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parameters["secondaryflash"]= {
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'datatype': 'int',
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'paramtype': 'vlogdefine',
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'description': 'secondary flash',
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'default': 1}
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elif part == "xcau15p-ffvb676":
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tool_options = {'part': part + '-2-e'}
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else:
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tool_options = {'part': part + '-1'}
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cst_file = currDir + "constr_" + pkg_name + "." + cst_type.lower()
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files.append({'name': currDir + 'xilinx_spiOverJtag.v',
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'file_type': 'verilogSource'})
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files.append({'name': cst_file, 'file_type': cst_type})
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else:
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full_part = {
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"10cl016484" : "10CL016YU484C8G",
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"10cl025256" : "10CL025YU256C8G",
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"10cl055484" : "10CL055YU484C8G",
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"ep4cgx15027": "EP4CGX150DF27I7",
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"ep4ce11523" : "EP4CE115F23C7",
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"ep4ce2217" : "EP4CE22F17C6",
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"ep4ce1523" : "EP4CE15F23C8",
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"ep4ce1017" : "EP4CE10F17C8",
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"ep4ce622" : "EP4CE6E22C8",
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"5ce215" : "5CEBA2U15C8",
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"5ce223" : "5CEFA2F23I7",
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"5ce523" : "5CEFA5F23I7",
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"5ce423" : "5CEBA4F23C8",
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"5ce927" : "5CEBA9F27C7",
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"5cse423" : "5CSEMA4U23C6",
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"5cse623" : "5CSEBA6U23I7",
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"5sgsd5" : "5SGSMD5K2F40I3"}[part]
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files.append({'name': currDir + 'altera_spiOverJtag.v',
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'file_type': 'verilogSource'})
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files.append({'name': currDir + 'altera_spiOverJtag.sdc',
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'file_type': 'SDC'})
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tool_options = {'device': full_part, 'family':family}
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files.append({'name': currDir + 'spiOverJtag_core.v',
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'file_type': 'verilogSource'})
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parameters[family.lower().replace(' ', '')]= {
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'datatype': 'int',
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'paramtype': 'vlogdefine',
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'description': 'fpga family',
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'default': 1}
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edam = {'name' : "spiOverJtag",
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'files': files,
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'tool_options': {tool: tool_options},
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'parameters': parameters,
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'toplevel' : 'spiOverJtag',
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}
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backend = get_edatool(tool)(edam=edam, work_root=build_dir)
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backend.configure()
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backend.build()
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if tool == "vivado":
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import shutil
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import subprocess
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import gzip
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# Compress bitstream.
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with open(f"tmp_{part}/spiOverJtag.bit", 'rb') as bit:
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with gzip.open(f"spiOverJtag_{part}.bit.gz", 'wb', compresslevel=9) as bit_gz:
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shutil.copyfileobj(bit, bit_gz)
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# Create Symbolic links for all supported packages.
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if family in ["Artix", "Spartan 7"]:
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in_file = f"spiOverJtag_{part}.bit.gz"
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for pkg in packages[family][part]:
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out_file = f"spiOverJtag_{part}{pkg}.bit.gz"
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if not os.path.exists(out_file):
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subprocess.run(["ln", "-s", in_file, out_file])
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