55 lines
1.8 KiB
C++
55 lines
1.8 KiB
C++
#ifndef PART_HPP
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#define PART_HPP
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#include <map>
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#include <string>
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typedef struct {
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std::string manufacturer;
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std::string family;
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std::string model;
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} fpga_model;
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static std::map <int, fpga_model> fpga_list = {
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{0x0362D093, {"xilinx", "artix a7 35t", "xc7a35"}},
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{0x13631093, {"xilinx", "artix a7 100t", "xc7a100"}},
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{0x44008093, {"xilinx", "spartan6", "xc6slx45"}},
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{0x03620093, {"xilinx", "spartan7", "xc7s15ftgb196-1"}},
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{0x020f30dd, {"altera", "cyclone 10 LP", "10CL025"}},
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{0x012bd043, {"lattice", "MachXO2", "LCMXO2-7000HC"}},
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{0x012b5043, {"lattice", "MachXO2", "LCMXO2-7000HE"}},
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{0xE12BB043, {"lattice", "MachXO3LF", "LCMX03LF-1300C"}},
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{0x612B2043, {"lattice", "MachXO3LF", "LCMX03LF-1300E"}},
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{0x612BB043, {"lattice", "MachXO3LF", "LCMX03LF-2100C"}},
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{0x612B3043, {"lattice", "MachXO3LF", "LCMX03LF-2100E"}},
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{0x612BC043, {"lattice", "MachXO3LF", "LCMX03LF-4300C"}},
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{0x612B4043, {"lattice", "MachXO3LF", "LCMX03LF-4300E"}},
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{0x612BD043, {"lattice", "MachXO3LF", "LCMX03LF-6900C"}},
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{0x612B5043, {"lattice", "MachXO3LF", "LCMX03LF-6900E"}},
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{0x612BE043, {"lattice", "MachXO3LF", "LCMX03LF-9400C"}},
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{0x612B6043, {"lattice", "MachXO3LF", "LCMX03LF-9400E"}},
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{0x21111043, {"lattice", "ECP5", "LFE5U-12"}},
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{0x41111043, {"lattice", "ECP5", "LFE5U-25"}},
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{0x41112043, {"lattice", "ECP5", "LFE5U-45"}},
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{0x41113043, {"lattice", "ECP5", "LFE5U-85"}},
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{0x01111043, {"lattice", "ECP5", "LFE5UM-25"}},
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{0x01112043, {"lattice", "ECP5", "LFE5UM-45"}},
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{0x01113043, {"lattice", "ECP5", "LFE5UM-85"}},
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{0x81111043, {"lattice", "ECP5", "LFE5UM5G-25"}},
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{0x81112043, {"lattice", "ECP5", "LFE5UM5G-45"}},
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{0x81113043, {"lattice", "ECP5", "LFE5UM5G-85"}},
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{0x0129a043, {"lattice", "XP2", "LFXP2-8E"}},
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{0x1100581b, {"Gowin", "GW1N", "GW1NR-9"}},
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{0x0900281B, {"Gowin", "GW1N", "GW1N-1"}},
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{0x0100381B, {"Gowin", "GW1N", "GW1N-4"}},
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};
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#endif
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