75d98d12e9
jtag: merge init_internal to CTOR, pass verbose to jtag drivers
2023-07-30 08:45:57 +02:00
0a9e8a7e4b
src/xx: cppcheck
2023-04-15 08:20:05 +02:00
d7d414ea55
jtag: adding getter to lowlevel transport driver
2023-02-25 17:15:25 +01:00
48126cf84c
src/xx: cable implementation: rework to use cable_t directly
2022-10-15 16:17:32 +02:00
2d66236533
xvc_client: allows to select port
2022-10-06 07:07:17 +02:00
80eeaef6ab
ip CLI arg for XVC
2022-04-11 06:53:22 +02:00
964c7d6659
ftdi MPSSE / jtag: add option to use neg edge for TDO's sampling
2022-03-11 07:45:48 +01:00
dddee79f53
jtag: adding method to inject device into active device list
2022-01-13 07:42:14 +01:00
1f59dfd671
jtag: improving jtag chain detection: now searching for masked and unmasked idcode
2022-01-13 07:34:00 +01:00
d09e5da0ba
colognechip integration: initial commit
...
This commit adds support for the Cologne Chip GateMate FPGA series. Both
Evaluation Board and Programmer Cable are supported. Configurations can be
loaded into the FPGA with both devices via JTAG or SPI. In addition to
reading/writing data from/to flashes directly via SPI, this can also be done
via the built-in JTAG-SPI-bypass. A direct wiring between programming hardware
and flash is no longer necessary in this case.
Signed-off-by: Patrick Urban <patrick.urban@web.de>
2021-12-10 12:12:32 +01:00
abef1f4968
add verbose-level args: -1 quiet, 0 normal mode, 1 verbose, 2 debug lowlevel
2021-10-03 08:22:35 +02:00
c47b494311
jtag: add access to targeted idcode
2021-08-18 07:39:23 +02:00
8f95303daf
move to APACHE-2.0 license
2021-06-26 15:24:07 +02:00
8b34448ed0
jtag: add logic to handle multiple device in JTAG chain
2021-05-15 14:59:06 +02:00
5da47a0200
jtag: propagate getClkFreq
2021-05-15 08:46:21 +02:00
42b7279a4b
main: add optional probe-firmware
2021-05-13 16:07:40 +02:00
7cc5676e8e
ftdi: drop divide_by_5 param, now it's automatically set/unset according to the frequency. Better freq display
2021-02-19 07:07:10 +01:00
99929f99c3
add ftdi serial argument
2020-09-29 14:16:30 +02:00
275ba38207
restructure hierarchy/abstraction:
...
- jtagInterface as now only two method: one for tms or for tdi, in all
case full buffer is provided and specific code deal with them to write
- jtag: drop read_write logic to jtag probe abstraction
2020-05-31 15:57:21 +02:00
deb3d0bed2
jtag: re-add lost dev parameter
2020-03-08 07:52:17 +01:00
c4f6178733
propagate jtag_pins_conf_t and add support for bitbang mode
2020-03-07 11:44:17 +01:00
706219016e
pass cable_t instead of mpsse_bit_config
2020-03-07 10:56:34 +01:00
1ef72b0da6
add interface id in mpsse_bit_config.
2020-03-07 07:19:20 +01:00
9c9348f7d0
rename ftdijtag to jtag
...
- drop everything about ftdi
- use jtagInterface to communicate with hardware
- for all class using jtag: rename FtdiJtag -> Jtag
2020-03-06 09:05:57 +01:00
Gwenhael Goavec-Merou
Patrick Urban
Martin Pittermann