8f95303daf
move to APACHE-2.0 license
2021-06-26 15:24:07 +02:00
98a2e836fa
ice40: add support for verify and dump
2021-06-26 08:43:02 +02:00
79a0e84f1f
efinix: add support for verify and dump
2021-06-26 08:34:12 +02:00
2af64e9af4
all: propagate verify with a message when not supported
2021-06-25 08:58:45 +02:00
fe0a315456
lattice,device: introduce method to dump flash content
2021-06-24 18:20:34 +02:00
c471d25bb5
xilinx,lattice,device: add verify write into flash
2021-06-24 18:08:02 +02:00
827767b99f
add proof of concept / draft for DFU protocol. Add orangeCrab in DFU mode
2021-06-20 10:26:05 +02:00
2f38461826
main: fix default args.index_chain
2021-05-15 19:30:45 +02:00
27af85dc19
main: add option to specify device index
2021-05-15 15:26:09 +02:00
acf4ab270c
main: rework fpga detection to allows more than one device in a chain, but only FPGA is allowed
2021-05-15 15:08:27 +02:00
42b7279a4b
main: add optional probe-firmware
2021-05-13 16:07:40 +02:00
7039465353
rework xilinx fpga spiOverJtag to respect model/package
2021-04-19 21:17:08 +02:00
f33d30dbce
main: fix bitbang check: config pins must be the shift value
2021-03-21 18:51:13 +01:00
16932786db
all parser:
...
- _raw_data is now filled in configBitstreamParser
- source may be a file or a pipe
- displayHeader become a common method (configBitstreamParser)
- improve/rewrite some parser (efinixHexparser 1s -> 11ms)
2021-02-24 06:36:48 +01:00
df52d523bf
All devices: new CLI argument to bypass file type autodetection
2021-02-21 18:30:13 +01:00
5f9a8835da
devices: simplify write RAM/Flash
2021-02-18 21:09:34 +01:00
ad21a3bb36
recast verbose to int8_t to have more level of verbosity (-1 quiet, 0 normal, 1 verbose), add --quiet option, display progress bar when verbosity level >= 0
2021-01-30 07:57:49 +01:00
1992360667
main: catch exception if FPGA can't be claimed.
2021-01-29 06:19:42 +01:00
6fefebd02c
prepare release v0.2.1
2020-12-17 13:58:30 +01:00
14c5b8e681
add support for ice40 FPGA and iCEBreaker, icestick, iCE40-HX8K, iCE40-HX1K-EVN boards
2020-10-31 15:02:54 +01:00
aa23aff388
main: review SPI mode for efinix active mode
2020-10-31 10:41:44 +01:00
3c9870bba3
introduce CBUS/DBUS pins value, add macro and pin mapping for board in SPI mode, reset and done signals
2020-10-31 08:40:18 +01:00
b2abafa76d
ftdispi: start to use spi_pins_conf
2020-10-30 08:26:15 +01:00
5254116ad8
main: if board has no default cable, don't override potential user choise
2020-10-25 16:51:21 +01:00
f22b25428d
main: allow users board cable to be override
2020-10-21 13:41:26 +02:00
8fb36f9ba9
main: improve flash direct access
2020-10-07 07:47:46 +02:00
522489c860
main: improve previous commit
2020-10-07 07:37:40 +02:00
9e0614d15d
main: fix ftdi_serial default value '' -> '-'. (jadafi)
2020-10-07 06:39:00 +02:00
f77faa2657
add direct access to spi flash
2020-10-06 08:38:24 +02:00
99929f99c3
add ftdi serial argument
2020-09-29 14:16:30 +02:00
d9bbcdf68b
xilinx: support writing .bit file to flash
2020-09-25 18:58:31 +02:00
41f1a7a61a
review fixes: refactoring and readme update
2020-09-22 19:22:51 +03:00
48c747edd6
Add FTDI channel selection command line argument.
2020-09-22 11:45:44 +03:00
ad4dd39cdd
main: pass write mode to anlogic constructor
2020-08-24 08:55:27 +02:00
e0d763c4b5
add basic support for anlogic eagle s20 FPGA and lichee tang board
2020-08-20 16:59:34 +02:00
050aa94b8b
main: delete jtag if someone is wrong
2020-08-19 15:15:37 +02:00
75f160ef00
add CLI args to provide pin mapping for bitbang mode (ft232 and ft231x)
2020-08-04 17:36:33 +02:00
d24c63ec8a
trabucayre/openFPGALoader#38 minor adjustments for MinGW build - use memset instead of bzero, errno_t may be replaced by int, provide ad-hoc ntohs on windows (alternative is link against winsock)
2020-07-25 12:55:41 +10:00
9c42aecef5
replace argp by cxxopts
2020-07-23 18:32:18 +02:00
c1741b4300
prepare release 0.1
2020-07-11 08:47:54 +02:00
d85fc68add
main: use printError instead of cerr
2020-07-11 07:47:27 +02:00
447e3e47b2
catch exception when claiming cable
2020-07-11 07:23:24 +02:00
e93034db69
clean up --freq parser
2020-05-25 10:33:09 +02:00
92888956f3
add jtag frequency option
2020-05-21 13:07:20 +02:00
6ec380516c
tab or space indentation, please choose
2020-04-22 20:51:54 +02:00
12d69735eb
main: pass wr sram/mem to lattice constructor and update help
2020-04-22 15:23:38 +02:00
8f2d6cb1c9
add option to enable/disable udev support
2020-03-14 19:42:07 +01:00
c4f6178733
propagate jtag_pins_conf_t and add support for bitbang mode
2020-03-07 11:44:17 +01:00
84298839ea
rework board structure to add an optional pin mapping for bitbang mode
2020-03-07 11:00:29 +01:00
706219016e
pass cable_t instead of mpsse_bit_config
2020-03-07 10:56:34 +01:00
Gwenhael Goavec-Merou
Martin Pittermann
Rony Kelner
Ed Bordin
Martin Pittermann
Fabien Marteau