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1,972 Commits 22 Branches 25 Tags
2dc3ba37cda7dd82eeb3feaa31a7f77fe2c62ed8
Commit Graph
1229 Commits
Author SHA1 Message Date
Sebastian Marsching 485d9719b5 Send command and parameters in single operation. 
This significantly improves the performance because it reduces the
number of round trips needed.
 2026-03-05 16:26:46 +01:00
Gwenhael Goavec-Merou 21d2e46c4f latticeBitParser.cpp: revert/adapts commit 0bc2594469 (fails with CMSIS-DAP #634) 2026-03-04 10:28:23 +01:00
Sebastian Marsching f2679b01af Allow building XVC client without libftdi. 
Unlike the XVC server, the XVC client does not depend on libftdi, so
building it just depends on having separate flags for enabling it.
 2026-03-01 19:49:07 +01:00
Gwenhael Goavec-Merou 3ae5e5e4a5 xilinx: fixed spi/bpi select 2026-02-26 08:24:05 +01:00
Gwenhael Goavec-Merou 35089045ea latticeBitParser, lattice: added 128 clock pulses padding before preamble: Required by ECP3 family 2026-02-25 09:53:28 +01:00
Gwenhael Goavec-Merou 0bc2594469 latticeBitParser: align configuration Data start address to the bitstream header offset 2026-02-25 09:51:33 +01:00
Gwenhael Goavec-Merou c4d26da89f spiFlash: added Macronix MX25L6405 2026-02-23 08:33:47 +01:00
Gwenhael Goavec-Merou db7bd4770c ch347jtag: align tms/tdi uses to others cables 2026-02-21 10:26:57 +01:00
Gwenhael Goavec-Merou a9af6cdd76 colognechip: 2x SLEEP_US because windows... 2026-02-18 19:42:34 +01:00
blurbdust 98fea26507 Adding BPI flash support and YPCB board support 2026-02-13 12:03:38 +01:00
Alberto Perro c072042aa8 add arria 10 to part numbers list 2026-02-13 08:11:45 +01:00
Alberto Perro 63b0e34a6f add maxII (EPM2210) to part numbers list 2026-02-12 17:29:06 +01:00
Alberto Perro 4d93073e99 handle other blaster PIDs 2026-02-12 17:25:44 +01:00
Gwenhael Goavec-Merou 14086df9a2 altera: fixed done_bit_addr for 10M25SA, remains pgm_success_addr 2026-02-12 16:15:17 +01:00
Gwenhael Goavec-Merou fb61d309dc part: added Altera 10M25S 2026-02-12 16:00:50 +01:00
Gwenhael Goavec-Merou 99d59e45d4 ftdiJtagMPSSE: typo 2026-02-11 08:09:57 +01:00
Gwenhael Goavec-Merou 68b4d7d654 ftdiJtagMPSSE: restructure SIPEED firmware test to uses strncomp only once with SIPEED keyword 2026-02-11 08:02:45 +01:00
gatecat d67d4ced64 Add workaround for slow JTAG on Sipeed Console 
Signed-off-by: gatecat <[email protected]>
 2026-02-08 10:55:22 +01:00
Gwenhael Goavec-Merou e78b5e2995 CMakeLists.txt,main.cpp: option to enable/disable svf_jtag support 2026-01-29 16:16:40 +01:00
Gwenhael Goavec-Merou cc1dc3c868 CMakeLists.txt,main: added options to enable/disable vendors drivers 2026-01-29 16:06:17 +01:00
Gwenhael Goavec-Merou b3a8ea03d5 xilinx.cpp: nitpick 2026-01-29 14:43:35 +01:00
rkebelj fb1768a175 xilinx: Fixed infinite loop in bit files smaller than 100 2026-01-28 22:13:05 +01:00
fisherdog4 65ac4b24a3 Add xc7z007s 2026-01-21 20:50:19 -05:00
atmgndandQi Zhou ecebc40004 Fix build with -DENABLE_FTDI_BASED_CABLE=off; fix potential array out-of-bounds access (#616) 
* Fix build without FTDI cable

Signed-off-by: Qi Zhou <[email protected]>

* Fix potential array out‑of‑bounds access

Signed-off-by: Qi Zhou <[email protected]>

---------

Signed-off-by: Qi Zhou <[email protected]>
Co-authored-by: Qi Zhou <[email protected]>
 2026-01-21 14:38:30 +01:00
Florent Kermarrec 4767ec2ce2 src/part.hpp: Add missing Xilinx 7-series IDCODEs. 
Add missing 7-series entries based on UG470 v1.17 Table 1-1.

Source:
- AMD UG470 (7 Series FPGAs Configuration User Guide), v1.17 (2023-12-05), Table 1-1
  https://docs.amd.com/v/u/en-US/ug470_7Series_Config
 2026-01-20 14:52:04 +01:00
Florent Kermarrec 87bf3c0f74 src/part.hpp: Add Xilinx Spartan UltraScale+ devices. 
Extend fpga_list with Spartan UltraScale+ JTAG IDCODEs.

Source:
- https://docs.amd.com/r/en-US/ug860-spartan-configuration/Spartan-UltraScale-Devices-and-JTAG-IDCODEs
 2026-01-20 14:40:04 +01:00
Florent Kermarrec 25ad02bb5e src/part.hpp: Add missing Xilinx UltraScale+ device IDCODEs. 
Extend fpga_list with additional UltraScale+ parts (Artix/Kintex/Virtex).

Source:
- https://review.openocd.org/c/openocd/+/7716
- https://sourceforge.net/p/openocd/mailman/openocd-devel/thread/20230525234809.B6A131B2%40openocd.org/
 2026-01-20 14:15:02 +01:00
Jernej Volk 7432d49391 spiFlashdb: Added MX25V8035F NOR flash chip 2026-01-18 21:51:40 +01:00
letaldev a1599b63f8 Fix a small formatting error 
`obuf - _obuf` returns `long` rather than `long long`
 2026-01-07 15:51:17 -03:00
Gwenhael Goavec-Merou b870ee4c4f jtag.cpp: ENABLE_ESP_USB_JTAG -> ENABLE_ESP_USB 2026-01-02 11:00:51 +01:00
Gwenhael Goavec-Merou 0ce9fcb050 dirtyJtag: writeTDI: when end don't shift before applying last bit -> this Byte is correctly aligned during previous step 2026-01-02 10:04:02 +01:00
Gwenhael Goavec-Merou 6a7bd29e0d dirtyJtag: writeTDI: fixed last Byte align 2026-01-02 09:52:41 +01:00
Gwenhael Goavec-Merou d654a9d6d5 esp_usb_jtag: toggleClk: ignore tdi/tms and keep these pins to the current state 2026-01-01 12:46:39 +01:00
Gwenhael Goavec-Merou c7c0d94168 dirtyJtag: improves code / nitpick 2026-01-01 11:33:30 +01:00
Gwenhael Goavec-Merou 097e236be8 dirtyJtag: writeTMS: honour tdi method parameter (required by gowin GW5A family) 2025-12-31 15:49:04 +01:00
Gwenhael Goavec-Merou 936fe64c4a ftdipp_mpsse.cpp: setClkFreq: flush buffers before changing clock frequency 2025-12-31 12:09:58 +01:00
Gwenhael Goavec-Merou 2c6dac2d9c lattice: fixed SRAM for NEXUS family 2025-12-30 15:50:19 +01:00
Gwenhael Goavec-Merou 6f920360fc lattice: fixed SPI Flash access for NEXUS Family 2025-12-30 11:34:35 +01:00
Gwenhael Goavec-Merou dd7b74d2f5 lattice: uses reg_content to defines status registers bits for Nexus family 2025-12-30 09:15:10 +01:00
germaneguise c1c6e438a5 dirtyjtag: Allow custom VID/PID via command line options 
Pass cable.vid and cable.pid to DirtyJtag constructor instead of using
hardcoded DIRTYJTAG_VID/PID. This allows users to use DirtyJTAG-compatible
firmware with custom USB VID/PID using the --vid and --pid flags:

  openFPGALoader -c dirtyJtag --vid 0x1337 --pid 0x0001 bitstream.fs

This is useful for custom DirtyJTAG implementations, embedded microcontrollers
with built-in JTAG adapters, or devices that use MS OS 2.0 descriptors for
automatic WinUSB driver loading with different VID/PID.

The default VID/PID (0x1209:0xC0CA) is preserved for backward compatibility.
 2025-12-27 16:12:31 +09:00
Gwenhael Goavec-Merou 6bac72cd68 Global: added option to select/deselect all cables, added variables ENABLE_xxx to enable corresponding cables. Some vendor drivers needs to to be disabled accordlingly 2025-12-26 09:17:06 +01:00
Patrick Dussud 84897ffa78 Enable support for CH347F 
FIx a Windows issue
 2025-12-24 12:13:56 -08:00
Gwenhael Goavec-Merou 63a42344bc lattice: rework program_extFlash method to uses new mcsParser features when extension == mcs 2025-12-17 20:05:11 +01:00
Gwenhael Goavec-Merou 3706236b43 xilinx: rework program_spi method to uses new mcsParser features when extension == mcs 2025-12-17 20:05:11 +01:00
Gwenhael Goavec-Merou f349377f5f mcsParser: reworks code to uses FlashDataSection 2025-12-17 20:05:11 +01:00
Gwenhael Goavec-Merou d7b9d58768 spiInterface: added write method variant with vector of FlashDataSection 2025-12-17 20:05:11 +01:00
Gwenhael Goavec-Merou f2c013daab spiFlash: added erase_and_prog method with vector of FlashDataSection 2025-12-17 20:05:11 +01:00
Gwenhael Goavec-Merou 4a593c258c spiFlash: moved BP status, unlock step into a dedicatedmethod 2025-12-17 20:05:11 +01:00
Gwenhael Goavec-Merou a7e4303563 spiFlash: bulk_erase method: allows BP bypass and printXX with a verbose level 2025-12-17 20:05:11 +01:00
Gwenhael Goavec-Merou e302bb6edc spiFlash: added FlashDataSection to handle bitstream per sections when gap or 0xff area are present 2025-12-17 20:05:11 +01:00