7059c15960
Add user device list for non-fpga JTAG devices
2023-11-10 14:00:24 -07:00
5e9cc7c440
pass along reset paramaters to provide control to the caller
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Upsteam-Status: Submitted [https://github.com/traucucayre/openFPGALoader ]
- Submitted to upstream, waiting approval
2023-09-10 20:46:08 -07:00
0f3afbcaea
Make IDCODE unsigned
2023-08-29 20:01:21 +03:00
c41ef7539c
ftdispi: convert verbose bool -> int8_t
2023-07-30 07:19:17 +02:00
bed17f3be8
Parse USB bus:dev as decimal integers, to be consistent with --scan-usb.
...
Do not accept auto-detected base 0 (e.g. prefix '0x' for hex), since '0'
prefix gives an octal interpretation, and the user is likely to copy
values from `--scan-usb` or `lsusb` that could then be misinterpreted,
e.g. 005:010.
2023-07-29 09:49:52 +02:00
a1e9d3f7db
main: (SPI mode) sanity check: print error and quit when manufacturer is unknown
2023-07-27 07:15:49 +02:00
d2f7040527
main: parse_opt: busdev-num: explicitly set hex base
2023-05-28 17:14:48 +02:00
07a0708eb8
efinix:
...
- jtag mode: added spiOverJtag support;
- spiOverJtag: added efinix support: verilog file and t8f81 bitstream
- xyloni: part code for spiOverJtag flash access/load bridge
2023-04-27 16:41:17 +02:00
cf04d64377
feat: option to use an extra GPIO as the status indicator
2023-04-11 00:36:16 +08:00
6161e550c1
main: deduplicate messages about board's default cable/user's selection, display warn always instead of when verbose mode is set.
2023-03-09 21:19:35 +01:00
3d9717f7c3
add the skip_load_bridge and skip_reset arguments also for Xilinx devices
2023-03-03 11:18:08 +01:00
9c1876818f
README,main: add remote bitbang for ip and port
2023-03-02 13:55:40 +01:00
657d98f3c3
args: better --offset description ( #319 )
2023-02-27 21:15:34 +01:00
7f1f9445d4
cable: bus_addr, device_addr: int -> uint8_t
2023-02-25 17:10:01 +01:00
0536ab4754
Add target-flash and secondary-bitstream CLI options for VCU118
2023-02-06 11:23:10 +01:00
84aa0d14b9
main: xvc_server: catch exception
2023-01-02 18:02:43 +01:00
fb8c1a5f97
altera,intel: adding an option to bypass spiOverJtag automatic bitstream selection by providing the bitstream file path
2022-12-10 22:05:37 +01:00
d5190a3bd4
src/main.cpp: lint/cppcheck
2022-11-12 22:58:17 +01:00
a0a68282cd
src/main: simplify svf type search
2022-11-12 22:38:10 +01:00
4a5bd0279b
Removed the svf programming code from devices and added device independent svf programming in main.cpp
...
Fixed a type error in svf_jtag.cpp
2022-11-12 13:14:13 -08:00
de5aff7a96
spiFlash: Add --bulk-erase command line option
...
Adds a --bulk-erase command line option for bulk erasure of SPI flash.
2022-11-06 18:56:07 +10:30
228f71d9b5
src/libusb_ll: libusb wrapper (currently limited to scan device), src/main: add scan-usb option
2022-10-15 22:28:06 +02:00
2311f2c6ec
src/main: add busdev-num option to select a probe by his bus number / device address
2022-10-15 17:41:30 +02:00
48126cf84c
src/xx: cable implementation: rework to use cable_t directly
2022-10-15 16:17:32 +02:00
2d66236533
xvc_client: allows to select port
2022-10-06 07:07:17 +02:00
8f59294f45
src/main: add specific -D to enable/disable --device arg
2022-09-17 17:33:25 +02:00
27309d4931
cmsisDAP: allows to select interface number
2022-08-29 21:00:32 +02:00
61e959f93d
main,board,ftdiJtagBitbang: use pin ID instead of shift
2022-08-23 18:37:43 +02:00
51628c38f5
typo
2022-07-26 20:29:11 +02:00
e77b8fb022
Merge pull request #243 from balika011/master
...
Gowin GW1NSR-4C MCU support
2022-07-25 19:09:01 +02:00
c3d13e8b75
remove unneeded code
2022-07-24 17:30:59 +02:00
e847c3a7b0
Add connecting MCU to JTAG support for GW1NSR-4C
2022-07-20 23:32:21 +02:00
0581803def
Add MCU Firmware flashing support for GW1NSR-4C
2022-07-20 23:32:16 +02:00
12955b8711
Initial commit of libgpiod JTAG driver
...
Not tested yet.
2022-07-18 18:09:34 +02:00
975c40a00a
enable xvc only for Linux OS
2022-07-06 21:14:25 +02:00
a90a7b6fa5
main: enable xvc_server
2022-07-06 21:00:24 +02:00
e21a251af3
DFU: fix detect -> bypass bitstream
2022-06-18 18:39:58 +02:00
dec1a0920f
add means to set cable index from command line
2022-06-01 07:17:38 -07:00
610a495898
main: skip-reset fix typo
2022-05-28 18:06:51 +02:00
26ea58c305
main: always check if board is not null before access
2022-05-28 17:20:53 +02:00
051e2ecbfb
add option to bypass reset in SPI write mode. Adapt altera accordingly
2022-05-24 07:29:35 +02:00
847a5040cf
add skip_load_bridge cmd-line parameter
2022-05-23 11:51:16 +02:00
80eeaef6ab
ip CLI arg for XVC
2022-04-11 06:53:22 +02:00
964c7d6659
ftdi MPSSE / jtag: add option to use neg edge for TDO's sampling
2022-03-11 07:45:48 +01:00
63c9ec01b7
Fixed right alignment problem.
2022-02-09 17:55:16 +01:00
12c5e6ba19
Nicer layout for the boards/fpga/cables table
2022-02-08 19:31:37 +01:00
eb462d2bec
main: bitstream default target depends on mode spi/jtag
2022-01-18 08:09:54 +01:00
17a874fc04
main: fix SPI access
2021-12-24 11:19:30 +01:00
4cab198915
colognechip integration: create CologneChip SPI object in dynamic fashion as well
2021-12-23 08:54:48 +01:00
db92ea068c
main: add protection for all devices. Add CLI args
2021-12-22 19:12:33 +01:00
Mark Featherston
Rodrigo Rengifo
Alexey Starikovskiy
Gwenhael Goavec-Merou
Haakan T Johansson
chenzhuoyu
hycrypt
Ricardo Barbedo
Patrick Dussud
Rod Whitby
balika011
Niklas Ekström
Rengifo, Rodrigo
Simon Buhrow
Stephan Ruloff
Patrick Urban