part: added Altera 10M25S

doc/FPGAs.yml

@@ -156,6 +156,8 @@ Intel:
     Model: 
       - 10M02
       - 10M08
+      - 10M16
+      - 10M25
     URL: https://www.intel.fr/content/www/fr/fr/products/details/fpga/max/10.html
     Memory: SVF
     Flash: POF

src/altera.cpp

@@ -339,6 +339,16 @@ const std::map<uint32_t, Altera::max10_mem_t> Altera::max10_memory_map = {
 		.done_bit_addr = 0x0011,  // done bit
 		.pgm_success_addr = 0x0015}  // program success addr
 	},
+	{0x031840dd, { // 10M25SA
+		.check_addr0 = 0x80009, // check_addr0
+		.dsm_addr = 0x0000, .dsm_len = 1024, // DSM
+		.ufm_addr = 0x0400, .ufm_len = {4096, 4096}, // UFM
+		.cfm_addr = 0x2400, .cfm_len = {94208, 40960, 53248}, // CFM
+		.sectors_erase_addr = {0x17ffff, 0x27ffff, 0x37ffff, 0x47ffff, 0x57ffff}, // sectors erase address
+		// CHECKME: 2 lines
+		.done_bit_addr = 0x0011, // done bit
+		.pgm_success_addr = 0x0015} // program success addr
+	},
 };
 
 /* Write an arbitrary file in UFM1, UFM0 by default and also CFM2 and CFM1 if

src/part.hpp

@@ -274,6 +274,7 @@ static std::map <uint32_t, fpga_model> fpga_list = {
 	{0x031810dd, {"altera", "MAX 10", "10M02S", 10}},
 	{0x031820dd, {"altera", "MAX 10", "10M08S", 10}},
 	{0x031830dd, {"altera", "MAX 10", "10M16S", 10}},
+	{0x031840dd, {"altera", "MAX 10", "10M25S", 10}},
 	{0x0318d0dd, {"altera", "MAX 10", "10M40S", 10}},
 	{0x031850dd, {"altera", "MAX 10", "10M50S", 10}},
 	/** dual-supply **/