update README to detail cycloader usage with arty board

This commit is contained in:
Gwenhael Goavec-Merou 2019-10-05 19:40:43 +02:00
parent 24947627a3
commit f57f8cce58
1 changed files with 42 additions and 1 deletions

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@ -3,7 +3,7 @@ Utility for programming Intel/Altera Cyclone and Xilinx Serie 7
Current support:
* Trenz cyc1000 Cyclone 10 LP 10CL025 (memory and spi flash)
* Digilent arty 35T (memory)
* Digilent arty Artix xc7a35ti (memory and spi flash)
## compile and install
@ -70,3 +70,44 @@ cycloader -b cyc1000 -r project_name_auto.rpd
**Note about SPI flash:
svf file used to write in flash is just a bridge between FT2232 interfaceB
configured in SPI mode and sfl primitive used to access EPCQ SPI flash.**
### ARTY
To simplify further explanations, we consider the project is generated in the
current directory.
#### loading in memory:
*.bit* file is the default format generated by *vivado*, so nothing special
task must be done to generates this bitstream.
__file load:__
```bash
cycloader -b arty *.runs/impl_1/*.bit
```
#### SPI flash:
.mcs must be generates through vivado with a tcl script like
```tcl
set project [lindex $argv 0]
set bitfile "${project}.runs/impl_1/${project}.bit"
set mcsfile "${project}.runs/impl_1/${project}.mcs"
write_cfgmem -format mcs -interface spix4 -size 16 \
-loadbit "up 0x0 $bitfile" -loaddata "" \
-file $mcsfile -force
```
**Note:
*-interface spix4* and *-size 16* depends on SPI flash capability and size.**
The tcl script is used with:
```bash
vivado -nolog -nojournal -mode batch -source script.tcl -tclargs myproject
```
__file load:__
```bash
cycloader -b arty *.runs/impl_1/*.mcs
```