anlogic: add bit file support. SVF conversion is no more required
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README.md
23
README.md
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@ -364,10 +364,24 @@ openFPGALoader -f -b littleBee impl/pnr/*.fs
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### Sipeed Lichee Tang
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### Sipeed Lichee Tang
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Due to a lack of information about FPGA configuration using JTAG, it's not
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Support is currently limited to SRAM write
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possible to use directly the *.bit* file.
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The current way is to convert *.bit* to *.svf* by using a tool provided by
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For this target, *openFPGALoader* support *svf* and *bit*
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[prjtang project](https://github.com/mmicko/prjtang)
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__bit file load__
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```bash
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openFPGALoader -b licheeTang /somewhere/project/prj/*.bit
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```
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__svf file load__
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It's possible to produce this file by using *TD*:
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* Tools->Device Chain
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* Add your bit file
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* Option : Create svf
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or by using [prjtang project](https://github.com/mmicko/prjtang)
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```bash
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```bash
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mkdir build
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mkdir build
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@ -382,7 +396,6 @@ follow:
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tangbit --input /somewhere.bit --svf bitstream.svf
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tangbit --input /somewhere.bit --svf bitstream.svf
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```
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```
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__file load__:
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```bash
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```bash
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openFPGALoader -b licheeTang /somewhere/*.svf
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openFPGALoader -b licheeTang /somewhere/*.svf
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```
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```
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@ -17,17 +17,26 @@
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#include <string.h>
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#include <string.h>
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#include "anlogic.hpp"
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#include "anlogic.hpp"
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#include "anlogicBitParser.hpp"
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#include "jtag.hpp"
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#include "jtag.hpp"
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#include "device.hpp"
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#include "device.hpp"
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#include "progressBar.hpp"
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#define REFRESH 0x01
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#define IDCODE 0x06
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#define JTAG_PROGRAM 0x30
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#define SPI_PROGRAM 0x39
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#define CFG_IN 0x3b
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#define JTAG_START 0x3d
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#define BYPASS 0xFF
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#define IDCODE 6
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#define IRLENGTH 8
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#define IRLENGTH 8
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Anlogic::Anlogic(Jtag *jtag, const std::string &filename, bool verbose):
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Anlogic::Anlogic(Jtag *jtag, const std::string &filename, bool verbose):
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Device(jtag, filename, verbose), _svf(_jtag, _verbose)
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Device(jtag, filename, verbose), _svf(_jtag, _verbose)
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{
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{
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if (_filename != "") {
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if (_filename != "") {
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if (_file_extension == "svf")
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if (_file_extension == "svf" || _file_extension == "bit")
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_mode = Device::MEM_MODE;
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_mode = Device::MEM_MODE;
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else
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else
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throw std::exception();
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throw std::exception();
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@ -35,29 +44,89 @@ Anlogic::Anlogic(Jtag *jtag, const std::string &filename, bool verbose):
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}
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}
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Anlogic::~Anlogic()
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Anlogic::~Anlogic()
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{}
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{}
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void Anlogic::reset()
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void Anlogic::reset()
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{
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{
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_jtag->shiftIR(BYPASS, IRLENGTH);
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_jtag->shiftIR(REFRESH, IRLENGTH);
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_jtag->toggleClk(15);
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_jtag->shiftIR(BYPASS, IRLENGTH);
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_jtag->toggleClk(200000);
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}
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}
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void Anlogic::program(unsigned int offset)
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void Anlogic::program(unsigned int offset)
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{
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{
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if (_mode == Device::NONE_MODE)
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if (_mode == Device::NONE_MODE)
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return;
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return;
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/* in all case we consider svf is mandatory
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* MEM_MODE : svf file provided for constructor
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* is the bitstream to use
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* SPI_MODE : svf file provided is bridge to have
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* access to the SPI flash
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*/
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/* mem mode -> svf */
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if (_mode == Device::MEM_MODE) {
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if (_mode == Device::MEM_MODE) {
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_svf.parse(_filename);
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if (_file_extension == "svf") {
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_svf.parse(_filename);
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return;
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}
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AnlogicBitParser bit(_filename, _verbose);
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bit.parse();
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// Loading device with 'bypass' instruction.
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_jtag->shiftIR(BYPASS, IRLENGTH);
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_jtag->shiftIR(BYPASS, IRLENGTH);
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// Verify Device id.
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// SIR 8 TDI (06) ;
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// SDR 32 TDI (00000000) TDO (0a014c35) MASK (ffffffff) ;
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// Boundary Scan Chain Contents
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// Position 1: BG256
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// Loading device with 'refresh' instruction.
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_jtag->shiftIR(REFRESH, IRLENGTH);
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// Loading device with 'bypass' & 'spi_program' instruction.
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_jtag->shiftIR(BYPASS, IRLENGTH);
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_jtag->shiftIR(SPI_PROGRAM, IRLENGTH);
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_jtag->toggleClk(50000);
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// Loading device with 'jtag program' instruction.
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_jtag->shiftIR(JTAG_PROGRAM, IRLENGTH);
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_jtag->toggleClk(15);
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// Loading device with a `cfg_in` instruction.
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_jtag->shiftIR(CFG_IN, IRLENGTH);
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_jtag->toggleClk(15);
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uint8_t *data = bit.getData();
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int len = bit.getLength() / 8;
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_jtag->set_state(Jtag::SHIFT_DR);
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ProgressBar progress("Loading", len, 50);
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int pos = 0;
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uint8_t *ptr = data;
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while (len > 0) {
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int xfer_len = (len > 512)?512:len;
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_jtag->read_write(ptr, NULL, xfer_len*8, (len - xfer_len == 0));
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len -= xfer_len;
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progress.display(pos);
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pos += xfer_len;
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ptr+=xfer_len;
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}
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_jtag->set_state(Jtag::RUN_TEST_IDLE);
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progress.done();
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_jtag->toggleClk(100);
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// Loading device with a `jtag start` instruction.
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_jtag->shiftIR(JTAG_START, IRLENGTH);
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_jtag->toggleClk(15);
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// Loading device with 'bypass' instruction.
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_jtag->shiftIR(BYPASS, IRLENGTH);
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_jtag->toggleClk(1000);
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// ??
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_jtag->shiftIR(0x31, IRLENGTH);
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_jtag->toggleClk(100);
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_jtag->shiftIR(JTAG_START, IRLENGTH);
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_jtag->toggleClk(15);
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_jtag->shiftIR(BYPASS, IRLENGTH);
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_jtag->toggleClk(15);
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}
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}
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}
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}
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int Anlogic::idCode()
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int Anlogic::idCode()
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{
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{
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unsigned char tx_data[4] = {IDCODE};
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unsigned char tx_data[4];
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unsigned char rx_data[4];
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unsigned char rx_data[4];
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tx_data[0] = IDCODE;
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_jtag->go_test_logic_reset();
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_jtag->go_test_logic_reset();
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_jtag->shiftIR(tx_data, NULL, IRLENGTH);
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_jtag->shiftIR(tx_data, NULL, IRLENGTH);
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memset(tx_data, 0, 4);
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memset(tx_data, 0, 4);
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