lattice: add spiInterface method, split program_flash in two distinct method (one for internal flash and one for external spi flash), add constructor args to select flash or memory with bit file
This commit is contained in:
Gwenhael Goavec-Merou
parent
d80cf248ca
commit
cb66aa6885
226
src/lattice.cpp
226
src/lattice.cpp
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@ -28,6 +28,7 @@
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#include "lattice.hpp"
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#include "progressBar.hpp"
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#include "display.hpp"
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#include "spiFlash.hpp"
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using namespace std;
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@ -61,14 +62,18 @@ using namespace std;
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# define REG_STATUS_CNF_CHK_MASK (0x7 << 23)
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# define REG_STATUS_EXEC_ERR (1 << 26)
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Lattice::Lattice(Jtag *jtag, const string filename, bool verbose):
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Lattice::Lattice(Jtag *jtag, const string filename,
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bool flash_wr, bool sram_wr, bool verbose):
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Device(jtag, filename, verbose)
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{
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if (_filename != "") {
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if (_file_extension == "jed") {
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_mode = Device::FLASH_MODE;
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} else if (_file_extension == "bit") {
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_mode = Device::MEM_MODE;
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if (flash_wr)
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_mode = Device::FLASH_MODE;
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else
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_mode = Device::MEM_MODE;
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} else {
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throw std::exception();
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}
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@ -244,7 +249,7 @@ bool Lattice::program_mem()
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return true;
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}
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bool Lattice::program_flash()
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bool Lattice::program_intFlash()
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{
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bool err;
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uint64_t featuresRow;
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@ -267,38 +272,6 @@ bool Lattice::program_flash()
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printSuccess("DONE");
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}
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/* read ID Code 0xE0 */
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if (_verbose) {
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printf("IDCode : %x\n", idCode());
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displayReadReg(readStatusReg());
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}
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/* preload 0x1C */
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uint8_t tx_buf[26];
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memset(tx_buf, 0xff, 26);
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wr_rd(0x1C, tx_buf, 26, NULL, 0);
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wr_rd(0xFf, NULL, 0, NULL, 0);
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/* ISC Enable 0xC6 */
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printInfo("Enable configuration: ", false);
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if (!EnableISC(0x00)) {
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printError("FAIL");
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displayReadReg(readStatusReg());
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return false;
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} else {
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printSuccess("DONE");
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}
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/* ISC ERASE */
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printInfo("SRAM erase: ", false);
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if (flashErase(FLASH_ERASE_SRAM) == false) {
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printError("FAIL");
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displayReadReg(readStatusReg());
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return false;
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} else {
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printSuccess("DONE");
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}
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/* bypass */
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wr_rd(0xff, NULL, 0, NULL, 0);
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/* ISC Enable 0xC6 followed by 0x08 */
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@ -395,6 +368,91 @@ bool Lattice::program_flash()
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} else {
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printSuccess("DONE");
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}
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return true;
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}
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bool Lattice::program_extFlash(unsigned int offset)
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{
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LatticeBitParser _bit(_filename, _verbose);
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printInfo("Open file " + _filename + " ", false);
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printSuccess("DONE");
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int err = _bit.parse();
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printInfo("Parse file ", false);
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if (err == EXIT_FAILURE) {
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printError("FAIL");
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return false;
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} else {
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printSuccess("DONE");
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}
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/*IR = 0h3A, DR=0hFE,0h68. Enter RUNTESTIDLE.
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* thank @GregDavill
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* https://twitter.com/GregDavill/status/1251786406441086977
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*/
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_jtag->shiftIR(0x3A, 8, Jtag::EXIT1_IR);
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uint8_t tmp[2] = {0xFE, 0x68};
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_jtag->shiftDR(tmp, NULL, 16);
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uint8_t *data = _bit.getData();
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int length = _bit.getLength()/8;
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/* test SPI */
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SPIFlash flash(this, _verbose);
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flash.reset();
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flash.read_id();
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flash.read_status_reg();
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flash.erase_and_prog(offset, data, length);
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return true;
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}
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bool Lattice::program_flash(unsigned int offset)
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{
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/* read ID Code 0xE0 */
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if (_verbose) {
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printf("IDCode : %x\n", idCode());
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displayReadReg(readStatusReg());
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}
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/* preload 0x1C */
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uint8_t tx_buf[26];
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memset(tx_buf, 0xff, 26);
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wr_rd(0x1C, tx_buf, 26, NULL, 0);
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wr_rd(0xFf, NULL, 0, NULL, 0);
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/* ISC Enable 0xC6 */
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printInfo("Enable configuration: ", false);
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if (!EnableISC(0x00)) {
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printError("FAIL");
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displayReadReg(readStatusReg());
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return false;
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} else {
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printSuccess("DONE");
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}
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/* ISC ERASE */
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printInfo("SRAM erase: ", false);
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if (flashErase(FLASH_ERASE_SRAM) == false) {
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printError("FAIL");
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displayReadReg(readStatusReg());
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return false;
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} else {
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printSuccess("DONE");
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}
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DisableISC();
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if (_file_extension == "jed")
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program_intFlash();
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else
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program_extFlash(offset);
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/* *************************** */
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/* reload bitstream from flash */
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/* *************************** */
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/* ISC REFRESH 0x79 */
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printInfo("Refresh: ", false);
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@ -413,14 +471,14 @@ bool Lattice::program_flash()
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void Lattice::program(unsigned int offset)
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{
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(void) offset;
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if (_mode == FLASH_MODE)
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program_flash();
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program_flash(offset);
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else if (_mode == MEM_MODE)
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program_mem();
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}
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/* flash mode :
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*/
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bool Lattice::EnableISC(uint8_t flash_mode)
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{
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wr_rd(ISC_ENABLE, &flash_mode, 1, NULL, 0);
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@ -819,3 +877,95 @@ bool Lattice::loadConfiguration()
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return false;
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return true;
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}
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/* ------------------ */
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/* SPI implementation */
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/* ------------------ */
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int Lattice::spi_put(uint8_t cmd, uint8_t *tx, uint8_t *rx, uint16_t len)
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{
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int xfer_len = len + 1;
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uint8_t jtx[xfer_len];
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uint8_t jrx[xfer_len];
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jtx[0] = LatticeBitParser::reverseByte(cmd);
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if (tx != NULL) {
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for (int i=0; i < len; i++)
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jtx[i+1] = LatticeBitParser::reverseByte(tx[i]);
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}
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/* send first already stored cmd,
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* in the same time store each byte
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* to next
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*/
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_jtag->shiftDR(jtx, (rx == NULL)? NULL: jrx, 8*xfer_len);
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if (rx != NULL) {
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for (int i=0; i < len; i++)
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rx[i] = LatticeBitParser::reverseByte(jrx[i+1]);
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}
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return 0;
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}
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int Lattice::spi_put(uint8_t *tx, uint8_t *rx, uint16_t len)
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{
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int xfer_len = len;
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uint8_t jtx[xfer_len];
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uint8_t jrx[xfer_len];
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if (tx != NULL) {
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for (int i=0; i < len; i++)
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jtx[i] = LatticeBitParser::reverseByte(tx[i]);
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}
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/* send first already stored cmd,
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* in the same time store each byte
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* to next
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*/
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_jtag->shiftDR(jtx, (rx == NULL)? NULL: jrx, 8*xfer_len);
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if (rx != NULL) {
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for (int i=0; i < len; i++)
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rx[i] = LatticeBitParser::reverseByte(jrx[i]);
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}
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return 0;
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}
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int Lattice::spi_wait(uint8_t cmd, uint8_t mask, uint8_t cond,
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uint32_t timeout, bool verbose)
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{
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uint8_t rx;
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uint8_t dummy[2];
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uint8_t tmp;
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uint8_t tx = LatticeBitParser::reverseByte(cmd);
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uint32_t count = 0;
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/* CS is low until state goes to EXIT1_IR
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* so manually move to state machine to stay is this
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* state as long as needed
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*/
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_jtag->set_state(Jtag::SHIFT_DR);
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_jtag->read_write(&tx, NULL, 8, 0);
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do {
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_jtag->read_write(dummy, &rx, 8, 0);
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tmp = (LatticeBitParser::reverseByte(rx));
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count ++;
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if (count == timeout){
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printf("timeout: %x %x %d\n", tmp, rx, count);
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break;
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}
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if (verbose) {
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printf("%x %x %x %d\n", tmp, mask, cond, count);
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}
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} while ((tmp & mask) != cond);
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_jtag->set_state(Jtag::RUN_TEST_IDLE);
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if (count == timeout) {
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printf("%x\n", tmp);
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std::cout << "wait: Error" << std::endl;
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return -ETIME;
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} else
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return 0;
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}
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@ -27,19 +27,30 @@
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#include "device.hpp"
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#include "jedParser.hpp"
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#include "latticeBitParser.hpp"
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#include "spiInterface.hpp"
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class Lattice: public Device {
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class Lattice: public Device, SPIInterface {
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public:
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Lattice(Jtag *jtag, std::string filename, bool verbose);
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Lattice(Jtag *jtag, std::string filename, bool flash_wr, bool sram_wr,
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bool verbose);
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int idCode() override;
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int userCode();
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void reset() override {}
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void program(unsigned int offset) override;
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bool program_mem();
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bool program_flash();
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bool program_flash(unsigned int offset);
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bool Verify(JedParser &_jed, bool unlock = false);
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/* spi interface */
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int spi_put(uint8_t cmd, uint8_t *tx, uint8_t *rx,
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uint16_t len) override;
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int spi_put(uint8_t *tx, uint8_t *rx, uint16_t len) override;
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int spi_wait(uint8_t cmd, uint8_t mask, uint8_t cond,
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uint32_t timeout, bool verbose=false) override;
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private:
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bool program_intFlash();
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bool program_extFlash(unsigned int offset);
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bool wr_rd(uint8_t cmd, uint8_t *tx, int tx_len,
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uint8_t *rx, int rx_len, bool verbose = false);
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void unlock();
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