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openFPGALoader
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tangnano9k: new board, with the same cable w/ tangnano4k 

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
This commit is contained in:
Icenowy Zheng 2022-01-22 20:51:05 +08:00
parent dc4a454b94
commit acf677dd46
2 changed files with 8 additions and 0 deletions
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7
doc/boards.yml
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@ -366,6 +366,13 @@
Memory: OK Memory: OK
Flash: IF/EF Flash: IF/EF
- ID: tangnano4k
Description: Sipeed Tang Nano 9K
URL: https://tangnano.sipeed.com/en/
FPGA: littleBee GW1NR-9C
Memory: OK
Flash: IF/EF
- ID: tec0117 - ID: tec0117
Description: Trenz Gowin LittleBee (TEC0117) Description: Trenz Gowin LittleBee (TEC0117)
URL: https://shop.trenz-electronic.de/en/TEC0117-01-FPGA-Module-with-GOWIN-LittleBee-and-8-MByte-internal-SDRAM URL: https://shop.trenz-electronic.de/en/TEC0117-01-FPGA-Module-with-GOWIN-LittleBee-and-8-MByte-internal-SDRAM

1
src/board.hpp
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@ -158,6 +158,7 @@ static std::map <std::string, target_board_t> board_list = {
JTAG_BOARD("runber", "", "ft232", 0, 0, CABLE_DEFAULT), JTAG_BOARD("runber", "", "ft232", 0, 0, CABLE_DEFAULT),
JTAG_BOARD("tangnano", "", "ch552_jtag", 0, 0, CABLE_DEFAULT), JTAG_BOARD("tangnano", "", "ch552_jtag", 0, 0, CABLE_DEFAULT),
JTAG_BOARD("tangnano4k", "", "ft2232", 0, 0, CABLE_DEFAULT), JTAG_BOARD("tangnano4k", "", "ft2232", 0, 0, CABLE_DEFAULT),
JTAG_BOARD("tangnano9k", "", "ft2232", 0, 0, CABLE_DEFAULT),
JTAG_BOARD("tec0117", "", "ft2232", 0, 0, CABLE_DEFAULT), JTAG_BOARD("tec0117", "", "ft2232", 0, 0, CABLE_DEFAULT),
JTAG_BITBANG_BOARD("ulx2s", "", "ft232RL", 0, 0, JTAG_BITBANG_BOARD("ulx2s", "", "ft232RL", 0, 0,
FT232RL_RI, FT232RL_DSR, FT232RL_CTS, FT232RL_DCD, CABLE_DEFAULT), FT232RL_RI, FT232RL_DSR, FT232RL_CTS, FT232RL_DCD, CABLE_DEFAULT),