mirror of
https://github.com/trabucayre/openFPGALoader.git
synced 2026-08-31 18:26:14 +02:00
Update cmake according to trabucayre request https://github.com/trabucayre/openFPGALoader/pull/17
This commit is contained in:
Fabien Marteau
+276
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/*
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* Copyright (C) 2019 Gwenhael Goavec-Merou <[email protected]>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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#include <argp.h>
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#include <fstream>
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#include <iomanip>
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#include <iostream>
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#include <map>
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#include <sstream>
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#include <string.h>
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#include <unistd.h>
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#include <vector>
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#include "altera.hpp"
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#include "board.hpp"
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#include "cable.hpp"
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#include "device.hpp"
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#include "display.hpp"
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#include "gowin.hpp"
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#include "lattice.hpp"
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#include "ftdijtag.hpp"
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#include "part.hpp"
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#include "xilinx.hpp"
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using namespace std;
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struct arguments {
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bool verbose, reset;
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unsigned int offset;
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string bit_file;
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string device;
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string cable;
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string board;
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bool list_cables;
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bool list_boards;
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bool list_fpga;
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bool write_flash;
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bool write_sram;
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};
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#define LIST_CABLE 1
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#define LIST_BOARD 2
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#define LIST_FPGA 3
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const char *argp_program_version = "openFPGALoader 1.0";
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const char *argp_program_bug_address = "<[email protected]>";
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static char doc[] = "openFPGALoader -- a program to flash FPGA";
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static char args_doc[] = "BIT_FILE";
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static error_t parse_opt(int key, char *arg, struct argp_state *state);
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static struct argp_option options[] = {
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{"cable", 'c', "CABLE", 0, "jtag interface"},
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{"list-cables", LIST_CABLE, 0, 0, "list all supported cables"},
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{"board", 'b', "BOARD", 0, "board name, may be used instead of cable"},
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{"list-boards", LIST_BOARD, 0, 0, "list all supported boards"},
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{"device", 'd', "DEVICE", 0, "device to use (/dev/ttyUSBx)"},
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{"list-fpga", LIST_FPGA, 0, 0, "list all supported FPGA"},
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{"write-flash", 'f', 0, 0,
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"write bitstream in flash (default: false, only for Gowin devices)"},
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{"write-sram", 'm', 0, 0,
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"write bitstream in SRAM (default: true, only for Gowin devices)"},
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{"offset", 'o', "OFFSET", 0, "start offset in EEPROM"},
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{"verbose", 'v', 0, 0, "Produce verbose output"},
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{"reset", 'r', 0, 0, "reset FPGA after operations"},
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{0}
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};
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static struct argp argp = { options, parse_opt, args_doc, doc };
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void displaySupported(const struct arguments &args);
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int main(int argc, char **argv)
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{
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FTDIpp_MPSSE::mpsse_bit_config cable;
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/* command line args. */
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struct arguments args = {false, false, 0, "", "-", "-", "-",
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false, false, false, false, true};
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/* parse arguments */
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argp_parse(&argp, argc, argv, 0, 0, &args);
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if (args.list_boards == true || args.list_cables == true || args.list_fpga) {
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displaySupported(args);
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return EXIT_SUCCESS;
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}
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/* if a board name is specified try to use this to determine cable */
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if (args.board[0] != '-' && board_list.find(args.board) != board_list.end()) {
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auto t = cable_list.find(board_list[args.board]);
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if (t == cable_list.end()) {
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cerr << "Error: interface "<< board_list[args.board];
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cerr << " for board " << args.board << " is not supported" << endl;
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return 1;
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}
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args.cable = (*t).first;
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} else if (args.cable[0] == '-') { /* if no board and no cable */
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if (args.verbose)
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cout << "No cable or board specified: using direct ft2232 interface" << endl;
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args.cable = "ft2232";
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}
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auto select_cable = cable_list.find(args.cable);
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if (select_cable == cable_list.end()) {
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cerr << "error : " << args.cable << " not found" << endl;
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return EXIT_FAILURE;
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}
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cable = select_cable->second;
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/* jtag base */
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FtdiJtag *jtag;
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if (args.device == "-")
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jtag = new FtdiJtag(cable, 1, 6000000, false);
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else
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jtag = new FtdiJtag(cable, args.device, 1, 6000000, false);
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/* chain detection */
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vector<int> listDev;
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int found = jtag->detectChain(listDev, 5);
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if (args.verbose)
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cout << "found " << std::to_string(found) << " devices" << endl;
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if (found > 1) {
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cerr << "Error: currently only one device is supported" << endl;
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return EXIT_FAILURE;
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} else if (found < 1) {
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cerr << "Error: no device found" << endl;
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return EXIT_FAILURE;
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}
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int idcode = listDev[0];
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if (fpga_list.find(idcode) == fpga_list.end()) {
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cerr << "Error: device " << hex << idcode << " not supported" << endl;
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return 1;
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} else if (args.verbose) {
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printf("idcode 0x%x\nmanufacturer %s\nmodel %s\nfamily %s\n",
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idcode,
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fpga_list[idcode].manufacturer.c_str(),
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fpga_list[idcode].model.c_str(),
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fpga_list[idcode].family.c_str());
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}
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string fab = fpga_list[idcode].manufacturer;
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Device *fpga;
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if (fab == "xilinx") {
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fpga = new Xilinx(jtag, args.bit_file, args.verbose);
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} else if (fab == "altera") {
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fpga = new Altera(jtag, args.bit_file, args.verbose);
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} else if (fab == "Gowin") {
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fpga = new Gowin(jtag, args.bit_file, args.write_flash, args.write_sram,
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args.verbose);
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} else if (fab == "lattice") {
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fpga = new Lattice(jtag, args.bit_file, args.verbose);
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} else {
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cerr << "Error: manufacturer " << fab << " not supported" << endl;
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delete(jtag);
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return EXIT_FAILURE;
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}
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fpga->program(args.offset);
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if (args.reset)
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fpga->reset();
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delete(fpga);
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delete(jtag);
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}
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/* arguments parser */
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static error_t parse_opt(int key, char *arg, struct argp_state *state)
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{
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struct arguments *arguments = (struct arguments *)state->input;
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switch (key) {
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case 'f':
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arguments->write_flash = true;
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arguments->write_sram = false;
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break;
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case 'm':
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arguments->write_sram = true;
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break;
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case 'r':
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arguments->reset = true;
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break;
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case 'd':
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arguments->device = arg;
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break;
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case 'v':
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arguments->verbose = true;
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break;
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case 'o':
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arguments->offset = strtoul(arg, NULL, 16);
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break;
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case 'c':
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arguments->cable = arg;
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break;
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case 'b':
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arguments->board = arg;
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break;
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case ARGP_KEY_ARG:
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arguments->bit_file = arg;
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break;
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case ARGP_KEY_END:
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break;
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case LIST_CABLE:
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arguments->list_cables = true;
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break;
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case LIST_BOARD:
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arguments->list_boards = true;
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break;
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case LIST_FPGA:
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arguments->list_fpga = true;
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break;
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default:
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return ARGP_ERR_UNKNOWN;
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}
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return 0;
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}
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/* display list of cables, boards and devices supported */
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void displaySupported(const struct arguments &args)
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{
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if (args.list_cables == true) {
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stringstream t;
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t << setw(15) << left << "cable name:" << "vid:pid";
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printSuccess(t.str());
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for (auto b = cable_list.begin(); b != cable_list.end(); b++) {
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FTDIpp_MPSSE::mpsse_bit_config c = (*b).second;
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stringstream ss;
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ss << setw(15) << left << (*b).first;
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ss << "0x" << hex << c.vid << ":" << c.pid;
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printInfo(ss.str());
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}
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cout << endl;
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}
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if (args.list_boards) {
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stringstream t;
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t << setw(15) << left << "board name:" << "cable_name";
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printSuccess(t.str());
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for (auto b = board_list.begin(); b != board_list.end(); b++) {
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stringstream ss;
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ss << setw(15) << left << (*b).first << " " << (*b).second;
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printInfo(ss.str());
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}
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cout << endl;
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}
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if (args.list_fpga) {
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stringstream t;
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t << setw(12) << left << "IDCode" << setw(14) << "manufacturer";
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t << setw(15) << "family" << setw(20) << "model";
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printSuccess(t.str());
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for (auto b = fpga_list.begin(); b != fpga_list.end(); b++) {
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fpga_model fpga = (*b).second;
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stringstream ss, idCode;
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idCode << "0x" << hex << (*b).first;
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ss << setw(12) << left << idCode.str();
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ss << setw(14) << fpga.manufacturer << setw(15) << fpga.family;
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ss << setw(20) << fpga.model;
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printInfo(ss.str());
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}
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cout << endl;
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}
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}
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