Gowin: adding basic GW5A support (draft), prepare to move to spiInterface methods
This commit is contained in:
Gwenhael Goavec-Merou
parent
1306c79bdc
commit
a66f7f0f3e
423
src/gowin.cpp
423
src/gowin.cpp
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@ -78,23 +78,27 @@ using namespace std;
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Gowin::Gowin(Jtag *jtag, const string filename, const string &file_type, std::string mcufw,
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Device::prog_type_t prg_type, bool external_flash,
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bool verify, int8_t verbose): Device(jtag, filename, file_type,
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verify, verbose), is_gw1n1(false), is_gw2a(false), is_gw1n4(false), is_gw5a(false),
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_external_flash(external_flash),
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verify, verbose),
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SPIInterface(filename, verbose, 0, verify, false, false),
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_fs(NULL), _idcode(0), is_gw1n1(false), is_gw2a(false),
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is_gw1n4(false), is_gw5a(false), _external_flash(external_flash),
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_spi_sck(BSCAN_SPI_SCK), _spi_cs(BSCAN_SPI_CS),
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_spi_di(BSCAN_SPI_DI), _spi_do(BSCAN_SPI_DO),
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_spi_msk(BSCAN_SPI_MSK)
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_spi_msk(BSCAN_SPI_MSK),
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_mcufw(NULL)
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{
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_fs = NULL;
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_mcufw = NULL;
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uint32_t idcode = _jtag->get_target_device_id();
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detectFamily();
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_prev_wr_edge = _jtag->getWriteEdge();
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_prev_rd_edge = _jtag->getReadEdge();
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if (prg_type == Device::WR_FLASH)
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_mode = Device::FLASH_MODE;
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else
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_mode = Device::MEM_MODE;
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if (!_file_extension.empty()) {
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if (!_file_extension.empty() && prg_type != Device::RD_FLASH) {
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if (_file_extension == "fs") {
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try {
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_fs = new FsParser(_filename, _mode == Device::MEM_MODE, _verbose);
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@ -103,7 +107,7 @@ Gowin::Gowin(Jtag *jtag, const string filename, const string &file_type, std::st
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}
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} else {
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/* non fs file is only allowed with external flash */
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if (!external_flash)
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if (!_external_flash)
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throw std::runtime_error("incompatible file format");
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try {
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_fs = new RawParser(_filename, false);
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@ -128,24 +132,71 @@ Gowin::Gowin(Jtag *jtag, const string filename, const string &file_type, std::st
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if (_file_extension == "fs") {
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string idcode_str = _fs->getHeaderVal("idcode");
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uint32_t fs_idcode = std::stoul(idcode_str.c_str(), NULL, 16);
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if ((fs_idcode & 0x0fffffff) != idcode) {
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if ((fs_idcode & 0x0fffffff) != _idcode) {
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char mess[256];
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snprintf(mess, 256, "mismatch between target's idcode and bitstream idcode\n"
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"\tbitstream has 0x%08X hardware requires 0x%08x", fs_idcode, idcode);
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"\tbitstream has 0x%08X hardware requires 0x%08x", fs_idcode, _idcode);
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throw std::runtime_error(mess);
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}
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}
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}
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if (mcufw.size() > 0) {
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if (_idcode != 0x0100981b)
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throw std::runtime_error("Microcontroller firmware flashing only supported on GW1NSR-4C");
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_mcufw = new RawParser(mcufw, false);
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if (_mcufw->parse() == EXIT_FAILURE) {
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printError("FAIL");
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delete _mcufw;
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throw std::runtime_error("can't parse file");
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} else {
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printSuccess("DONE");
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}
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}
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if (is_gw5a) {
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_jtag->setClkFreq(2500000);
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disableCfg();
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send_command(0x00); // BYPASS ?
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_jtag->set_state(Jtag::TEST_LOGIC_RESET);
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uint32_t tmp = readStatusReg();
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printf("%08x %08x\n", tmp, tmp & (1 << 17));
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displayReadReg("plop", tmp);
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if (1) {
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//if (readStatusReg() & (1 << 17)) {
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printf("try to reboot FPGA\n");
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disableCfg();
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send_command(0);
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_jtag->set_state(Jtag::TEST_LOGIC_RESET);
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gw5a_disable_spi();
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}
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}
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}
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Gowin::~Gowin()
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{
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if (_fs)
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delete _fs;
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if (_mcufw)
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delete _mcufw;
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}
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bool Gowin::detectFamily()
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{
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_idcode = _jtag->get_target_device_id();
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/* erase and program flash differ for GW1N1 */
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if (idcode == 0x0900281B)
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if (_idcode == 0x0900281B)
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is_gw1n1 = true;
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/* erase and program flash differ for GW1N4, GW1N1Z-1 */
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if (idcode == 0x0100381B || idcode == 0x100681b)
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if (_idcode == 0x0100381B || _idcode == 0x100681b)
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is_gw1n4 = true;
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/* bscan spi external flash differ for GW1NSR-4C */
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if (idcode == 0x0100981b) {
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if (_idcode == 0x0100981b) {
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_spi_sck = BSCAN_GW1NSR_4C_SPI_SCK;
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_spi_cs = BSCAN_GW1NSR_4C_SPI_CS;
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_spi_di = BSCAN_GW1NSR_4C_SPI_DI;
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@ -157,7 +208,7 @@ Gowin::Gowin(Jtag *jtag, const string filename, const string &file_type, std::st
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* GW2 series has no internal flash and uses new bitstream checksum
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* algorithm that is not yet supported.
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*/
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switch (idcode) {
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switch (_idcode) {
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case 0x0000081b: /* GW2A(R)-18(C) */
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case 0x0000281b: /* GW2A(R)-55(C) */
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_external_flash = true;
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@ -175,28 +226,7 @@ Gowin::Gowin(Jtag *jtag, const string filename, const string &file_type, std::st
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break;
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}
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if (mcufw.size() > 0) {
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if (idcode != 0x0100981b)
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throw std::runtime_error("Microcontroller firmware flashing only supported on GW1NSR-4C");
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_mcufw = new RawParser(mcufw, false);
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if (_mcufw->parse() == EXIT_FAILURE) {
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printError("FAIL");
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delete _mcufw;
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throw std::runtime_error("can't parse file");
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} else {
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printSuccess("DONE");
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}
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}
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}
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Gowin::~Gowin()
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{
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if (_fs)
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delete _fs;
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if (_mcufw)
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delete _mcufw;
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return true;
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}
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bool Gowin::send_command(uint8_t cmd)
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@ -279,18 +309,20 @@ void Gowin::programExtFlash(unsigned int offset, bool unprotect_flash)
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{
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_jtag->setClkFreq(10000000);
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if (!enableCfg())
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throw std::runtime_error("Error: fail to enable configuration");
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displayReadReg("after program flash", readStatusReg());
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eraseSRAM();
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send_command(XFER_DONE);
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send_command(NOOP);
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if (!is_gw2a) {
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send_command(0x3D);
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if (is_gw5a) {
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if (!prepare_flash_access()) {
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throw std::runtime_error("Error: fail to switch GW5A to SPI mode");
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return;
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}
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} else {
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disableCfg();
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send_command(NOOP);
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if (!eraseSRAM())
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throw std::runtime_error("Error: fail to erase SRAM");
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if (!is_gw2a) {
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send_command(0x3D);
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}
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}
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SPIFlash spiFlash(this, unprotect_flash,
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@ -301,17 +333,42 @@ void Gowin::programExtFlash(unsigned int offset, bool unprotect_flash)
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const uint8_t *data = _fs->getData();
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int length = _fs->getLength();
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if (spiFlash.erase_and_prog(offset, data, length / 8) != 0)
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throw std::runtime_error("Error: write to flash failed");
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if (_verify)
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if (!spiFlash.verify(offset, data, length / 8, 256))
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throw std::runtime_error("Error: flash vefication failed");
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if (!is_gw2a) {
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if (!disableCfg())
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throw std::runtime_error("Error: fail to disable configuration");
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char mess[256];
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bool ret = true;
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if (spiFlash.erase_and_prog(offset, data, length / 8) != 0) {
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snprintf(mess, 256, "Error: write to flash failed");
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printError(mess);
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ret = false;
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}
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if (ret && _verify)
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if (!spiFlash.verify(offset, data, length / 8, 256)) {
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snprintf(mess, 256, "Error: flash vefication failed");
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printError(mess);
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ret = false;
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}
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if (is_gw5a) {
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if (!post_flash_access()) {
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snprintf(mess, 256, "Error: fail to disable SPI mode");
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printError(mess);
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ret = false;
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}
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} else if (!is_gw2a) {
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if (!disableCfg()) {
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snprintf(mess, 256, "Error: fail to disable configuration");
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printError(mess);
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ret = false;
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}
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}
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reset();
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if (!is_gw5a)
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reset();
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if (!ret) {
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throw std::runtime_error(mess);
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}
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}
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void Gowin::programSRAM()
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@ -346,8 +403,6 @@ void Gowin::program(unsigned int offset, bool unprotect_flash)
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return;
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if (_mode == FLASH_MODE) {
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if (is_gw5a)
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throw std::runtime_error("Error: write to flash on GW5A is not yet supported");
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if (_external_flash)
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programExtFlash(offset, unprotect_flash);
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else
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@ -424,10 +479,62 @@ void Gowin::displayReadReg(const char *prefix, uint32_t reg)
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"Gowin VLD", "Done Final", "Security Final", "Ready",
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"POR", "FLASH lock", "FLASH2 lock",
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};
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static const char *gw5a_desc[32] = {
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"CRC Error", "Bad Command", "ID Verify Failed", "Timeout",
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"auto_boot_2nd_fail", "Memory Erase", "Preamble", "System Edit Mode",
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"Program SPI FLASH directly", "auto_boot_1st_fail",
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"Non-JTAG configuration is active", "Bypass", "i2c_sram_f",
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"Done Final", "Security Final", "encrypted_format",
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"key_right", "sspi_mode", "CRC Comparison Done", "CRC Error",
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"ECC Error", "ECC Error Uncorrectable", "CMSER IDLE",
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"CPU Bus Width", "", "Retry time sync pattern detect", "",
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"Decompression Failed", "OTP Reading Done", "Init Done",
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"Wakeup Done", "Auto Erase",
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};
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/* Bits 26:25 */
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static const char *gw5a_sync_det_retry[4] = {
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"no retry",
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"retry one time",
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"retry two times",
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"no \"sync pattern\" is found after three times detection",
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};
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/* Bits 24:23 */
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static const char *gw5a_cpu_bus_width[4] = {
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"no BWD pattern is detected",
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"8-bit mode",
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"16-bit mode",
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"32-bit mode",
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};
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printf("%s: displayReadReg %08x\n", prefix, reg);
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for (unsigned i = 0, bm = 1; i < 19; ++i, bm <<= 1) {
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if (reg & bm) {
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printf("\t%s\n", desc[i]);
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if (_idcode == 0x0001281b) {
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for (unsigned i = 0, bm = 1; i < 32; ++i, bm <<= 1) {
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switch (i) {
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case 23:
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printf("\t[%d:%d] %s: %s\n", i + 1, i, gw5a_desc[i],
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gw5a_cpu_bus_width[(reg >> i)&0x3]);
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bm <<= 1;
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i++;
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break;
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case 25:
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printf("\t[%d:%d] %s: %s\n", i + 1, i, gw5a_desc[i],
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gw5a_sync_det_retry[(reg >> i)&0x3]);
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bm <<= 1;
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i++;
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break;
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default:
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if (reg & bm)
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printf("\t [%2d] %s\n", i, gw5a_desc[i]);
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}
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}
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} else {
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for (unsigned i = 0, bm = 1; i < 19; ++i, bm <<= 1) {
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if (reg & bm)
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printf("\t%s\n", desc[i]);
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}
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}
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}
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@ -728,6 +835,9 @@ inline void Gowin::spi_gowin_write(const uint8_t *wr, uint8_t *rd, unsigned len)
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int Gowin::spi_put(uint8_t cmd, const uint8_t *tx, uint8_t *rx, uint32_t len)
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{
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if (is_gw5a)
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return spi_put_gw5a(cmd, tx, rx, len);
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uint8_t jrx[len+1], jtx[len+1];
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jtx[0] = cmd;
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if (tx)
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@ -736,12 +846,25 @@ int Gowin::spi_put(uint8_t cmd, const uint8_t *tx, uint8_t *rx, uint32_t len)
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memset(jtx+1, 0, len);
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int ret = spi_put(jtx, (rx)? jrx : NULL, len+1);
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if (rx)
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memcpy(rx, jrx+1, len);
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memcpy(rx, jrx + 1, len);
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return ret;
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}
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int Gowin::spi_put(const uint8_t *tx, uint8_t *rx, uint32_t len)
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{
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if (is_gw5a) {
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uint8_t jrx[len];
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int ret = spi_put_gw5a(tx[0], &tx[1], (rx) ? jrx : NULL, len - 1);
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/* FIXME: first byte is never read (but in most
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* call it's not an issue
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*/
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if (rx) {
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rx[0] = 0;
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memcpy(&rx[1], jrx, len - 1);
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}
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return ret;
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}
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if (is_gw2a) {
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uint8_t jtx[len];
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uint8_t jrx[len];
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@ -796,9 +919,60 @@ int Gowin::spi_put(const uint8_t *tx, uint8_t *rx, uint32_t len)
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return 0;
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}
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/*
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* Specific implementation for Arora V GW5A FPGAs
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* interface mode is already configured to mimic SPI (mode 0).
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* JTAG is LSB, SPI is MSB -> all byte must be reversed.
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*/
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int Gowin::spi_put_gw5a(const uint8_t cmd, const uint8_t *tx, uint8_t *rx, uint32_t len)
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{
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uint32_t kLen = len + (rx ? 1 : 0); // cppcheck/lint happy
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uint32_t bit_len = len * 8 + (rx ? 3 : 0); // 3bits delay when read
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uint8_t jtx[kLen], jrx[kLen];
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uint8_t _cmd = FsParser::reverseByte(cmd); // reverse cmd.
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uint8_t curr_tdi = cmd & 0x01;
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if (tx != NULL) { // SPI: MSB, JTAG: LSB -> reverse Bytes
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for (uint32_t i = 0; i < len; i++)
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jtx[i] = FsParser::reverseByte(tx[i]);
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curr_tdi = tx[len-1] & 0x01;
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} else {
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memset(jtx, curr_tdi, kLen);
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}
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// set TMS/CS low by moving to a state where TMS == 0,
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// first cmd bit is also sent here (ie before next TCK rise).
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_jtag->set_state(Jtag::RUN_TEST_IDLE, _cmd & 0x01);
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_cmd >>= 1;
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// complete with 7 remaining cmd bits
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if (0 != _jtag->read_write(&_cmd, NULL, 7, 0))
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return -1;
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// write/read the sequence. Force set to 0 to manage state here
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// (with jtag last bit is sent with tms rise)
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if (0 != _jtag->read_write(jtx, (rx) ? jrx : NULL, bit_len, 0))
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return -1;
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// set TMS/CS high by moving to a state where TMS == 1
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_jtag->set_state(Jtag::TEST_LOGIC_RESET, curr_tdi);
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_jtag->toggleClk(5); // Required ?
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_jtag->flushTMS(true);
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if (rx) { // Reconstruct read sequence and drop first 3bits.
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for (int i = 0; i < len; i++)
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rx[i] = FsParser::reverseByte((jrx[i] >> 3) |
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(((jrx[i+1]) & 0x07) << 5));
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}
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return 0;
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}
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int Gowin::spi_wait(uint8_t cmd, uint8_t mask, uint8_t cond,
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uint32_t timeout, bool verbose)
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{
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if (is_gw5a)
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return spi_wait_gw5a(cmd, mask, cond, timeout, verbose);
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uint8_t tmp;
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uint32_t count = 0;
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@ -881,3 +1055,130 @@ int Gowin::spi_wait(uint8_t cmd, uint8_t mask, uint8_t cond,
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return 0;
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}
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int Gowin::spi_wait_gw5a(uint8_t cmd, uint8_t mask, uint8_t cond,
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uint32_t timeout, bool verbose)
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{
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uint8_t tmp;
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int ret;
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uint32_t count = 0;
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do {
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// sent command and read flash answer
|
||||
if (0 != spi_put_gw5a(cmd, NULL, &tmp, 1)) {
|
||||
printError("Error: cant write/read status");
|
||||
return -1;
|
||||
}
|
||||
|
||||
count ++;
|
||||
if (count == timeout) {
|
||||
printf("timeout: %x\n", tmp);
|
||||
break;
|
||||
}
|
||||
if (verbose) {
|
||||
printf("%x %x %x %u\n", tmp, mask, cond, count);
|
||||
}
|
||||
} while ((tmp & mask) != cond);
|
||||
|
||||
return (count == timeout) ? -1 : 0;
|
||||
}
|
||||
|
||||
bool Gowin::dumpFlash(uint32_t base_addr, uint32_t len)
|
||||
{
|
||||
bool ret = true;
|
||||
/* enable SPI flash access */
|
||||
if (!prepare_flash_access())
|
||||
return false;
|
||||
|
||||
try {
|
||||
SPIFlash flash(this, false, _verbose);
|
||||
ret = flash.dump(_filename, base_addr, len, 256);
|
||||
} catch (std::exception &e) {
|
||||
printError(e.what());
|
||||
ret = false;
|
||||
}
|
||||
|
||||
/* reload bitstream */
|
||||
return post_flash_access() && ret;
|
||||
}
|
||||
|
||||
bool Gowin::prepare_flash_access()
|
||||
{
|
||||
if (!is_gw5a)
|
||||
return false;
|
||||
|
||||
eraseSRAM();
|
||||
|
||||
enableCfg();
|
||||
send_command(0x3F);
|
||||
disableCfg();
|
||||
displayReadReg("toto", readStatusReg());
|
||||
printf("%08x\n", idCode());
|
||||
|
||||
/* UG704 3.4.3 'ExtFlash Programming -> Program External Flash via JTAG-SPI' */
|
||||
send_command(NOOP);
|
||||
_jtag->set_state(Jtag::RUN_TEST_IDLE);
|
||||
_jtag->toggleClk(126*8);
|
||||
_jtag->set_state(Jtag::RUN_TEST_IDLE);
|
||||
send_command(0x16);
|
||||
send_command(0x00);
|
||||
_jtag->set_state(Jtag::RUN_TEST_IDLE);
|
||||
_jtag->toggleClk(625*8);
|
||||
_jtag->set_state(Jtag::TEST_LOGIC_RESET);
|
||||
/* save current read/write edge cfg before switching to SPI mode0
|
||||
* (rising edge: read / falling edge: write)
|
||||
*/
|
||||
_prev_wr_edge = _jtag->getWriteEdge();
|
||||
_prev_rd_edge = _jtag->getReadEdge();
|
||||
_jtag->setWriteEdge(JtagInterface::FALLING_EDGE);
|
||||
_jtag->setReadEdge(JtagInterface::RISING_EDGE);
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
bool Gowin::gw5a_disable_spi()
|
||||
{
|
||||
|
||||
/* reconfigure WR/RD edge and sent sequence to
|
||||
* disable SPI mode
|
||||
*/
|
||||
_jtag->setWriteEdge(_prev_wr_edge);
|
||||
_jtag->setReadEdge(_prev_rd_edge);
|
||||
_jtag->flushTMS(true);
|
||||
_jtag->flush();
|
||||
// 1. sent 15 TMS pulse
|
||||
// TEST_LOGIC_RESET to SELECT_DR_SCAN: 01
|
||||
_jtag->set_state(Jtag::SELECT_DR_SCAN);
|
||||
// SELECT_DR_SCAN to CAPTURE_DR: 0
|
||||
_jtag->set_state(Jtag::CAPTURE_DR);
|
||||
// CAPTURE_DR to EXIT1_DR: 1
|
||||
_jtag->set_state(Jtag::EXIT1_DR);
|
||||
// EXIT1_DR to EXIT2_DR: 01
|
||||
_jtag->set_state(Jtag::EXIT2_DR);
|
||||
// Now we have 3 pulses
|
||||
for (int i = 0; i < 6; i++) { // 2 each loop: 12 pulses + 3 before
|
||||
_jtag->set_state(Jtag::PAUSE_DR); // 010
|
||||
_jtag->set_state(Jtag::EXIT2_DR); // 1
|
||||
}
|
||||
_jtag->set_state(Jtag::EXIT1_DR); // 01 : 16
|
||||
_jtag->set_state(Jtag::PAUSE_DR); // 0
|
||||
|
||||
_jtag->flushTMS(true);
|
||||
_jtag->flush();
|
||||
// 2. 8 TCK clock cycle with TMS=1
|
||||
_jtag->set_state(Jtag::TEST_LOGIC_RESET); // 5 cycles
|
||||
_jtag->toggleClk(5);
|
||||
return true;
|
||||
}
|
||||
|
||||
bool Gowin::post_flash_access()
|
||||
{
|
||||
if (!is_gw5a)
|
||||
return false;
|
||||
if (!gw5a_disable_spi())
|
||||
return false;
|
||||
|
||||
reset();
|
||||
|
||||
return true;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -14,6 +14,7 @@
|
|||
#include "configBitstreamParser.hpp"
|
||||
#include "device.hpp"
|
||||
#include "jtag.hpp"
|
||||
#include "jtagInterface.hpp"
|
||||
#include "spiInterface.hpp"
|
||||
|
||||
class Gowin: public Device, SPIInterface {
|
||||
|
|
@ -32,16 +33,38 @@ class Gowin: public Device, SPIInterface {
|
|||
(void) len;
|
||||
printError("protect flash not supported"); return false;}
|
||||
bool unprotect_flash() override {
|
||||
if (is_gw5a)
|
||||
return SPIInterface::unprotect_flash();
|
||||
printError("unprotect flash not supported"); return false;}
|
||||
bool bulk_erase_flash() override {
|
||||
if (is_gw5a)
|
||||
return SPIInterface::bulk_erase_flash();
|
||||
printError("bulk erase flash not supported"); return false;}
|
||||
virtual bool dumpFlash(uint32_t base_addr, uint32_t len) override;
|
||||
int spi_put(uint8_t cmd, const uint8_t *tx, uint8_t *rx,
|
||||
uint32_t len) override;
|
||||
int spi_put(const uint8_t *tx, uint8_t *rx, uint32_t len) override;
|
||||
/* Specific implementation for Arora V GW5A FPGAs. */
|
||||
int spi_put_gw5a(const uint8_t cmd, const uint8_t *tx, uint8_t *rx,
|
||||
uint32_t len);
|
||||
int spi_wait(uint8_t cmd, uint8_t mask, uint8_t cond,
|
||||
uint32_t timeout, bool verbose) override;
|
||||
/* Specific implementation for Arora V GW5A FPGAs. */
|
||||
int spi_wait_gw5a(uint8_t cmd, uint8_t mask, uint8_t cond,
|
||||
uint32_t timeout, bool verbose);
|
||||
|
||||
protected:
|
||||
/*!
|
||||
* \brief prepare SPI flash access
|
||||
*/
|
||||
virtual bool prepare_flash_access() override;
|
||||
/*!
|
||||
* \brief end of SPI flash access
|
||||
*/
|
||||
virtual bool post_flash_access() override;
|
||||
|
||||
private:
|
||||
bool detectFamily();
|
||||
bool send_command(uint8_t cmd);
|
||||
void spi_gowin_write(const uint8_t *wr, uint8_t *rd, unsigned len);
|
||||
uint32_t readReg32(uint8_t cmd);
|
||||
|
|
@ -64,7 +87,10 @@ class Gowin: public Device, SPIInterface {
|
|||
* .fs usercode field
|
||||
*/
|
||||
void checkCRC();
|
||||
bool gw5a_disable_spi();
|
||||
|
||||
ConfigBitstreamParser *_fs;
|
||||
uint32_t _idcode;
|
||||
bool is_gw1n1;
|
||||
bool is_gw2a;
|
||||
bool is_gw1n4;
|
||||
|
|
@ -77,5 +103,7 @@ class Gowin: public Device, SPIInterface {
|
|||
uint8_t _spi_do; /**< do signal (miso) offset in bscan SPI */
|
||||
uint8_t _spi_msk; /** default spi msk with only do out */
|
||||
ConfigBitstreamParser *_mcufw;
|
||||
JtagInterface::tck_edge_t _prev_rd_edge; /**< default probe rd edge cfg */
|
||||
JtagInterface::tck_edge_t _prev_wr_edge; /**< default probe wr edge cfg */
|
||||
};
|
||||
#endif // SRC_GOWIN_HPP_
|
||||
|
|
|
|||
Loading…
Reference in New Issue