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Merge pull request #671 from MYJ695/master 

Fix DNA read on Zynq devices
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Gwenhael Goavec-Merou 2026-06-25 15:12:11 +02:00 committed by GitHub
parent 2829abd10e fda4ef7b45
commit a1c4208510
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GPG Key ID: B5690EEEBB952194
1 changed files with 7 additions and 3 deletions
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10
src/xilinx.cpp
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@ -358,7 +358,10 @@ Xilinx::Xilinx(Jtag *jtag, const std::string &filename,
_fpga_family = SPARTAN7_FAMILY; _fpga_family = SPARTAN7_FAMILY;
} else if (family == "zynq") { } else if (family == "zynq") {
_fpga_family = ZYNQ_FAMILY; _fpga_family = ZYNQ_FAMILY;
if (_mode != Device::MEM_MODE) { /* DNA read uses a 7-series PL JTAG instruction and should not
* be blocked by the Zynq PS-side SPI flash restriction.
*/
if (_mode != Device::MEM_MODE && !read_dna) {
char mess[256]; char mess[256];
snprintf(mess, 256, "Error: can't flash non-volatile memory for " snprintf(mess, 256, "Error: can't flash non-volatile memory for "
"Zynq7000 devices\n" "Zynq7000 devices\n"
@ -432,11 +435,12 @@ Xilinx::Xilinx(Jtag *jtag, const std::string &filename,
} }
if (read_dna) { if (read_dna) {
if (_fpga_family == ARTIX_FAMILY || _fpga_family == KINTEXUS_FAMILY) { if (_fpga_family == ARTIX_FAMILY || _fpga_family == KINTEXUS_FAMILY ||
_fpga_family == ZYNQ_FAMILY) {
uint64_t dna = Xilinx::fuse_dna_read(); uint64_t dna = Xilinx::fuse_dna_read();
printf("{\"dna\": \"0x%016" PRIx64 "\"}\n", dna); printf("{\"dna\": \"0x%016" PRIx64 "\"}\n", dna);
} else { } else {
throw std::runtime_error("Error: read_xadc only supported for Artix 7"); throw std::runtime_error("Error: read_dna only supported for 7-series style Xilinx FPGA");
} }
} }